.gitmodules

[submodule "addins/riscv-dv"]
	path = addins/riscv-dv
	url = https://github.com/google/riscv-dv
[submodule "addins/embench-iot"]
	path = addins/embench-iot
	url = https://github.com/embench/embench-iot
	branch = embench-1.0-branch
[submodule "addins/coremark"]
	path = addins/coremark
	url = https://github.com/eembc/coremark
[submodule "addins/FreeRTOS-Kernel"]
	path = addins/FreeRTOS-Kernel
	url = https://github.com/FreeRTOS/FreeRTOS-Kernel.git
[submodule "addins/vivado-boards"]
	path = addins/vivado-boards
	url = https://github.com/Digilent/vivado-boards/
[submodule "addins/riscv-arch-test"]
	path = addins/riscv-arch-test
	url = https://github.com/riscv-non-isa/riscv-arch-test
	branch = dev
[submodule "addins/branch-predictor-simulator"]
	path = addins/branch-predictor-simulator
	url = https://github.com/rosethompson/branch-predictor-simulator
[submodule "addins/verilog-ethernet"]
	sparseCheckout = true
	path = addins/verilog-ethernet
	url = https://github.com/rosethompson/verilog-ethernet.git
[submodule "cvw-arch-verif"]
	path = addins/cvw-arch-verif
	url = https://github.com/openhwgroup/cvw-arch-verif
[submodule "addins/riscvISACOV"]
	path = addins/riscvISACOV
	url = https://github.com/riscv-verification/riscvISACOV.git
[submodule "addins/berkeley-softfloat-3"]
	path = addins/berkeley-softfloat-3
	url = https://github.com/ucb-bar/berkeley-softfloat-3.git
[submodule "addins/berkeley-testfloat-3"]
	path = addins/berkeley-testfloat-3
	url = https://github.com/ucb-bar/berkeley-testfloat-3
	ignore = untracked