From f7c08d4e1844afefd5163b47c6829dc578a05ad1 Mon Sep 17 00:00:00 2001 From: Gregor Haas Date: Thu, 10 Aug 2023 13:10:19 -0700 Subject: [PATCH 01/14] Move platform-dependent configuration options into platform header in SM --- sm/src/cpu.c | 7 +++++++ sm/src/cpu.h | 1 - sm/src/enclave.c | 2 -- sm/src/enclave.h | 1 - sm/src/platform/fpga/ariane/platform.h | 20 ++++++++++++++++++++ sm/src/platform/generic/platform.h | 20 ++++++++++++++++++++ sm/src/platform/mpfs/platform.h | 21 +++++++++++++++++++++ sm/src/pmp.c | 7 +++++++ sm/src/pmp.h | 3 --- sm/src/sm.c | 7 +++++++ sm/src/sm.h | 3 --- 11 files changed, 82 insertions(+), 10 deletions(-) diff --git a/sm/src/cpu.c b/sm/src/cpu.c index 87bb9f3ad..d2a9d2dcb 100644 --- a/sm/src/cpu.c +++ b/sm/src/cpu.c @@ -5,6 +5,13 @@ #include "cpu.h" #include +#ifndef TARGET_PLATFORM_HEADER +#error "SM requires a defined platform to build" +#endif + +// Special target platform header, set by configure script +#include TARGET_PLATFORM_HEADER + static struct cpu_state cpus[MAX_HARTS] = {0,}; int cpu_is_enclave_context() diff --git a/sm/src/cpu.h b/sm/src/cpu.h index ca3f994d3..89378b55e 100644 --- a/sm/src/cpu.h +++ b/sm/src/cpu.h @@ -8,7 +8,6 @@ #include "sm.h" #include "enclave.h" -#define MAX_HARTS 16 /* hart state for regulating SBI */ struct cpu_state { diff --git a/sm/src/enclave.c b/sm/src/enclave.c index efbafa965..1ceb798a6 100644 --- a/sm/src/enclave.c +++ b/sm/src/enclave.c @@ -13,8 +13,6 @@ #include #include -#define ENCL_MAX 16 - struct enclave enclaves[ENCL_MAX]; #define ENCLAVE_EXISTS(eid) (eid >= 0 && eid < ENCL_MAX && enclaves[eid].state >= 0) diff --git a/sm/src/enclave.h b/sm/src/enclave.h index 28d7eafe8..07564a6a6 100644 --- a/sm/src/enclave.h +++ b/sm/src/enclave.h @@ -18,7 +18,6 @@ #include TARGET_PLATFORM_HEADER #define ATTEST_DATA_MAXLEN 1024 -#define ENCLAVE_REGIONS_MAX 8 /* TODO: does not support multithreaded enclave yet */ #define MAX_ENCL_THREADS 1 diff --git a/sm/src/platform/fpga/ariane/platform.h b/sm/src/platform/fpga/ariane/platform.h index f6eaab3bc..1fcc0fff1 100644 --- a/sm/src/platform/fpga/ariane/platform.h +++ b/sm/src/platform/fpga/ariane/platform.h @@ -1,5 +1,25 @@ +#ifndef _PLATFORM_H_ +#define _PLATFORM_H_ + // No special data needed for default platform struct platform_enclave_data{ }; + +// Enclave configuration +#define ENCL_MAX 16 +#define ENCLAVE_REGIONS_MAX 8 + +// SM configuration +#define SMM_BASE 0x80000000 +#define SMM_SIZE 0x200000 + +// PMP configuration +#define PMP_N_REG 8 +#define PMP_MAX_N_REGION 16 + +// CPU configuration +#define MAX_HARTS 5 + +#endif // _PLATFORM_H_ diff --git a/sm/src/platform/generic/platform.h b/sm/src/platform/generic/platform.h index f6eaab3bc..316452a17 100644 --- a/sm/src/platform/generic/platform.h +++ b/sm/src/platform/generic/platform.h @@ -1,5 +1,25 @@ +#ifndef _PLATFORM_H_ +#define _PLATFORM_H_ + // No special data needed for default platform struct platform_enclave_data{ }; + +// Enclave configuration +#define ENCL_MAX 16 +#define ENCLAVE_REGIONS_MAX 8 + +// SM configuration +#define SMM_BASE 0x80000000 +#define SMM_SIZE 0x200000 + +// PMP configuration +#define PMP_N_REG 8 +#define PMP_MAX_N_REGION 16 + +// CPU configuration +#define MAX_HARTS 16 + +#endif // _PLATFORM_H_ diff --git a/sm/src/platform/mpfs/platform.h b/sm/src/platform/mpfs/platform.h index f6eaab3bc..b45e760ea 100644 --- a/sm/src/platform/mpfs/platform.h +++ b/sm/src/platform/mpfs/platform.h @@ -1,5 +1,26 @@ +#ifndef _PLATFORM_H_ +#define _PLATFORM_H_ + // No special data needed for default platform struct platform_enclave_data{ }; + +// Enclave configuration +#define ENCL_MAX 16 +#define ENCLAVE_REGIONS_MAX 8 + +// SM configuration +// todo dont think this is correct +#define SMM_BASE 0x80000000 +#define SMM_SIZE 0x200000 + +// PMP configuration +#define PMP_N_REG 16 +#define PMP_MAX_N_REGION 16 + +// CPU configuration +#define MAX_HARTS 5 + +#endif // _PLATFORM_H_ diff --git a/sm/src/pmp.c b/sm/src/pmp.c index ea7ebb798..9eb284888 100644 --- a/sm/src/pmp.c +++ b/sm/src/pmp.c @@ -14,6 +14,13 @@ #include #include +#ifndef TARGET_PLATFORM_HEADER +#error "SM requires a defined platform to build" +#endif + +// Special target platform header, set by configure script +#include TARGET_PLATFORM_HEADER + /* PMP global spin locks */ static spinlock_t pmp_lock = SPIN_LOCK_INITIALIZER; diff --git a/sm/src/pmp.h b/sm/src/pmp.h index f83aeb98d..d5980f107 100644 --- a/sm/src/pmp.h +++ b/sm/src/pmp.h @@ -8,9 +8,6 @@ #include "sm.h" #include -#define PMP_N_REG 8 //number of PMP registers -#define PMP_MAX_N_REGION 16 //maximum number of PMP regions - #define SET_BIT(bitmap, n) (bitmap |= (0x1 << (n))) #define UNSET_BIT(bitmap, n) (bitmap &= ~(0x1 << (n))) #define TEST_BIT(bitmap, n) (bitmap & (0x1 << (n))) diff --git a/sm/src/sm.c b/sm/src/sm.c index 2b278c454..778015cf2 100644 --- a/sm/src/sm.c +++ b/sm/src/sm.c @@ -18,6 +18,13 @@ static int sm_init_done = 0; static int sm_region_id = 0, os_region_id = 0; +#ifndef TARGET_PLATFORM_HEADER +#error "SM requires a defined platform to build" +#endif + +// Special target platform header, set by configure script +#include TARGET_PLATFORM_HEADER + /* from Sanctum BootROM */ extern byte sanctum_sm_hash[MDSIZE]; extern byte sanctum_sm_signature[SIGNATURE_SIZE]; diff --git a/sm/src/sm.h b/sm/src/sm.h index cdce08e4e..685b6808a 100644 --- a/sm/src/sm.h +++ b/sm/src/sm.h @@ -10,9 +10,6 @@ #include "sm-sbi.h" #include -#define SMM_BASE 0x80000000 -#define SMM_SIZE 0x200000 - #include "sm_call.h" #include "sm_err.h" From d73b9393b57de29ec3ed8a2ea2a9fa776282bdcb Mon Sep 17 00:00:00 2001 From: Gregor Haas Date: Fri, 30 Jun 2023 11:52:18 -0700 Subject: [PATCH 02/14] Clean up SM source to pass stricter warnings --- sm/src/attest.c | 18 +++++++++--------- sm/src/cpu.c | 6 +++--- sm/src/cpu.h | 6 +++--- sm/src/crypto.c | 16 ++++++++-------- sm/src/ed25519/fixedint.h | 14 +++++++++++++- sm/src/enclave.c | 7 +++++-- sm/src/enclave.h | 4 +++- sm/src/platform-hook.h | 6 +++--- sm/src/platform/mpfs/platform.c | 2 +- sm/src/plugins/multimem.c | 4 ++-- sm/src/pmp.c | 10 +++++----- sm/src/pmp.h | 4 ++-- sm/src/sm-sbi.c | 2 +- sm/src/sm-sbi.h | 2 +- sm/src/sm.c | 8 ++++---- sm/src/{assert.h => sm_assert.h} | 0 sm/src/thread.c | 6 ++---- sm/src/thread.h | 8 ++++---- 18 files changed, 69 insertions(+), 54 deletions(-) rename sm/src/{assert.h => sm_assert.h} (100%) diff --git a/sm/src/attest.c b/sm/src/attest.c index b26a74dc1..9c888887d 100644 --- a/sm/src/attest.c +++ b/sm/src/attest.c @@ -8,7 +8,7 @@ #include /* This will hash the loader and the runtime + eapp elf files. */ -int validate_and_hash_epm(hash_ctx* hash_ctx, struct enclave* encl) +static int validate_and_hash_epm(hash_ctx* ctx, struct enclave* encl) { uintptr_t loader = encl->params.dram_base; // also base uintptr_t runtime = encl->params.runtime_base; @@ -17,36 +17,36 @@ int validate_and_hash_epm(hash_ctx* hash_ctx, struct enclave* encl) // ensure pointers don't point to middle of correct files uintptr_t sizes[3] = {runtime - loader, eapp - runtime, free - eapp}; - hash_extend(hash_ctx, (void*) sizes, sizeof(sizes)); + hash_extend(ctx, (void*) sizes, sizeof(sizes)); // using pointers to ensure that they themselves are correct // TODO(Evgeny): can extend by entire file instead of page at a time? for (uintptr_t page = loader; page < runtime; page += RISCV_PGSIZE) { - hash_extend_page(hash_ctx, (void*) page); + hash_extend_page(ctx, (void*) page); } for (uintptr_t page = runtime; page < eapp; page += RISCV_PGSIZE) { - hash_extend_page(hash_ctx, (void*) page); + hash_extend_page(ctx, (void*) page); } for (uintptr_t page = eapp; page < free; page += RISCV_PGSIZE) { - hash_extend_page(hash_ctx, (void*) page); + hash_extend_page(ctx, (void*) page); } return 0; } unsigned long validate_and_hash_enclave(struct enclave* enclave){ - hash_ctx hash_ctx; - hash_init(&hash_ctx); + hash_ctx ctx; + hash_init(&ctx); // TODO: ensure untrusted and free sizes // hash the epm contents - int valid = validate_and_hash_epm(&hash_ctx, enclave); + int valid = validate_and_hash_epm(&ctx, enclave); if(valid == -1){ return SBI_ERR_SM_ENCLAVE_ILLEGAL_PTE; } - hash_finalize(enclave->hash, &hash_ctx); + hash_finalize(enclave->hash, &ctx); return SBI_ERR_SM_ENCLAVE_SUCCESS; } diff --git a/sm/src/cpu.c b/sm/src/cpu.c index d2a9d2dcb..e1c2e7ed3 100644 --- a/sm/src/cpu.c +++ b/sm/src/cpu.c @@ -14,12 +14,12 @@ static struct cpu_state cpus[MAX_HARTS] = {0,}; -int cpu_is_enclave_context() +int cpu_is_enclave_context(void) { return cpus[csr_read(mhartid)].is_enclave; } -int cpu_get_enclave_id() +int cpu_get_enclave_id(void) { return cpus[csr_read(mhartid)].eid; } @@ -30,7 +30,7 @@ void cpu_enter_enclave_context(enclave_id eid) cpus[csr_read(mhartid)].eid = eid; } -void cpu_exit_enclave_context() +void cpu_exit_enclave_context(void) { cpus[csr_read(mhartid)].is_enclave = 0; } diff --git a/sm/src/cpu.h b/sm/src/cpu.h index 89378b55e..f4f20107d 100644 --- a/sm/src/cpu.h +++ b/sm/src/cpu.h @@ -16,9 +16,9 @@ struct cpu_state }; /* external functions */ -int cpu_is_enclave_context(); -int cpu_get_enclave_id(); +int cpu_is_enclave_context(void); +int cpu_get_enclave_id(void); void cpu_enter_enclave_context(enclave_id eid); -void cpu_exit_enclave_context(); +void cpu_exit_enclave_context(void); #endif diff --git a/sm/src/crypto.c b/sm/src/crypto.c index 00948ce09..a70024670 100644 --- a/sm/src/crypto.c +++ b/sm/src/crypto.c @@ -5,24 +5,24 @@ #include "crypto.h" #include "page.h" -void hash_init(hash_ctx* hash_ctx) +void hash_init(hash_ctx* ctx) { - sha3_init(hash_ctx, MDSIZE); + sha3_init(ctx, MDSIZE); } -void hash_extend(hash_ctx* hash_ctx, const void* ptr, size_t len) +void hash_extend(hash_ctx* ctx, const void* ptr, size_t len) { - sha3_update(hash_ctx, ptr, len); + sha3_update(ctx, ptr, len); } -void hash_extend_page(hash_ctx* hash_ctx, const void* ptr) +void hash_extend_page(hash_ctx* ctx, const void* ptr) { - sha3_update(hash_ctx, ptr, RISCV_PGSIZE); + sha3_update(ctx, ptr, RISCV_PGSIZE); } -void hash_finalize(void* md, hash_ctx* hash_ctx) +void hash_finalize(void* md, hash_ctx* ctx) { - sha3_final(md, hash_ctx); + sha3_final(md, ctx); } void sign(void* sign, const void* data, size_t len, const unsigned char* public_key, const unsigned char* private_key) diff --git a/sm/src/ed25519/fixedint.h b/sm/src/ed25519/fixedint.h index 2a5178ef6..f8b4240bb 100644 --- a/sm/src/ed25519/fixedint.h +++ b/sm/src/ed25519/fixedint.h @@ -3,7 +3,19 @@ Not a compatible replacement for , do not blindly use it as such. */ -#include + +typedef int int32_t; +typedef unsigned int uint32_t; + +#if __riscv_xlen == 64 +typedef long int64_t; +typedef unsigned long uint64_t; +#elif __riscv_xlen == 32 +typedef long long int64_t; +typedef unsigned long long uint64_t; +#else +#error "Unexpected __riscv_xlen" +#endif #if ((defined(__STDC__) && __STDC__ && __STDC_VERSION__ >= 199901L) || (defined(__WATCOMC__) && (defined(_STDINT_H_INCLUDED) || __WATCOMC__ >= 1250)) || (defined(__GNUC__) && (defined(_STDINT_H) || defined(_STDINT_H_) || defined(__UINT_FAST64_TYPE__)) )) && !defined(FIXEDINT_H_INCLUDED) //#include diff --git a/sm/src/enclave.c b/sm/src/enclave.c index 1ceb798a6..35e423889 100644 --- a/sm/src/enclave.c +++ b/sm/src/enclave.c @@ -14,7 +14,10 @@ #include struct enclave enclaves[ENCL_MAX]; -#define ENCLAVE_EXISTS(eid) (eid >= 0 && eid < ENCL_MAX && enclaves[eid].state >= 0) + +// Enclave IDs are unsigned ints, so we do not need to check if eid is +// greater than or equal to 0 +#define ENCLAVE_EXISTS(eid) (eid < ENCL_MAX && enclaves[eid].state >= 0) static spinlock_t encl_lock = SPIN_LOCK_INITIALIZER; @@ -139,7 +142,7 @@ static inline void context_switch_to_host(struct sbi_trap_regs *regs, * Init all metadata as needed for keeping track of enclaves * Called once by the SM on startup */ -void enclave_init_metadata(){ +void enclave_init_metadata(void){ enclave_id eid; int i=0; diff --git a/sm/src/enclave.h b/sm/src/enclave.h index 07564a6a6..2cb900448 100644 --- a/sm/src/enclave.h +++ b/sm/src/enclave.h @@ -119,10 +119,12 @@ unsigned long attest_enclave(uintptr_t report, uintptr_t data, uintptr_t size, e // attestation unsigned long validate_and_hash_enclave(struct enclave* enclave); // TODO: These functions are supposed to be internal functions. -void enclave_init_metadata(); +void enclave_init_metadata(void); unsigned long copy_enclave_create_args(uintptr_t src, struct keystone_sbi_create_t* dest); int get_enclave_region_index(enclave_id eid, enum enclave_region_type type); uintptr_t get_enclave_region_base(enclave_id eid, int memid); uintptr_t get_enclave_region_size(enclave_id eid, int memid); unsigned long get_sealing_key(uintptr_t seal_key, uintptr_t key_ident, size_t key_ident_size, enclave_id eid); +// interrupt handlers +void sbi_trap_handler_keystone_enclave(struct sbi_trap_regs *regs); #endif diff --git a/sm/src/platform-hook.h b/sm/src/platform-hook.h index c69135200..0f0de4335 100644 --- a/sm/src/platform-hook.h +++ b/sm/src/platform-hook.h @@ -11,9 +11,9 @@ void platform_init_enclave(struct enclave* enclave); /* This fires once GLOBALLY before any other platform init */ -unsigned long platform_init_global_once(); +unsigned long platform_init_global_once(void); /* Fires once per-hart after global_once */ -unsigned long platform_init_global(); +unsigned long platform_init_global(void); /* This fires once each time an enclave is created by the sm */ unsigned long platform_create_enclave(struct enclave* enclave); @@ -35,6 +35,6 @@ void platform_switch_from_enclave(struct enclave* enclave); /* This is a required feature, it must return 64bits of random data on demand and never fail. If it would fail it may power off instead. */ -uint64_t platform_random(); +uint64_t platform_random(void); #endif /* _PLATFORM_HOOK_H_ */ diff --git a/sm/src/platform/mpfs/platform.c b/sm/src/platform/mpfs/platform.c index f8781efd0..4b260d0cc 100644 --- a/sm/src/platform/mpfs/platform.c +++ b/sm/src/platform/mpfs/platform.c @@ -3,7 +3,7 @@ #include "../../enclave.h" #include "../../../plat/mpfs/drivers/mss_sys_services/mss_sys_services.h" #include -#include +#include unsigned long platform_init_global_once(void){ return SBI_ERR_SM_ENCLAVE_SUCCESS; diff --git a/sm/src/plugins/multimem.c b/sm/src/plugins/multimem.c index 0c0d6d33b..c253b4622 100644 --- a/sm/src/plugins/multimem.c +++ b/sm/src/plugins/multimem.c @@ -3,7 +3,7 @@ #include #include "mprv.h" -uintptr_t multimem_get_other_region_size(enclave_id eid, size_t *size_out) +static uintptr_t multimem_get_other_region_size(enclave_id eid, size_t *size_out) { int mem_id = get_enclave_region_index(eid, REGION_OTHER); if (mem_id == -1) @@ -12,7 +12,7 @@ uintptr_t multimem_get_other_region_size(enclave_id eid, size_t *size_out) return copy_word_from_sm((uintptr_t)size_out, &out); } -uintptr_t multimem_get_other_region_addr(enclave_id eid, size_t *size_out) +static uintptr_t multimem_get_other_region_addr(enclave_id eid, size_t *size_out) { int mem_id = get_enclave_region_index(eid, REGION_OTHER); if (mem_id == -1) diff --git a/sm/src/pmp.c b/sm/src/pmp.c index 9eb284888..edc4a27ea 100644 --- a/sm/src/pmp.c +++ b/sm/src/pmp.c @@ -2,7 +2,7 @@ // Copyright (c) 2018, The Regents of the University of California (Regents). // All Rights Reserved. See LICENSE for license details. //------------------------------------------------------------------------------ -#include "assert.h" +#include "sm_assert.h" #include "pmp.h" #include "cpu.h" #include "safe_math_util.h" @@ -131,17 +131,17 @@ static int search_rightmost_unset(uint32_t bitmap, int max, uint32_t mask) return -1; } -static region_id get_free_region_idx() +static region_id get_free_region_idx(void) { return search_rightmost_unset(region_def_bitmap, PMP_MAX_N_REGION, 0x1); } -static pmpreg_id get_free_reg_idx() +static pmpreg_id get_free_reg_idx(void) { return search_rightmost_unset(reg_bitmap, PMP_N_REG, 0x1); } -static pmpreg_id get_conseq_free_reg_idx() +static pmpreg_id get_conseq_free_reg_idx(void) { return search_rightmost_unset(reg_bitmap, PMP_N_REG, 0x3); } @@ -221,7 +221,7 @@ int pmp_set_global(int region_idx, uint8_t perm) return SBI_ERR_SM_PMP_SUCCESS; } -void pmp_init() +void pmp_init(void) { uintptr_t pmpaddr = 0; uintptr_t pmpcfg = 0; diff --git a/sm/src/pmp.h b/sm/src/pmp.h index d5980f107..b77caf737 100644 --- a/sm/src/pmp.h +++ b/sm/src/pmp.h @@ -86,7 +86,7 @@ typedef int pmpreg_id; typedef int region_id; /* external functions */ -void pmp_init(); +void pmp_init(void); int pmp_region_init_atomic(uintptr_t start, uint64_t size, enum pmp_priority pri, region_id* rid, int allow_overlap); int pmp_region_init(uintptr_t start, uint64_t size, enum pmp_priority pri, region_id* rid, int allow_overlap); int pmp_region_free_atomic(region_id region); @@ -95,7 +95,7 @@ int pmp_set_global(region_id n, uint8_t perm); int pmp_unset(region_id n); int pmp_unset_global(region_id n); int pmp_detect_region_overlap_atomic(uintptr_t base, uintptr_t size); -void handle_pmp_ipi(); +void handle_pmp_ipi(void); uintptr_t pmp_region_get_addr(region_id i); uint64_t pmp_region_get_size(region_id i); diff --git a/sm/src/sm-sbi.c b/sm/src/sm-sbi.c index aacc53155..461643359 100644 --- a/sm/src/sm-sbi.c +++ b/sm/src/sm-sbi.c @@ -86,7 +86,7 @@ unsigned long sbi_sm_get_sealing_key(uintptr_t sealing_key, uintptr_t key_ident, return ret; } -unsigned long sbi_sm_random() +unsigned long sbi_sm_random(void) { return (unsigned long) platform_random(); } diff --git a/sm/src/sm-sbi.h b/sm/src/sm-sbi.h index c8c1b02eb..13aa55112 100644 --- a/sm/src/sm-sbi.h +++ b/sm/src/sm-sbi.h @@ -33,7 +33,7 @@ unsigned long sbi_sm_get_sealing_key(uintptr_t seal_key, uintptr_t key_ident, size_t key_ident_size); unsigned long -sbi_sm_random(); +sbi_sm_random(void); unsigned long sbi_sm_call_plugin(uintptr_t plugin_id, uintptr_t call_id, uintptr_t arg0, uintptr_t arg1); diff --git a/sm/src/sm.c b/sm/src/sm.c index 778015cf2..d3828fe52 100644 --- a/sm/src/sm.c +++ b/sm/src/sm.c @@ -44,7 +44,7 @@ int osm_pmp_set(uint8_t perm) return pmp_set_keystone(os_region_id, perm); } -int smm_init() +static int smm_init(void) { int region = -1; int ret = pmp_region_init_atomic(SMM_BASE, SMM_SIZE, PMP_PRI_TOP, ®ion, 0); @@ -54,7 +54,7 @@ int smm_init() return region; } -int osm_init() +static int osm_init(void) { int region = -1; int ret = pmp_region_init_atomic(0, -1UL, PMP_PRI_BOTTOM, ®ion, 1); @@ -87,7 +87,7 @@ int sm_derive_sealing_key(unsigned char *key, const unsigned char *key_ident, info, MDSIZE + key_ident_size, key, SEALING_KEY_SIZE); } -void sm_copy_key() +static void sm_copy_key(void) { sbi_memcpy(sm_hash, sanctum_sm_hash, MDSIZE); sbi_memcpy(sm_signature, sanctum_sm_signature, SIGNATURE_SIZE); @@ -96,7 +96,7 @@ void sm_copy_key() sbi_memcpy(dev_public_key, sanctum_dev_public_key, PUBLIC_KEY_SIZE); } -void sm_print_hash() +static void sm_print_hash(void) { for (int i=0; i #include "thread.h" -void switch_vector_enclave(){ - extern void trap_vector_enclave(); +void switch_vector_enclave(void){ csr_write(mtvec, &trap_vector_enclave); } -void switch_vector_host(){ - extern void _trap_handler(); +void switch_vector_host(void){ csr_write(mtvec, &_trap_handler); } diff --git a/sm/src/thread.h b/sm/src/thread.h index ba6ea5a6d..9c627139b 100644 --- a/sm/src/thread.h +++ b/sm/src/thread.h @@ -81,10 +81,10 @@ void swap_prev_mepc(struct thread_state* state, struct sbi_trap_regs* regs, uint void swap_prev_mstatus(struct thread_state* state, struct sbi_trap_regs* regs, uintptr_t mstatus); void swap_prev_smode_csrs(struct thread_state* thread); -void switch_vector_enclave(); -void switch_vector_host(); -extern void trap_vector_enclave(); -extern void trap_vector(); +void switch_vector_enclave(void); +void switch_vector_host(void); +extern void trap_vector_enclave(void); +extern void _trap_handler(void); /* Clean state generation */ void clean_state(struct thread_state* state); From bd876fed382ac4d701acfed1ca1940fdbacfece6 Mon Sep 17 00:00:00 2001 From: Gregor Haas Date: Fri, 30 Jun 2023 11:54:39 -0700 Subject: [PATCH 03/14] Refactor MPFS build of SM --- .../keystone/boot/hss/0001-integrate-sm.patch | 161 + .../boot/hss/0002-use-hss-crypto.patch | 89 + .../boot/hss/0003-handle-ancillary-data.patch | 43 + overlays/keystone/boot/hss/Config.in | 2 + overlays/keystone/boot/hss/hss.mk | 28 + overlays/keystone/boot/keystone-sm/Config.in | 1 - .../keystone/boot/keystone-sm/keystone-sm.mk | 26 +- .../configs/riscv32_generic_defconfig | 1 + .../configs/riscv64_generic_defconfig | 1 + .../riscv64_hifive_unmatched_defconfig | 1 + sm/.gitignore | 4 +- sm/plat/mpfs/clocks/hw_mss_clks.h | 73 - sm/plat/mpfs/config.h | 14 - sm/plat/mpfs/config.mk | 40 - sm/plat/mpfs/crypto.h | 32 + sm/plat/mpfs/crypto_interpose.c | 40 + sm/plat/mpfs/csr_helper.c | 38 - sm/plat/mpfs/csr_helper.h | 69 - .../mss_sys_services/mss_sys_services.c | 2119 ----------- .../mss_sys_services/mss_sys_services.h | 3206 ----------------- .../mss_sys_services/mss_sys_services_regs.h | 56 - sm/plat/mpfs/drivers/mss_uart/mss_uart.c | 1084 ------ sm/plat/mpfs/drivers/mss_uart/mss_uart.h | 2342 ------------ sm/plat/mpfs/drivers/mss_uart/mss_uart_regs.h | 133 - sm/plat/mpfs/encoding.h | 1532 -------- sm/plat/mpfs/hss_clock.c | 57 - sm/plat/mpfs/hss_clock.h | 68 - sm/plat/mpfs/mpfs_reg_map.h | 228 -- sm/plat/mpfs/objects.mk | 46 +- sm/plat/mpfs/platform.c | 254 -- sm/plat/mpfs/uart_helper.c | 203 -- sm/plat/mpfs/uart_helper.h | 44 - sm/src/attest.c | 2 +- sm/src/enclave.h | 2 +- sm/src/objects.mk | 6 +- sm/src/platform/generic/platform.c | 25 + sm/src/platform/generic/platform.h | 4 + sm/src/platform/mpfs/platform.c | 20 +- sm/src/platform/mpfs/platform.h | 3 + sm/src/sm.c | 18 +- 40 files changed, 492 insertions(+), 11623 deletions(-) create mode 100644 overlays/keystone/boot/hss/0001-integrate-sm.patch create mode 100644 overlays/keystone/boot/hss/0002-use-hss-crypto.patch create mode 100644 overlays/keystone/boot/hss/0003-handle-ancillary-data.patch create mode 100644 overlays/keystone/boot/hss/Config.in create mode 100644 overlays/keystone/boot/hss/hss.mk delete mode 100644 sm/plat/mpfs/clocks/hw_mss_clks.h delete mode 100644 sm/plat/mpfs/config.h delete mode 100644 sm/plat/mpfs/config.mk create mode 100644 sm/plat/mpfs/crypto.h create mode 100644 sm/plat/mpfs/crypto_interpose.c delete mode 100644 sm/plat/mpfs/csr_helper.c delete mode 100644 sm/plat/mpfs/csr_helper.h delete mode 100644 sm/plat/mpfs/drivers/mss_sys_services/mss_sys_services.c delete mode 100644 sm/plat/mpfs/drivers/mss_sys_services/mss_sys_services.h delete mode 100644 sm/plat/mpfs/drivers/mss_sys_services/mss_sys_services_regs.h delete mode 100644 sm/plat/mpfs/drivers/mss_uart/mss_uart.c delete mode 100644 sm/plat/mpfs/drivers/mss_uart/mss_uart.h delete mode 100644 sm/plat/mpfs/drivers/mss_uart/mss_uart_regs.h delete mode 100644 sm/plat/mpfs/encoding.h delete mode 100644 sm/plat/mpfs/hss_clock.c delete mode 100644 sm/plat/mpfs/hss_clock.h delete mode 100644 sm/plat/mpfs/mpfs_reg_map.h delete mode 100644 sm/plat/mpfs/platform.c delete mode 100644 sm/plat/mpfs/uart_helper.c delete mode 100644 sm/plat/mpfs/uart_helper.h diff --git a/overlays/keystone/boot/hss/0001-integrate-sm.patch b/overlays/keystone/boot/hss/0001-integrate-sm.patch new file mode 100644 index 000000000..4a889a611 --- /dev/null +++ b/overlays/keystone/boot/hss/0001-integrate-sm.patch @@ -0,0 +1,161 @@ +diff --git a/application/crt.S b/application/crt.S +index 1475373..80f8c58 100644 +--- a/application/crt.S ++++ b/application/crt.S +@@ -158,6 +158,7 @@ _start_hang: + .section .entry, "ax", %progbits + .align 3 + .globl _trap_handler ++ .globl _trap_exit + _trap_handler: + // Swap TP and MSCRATCH + csrrw tp, CSR_MSCRATCH, tp +@@ -305,6 +306,52 @@ _trap_handler_all_mode: + + mret + ++_trap_exit: ++ /* Restore all general regisers except A0 and T0 */ ++ REG_L ra, SBI_TRAP_REGS_OFFSET(ra)(a0) ++ REG_L sp, SBI_TRAP_REGS_OFFSET(sp)(a0) ++ REG_L gp, SBI_TRAP_REGS_OFFSET(gp)(a0) ++ REG_L tp, SBI_TRAP_REGS_OFFSET(tp)(a0) ++ REG_L t1, SBI_TRAP_REGS_OFFSET(t1)(a0) ++ REG_L t2, SBI_TRAP_REGS_OFFSET(t2)(a0) ++ REG_L s0, SBI_TRAP_REGS_OFFSET(s0)(a0) ++ REG_L s1, SBI_TRAP_REGS_OFFSET(s1)(a0) ++ REG_L a1, SBI_TRAP_REGS_OFFSET(a1)(a0) ++ REG_L a2, SBI_TRAP_REGS_OFFSET(a2)(a0) ++ REG_L a3, SBI_TRAP_REGS_OFFSET(a3)(a0) ++ REG_L a4, SBI_TRAP_REGS_OFFSET(a4)(a0) ++ REG_L a5, SBI_TRAP_REGS_OFFSET(a5)(a0) ++ REG_L a6, SBI_TRAP_REGS_OFFSET(a6)(a0) ++ REG_L a7, SBI_TRAP_REGS_OFFSET(a7)(a0) ++ REG_L s2, SBI_TRAP_REGS_OFFSET(s2)(a0) ++ REG_L s3, SBI_TRAP_REGS_OFFSET(s3)(a0) ++ REG_L s4, SBI_TRAP_REGS_OFFSET(s4)(a0) ++ REG_L s5, SBI_TRAP_REGS_OFFSET(s5)(a0) ++ REG_L s6, SBI_TRAP_REGS_OFFSET(s6)(a0) ++ REG_L s7, SBI_TRAP_REGS_OFFSET(s7)(a0) ++ REG_L s8, SBI_TRAP_REGS_OFFSET(s8)(a0) ++ REG_L s9, SBI_TRAP_REGS_OFFSET(s9)(a0) ++ REG_L s10, SBI_TRAP_REGS_OFFSET(s10)(a0) ++ REG_L s11, SBI_TRAP_REGS_OFFSET(s11)(a0) ++ REG_L t3, SBI_TRAP_REGS_OFFSET(t3)(a0) ++ REG_L t4, SBI_TRAP_REGS_OFFSET(t4)(a0) ++ REG_L t5, SBI_TRAP_REGS_OFFSET(t5)(a0) ++ REG_L t6, SBI_TRAP_REGS_OFFSET(t6)(a0) ++ ++ /* Restore MEPC and MSTATUS CSRs */ ++ REG_L t0, SBI_TRAP_REGS_OFFSET(mepc)(a0) ++ csrw CSR_MEPC, t0 ++ REG_L t0, SBI_TRAP_REGS_OFFSET(mstatus)(a0) ++ csrw CSR_MSTATUS, t0 ++ ++ /* Restore T0 */ ++ REG_L t0, SBI_TRAP_REGS_OFFSET(t0)(a0) ++ ++ /* Restore A0 */ ++ REG_L a0, SBI_TRAP_REGS_OFFSET(a0)(a0) ++ ++ mret ++ + .section .entry, "ax", %progbits + .align 3 + .globl _reset_regs +diff --git a/boards/mpfs-icicle-kit-es/mpfs_hal_config/mss_sw_config.h b/boards/mpfs-icicle-kit-es/mpfs_hal_config/mss_sw_config.h +index 112b401..94f7aee 100644 +--- a/boards/mpfs-icicle-kit-es/mpfs_hal_config/mss_sw_config.h ++++ b/boards/mpfs-icicle-kit-es/mpfs_hal_config/mss_sw_config.h +@@ -221,5 +221,15 @@ + # endif + #endif + ++#define LIBERO_SETTING_HART1_CSR_PMPCFG0 0 ++#define LIBERO_SETTING_HART2_CSR_PMPCFG0 0 ++#define LIBERO_SETTING_HART3_CSR_PMPCFG0 0 ++#define LIBERO_SETTING_HART4_CSR_PMPCFG0 0 ++ ++#define LIBERO_SETTING_HART1_CSR_PMPADDR0 0 ++#define LIBERO_SETTING_HART2_CSR_PMPADDR0 0 ++#define LIBERO_SETTING_HART3_CSR_PMPADDR0 0 ++#define LIBERO_SETTING_HART4_CSR_PMPADDR0 0 ++ + #endif /* USER_CONFIG_MSS_USER_CONFIG_H_ */ + +diff --git a/services/opensbi/Makefile b/services/opensbi/Makefile +index 829c28a..acf19fd 100644 +--- a/services/opensbi/Makefile ++++ b/services/opensbi/Makefile +@@ -92,6 +92,27 @@ services/opensbi/opensbi_ecall_exts.c: $(OPENSBI_SRC_DIR)/lib/sbi/sbi_ecall_exts + echo " CARRAY $<" + $(OPENSBI_SRC_DIR)/scripts/carray.sh -i $< -l "$(carray-sbi_ecall_exts-y)" > $@ + ++ifneq ($(KEYSTONE_SM),) ++ ++# Get the list of SM source files ++include $(KEYSTONE_SM)/plat/mpfs/objects.mk ++ ++keystone-sm-src-paths = $(subst .o,.c,$(platform-objs-y)) ++keystone-sm-cflags = $(CFLAGS_GCCEXT) $(platform-genflags-y) ++platform-cflags = $(keystone-sm-cflags) ++ ++# Add them to source list ++SRCS-$(CONFIG_SERVICE_OPENSBI) += $(keystone-sm-src-paths) ++ ++# Generate correct CFLAGS ++$(foreach f,$(platform-objs-y),$(eval $(f): CFLAGS=$(keystone-sm-cflags))) ++ ++else ++ ++platform-cflags = $(CFLAGS_GCCEXT) ++ ++endif ++ + ifdef CONFIG_USE_IHC + SRCS-$(CONFIG_SERVICE_OPENSBI_IHC) += \ + services/opensbi/opensbi_ihc_ecall.c \ +@@ -128,7 +149,7 @@ endif + + services/opensbi/opensbi_service.o: CFLAGS=$(CFLAGS_GCCEXT) + services/opensbi/opensbi_ihc_ecall.o: CFLAGS=$(CFLAGS_GCCEXT) +-services/opensbi/platform.o: CFLAGS=$(CFLAGS_GCCEXT) ++services/opensbi/platform.o: CFLAGS=$(platform-cflags) + $(OPENSBI_SRC_DIR)/lib/utils/irqchip/plic.o: CFLAGS=$(CFLAGS_GCCEXT) + $(OPENSBI_SRC_DIR)/lib/utils/libfdt/fdt_rw.o: CFLAGS=$(CFLAGS_GCCEXT) + $(OPENSBI_SRC_DIR)/lib/utils/libfdt/fdt_ro.o: CFLAGS=$(CFLAGS_GCCEXT) +diff --git a/services/opensbi/opensbi_service.c b/services/opensbi/opensbi_service.c +index f8bb9f0..e72dba5 100644 +--- a/services/opensbi/opensbi_service.c ++++ b/services/opensbi/opensbi_service.c +@@ -84,6 +84,8 @@ static void opensbi_scratch_setup(enum HSSHartId hartid) + pScratches[hartid].scratch.fw_start = (unsigned long)&_hss_start; + pScratches[hartid].scratch.fw_size = (unsigned long)&_hss_end - (unsigned long)&_hss_start; + ++ extern void _trap_exit(const struct sbi_trap_regs *regs); ++ pScratches[hartid].scratch.trap_exit = (unsigned long) &_trap_exit; + sbi_hsm_set_device(&mpfs_hsm); + } + +diff --git a/services/opensbi/platform.c b/services/opensbi/platform.c +index c31fe12..33ca22d 100644 +--- a/services/opensbi/platform.c ++++ b/services/opensbi/platform.c +@@ -69,6 +69,8 @@ + #include "reboot_service.h" + #include "clocks/hw_mss_clks.h" // LIBERO_SETTING_MSS_RTC_TOGGLE_CLK + ++#include "sm.h" ++ + #define MPFS_HART_COUNT 5 + #define MPFS_HART_STACK_SIZE 8192 + +@@ -197,6 +199,8 @@ static int mpfs_early_init(bool cold_boot) + + static int mpfs_final_init(bool cold_boot) + { ++ sm_init(cold_boot); ++ + if (!cold_boot) { + return 0; + } diff --git a/overlays/keystone/boot/hss/0002-use-hss-crypto.patch b/overlays/keystone/boot/hss/0002-use-hss-crypto.patch new file mode 100644 index 000000000..bfb1232ed --- /dev/null +++ b/overlays/keystone/boot/hss/0002-use-hss-crypto.patch @@ -0,0 +1,89 @@ +diff --git a/boards/mpfs-icicle-kit-es/def_config b/boards/mpfs-icicle-kit-es/def_config +index 6854540..2ceecd9 100644 +--- a/boards/mpfs-icicle-kit-es/def_config ++++ b/boards/mpfs-icicle-kit-es/def_config +@@ -186,6 +186,13 @@ CONFIG_COMPRESSION_MINIZ=y + # Crypto + # + # CONFIG_CRYPTO_SIGNING is not set ++ ++# ++# Signing Configuration ++# ++CONFIG_CRYPTO_LIBECC=y ++# CONFIG_CRYPTO_USER_CRYPTO is not set ++# end of Signing Configuration + # end of Crypto + + # +diff --git a/modules/crypto/Kconfig b/modules/crypto/Kconfig +index 7431bfb..d46ca13 100644 +--- a/modules/crypto/Kconfig ++++ b/modules/crypto/Kconfig +@@ -10,7 +10,6 @@ config CRYPTO_SIGNING + If you don't know what to do here, say Y. + + menu "Signing Configuration" +- visible if CRYPTO_SIGNING + + config CRYPTO_SIGNING_KEY_PUBLIC + depends on CRYPTO_SIGNING +@@ -23,14 +22,12 @@ choice + + config CRYPTO_LIBECC + bool "libecc (SHA2 and ECDSA P-384)" +- depends on CRYPTO_SIGNING + help + This feature enables support for the libecc library for SHA2 hashing + and ECDSA P-384 code signing. + + config CRYPTO_USER_CRYPTO + bool "User Crypto (SHA2 and ECDSA P-384)" +- depends on CRYPTO_SIGNING + help + This feature enables support for the UserCrypto core for SHA384 hashing + and ECDSA P-384 code signing. +diff --git a/modules/crypto/Makefile b/modules/crypto/Makefile +index d000d99..5cdb258 100644 +--- a/modules/crypto/Makefile ++++ b/modules/crypto/Makefile +@@ -37,15 +37,22 @@ PUBLIC_KEY=$(subst $\",,$(CONFIG_CRYPTO_SIGNING_KEY_PUBLIC)) + ifeq ("$(wildcard $(PUBLIC_KEY))", "") + $(error "Public key file $(PUBLIC_KEY) specified by CONFIG_CRYPTO_SIGNING_KEY_PUBLIC does not exist") + endif ++ ++SRSC-$(CONFIG_CRYPTO_LIBECC) += modules/crypto/hss_crypto_libecc.c ++ + x509-ec-sepc384r1-public.h: $(PUBLIC_KEY) + tools/secure-boot/der_to_c_header.py $(PUBLIC_KEY) x509-ec-secp384r1-public.h ++ ++modules/crypto/hss_crypto_libecc.o: x509-ec-sepc384r1-public.h ++ ++endif ++ + # + # libecc + # + + ifdef CONFIG_CRYPTO_LIBECC + SRCS-$(CONFIG_CRYPTO_LIBECC) += \ +- modules/crypto/hss_crypto_libecc.c \ + modules/crypto/random.c \ + thirdparty/libecc/src/curves/aff_pt.c \ + thirdparty/libecc/src/curves/aff_pt_edwards.c \ +@@ -112,7 +119,6 @@ INCLUDES +=\ + + LIBECC_OVERRIDE_FLAGS=-DWITH_LIBECC_CONFIG_OVERRIDE -DWITH_CURVE_SECP384R1 -DWITH_HASH_SHA384 -DWITH_HASH_SHA512 -DWITH_HASH_SHA512_256 -DWITH_SIG_ECDSA -mabi=$(PLATFORM_RISCV_ABI) -march=$(PLATFORM_RISCV_ISA) -ffunction-sections -fdata-sections + +-modules/crypto/hss_crypto_libecc.o: x509-ec-sepc384r1-public.h + modules/crypto/hss_crypto_libecc.o: CFLAGS=$(LIBECC_OVERRIDE_FLAGS) $(CFLAGS_GCCEXT) + thirdparty/libecc/src/external_deps/rand.o: CFLAGS=$(LIBECC_OVERRIDE_FLAGS) $(CFLAGS_GCCEXT) + +@@ -184,7 +190,5 @@ ifdef CONFIG_CRYPTO_USER_CRYPTO + SRCS-$(CONFIG_CRYPTO_USER_CRYPTO) += \ + modules/crypto/hss_crypto_cal.c + +-modules/crypto/hss_crypto_cal.o: x509-ec-sepc384r1-public.h + modules/crypto/hss_crypto_cal.o: CFLAGS=$(CFLAGS_GCCEXT) + endif +-endif diff --git a/overlays/keystone/boot/hss/0003-handle-ancillary-data.patch b/overlays/keystone/boot/hss/0003-handle-ancillary-data.patch new file mode 100644 index 000000000..493ddd7e3 --- /dev/null +++ b/overlays/keystone/boot/hss/0003-handle-ancillary-data.patch @@ -0,0 +1,43 @@ +commit aee43b8f77d86502fe0624b3941e9b843670e917 +Author: Gregor Haas +Date: Mon Jul 10 15:34:35 2023 -0700 + + Re-register harts after downloading image to correctly pass ancillary data + + Signed-off-by: Gregor Haas + +diff --git a/services/boot/hss_boot_service.c b/services/boot/hss_boot_service.c +index d187382..f23371d 100644 +--- a/services/boot/hss_boot_service.c ++++ b/services/boot/hss_boot_service.c +@@ -351,7 +351,7 @@ static void boot_init_handler(struct StateMachine * const pMyMachine) + + ///////////////// + +-static void boot_setup_pmp_onEntry(struct StateMachine * const pMyMachine) ++static void register_harts(struct StateMachine * const pMyMachine) + { + struct HSS_Boot_LocalData * const pInstanceData = pMyMachine->pInstanceData; + enum HSSHartId const target = pInstanceData->target; +@@ -396,6 +396,12 @@ static void boot_setup_pmp_onEntry(struct StateMachine * const pMyMachine) + } + } + ++static void boot_setup_pmp_onEntry(struct StateMachine * const pMyMachine) ++{ ++ /* Initially register harts, so that IPIs work for remainder of boot */ ++ register_harts(pMyMachine); ++} ++ + static void boot_setup_pmp_handler(struct StateMachine * const pMyMachine) + { + struct HSS_Boot_LocalData * const pInstanceData = pMyMachine->pInstanceData; +@@ -602,6 +608,8 @@ static void boot_download_chunks_handler(struct StateMachine * const pMyMachine) + + static void boot_download_chunks_onExit(struct StateMachine * const pMyMachine) + { ++ /* Re-register harts now that we've fully parsed the boot image (ancillary data etc) */ ++ register_harts(pMyMachine); + } + + ///////////////// diff --git a/overlays/keystone/boot/hss/Config.in b/overlays/keystone/boot/hss/Config.in new file mode 100644 index 000000000..5a61a3058 --- /dev/null +++ b/overlays/keystone/boot/hss/Config.in @@ -0,0 +1,2 @@ +config BR2_TARGET_HSS + bool "Microchip HSS" diff --git a/overlays/keystone/boot/hss/hss.mk b/overlays/keystone/boot/hss/hss.mk new file mode 100644 index 000000000..cc78d7e73 --- /dev/null +++ b/overlays/keystone/boot/hss/hss.mk @@ -0,0 +1,28 @@ +################################################################################ +# +# HSS +# +################################################################################ + +HSS_VERSION = v2023.06 +HSS_SITE = $(call github,polarfire-soc,hart-software-services,$(HSS_VERSION)) +HSS_DEPENDENCIES += keystone-sm + +HSS_MAKE_OPTS += BOARD=mpfs-icicle-kit-es CROSS_COMPILE=riscv64-buildroot-linux-gnu- \ + PLATFORM_CFLAGS="-fno-pic" PATH=$(BR_PATH) KEYSTONE_SM=$(KEYSTONE_SM_BUILDDIR) + +define HSS_CONFIGURE_CMDS + cp $(@D)/boards/mpfs-icicle-kit-es/def_config $(@D)/.config + ln -sf $(STAGING_DIR)/usr/include/gnu/stubs-{lp64d.h,lp64.h} +endef + +define HSS_BUILD_CMDS + $(MAKE) $(HSS_MAKE_OPTS) -C $(@D) +endef + +define HSS_INSTALL_TARGET_CMDS + $(INSTALL) -m 0644 -D $(@D)/Default/hss-envm-wrapper.bin $(BINARIES_DIR)/hss-envm-wrapper.bin + $(INSTALL) -m 0644 -D $(@D)/Default/hss-l2scratch.bin $(BINARIES_DIR)/hss-l2scratch.bin +endef + +$(eval $(generic-package)) diff --git a/overlays/keystone/boot/keystone-sm/Config.in b/overlays/keystone/boot/keystone-sm/Config.in index 3e6efd222..2ce1d4776 100644 --- a/overlays/keystone/boot/keystone-sm/Config.in +++ b/overlays/keystone/boot/keystone-sm/Config.in @@ -1,6 +1,5 @@ config BR2_TARGET_KEYSTONE_SM bool "Keystone security monitor" - select BR2_TARGET_OPENSBI depends on BR2_PACKAGE_HOST_KEYSTONE_SDK help Keystone security monitor augmentations diff --git a/overlays/keystone/boot/keystone-sm/keystone-sm.mk b/overlays/keystone/boot/keystone-sm/keystone-sm.mk index 2aa5e6d83..786f7c879 100644 --- a/overlays/keystone/boot/keystone-sm/keystone-sm.mk +++ b/overlays/keystone/boot/keystone-sm/keystone-sm.mk @@ -10,12 +10,16 @@ else include $(KEYSTONE)/mkutils/pkg-keystone.mk endif -# Make OpenSBI depend on this build, which depends on the SDK since it contains -# the shared headers which specify the communication protocol between the host -# <> kernel <> sm <> runtime <> eapp +# Make the SM depend on the SDK since it contains the shared headers which +# specifiy the communication protocol between the host <> kernel <> sm <> +# runtime <> eapp. Consumer firmwares then depend on this target, and thus +# inherit these shared headers as well +KEYSTONE_SM_DEPENDENCIES += host-keystone-sdk +$(KEYSTONE_SM_CONFIGURE): host-keystone-sdk-install -OPENSBI_DEPENDENCIES += keystone-sm host-keystone-sdk -$(OPENSBI_TARGET_CONFIGURE): keystone-sm-install host-keystone-sdk-install +ifeq ($(KEYSTONE_PLATFORM),generic) +OPENSBI_DEPENDENCIES += keystone-sm +$(OPENSBI_TARGET_CONFIGURE): keystone-sm-install # Point OpenSBI at the correct location of the SM sources OPENSBI_MAKE_ENV += PLATFORM_DIR=$(KEYSTONE_SM_BUILDDIR)/plat/ @@ -25,6 +29,18 @@ OPENSBI_MAKE_ENV += PLATFORM_RISCV_TOOLCHAIN_DEFAULT=1 # Make keystone-sm dircleans also trigger opensbi-dirclean keystone-sm-dirclean: opensbi-dirclean +endif + +ifeq ($(KEYSTONE_PLATFORM),mpfs) +HSS_DEPENDENCIES += keystone-sm +$(HSS_TARGET_CONFIGURE): keystone-sm-install + +# Point HSS at the SM +HSS_MAKE_OPTS += KEYSTONE_SM=$(KEYSTONE_SM_BUILDDIR) + +# Make keystone-sm dircleans also trigger hss-dircleans +keystone-sm-dirclean: hss-dirclean +endif $(eval $(keystone-package)) $(eval $(generic-package)) diff --git a/overlays/keystone/configs/riscv32_generic_defconfig b/overlays/keystone/configs/riscv32_generic_defconfig index e862ecd49..d1a6325fb 100644 --- a/overlays/keystone/configs/riscv32_generic_defconfig +++ b/overlays/keystone/configs/riscv32_generic_defconfig @@ -18,6 +18,7 @@ BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_KEYSTONE_PATH)/configs/linux BR2_PACKAGE_BUSYBOX_SHOW_OTHERS=y BR2_PACKAGE_DROPBEAR=y BR2_TARGET_ROOTFS_EXT2=y +BR2_TARGET_OPENSBI=y BR2_TARGET_OPENSBI_CUSTOM_VERSION=y BR2_TARGET_OPENSBI_CUSTOM_VERSION_VALUE="1.1" BR2_TARGET_OPENSBI_PLAT="generic" diff --git a/overlays/keystone/configs/riscv64_generic_defconfig b/overlays/keystone/configs/riscv64_generic_defconfig index 1d348abed..4ccf9a9c3 100644 --- a/overlays/keystone/configs/riscv64_generic_defconfig +++ b/overlays/keystone/configs/riscv64_generic_defconfig @@ -18,6 +18,7 @@ BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_KEYSTONE_PATH)/configs/linux BR2_PACKAGE_BUSYBOX_SHOW_OTHERS=y BR2_PACKAGE_DROPBEAR=y BR2_TARGET_ROOTFS_EXT2=y +BR2_TARGET_OPENSBI=y BR2_TARGET_OPENSBI_CUSTOM_VERSION=y BR2_TARGET_OPENSBI_CUSTOM_VERSION_VALUE="1.1" BR2_TARGET_OPENSBI_PLAT="generic" diff --git a/overlays/keystone/configs/riscv64_hifive_unmatched_defconfig b/overlays/keystone/configs/riscv64_hifive_unmatched_defconfig index c03ecffa3..b7547e5fd 100644 --- a/overlays/keystone/configs/riscv64_hifive_unmatched_defconfig +++ b/overlays/keystone/configs/riscv64_hifive_unmatched_defconfig @@ -35,6 +35,7 @@ BR2_TARGET_ROOTFS_CPIO=y BR2_TARGET_ROOTFS_EXT2=y BR2_TARGET_ROOTFS_EXT2_4=y BR2_TARGET_ROOTFS_EXT2_SIZE="300M" +BR2_TARGET_OPENSBI=y BR2_TARGET_OPENSBI_CUSTOM_VERSION=y BR2_TARGET_OPENSBI_CUSTOM_VERSION_VALUE="1.1" BR2_TARGET_OPENSBI_PLAT="generic" diff --git a/sm/.gitignore b/sm/.gitignore index d16386367..e3f78a435 100644 --- a/sm/.gitignore +++ b/sm/.gitignore @@ -1 +1,3 @@ -build/ \ No newline at end of file +build/ +*.o +*.d diff --git a/sm/plat/mpfs/clocks/hw_mss_clks.h b/sm/plat/mpfs/clocks/hw_mss_clks.h deleted file mode 100644 index 90c2f4099..000000000 --- a/sm/plat/mpfs/clocks/hw_mss_clks.h +++ /dev/null @@ -1,73 +0,0 @@ -/******************************************************************************* - * Copyright 2019-2020 Microchip FPGA Embedded Systems Solutions. - * - * SPDX-License-Identifier: MIT - * - * @file hw_mss_clks.h - * @author Microchip-FPGA Embedded Systems Solutions - * - * Generated using Libero version: 1.0 - * Libero design name: ICICLE_MSS - * MPFS part number used in design: MPFS250T_ES - * Date generated by Libero: 11-16-2020_19:07:30 - * Format version of XML description: 0.3.8 - * PolarFire SoC Configuration Generator version: 0.4.1 - * - * Note 1: This file should not be edited. If you need to modify a parameter, - * without going through the Libero flow or editing the associated xml file, - * the following method is recommended: - * 1. edit the file platform//config//software//mpfs_hal//mss_sw_config.h - * 2. define the value you want to override there. (Note: There is a - * commented example in mss_sw_config.h) - * Note 2: The definition in mss_sw_config.h takes precedence, as - * mss_sw_config.h is included prior to the hw_mss_clks.h in the hal - * (see platform//mpfs_hal//mss_hal.h) - * - */ - -#ifndef HW_MSS_CLKS_H_ -#define HW_MSS_CLKS_H_ - - -#ifdef __cplusplus -extern "C" { -#endif - -#if !defined (LIBERO_SETTING_MSS_EXT_SGMII_REF_CLK) -/*Ref Clock rate in MHz */ -#define LIBERO_SETTING_MSS_EXT_SGMII_REF_CLK 125000000 - /* MSS_EXT_SGMII_REF_CLK [0:32] RW value= 125000000 */ -#endif -#if !defined (LIBERO_SETTING_MSS_COREPLEX_CPU_CLK) -/*CPU Clock rate in MHz */ -#define LIBERO_SETTING_MSS_COREPLEX_CPU_CLK 600000000 - /* MSS_COREPLEX_CPU_CLK [0:32] RW value= 600000000 */ -#endif -#if !defined (LIBERO_SETTING_MSS_SYSTEM_CLK) -/*System Clock rate in MHz static power. */ -#define LIBERO_SETTING_MSS_SYSTEM_CLK 600000000 - /* MSS_SYSTEM_CLK [0:32] RW value= 600000000 */ -#endif -#if !defined (LIBERO_SETTING_MSS_RTC_TOGGLE_CLK) -/*RTC toggle Clock rate in MHz static power. */ -#define LIBERO_SETTING_MSS_RTC_TOGGLE_CLK 1000000 - /* MSS_RTC_TOGGLE_CLK [0:32] RW value= 1000000 */ -#endif -#if !defined (LIBERO_SETTING_MSS_AXI_CLK) -/*AXI Clock rate in MHz static power. */ -#define LIBERO_SETTING_MSS_AXI_CLK 300000000 - /* MSS_AXI_CLK [0:32] RW value= 300000000 */ -#endif -#if !defined (LIBERO_SETTING_MSS_APB_AHB_CLK) -/*AXI Clock rate in MHz static power. */ -#define LIBERO_SETTING_MSS_APB_AHB_CLK 150000000 - /* MSS_APB_AHB_CLK [0:32] RW value= 150000000 */ -#endif - -#ifdef __cplusplus -} -#endif - - -#endif /* #ifdef HW_MSS_CLKS_H_ */ - diff --git a/sm/plat/mpfs/config.h b/sm/plat/mpfs/config.h deleted file mode 100644 index b5623a072..000000000 --- a/sm/plat/mpfs/config.h +++ /dev/null @@ -1,14 +0,0 @@ -#define CONFIG_PLATFORM_MPFS 1 -#define IS_ENABLED(x) ((x) == 1) - -#define HSS_HART_E51 0 -#define HSS_HART_U54_1 1 -#define HSS_HART_U54_2 2 -#define HSS_HART_U54_3 3 -#define HSS_HART_U54_4 4 - -#define mHSS_DEBUG_PRINTF(...) - -#define CRLF "\r\n" -#define CR "\r" -#define ARRAY_SIZE(x) (sizeof(x)/sizeof((x)[0])) diff --git a/sm/plat/mpfs/config.mk b/sm/plat/mpfs/config.mk deleted file mode 100644 index 9250907e6..000000000 --- a/sm/plat/mpfs/config.mk +++ /dev/null @@ -1,40 +0,0 @@ -# -# SPDX-License-Identifier: BSD-2-Clause -# -# Copyright (c) 2019 Western Digital Corporation or its affiliates. -# -# Authors: -# Atish Patra -# - -# Compiler flags -platform-cppflags-y = -ffunction-sections -fdata-sections -platform-cflags-y = -I../src -ffunction-sections -fdata-sections -platform-asflags-y = -platform-ldflags-y = -lc -Wl,--gc-sections - -# Command for platform specific "make run" -# platform-runcmd = qemu-system-riscv$(PLATFORM_RISCV_XLEN) -M sifive_u -m 256M \ -# -nographic -bios $(build_dir)/platform/sifive/fu540/firmware/fw_payload.elf - -# Blobs to build -FW_TEXT_START=0x80000000 -FW_DYNAMIC=y -FW_JUMP=y -ifeq ($(PLATFORM_RISCV_XLEN), 32) - # This needs to be 4MB aligned for 32-bit system - FW_JUMP_ADDR=0x80400000 -else - # This needs to be 2MB aligned for 64-bit system - FW_JUMP_ADDR=0x80200000 -endif -FW_JUMP_FDT_ADDR=0x88000000 -FW_PAYLOAD=y -ifeq ($(PLATFORM_RISCV_XLEN), 32) - # This needs to be 4MB aligned for 32-bit system - FW_PAYLOAD_OFFSET=0x400000 -else - # This needs to be 2MB aligned for 64-bit system - FW_PAYLOAD_OFFSET=0x200000 -endif -FW_PAYLOAD_FDT_ADDR=0x88000000 diff --git a/sm/plat/mpfs/crypto.h b/sm/plat/mpfs/crypto.h new file mode 100644 index 000000000..08eec9422 --- /dev/null +++ b/sm/plat/mpfs/crypto.h @@ -0,0 +1,32 @@ +#ifndef __CRYPTO_H__ +#define __CRYPTO_H__ + +// Include relevant libecc headers + +#include + +typedef sha512_context hash_ctx; +typedef unsigned char byte; + +#define MDSIZE 64 +#define SIGNATURE_SIZE 64 +#define PRIVATE_KEY_SIZE 64 // includes public key +#define PUBLIC_KEY_SIZE 32 + +extern byte sm_hash[MDSIZE]; +extern byte sm_signature[SIGNATURE_SIZE]; +extern byte sm_public_key[PUBLIC_KEY_SIZE]; +extern byte sm_private_key[PRIVATE_KEY_SIZE]; + +void hash_init(hash_ctx* hash_ctx); +void hash_extend(hash_ctx* hash_ctx, const void* ptr, size_t len); +void hash_extend_page(hash_ctx* hash_ctx, const void* ptr); +void hash_finalize(void* md, hash_ctx* hash_ctx); + +void sign(void* sign, const void* data, size_t len, const byte* public_key, const byte* private_key); +int kdf(const unsigned char* salt, size_t salt_len, + const unsigned char* ikm, size_t ikm_len, + const unsigned char* info, size_t info_len, + unsigned char* okm, size_t okm_len); + +#endif /* __CRYPTO_H__ */ diff --git a/sm/plat/mpfs/crypto_interpose.c b/sm/plat/mpfs/crypto_interpose.c new file mode 100644 index 000000000..f66f43882 --- /dev/null +++ b/sm/plat/mpfs/crypto_interpose.c @@ -0,0 +1,40 @@ + +#include +#include "page.h" + +#include + +#include + +void hash_init(hash_ctx* ctx) { +// sha512_init(ctx); +} + +void hash_extend(hash_ctx* ctx, const void* ptr, size_t len) { +// sha512_update(ctx, ptr, len); +} + +void hash_extend_page(hash_ctx* ctx, const void* ptr) { +// sha512_update(ctx, ptr, RISCV_PGSIZE); +} + +void hash_finalize(void* md, hash_ctx* ctx) { +// sha512_final(ctx, md); + + // For now, just set to 0 + sbi_memset(md, 0, MDSIZE); +} + +void sign(void* sign, const void* data, size_t len, const byte* public_key, const byte* private_key) { + // For now, just set to 0 + sbi_memset(sign, 0, SIGNATURE_SIZE); +} + +int kdf(const unsigned char* salt, size_t salt_len, + const unsigned char* ikm, size_t ikm_len, + const unsigned char* info, size_t info_len, + unsigned char* okm, size_t okm_len) { + // For now, just set to 0 + sbi_memset(okm, 0, okm_len); + return 0; +} diff --git a/sm/plat/mpfs/csr_helper.c b/sm/plat/mpfs/csr_helper.c deleted file mode 100644 index c77105d85..000000000 --- a/sm/plat/mpfs/csr_helper.c +++ /dev/null @@ -1,38 +0,0 @@ -/******************************************************************************* - * Copyright 2019 Microchip Corporation. - * - * SPDX-License-Identifier: MIT - * - * MPFS HSS Embedded Software - * - */ - -/** - * \file CSR Helper - * \brief CSR Helper - */ - -#include "config.h" -#include "csr_helper.h" -#include "mpfs_reg_map.h" - - -#include - -HSSTicks_t CSR_GetTickCount(void) -{ - HSSTicks_t tickCount; - - tickCount = mHSS_CSR_READ(mcycle); - - return tickCount; -} - -HSSTicks_t CSR_GetTime(void) -{ - HSSTicks_t time; - - time = mHSS_ReadRegU64(CLINT, MTIME); - - return time; -} diff --git a/sm/plat/mpfs/csr_helper.h b/sm/plat/mpfs/csr_helper.h deleted file mode 100644 index 25bd8ad57..000000000 --- a/sm/plat/mpfs/csr_helper.h +++ /dev/null @@ -1,69 +0,0 @@ -#ifndef HSS_CSR_HELPER_H -#define HSS_CSR_HELPER_H - -/******************************************************************************* - * Copyright 2019-2020 Microchip Corporation. - * - * SPDX-License-Identifier: MIT - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to - * deal in the Software without restriction, including without limitation the - * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * - * Hart Software Services - CSR Helper - * - */ - -/** - * \file CSR Helper - * \brief CSR Helper - */ - -#ifdef __cplusplus -extern "C" { -#endif - - -#include "config.h" -#include -typedef uint64_t HSSTicks_t; - -#if IS_ENABLED(CONFIG_OPENSBI) -# include "sbi/riscv_asm.h" -# include "sbi/sbi_bitops.h" -# include "sbi/sbi_hart.h" -# include "sbi/sbi_init.h" -# include "sbi/sbi_scratch.h" -# define mHSS_CSR_READ csr_read -# define mHSS_CSR_WRITE csr_write -#else -# include "encoding.h" -# define mHSS_CSR_READ read_csr -# define mHSS_CSR_WRITE write_csr -#endif - - -HSSTicks_t CSR_GetTickCount(void); - -HSSTicks_t CSR_GetTime(void); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/sm/plat/mpfs/drivers/mss_sys_services/mss_sys_services.c b/sm/plat/mpfs/drivers/mss_sys_services/mss_sys_services.c deleted file mode 100644 index 5f80c0f48..000000000 --- a/sm/plat/mpfs/drivers/mss_sys_services/mss_sys_services.c +++ /dev/null @@ -1,2119 +0,0 @@ -/******************************************************************************* - * Copyright 2019 Microchip Corporation. - * - * SPDX-License-Identifier: MIT - * - * PSE microcontroller subsystem System Services bare metal driver - * implementation. - * - * SVN $Revision$ - * SVN $Date$ - */ -#include "mss_sys_services.h" -#include "mss_sys_services_regs.h" -// #include "mpfs_hal/mss_hal.h" -// #include "mss_assert.h" -#include -#define ASSERT sm_assert - -#ifdef __cplusplus -extern "C" { -#endif - -/******************************************************************************* - * Null buffer constant definition - */ -#define NULL_BUFFER (( uint8_t* ) 0) - -/*-------------------------------------------------------------------------*//** - System service response offset - ============================ - The following constants are used to specify the offset in the mailbox where - the service response is written by the system controller after service - execution. -*/ -#define MSS_SYS_COMMON_RET_OFFSET 0u -#define MSS_SYS_DIGITAL_SIG_RET_OFFSET 48u -#define MSS_SYS_SECURE_NVM_READ_RET_OFFSET 16u -#define MSS_SYS_PUF_EMULATION_RET_OFFSET 20u -#define MSS_SYS_DIGEST_CHECK_RET_OFFSET 4u -#define MSS_SYS_GENERATE_OTP_RET_OFFSET 20u - -/******************************************************************************* - * Global variables declarations - */ -volatile uint8_t g_message_received = 0u; -uint8_t g_service_mode = 0u; - -uint8_t* gp_int_service_response; -uint16_t g_int_service_response_size; -uint16_t g_int_service_response_offset; - -volatile uint8_t g_message_interrupt_counter = 0u; - -/******************************************************************************* - * Callback handler function declaration - */ -mss_sys_service_handler_t mss_sys_interrupt_handler; - -/******************************************************************************* - * Local function declarations. - */ -static uint16_t execute_ss_polling_mode -( - uint8_t cmd_opcode, - uint8_t* cmd_data, - uint16_t cmd_data_size, - uint8_t* p_response, - uint16_t response_size, - uint16_t mb_offset, - uint16_t response_offset -); - -static uint16_t execute_ss_interrupt_mode -( - uint8_t cmd_opcode, - uint8_t* cmd_data, - uint16_t cmd_data_size, - uint8_t* p_response, - uint16_t response_size, - uint16_t mb_offset, - uint16_t response_offset -); - -static uint16_t request_system_service -( - uint8_t cmd_opcode, - uint8_t* cmd_data, - uint16_t cmd_data_size, - uint8_t* p_response, - uint16_t response_size, - uint16_t mb_offset, - uint16_t response_offset -); - -/*----------------------------------------------------------------------------- - Public Functions - -----------------------------------------------------------------------------*/ - -/***************************************************************************//** - * MSS_SYS_get_serial_number() - * See "mss_sysservices.h" for details of how to use this function. - */ -void -MSS_SYS_select_service_mode -( - uint8_t sys_service_mode, - mss_sys_service_handler_t mss_sys_service_interrupt_handler -) -{ - g_service_mode = sys_service_mode; - mss_sys_interrupt_handler = mss_sys_service_interrupt_handler; -} - - -/***************************************************************************//** - * MSS_SYS_get_serial_number() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_get_serial_number -( - uint8_t * p_serial_number, - uint16_t mb_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_SERIAL_NUMBER_REQUEST_CMD, - NULL_BUFFER, - MSS_SYS_WITHOUT_CMD_DATA, - p_serial_number, - (uint16_t)MSS_SYS_SERIAL_NUMBER_RESP_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_SERIAL_NUMBER_REQUEST_CMD, - NULL_BUFFER, - MSS_SYS_WITHOUT_CMD_DATA, - p_serial_number, - (uint16_t)MSS_SYS_SERIAL_NUMBER_RESP_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - - return status; -} - -/***************************************************************************//** - * SYS_get_user_code() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_get_user_code -( - uint8_t * p_user_code, - uint16_t mb_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_USERCODE_REQUEST_CMD, - NULL_BUFFER, - MSS_SYS_WITHOUT_CMD_DATA, - p_user_code, - (uint16_t)MSS_SYS_USERCODE_RESP_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_USERCODE_REQUEST_CMD, - NULL_BUFFER, - MSS_SYS_WITHOUT_CMD_DATA, - p_user_code, - (uint16_t)MSS_SYS_USERCODE_RESP_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - - return status; -} - -/***************************************************************************//** - * SYS_get_design_info() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_get_design_info -( - uint8_t * p_design_info, - uint16_t mb_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_DESIGN_INFO_REQUEST_CMD, - NULL_BUFFER, - MSS_SYS_WITHOUT_CMD_DATA, - p_design_info, - (uint16_t)MSS_SYS_DESIGN_INFO_RESP_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_DESIGN_INFO_REQUEST_CMD, - NULL_BUFFER, - MSS_SYS_WITHOUT_CMD_DATA, - p_design_info, - (uint16_t)MSS_SYS_DESIGN_INFO_RESP_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - - return status; -} - -/***************************************************************************//** - * SYS_get_device_certificate() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_get_device_certificate -( - uint8_t * p_device_certificate, - uint16_t mb_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_DEVICE_CERTIFICATE_REQUEST_CMD, - NULL_BUFFER, - MSS_SYS_WITHOUT_CMD_DATA, - p_device_certificate, - (uint16_t)MSS_SYS_DEVICE_CERTIFICATE_RESP_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_DEVICE_CERTIFICATE_REQUEST_CMD, - NULL_BUFFER, - MSS_SYS_WITHOUT_CMD_DATA, - p_device_certificate, - (uint16_t)MSS_SYS_DEVICE_CERTIFICATE_RESP_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - - return status; -} - -/***************************************************************************//** - * SYS_read_digest() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_read_digest -( - uint8_t * p_digest, - uint16_t mb_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_READ_DIGEST_REQUEST_CMD, - NULL_BUFFER, - MSS_SYS_WITHOUT_CMD_DATA, - p_digest, - (uint16_t)MSS_SYS_READ_DIGEST_RESP_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_READ_DIGEST_REQUEST_CMD, - NULL_BUFFER, - MSS_SYS_WITHOUT_CMD_DATA, - p_digest, - (uint16_t)MSS_SYS_READ_DIGEST_RESP_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - - return status; -} - -/***************************************************************************//** - * SYS_query_security() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_query_security -( - uint8_t * p_security_locks, - uint16_t mb_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - uint8_t idx=0; - uint8_t buf[36] = {0}; - - /*Actual QUERY_SECURITY_RESP_LEN is 9 but CoreSysService_PF IP needs number - of words instead of number of bytes to be written to or read from MailBox*/ - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_QUERY_SECURITY_REQUEST_CMD, - NULL_BUFFER, - MSS_SYS_WITHOUT_CMD_DATA, - buf, - (uint16_t)(MSS_SYS_QUERY_SECURITY_RESP_LEN + 3u), - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_QUERY_SECURITY_REQUEST_CMD, - NULL_BUFFER, - MSS_SYS_WITHOUT_CMD_DATA, - buf, - (uint16_t)(MSS_SYS_QUERY_SECURITY_RESP_LEN + 3u), - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - - for (idx = 0u; idx < MSS_SYS_QUERY_SECURITY_RESP_LEN; idx++) - { - *(p_security_locks + idx) = buf[idx]; - } - - return status; -} - -/***************************************************************************//** - * SYS_read_debug_info() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_read_debug_info -( - uint8_t * p_debug_info, - uint16_t mb_offset -) -{ - - uint16_t status = MSS_SYS_PARAM_ERR; - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_READ_DEBUG_INFO_REQUEST_CMD, - NULL_BUFFER, - MSS_SYS_WITHOUT_CMD_DATA, - p_debug_info, - (uint16_t)MSS_SYS_READ_DEBUG_INFO_RESP_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_READ_DEBUG_INFO_REQUEST_CMD, - NULL_BUFFER, - MSS_SYS_WITHOUT_CMD_DATA, - p_debug_info, - (uint16_t)MSS_SYS_READ_DEBUG_INFO_RESP_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - - return status; -} - -/**************************************************************************//** - * SYS_read_envm_param() - * See "mss_sysservices.h" for details of how to use this function. - */ - -uint16_t -MSS_SYS_read_envm_parameter -( - uint8_t * p_envm_param, - uint16_t mb_offset -) -{ - - uint16_t status = MSS_SYS_PARAM_ERR; - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_READ_ENVM_PARAM_REQUEST_CMD, - NULL_BUFFER, - MSS_SYS_WITHOUT_CMD_DATA, - p_envm_param, - (uint16_t)MSS_SYS_READ_ENVM_PARAM_RESP_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_READ_ENVM_PARAM_REQUEST_CMD, - NULL_BUFFER, - MSS_SYS_WITHOUT_CMD_DATA, - p_envm_param, - (uint16_t)MSS_SYS_READ_ENVM_PARAM_RESP_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - - return status; -} - -/***************************************************************************//** - * SYS_puf_emulation_service() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_puf_emulation_service -( - uint8_t * p_challenge, - uint8_t op_type, - uint8_t* p_response, - uint16_t mb_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - uint8_t mb_format[20] = {0x00}; - uint8_t index = 0u; - - /* Frame the data required for mailbox */ - mb_format[index] = op_type; - - for (index = 4u; index < 20u; index++) - { - mb_format[index] = p_challenge[index - 4u]; - } - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_PUF_EMULATION_SERVICE_REQUEST_CMD, - mb_format, - (uint16_t)MSS_SYS_PUF_EMULATION_SERVICE_CMD_LEN, - p_response, - (uint16_t)MSS_SYS_PUF_EMULATION_SERVICE_RESP_LEN, - mb_offset, - (uint16_t)MSS_SYS_PUF_EMULATION_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_PUF_EMULATION_SERVICE_REQUEST_CMD, - mb_format, - (uint16_t)MSS_SYS_PUF_EMULATION_SERVICE_CMD_LEN, - p_response, - (uint16_t)MSS_SYS_PUF_EMULATION_SERVICE_RESP_LEN, - mb_offset, - (uint16_t)MSS_SYS_PUF_EMULATION_RET_OFFSET); - } - - return status; -} - -/***************************************************************************//** - * SYS_digital_signature_service() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_digital_signature_service -( - uint8_t* p_hash, - uint8_t format, - uint8_t* p_response, - uint16_t mb_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - - if (format == MSS_SYS_DIGITAL_SIGNATURE_RAW_FORMAT_REQUEST_CMD) - { - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode - ((uint8_t)MSS_SYS_DIGITAL_SIGNATURE_RAW_FORMAT_REQUEST_CMD, - p_hash, - (uint16_t)MSS_SYS_DIGITAL_SIGNATURE_HASH_DATA_LEN, - p_response, - (uint16_t)MSS_SYS_DIGITAL_SIGNATURE_RAW_FORMAT_RESP_SIZE, - mb_offset, - (uint16_t)MSS_SYS_DIGITAL_SIG_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode - ((uint8_t)MSS_SYS_DIGITAL_SIGNATURE_RAW_FORMAT_REQUEST_CMD, - p_hash, - (uint16_t)MSS_SYS_DIGITAL_SIGNATURE_HASH_DATA_LEN, - p_response, - (uint16_t)MSS_SYS_DIGITAL_SIGNATURE_RAW_FORMAT_RESP_SIZE, - mb_offset, - (uint16_t)MSS_SYS_DIGITAL_SIG_RET_OFFSET); - } - } - - else - { - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode - ((uint8_t)MSS_SYS_DIGITAL_SIGNATURE_DER_FORMAT_REQUEST_CMD, - p_hash, - (uint16_t)MSS_SYS_DIGITAL_SIGNATURE_HASH_DATA_LEN, - p_response, - (uint16_t)MSS_SYS_DIGITAL_SIGNATURE_DER_FORMAT_RESP_SIZE, - mb_offset, - (uint16_t)MSS_SYS_DIGITAL_SIG_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode - ((uint8_t)MSS_SYS_DIGITAL_SIGNATURE_DER_FORMAT_REQUEST_CMD, - p_hash, - (uint16_t)MSS_SYS_DIGITAL_SIGNATURE_HASH_DATA_LEN, - p_response, - (uint16_t)MSS_SYS_DIGITAL_SIGNATURE_DER_FORMAT_RESP_SIZE, - mb_offset, - (uint16_t)MSS_SYS_DIGITAL_SIG_RET_OFFSET); - } - } - - return status; -} - -/***************************************************************************//** - * SYS_secure_nvm_write() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_secure_nvm_write -( - uint8_t format, - uint8_t snvm_module, - uint8_t* p_data, - uint8_t* p_user_key, - uint16_t mb_offset -) -{ - uint8_t frame[256] = {0x00}; - uint8_t* p_frame = &frame[0]; - uint16_t index = 0; - uint16_t status = MSS_SYS_PARAM_ERR; - - ASSERT(!(NULL_BUFFER == p_data)); - ASSERT(!(NULL_BUFFER == p_user_key)); - ASSERT(!(snvm_module >= 221u)); - - *p_frame = snvm_module; /*SNVMADDR - SNVM module*/ - p_frame += 4; /* Next 3 bytes RESERVED - For alignment */ - - /* Copy user key and send the command/data to mailbox. */ - if ((format == MSS_SYS_SNVM_AUTHEN_TEXT_REQUEST_CMD) || - (format == MSS_SYS_SNVM_AUTHEN_CIPHERTEXT_REQUEST_CMD)) - { - /* Copy user data */ - for (index = 0u; index < (MSS_SYS_AUTHENTICATED_TEXT_DATA_LEN - - MSS_SYS_USER_SECRET_KEY_LEN); index++) - { - *p_frame = p_data[index]; - p_frame++; - } - - /* Copy user key */ - for (index = 0u; index < MSS_SYS_USER_SECRET_KEY_LEN; index++) - { - *p_frame = p_user_key[index]; - p_frame++; - } - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - format, - &frame[0], - (uint16_t)MSS_SYS_AUTHENTICATED_TEXT_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - format, - &frame[0], - (uint16_t)MSS_SYS_AUTHENTICATED_TEXT_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - } - else - { - /* Copy user data */ - for (index = 0u; index < (MSS_SYS_NON_AUTHENTICATED_TEXT_DATA_LEN - 4u); - index++) - { - *(p_frame+index) = p_data[index]; - } - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - format, - &frame[0], - (uint16_t)MSS_SYS_NON_AUTHENTICATED_TEXT_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - format, - &frame[0], - (uint16_t)MSS_SYS_NON_AUTHENTICATED_TEXT_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - } - - return status; -} - -/***************************************************************************//** - * SYS_secure_nvm_read() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_secure_nvm_read -( - uint8_t snvm_module, - uint8_t* p_user_key, - uint8_t* p_admin, - uint8_t* p_data, - uint16_t data_len, - uint16_t mb_offset -) -{ - /* Frame the message. */ - uint8_t frame[16] = {0x00u}; - uint8_t* p_frame = &frame[0]; - uint16_t index = 0u; - uint16_t status = MSS_SYS_PARAM_ERR; - uint8_t response[256] = {0x00}; - - ASSERT(!(NULL_BUFFER == p_data)); - ASSERT(!(NULL_BUFFER == p_admin)); - ASSERT(!(snvm_module > 221u)); - - ASSERT((data_len == 236u) || (data_len == 252u)); - - *p_frame = snvm_module; /*SNVMADDR - SNVM module*/ - p_frame += 4u; /* RESERVED - For alignment */ - - /* Copy user key */ - if (236u == data_len) - { - for (index = 0u; index < 12u; index++) - { - ASSERT(p_user_key != NULL_BUFFER); - *p_frame = p_user_key[index]; - p_frame++; - } - } - else - { - p_frame += 12u; - } - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_SNVM_READ_REQUEST_CMD, - &frame[0], - (uint16_t)MSS_SYS_SECURE_NVM_READ_DATA_LEN, - response, - (data_len + 4u), - mb_offset, - (uint16_t)MSS_SYS_SECURE_NVM_READ_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_SNVM_READ_REQUEST_CMD, - &frame[0], - (uint16_t)MSS_SYS_SECURE_NVM_READ_DATA_LEN, - response, - (data_len + 4u), - mb_offset, - (uint16_t)MSS_SYS_SECURE_NVM_READ_RET_OFFSET); - } - - if (MSS_SYS_SUCCESS == status) - { - for (index = 0u; index < 4u; index++) - { - *(p_admin+index) = (uint32_t)response[index]; - } - - /* Copy data into user buffer. */ - for (index = 4u; index < (data_len + 4u); index++) - { - *(p_data + (index - 4u)) = response[index]; - } - } - else - { - ; - } - - return status; -} - -/***************************************************************************//** - * SYS_nonce_service() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_nonce_service -( - uint8_t * p_nonce, - uint16_t mb_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_NONCE_SERVICE_REQUEST_CMD, - NULL_BUFFER, - MSS_SYS_WITHOUT_CMD_DATA, - p_nonce, - (uint16_t)MSS_SYS_NONCE_SERVICE_RESP_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_NONCE_SERVICE_REQUEST_CMD, - NULL_BUFFER, - MSS_SYS_WITHOUT_CMD_DATA, - p_nonce, - (uint16_t)MSS_SYS_NONCE_SERVICE_RESP_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - - return status; -} - -/***************************************************************************//** - * MSS_SYS_execute_uic_script() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_execute_uic_script -( - uint8_t src_periph_type, - uint32_t periph_address, - uint16_t mb_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - uint8_t input_data[8]; - uint32_t l_periph_addr = periph_address; - - if (src_periph_type == MSS_SYS_UIC_SOURCE_PERIPH_SNVM) - { - l_periph_addr &= 0x000000FFu; /*only first 8 bits are valid*/ - } - else if ((src_periph_type == MSS_SYS_UIC_SOURCE_PERIPH_NONAUTHEN_SPIFLASH )|| - (src_periph_type == MSS_SYS_UIC_SOURCE_PERIPH_AUTHEN_SPIFLASH )) - { - l_periph_addr &= 0xFFFFFFFFu; /*only first 24 or 32 bits are valid*/ - } - else if (src_periph_type == MSS_SYS_UIC_SOURCE_PERIPH_UPROM) - { - l_periph_addr &= 0x000000FFu; /*only first 8 bits are valid*/ - l_periph_addr = (l_periph_addr << 14u); - } - else - { - return status; - } - - *(uint32_t*)input_data = l_periph_addr; - input_data[4] = src_periph_type; - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_UIC_EXECUTE_SCRIPT_CMD, - &input_data[0], - (uint16_t)MSS_SYS_EXECUTE_UIC_SCRIPT_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_UIC_EXECUTE_SCRIPT_CMD, - &input_data[0], - (uint16_t)MSS_SYS_EXECUTE_UIC_SCRIPT_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - - return status; -} - -/***************************************************************************//** - * MSS_SYS_authenticate_uic_bitstream() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_authenticate_uic_bitstream -( - uint32_t spi_flash_address, - uint16_t mb_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - uint32_t l_spi_flash_address = spi_flash_address; - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_UIC_BITSTREAM_AUTHENTICATE_CMD, - (uint8_t* )&l_spi_flash_address, - (uint16_t)MSS_SYS_UIC_BITSTREAM_AUTHENTICATE_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_UIC_BITSTREAM_AUTHENTICATE_CMD, - (uint8_t* )&l_spi_flash_address, - (uint16_t)MSS_SYS_UIC_BITSTREAM_AUTHENTICATE_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - - return status; -} - -/***************************************************************************//** - * MSS_SYS_authenticate_bitstream() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_authenticate_bitstream -( - uint32_t spi_flash_address, - uint16_t mb_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - uint32_t l_spi_flash_address = spi_flash_address; - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_BITSTREAM_AUTHENTICATE_CMD, - (uint8_t* )&l_spi_flash_address, - (uint16_t)MSS_SYS_BITSTREAM_AUTHENTICATE_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_BITSTREAM_AUTHENTICATE_CMD, - (uint8_t* )&l_spi_flash_address, - (uint16_t)MSS_SYS_BITSTREAM_AUTHENTICATE_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - - return status; -} - -/***************************************************************************//** - * MSS_SYS_authenticate_iap_image() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_authenticate_iap_image -( - uint32_t spi_idx -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - - ASSERT(!(spi_idx == 1u)); - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_BITSTREAM_AUTHENTICATE_CMD, - NULL_BUFFER, - MSS_SYS_WITHOUT_CMD_DATA, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - (uint16_t)spi_idx, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_BITSTREAM_AUTHENTICATE_CMD, - NULL_BUFFER, - MSS_SYS_WITHOUT_CMD_DATA, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - (uint16_t)spi_idx, - MSS_SYS_COMMON_RET_OFFSET); - } - - return status; -} - -/***************************************************************************//** - * MSS_SYS_digest_check() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_digest_check -( - uint32_t options, - uint8_t* digesterr, - uint16_t mb_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - uint32_t l_options = options; - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_DIGEST_CHECK_CMD, - (uint8_t* )&l_options, - (uint16_t)MSS_SYS_DIGEST_CHECK_DATA_LEN, - digesterr, - (uint16_t)MSS_SYS_DIGEST_CHECK_SERVICE_RESP_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_DIGEST_CHECK_CMD, - (uint8_t* )&l_options, - (uint16_t)MSS_SYS_DIGEST_CHECK_DATA_LEN, - digesterr, - (uint16_t)MSS_SYS_DIGEST_CHECK_SERVICE_RESP_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - - return status; -} - -/***************************************************************************//** - * MSS_SYS_execute_iap() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_execute_iap -( - uint8_t iap_cmd, - uint32_t spiaddr -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - uint32_t l_spiaddr = spiaddr; - - if ((MSS_SYS_IAP_PROGRAM_BY_SPIIDX_CMD == iap_cmd) - || (MSS_SYS_IAP_VERIFY_BY_SPIIDX_CMD == iap_cmd)) - { - ASSERT(!(1u == spiaddr)); - } - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)iap_cmd, - (uint8_t*)&l_spiaddr, - MSS_SYS_IAP_SERVICE_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - (uint16_t)spiaddr, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)iap_cmd, - (uint8_t*)&l_spiaddr, - MSS_SYS_IAP_SERVICE_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - (uint16_t)spiaddr, - MSS_SYS_COMMON_RET_OFFSET); - } - - return status; -} - -/***************************************************************************//** - * MSS_SYS_spi_copy() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_spi_copy -( - uint64_t mss_dest_addr, - uint32_t mss_spi_flash, - uint32_t n_bytes, - uint8_t options, - uint16_t mb_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - uint8_t mb_format[17]; - - *(uint64_t *)mb_format = mss_dest_addr; - *(uint32_t *)(mb_format + 8u) = mss_spi_flash; - *(uint32_t *)(mb_format + 12u) = n_bytes; - mb_format[16] = options; - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_SPI_COPY_CMD, - mb_format, - (uint16_t)MSS_SYS_SPI_COPY_MAILBOX_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_SPI_COPY_CMD, - mb_format, - (uint16_t)MSS_SYS_SPI_COPY_MAILBOX_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - - return status; -} - -/***************************************************************************//** - * MSS_SYS_debug_read_probe() - * See "mss_sysservices.h" for details of how to use this function. - */ - uint16_t - MSS_SYS_debug_read_probe -( - uint8_t ipseg_addr, - uint8_t iprow_addr, - uint8_t *prdata, - uint16_t mb_offset, - uint8_t resp_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - uint8_t mb_format[2]; - uint16_t service_data = 0u; - uint8_t l_resp_offset = resp_offset; - - service_data = iprow_addr; - service_data = service_data << 6u; - - service_data = service_data + ipseg_addr; - - *(uint16_t*)mb_format = service_data; - - l_resp_offset = (4u + (4u * l_resp_offset)); - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_PROBE_READ_DEBUG_CMD, - mb_format, - (uint16_t)MSS_SYS_PROBE_READ_SERVICE_DATA_LEN, - prdata, - (uint16_t)MSS_SYS_PROBE_READ_SERVICE_RESP_LEN, - mb_offset, - (uint16_t)l_resp_offset); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_PROBE_READ_DEBUG_CMD, - mb_format, - (uint16_t)MSS_SYS_PROBE_READ_SERVICE_DATA_LEN, - prdata, - (uint16_t)MSS_SYS_PROBE_READ_SERVICE_RESP_LEN, - mb_offset, - (uint16_t)l_resp_offset); - } - - return status; - } - -/***************************************************************************//** - * MSS_SYS_debug_write_probe() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_debug_write_probe -( - uint8_t prb_addr, - uint8_t ipseg_addr, - uint8_t iprow_addr, - uint32_t pwmask, - uint32_t pwdata, - uint16_t mb_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - uint8_t mb_format[12] = {0}; - - /* Local variable to store the combination of iprow_addr, ipseg_addr and - * prb_addr*/ - uint32_t service_data = 0u; - - service_data = iprow_addr; - service_data = service_data << 12u; - - uint16_t temp = ipseg_addr; - temp = temp << 6u; - temp += prb_addr; - - service_data = service_data + temp; - - *(uint32_t *)mb_format = service_data; - *(uint32_t *)(mb_format + 4u) = pwmask; - *(uint32_t *)(mb_format + 8u) = pwdata; - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_PROBE_WRITE_DEBUG_CMD, - mb_format, - (uint16_t)MSS_SYS_PROBE_WRITE_SERVICE_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_PROBE_WRITE_DEBUG_CMD, - mb_format, - (uint16_t)MSS_SYS_PROBE_WRITE_SERVICE_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - - return status; -} - -/***************************************************************************//** - * MSS_SYS_debug_live_probe() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_debug_live_probe -( - uint8_t x_addr, - uint8_t y_addr, - uint8_t ipseg_addr, - uint8_t iprow_addr, - uint8_t clear, - uint8_t ioen, - uint16_t mb_offset, - uint8_t service_cmd -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - uint8_t mb_format[6] = {0}; - uint32_t service_data = 0u; - - uint16_t channel_addr = 0u; - uint16_t probe_addr = 0u; - - channel_addr = y_addr; - channel_addr = (channel_addr << 5u) + x_addr; - - probe_addr = iprow_addr; - probe_addr = (probe_addr << 6u) + ipseg_addr; - - service_data = probe_addr; - service_data = (service_data << 11u) + channel_addr; - - *(uint32_t*)mb_format = service_data; - mb_format[4] = clear; - mb_format[5] = ioen; - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - service_cmd, - mb_format, - (uint16_t)MSS_SYS_LIVE_PROBE_DEBUG_SERVICE_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - service_cmd, - mb_format, - (uint16_t)MSS_SYS_LIVE_PROBE_DEBUG_SERVICE_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - - return status; -} - -/***************************************************************************//** - * MSS_SYS_debug_select_mem() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_debug_select_mem -( - uint8_t ipblk_addr, - uint8_t ipseg_addr, - uint8_t iprow_addr, - uint8_t memtype, - uint8_t memlock_mode, - uint16_t timeout, - uint16_t mb_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - uint8_t mb_format[6] = {0}; - uint16_t service_data = 0u; - - service_data = iprow_addr; - - uint16_t temp = ipseg_addr; - temp = ((temp << 3u) + ipblk_addr); - service_data = ((temp << 9u) + temp); - - *(uint16_t *)mb_format = service_data; - mb_format[2] = memtype; - mb_format[3] = memlock_mode; - *(uint16_t*)(mb_format + 4u) = timeout; - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_MEM_SELECT_DEBUG_CMD, - mb_format, - (uint16_t)MSS_SYS_MEM_SELECT_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_MEM_SELECT_DEBUG_CMD, - mb_format, - (uint16_t)MSS_SYS_MEM_SELECT_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - - return status; -} - - -/***************************************************************************//** - * MSS_SYS_debug_read_mem() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_debug_read_mem -( - uint16_t mem_addr, - uint16_t n_words, - uint64_t mss_addr, - uint16_t mb_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - uint8_t mb_format[16] = {0}; - - *(uint16_t*)(mb_format) = mem_addr; - *(uint16_t*)(mb_format + 2u) = n_words; - *(uint64_t*)(mb_format + 8u) = mss_addr; - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_MEM_READ_DEBUG_CMD, - mb_format, - (uint16_t)MSS_SYS_MEM_READ_WRITE_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_MEM_READ_DEBUG_CMD, - mb_format, - (uint16_t)MSS_SYS_MEM_READ_WRITE_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - - return status; - } - - -/***************************************************************************//** - * MSS_SYS_debug_write_mem() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_debug_write_mem -( - uint16_t mem_addr, - uint16_t n_words, - uint64_t mss_addr, - uint16_t mb_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - uint8_t mb_format[16] = {0}; - - *(uint16_t*)(mb_format) = mem_addr; - *(uint16_t*)(mb_format + 2u) = n_words; - *(uint64_t*)(mb_format + 8u) = mss_addr; - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_MEM_WRITE_DEBUG_CMD, - mb_format, - (uint16_t)MSS_SYS_MEM_READ_WRITE_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_MEM_WRITE_DEBUG_CMD, - mb_format, - (uint16_t)MSS_SYS_MEM_READ_WRITE_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - - return status; -} - -/***************************************************************************//** - * MSS_SYS_debug_read_apb() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_debug_read_apb -( - uint32_t apb_addr, - uint8_t apb_wsize, - uint16_t max_bytes, - uint64_t mss_addr, - uint16_t mb_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - uint8_t mb_format[24] = {0}; - - *(uint32_t *)mb_format = apb_addr; - mb_format[5] = apb_wsize; - *(uint16_t *)(mb_format + 8u) = max_bytes; - *(uint64_t *)(mb_format + 16u) = mss_addr; - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_APB_READ_DEBUG_CMD, - mb_format, - (uint16_t)MSS_SYS_APB_SERVICE_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_APB_READ_DEBUG_CMD, - mb_format, - (uint16_t)MSS_SYS_APB_SERVICE_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - - return status; -} - -/***************************************************************************//** - * MSS_SYS_debug_write_apb() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_debug_write_apb -( - uint32_t apb_addr, - uint8_t apb_wsize, - uint16_t max_bytes, - uint64_t mss_addr, - uint16_t mb_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - uint8_t mb_format[24] = {0}; - - *(uint32_t *)mb_format = apb_addr; - mb_format[5] = apb_wsize; - *(uint16_t *)(mb_format + 8u) = max_bytes; - *(uint64_t *)(mb_format + 16u) = mss_addr; - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_APB_WRITE_DEBUG_CMD, - mb_format, - (uint16_t)MSS_SYS_APB_SERVICE_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_APB_WRITE_DEBUG_CMD, - mb_format, - (uint16_t)MSS_SYS_APB_SERVICE_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - - return status; -} - -/***************************************************************************//** - * MSS_SYS_debug_fabric_snapshot() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_debug_fabric_snapshot -( - uint32_t port_addr, - uint8_t apb_fast_write, - uint16_t mb_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - uint8_t mb_format[5]={0}; - - *(uint32_t *)mb_format = port_addr; - mb_format[4] = apb_fast_write; - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_DEBUG_SNAPSHOT_CMD, - mb_format, - (uint16_t)MSS_SYS_DEBUG_SNAPSHOT_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_DEBUG_SNAPSHOT_CMD, - mb_format, - (uint16_t)MSS_SYS_DEBUG_SNAPSHOT_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - MSS_SYS_COMMON_RET_OFFSET); - } - - return status; -} - -/***************************************************************************//** - * MSS_SYS_otp_generate() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_otp_generate -( - uint8_t keymode, - uint8_t* n_user, - uint8_t* n_fpga, - uint16_t mb_offset, - uint16_t resp_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - uint8_t mb_format[20] = {0}; - uint8_t index = 0u; - - mb_format[index] = keymode; - - for (index = 0u; index < 16u; index++ ) - { - mb_format[index + 4u] = *(n_user + index); - } - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_GENERATE_OTP_CMD, - mb_format, - (uint16_t)MSS_SYS_GENERATE_OTP_DATA_LEN, - n_fpga, - (uint16_t)MSS_SYS_GENERATE_OTP_RESP_LEN, - mb_offset, - resp_offset); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_GENERATE_OTP_CMD, - mb_format, - (uint16_t)MSS_SYS_GENERATE_OTP_DATA_LEN, - n_fpga, - (uint16_t)MSS_SYS_GENERATE_OTP_RESP_LEN, - mb_offset, - resp_offset); - } - - return status; -} - -/***************************************************************************//** - * MSS_SYS_otp_match() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t MSS_SYS_otp_match -( - uint8_t * user_id, - uint8_t * validator, - uint8_t * otp, - uint16_t mb_offset, - uint16_t resp_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - uint8_t mb_format[80] = {0}; - uint8_t index = 0u; - - for (index = 0u; index < 80u; index++) - { - if (index < 16u) - { - mb_format[index] = user_id[index]; - } - if ((index > 15u) && (index < 48u)) - { - mb_format[index] = validator[index - 16u]; - } - if (index > 47u) - { - mb_format[index] = otp[index - 48u]; - } - } - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_MATCH_OTP_CMD, - mb_format, - (uint16_t)MSS_SYS_MATCH_OTP_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - resp_offset); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_MATCH_OTP_CMD, - mb_format, - (uint16_t)MSS_SYS_MATCH_OTP_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - resp_offset); - } - - return status; -} - -/***************************************************************************//** - * MSS_SYS_unlock_debug_passcode() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_unlock_debug_passcode -( - uint8_t* cmd_data, - uint16_t mb_offset, - uint16_t resp_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - //uint8_t mb_format[32] = {0}; - //uint8_t index = 0u; - - //for (index = 0u; index < 32u; index++) - //{ - // mb_format[index] = cmd_data[index]; - //} - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_UNLOCK_DEBUG_PASSCODE, - cmd_data, - (uint16_t)MSS_SYS_UNLOCK_DEBUG_PASSCODE_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - resp_offset); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_UNLOCK_DEBUG_PASSCODE, - cmd_data, - (uint16_t)MSS_SYS_UNLOCK_DEBUG_PASSCODE_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - resp_offset); - } - - return status; -} - -/***************************************************************************//** - * MSS_SYS_one_way_passcode() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_one_way_passcode -( - uint8_t* msg_id, - uint8_t* validator, - uint8_t keymode, - uint8_t* dsn, - uint8_t* hash, - uint8_t* plaintext_passcode, - uint8_t* hwm, - uint16_t mb_offset, - uint16_t resp_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - uint8_t mb_format[480] = {0}; - uint16_t index = 0; - for (index = 0u; index < 480u; index++) - { - if ( index < 16u) - { - mb_format[index] = msg_id[index]; - } - if ((index > 15u) && (index < 48u)) - { - mb_format[index] = validator[index - 16]; - } - if ( index == 51u) - { - mb_format[index] = keymode; - } - if ((index > 67u) && (index < 84u)) - { - mb_format[index] = dsn[index - 68]; - } - if ((index > 351u) && (index < 384u)) - { - mb_format[index] = hash[index - 352]; - } - if ((index > 383u) && (index < 416u)) - { - mb_format[index] = plaintext_passcode[index - 384]; - } - if ((index > 415u) && (index < 432u)) - { - mb_format[index] = hwm[index]; - } - } - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_ONE_WAY_PASSCODE_CMD, - mb_format, - (uint16_t)MSS_SYS_ONE_WAY_PASSCODE_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - resp_offset); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_ONE_WAY_PASSCODE_CMD, - mb_format, - (uint16_t)MSS_SYS_ONE_WAY_PASSCODE_DATA_LEN, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - resp_offset); - } - - return status; -} - -/***************************************************************************//** - * MSS_SYS_debug_terminate() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t -MSS_SYS_debug_terminate -( - uint16_t mb_offset, - uint16_t resp_offset -) -{ - uint16_t status = MSS_SYS_PARAM_ERR; - - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - status = execute_ss_interrupt_mode( - (uint8_t)MSS_SYS_TERMINATE_DEBUG_CMD, - NULL_BUFFER, - MSS_SYS_WITHOUT_CMD_DATA, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - resp_offset); - } - else - { - status = execute_ss_polling_mode( - (uint8_t)MSS_SYS_TERMINATE_DEBUG_CMD, - NULL_BUFFER, - MSS_SYS_WITHOUT_CMD_DATA, - NULL_BUFFER, - MSS_SYS_NO_RESPONSE_LEN, - mb_offset, - resp_offset); - } - - return status; -} - -/***************************************************************************//** - * MSS_SYS_read_response() - * See "mss_sysservices.h" for details of how to use this function. - */ -uint16_t MSS_SYS_read_response -( - void -) -{ - uint16_t response_limit = 0u; - uint32_t idx; - uint16_t status = MSS_SYS_PARAM_ERR; - - if (g_message_interrupt_counter > 0u) - { - g_message_interrupt_counter = 0u; - - if (g_int_service_response_size > 0u) - { - response_limit = g_int_service_response_size + - g_int_service_response_offset; - - for (idx = g_int_service_response_offset; idx < response_limit; idx++) - { - gp_int_service_response[idx - g_int_service_response_offset] = - *((uint8_t *)MSS_SCBMAILBOX + idx); - } - } - - /* Read the status returned by System Controller*/ - status = ((MSS_SCBCTRL->SERVICES_SR & SCBCTRL_SERVICESSR_STATUS_MASK) >> - SCBCTRL_SERVICESSR_STATUS); - } - - return status; -} - -/***************************************************************************//** - Internal functions. -*/ - -/* - * This function requests the system service to the system controller. It will - * first write the Mailbox input data to the mailbox from the cmd_data if - * required for that service. - * - */ -static uint16_t request_system_service -( - uint8_t cmd_opcode, - uint8_t* cmd_data, - uint16_t cmd_data_size, - uint8_t* p_response, - uint16_t response_size, - uint16_t mb_offset, - uint16_t response_offset - -) -{ - uint32_t idx; - uint16_t ss_command = 0u; - uint32_t* word_buf ; - uint8_t* byte_buf ; - uint8_t byte_off; - uint8_t byte_index; - uint32_t * mailbox_reg; - uint32_t mailbox_val = 0u; - - if (MSS_SCBCTRL->SERVICES_SR & SCBCTRL_SERVICESSR_BUSY_MASK) - { - /*System controller is busy with executing service*/ - return MSS_SYS_BUSY; - } - - /*Code for MSS_SYS_PARAM_ERR is not implemented with this version of driver.*/ - - *MSS_SCBMESSAGE_INT = 0x0u; /*clear message_int reg*/ - - if (g_service_mode == MSS_SYS_SERVICE_INTERRUPT_MODE) - { - gp_int_service_response = (uint8_t*)p_response; - g_int_service_response_offset = response_offset; - g_int_service_response_size = response_size; - } - - if (cmd_data_size > 0u) - { - word_buf = (uint32_t*)cmd_data; - - /* Write the user data into mail box. */ - for (idx = 0u; idx < (cmd_data_size / 4u); idx++) - { - *(MSS_SCBMAILBOX + idx) = word_buf[idx]; - } - - if ((cmd_data_size % 4u) > 0u) - { - byte_off = (((cmd_data_size / 4u) * 4u)); - byte_buf = (uint8_t*)(cmd_data + byte_off); - - mailbox_reg = (MSS_SCBMAILBOX + idx); - mailbox_val = *mailbox_reg; - - for (byte_index = 0u; byte_index < (cmd_data_size % 4u); - byte_index++) - { - mailbox_val &= ~(0xffu << (byte_index * 8u)); - mailbox_val |= (byte_buf[byte_index] << (byte_index * 8u)); - } - *mailbox_reg = mailbox_val; - } - } - - /*Form the SS command: bit 0to6 is the opcode, bit 7to15 is the Mailbox - offset For some services this field has another meaning. - (e.g. for IAP bit-stream auth. it means spi_idx)*/ - ss_command = ((mb_offset << 7u) | (cmd_opcode & 0x7Fu)); - - /*Interrupt based implementation of services */ - if (MSS_SYS_SERVICE_INTERRUPT_MODE == g_service_mode) - { - MSS_SCBCTRL->SERVICES_CR = (((ss_command << SCBCTRL_SERVICESCR_COMMAND) - & SCBCTRL_SERVICESCR_COMMAND_MASK) | - SCBCTRL_SERVICESCR_REQ_MASK | - SCBCTRL_SERVICESSR_NOTIFY_MASK); - } - else - { - MSS_SCBCTRL->SERVICES_CR = (((ss_command << SCBCTRL_SERVICESCR_COMMAND) - & SCBCTRL_SERVICESCR_COMMAND_MASK) | - SCBCTRL_SERVICESCR_REQ_MASK); - - } - - /*Service requested successfully*/ - return MSS_SYS_SUCCESS; -} - -/* - * This function executes the SS command in interrupt mode. If Mailbox input data - * is required by the service, the call to request_system_service() function will - * first load it from cmd_data into the Mailbox. The response of the service is - * not read by this function as it depends on message interrupt. Application - * will have to read the response of service by calling MSS_SYS_read_response(), - * only after interrupt occurs. - */ -static uint16_t execute_ss_interrupt_mode -( - uint8_t cmd_opcode, - uint8_t* cmd_data, - uint16_t cmd_data_size, - uint8_t* p_response, - uint16_t response_size, - uint16_t mb_offset, - uint16_t response_offset -) -{ - - uint16_t status; - status = request_system_service(cmd_opcode, cmd_data, cmd_data_size, - p_response, response_size, mb_offset, - response_offset); - - return status; - } - -/* - * This function executes the SS command in polling mode. If Mailbox input data - * is required by the it will first load it from cmd_data into the Mailbox. - * After requesting the service it will poll the request and busy bit. If the - * service requires the response data to be read from mailbox, it will read the - * mailbox contents and store it in p_response buffer. - */ -static uint16_t execute_ss_polling_mode -( - uint8_t cmd_opcode, - uint8_t* cmd_data, - uint16_t cmd_data_size, - uint8_t* p_response, - uint16_t response_size, - uint16_t mb_offset, - uint16_t response_offset -) -{ - uint32_t idx; - uint16_t status = 0u; - uint16_t response_limit = 0u; - uint8_t* response_buf; - - status = request_system_service(cmd_opcode, cmd_data, cmd_data_size, - p_response,response_size, mb_offset, - response_offset); - - if (status == MSS_SYS_SUCCESS) - { - /**REQ bit will remain set till the system controller starts - * processing command. Since DRI is slow interface, we are waiting - * here to make sure System controller has started processing - * command*/ - while (SCBCTRL_SERVICESCR_REQ_MASK == (MSS_SCBCTRL->SERVICES_CR & - SCBCTRL_SERVICESCR_REQ_MASK)) - { - ; - } - - /*Once system controller starts processing command The busy bit will - * go 1. Make sure that service is complete i.e. BUSY bit is gone 0*/ - while (SCBCTRL_SERVICESSR_BUSY_MASK == (MSS_SCBCTRL->SERVICES_SR & - SCBCTRL_SERVICESSR_BUSY_MASK)) - { - ; - } - - if (response_size > 0u) - { - response_limit = response_size + response_offset; - response_buf = (uint8_t*)p_response; - - for (idx = response_offset; idx < response_limit; idx++) - { - response_buf[idx - response_offset] = - *((uint8_t *)MSS_SCBMAILBOX + idx); - } - } - - /*Read the status returned by System Controller*/ - status = ((MSS_SCBCTRL->SERVICES_SR & SCBCTRL_SERVICESSR_STATUS_MASK) >> - SCBCTRL_SERVICESSR_STATUS); - } - else - { - status = MSS_SYS_BUSY; - } - - return status; -} - -/***************************************************************************//** - * Interrupt service routine triggered by message interrupt. - * This routine will call handler function which will read the service response - * in interrupt mode of operation. - */ -uint8_t -g5c_message_plic_IRQHandler -( - void -) -{ - g_message_interrupt_counter++; - - volatile uint32_t reg = *MSS_SCBMESSAGE; /*read message reg.*/ - reg = *MSS_SCBMESSAGE_INT; - *MSS_SCBMESSAGE_INT = 0x0u; /*clear message_int reg*/ - reg = *MSS_SCBMESSAGE_INT; - (void)reg; // reference to avoid compiler warning - - mss_sys_interrupt_handler(); - - return 0; -} - -#ifdef __cplusplus -} -#endif diff --git a/sm/plat/mpfs/drivers/mss_sys_services/mss_sys_services.h b/sm/plat/mpfs/drivers/mss_sys_services/mss_sys_services.h deleted file mode 100644 index b1e3f8d9b..000000000 --- a/sm/plat/mpfs/drivers/mss_sys_services/mss_sys_services.h +++ /dev/null @@ -1,3206 +0,0 @@ -/******************************************************************************* - * Copyright 2019 Microchip Corporation. - * - * SPDX-License-Identifier: MIT - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to - * deal in the Software without restriction, including without limitation the - * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * PolarFire SoC micro processor subsystem system services bare metal driver - * implementation. - * - * SVN $Revision$ - * SVN $Date$ - */ - -/*=========================================================================*//** - @mainpage PolarFire SoC MSS System services Bare Metal Driver - - ============================================================================== - Introduction - ============================================================================== - The PolarFire SoC system services are the services offered by the system - controller. These services can be requested by PolarFire SoC MSS over System - Controller Bus (SCB). The MSS appears as SCB master over the SCB bus. MSS can - communicate with system controller over SCB by write/read to the MSS SCB - register space. The PolarFire SoC system service driver software provides a - set of functions for controlling the PolarFire SoC system services as part of - a bare-metal system where no operating system is available. It can be adapted - to be used as a part of an operating system, but the implementation of the - adaptation layer between this driver and the operating system's driver model - is outside the scope of this driver. - - ============================================================================== - Hardware Flow Dependencies - ============================================================================== - The configuration of all the features of the PolarFire SoC MSS system services - is covered by this driver. Besides, this driver does not require any other - configuration. It relies on SCB register access interface to communicate with - system controller. - The base address and register addresses are defined in this driver as - constants. The interrupt number assigned are defined as constants in the MPFS - HAL. Ensure that the latest MPFS HAL is included in the project settings of - the SoftConsole toolchain and that it is generated into your project. - - ============================================================================== - Theory of Operation - ============================================================================== - The PolarFire SoC system services are the services offered by the system - controller. These services can be requested by PolarFire SoC MSS over System - Controller Bus (SCB). The MSS appears as SCB master over the SCB bus. MSS can - communicate with the system controller over SCB by accessing the MSS SCB - register space. Requesting a system service over the SCB bus involves a - command/response sequence to transfer a system service command from the MSS to - the system controller and to transfer status back from the system controller - to the MSS. The MSS SCB register space also provides access to the mailbox. - The mailbox is used for passing data related to the system service between the - MSS and system controller in both directions. - On completion of service, the system controller also writes a status code - indicating the successful completion of the system service or an error code - into the status register. - - These system services are grouped into the following categories: - - Device and design information services - - Design services - - Data security services - - Fabric services - - MSS services - - ----------------------------------------------------------------------------- - Device and Design Information Services - ----------------------------------------------------------------------------- - The PolarFire SoC system service driver can be used to read information about - the device on which it is being executed and the current fabric design by - making a call to the following functions. - - MSS_SYS_get_serial_number() - - MSS_SYS_get_user_code() - - MSS_SYS_get_design_info() - - MSS_SYS_get_device_certificate() - - MSS_SYS_read_digest() - - MSS_SYS_query_security() - - MSS_SYS_read_debug_info() - - MSS_SYS_read_envm_param() - - ----------------------------------------------------------------------------- - Design Services - ----------------------------------------------------------------------------- - The PolarFire SoC system service driver can be used to execute UIC script and - perform bitstream authentication using the following functions. - - MSS_SYS_execute_UIC_script_service() - - MSS_SYS_UIC_bitstream_authenticate_service() - - MSS_SYS_bitstream_authenticate_service() - - MSS_SYS_IAP_image_authenticate_service() - - ----------------------------------------------------------------------------- - Data Security Services - ----------------------------------------------------------------------------- - The PolarFire SoC System Service driver can be used to execute data security - services using the following functions: - - MSS_SYS_digital_signature_service () - - MSS_SYS_secure_nvm_write() - - MSS_SYS_secure_nvm_read() - - MSS_SYS_puf_emulation_service () - - MSS_SYS_nonce_service () - - ----------------------------------------------------------------------------- - Executing Fabric Services - ----------------------------------------------------------------------------- - The PolarFire SoC System Service driver can be used to execute fabric services - using the following functions: - - MSS_SYS_digest_check_service() - - MSS_SYS_iap_service() - - ----------------------------------------------------------------------------- - MSS Services - ----------------------------------------------------------------------------- - The PolarFire SoC System Service driver can be used to execute MSS services - using following functions: - - MSS_SYS_spi_copy_service() - - MSS_SYS_probe_read_debug_service() - - MSS_SYS_probe_write_debug_service() - - MSS_SYS_live_probe_debug_service() - - MSS_SYS_MEM_select_debug_service() - - MSS_SYS_MEM_read_debug_service() - - MSS_SYS_MEM_write_debug_service() - - MSS_SYS_apb_read_service() - - MSS_SYS_apb_write_debug_service() - - MSS_SYS_debug_snapshot_service() - - MSS_SYS_generate_otp_service() - - MSS_SYS_match_otp_service() - - MSS_SYS_unlock_debug_passcode_service() - - MSS_SYS_one_way_passcode_service() - - MSS_SYS_terminate_debug_service() - - ----------------------------------------------------------------------------- - Mode of operation and status response - ----------------------------------------------------------------------------- - The PolarFire SoC MSS system service driver can be configured to execute - service in interrupt mode or polling mode. User need to select the mode of - operation by configuring the driver with appropriate service mode macros as a - parameter to MSS_SYS_select_service_mode() function. For interrupt mode, the - calling service function exits after requesting the system service with a - success return value. The actual response from the system controller will only - be available after the interrupt occurs. Use the MSS_SYS_read_response() - function to read the service response and the status response code. - For Polling mode, the calling service function exits only after the - completion of the service, the return value in this case will indicate the - service response code received from the system controller. - All the service execution functions return the 16-bit status returned by - system controller on executing the given service. A zero value indicates the - successful execution of that service. A non-zero value indicates an error code - representing the type of error that was encountered while executing the service. - Irrespective of the mode, if the controller is busy executing the previous - service the function will exit with the MSS_SYS_BUSY return value. The error - codes are different for each service. See individual function descriptions to - know the meaning of the error code for each service. - */ - -#ifndef MSS_SYS_SERVICES_H_ -#define MSS_SYS_SERVICES_H_ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/*--------------------------------Public constants----------------------------*/ - -/*-------------------------------------------------------------------------*//** - System services Generic constants - ============================ - - These constants are used to communicate the outcome of a system services - request. These status codes are used across all types of services. The - following table lists the system service driver generic constants. - - MSS_SYS_SUCCESS - System service executed successfully. - - MSS_SYS_BUSY - system controller is busy executing system service which was initiated using - its AMBA interface. - - MSS_SYS_PARAM_ERR - System service cannot be executed as one or more parameters are not as - expected by this driver. - -*/ -#define MSS_SYS_SUCCESS 0u -#define MSS_SYS_BUSY 0xEFu -#define MSS_SYS_PARAM_ERR 0xFFu - -/*-------------------------------------------------------------------------*//** - System service execution mode macros - ============================ - - The following defines are used to select whether to execute services in - interrupt mode or polling mode. - */ - -/* Parameter used in MSS_SYS_service_mode() function - * to execute the services in interrupt mode - */ -#define MSS_SYS_SERVICE_INTERRUPT_MODE 1u - -/* Parameter used in MSS_SYS_service_mode() function - * to execute the services in polling mode - */ -#define MSS_SYS_SERVICE_POLLING_MODE 0u - -/*-------------------------------------------------------------------------*//** - System service error codes - ============================ - - The following constants list the success/error code for each system service. -*/ - -/*-------------------------------------------------------------------------*//** - Device Certificate Service error codes - - MSS_SYS_DCF_DEVICE_MISMATCH - Public key or FSN do not match device - - MSS_SYS_DCF_INVALID_SIGNATURE - Certificate signature is invalid - - MSS_SYS_DCF_SYSTEM_ERROR - PUF or storage failure -*/ -#define MSS_SYS_DCF_DEVICE_MISMATCH 1u -#define MSS_SYS_DCF_INVALID_SIGNATURE 2u -#define MSS_SYS_DCF_SYSTEM_ERROR 3u - -/*------------------------------------------------------------------------*//** - Read ENVM parameters service error codes - - MSS_SYS_ENVM_DIGEST_ERROR - Page digest mismatches. Parameter values still returned - */ -#define MSS_SYS_ENVM_DIGEST_ERROR 1u - -/*-------------------------------------------------------------------------*//** - Execute UIC script and UIC bitstream authentication error codes - - EXECUTE_UIC_SPI_MAX_FRAME_ERR - Maximum number for Frames have been exceeded during SPI UIC execution - - EXECUTE_UIC_POLL_TIMEOUT - Timeout occurred during the Poll instruction. - - EXECUTE_UIC_SPI_AUTHEN_ERR - Authentication error occurred during UIC SPI Authenticated mode - - EXECUTE_UIC_SPI_DECRYPT_ERR - Decryption error occurred during UIC SPI Authenticated mode - - EXECUTE_UIC_SPI_NOTMASTER_ERR - SPI isn’t set as the master - - EXECUTE_UIC_FABRIC_APB_ERR - A Fabric APB Error was detected during UIC execution - - EXECUTE_UIC_SCB_ERR - A SCB Error was detected during UIC execution - - EXECUTE_UIC_PNVM_ENCRYPT_ERR - An Encrypted SNVM page was detected during UIC execution - - EXECUTE_UIC_ADDR_OUTOFRANGE_ERR - An illegal script address was detected during UIC execution - - EXECUTE_UIC_JUMP_MAX_ERR - The maximum number of Jump executions was exceeded. Current max is 1000. - - EXECUTE_UIC_UNEXPECTED_FORMAT_ERR - Fields within the instruction that were expected to be all 0 were not. - - EXECUTE_UIC_SCRIPT_TIMEOUT_ERR - UIC Script took longer than the specified UIC_SCRIPT_TIMEOUT - parameter (in seconds) - -*/ -#define MSS_SYS_EXECUTE_UIC_SUCCESS 0u -#define MSS_SYS_EXECUTE_UIC_SPI_MAX_FRAME_ERR 1u -#define MSS_SYS_EXECUTE_UIC_POLL_TIMEOUT 2u -#define MSS_SYS_EXECUTE_UIC_SPI_AUTHEN_ERR 3u -#define MSS_SYS_EXECUTE_UIC_SPI_DECRYPT_ERR 4u -#define MSS_SYS_EXECUTE_UIC_SPI_NOTMASTER_ERR 5u -#define MSS_SYS_EXECUTE_UIC_FABRIC_APB_ERR 6u -#define MSS_SYS_EXECUTE_UIC_SCB_ERR 7u -#define MSS_SYS_EXECUTE_UIC_PNVM_ENCRYPT_ERR 8u -#define MSS_SYS_EXECUTE_UIC_ADDR_OUTOFRANGE_ERR 9u -#define MSS_SYS_EXECUTE_UIC_JUMP_MAX_ERR 10u -#define MSS_SYS_EXECUTE_UIC_UNEXPECTED_FORMAT_ERR 11u -#define MSS_SYS_EXECUTE_UIC_SCRIPT_TIMEOUT_ERR 12u - -/*-------------------------------------------------------------------------*//** - bitstream authentication and IAP bitstream authentication error codes - - BSTREAM_AUTH_CHAINING_MISMATCH_ERR - Validator or hash chaining mismatch. Incorrectly constructed bitstream or - wrong key used. - - BSTREAM_AUTH_UNEXPECTED_DATA_ERR - Unexpected data received. - Additional data received after end of EOB component - - BSTREAM_AUTH_INVALID_ENCRY_KEY_ERR - Invalid/corrupt encryption key. - The requested key mode is disabled or the key could not be read/reconstructed - - BSTREAM_AUTH_INVALID_HEADER_ERR - Invalid component header - - BSTREAM_AUTH_BACK_LEVEL_NOT_SATISFIED_ERR - Back level not satisfied - - BSTREAM_AUTH_ILLEGAL_BITSTREAM_MODE_ERR - Illegal bitstream mode. - Requested bitstream mode is disabled by user security - - BSTREAM_AUTH_DNS_BINDING_MISMATCH_ERR - DSN binding mismatch - - BSTREAM_AUTH_ILLEGAL_COMPONENT_SEQUENCE_ERR - Illegal component sequence - - BSTREAM_AUTH_INSUFF_DEVICE_CAPAB_ERR - Insufficient device capabilities - - BSTREAM_AUTH_INCORRECT_DEVICEID_ERR - Incorrect DEVICEID - - BSTREAM_AUTH_PROTOCOL_VERSION_ERR - Unsupported bitstream protocol version (regeneration required) - - BSTREAM_AUTH_VERIFY_ERR - Verify not permitted on this bitstream - - BSTREAM_AUTH_INVALID_DEV_CERT_ERR - Invalid Device Certificate. - Device SCAC is invalid or not present - - BSTREAM_AUTH_INVALID_DIB_ERR - Invalid DIB - - BSTREAM_AUTH_SPI_NOT_MASTER_ERR - Device not in SPI Master Mode. - Error may occur only when bitstream is executed through IAP mode - - BSTREAM_AUTH_AUTOIAP_NO_VALID_IMAGE_ERR - No valid images found. - Error may occur when bitstream is executed through Auto Update mode. - Occurs when No valid image pointers are found. - - BSTREAM_AUTH_INDEXIAP_NO_VALID_IMAGE_ERR - No valid images found. - Error may occur when bitstream is executed through IAP mode via Index Mode. - Occurs when No valid image pointers are found. - - BSTREAM_AUTH_NEWER_DESIGN_VERSION_ERR - Programmed design version is newer than AutoUpdate image found. - Error may occur when bitstream is executed through Auto Update mode - - BSTREAM_AUTH_INVALID_IMAGE_ERR - Selected image was invalid and no recovery was performed due to valid design - in device. - Error may occur only when bitstream is executed through Auto Update or IAP - mode (This error is here for completeness but only can be observed by - running the READ_DEBUG_INFO instruction and looking at IAP Error code field) - - BSTREAM_AUTH_IMAGE_PROGRAM_FAILED_ERR - Selected and Recovery image failed to program. - Error may occur only when bitstream is executed through Auto Update or - IAP mode - (This error is here for completeness but only can be observed by running the - READ_DEBUG_INFO instruction and looking at IAP Error code field) - - BSTREAM_AUTH_ABORT_ERR - Abort. - Non-bitstream instruction executed during bitstream loading. - - BSTREAM_AUTH_NVMVERIFY_ERR - Fabric/UFS verification failed (min or weak limit) - - BSTREAM_AUTH_PROTECTED_ERR - Device security prevented modification of non-volatile memory - - BSTREAM_AUTH_NOTENA - Programming mode not enabled - - BSTREAM_AUTH_PNVMVERIFY - pNVM verify operation failed - - BSTREAM_AUTH_SYSTEM - System hardware error (PUF or DRBG) - - BSTREAM_AUTH_BADCOMPONENT - An internal error was detected in a component payload - - BSTREAM_AUTH_HVPROGERR - HV programming subsystem failure (pump failure) - - BSTREAM_AUTH_HVSTATE - HV programming subsystem in unexpected state (internal error) - */ -#define MSS_SYS_BSTREAM_AUTH_CHAINING_MISMATCH_ERR 1u -#define MSS_SYS_BSTREAM_AUTH_UNEXPECTED_DATA_ERR 2u -#define MSS_SYS_BSTREAM_AUTH_INVALID_ENCRY_KEY_ERR 3u -#define MSS_SYS_BSTREAM_AUTH_INVALID_HEADER_ERR 4u -#define MSS_SYS_BSTREAM_AUTH_BACK_LEVEL_NOT_SATISFIED_ERR 5u -#define MSS_SYS_BSTREAM_AUTH_ILLEGAL_BITSTREAM_MODE_ERR 6u -#define MSS_SYS_BSTREAM_AUTH_DNS_BINDING_MISMATCH_ERR 7u -#define MSS_SYS_BSTREAM_AUTH_ILLEGAL_COMPONENT_SEQUENCE_ERR 8u -#define MSS_SYS_BSTREAM_AUTH_INSUFF_DEVICE_CAPAB_ERR 9u -#define MSS_SYS_BSTREAM_AUTH_INCORRECT_DEVICEID_ERR 10u -#define MSS_SYS_BSTREAM_AUTH_PROTOCOL_VERSION_ERR 11u -#define MSS_SYS_BSTREAM_AUTH_VERIFY_ERR 12u -#define MSS_SYS_BSTREAM_AUTH_INVALID_DEV_CERT_ERR 13u -#define MSS_SYS_BSTREAM_AUTH_INVALID_DIB_ERR 14u -#define MSS_SYS_BSTREAM_AUTH_SPI_NOT_MASTER_ERR 21u -#define MSS_SYS_BSTREAM_AUTH_AUTOIAP_NO_VALID_IMAGE_ERR 22u -#define MSS_SYS_BSTREAM_AUTH_INDEXIAP_NO_VALID_IMAGE_ERR 23u -#define MSS_SYS_BSTREAM_AUTH_NEWER_DESIGN_VERSION_ERR 24u -/*25 Reserved*/ -#define MSS_SYS_BSTREAM_AUTH_INVALID_IMAGE_ERR 26u -#define MSS_SYS_BSTREAM_AUTH_IMAGE_PROGRAM_FAILED_ERR 27u -#define MSS_SYS_BSTREAM_AUTH_ABORT_ERR 127u -#define MSS_SYS_BSTREAM_AUTH_NVMVERIFY_ERR 128u -#define MSS_SYS_BSTREAM_AUTH_PROTECTED_ERR 129u -#define MSS_SYS_BSTREAM_AUTH_NOTENA 130u -#define MSS_SYS_BSTREAM_AUTH_PNVMVERIFY 131u -#define MSS_SYS_BSTREAM_AUTH_SYSTEM 132u -#define MSS_SYS_BSTREAM_AUTH_BADCOMPONENT 133u -#define MSS_SYS_BSTREAM_AUTH_HVPROGERR 134u -#define MSS_SYS_BSTREAM_AUTH_HVSTATE 135u - -/*-------------------------------------------------------------------------*//** - Digital Signature Service error code - - DIGITAL_SIGNATURE_FEK_FAILURE_ERROR - Error retrieving FEK - - DIGITAL_SIGNATURE_DRBG_ERROR - Failed to generate nonce - - DIGITAL_SIGNATURE_ECDSA_ERROR - ECDSA failed -*/ -#define MSS_SYS_DIGITAL_SIGNATURE_FEK_FAILURE_ERROR 0x01u -#define MSS_SYS_DIGITAL_SIGNATURE_DRBG_ERROR 0x02u -#define MSS_SYS_DIGITAL_SIGNATURE_ECDSA_ERROR 0x03u - -/*-------------------------------------------------------------------------*//** - Secure NVM write error codes - - SNVM_WRITE_INVALID_SNVMADDR - Illegal page address - - SNVM_WRITE_FAILURE - PNVM program/verify failed - - SNVM_WRITE_SYSTEM_ERROR - PUF or storage failure - - SNVM_WRITE_NOT_PERMITTED - Write is not permitted -*/ -#define MSS_SYS_SNVM_WRITE_INVALID_SNVMADDR 1u -#define MSS_SYS_SNVM_WRITE_FAILURE 2u -#define MSS_SYS_SNVM_WRITE_SYSTEM_ERROR 3u -#define MSS_SYS_SNVM_WRITE_NOT_PERMITTED 4u - -/*-------------------------------------------------------------------------*//** - Secure NVM read error codes - - SNVM_READ_INVALID_SNVMADDR - Illegal page address - - SNVM_READ_AUTHENTICATION_FAILURE - Storage corrupt or incorrect USK - - SNVM_READ_SYSTEM_ERROR - PUF or storage failure -*/ -#define MSS_SYS_SNVM_READ_INVALID_SNVMADDR 1u -#define MSS_SYS_SNVM_READ_AUTHENTICATION_FAILURE 2u -#define MSS_SYS_SNVM_READ_SYSTEM_ERROR 3u - -/*-------------------------------------------------------------------------*//** - PUF emulation service error codes - - MSS_SYS_PUF_EMU_INTERNAL_ERR - Internal error - */ -#define MSS_SYS_PUF_EMU_INTERNAL_ERR 1u - -/*-------------------------------------------------------------------------*//** - Nonce Service Error Codes - - MSS_SYS_NONCE_PUK_FETCH_ERROR - Error fetching PUK - - MSS_SYS_NONCE_SEED_GEN_ERROR - Error generating seed -*/ -#define MSS_SYS_NONCE_PUK_FETCH_ERROR 1u -#define MSS_SYS_NONCE_SEED_GEN_ERROR 2u - -/*-------------------------------------------------------------------------*//** - Digest Check service error code - - MSS_SYS_DIGEST_CHECK_DIGESTERR - Digest mismatch occurred -*/ -#define MSS_SYS_DIGEST_CHECK_DIGESTERR 1u - -/*-------------------------------------------------------------------------*//** - SPI COPY SERVICE error codes - - MSS_SYS_SPI_MASTER_MODE_ERR - Device is not configured for master mode - - MSS_SYS_SPI_AXI_ERR - AXI error -*/ -#define MSS_SYS_SPI_MASTER_MODE_ERR 1u -#define MSS_SYS_SPI_AXI_ERR 2u - -/*-------------------------------------------------------------------------*//** - Probe services error codes - - MSS_SYS_PROBE_SECERR - The operation was blocked by device security. This will occur if the - permanent debug lock UP_DEBUG is set or the user software debug lock - SWL_DEBUG is active or the device is in the virgin state. No data is read - and PRDATA is invalid. - */ -#define MSS_SYS_PROBE_SECERR 1u - -/*-------------------------------------------------------------------------*//** - MEM Services error codes - - MSS_SYS_MEM_SECERR - The operation was blocked by device security. - This will occur if the permanent debug lock UP_DEBUG is set or the user - software debug lock SWL_DEBUG is active or the device is in the virgin state. - - MSS_SYS_MEM_TIMEOUTERR - Timeout occurred. - - MSS_SYS_MEM_LOCKERR - Target memory failed to lock -*/ -#define MSS_SYS_MEM_SECERR 1u -#define MSS_SYS_MEM_TIMEOUTERR 2u -#define MSS_SYS_MEM_LOCKERR 3u - -/*-------------------------------------------------------------------------*//** - APB services error codes - - MSS_SYS_APB_SECERR - The operation was blocked by device security. - This will occur if the permanent debug lock UP_DEBUG is set or the user - software debug lock SWL_DEBUG is active or the device is in the virgin state. - - MSS_SYS_APB_SLVERR - The addressed fabric APB peripheral generated a SLVERR response to the bus - transaction. - - MSS_SYS_APB_TIMEOUT - The addressed fabric APB peripheral failed to respond before the user-defined - APB timeout or the fabric power is not on. -*/ -#define MSS_SYS_APB_SECERR 1u -#define MSS_SYS_APB_SLVERR 2u -#define MSS_SYS_APB_TIMEOUT 3u - -/*-------------------------------------------------------------------------*//** - Debug snapshot service error codes - - MSS_SYS_DEBUG_SNAPSHOT_SECERR - The operation was blocked by device security. - This will occur if the permanent debug lock UP_DEBUG is set or the user - software debug lock SWL_DEBUG is active or the device is in the virgin state. - - MSS_SYS_DEBUG_SNAPSHOT_BUSERR - A bus error occurred and the snapshot was aborted. This may occur if: - • the fabric power is off, or - • the fabric APB slave flagged an error, or - • the fabric APB slave was too slow to assert PREADY -*/ -#define MSS_SYS_DEBUG_SNAPSHOT_SECERR 1u -#define MSS_SYS_DEBUG_SNAPSHOT_BUSERR 2u - -/*-------------------------------------------------------------------------*//** - GENERATE OTP SERVICE - - MSS_SYS_SECERR - Operation is blocked by device security - - MSS_SYS_PROTOCOLERR - Invalid key provided -*/ -#define MSS_SYS_GENERATE_OTP_SECERR 1u -#define MSS_SYS_GENERATE_OTP_PROTOCOLERR 2u - -/*-------------------------------------------------------------------------*//** - MATCH OTP SERVICE - - MSS_SYS_PROTOCOLERR - Keymode not supported. - - MSS_SYS_MATCH_OTP_MISMATCHERR - Calculated validator mismatch. -*/ -#define MSS_SYS_MATCH_OTP_PROTOCOLERR 1u -#define MSS_SYS_MATCH_OTP_MISMATCHERR 2u - -/*-------------------------------------------------------------------------*//** - Unlock debug passcode service error codes - - MSS_SYS_UNLOCK_DEBUG_PASSCODE_SECERR - The operation was blocked by device security. - Occurs if the lock UL_PLAINTEXT is active or the permanent lock UP_DPK is set. - - MSS_SYS_UNLOCK_DEBUG_PASSCODE_ERR - If the unlock operation fails for any reason then the tamper event - PASSCODE_FAIL is generated and all unlocked passcodes are re-locked. -*/ -#define MSS_SYS_UNLOCK_DEBUG_PASSCODE_SECERR 1u -#define MSS_SYS_UNLOCK_DEBUG_PASSCODE_ERR 2u - -/*-------------------------------------------------------------------------*//** - One way passcode service error codes - - MSS_SYS_OWP_OWPERR - If the unlock operation fails for any reason then the tamper event - PASSCODE_FAIL is generated and all unlocked passcodes are re-locked. -*/ -#define MSS_SYS_OWP_OWPERR 1u - -/*-------------------------------------------------------------------------*//** - System service response data length - ============================ - - The following constants can be used to indicate the length of the data that - is written into the mailbox by the system controller in response to the - service being requested. - - MSS_SYS_NO_RESPONSE_LEN - This constant is used to indicate that system controller does not return any - mailbox data for the service which is being requested - - MSS_SYS_SERIAL_NUMBER_RESP_LEN - Response length serial number service - - MSS_SYS_USERCODE_RESP_LEN - Response length for Usercode service - - MSS_SYS_DESIGN_INFO_RESP_LEN - Response length for Design info service - - MSS_SYS_DEVICE_CERTIFICATE_RESP_LEN - Response length for Device certificate service - - MSS_SYS_READ_DIGEST_RESP_LEN - Response length Read digest service - - MSS_SYS_QUERY_SECURITY_RESP_LEN - Response length Query security service - - MSS_SYS_READ_DEBUG_INFO_RESP_LEN - Response length Read debug info service - - MSS_SYS_NONCE_SERVICE_RESP_LEN - Response length Nonce service - - MSS_SYS_READ_ENVM_PARAM_RESP_LEN - Response length Read eNVM parameters service - - MSS_SYS_PROBE_READ_SERVICE_RESP_LEN - Response length Probe read service - - MSS_SYS_GENERATE_OTP_RESP_LEN - Response length Generate OTP service - - MSS_SYS_PUF_EMULATION_SERVICE_RESP_LEN - Response length PUF emulation service - - MSS_SYS_DIGITAL_SIGNATURE_RAW_FORMAT_RESP_SIZE - Response length for digital signature service raw format - - MSS_SYS_DIGITAL_SIGNATURE_DER_FORMAT_RESP_SIZE - Response length for digital signature service DER format -*/ -#define MSS_SYS_NO_RESPONSE_LEN 0u -#define MSS_SYS_SERIAL_NUMBER_RESP_LEN 16u -#define MSS_SYS_USERCODE_RESP_LEN 4u -#define MSS_SYS_DESIGN_INFO_RESP_LEN 36u -#define MSS_SYS_DEVICE_CERTIFICATE_RESP_LEN 1024u -#define MSS_SYS_READ_DIGEST_RESP_LEN 544u -#define MSS_SYS_QUERY_SECURITY_RESP_LEN 33u -#define MSS_SYS_READ_DEBUG_INFO_RESP_LEN 94u -#define MSS_SYS_NONCE_SERVICE_RESP_LEN 32u -#define MSS_SYS_READ_ENVM_PARAM_RESP_LEN 256u -#define MSS_SYS_PUF_EMULATION_SERVICE_RESP_LEN 32u -#define MSS_SYS_DIGEST_CHECK_SERVICE_RESP_LEN 4u -#define MSS_SYS_DIGITAL_SIGNATURE_RAW_FORMAT_RESP_SIZE 96u -#define MSS_SYS_DIGITAL_SIGNATURE_DER_FORMAT_RESP_SIZE 104u -#define MSS_SYS_USER_SECRET_KEY_LEN 12u -#define MSS_SYS_PROBE_READ_SERVICE_RESP_LEN 4u -#define MSS_SYS_GENERATE_OTP_RESP_LEN 16u - -/*-------------------------Private constants--------------------------------*/ - -/*-------------------------------------------------------------------------*//** - Service request command opcodes - ============================ - - The following constants can be used as parameter value of the functions to - indicate the system service command opcode. - */ - -/*-------------------------------------------------------------------------*//** - Device and design information services request command opcodes - */ -#define MSS_SYS_SERIAL_NUMBER_REQUEST_CMD 0x00u -#define MSS_SYS_USERCODE_REQUEST_CMD 0x01u -#define MSS_SYS_DESIGN_INFO_REQUEST_CMD 0x02u -#define MSS_SYS_DEVICE_CERTIFICATE_REQUEST_CMD 0x03u -#define MSS_SYS_READ_DIGEST_REQUEST_CMD 0x04u -#define MSS_SYS_QUERY_SECURITY_REQUEST_CMD 0x05u -#define MSS_SYS_READ_DEBUG_INFO_REQUEST_CMD 0x06u -#define MSS_SYS_READ_ENVM_PARAM_REQUEST_CMD 0x07u - -/*-------------------------------------------------------------------------*//** - Design services request command opcodes -*/ -#define MSS_SYS_BITSTREAM_AUTHENTICATE_CMD 0x23u -#define MSS_SYS_IAP_BITSTREAM_AUTHENTICATE_CMD 0x22u -#define MSS_SYS_UIC_EXECUTE_SCRIPT_CMD 0x24u -#define MSS_SYS_UIC_BITSTREAM_AUTHENTICATE_CMD 0x25u - -/*-------------------------------------------------------------------------*//** - Data security services request command opcodes -*/ -#define MSS_SYS_DIGITAL_SIGNATURE_RAW_FORMAT_REQUEST_CMD 0x19u -#define MSS_SYS_DIGITAL_SIGNATURE_DER_FORMAT_REQUEST_CMD 0x1Au -#define MSS_SYS_SNVM_NON_AUTHEN_TEXT_REQUEST_CMD 0x10u -#define MSS_SYS_SNVM_AUTHEN_TEXT_REQUEST_CMD 0x11u -#define MSS_SYS_SNVM_AUTHEN_CIPHERTEXT_REQUEST_CMD 0x12u -#define MSS_SYS_SNVM_READ_REQUEST_CMD 0x18u -#define MSS_SYS_PUF_EMULATION_SERVICE_REQUEST_CMD 0x20u -#define MSS_SYS_NONCE_SERVICE_REQUEST_CMD 0x21u - -/*-------------------------------------------------------------------------*//** - Fabric services request command opcodes -*/ -#define MSS_SYS_DIGEST_CHECK_CMD 0x47u -#define MSS_SYS_IAP_PROGRAM_BY_SPIIDX_CMD 0x42u -#define MSS_SYS_IAP_VERIFY_BY_SPIIDX_CMD 0x44u -#define MSS_SYS_IAP_PROGRAM_BY_SPIADDR_CMD 0x43u -#define MSS_SYS_IAP_VERIFY_BY_SPIADDR_CMD 0x45u -#define MSS_SYS_IAP_AUTOUPDATE_CMD 0x46u - -/*-------------------------------------------------------------------------*//** - MSS services request command opcodes -*/ -#define MSS_SYS_SPI_COPY_CMD 0X50U -#define MSS_SYS_PROBE_READ_DEBUG_CMD 0X70U -#define MSS_SYS_PROBE_WRITE_DEBUG_CMD 0X71U -#define MSS_SYS_LIVE_PROBE_A_DEBUG_CMD 0X72U -#define MSS_SYS_LIVE_PROBE_B_DEBUG_CMD 0X73U -#define MSS_SYS_MEM_SELECT_DEBUG_CMD 0X74U -#define MSS_SYS_MEM_READ_DEBUG_CMD 0X75U -#define MSS_SYS_MEM_WRITE_DEBUG_CMD 0X76U -#define MSS_SYS_APB_READ_DEBUG_CMD 0X77U -#define MSS_SYS_APB_WRITE_DEBUG_CMD 0X78U -#define MSS_SYS_DEBUG_SNAPSHOT_CMD 0X79U -#define MSS_SYS_GENERATE_OTP_CMD 0X7AU -#define MSS_SYS_MATCH_OTP_CMD 0X7BU -#define MSS_SYS_UNLOCK_DEBUG_PASSCODE 0X7CU -#define MSS_SYS_ONE_WAY_PASSCODE_CMD 0X7DU -#define MSS_SYS_TERMINATE_DEBUG_CMD 0X7EU - -/*-------------------------------------------------------------------------*//** - System service mailbox data length - ============================ - - The following constants are used to specify the mailbox data length of each - service for the service that is being requested. -*/ - -/* This constant is used for the services where no mailbox input data is - * required - */ -#define MSS_SYS_WITHOUT_CMD_DATA 0u - -#define MSS_SYS_PUF_EMULATION_SERVICE_CMD_LEN 20u -#define MSS_SYS_DIGITAL_SIGNATURE_HASH_DATA_LEN 48u - -/*SNVMADDR + RESERVED + PT*/ -#define MSS_SYS_AUTHENTICATED_TEXT_DATA_LEN 252u - -/*SNVMADDR + RESERVED + PT + USK*/ -#define MSS_SYS_NON_AUTHENTICATED_TEXT_DATA_LEN 256u - -#define MSS_SYS_SECURE_NVM_READ_DATA_LEN 16u -#define MSS_SYS_EXECUTE_UIC_SCRIPT_DATA_LEN 8u -#define MSS_SYS_UIC_BITSTREAM_AUTHENTICATE_DATA_LEN 4u -#define MSS_SYS_BITSTREAM_AUTHENTICATE_DATA_LEN 4u -#define MSS_SYS_DIGEST_CHECK_DATA_LEN 4u -#define MSS_SYS_IAP_SERVICE_DATA_LEN 4u -#define MSS_SYS_SPI_COPY_MAILBOX_DATA_LEN 17u -#define MSS_SYS_PROBE_READ_SERVICE_DATA_LEN 2u -#define MSS_SYS_PROBE_WRITE_SERVICE_DATA_LEN 11u -#define MSS_SYS_LIVE_PROBE_DEBUG_SERVICE_DATA_LEN 6u -#define MSS_SYS_MEM_SELECT_DATA_LEN 6u -#define MSS_SYS_MEM_READ_WRITE_DATA_LEN 12u -#define MSS_SYS_APB_SERVICE_DATA_LEN 24u -#define MSS_SYS_DEBUG_SNAPSHOT_DATA_LEN 5u -#define MSS_SYS_GENERATE_OTP_DATA_LEN 20u -#define MSS_SYS_MATCH_OTP_DATA_LEN 80u -#define MSS_SYS_UNLOCK_DEBUG_PASSCODE_DATA_LEN 32u -#define MSS_SYS_ONE_WAY_PASSCODE_DATA_LEN 480u - -/*-------------------------------------------------------------------------*//** - System Services mailbox data constants - ============================ - */ - -/* KEY MODE for Generate OTP service - KM_USER_KEY1 USER Key 1 - KM_USER_KEY2 USER Key 2 - KM_FACTORY_KEY FK Diversified by UID - */ -#define MSS_SYS_KM_USER_KEY1 3u -#define MSS_SYS_KM_USER_KEY2 4u -#define MSS_SYS_KM_FACTORY_KEY 7u - -/*Digest Check Input options - DIGEST_CHECK_FABRIC - Carry out digest check on Fabric - - DIGEST_CHECK_CC - Carry out digest check on UFS Fabric Configuration (CC) segment - - DIGEST_CHECK_SNVM - Carry out digest check on ROM digest in SNVM segment - - DIGEST_CHECK_UL - Carry out digest check on UFS UL segment - - DIGEST_CHECK_UKDIGEST0 - Carry out digest check on UKDIGEST0 in User Key segment - - DIGEST_CHECK_UKDIGEST1 - Carry out digest check on UKDIGEST1 in User Key segment - - DIGEST_CHECK_UKDIGEST2 - Carry out digest check on UKDIGEST2 in User Key segment (UPK1) - - DIGEST_CHECK_UKDIGEST3 - Carry out digest check on UKDIGEST3 in User Key segment (UK1) - - DIGEST_CHECK_UKDIGEST4 - Carry out digest check on UKDIGEST4 in User Key segment (DPK) - - DIGEST_CHECK_UKDIGEST5 - Carry out digest check on UKDIGEST5 in User Key segment (UPK2) - - DIGEST_CHECK_UKDIGEST6 - Carry out digest check on UKDIGEST6 in User Key segment (UK2) - - DIGEST_CHECK_UPERM - Carry out digest check on UFS Permanent lock (UPERM) segment - - DIGEST_CHECK_SYS - Carry out digest check on Factory and Factory Key Segments. -*/ -#define MSS_SYS_DIGEST_CHECK_FABRIC (0x01<<0x00u) -#define MSS_SYS_DIGEST_CHECK_CC (0x01<<0x01u) -#define MSS_SYS_DIGEST_CHECK_SNVM (0x01<<0x02u) -#define MSS_SYS_DIGEST_CHECK_UL (0x01<<0x03u) -#define MSS_SYS_DIGEST_CHECK_UKDIGEST0 (0x01<<0x04u) -#define MSS_SYS_DIGEST_CHECK_UKDIGEST1 (0x01<<0x05u) -#define MSS_SYS_DIGEST_CHECK_UKDIGEST2 (0x01<<0x06u) -#define MSS_SYS_DIGEST_CHECK_UKDIGEST3 (0x01<<0x07u) -#define MSS_SYS_DIGEST_CHECK_UKDIGEST4 (0x01<<0x08u) -#define MSS_SYS_DIGEST_CHECK_UKDIGEST5 (0x01<<0x09u) -#define MSS_SYS_DIGEST_CHECK_UKDIGEST6 (0x01<<0x0au) -#define MSS_SYS_DIGEST_CHECK_UPERM (0x01<<0x0bu) -#define MSS_SYS_DIGEST_CHECK_SYS (0x01<<0x0cu) -#define MSS_SYS_DIGEST_CHECK_UKDIGEST7 (0x01<<0x0du) -#define MSS_SYS_DIGEST_CHECK_ENVM (0x01<<0x0eu) -#define MSS_SYS_DIGEST_CHECK_UKDIGEST8 (0x01<<0x0fu) -#define MSS_SYS_DIGEST_CHECK_UKDIGEST9 (0x01<<0x10u) -#define MSS_SYS_DIGEST_CHECK_UKDIGEST10 (0x01<<0x11u) - -/*-------------------------------------------------------------------------*//** - Mailbox ECC status - Provides ECC status when the mailbox is read. The values are as follows: - 00: No ECC errors detected, data is correct. - 01: Exactly one bit erred and has been corrected. - 10: Exactly two bits erred, no correction performed. - 11: Reserved. -*/ -#define MSS_SYS_MBOX_ECC_NO_ERROR_MASK 0x00u -#define MSS_SYS_MBOX_ONEBIT_ERROR_CORRECTED_MASK 0x40u -#define MSS_SYS_MBOX_TWOBIT_ERROR_MASK 0xC0u - -/*-------------------------------------------------------------------------*//** - * Options for system services -*/ -/*Execute UIC script source peripheral options - - UIC_SOURCE_PERIPH_UPROM - Execute UIC from uPROM - - UIC_SOURCE_PERIPH_NONAUTHEN_SPIFLASH - Execute UIC from SPI flash (Not Authenticated) - - UIC_SOURCE_PERIPH_SNVM - Execute UIC from sNVM - - UIC_SOURCE_PERIPH_AUTHEN_SPIFLASH - Execute UIC from SPI flash (Authenticated) -*/ -#define MSS_SYS_UIC_SOURCE_PERIPH_UPROM 0x01u -#define MSS_SYS_UIC_SOURCE_PERIPH_NONAUTHEN_SPIFLASH 0x02u -#define MSS_SYS_UIC_SOURCE_PERIPH_SNVM 0x03u -#define MSS_SYS_UIC_SOURCE_PERIPH_AUTHEN_SPIFLASH 0x06u - -/* Permitted key modes for one way Pass-code service - * *NS -- Not Supported - */ -#define KM_INIT_FACTORY 0x00u/*NS*/ -#define KM_ZERO_RECOVERY 0x01u/*NS*/ -#define KM_DEFAULT_KEY 0x02u -#define KM_USER_KEY1 0x03u -#define KM_USER_KEY2 0x04u -#define KM_AUTH_CODE 0x06u/*NS*/ -#define KM_FACTORY_KEY 0x07u -#define KM_FACTORY_EC 0x08u/*NS*/ -#define KM_FACTORY_EC_E 0x09u/*NS*/ -#define KM_USER_EC 0x12u/*NS*/ -#define KM_USER_EC_E 0x13u/*NS*/ - -/*-------------------------------------------------------------------------*//** - Callback function handler - The callback handler is used by the application to indicate the user about - the event of interrupt when the driver is configured to execute the system - services in interrupt mode. - The callback function handler is is registered to the MSS system service - driver through the call to MSS_SYS_select_service_mode() function. - The actual name of callback function handler is not important. User can select - any name. - */ -typedef void (*mss_sys_service_handler_t)(void); - -/*-------------------------------------------------------------------------*//** - The function MSS_SYS_read_response() is used to read the response after - execution of system service in interrupt mode only. For polling mode call to - MSS_SYS_read_response is not required, as the drive performs the response - read operation. - @param - This function does not have any parameters. - @return - This function returns the status code returned by the system controller - for requested service. - - Example: - @code - status = MSS_SYS_read_response(); - - @endcode - */ -uint16_t -MSS_SYS_read_response -( - void -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_service_mode() function is for user to configure system service - execution in polling mode or interrupt mode. This function also registers the - callback handler to the driver which will be called when message interrupt - occurs. - - @param sys_service_mode - User can decide whether to execute the service in polling - mode or interrupt mode. - Example: - MSS_SYS_SERVICE_INTERRUPT_MODE - MSS_SYS_SERVICE_POLLING_MODE - - @param mss_sys_service_interrupt_handler - Callback function to the application. This function is - invoked when message interrupt occurs. - - @return - This function does not return any value. - - Example: - @code - MSS_SYS_service_mode(MSS_SYS_SERVICE_POLLING_MODE, - mss_sys_service_interrupt_handler); - @endcode -*/ -void -MSS_SYS_select_service_mode -( - uint8_t sys_service_mode, - mss_sys_service_handler_t mss_sys_service_interrupt_handler -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_get_serial_number() function fetches the 128-bit Device Serial - Number (DSN). This function is non-blocking in the interrupt mode , in that, - it will exit immediately after requesting the service. In polling mode, it - becomes a blocking function. It will block until the the service is completed - and a response is received from the system controller. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param p_serial_number - The p_serial_number parameter is a pointer to a buffer - in which the data returned by system controller will be - copied. - - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @return - This function returns the status code returned by the - system controller for this service. A '0' status code means - that the service was executed successfully. - - | STATUS | Description | Note | - |--------|----------------|-----------------------------| - | 0 | Success | | - | 1 | Error | DSN could not be read | -*/ -uint16_t -MSS_SYS_get_serial_number -( - uint8_t * p_serial_number, - uint16_t mb_offset -); - -/*-------------------------------------------------------------------------*//** - The function MSS_SYS_get_user_code() is used to execute "USERCODE" system - service. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param p_user_code - The p_user_code parameter is a pointer to a buffer - in which the data returned by system controller will be - copied. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - | STATUS | Description Note | - |--------|------------------| - | 0 | Success | -*/ -uint16_t -MSS_SYS_get_user_code -( - uint8_t * p_user_code, - uint16_t mb_offset -); - -/*-------------------------------------------------------------------------*//** - The function MSS_SYS_get_design_info() is used to execute "Get Design Info" - system service. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param p_design_info The p_design_info parameter is a pointer to a buffer - in which the data returned by system controller will be - copied. Total size of debug information is 76 bytes. - Below listed fields in the 76 bytes information are - "reserved bytes". They do not represent meaningful - information and can be ignored. - From offset 3 (size 1) - From offset 18 (size 1) - From offset 37 (size 4) - From offset 42 (size 2) - From offset 50 (size 2) - From offset 65 (size 7) - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - | STATUS | Description Note | - |--------|------------------| - | 0 | Success | - -*/ -uint16_t -MSS_SYS_get_design_info -( - uint8_t * p_design_info, - uint16_t mb_offset -); - -/*-------------------------------------------------------------------------*//** - The function MSS_SYS_get_device_certificate() is used to execute "Get Device - Certificate" system service. - - @param p_device_certificate The p_device_certificate parameter is a pointer - to a buffer in which the data returned by the - system controller will be copied. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - |STATUS | Description | Note - |----------|-------------------|------------------------------------------ - | 0 | Success |Certificate is valid & consistent with - | | |device - | 1 | Signature invalid |Certificate signature is invalid - | 2 | Device mismatch |Public key or FSN do not match device - | 3 | System error |PUF or storage failure -*/ -uint16_t -MSS_SYS_get_device_certificate -( - uint8_t * p_device_certificate, - uint16_t mb_offset -); - -/*-------------------------------------------------------------------------*//** - The function MSS_SYS_read_digest() is used to execute "Read Digest" system - service. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param p_digest The p_digest parameter is a pointer to a buffer - in which the data returned by system controller will be - copied. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - | STATUS | Description Note | - |--------|------------------| - | 0 | Success | -*/ -uint16_t -MSS_SYS_read_digest -( - uint8_t * p_digest, - uint16_t mb_offset -); - -/*-------------------------------------------------------------------------*//** - The function MSS_SYS_query_security() is used to execute "Query Security" - system service. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param p_security_locks The p_security_locks parameter is a pointer to a buffer - in which the data returned by system controller will be - copied. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - | STATUS | Description Note | - |--------|------------------| - | 0 | Success | -*/ -uint16_t -MSS_SYS_query_security -( - uint8_t * p_security_locks, - uint16_t mb_offset -); - -/*-------------------------------------------------------------------------*//** - The function MSS_SYS_read_debug_info() is used to execute "Read Debug info" - system service. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param p_debug_info The p_debug_info parameter is a pointer to a buffer - in which the data returned by system controller will be - copied. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - | STATUS | Description Note | - |--------|------------------| - | 0 | Success | -*/ -uint16_t -MSS_SYS_read_debug_info -( - uint8_t * p_debug_info, - uint16_t mb_offset -); - -/*-------------------------------------------------------------------------*//** - The function MSS_SYS_read_envm_parameter() is used to retrieve all parameters - needed for eNVM operation and programming. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param p_envm_param - The p_envm_param parameter specifies the the user buffer - which will be accumulated with envm parameters after the - service completes execution. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - |STATUS | Description | Note | - |--------|----------------|--------------------------------| - | 0 | Success | | - | 1 | Digest Error |Page digest mismatches. | - | | |Parameter values still returned.| -*/ -uint16_t -MSS_SYS_read_envm_parameter -( - uint8_t * p_envm_param, - uint16_t mb_offset -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_execute_uic_script() function is used to execute UCI script - service. This service allows the user to invoke a UIC script stored in any of - the available non-volatile memory sources. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param src_periph_type - The src_periph_type parameter specifies the type of - non-volatile memory in which the UIC script is stored. - Below is the list of all available peripheral options. - - SRC Location - 0 Reserved - 1 PROM - 2 SPI flash (Not Authenticated) - 3 SNVM - 4 Reserved - 5 Reserved - 6 SPI flash (Authenticated) - 7 Reserved - @param periph_address - The periph_address parameter specifies the address within the - selected non-volatile memory where the UIC script is stored. - The address format is different for different peripherals. - Below is the list of peripherals and corresponding addresses. - - uPROM memory -- IP Segment/Block Address - SNVM memory -- SNVM Module number. - SPI FLash (Authenticated or NonAuthenticated) - 24 or 32 bit - address. - - This function will adjust the provided value to fit into the - format expected by system controller. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - | STATUS | Description | - |---------|---------------------------------| - | 0 | Successful completion | - | 1 | SPI Max Frame Error | - | 2 | Poll Time out | - | 3 | SPI Authentication Error | - | 4 | SPI Decryption Error | - | 5 | SPI Not Master Error | - | 6 | Fabric APB Error | - | 7 | SCB Error | - | 8 | PNVM Encrypted Error | - | 9 | Address out of Range Error | - | 10 | Jump Max Error | - | 11 | Unexpected Format Error | - | 12 | Script Time out Error | -*/ -uint16_t -MSS_SYS_execute_uic_script -( - uint8_t src_periph_type, - uint32_t periph_address, - uint16_t mb_offset -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_authenticate_uic_bitstream() function is used to authenticate - the UIC Bitstream which is located in SPI through a system service routine. - This service is applicable to UIC scripts stored in SPI Flash memory only. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param spi_flash_address - The spi_flash_address parameter specifies the address within - SPI Flash memory where the UIC script is stored. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - | STATUS | Description | - |---------|---------------------------------| - | 0 | Successful completion | - | 1 | SPI Max Frame Error | - | 2 | Poll Time out | - | 3 | SPI Authentication Error | - | 4 | SPI Decryption Error | - | 5 | SPI Not Master Error | - | 6 | Fabric APB Error | - | 7 | SCB Error | - | 8 | PNVM Encrypted Error | - | 9 | Address out of Range Error | - | 10 | Jump Max Error | - | 11 | Unexpected Format Error | - | 12 | Script Time out Error | - -*/ -uint16_t -MSS_SYS_authenticate_uic_bitstream -( - uint32_t spi_flash_address, - uint16_t mb_offset -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_authenticate_bitstream() function is used to authenticate - the Bitstream which is located in SPI through a system service routine. Prior - to using the IAP service, it may be required to first validate the new - bitstream before committing the device to reprogramming, thus avoiding the - need to invoke recovery procedures if the bitstream is invalid. - - This service is applicable to bitstreams stored in SPI Flash memory only. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param spi_flash_address - The spi_flash_address parameter specifies the address within - SPI Flash memory where the bit-stream is stored. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - | STATUS | Description | - |----------|-----------------------------------------------| - | 0 | No error | - | 1 | Validator or hash chaining mismatch | - | 2 | Unexpected data received | - | 3 | Invalid/corrupt encryption key | - | 4 | Invalid component header | - | 5 | Back level not satisfied | - | 6 | Illegal bitstream mode | - | 7 | DSN binding mismatch | - | 8 | Illegal component sequence | - | 9 | Insufficient device capabilities | - | 10 | Incorrect DEVICEID | - | 11 | Unsupported bitstream protocol version | - | | (regeneration required) | - | 12 | Verify not permitted on this bitstream | - | 13 | Invalid Device Certificate | - | 14 | Invalid DIB | - | 21 | Device not in SPI Master Mode | - | 22 | No valid images found | - | 23 | No valid images found | - | 24 | Programmed design version is newer than Auto | - | | Update image found | - | 25 | Reserved | - | 26 | Selected image was invalid and no recovery | - | | was performed due to valid design in device | - | 27 | Selected and Recovery image failed to program| - | 127 | Abort | - | 128 | NVMVERIFY | - | 129 | PROTECTED | - | 130 | NOTENA | - | 131 | PNVMVERIFY | - | 132 | SYSTEM | - | 133 | BADCOMPONENT | - | 134 | HVPROGERR | - | 135 | HVSTATE | -*/ -uint16_t -MSS_SYS_authenticate_bitstream -( - uint32_t spi_flash_address, - uint16_t mb_offset -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_authenticate_iap_image() function is used to authenticate - the IAP image which is located in SPI through a system service routine. The - service checks the image descriptor and the referenced bitstream and optional - initialization data. If the image is authenticated successfully, then the - image is guaranteed to be valid when used by an IAP function. - - This service is applicable to bitstreams stored in SPI Flash memory only. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param spi_idx - The spi_idx parameter specifies the index in the SPI directory to - be used where the IAP bit-stream is stored. - - Note: To support recovery SPI_IDX=1 should be an empty slot - and the recovery image should be located in SPI_IDX=0. Since - SPI_IDX=1 should be an empty slot it shouldn’t be passed into - the system service. - @return - The MSS_SYS_authenticate_iap_image function returns - one of following status codes. The status code indicates - the success/failure status of the service execution. - - | STATUS | Description | - |----------|-----------------------------------------------| - | 0 | No error | - | 1 | Validator or hash chaining mismatch | - | 2 | Unexpected data received | - | 3 | Invalid/corrupt encryption key | - | 4 | Invalid component header | - | 5 | Back level not satisfied | - | 6 | Illegal bitstream mode | - | 7 | DSN binding mismatch | - | 8 | Illegal component sequence | - | 9 | Insufficient device capabilities | - | 10 | Incorrect DEVICEID | - | 11 | Unsupported bitstream protocol version | - | | (regeneration required) | - | 12 | Verify not permitted on this bitstream | - | 13 | Invalid Device Certificate | - | 14 | Invalid DIB | - | 21 | Device not in SPI Master Mode | - | 22 | No valid images found | - | 23 | No valid images found | - | 24 | Programmed design version is newer than Auto | - | | Update image found | - | 25 | Reserved | - | 26 | Selected image was invalid and no recovery | - | | was performed due to valid design in device | - | 27 | Selected and Recovery image failed to program| - | 127 | Abort | - | 128 | NVMVERIFY | - | 129 | PROTECTED | - | 130 | NOTENA | - | 131 | PNVMVERIFY | - | 132 | SYSTEM | - | 133 | BADCOMPONENT | - | 134 | HVPROGERR | - | 135 | HVSTATE | -*/ -uint16_t -MSS_SYS_authenticate_iap_image -( - uint32_t spi_idx -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_puf_emulation_service() function accept a challenge comprising a - 8-bit optype and 128-bit challenge and return a 256-bit response unique to - the given challenge and the device. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param p_challenge - The p_challenge parameter specifies the 128-bit challenge - to be used to generate the unique 256-bits unique - response. - @param op_type - The op_type parameter specifies the operational parameter - to be used to generate the unique 256-bits unique - response. - @param p_response - The p_response parameter is a pointer to a buffer in - which the data returned i.e. response by system controller - will be copied. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - |STATUS | Description - |--------|-----------------| - | 0 | SUCCESS | - | 1 | INTERNAL ERROR| - | | | -*/ -uint16_t -MSS_SYS_puf_emulation_service -( - uint8_t * p_challenge, - uint8_t op_type, - uint8_t* p_response, - uint16_t mb_offset -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_digital_signature_service() function is used to generate P-384 - ECDSA signature based on SHA384 hash value. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param p_hash - The p_hash parameter is a pointer to the buffer which - contain the 48 bytes SH384 Hash value(input value). - @param format - The format parameter specifies the output format of - generated SIGNATURE field. The different types of output - signature formats are as follow: - - DIGITAL_SIGNATURE_RAW_FORMAT - - DIGITAL_SIGNATURE_DER_FORMAT - @param p_response - The p_response parameter is a pointer to a buffer which - contain the generated ECDSA signature. The field may be - 96 bytes or 104 bytes depend upon the output format. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - |STATUS | Description | - |-------|--------------------------------------| - | 0 | Success | - | 1 | FEK Failure Error retrieving FEK | - | 2 | DRBG Error Failed to generate nonce | - | 3 | ECDSA Error ECDSA failed | - -*/ -uint16_t -MSS_SYS_digital_signature_service -( - uint8_t* p_hash, - uint8_t format, - uint8_t* p_response, - uint16_t mb_offset -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_secure_nvm_write() function is used to provide write access/write the - data in the sNVM region. Data can be stored in the following format: - - Non-authenticated plaintext, - - Authenticated plaintext - - Authenticated ciphertext - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param format - The format parameter specifies the format used to write - data in sNVM region. The different type of text formats - are as follow: - - NON_AUTHENTICATED_PLAINTEXT_FORMAT - - AUTHENTICATED_PLAINTEXT_FORMAT - - AUTHENTICATED_CIPHERTEXT_FORMAT - @param snvm_module - The snvm_module parameter specifies the the sNVM module - in which the data need to be written. - @param p_data - The p_data parameter is a pointer to a buffer which - contains the data to be stored in sNVM region. The data length - to be written is if fixed depending on the format parameter. - If NON_AUTHENTICATED_PLAINTEXT_FORMAT is selected then you - can write 252 bytes in the sNVM module. For other two formats - the data length is 236 bytes. - @param p_user_key - The p_user_key parameter is a pointer to a buffer which - contain the 96-bit key USK (user secret key). This user - secret key will enhance the security when authentication - is used.(i.e. When Authenticated plaintext and - Authenticated ciphertext format is selected). - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - | STATUS | Description Note | - |--------|-------------------------------------------------| - | 0 | Success | - | 1 | Invalid SNVMADDR Illegal page address | - | 2 | Write failure PNVM program/verify failed | - | 3 | System error PUF or storage failure | - | 4 | Write Not Permitted ROMFLAG is set | - | 5 | Access failure Write Access from either Fabric| - | | or MSS was blocked (PolarFire SoC only) | -*/ -uint16_t -MSS_SYS_secure_nvm_write -( - uint8_t format, - uint8_t snvm_module, - uint8_t* p_data, - uint8_t* p_user_key, - uint16_t mb_offset -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_secure_nvm_read() function is used to read data present in sNVM - region. User should provide USK key, if the data was programmed using - authentication. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param snvm_module - The snvm_module parameter specifies the sNVM module - from which the data need to be read. - @param p_user_key - The p_user_key parameter is a pointer to a buffer which - contain the 96-bit key USK (user secret key). User should - provide same secret key which is previously used for - authentication while writing data in sNVM region. - @param p_admin - The p_admin parameter is a pointer to the buffer where - the output page admin data will be stored. The page admin - data is 4 bytes long. - @param p_data - The p_data parameter is a pointer to a buffer which - contains the data read from sNVM region. User should - provide the buffer large enough to store the read data. - @param data_len - The data_len parameter specifies the number of bytes to be - read from sNVM. - The application should know whether the data written in the - chose sNVM module was previously stored using Authentication - or not. - The data_len should be 236 bytes, for authenticated data, - for not authenticated data the data_len should be 252 bytes. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - | STATUS | Description Note | - |--------|-------------------------------------------------| - | 0 | Success | - | 1 | Invalid SNVMADDR Illegal page address | - | 2 | Write failure PNVM program/verify failed | - | 3 | System error PUF or storage failure | - | 4 | Write Not Permitted ROMFLAG is set | - | 5 | Access failure Write Access from either Fabric| - | | or MSS was blocked (PolarFire SoC only) | -*/ -uint16_t -MSS_SYS_secure_nvm_read -( - uint8_t snvm_module, - uint8_t* p_user_key, - uint8_t* p_admin, - uint8_t* p_data, - uint16_t data_len, - uint16_t mb_offset -); - -/*-------------------------------------------------------------------------*//** - The function MSS_SYS_nonce_service() is used to issue "Nonce Service" system - service to the system controller. - - @param p_nonce - The p_nonce parameter is a pointer to a buffer - in which the data returned by system controller will be - copied. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @return This function returns the status code returned by the - system controller for this service. A '0' status code means - that the service was executed successfully. - - | STATUS | Description | - |------------|------------------------------------------| - | 0 | Success completion (exit) | - | 1 | Error fetching PUK | - | 2 | Error generating seed | -*/ -uint16_t -MSS_SYS_nonce_service -( - uint8_t * p_nonce, - uint16_t mb_offset -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_digest_check() function is used to Recalculates and compares - digests of selected non-volatile memories. - - This service is applicable to bitstream stored in SPI Flash memory only. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param options - The options parameter specifies the digest check options which - indicate the area on which the digest check should be performed. - Below is the list of options. You can OR these options to indicate - to perform digest check on multiple segments. - - | Options[i] | Description | - |-------------|---------------------------------------------| - | 0x01 | Fabric digest | - | 0x02 | Fabric Configuration (CC) segment | - | 0x04 | ROM digest in SNVM segment | - | 0x08 | UL segment | - | 0x10 | UKDIGEST0 in User Key segment | - | 0x20 | UKDIGEST1 in User Key segment | - | 0x40 | UKDIGEST2 in User Key segment (UPK1) | - | 0x80 | UKDIGEST3 in User Key segment (UK1) | - | 0x100 | UKDIGEST4 in User Key segment (DPK) | - | 0x200 | UKDIGEST5 in User Key segment (UPK2) | - | 0x400 | UKDIGEST6 in User Key segment (UK2) | - | 0x800 | UFS Permanent lock (UPERM) segment | - | 0x1000 | Factory and Factory Key Segments. | - | 0x2000 | UKDIGEST7 in User Key segment (HWM) | - | 0x4000 | ENVMDIGEST | - | 0x8000 | UKDIGEST8 for MSS Boot Info | - | 0x10000 | SNVM_RW_ACCESS_MAP Digest | - | 0x20000 | SBIC revocation digest | - - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @param digesterr - The digesterr parameter specifies the set bit in case of - DIGESTERR. - - | DIGESTERR[i]| Description | - |-------------|---------------------------------------------| - | 0x01 | Fabric digest | - | 0x02 | Fabric Configuration (CC) segment | - | 0x04 | ROM digest in SNVM segment | - | 0x08 | UL segment | - | 0x10 | UKDIGEST0 in User Key segment | - | 0x20 | UKDIGEST1 in User Key segment | - | 0x40 | UKDIGEST2 in User Key segment (UPK1) | - | 0x80 | UKDIGEST3 in User Key segment (UK1) | - | 0x100 | UKDIGEST4 in User Key segment (DPK) | - | 0x200 | UKDIGEST5 in User Key segment (UPK2) | - | 0x400 | UKDIGEST6 in User Key segment (UK2) | - | 0x800 | UFS Permanent lock (UPERM) segment | - | 0x1000 | Factory and Factory Key Segments. | - | 0x2000 | UKDIGEST7 in User Key segment (HWM) | - | 0x4000 | ENVMDIGEST | - | 0x8000 | UKDIGEST8 for MSS Boot Info | - | 0x10000 | SNVM_RW_ACCESS_MAP Digest | - | 0x20000 | SBIC revocation digest | - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - | STATUS DIGESTERR[i] | Description | - |---------------------|----------------------------------------| - | 1 or 0 |1 is returned if any of DIGESTERR bits | - | |are set | -*/ -uint16_t -MSS_SYS_digest_check -( - uint32_t options, - uint8_t* digesterr, - uint16_t mb_offset -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_execute_iap() function is used to IAP service. The IAP service - allows the user to reprogram the device without the need for an external - master. The user design writes the bitstream to be programmed into a SPI Flash - connected to the SPI port. When the service is invoked, the System Controller - automatically reads the bitstream from the SPI flash and programs the device. - The service allows the image to be executed in either VERIFY or PROGRAM modes. - Another option for IAP is to perform the auto-update sequence. In this case - the newest image of the first two images in the SPI directory is chosen to be - programmed. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param iap_cmd - The iap_cmd parameter specifies the specific IAP command which - depends upon VERIFY or PROGRAM modes and the SPI address method. - - iap_cmd Description - IAP_PROGRAM_BY_SPIIDX_CMD IAP program. - IAP_VERIFY_BY_SPIIDX_CMD Fabric Configuration (CC) segment - IAP_PROGRAM_BY_SPIADDR_CMD ROM digest in SNVM segment - IAP_VERIFY_BY_SPIADDR_CMD UL segment - IAP_AUTOUPDATE_CMD UKDIGEST0 in User Key segment - @param spiaddr - The spiaddr parameter specifies the either the either the index - in the SPI directory or the SPI address in the SPI Flash memory. - Below is the list of the possible meaning of spiaddr parameter - in accordance with the iap_cmd parameter. - - iap_cmd spiaddr - IAP_PROGRAM_BY_SPIIDX_CMD Index in the SPI directory. - IAP_VERIFY_BY_SPIIDX_CMD Index in the SPI directory. - IAP_PROGRAM_BY_SPIADDR_CMD SPI address in the SPI Flash memory - IAP_VERIFY_BY_SPIADDR_CMD SPI address in the SPI Flash memory - IAP_AUTOUPDATE_CMD spiaddr is ignored as No index/ - address required for this command. - - Note: For the IAP services with command IAP_PROGRAM_BY_SPIIDX_CMD and - IAP_VERIFY_BY_SPIIDX_CMD To support recovery SPI_IDX=1 should be an - empty slot and the recovery image should be located in SPI_IDX=0. - Since SPI_IDX=1 should be an empty slot it shouldn’t be passed into - the system service. - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - | STATUS | Description | - |----------|-----------------------------------------------| - | 0 | No error | - | 1 | Validator or hash chaining mismatch | - | 2 | Unexpected data received | - | 3 | Invalid/corrupt encryption key | - | 4 | Invalid component header | - | 5 | Back level not satisfied | - | 6 | Illegal bitstream mode | - | 7 | DSN binding mismatch | - | 8 | Illegal component sequence | - | 9 | Insufficient device capabilities | - | 10 | Incorrect DEVICEID | - | 11 | Unsupported bitstream protocol version | - | | (regeneration required) | - | 12 | Verify not permitted on this bitstream | - | 13 | Invalid Device Certificate | - | 14 | Invalid DIB | - | 21 | Device not in SPI Master Mode | - | 22 | No valid images found | - | 23 | No valid images found | - | 24 | Programmed design version is newer than Auto | - | | Update image found | - | 25 | Reserved | - | 26 | Selected image was invalid and no recovery | - | | was performed due to valid design in device | - | 27 | Selected and Recovery image failed to program| - | 127 | Abort | - | 128 | NVMVERIFY | - | 129 | PROTECTED | - | 130 | NOTENA | - | 131 | PNVMVERIFY | - | 132 | SYSTEM | - | 133 | BADCOMPONENT | - | 134 | HVPROGERR | - | 135 | HVSTATE | -*/ -uint16_t -MSS_SYS_execute_iap -( - uint8_t iap_cmd, - uint32_t spiaddr -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_spi_copy() function allows data to be copied from the system - controller SPI flash to MSS memory. The SPI SCK frequency is specified by a - user-defined option allowing for a maximum SCK frequency of 80MHz. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param mss_dest_addr - The 64-bit mss_dest_addr parameter specifies the destination - address in MSS where system controller copies data from SPI - flash. - @param mss_spi_flash - The 32-bit mss_spi_flash parameter specifies the source - address of data to be copied in MSS. - @param n_bytes - The n_bytes parameter specifies the number of bytes to - transfer. - @param options - The 8 bit options parameter specifies the SPI clk - divider configuration. - - OPTIONS[i] Name Description - 1:0 CLKDIV SPI clock divider configuration. - 0=80MHz, 1=40MHz, - 2=20MHz, 3=13.33MHz - - 7:2 RESERVED Reserved for future use - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - |STATUS |Description | - |----------|---------------------------------------------| - | 0 | Success | - | 1 | Device not configured for master mode | - | 2 | AXI Error | -*/ -uint16_t -MSS_SYS_spi_copy -( - uint64_t mss_dest_addr, - uint32_t mss_spi_flash, - uint32_t n_bytes, - uint8_t options, - uint16_t mb_offset -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_debug_read_probe() function will read the content of a - probe module (59 x 18b words). - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - Note: The IPROWADDR & IPSEGADDR addresses are not incremented as the - associated address space is not contiguous. If PRBADDR is 63 it will - wrap back to 0. - - @param ipseg_addr - The ipseg_addr parameter specifies the probe segment - address. - @param iprow_addr - The iprow_addr parameter specifies the probe row address. - ipseg_addr and iprow_addr parameters specifies the target - address of probe module. - @param prdata - The prdata parameter specifies the read data for probe - word i(0 to 58) within the probe module. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @param resp_offset - The resp_offset parameter specifies the offset of the - start of Mailbox response where the data received from - the service will be available. - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - |STATUS | Description | | - |---------|---------------|-------------------------------| - | 0 | Success | | - | 1 | SECERR | The operation was blocked by | - | | | device security. | -*/ -uint16_t -MSS_SYS_debug_read_probe -( - uint8_t ipseg_addr, - uint8_t iprow_addr, - uint8_t *prdata, - uint16_t mb_offset, - uint8_t resp_offset -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_debug_write_probe() function will writes up to 18 bits of - data to selected probe address. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param prb_addr - The prb_addr parameter specifies the probe address. - @param ipseg_addr - The ipseg_addr parameter specifies the probe segment - address. - @param iprow_addr - The iprow_addr parameter specifies the probe row address. - prb_addr, ipseg_addr and iprow_addr parameters specifies - the target address of one of the 59 words within a probe - module. - @param pwmask - The pwmask parameter specifies the which of the 18 bits of - pwdata shall be written to selected probe module. - @param pwdata - The pwdata parameter specifies the value to be written on - selected probe registers. - Example: If PWMASK[i] is ‘1’ then probe register i will - be written to the value specified by PWDATA[i]. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - |STATUS | Description | | - |---------|---------------|-------------------------------| - | 0 | Success | | - | 1 | SECERR | The operation was blocked by | - | | | device security. | -*/ -uint16_t -MSS_SYS_debug_write_probe -( - uint8_t prb_addr, - uint8_t ipseg_addr, - uint8_t iprow_addr, - uint32_t pwmask, - uint32_t pwdata, - uint16_t mb_offset -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_debug_live_probe() function will configures channel a or - b of the live probe system. A live probe is enabled by writing a local - address register within one of the probe segment modules. Each probe segment - module generates its own local channel a live probe outputs which are - combined by OR chains to generate a chip-level live probe channel a signal. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - Note: - When configuring channel a, channel b is not affected and vice versa. - - Live probes are intentionally not cleared by JTAG reset. - They remain in effect until either manually disabled or the device is - reset. - - @param x_addr - The parameter x_addr specifies the x co-ordinate within - target probe module. - @param y_addr - The parameter y_addr specifies the y co-ordinate within - the target probe module. - @param ipseg_addr - The ipseg_addr parameter specifies the probe segment - address. - @param iprow_addr - The iprow_addr parameter specifies the probe row address. - ipseg_addr and iprow_addr parameters specifies the target - address of probe module. - @param clear - The clear parameter is used to clear the configurations of - local channels a or b. If CLEAR is ‘1’, all local channel - x (the applicable channel a or b) configurations are - cleared before applying the new configuration - @param ioen - The ioen parameter is used to activate the probe output - pad. If IOEN is ‘1’ then the corresponding live probe - output pad is activated. Note that setting IOEN to ‘0’ - does not disable the internal live probe configuration. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @param service_cmd - The service_cmd parameter specifies the channel(channel - a or b) selected by the user. User have to provide one of - the predefined macros to select the channel for live probe - debug operation. - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - |STATUS | Description | | - |---------|---------------|-------------------------------| - | 0 | Success | | - | 1 | SECERR | The operation was blocked by | - | | | device security. | -*/ -uint16_t -MSS_SYS_debug_live_probe -( - uint8_t x_addr, - uint8_t y_addr, - uint8_t ipseg_addr, - uint8_t iprow_addr, - uint8_t clear, - uint8_t ioen, - uint16_t mb_offset, - uint8_t service_cmd -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_debug_select_mem() function will specifies a target - fabric memory to be accessed by the MEM read & MEM write services. - A handshake mechanism is used to request access to the target memory. The - memory lock may be acquired immediately allowing multiple read/write - operations to be performed as one logical transaction or the lock may be - acquired and released by individual read/write operations. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param ipblk_addr - The ipblk_addr parameter specifies the block address of - fabric memory. - @param ipseg_addr - The ipseg_addr parameter specifies the segment address. - @param iprow_addr - The iprow_addr parameter specifies the row address of - fabric memory to be accessed by MEM read and MEM write - services. - @param memtype - The memtype parameter specifies the type of fabric - memory to be used for MEM read and write services. - - MEMTYPE Peripheral MEMSIZE(words) Access Width - 0 LSRAM x1 16384 1 - 1 LSRAM x2 8192 2 - 2 LSRAM x5 4096 5 - 3 LSRAM x10 2048 10 - 4 LSRAM x20 1024 20 - 5 µRAM 64 12 - 6 µPROM 256 9 - 7 LSRAM x20 1024 20 - @param memlock_mode - The memlock_mode parameter specifies the the memory - lock states for supported MEMLOCKMODE values. - @param timeout - When a lock is requested we must consider a scenario - where the user design may not complete the request - handshake. To prevent the firmware from waiting - indefinitely, the user must specify a timeout after - which time the handshake is aborted. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - |STATUS | Description | | - |---------|---------------|-------------------------------| - | 0 | Success | | - | 1 | SECERR | The operation was blocked by | - | | | device security. | - | 2 | TIMEOUTERR | Timeout occurred. | - | 3 | LOCKERR | Target memory failed to lock | -*/ -uint16_t -MSS_SYS_debug_select_mem -( - uint8_t ipblk_addr, - uint8_t ipseg_addr, - uint8_t iprow_addr, - uint8_t memtype, - uint8_t memlock_mode, - uint16_t timeout, - uint16_t mb_offset -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_debug_read_mem() function provides an interface to read - data from the memory peripheral that is specified. A handshake mechanism is - used to request access to the target memory. The memory lock may be acquired - immediately allowing multiple read/write operations to be performed as one - logical transaction. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param mem_addr - The mem_addr parameter sets the target address within the - currently selected memory peripheral for subsequent - mem write & mem read instructions. - @param n_words - The n_words parameter value depends on memtype. The - maximum limit is the size of memory. - @param mss_addr - The mss_addr parameter specifies the MSS RAM area where - to copy the MEM Read data to. Note that all accesses will - be done with MSS User privileges. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - |STATUS | Description | | - |---------|---------------|-------------------------------| - | 0 | Success | | - | 1 | SECERR | The operation was blocked by | - | | | device security. | - | 2 | TIMEOUTERR | Timeout occurred. | - | 3 | LOCKERR | Target memory failed to lock | -*/ -uint16_t -MSS_SYS_debug_read_mem -( - uint16_t mem_addr, - uint16_t n_words, - uint64_t mss_addr, - uint16_t mb_offset -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_debug_write_mem() function provides an interface to write - data from the memory peripheral that is specified. A handshake mechanism is - used to request access to the target memory. The memory lock may be acquired - immediately allowing multiple read/write operations to be performed as one - logical transaction. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param mem_addr - The mem_addr parameter sets the target address within the - currently selected memory peripheral for subsequent - mem write & mem read instructions. - @param n_words - The n_words parameter value depends on memtype. The - maximum limit is the size of memory. - @param mss_addr - The mss_addr parameter specifies the MSS RAM area where - to copy the MEM Read data to. Note that all accesses will - be done with MSS User privileges. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - |STATUS | Description | | - |---------|---------------|-------------------------------| - | 0 | Success | | - | 1 | SECERR | The operation was blocked by | - | | | device security. | - | 2 | TIMEOUTERR | Timeout occurred. | - | 3 | LOCKERR | Target memory failed to lock | -*/ -uint16_t -MSS_SYS_debug_write_mem -( - uint16_t mem_addr, - uint16_t n_words, - uint64_t mss_addr, - uint16_t mb_offset -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_debug_read_apb() function reads a specified number of bytes - from the fabric APB bus to the specified MSS RAM area. The operation makes - the required number of read transactions using the selected transaction size, - APBDWSIZE. - The addressed fabric peripheral may generate an error or fail to respond - within a user-defined window, in which case any subsequent transfers are - aborted and corresponding error flags are returned. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param apb_addr - The apb_addr parameter specifies the target address and - transfer size for the apb write & apb read operations. - @param apb_wsize - The apb_wsize parameter specifies the data transfer size - to be used by the apb write & apb read operations. - @param max_bytes - The max_bytes parameter is used in calculation specified - number of bytes from the fabric APB bus to the Shared - Buffer. - NBYTES = MAXBYTES + 1 - @param mss_addr - The mss_addr parameter specifies the MSS RAM area where - to copy the MEM Read data to. Note that all accesses will - be done with MSS User privileges. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - | STATUS | Description| | - |---------|------------|-------------------------------------| - | 0 | Success | | - | 1 | SECERR | The operation was blocked by device | - | | | security. | - | 2 | SLVERR | The addressed fabric APB peripheral | - | | | generated a SLVERR response to the | - | | | bus transaction. | - | 3 | TIMEOUT | The addressed fabric APB peripheral | - | | | failed to respond before the | - | | | user-defined APB timeout or the | - | | | fabric power is not on. | -*/ -uint16_t -MSS_SYS_debug_read_apb -( - uint32_t apb_addr, - uint8_t apb_wsize, - uint16_t max_bytes, - uint64_t mss_addr, - uint16_t mb_offset -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_debug_write_apb() function writes bytes of data to the - current fabric APB address as specified by APBADDR. The addressed fabric - peripheral may generate an error or fail to respond within a user-defined - window, in which case the corresponding error flags are returned. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param apb_addr - The apb_addr parameter specifies the target address and - transfer size for the apb write & apb read operations. - @param apb_wsize - The apb_wsize parameter specifies the data transfer size - to be used by the apb write & apb read operations. - @param max_bytes - The max_bytes parameter is used in calculation specified - number of bytes from the fabric APB bus to the Shared - Buffer. - NBYTES = MAXBYTES + 1 - @param mss_addr - The mss_addr parameter specifies the MSS RAM area where - to copy the MEM Read data to. Note that all accesses will - be done with MSS User privileges. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - | STATUS | Description| | - |---------|------------|-------------------------------------| - | 0 | Success | | - | 1 | SECERR | The operation was blocked by device | - | | | security. | - | 2 | SLVERR | The addressed fabric APB peripheral | - | | | generated a SLVERR response to the | - | | | bus transaction. | - | 3 | TIMEOUT | The addressed fabric APB peripheral | - | | | failed to respond before the | - | | | user-defined APB timeout or the | - | | | fabric power is not on. | -*/ -uint16_t -MSS_SYS_debug_write_apb -( - uint32_t apb_addr, - uint8_t apb_wsize, - uint16_t max_bytes, - uint64_t mss_addr, - uint16_t mb_offset -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_debug_fabric_snapshot() function will service generates a - snapshot of the volatile fabric content. Data is read from each LSRAM, µRAM - and probe module and copied to the fabric APB debug port. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param port_addr - The port_addr parameter sets the address of the APB port - to be used for bulk access debug instructions which are - used in conjunction with Microsemi fabric debug IP. - The debug port is a single location on the fabric APB - bus through which debug data is streamed. - @param apb_fast_write - The apb_fast_write parameter specifies whether to use - the fast apb protocol. If apb_fast_write is ‘1’ then, - during write transfers, the fast APB protocol is used - and the address range is limited to port_addr[15:2] and - port_addr[28:16] is ignored. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - | STATUS | Description| | - |---------|------------|-------------------------------------| - | 0 | Success | | - | 1 | SECERR | The operation was blocked by device | - | | | security. | - | 2 | BUSERR | Bus error occurred and the snapshot | - | | | was aborted. | -*/ -uint16_t -MSS_SYS_debug_fabric_snapshot -( - uint32_t port_addr, - uint8_t apb_fast_write, - uint16_t mb_offset -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_otp_generate() function is used to set up the device to - The receive a one-time passcode. A 128-bit nonce, NFPGA, is generated and - The stored in volatile memory for later use in the rest of the protocol. - The A 128-bit user nonce, NUSER, is supplied by the user. - This service only unlocks the software debug lock SWL_DEBUG. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param keymode - keymode parameter specifies the key mode to be used to - transport the encrypted passcode. - The KEYMODE parameter is not checked for validity until the - MATCH OTP service is executed. Both PCTYPE and KEYMODE are - stored in volatile memory for use by the MATCH OTP service. - - Supported values for KEYMODE are shown below. - PCTYPE KEYMODE Key Mode KROOT Note - 1 3 KM_USER_KEY1 UK1 User key 1 - 1 4 KM_USER_KEY2 UK2 User key 2 - 1 7 KM_FACTORY_KEY DFK FK diversified by UID - @param n_user - The n_user parameter specifies the user nonce, is supplied - by the user. - @param n_fpga - The n_fpga parameter specifies the 128-bit nonce, NFPGA, is - generated and stored in volatile memory for later use in the - rest of the protocol. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @param ret_offset - The ret_offset parameter specifies the offset of the - start of Mailbox response where the data received from - the service will be available. - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - If any part of the service fails, then all unlocked - passcodes are re-locked and the tamper event - PASSCODE_FAIL is generated. - - | STATUS | Description| | - |---------|------------|-------------------------------------| - | 0 | Success | | - | 1 | SECERR | The operation was blocked by device | - | | | security. | - | 2 | PROTOCOLERR| If an invalid key mode is specified | - | | | fails then the returned nonce is | - | | | 0^128, the protocol is aborted and | - | | | the tamper event PASSCODE_FAIL is | - | | | generated. | -*/ -uint16_t -MSS_SYS_otp_generate -( - uint8_t keymode, - uint8_t* n_user, - uint8_t* n_fpga, - uint16_t mb_offset, - uint16_t resp_offset -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_otp_match() function is the second part of the one-time - passcode protocol. Before using this service the GENERATE OTP service must - first be used to obtain a nonce, NFPGA, from the device. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param user_id - The UID parameter is only used if the KEYMODE used for - the GENERATE OTP service was KEYMODE_FACTORY_KEY and the - passcode was not the Factory Passcode. - @param validator - The 256-bit validator parameter store the validator key. - @param otp - The otp parameter stores the otp value from generate otp - service. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @param resp_offset - The resp_offset parameter specifies the offset from the - start of Mailbox response where the data received from - the service will be available. - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - |STATUS| Description | - |------|-----------------| - | 0 | Success | - | 1 | PROTOCOLERR | - | 2 | MISMATCHERR | -*/ -uint16_t -MSS_SYS_otp_match -( - uint8_t * user_id, - uint8_t * validator, - uint8_t * otp, - uint16_t mb_offset, - uint16_t resp_offset -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_unlock_debug_passcode() function will Attempt to match - the user debug pass code using the key loaded into the mailbox. If the match - is successful the software debug lock SWL_DEBUG is temporarily inactive. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param cmd_data - The parameter cmd_data specifies the device's debug - passcode (DPK), configured by the user via bitstream. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @param ret_offset - The ret_offset parameter specifies the offset from the - start of Mailbox response where the data received from - the service will be available. - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - | STATUS | Description| | - |---------|------------|-------------------------------------| - | 0 | Success | | - | 1 | SECERR | The operation was blocked by device | - | | | security. | - | 2 | PROTOCOLERR| If the unlock operation fail for any| - | | | reason, then the tamper event | - | | | PASSCODE_FAIL is generated. | - - If any part of the service fails, then all unlocked passcodes are re-locked - and the tamper event PASSCODE_FAIL is generated. -*/ -uint16_t -MSS_SYS_unlock_debug_passcode -( - uint8_t* cmd_data, - uint16_t mb_offset, - uint16_t resp_offset -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_one_way_passcode() function is used to provide a - mechanism for overriding the software debug lock SWL_DEBUG without requiring - any interaction with an external intelligence. - The following conditions must be met for the OWP to proceed and write the - payload HWM to the device: - • HWM stored in the device must be valid - • OWP passcode matches - • Payload HWM is greater than the HWM stored in the device - After HWM is written the OWP is successful and SWL_DEBUG is unlocked. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param msg_id - The msg_id parameter stores the value of message ID. - @param validator - The 256-bit validator parameter store the validator key. - @param keymode - The Keymode parameter specifies the permitted keymodes for - OWP service. - - KEYID Key Mode Permitted - 0 KM_INIT_FACTORY No - 1 KM_ZERO_RECOVERY No - 2 KM_DEFAULT_KEY Yes - 3 KM_USER_KEY1 Yes - 4 KM_USER_KEY2 Yes - 5 - - 6 KM_AUTH_CODE No - 7 KM_FACTORY_KEY Yes - 8 KM_FACTORY_EC No - 9 KM_FACTORY_EC_E No - 10 - - 11 - - 12 KM_USER_EC No - 13 KM_USER_EC_E No - 14 - - 15 - - - @param dsn - The dsn parameter stores the value of device serial number. - @param hash - The hash parameter stores 256-bit hash value. - - @param plaintext_passcode - The plaintext_passcode parameter stores the passcode value. - @param hwm - The hwm parameter stores the high water mark value. - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @param ret_offset - The ret_offset parameter specifies the offset from the - start of Mailbox response where the data received from - the service will be available. - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - | STATUS | Description| | - |---------|------------|-------------------------------------| - | 0 | Success | | - | 1 | OWPERR | If the unlock operation fail for any| - | | | reason, then the tamper event | - | | | PASSCODE_FAIL is generated. | - - If any part of the service fails, then all unlocked passcodes are re-locked - and the tamper event PASSCODE_FAIL is generated. -*/ -uint16_t -MSS_SYS_one_way_passcode -( - uint8_t* msg_id, - uint8_t* validator, - uint8_t keymode, - uint8_t* dsn, - uint8_t* hash, - uint8_t* plaintext_passcode, - uint8_t* hwm, - uint16_t mb_offset, - uint16_t resp_offset -); - -/*-------------------------------------------------------------------------*//** - The MSS_SYS_debug_terminate() function will terminate the debug - session. Its purpose is to re-lock all the software based debug locks - (SWL_DEBUG) if needed and to release any memories previously locked using - the MEM Select Debug Service. - This function is non-blocking in the interrupt mode , in that, it will exit - immediately after requesting the service. In polling mode, it becomes a - blocking function. It will block until the the service is completed and a - response is received from the system controller. - - @param mb_offset - The mb_offset parameter specifies the offset from the start - of mailbox where the data related to this service is - available. All accesses to the mailbox are of word length - (4 bytes). A value 10 (decimal) of this parameter would - mean that the data access area for this service, in the - mailbox starts from 11th word (offset 10). - @param resp_offset - The resp_offset parameter specifies the offset from the - start of Mailbox, where the data received from - the service will be available. - @return - This function returns a value to indicate whether the - service was executed successfully or not. A zero value - indicates that the service was executed successfully. A - non-zero value can indicate that either the driver was not - able to kick-start the service or that the driver was able - to kick-start the service and receive a status response code - from the system controller. - See theory of operations section for detailed information - about the return status. - The following table lists the service status code from - system controller. - - |STATUS | Description | - |-------|--------------| - | 0 | Success | -*/ -uint16_t -MSS_SYS_debug_terminate -( - uint16_t mb_offset, - uint16_t resp_offset -); - -typedef struct -{ - volatile uint32_t SOFT_RESET; - volatile uint32_t VDETECTOR; - volatile uint32_t TVS_CONTROL; - volatile uint32_t TVS_TEMP_A; - volatile uint32_t TVS_TEMP_B; - volatile uint32_t TVS_TEMP_C; - volatile uint32_t TVS_VOLT_A; - volatile uint32_t TVS_VOLT_B; - volatile uint32_t TVS_VOLT_C; - volatile uint32_t TVS_OUTPUT0; - volatile uint32_t TVS_OUTPUT1; - volatile uint32_t TVS_TRIGGER; - volatile uint32_t TRIM_VDET1P05; - volatile uint32_t TRIM_VDET1P8; - volatile uint32_t TRIM_VDET2P5; - volatile uint32_t TRIM_TVS; - volatile uint32_t TRIM_GDET1P05; - volatile uint32_t RESERVED0; - volatile uint32_t RESERVED1; - volatile uint32_t RESERVED2; - volatile uint32_t SERVICES_CR; - volatile uint32_t SERVICES_SR; - volatile uint32_t USER_DETECTOR_SR; - volatile uint32_t USER_DETECTOR_CR; - volatile uint32_t MSS_SPI_CR; - -} SCBCTRL_TypeDef; - -#define MSS_SCBCTRL ((SCBCTRL_TypeDef*) (0x37020000UL)) - -/*2kB bytes long mailbox.*/ -#define MSS_SCBMAILBOX ((uint32_t*) (0x37020800UL)) - -/*SCB message register*/ -#define MSS_SCBMESSAGE ((uint32_t*) (0x20003190UL)) - -/*SCB message interrupt register*/ -#define MSS_SCBMESSAGE_INT ((uint32_t*) (0x2000318CUL)) - -#ifdef __cplusplus -} -#endif - -#endif /* MSS_SYS_SERVICES_H_ */ diff --git a/sm/plat/mpfs/drivers/mss_sys_services/mss_sys_services_regs.h b/sm/plat/mpfs/drivers/mss_sys_services/mss_sys_services_regs.h deleted file mode 100644 index 3611202fb..000000000 --- a/sm/plat/mpfs/drivers/mss_sys_services/mss_sys_services_regs.h +++ /dev/null @@ -1,56 +0,0 @@ - /******************************************************************************* - * Copyright 2019 Microchip Corporation. - * - * SPDX-License-Identifier: MIT - * - * Register bit offsets and masks definitions for PolarFire SoC MSS system - * services - * - * SVN $Revision$ - * SVN $Date$ - */ -#ifndef MSS_SYS_SERVICES_REGS_H_ -#define MSS_SYS_SERVICES_REGS_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -/***************SCBCTRL SERVICES_CR register*************************/ -#define SCBCTRL_SERVICESCR_REQ (0u) -#define SCBCTRL_SERVICESCR_REQ_MASK (1u << SCBCTRL_SERVICESCR_REQ) - -#define SCBCTRL_SERVICESCR_BUSY (1u) -#define SCBCTRL_SERVICESCR_BUSY_MASK (1u << SCBCTRL_SERVICESCR_BUSY) - -#define SCBCTRL_SERVICESCR_ABORT (2u) -#define SCBCTRL_SERVICESCR_ABORT_MASK (1u << SCBCTRL_SERVICESCR_ABORT) - -#define SCBCTRL_SERVICESCR_NOTIFY (3u) -#define SCBCTRL_SERVICESCR_NOTIFY_MASK (1u << SCBCTRL_SERVICESCR_NOTIFY) - -#define SCBCTRL_SERVICESCR_COMMAND (16u) -#define SCBCTRL_SERVICESCR_COMMAND_MASK (0xFFFFu << SCBCTRL_SERVICESCR_COMMAND) - - -/***************SCBCTRL SERVICES_SR registers*************************/ -#define SCBCTRL_SERVICESSR_REQ (0u) -#define SCBCTRL_SERVICESSR_REQ_MASK (1u << SCBCTRL_SERVICESSR_REQ) - -#define SCBCTRL_SERVICESSR_BUSY (1u) -#define SCBCTRL_SERVICESSR_BUSY_MASK (1u << SCBCTRL_SERVICESSR_BUSY) - -#define SCBCTRL_SERVICESSR_ABORT (2u) -#define SCBCTRL_SERVICESSR_ABORT_MASK (1u << SCBCTRL_SERVICESSR_ABORT) - -#define SCBCTRL_SERVICESSR_NOTIFY (3u) -#define SCBCTRL_SERVICESSR_NOTIFY_MASK (1u << SCBCTRL_SERVICESSR_NOTIFY) - -#define SCBCTRL_SERVICESSR_STATUS (16u) -#define SCBCTRL_SERVICESSR_STATUS_MASK (0xFFFFu << SCBCTRL_SERVICESSR_STATUS) - -#ifdef __cplusplus -} -#endif - -#endif /* MSS_SYS_SERVICES_REGS_H_ */ diff --git a/sm/plat/mpfs/drivers/mss_uart/mss_uart.c b/sm/plat/mpfs/drivers/mss_uart/mss_uart.c deleted file mode 100644 index 24e184323..000000000 --- a/sm/plat/mpfs/drivers/mss_uart/mss_uart.c +++ /dev/null @@ -1,1084 +0,0 @@ -/******************************************************************************* - * Copyright 2019-2020 Microchip FPGA Embedded Systems Solutions. - * - * SPDX-License-Identifier: MIT - * - * PolarFire SoC Microprocessor Subsystem MMUART bare metal software driver - * implementation. - * - */ - -#include "mss_uart.h" -#include "mss_uart_regs.h" -#include "../../clocks/hw_mss_clks.h" -#include -#define ASSERT sm_assert - -#ifdef __cplusplus -extern "C" { -#endif - -#define MSS_UART0_LO_BASE (MSS_UART_TypeDef*)0x20000000UL -#define MSS_UART1_LO_BASE (MSS_UART_TypeDef*)0x20100000UL -#define MSS_UART2_LO_BASE (MSS_UART_TypeDef*)0x20102000UL -#define MSS_UART3_LO_BASE (MSS_UART_TypeDef*)0x20104000UL -#define MSS_UART4_LO_BASE (MSS_UART_TypeDef*)0x20106000UL - -#define MSS_UART0_HI_BASE (MSS_UART_TypeDef*)0x28000000UL -#define MSS_UART1_HI_BASE (MSS_UART_TypeDef*)0x28100000UL -#define MSS_UART2_HI_BASE (MSS_UART_TypeDef*)0x28102000UL -#define MSS_UART3_HI_BASE (MSS_UART_TypeDef*)0x28104000UL -#define MSS_UART4_HI_BASE (MSS_UART_TypeDef*)0x28106000UL - - -mss_uart_instance_t g_mss_uart0_lo; -mss_uart_instance_t g_mss_uart1_lo; -mss_uart_instance_t g_mss_uart2_lo; -mss_uart_instance_t g_mss_uart3_lo; -mss_uart_instance_t g_mss_uart4_lo; - -mss_uart_instance_t g_mss_uart0_hi; -mss_uart_instance_t g_mss_uart1_hi; -mss_uart_instance_t g_mss_uart2_hi; -mss_uart_instance_t g_mss_uart3_hi; -mss_uart_instance_t g_mss_uart4_hi; - -/* This variable tracks if the UART peripheral is located on S5 or S6 on AXI - * switch. This will be used to determine which UART instance to be passed to - * UART interrupt handler. value 0 = S5(low). value 1 = S6(high) - * Bit positions: - * 0 ==> MMUART0 - * 1 ==> MMUART1 - * 2 ==> MMUART2 - * 3 ==> MMUART3 - * 4 ==> MMUART4 - - */ -static uint8_t g_uart_axi_pos = 0x0u; - -/******************************************************************************* - * Defines - */ -#define TX_COMPLETE 0u -#define TX_FIFO_SIZE 16u - -#define FCR_TRIG_LEVEL_MASK 0xC0u - -#define IIRF_MASK 0x0Fu - -#define INVALID_INTERRUPT 0u - -#define MSS_UART_DATA_READY ((uint8_t) 0x01) - -#define SYNC_ASYNC_MODE_MASK (0x7u) - -/******************************************************************************* - * Possible values for Interrupt Identification Register Field. - */ -#define IIRF_MODEM_STATUS 0x00u -#define IIRF_THRE 0x02u -#define IIRF_MMI 0x03u -#define IIRF_RX_DATA 0x04u -#define IIRF_RX_LINE_STATUS 0x06u -#define IIRF_DATA_TIMEOUT 0x0Cu - -/******************************************************************************* - * Receiver error status mask. - */ -#define STATUS_ERROR_MASK ( MSS_UART_OVERUN_ERROR | MSS_UART_PARITY_ERROR | \ - MSS_UART_FRAMING_ERROR | MSS_UART_BREAK_ERROR | \ - MSS_UART_FIFO_ERROR) - -/******************************************************************************* - * Local functions. - */ -static void global_init(mss_uart_instance_t * this_uart, uint32_t baud_rate, - uint8_t line_config); -static void config_baud_divisors -( - mss_uart_instance_t * this_uart, - uint32_t baudrate -); - -/******************************************************************************* - * Public Functions - *******************************************************************************/ -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -void -MSS_UART_init -( - mss_uart_instance_t* this_uart, - uint32_t baud_rate, - uint8_t line_config -) -{ - /* Perform generic initialization */ - global_init(this_uart, baud_rate, line_config); - - /* Disable LIN mode */ - this_uart->hw_reg->MM0 &= ~ELIN_MASK; - - /* Disable IrDA mode */ - this_uart->hw_reg->MM1 &= ~EIRD_MASK; - - /* Disable SmartCard Mode */ - this_uart->hw_reg->MM2 &= ~EERR_MASK; -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -void MSS_UART_lin_init -( - mss_uart_instance_t* this_uart, - uint32_t baud_rate, - uint8_t line_config -) -{ - /* Perform generic initialization */ - global_init(this_uart, baud_rate, line_config); - - /* Enable LIN mode */ - this_uart->hw_reg->MM0 |= ELIN_MASK; - - /* Disable IrDA mode */ - this_uart->hw_reg->MM1 &= ~EIRD_MASK; - - /* Disable SmartCard Mode */ - this_uart->hw_reg->MM2 &= ~EERR_MASK; -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -void -MSS_UART_irda_init -( - mss_uart_instance_t* this_uart, - uint32_t baud_rate, - uint8_t line_config, - mss_uart_rzi_polarity_t rxpol, - mss_uart_rzi_polarity_t txpol, - mss_uart_rzi_pulsewidth_t pw -) -{ - /* Perform generic initialization */ - global_init(this_uart, baud_rate, line_config); - - /* Enable LIN mode */ - this_uart->hw_reg->MM0 &= ~ELIN_MASK; - - /* Disable IrDA mode */ - this_uart->hw_reg->MM1 |= EIRD_MASK; - - ((rxpol == MSS_UART_ACTIVE_LOW) ? (this_uart->hw_reg->MM1 &= ~EIRX_MASK) : - (this_uart->hw_reg->MM1 |= EIRX_MASK)); - - ((txpol == MSS_UART_ACTIVE_LOW) ? (this_uart->hw_reg->MM1 &= ~EITX_MASK) : - (this_uart->hw_reg->MM1 |= EITX_MASK)); - - ((pw == MSS_UART_3_BY_16) ? (this_uart->hw_reg->MM1 &= ~EITP_MASK) : - (this_uart->hw_reg->MM1 |= EITP_MASK)); - /* Disable SmartCard Mode */ - this_uart->hw_reg->MM2 &= ~EERR_MASK; -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -void -MSS_UART_smartcard_init -( - mss_uart_instance_t* this_uart, - uint32_t baud_rate, - uint8_t line_config -) -{ - /* Perform generic initialization */ - global_init(this_uart, baud_rate, line_config); - - /* Disable LIN mode */ - this_uart->hw_reg->MM0 &= ~ELIN_MASK; - - /* Disable IrDA mode */ - this_uart->hw_reg->MM1 &= ~EIRD_MASK; - - /* Enable SmartCard Mode : Only when data is 8-bit and 2 stop bits*/ - if ((MSS_UART_DATA_8_BITS | MSS_UART_TWO_STOP_BITS) == - (line_config & (MSS_UART_DATA_8_BITS | MSS_UART_TWO_STOP_BITS))) - { - this_uart->hw_reg->MM2 |= EERR_MASK; - - /* Enable single wire half-duplex mode */ - this_uart->hw_reg->MM2 |= ESWM_MASK; - } -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -void -MSS_UART_polled_tx -( - mss_uart_instance_t * this_uart, - const uint8_t * pbuff, - uint32_t tx_size -) -{ - uint32_t char_idx = 0u; - uint32_t size_sent; - uint8_t status; - uint32_t temp_tx_size = tx_size; - - ASSERT(pbuff != ( (uint8_t*)0)); - ASSERT(tx_size > 0u); - - if ((pbuff != ((uint8_t*)0)) && (temp_tx_size > 0u)) - { - /* Remain in this loop until the entire input buffer - * has been transferred to the UART. - */ - do - { - /* Read the Line Status Register and update the sticky record */ - status = this_uart->hw_reg->LSR; - this_uart->status |= status; - - /* Check if TX FIFO is empty. */ - if (status & MSS_UART_THRE) - { - uint32_t fill_size = TX_FIFO_SIZE; - - /* Calculate the number of bytes to transmit. */ - if (temp_tx_size < TX_FIFO_SIZE) - { - fill_size = temp_tx_size; - } - - /* Fill the TX FIFO with the calculated the number of bytes. */ - for (size_sent = 0u; size_sent < fill_size; ++size_sent) - { - /* Send next character in the buffer. */ - this_uart->hw_reg->THR = pbuff[char_idx]; - char_idx++; - } - - /* Calculate the number of bytes remaining(not transmitted yet)*/ - temp_tx_size -= size_sent; - } - }while (temp_tx_size); - } -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -void -MSS_UART_polled_tx_string -( - mss_uart_instance_t * this_uart, - const uint8_t * p_sz_string -) -{ - uint32_t char_idx = 0u; - uint32_t fill_size; - uint8_t data_byte; - uint8_t status; - - ASSERT(p_sz_string != ((uint8_t*)0)); - - if (p_sz_string != ((uint8_t*)0)) - { - /* Get the first data byte from the input buffer */ - data_byte = p_sz_string[char_idx]; - - /* First check for the NULL terminator byte. - * Then remain in this loop until the entire string in the input buffer - * has been transferred to the UART. - */ - while (0u != data_byte) - { - /* Wait until TX FIFO is empty. */ - do - { - status = this_uart->hw_reg->LSR; - this_uart->status |= status; - }while (0u == (status & MSS_UART_THRE)); - - /* Send bytes from the input buffer until the TX FIFO is full - * or we reach the NULL terminator byte. - */ - fill_size = 0u; - - while ((0u != data_byte) && (fill_size < TX_FIFO_SIZE)) - { - /* Send the data byte */ - this_uart->hw_reg->THR = data_byte; - ++fill_size; - char_idx++; - /* Get the next data byte from the input buffer */ - data_byte = p_sz_string[char_idx]; - } - } - } -} - - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -int8_t -MSS_UART_tx_complete -( - mss_uart_instance_t * this_uart -) -{ - int8_t ret_value = 0; - uint8_t status = 0u; - - /* Read the Line Status Register and update the sticky record. */ - status = this_uart->hw_reg->LSR; - this_uart->status |= status; - - if ((TX_COMPLETE == this_uart->tx_buff_size) && - ((status & MSS_UART_TEMT) != 0u)) - { - ret_value = (int8_t)1; - } - - return ret_value; -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -size_t -MSS_UART_get_rx -( - mss_uart_instance_t * this_uart, - uint8_t * rx_buff, - size_t buff_size -) -{ - size_t rx_size = 0u; - uint8_t status = 0u; - - ASSERT(rx_buff != ((uint8_t*)0)); - ASSERT(buff_size > 0u); - - if ((rx_buff != (uint8_t*)0) && (buff_size > 0u)) - { - status = this_uart->hw_reg->LSR; - this_uart->status |= status; - - while (((status & MSS_UART_DATA_READY) != 0u) && (rx_size < buff_size)) - { - rx_buff[rx_size] = this_uart->hw_reg->RBR; - ++rx_size; - status = this_uart->hw_reg->LSR; - this_uart->status |= status; - } - } - - return rx_size; -} - - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -void -MSS_UART_set_loopback -( - mss_uart_instance_t * this_uart, - mss_uart_loopback_t loopback -) -{ - ASSERT(MSS_UART_INVALID_LOOPBACK > loopback); - - if (MSS_UART_INVALID_LOOPBACK > loopback) - { - switch (loopback) - { - case MSS_UART_LOCAL_LOOPBACK_OFF: - /* Disable local loopback */ - this_uart->hw_reg->MCR &= ~LOOP_MASK; - break; - - case MSS_UART_LOCAL_LOOPBACK_ON: - /* Enable local loopback */ - this_uart->hw_reg->MCR |= LOOP_MASK; - break; - - case MSS_UART_REMOTE_LOOPBACK_OFF: - case MSS_UART_AUTO_ECHO_OFF: - /* Disable remote loopback & automatic echo*/ - this_uart->hw_reg->MCR &= ~(RLOOP_MASK|ECHO_MASK); - break; - - case MSS_UART_REMOTE_LOOPBACK_ON: - /* Enable remote loopback */ - this_uart->hw_reg->MCR |= (1u << RLOOP); - break; - - case MSS_UART_AUTO_ECHO_ON: - /* Enable automatic echo */ - this_uart->hw_reg->MCR |= (1u << ECHO); - break; - - case MSS_UART_INVALID_LOOPBACK: - /* Fall through to default. */ - default: - ASSERT(0); - break; - } - } -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -size_t -MSS_UART_fill_tx_fifo -( - mss_uart_instance_t * this_uart, - const uint8_t * tx_buffer, - size_t tx_size -) -{ - uint8_t status = 0u; - uint32_t size_sent = 0u; - - ASSERT(tx_buffer != ( (uint8_t*)0)); - ASSERT(tx_size > 0); - - /* Fill the UART's Tx FIFO until the FIFO is full or the complete input - * buffer has been written. */ - if ((tx_buffer != ((uint8_t*)0)) && (tx_size > 0u)) - { - status = this_uart->hw_reg->LSR; - this_uart->status |= status; - - if (status & MSS_UART_THRE) - { - uint32_t fill_size = TX_FIFO_SIZE; - - if (tx_size < TX_FIFO_SIZE) - { - fill_size = tx_size; - } - - /* Fill up FIFO */ - for (size_sent = 0u; size_sent < fill_size; size_sent++) - { - /* Send next character in the buffer. */ - this_uart->hw_reg->THR = tx_buffer[size_sent]; - } - } - } - - return size_sent; -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -uint8_t -MSS_UART_get_rx_status -( - mss_uart_instance_t * this_uart -) -{ - uint8_t status = MSS_UART_INVALID_PARAM; - - /* - * Extract UART receive error status. - * Bit 1 - Overflow error status - * Bit 2 - Parity error status - * Bit 3 - Frame error status - * Bit 4 - Break interrupt indicator - * Bit 7 - FIFO data error status - */ - this_uart->status |= (this_uart->hw_reg->LSR); - status = (this_uart->status & STATUS_ERROR_MASK); - /* Clear the sticky status after reading */ - this_uart->status = 0u; - - return status; -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -uint8_t -MSS_UART_get_modem_status -( - const mss_uart_instance_t * this_uart -) -{ - uint8_t status = MSS_UART_INVALID_PARAM; - - /* - * Extract UART modem status and place in lower bits of "status". - * Bit 0 - Delta Clear to Send Indicator - * Bit 1 - Delta Clear to Receive Indicator - * Bit 2 - Trailing edge of Ring Indicator detector - * Bit 3 - Delta Data Carrier Detect indicator - * Bit 4 - Clear To Send - * Bit 5 - Data Set Ready - * Bit 6 - Ring Indicator - * Bit 7 - Data Carrier Detect - */ - status = this_uart->hw_reg->MSR; - - return status; -} - -/***************************************************************************//** - * MSS_UART_get_tx_status. - * See mss_uart.h for details of how to use this function. - */ -uint8_t -MSS_UART_get_tx_status -( - mss_uart_instance_t * this_uart -) -{ - uint8_t status = MSS_UART_TX_BUSY; - - /* Read the Line Status Register and update the sticky record. */ - status = this_uart->hw_reg->LSR; - this_uart->status |= status; - - /* - * Extract the transmit status bits from the UART's Line Status Register. - * Bit 5 - Transmitter Holding Register/FIFO Empty (THRE) status. - (If = 1, TX FIFO is empty) - * Bit 6 - Transmitter Empty (TEMT) status. - (If = 1, both TX FIFO and shift register are empty) - */ - status &= (MSS_UART_THRE | MSS_UART_TEMT); - - return status; -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -void -MSS_UART_set_break -( - mss_uart_instance_t * this_uart -) -{ - /* set break character on Tx line */ - this_uart->hw_reg->LCR |= SB_MASK; -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -void -MSS_UART_clear_break -( - mss_uart_instance_t * this_uart -) -{ - /* remove break character from Tx line */ - this_uart->hw_reg->LCR &= ~SB_MASK; -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -void -MSS_UART_enable_half_duplex -( - mss_uart_instance_t * this_uart -) -{ - /* enable single wire half-duplex mode */ - this_uart->hw_reg->MM2 |= ESWM_MASK; -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -void -MSS_UART_disable_half_duplex -( - mss_uart_instance_t * this_uart -) -{ - /* enable single wire half-duplex mode */ - this_uart->hw_reg->MM2 &= ~ESWM_MASK; -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -void -MSS_UART_set_rx_endian -( - mss_uart_instance_t * this_uart, - mss_uart_endian_t endian -) -{ - ASSERT(MSS_UART_INVALID_ENDIAN > endian); - - if (MSS_UART_INVALID_ENDIAN > endian) - { - /* Configure MSB first / LSB first for receiver */ - ((MSS_UART_LITTLEEND == endian) ? (this_uart->hw_reg->MM1 &= ~E_MSB_RX_MASK) : - (this_uart->hw_reg->MM1 |= E_MSB_RX_MASK)); - } -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -void -MSS_UART_set_tx_endian -( - mss_uart_instance_t * this_uart, - mss_uart_endian_t endian -) -{ - ASSERT(MSS_UART_INVALID_ENDIAN > endian); - - if (MSS_UART_INVALID_ENDIAN > endian) - { - /* Configure MSB first / LSB first for transmitter */ - ((MSS_UART_LITTLEEND == endian) ? (this_uart->hw_reg->MM1 &= ~E_MSB_TX_MASK) : - (this_uart->hw_reg->MM1 |= E_MSB_TX_MASK)) ; - } -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -void -MSS_UART_set_filter_length -( - mss_uart_instance_t * this_uart, - mss_uart_filter_length_t length -) -{ - ASSERT(MSS_UART_INVALID_FILTER_LENGTH > length); - - if (MSS_UART_INVALID_FILTER_LENGTH > length) - { - /* Configure glitch filter length */ - this_uart->hw_reg->GFR = (uint8_t)length; - } -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -void -MSS_UART_enable_afm -( - mss_uart_instance_t * this_uart -) -{ - /* Disable RX FIFO till address flag with correct address is received */ - this_uart->hw_reg->MM2 |= EAFM_MASK; -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -void -MSS_UART_disable_afm -( - mss_uart_instance_t * this_uart -) -{ - /* Enable RX FIFO irrespective of address flag and - correct address is received */ - this_uart->hw_reg->MM2 &= ~EAFM_MASK; -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -void -MSS_UART_enable_afclear -( - mss_uart_instance_t * this_uart -) -{ - /* Enable address flag clearing */ - /* Disable RX FIFO till another address flag with - correct address is received */ - this_uart->hw_reg->MM2 |= EAFC_MASK; -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -void -MSS_UART_disable_afclear -( - mss_uart_instance_t * this_uart -) -{ - /* Disable address flag clearing */ - this_uart->hw_reg->MM2 &= ~EAFC_MASK; -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -void -MSS_UART_enable_rx_timeout -( - mss_uart_instance_t * this_uart, - uint8_t timeout -) -{ - /* Load the receive timeout value */ - this_uart->hw_reg->RTO = timeout; - - /*Enable receiver time-out */ - this_uart->hw_reg->MM0 |= ERTO_MASK; -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -void -MSS_UART_disable_rx_timeout -( - mss_uart_instance_t * this_uart -) -{ - /*Disable receiver time-out */ - this_uart->hw_reg->MM0 &= ~ERTO_MASK; -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -void -MSS_UART_enable_tx_time_guard -( - mss_uart_instance_t * this_uart, - uint8_t timeguard -) -{ - /* Load the transmitter time guard value */ - this_uart->hw_reg->TTG = timeguard; - - /*Enable transmitter time guard */ - this_uart->hw_reg->MM0 |= ETTG_MASK; -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -void -MSS_UART_disable_tx_time_guard -( - mss_uart_instance_t * this_uart -) -{ - /*Disable transmitter time guard */ - this_uart->hw_reg->MM0 &= ~ETTG_MASK; -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -void -MSS_UART_set_address -( - mss_uart_instance_t * this_uart, - uint8_t address -) -{ - this_uart->hw_reg->ADR = address; -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -void -MSS_UART_set_ready_mode -( - mss_uart_instance_t * this_uart, - mss_uart_ready_mode_t mode -) -{ - ASSERT(MSS_UART_INVALID_READY_MODE > mode); - - if (MSS_UART_INVALID_READY_MODE > mode ) - { - /* Configure mode 0 or mode 1 for TXRDY and RXRDY */ - ((MSS_UART_READY_MODE0 == mode) ? (this_uart->hw_reg->FCR &= ~RDYMODE_MASK) : - (this_uart->hw_reg->FCR |= RDYMODE_MASK) ); - } -} - -/***************************************************************************//** - * See mss_uart.h for details of how to use this function. - */ -void -MSS_UART_set_usart_mode -( - mss_uart_instance_t * this_uart, - mss_uart_usart_mode_t mode -) -{ - ASSERT(MSS_UART_INVALID_SYNC_MODE > mode); - - if (MSS_UART_INVALID_SYNC_MODE > mode) - { - /* Nothing to do for the baudrate: - operates at PCLK / 2 + glitch filter length */ - /* Clear the ESYN bits 2:0 */ - this_uart->hw_reg->MM0 &= ~SYNC_ASYNC_MODE_MASK; - this_uart->hw_reg->MM0 |= (uint8_t)mode; - } -} - -/******************************************************************************* - * Local Functions - *******************************************************************************/ -/******************************************************************************* - * Global initialization for all modes - */ -static void global_init -( - mss_uart_instance_t * this_uart, - uint32_t baud_rate, - uint8_t line_config -) -{ - if ((&g_mss_uart0_lo == this_uart)) - { - this_uart->hw_reg = MSS_UART0_LO_BASE; - g_uart_axi_pos &= ~0x01u; - } - - else if (&g_mss_uart1_lo == this_uart) - { - - this_uart->hw_reg = MSS_UART1_LO_BASE; - g_uart_axi_pos &= ~0x02u; - } - - else if (&g_mss_uart2_lo == this_uart) - { - this_uart->hw_reg = MSS_UART2_LO_BASE; - g_uart_axi_pos &= ~0x04u; - } - - else if (&g_mss_uart3_lo == this_uart) - { - this_uart->hw_reg = MSS_UART3_LO_BASE; - g_uart_axi_pos &= ~0x08u; - } - - else if (&g_mss_uart4_lo == this_uart) - { - this_uart->hw_reg = MSS_UART4_LO_BASE; - g_uart_axi_pos &= ~0x10u; - } - - else if ((&g_mss_uart0_hi == this_uart)) - { - this_uart->hw_reg = MSS_UART0_HI_BASE; - g_uart_axi_pos |= 0x01u; - } - - else if (&g_mss_uart1_hi == this_uart) - { - this_uart->hw_reg = MSS_UART1_HI_BASE; - g_uart_axi_pos |= 0x02u; - } - - else if (&g_mss_uart2_hi == this_uart) - { - this_uart->hw_reg = MSS_UART2_HI_BASE; - g_uart_axi_pos |= 0x04u; - } - - else if (&g_mss_uart3_hi == this_uart) - { - this_uart->hw_reg = MSS_UART3_HI_BASE; - g_uart_axi_pos |= 0x08u; - } - - else if (&g_mss_uart4_hi == this_uart) - { - this_uart->hw_reg = MSS_UART4_HI_BASE; - g_uart_axi_pos |= 0x10u; - } - else - { - ASSERT(0); /*Comment to avoid LDRA warning*/ - } - - /* disable interrupts */ - this_uart->hw_reg->IER = 0u; - - /* FIFO configuration */ - this_uart->hw_reg->FCR = 0u; - - /* clear receiver FIFO */ - this_uart->hw_reg->FCR |= CLEAR_RX_FIFO_MASK; - - /* clear transmitter FIFO */ - this_uart->hw_reg->FCR |= CLEAR_TX_FIFO_MASK; - - /* set default READY mode : Mode 0*/ - /* enable RXRDYN and TXRDYN pins. The earlier FCR write to set the TX FIFO - * trigger level inadvertently disabled the FCR_RXRDY_TXRDYN_EN bit. */ - this_uart->hw_reg->FCR |= RXRDY_TXRDYN_EN_MASK; - - /* disable loopback : local * remote */ - this_uart->hw_reg->MCR &= ~LOOP_MASK; - - this_uart->hw_reg->MCR &= ~RLOOP_MASK; - - /* set default TX endian */ - this_uart->hw_reg->MM1 &= ~E_MSB_TX_MASK; - - /* set default RX endian */ - this_uart->hw_reg->MM1 &= ~E_MSB_RX_MASK; - - /* default AFM : disabled */ - this_uart->hw_reg->MM2 &= ~EAFM_MASK; - - /* disable TX time guard */ - this_uart->hw_reg->MM0 &= ~ETTG_MASK; - - /* set default RX timeout */ - this_uart->hw_reg->MM0 &= ~ERTO_MASK; - - /* disable fractional baud-rate */ - this_uart->hw_reg->MM0 &= ~EFBR_MASK; - - /* disable single wire mode */ - this_uart->hw_reg->MM2 &= ~ESWM_MASK; - - /* set filter to minimum value */ - this_uart->hw_reg->GFR = 0u; - - /* set default TX time guard */ - this_uart->hw_reg->TTG = 0u; - - /* set default RX timeout */ - this_uart->hw_reg->RTO = 0u; - - /* - * Configure baud rate divisors. This uses the fractional baud rate divisor - * where possible to provide the most accurate baud rat possible. - */ - config_baud_divisors(this_uart, baud_rate); - - /* set the line control register (bit length, stop bits, parity) */ - this_uart->hw_reg->LCR = line_config; - - /* Instance setup */ - this_uart->baudrate = baud_rate; - this_uart->lineconfig = line_config; - this_uart->tx_buff_size = TX_COMPLETE; - this_uart->tx_buffer = (const uint8_t*)0; - this_uart->tx_idx = 0u; - - /* Initialize the sticky status */ - this_uart->status = 0u; -} - -/***************************************************************************//** - * Configure baud divisors using fractional baud rate if possible. - */ -static void -config_baud_divisors -( - mss_uart_instance_t * this_uart, - uint32_t baudrate -) -{ - uint32_t baud_value; - uint32_t baud_value_by_64; - uint32_t baud_value_by_128; - uint32_t fractional_baud_value; - uint64_t pclk_freq; - - this_uart->baudrate = baudrate; - - /* Use the system clock value from hw_platform.h */ - pclk_freq = LIBERO_SETTING_MSS_APB_AHB_CLK; - - /* - * Compute baud value based on requested baud rate and PCLK frequency. - * The baud value is computed using the following equation: - * baud_value = PCLK_Frequency / (baud_rate * 16) - */ - baud_value_by_128 = (uint32_t)((8UL * pclk_freq) / baudrate); - baud_value_by_64 = baud_value_by_128 / 2u; - baud_value = baud_value_by_64 / 64u; - fractional_baud_value = baud_value_by_64 - (baud_value * 64u); - fractional_baud_value += (baud_value_by_128 - (baud_value * 128u)) - - (fractional_baud_value * 2u); - - /* Assert if integer baud value fits in 16-bit. */ - ASSERT(baud_value <= UINT16_MAX); - - if (baud_value <= (uint32_t)UINT16_MAX) - { - if (baud_value > 1u) - { - /* - * Use Fractional baud rate divisors - */ - /* set divisor latch */ - this_uart->hw_reg->LCR |= DLAB_MASK; - - /* msb of baud value */ - this_uart->hw_reg->DMR = (uint8_t)(baud_value >> 8); - /* lsb of baud value */ - this_uart->hw_reg->DLR = (uint8_t)baud_value; - - /* reset divisor latch */ - this_uart->hw_reg->LCR &= ~DLAB_MASK; - - /* Enable Fractional baud rate */ - this_uart->hw_reg->MM0 |= EFBR_MASK; - - /* Load the fractional baud rate register */ - ASSERT(fractional_baud_value <= (uint32_t)UINT8_MAX); - this_uart->hw_reg->DFR = (uint8_t)fractional_baud_value; - } - else - { - /* - * Do NOT use Fractional baud rate divisors. - */ - /* set divisor latch */ - this_uart->hw_reg->LCR |= DLAB_MASK; - - /* msb of baud value */ - this_uart->hw_reg->DMR = (uint8_t)(baud_value >> 8u); - - /* lsb of baud value */ - this_uart->hw_reg->DLR = (uint8_t)baud_value; - - /* reset divisor latch */ - this_uart->hw_reg->LCR &= ~DLAB_MASK; - - /* Disable Fractional baud rate */ - this_uart->hw_reg->MM0 &= ~EFBR_MASK; - } - } -} - -#ifdef __cplusplus -} -#endif diff --git a/sm/plat/mpfs/drivers/mss_uart/mss_uart.h b/sm/plat/mpfs/drivers/mss_uart/mss_uart.h deleted file mode 100644 index 8334e1013..000000000 --- a/sm/plat/mpfs/drivers/mss_uart/mss_uart.h +++ /dev/null @@ -1,2342 +0,0 @@ -/******************************************************************************* - * Copyright 2019-2020 Microchip FPGA Embedded Systems Solutions. - * - * SPDX-License-Identifier: MIT - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to - * deal in the Software without restriction, including without limitation the - * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * - * PolarFire SoC Microprocessor Subsystem MMUART bare metal software driver - * public API. - * - */ -/*=========================================================================*//** - @mainpage PolarFire SoC MSS UART Bare Metal Driver. - - ============================================================================== - Introduction - ============================================================================== - The PolarFire SoC Microprocessor subsystem (MSS) includes five multi-mode UART - (MMUART) peripherals for serial communication. This driver provides a set of - functions for controlling the MSS MMUARTs as part of a bare metal system - where no operating system is available. These drivers can be adapted for use - as part of an operating system, but the implementation of the adaptation layer - between this driver and the operating system's driver model is outside the - scope of this driver. - Note: MSS UART is synonymous with MSS MMUART in this document. - - ============================================================================== - Hardware Flow Dependencies - ============================================================================== - The configuration of all features of the MSS MMUART peripherals is covered by - this driver with the exception of the PolarFire SoC IOMUX configuration. - PolarFire SoC allows multiple non-concurrent uses of some external pins - through IOMUX configuration. This feature allows optimization of external pin - usage by assigning external pins for use by either the microprocessor - subsystem or the FPGA fabric. The MSS MMUART serial signals are routed through - IOMUXs to the PolarFire SoC device external pins. The MSS MMUART serial - signals may also be routed through IOMUXs to the PolarFire SoC FPGA fabric. - For more information on IOMUX, refer to the IOMUX section of the PolarFire SoC - Microprocessor Subsystem (MSS) User's Guide. - - The IOMUXs are configured using the PolarFire SoC MSS configurator tool. You - must ensure that the MSS MMUART peripherals are enabled and configured in the - PolarFire SoC MSS configurator if you wish to use them. For more information - on IOMUXs, refer to the IOMUX section of the PolarFire SoC microprocessor - Subsystem (MSS) User's Guide. - - On PolarFire SoC an AXI switch forms a bus matrix interconnect among multiple - masters and multiple slaves. Five RISC-V CPUs connect to the Master ports - M10 to M14 of the AXI switch. By default, all the APB peripherals are - accessible on AXI-Slave 5 of the AXI switch via the AXI to AHB and AHB to APB - bridges (referred as main APB bus). However, to support logical separation in - the Asymmetric Multi-Processing (AMP) mode of operation, the APB peripherals - can alternatively be accessed on the AXI-Slave 6 via the AXI to AHB and AHB to - APB bridges (referred as the AMP APB bus). - - Application must make sure that the desired MMUART instance is appropriately - configured on one of the APB bus described above by configuring the PolarFire - SoC system registers (SYSREG) as per the application need and that the - appropriate data structures are provided to this driver as parameter to the - functions provided by this driver. - - The base address and register addresses are defined in this driver as - constants. The interrupt number assignment for the MSS MMUART peripherals are - defined as constants in the MPFS HAL. You must ensure that the latest MPFS HAL - is included in the project settings of the SoftConsole tool chain and that it - is generated into your project. - - ============================================================================== - Theory of Operation - ============================================================================== - The MSS MMUART driver functions are grouped into the following categories: - - Initialization and configuration functions - - Polled transmit and receive functions - - Interrupt driven transmit and receive functions - - -------------------------------- - Initialization and Configuration - -------------------------------- - The MSS MMUART supports the following four broad modes of operation: - - UART or USART mode - - LIN mode - - IrDA mode - - Smartcard or ISO 7816 mode - - The MSS MMUART driver provides the MSS_UART_init(), MSS_UART_lin_init(), - MSS_UART_irda_init() and MSS_UART_smartcard_init() functions to initialize the - MSS MMUARTs for operation in one of these modes. One of these initialization - functions must be called before any other MSS MMUART driver functions can be - called. The MSS MMUART operating modes are mutually exclusive; therefore only - one of the initialization functions must be called. The first parameter of the - initialization functions is a pointer to one of ten global data structures - used to store state information for each MSS MMUART. A pointer to these data - structures is also used as the first parameter to many of the driver functions - to identify which MSS MMUART will be used by the called function. The names of - these data structures are: - - g_mss_uart0_lo - - g_mss_uart1_lo - - g_mss_uart2_lo - - g_mss_uart3_lo - - g_mss_uart4_lo - - g_mss_uart0_hi - - g_mss_uart1_hi - - g_mss_uart2_hi - - g_mss_uart3_hi - - g_mss_uart4_hi - - Therefore, any call to an MSS MMUART function should be of the form - MSS_UART_function_name( &g_mss_uart0_lo, ... ) or - MSS_UART_function_name( &g_mss_uart1_hi, ... ). - - UART or USART Mode - For the UART or USART modes of operation, the MSS MMUART driver is initialized - through a call to the MSS_UART_init() function. This function takes the UART's - configuration as its parameters. The MSS_UART_init() function must be called - before any other MSS MMUART driver functions can be called. - The MSS_UART_init() function configures the baud rate based on the input baud - rate parameter and if possible uses a fractional baud rate for greater - precision. This function disables the LIN, IrDA and SmartCard modes. - - LIN mode - For the LIN mode of operation, the MSS MMUART driver is initialized through a - call to the MSS_UART_lin_init() function. This function takes the LIN node's - configuration as its parameters. The MSS_UART_lin_init() function must be - called before any other MSS MMUART driver functions can be called. The - MSS_UART_lin_init() function configures the baud rate based on the input baud - rate parameter and if possible uses a fractional baud rate for greater - precision. This function disables the IrDA and SmartCard modes. - The driver also provides the following LIN mode configuration functions: - - MSS_UART_set_break() - - MSS_UART_clear_break() - - MSS_UART_set_pidpei_handler() - - MSS_UART_set_linbreak_handler() - - MSS_UART_set_linsync_handler() - - Note: These LIN mode configuration functions can only be called after the - MSS_UART_lin_init() function is called. - - IrDA mode - For the IrDA mode of operation, the driver is initialized through a call to - the MSS_UART_irda_init() function. This function takes the IrDA node's - configuration as its parameters. The MSS_UART_irda_init() function must be - called before any other MSS MMUART driver functions can be called. The - MSS_UART_irda_init() function configures the baud rate based on the input baud - rate parameter and if possible uses a fractional baud rate for greater - precision. This function disables the LIN and SmartCard modes. - - Smartcard or ISO 7816 mode - For the Smartcard or ISO 7816 mode of operation, the driver is initialized - through a call to the MSS_UART_smartcard_init() function. This function takes - the smartcard configuration as its parameters. The MSS_UART_smartcard_init() - function must be called before any other MSS MMUART driver functions can be - called. The MSS_UART_smartcard_init() function configures the baud rate based - on the input baud rate parameter and if possible uses a fractional baud rate - for greater precision. This function disables the LIN and IrDA modes. - The driver also provides the following Smartcard mode configuration functions: - - MSS_UART_enable_halfduplex() - - MSS_UART_disable_halfduplex() - - MSS_UART_set_nack_handler() - - Note: These Smartcard mode configuration functions can only be called after - the MSS_UART_smartcard_init() function is called. - - Common Configuration Functions - The driver also provides the configuration functions that can be used with all - MSS MMUART operating modes. These common configuration functions are as - follows: - - MSS_UART_set_rx_endian() - - MSS_UART_set_tx_endian() - - MSS_UART_enable_afclear() - - MSS_UART_disable_afclear() - - MSS_UART_enable_rx_timeout() - - MSS_UART_disable_rx_timeout() - - MSS_UART_enable_tx_time_guard() - - MSS_UART_disable_tx_time_guard() - - MSS_UART_set_address() - - MSS_UART_set_ready_mode() - - MSS_UART_set_usart_mode() - - MSS_UART_set_filter_length() - - MSS_UART_enable_afm() - - MSS_UART_disable_afm() - - Note: These configuration functions can only be called after one of the - MSS_UART_init(), MSS_UART_lin_init(), MSS_UART_irda_init() or - MSS_UART_smartcard_init() functions is called. - - -------------------------------------- - Polled Transmit and Receive Operations - -------------------------------------- - The driver can be used to transmit and receive data once initialized. - Data is transmitted using the MSS_UART_polled_tx() function. This function is - blocking, meaning that it will only return once the data passed to the - function has been sent to the MSS MMUART hardware transmitter. Data received - by the MSS MMUART hardware receiver can be read by the MSS_UART_get_rx() - function. - The MSS_UART_polled_tx_string() function is provided to transmit a NULL ('\0') - terminated string in polled mode. This function is blocking, meaning that it - will only return once the data passed to the function has been sent to the MSS - MMUART hardware transmitter. - The MSS_UART_fill_tx_fifo() function fills the MSS MMUART hardware transmit - FIFO with data from a buffer passed as a parameter and returns the number of - bytes transferred to the FIFO. If the transmit FIFO is not empty when the - MSS_UART_fill_tx_fifo() function is called it returns immediately without - transferring any data to the FIFO. - - --------------------------- - Interrupt Driven Operations - --------------------------- - The driver can also transmit or receive data under interrupt control, freeing - your application to perform other tasks until an interrupt occurs indicating - that the driver's attention is required. - - Local or PLIC interrupt: - PolarFire SoC architecture provides flexibility in terms of how the MMUART - interrupt is seen by the PolarFire SoC Core Complex. Each of the 5 MMUART - instance interrupt line is connected to the PolarFire SoC Core Complex PLIC. - The MMUART0 instance interrupt line is also available as local interrupt on - E51 processor. The MMUART1 instance interrupt onwards are available as local - interrupt on the U54_1 processor onwards. e.g. MMUART2 interrupt is available - as local interrupt on U54_2. - - Interrupt Handlers - The MSS MMUART driver supports all types of interrupt triggered by the MSS - MMUART. The driver's internal top level interrupt handler identifies the - source of the MSS MMUART interrupt and calls the corresponding lower level - handler function that you previously registered with the driver through calls - to the MSS_UART_set_rx_handler(), MSS_UART_set_tx_handler(), - MSS_UART_set_rxstatus_handler(), and MSS_UART_set_modemstatus_handler() - functions. You are responsible for creating these lower level interrupt - handlers as part of your application program and registering them with the - driver. - Note: The PolarFire SoC HAL defines the interrupt handler functions for all - 5 MMUART instances(with weak linkage) and assigns them as the interrupt - service routines (ISR) for the MSS MMUART interrupt inputs to the - PolarFire SoC Core Complex PLIC or the Local interrupts on each of the - respective CPUs. The MSS MMUART driver provides the implementation - functions all these ISRs from which it calls its own internal top level, - interrupt handler function. - - The MSS_UART_enable_irq() and MSS_UART_disable_irq() functions are used to - enable or disable the received line status, received data available/character - time-out, transmit holding register empty and modem status interrupts at the - MSS MMUART level. The MSS_UART_enable_irq() function also enables the MSS - MMUART instance interrupt at the PolarFire SoC Core Complex level. - - Note that the MSS_UART_enable_irq() and MSS_UART_disable_irq() and all the - calls to set the handler functions assume that the MMUART interrupt is - connected to the PolarFire SoC Core Complex PLIC. If you want the MMUART - interrupt to appear as a local interrupt to the corresponding HART then you - must explicitly call the MSS_UART_enable_local_irq() function. This function - will disable the PLIC interrupt (if it was previously enable) and enable the - local interrupt on the HART on which this function is being executed. - - Transmitting Data - Interrupt-driven transmit is initiated by a call to MSS_UART_irq_tx(), - specifying the block of data to transmit. Your application is then free to - perform other tasks and inquire later whether transmit has completed by - calling the MSS_UART_tx_complete() function. The MSS_UART_irq_tx() function - enables the UART's transmit holding register empty (THRE) interrupt and then, - when the interrupt goes active, the driver's default THRE interrupt handler - transfers the data block to the UART until the entire block is transmitted. - Note: You can use the MSS_UART_set_tx_handler() function to assign an - alternative handler to the THRE interrupt. In this case, you must not - use the MSS_UART_irq_tx() function to initiate the transmit, as this - will re-assign the driver's default THRE interrupt handler to the THRE - interrupt. Instead, your alternative THRE interrupt handler must include - a call to the MSS_UART_fill_tx_fifo() function to transfer the data to - the UART. - - Receiving Data - Interrupt-driven receive is performed by first calling - MSS_UART_set_rx_handler() to register a receive handler function that will be - called by the driver whenever receive data is available. You must provide this - receive handler function which must include a call to the MSS_UART_get_rx() - function to actually read the received data. - - ----------- - UART Status - ----------- - The function MSS_UART_get_rx_status() is used to read the receiver error - status. This function returns the overrun, parity, framing, break, and FIFO - error status of the receiver. - The function MSS_UART_get_tx_status() is used to read the transmitter status. - This function returns the transmit empty (TEMT) and transmit holding register - empty (THRE) status of the transmitter. - The function MSS_UART_get_modem_status() is used to read the modem status - flags. This function returns the current value of the modem status register. - - -------- - Loopback - -------- - The MSS_UART_set_loopback() function can be used to locally loopback the Tx - and Rx lines of a UART. This is not to be confused with the loopback of UART0 - to UART1, which can be achieved through the microprocessor subsystem's system - registers. - - *//*=========================================================================*/ -#ifndef __MSS_UART_H_ -#define __MSS_UART_H_ 1 - -#include -#include - -#ifndef SIFIVE_HIFIVE_UNLEASHED - -#ifdef __cplusplus -extern "C" { -#endif - - -/***************************************************************************//** - Baud rates - ========== - The following definitions are used to specify standard baud rates as a - parameter to the MSS_UART_init() function. - - | Constant | Description | - |----------------------|------------------| - | MSS_UART_110_BAUD | 110 baud rate | - | MSS_UART_300_BAUD | 300 baud rate | - | MSS_UART_600_BAUD | 600 baud rate | - | MSS_UART_1200_BAUD | 1200 baud rate | - | MSS_UART_2400_BAUD | 2400 baud rate | - | MSS_UART_4800_BAUD | 4800 baud rate | - | MSS_UART_9600_BAUD | 9600 baud rate | - | MSS_UART_19200_BAUD | 19200 baud rate | - | MSS_UART_38400_BAUD | 38400 baud rate | - | MSS_UART_57600_BAUD | 57600 baud rate | - | MSS_UART_115200_BAUD | 115200 baud rate | - | MSS_UART_230400_BAUD | 230400 baud rate | - | MSS_UART_460800_BAUD | 460800 baud rate | - | MSS_UART_921600_BAUD | 921600 baud rate | - - */ -#define MSS_UART_110_BAUD 110U -#define MSS_UART_300_BAUD 300U -#define MSS_UART_600_BAUD 600U -#define MSS_UART_1200_BAUD 1200U -#define MSS_UART_2400_BAUD 2400U -#define MSS_UART_4800_BAUD 4800U -#define MSS_UART_9600_BAUD 9600U -#define MSS_UART_19200_BAUD 19200U -#define MSS_UART_38400_BAUD 38400U -#define MSS_UART_57600_BAUD 57600U -#define MSS_UART_115200_BAUD 115200U -#define MSS_UART_230400_BAUD 230400U -#define MSS_UART_460800_BAUD 460800U -#define MSS_UART_921600_BAUD 921600U - -/***************************************************************************//** - Data Bits Length - ================ - The following defines are used to build the value of the MSS_UART_init() - function line_config parameter. - - | Constant | Description | - |----------------------|----------------------------| - | MSS_UART_DATA_5_BITS | 5 bits of data transmitted | - | MSS_UART_DATA_6_BITS | 6 bits of data transmitted | - | MSS_UART_DATA_7_BITS | 7 bits of data transmitted | - | MSS_UART_DATA_8_BITS | 8 bits of data transmitted | - - */ -#define MSS_UART_DATA_5_BITS ((uint8_t) 0x00) -#define MSS_UART_DATA_6_BITS ((uint8_t) 0x01) -#define MSS_UART_DATA_7_BITS ((uint8_t) 0x02) -#define MSS_UART_DATA_8_BITS ((uint8_t) 0x03) - -/***************************************************************************//** - Parity - ====== - The following defines are used to build the value of the MSS_UART_init() - function line_config parameter. - - | Constant | Description | - |-------------------------|--------------------------| - | MSS_UART_NO_PARITY | No parity | - | MSS_UART_ODD_PARITY | Odd Parity | - | MSS_UART_EVEN_PARITY | Even parity | - | MSS_UART_STICK_PARITY_0 | Stick parity bit to zero | - | MSS_UART_STICK_PARITY_1 | Stick parity bit to one | - - */ -#define MSS_UART_NO_PARITY ((uint8_t) 0x00) -#define MSS_UART_ODD_PARITY ((uint8_t) 0x08) -#define MSS_UART_EVEN_PARITY ((uint8_t) 0x18) -#define MSS_UART_STICK_PARITY_0 ((uint8_t) 0x38) -#define MSS_UART_STICK_PARITY_1 ((uint8_t) 0x28) - -/***************************************************************************//** - Number of Stop Bits - =================== - The following defines are used to build the value of the MSS_UART_init() - function line_config parameter. - - | Constant | Description | - |---------------------------|--------------------------| - | MSS_UART_ONE_STOP_BIT | One stop bit | - | MSS_UART_ONEHALF_STOP_BIT | One and a half stop bits | - | MSS_UART_TWO_STOP_BITS | Two stop bits | - - */ -#define MSS_UART_ONE_STOP_BIT ((uint8_t) 0x00) -#define MSS_UART_ONEHALF_STOP_BIT ((uint8_t) 0x04) -#define MSS_UART_TWO_STOP_BITS ((uint8_t) 0x04) - -/***************************************************************************//** - Receiver Error Status - ===================== - The following defines are used to determine the UART receiver error type. - These bit mask constants are used with the return value of the - MSS_UART_get_rx_status() function to find out if any errors occurred while - receiving data. - - - | Constant | Description | - |------------------------|--------------------------------------------| - | MSS_UART_NO_ERROR | No error bit mask (0x00) | - | MSS_UART_OVERUN_ERROR | Overrun error bit mask (0x02) | - | MSS_UART_PARITY_ERROR | Parity error bit mask (0x04) | - | MSS_UART_FRAMING_ERROR | Framing error bit mask (0x08) | - | MSS_UART_BREAK_ERROR | Break error bit mask (0x10) | - | MSS_UART_FIFO_ERROR | FIFO error bit mask (0x80) | - | MSS_UART_INVALID_PARAM | Invalid function parameter bit mask (0xFF) | - - */ -#define MSS_UART_INVALID_PARAM ((uint8_t)0xFF) -#define MSS_UART_NO_ERROR ((uint8_t)0x00 ) -#define MSS_UART_OVERUN_ERROR ((uint8_t)0x02) -#define MSS_UART_PARITY_ERROR ((uint8_t)0x04) -#define MSS_UART_FRAMING_ERROR ((uint8_t)0x08) -#define MSS_UART_BREAK_ERROR ((uint8_t)0x10) -#define MSS_UART_FIFO_ERROR ((uint8_t)0x80) - -/***************************************************************************//** - Transmitter Status - ================== - The following definitions are used to determine the UART transmitter status. - These bit mask constants are used with the return value of the - MSS_UART_get_tx_status() function to find out the status of the transmitter. - - | Constant | Description | - |------------------|----------------------------------------------------| - | MSS_UART_TX_BUSY | Transmitter busy (0x00) | - | MSS_UART_THRE | Transmitter holding register empty bit mask (0x20) | - | MSS_UART_TEMT | Transmitter empty bit mask (0x40) | - - */ -#define MSS_UART_TX_BUSY ((uint8_t) 0x00) -#define MSS_UART_THRE ((uint8_t) 0x20) -#define MSS_UART_TEMT ((uint8_t) 0x40) - -/***************************************************************************//** - Modem Status - ============ - The following defines are used to determine the modem status. These bit - mask constants are used with the return value of the - MSS_UART_get_modem_status() function to find out the modem status of - the UART. - - | Constant | Description | - |---------------|-------------------------------------------------| - | MSS_UART_DCTS | Delta clear to send bit mask (0x01) | - | MSS_UART_DDSR | Delta data set ready bit mask (0x02) | - | MSS_UART_TERI | Trailing edge of ring indicator bit mask (0x04) | - | MSS_UART_DDCD | Delta data carrier detect bit mask (0x08) | - | MSS_UART_CTS | Clear to send bit mask (0x10) | - | MSS_UART_DSR | Data set ready bit mask (0x20) | - | MSS_UART_RI | Ring indicator bit mask (0x40) | - | MSS_UART_DCD | Data carrier detect bit mask (0x80) | - - */ -#define MSS_UART_DCTS ((uint8_t) 0x01) -#define MSS_UART_DDSR ((uint8_t) 0x02) -#define MSS_UART_TERI ((uint8_t) 0x04) -#define MSS_UART_DDCD ((uint8_t) 0x08) -#define MSS_UART_CTS ((uint8_t) 0x10) -#define MSS_UART_DSR ((uint8_t) 0x20) -#define MSS_UART_RI ((uint8_t) 0x40) -#define MSS_UART_DCD ((uint8_t) 0x80) - - -/***************************************************************************//** - This enumeration specifies the receiver FIFO trigger level. This is the number - of bytes that must be received before the UART generates a receive data - available interrupt. It provides the allowed values for the - MSS_UART_set_rx_handler() function trigger_level parameter. - */ -typedef enum { - MSS_UART_FIFO_SINGLE_BYTE = 0x00, - MSS_UART_FIFO_FOUR_BYTES = 0x40, - MSS_UART_FIFO_EIGHT_BYTES = 0x80, - MSS_UART_FIFO_FOURTEEN_BYTES = 0xC0, - MSS_UART_FIFO_INVALID_TRIG_LEVEL - -} mss_uart_rx_trig_level_t; - -/***************************************************************************//** - This enumeration specifies the loopback configuration of the UART. It provides - the allowed values for the MSS_UART_set_loopback() function's loopback - parameter. Use MSS_UART_LOCAL_LOOPBACK_ON to set up the UART to locally - loopback its Tx and Rx lines. Use MSS_UART_REMOTE_LOOPBACK_ON to set up the - UART in remote loopback mode. - */ -typedef enum { - MSS_UART_LOCAL_LOOPBACK_OFF, - MSS_UART_LOCAL_LOOPBACK_ON, - MSS_UART_REMOTE_LOOPBACK_OFF, - MSS_UART_REMOTE_LOOPBACK_ON, - MSS_UART_AUTO_ECHO_OFF, - MSS_UART_AUTO_ECHO_ON, - MSS_UART_INVALID_LOOPBACK - -} mss_uart_loopback_t; - -/***************************************************************************//** - IrDA input / output polarity. - This enumeration specifies the RZI modem polarity for input and output signals. - This is passed as parameters in MSS_UART_irda_init() function. - */ -typedef enum { - MSS_UART_ACTIVE_LOW = 0u, - MSS_UART_ACTIVE_HIGH = 1u, - MSS_UART_INVALID_POLARITY - -} mss_uart_rzi_polarity_t; - -/***************************************************************************//** - IrDA input / output pulse width. - This enumeration specifies the RZI modem pulse width for input and output - signals. This is passed as parameters in MSS_UART_irda_init() function. - */ -typedef enum { - MSS_UART_3_BY_16 = 0u, - MSS_UART_1_BY_4 = 1u, - MSS_UART_INVALID_PW - -} mss_uart_rzi_pulsewidth_t; - -/***************************************************************************//** - Tx / Rx endianess. - This enumeration specifies the MSB first or LSB first for MSS UART transmitter - and receiver. The parameter of this type shall be passed in - MSS_UART_set_rx_endian()and MSS_UART_set_tx_endian() functions. - */ -typedef enum { - MSS_UART_LITTLEEND, - MSS_UART_BIGEND, - MSS_UART_INVALID_ENDIAN - -} mss_uart_endian_t; - -/***************************************************************************//** - Glitch filter length. - This enumeration specifies the glitch filter length. The function - MSS_UART_set_filter_length() accepts the parameter of this type. - */ -typedef enum { - MSS_UART_LEN0 = 0, - MSS_UART_LEN1 = 1, - MSS_UART_LEN2 = 2, - MSS_UART_LEN3 = 3, - MSS_UART_LEN4 = 4, - MSS_UART_LEN5 = 5, - MSS_UART_LEN6 = 6, - MSS_UART_LEN7 = 7, - MSS_UART_INVALID_FILTER_LENGTH = 8 - -} mss_uart_filter_length_t; - -/***************************************************************************//** - TXRDY and RXRDY mode. - This enumeration specifies the TXRDY and RXRDY signal modes. The function - MSS_UART_set_ready_mode() accepts the parameter of this type. - */ -typedef enum { - MSS_UART_READY_MODE0, - MSS_UART_READY_MODE1, - MSS_UART_INVALID_READY_MODE - -} mss_uart_ready_mode_t; - -/***************************************************************************//** - USART mode of operation. - This enumeration specifies the mode of operation of MSS UART when operating - as USART. The function MSS_UART_set_usart_mode() accepts the parameter of this - type. - */ -typedef enum { - MSS_UART_ASYNC_MODE = 0, - MSS_UART_SYNC_SLAVE_POS_EDGE_CLK = 1, - MSS_UART_SYNC_SLAVE_NEG_EDGE_CLK = 2, - MSS_UART_SYNC_MASTER_POS_EDGE_CLK = 3, - MSS_UART_SYNC_MASTER_NEG_EDGE_CLK = 4, - MSS_UART_INVALID_SYNC_MODE = 5 - -} mss_uart_usart_mode_t; - - -typedef enum { - MSS_UART0_LO = 0, - MSS_UART1_LO = 1, - MSS_UART2_LO = 2, - MSS_UART3_LO = 3, - MSS_UART4_LO = 4, - MSS_UART0_HI = 5, - MSS_UART1_HI = 6, - MSS_UART2_HI = 7, - MSS_UART3_HI = 8, - MSS_UAR4_HI = 9, - -} mss_uart_num_t; - -/***************************************************************************//** - MSS UART instance type. - This is type definition for MSS UART instance. You need to create and - maintain a record of this type. This holds all data regarding the MSS UART - instance - */ -typedef struct mss_uart_instance mss_uart_instance_t; - -/*----------------------------------------------------------------------------*/ -/*----------------------------------- UART -----------------------------------*/ -/*----------------------------------------------------------------------------*/ - -typedef struct -{ - union - { - volatile const uint8_t RBR; - volatile uint8_t THR; - volatile uint8_t DLR; - uint32_t RESERVED0; - }; - - union - { - volatile uint8_t DMR; - volatile uint8_t IER; - uint32_t RESERVED1; - }; - - union - { - volatile uint8_t IIR; - volatile uint8_t FCR; - uint32_t RESERVED2; - }; - - volatile uint8_t LCR; - uint8_t RESERVED3[3]; - - volatile uint8_t MCR; - uint8_t RESERVED4[3]; - - volatile const uint8_t LSR; - uint8_t RESERVED5[3]; - - volatile const uint8_t MSR; - uint8_t RESERVED6[3]; - - volatile uint8_t SR; - uint8_t RESERVED7[7]; - - volatile uint8_t IEM; - uint8_t RESERVED8[3]; - - volatile uint8_t IIM; - uint8_t RESERVED9[7]; - - volatile uint8_t MM0; - uint8_t RESERVED10[3]; - - volatile uint8_t MM1; - uint8_t RESERVED11[3]; - - volatile uint8_t MM2; - uint8_t RESERVED12[3]; - - volatile uint8_t DFR; - uint8_t RESERVED13[7]; - - volatile uint8_t GFR; - uint8_t RESERVED14[3]; - - volatile uint8_t TTG; - uint8_t RESERVED15[3]; - - volatile uint8_t RTO; - uint8_t RESERVED16[3]; - - volatile uint8_t ADR; - uint8_t RESERVED17[3]; - -} MSS_UART_TypeDef; - - -/***************************************************************************//** - mss_uart_instance. - There is one instance of this structure for each instance of the - microprocessor subsystem's UARTs. Instances of this structure are used to - identify a specific UART. A pointer to an initialized instance of the - mss_uart_instance_t structure is passed as the first parameter to - MSS UART driver functions to identify which UART should perform the - requested operation. - */ -struct mss_uart_instance{ - /* CMSIS related defines identifying the UART hardware. */ - MSS_UART_TypeDef * hw_reg; /*!< Pointer to UART registers. */ - uint32_t baudrate; /*!< Operating baud rate. */ - uint8_t lineconfig; /*!< Line configuration parameters. */ - uint8_t status; /*!< Sticky line status. */ - - /* transmit related info (used with interrupt driven transmit): */ - const uint8_t * tx_buffer; /*!< Pointer to transmit buffer. */ - uint32_t tx_buff_size; /*!< Transmit buffer size. */ - uint32_t tx_idx; /*!< Index within transmit buffer of next byte to transmit.*/ - - void* user_data; /*!< Pointer to user provided pointer for user specific use. */ - -}; - -/***************************************************************************//** - This instance of mss_uart_instance_t holds all data related to the operations - performed by the MMUART. The function MSS_UART_init() initializes this structure. - A pointer to g_mss_uart0_lo is passed as the first parameter to MSS UART driver - functions to indicate that MMUART0 should perform the requested operation. - */ - -extern mss_uart_instance_t g_mss_uart0_lo; -extern mss_uart_instance_t g_mss_uart1_lo; -extern mss_uart_instance_t g_mss_uart2_lo; -extern mss_uart_instance_t g_mss_uart3_lo; -extern mss_uart_instance_t g_mss_uart4_lo; - -extern mss_uart_instance_t g_mss_uart0_hi; -extern mss_uart_instance_t g_mss_uart1_hi; -extern mss_uart_instance_t g_mss_uart2_hi; -extern mss_uart_instance_t g_mss_uart3_hi; -extern mss_uart_instance_t g_mss_uart4_hi; - - -/***************************************************************************//** - The MSS_UART_init() function initializes and configures one of the PolarFire SoC - MSS UARTs with the configuration passed as a parameter. The configuration - parameters are the baud_rate which is used to generate the baud value and the - line_config which is used to specify the line configuration (bit length, - stop bits and parity). - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - Note that if you are using the UART on the AMP APB bus, the hardware - configuration to connect UART on AMP APB bus must already be done by the - application using SYSREG registers before initializing the UART instance - structure. - - @param baud_rate - The baud_rate parameter specifies the baud rate. It can be specified for - common baud rates using the following defines: - - MSS_UART_110_BAUD - - MSS_UART_300_BAUD - - MSS_UART_600_BAUD - - MSS_UART_1200_BAUD - - MSS_UART_2400_BAUD - - MSS_UART_4800_BAUD - - MSS_UART_9600_BAUD - - MSS_UART_19200_BAUD - - MSS_UART_38400_BAUD - - MSS_UART_57600_BAUD - - MSS_UART_115200_BAUD - - MSS_UART_230400_BAUD - - MSS_UART_460800_BAUD - - MSS_UART_921600_BAUD - - Alternatively, any nonstandard baud rate can be specified by simply passing - the actual required baud rate as the value for this parameter. - - @param line_config - The line_config parameter is the line configuration specifying the bit length, - number of stop bits and parity settings. - - This is a bitwise OR of one value from each of the following groups of - allowed values: - - One of the following to specify the transmit/receive data bit length: - - MSS_UART_DATA_5_BITS - - MSS_UART_DATA_6_BITS, - - MSS_UART_DATA_7_BITS - - MSS_UART_DATA_8_BITS - - One of the following to specify the parity setting: - - MSS_UART_NO_PARITY - - MSS_UART_EVEN_PARITY - - MSS_UART_ODD_PARITY - - MSS_UART_STICK_PARITY_0 - - MSS_UART_STICK_PARITY_1 - - One of the following to specify the number of stop bits: - - MSS_UART_ONE_STOP_BIT - - MSS_UART_ONEHALF_STOP_BIT - - MSS_UART_TWO_STOP_BITS - - @return - This function does not return a value. - - Example: - @code - #include "mss_uart.h" - - int main(void) - { - MSS_UART_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - return(0); - } - @endcode - */ -void -MSS_UART_init -( - mss_uart_instance_t* this_uart, - uint32_t baud_rate, - uint8_t line_config -); - -/***************************************************************************//** - The MSS_UART_lin_init() function is used to initialize the MSS UART for - LIN mode of operation. The configuration parameters are the baud_rate which is - used to generate the baud value and the line_config which is used to specify - the line configuration (bit length, stop bits and parity). - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - Note that if you are using the UART on the AMP APB bus, the hardware - configuration to connect UART on AMP APB bus must already be done by the - application using SYSREG registers before initializing the UART instance - structure. - - @param baud_rate - The baud_rate parameter specifies the baud rate. It can be specified for - common baud rates using the following defines: - - MSS_UART_110_BAUD - - MSS_UART_300_BAUD - - MSS_UART_600_BAUD - - MSS_UART_1200_BAUD - - MSS_UART_2400_BAUD - - MSS_UART_4800_BAUD - - MSS_UART_9600_BAUD - - MSS_UART_19200_BAUD - - MSS_UART_38400_BAUD - - MSS_UART_57600_BAUD - - MSS_UART_115200_BAUD - - MSS_UART_230400_BAUD - - MSS_UART_460800_BAUD - - MSS_UART_921600_BAUD - - Alternatively, any nonstandard baud rate can be specified by simply passing - the actual required baud rate as the value for this parameter. - - @param line_config - The line_config parameter is the line configuration specifying the bit length, - number of stop bits and parity settings. - - This is a bitwise OR of one value from each of the following groups of - allowed values: - - One of the following to specify the transmit/receive data bit length: - - MSS_UART_DATA_5_BITS - - MSS_UART_DATA_6_BITS, - - MSS_UART_DATA_7_BITS - - MSS_UART_DATA_8_BITS - - One of the following to specify the parity setting: - - MSS_UART_NO_PARITY - - MSS_UART_EVEN_PARITY - - MSS_UART_ODD_PARITY - - MSS_UART_STICK_PARITY_0 - - MSS_UART_STICK_PARITY_1 - - One of the following to specify the number of stop bits: - - MSS_UART_ONE_STOP_BIT - - MSS_UART_ONEHALF_STOP_BIT - - MSS_UART_TWO_STOP_BITS - - @return - This function does not return a value. - - Example: - @code - #include "mss_uart.h" - - int main(void) - { - MSS_UART_lin_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - return(0); - } - @endcode - */ -void -MSS_UART_lin_init -( - mss_uart_instance_t* this_uart, - uint32_t baud_rate, - uint8_t line_config -); - -/***************************************************************************//** - The MSS_UART_irda_init() function is used to initialize the MSS UART instance - referenced by the parameter this_uart for IrDA mode of operation. This - function must be called before calling any other IrDA functionality specific - functions. - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - Note that if you are using the UART on the AMP APB bus, the hardware - configuration to connect UART on AMP APB bus must already be done by the - application using SYSREG registers before initializing the UART instance - structure. - - @param baud_rate - The baud_rate parameter specifies the baud rate. It can be specified for - common baud rates using the following defines: - - MSS_UART_110_BAUD - - MSS_UART_300_BAUD - - MSS_UART_600_BAUD - - MSS_UART_1200_BAUD - - MSS_UART_2400_BAUD - - MSS_UART_4800_BAUD - - MSS_UART_9600_BAUD - - MSS_UART_19200_BAUD - - MSS_UART_38400_BAUD - - MSS_UART_57600_BAUD - - MSS_UART_115200_BAUD - - MSS_UART_230400_BAUD - - MSS_UART_460800_BAUD - - MSS_UART_921600_BAUD - - Alternatively, any nonstandard baud rate can be specified by simply passing - the actual required baud rate as the value for this parameter. - - @param line_config - The line_config parameter is the line configuration specifying the bit - length, number of stop bits and parity settings. - - This is a bitwise OR of one value from each of the following groups of - allowed values: - - One of the following to specify the transmit/receive data bit length: - - MSS_UART_DATA_5_BITS - - MSS_UART_DATA_6_BITS, - - MSS_UART_DATA_7_BITS - - MSS_UART_DATA_8_BITS - - One of the following to specify the parity setting: - - MSS_UART_NO_PARITY - - MSS_UART_EVEN_PARITY - - MSS_UART_ODD_PARITY - - MSS_UART_STICK_PARITY_0 - - MSS_UART_STICK_PARITY_1 - - One of the following to specify the number of stop bits: - - MSS_UART_ONE_STOP_BIT - - MSS_UART_ONEHALF_STOP_BIT - - MSS_UART_TWO_STOP_BITS - - @return - This function does not return a value. - - Example: - @code - MSS_UART_irda_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT, - MSS_UART_ACTIVE_LOW, - MSS_UART_ACTIVE_LOW, - MSS_UART_3_BY_16); - @endcode - */ -void -MSS_UART_irda_init -( - mss_uart_instance_t* this_uart, - uint32_t baud_rate, - uint8_t line_config, - mss_uart_rzi_polarity_t rxpol, - mss_uart_rzi_polarity_t txpol, - mss_uart_rzi_pulsewidth_t pw -); - -/***************************************************************************//** - The MSS_UART_smartcard_init() function is used to initialize the MSS UART - for ISO 7816 (smartcard) mode of operation. The configuration parameters are - the baud_rate which is used to generate the baud value and the line_config - which is used to specify the line configuration (bit length, stop bits and - parity). This function disables all other modes of the MSS UART instance - pointed by the parameter this_uart. - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - Note that if you are using the UART on the AMP APB bus, the hardware - configuration to connect UART on AMP APB bus must already be done by the - application using SYSREG registers before initializing the UART instance - structure. - - @param baud_rate - The baud_rate parameter specifies the baud rate. It can be specified for - common baud rates using the following defines: - - MSS_UART_110_BAUD - - MSS_UART_300_BAUD - - MSS_UART_600_BAUD - - MSS_UART_1200_BAUD - - MSS_UART_2400_BAUD - - MSS_UART_4800_BAUD - - MSS_UART_9600_BAUD - - MSS_UART_19200_BAUD - - MSS_UART_38400_BAUD - - MSS_UART_57600_BAUD - - MSS_UART_115200_BAUD - - MSS_UART_230400_BAUD - - MSS_UART_460800_BAUD - - MSS_UART_921600_BAUD - - Alternatively, any nonstandard baud rate can be specified by simply passing - the actual required baud rate as the value for this parameter. - - @param line_config - The line_config parameter is the line configuration specifying the bit - length, number of stop bits and parity settings. - - This is a bitwise OR of one value from each of the following groups of - allowed values: - - One of the following to specify the transmit/receive data bit length: - - MSS_UART_DATA_5_BITS - - MSS_UART_DATA_6_BITS, - - MSS_UART_DATA_7_BITS - - MSS_UART_DATA_8_BITS - - One of the following to specify the parity setting: - - MSS_UART_NO_PARITY - - MSS_UART_EVEN_PARITY - - MSS_UART_ODD_PARITY - - MSS_UART_STICK_PARITY_0 - - MSS_UART_STICK_PARITY_1 - - One of the following to specify the number of stop bits: - - MSS_UART_ONE_STOP_BIT - - MSS_UART_ONEHALF_STOP_BIT - - MSS_UART_TWO_STOP_BITS - - @return - This function does not return a value. - - Example: - @code - #include "mss_uart.h" - - int main(void) - { - MSS_UART_smartcard_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - return(0); - } - @endcode - */ -void -MSS_UART_smartcard_init -( - mss_uart_instance_t* this_uart, - uint32_t baud_rate, - uint8_t line_config -); - -/***************************************************************************//** - The function MSS_UART_polled_tx() is used to transmit data. It transfers the - contents of the transmitter data buffer, passed as a function parameter, into - the UART's hardware transmitter FIFO. It returns when the full content of the - transmit data buffer has been transferred to the UART's transmit FIFO. It is - safe to release or reuse the memory used as the transmitter data buffer once - this function returns. - - Note: This function reads the UART's line status register (LSR) to poll - for the active state of the transmitter holding register empty (THRE) bit - before transferring data from the data buffer to the transmitter FIFO. It - transfers data to the transmitter FIFO in blocks of 16 bytes or less and - allows the FIFO to empty before transferring the next block of data. - - Note: The actual transmission over the serial connection will still be - in progress when this function returns. Use the MSS_UART_get_tx_status() - function if you need to know when the transmitter is empty. - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - @param pbuff - The pbuff parameter is a pointer to a buffer containing the data to - be transmitted. - - @param tx_size - The tx_size parameter specifies the size, in bytes, of the data to - be transmitted. - - @return - This function does not return a value. - - Example: - @code - #include "mss_uart.h" - - int main(void) - { - uint8_t message[12] = "Hello World"; - - MSS_UART_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - SS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_polled_tx(&g_mss_uart0_lo, message, sizeof(message)); - - return(0); - } - @endcode - */ -void -MSS_UART_polled_tx -( - mss_uart_instance_t * this_uart, - const uint8_t * pbuff, - uint32_t tx_size -); - -/***************************************************************************//** - The function MSS_UART_polled_tx_string() is used to transmit a NULL ('\0') - terminated string. It transfers the text string, from the buffer starting at - the address pointed to by p_sz_string into the UART's hardware transmitter - FIFO. It returns when the complete string has been transferred to the UART's - transmit FIFO. It is safe to release or reuse the memory used as the string - buffer once this function returns. - - Note: This function reads the UART's line status register (LSR) to poll - for the active state of the transmitter holding register empty (THRE) bit - before transferring data from the data buffer to the transmitter FIFO. It - transfers data to the transmitter FIFO in blocks of 16 bytes or less and - allows the FIFO to empty before transferring the next block of data. - - Note: The actual transmission over the serial connection will still be - in progress when this function returns. Use the MSS_UART_get_tx_status() - function if you need to know when the transmitter is empty. - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - @param p_sz_string - The p_sz_string parameter is a pointer to a buffer containing the NULL - ('\0') terminated string to be transmitted. - - @return - This function does not return a value. - - Example: - @code - #include "mss_uart.h" - - int main(void) - { - uint8_t message[12] = "Hello World"; - - MSS_UART_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_polled_tx_string(&g_mss_uart0_lo, message); - - return(0); - } - @endcode - - */ -void -MSS_UART_polled_tx_string -( - mss_uart_instance_t * this_uart, - const uint8_t * p_sz_string -); - -/***************************************************************************//** - The MSS_UART_get_rx() function reads the content of the UART receiver's FIFO - and stores it in the receive buffer that is passed via the rx_buff function - parameter. It copies either the full contents of the FIFO into the receive - buffer, or just enough data from the FIFO to fill the receive buffer, - dependent upon the size of the receive buffer passed by the buff_size - parameter. The MSS_UART_get_rx() function returns the number of bytes copied - into the receive buffer .This function is non-blocking and will return 0 - immediately if no data has been received. - - Note: The MSS_UART_get_rx() function reads and accumulates the receiver - status of the MSS UART instance before reading each byte from the receiver's - data register/FIFO. This allows the driver to maintain a sticky record of any - receiver errors that occur as the UART receives each data byte; receiver - errors would otherwise be lost after each read from the receiver's data - register. A call to the MSS_UART_get_rx_status() function returns any receiver - errors accumulated during the execution of the MSS_UART_get_rx() function. - - Note: If you need to read the error status for each byte received, set - the buff_size to 1 and read the receive line error status for each byte - using the MSS_UART_get_rx_status() function. - - The MSS_UART_get_rx() function can be used in polled mode, where it is called - at regular intervals to find out if any data has been received, or in - interrupt driven-mode, where it is called as part of a receive handler that is - called by the driver as a result of data being received. - - Note: In interrupt driven mode you should call the MSS_UART_get_rx() - function as part of the receive handler function that you register with - the MSS UART driver through a call to MSS_UART_set_rx_handler(). - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - @param rx_buff - The rx_buff parameter is a pointer to a buffer where the received - data is copied. - - @param buff_size - The buff_size parameter specifies the size of the receive buffer in bytes. - - @return - This function returns the number of bytes that were copied into the - rx_buff buffer. It returns 0 if no data has been received. - - Polled mode example: - @code - int main( void ) - { - uint8_t rx_buff[RX_BUFF_SIZE]; - uint32_t rx_idx = 0; - - MSS_UART_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - while(1) - { - rx_size = MSS_UART_get_rx(&g_mss_uart0_lo, rx_buff, sizeof(rx_buff)); - if(rx_size > 0) - { - process_rx_data(rx_buff, rx_size); - } - task_a(); - task_b(); - } - return 0; - } - @endcode - - Interrupt driven example: - @code - int main( void ) - { - MSS_UART_init(&g_mss_uart1, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_set_rx_handler(&g_mss_uart1, - uart1_rx_handler, - MSS_UART_FIFO_SINGLE_BYTE); - - while(1) - { - task_a(); - task_b(); - } - return 0; - } - - void uart1_rx_handler(mss_uart_instance_t * this_uart) - { - uint8_t rx_buff[RX_BUFF_SIZE]; - uint32_t rx_idx = 0; - rx_size = MSS_UART_get_rx(this_uart, rx_buff, sizeof(rx_buff)); - process_rx_data(rx_buff, rx_size); - } - @endcode - */ -size_t -MSS_UART_get_rx -( - mss_uart_instance_t * this_uart, - uint8_t * rx_buff, - size_t buff_size -); - - -/***************************************************************************//** - The MSS_UART_set_loopback() function is used to locally loop-back the Tx and - Rx lines of a UART. This is not to be confused with the loop-back of UART0 - to UART1, which can be achieved through the microprocessor subsystem's - system registers. - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - @param loopback - The loopback parameter indicates whether or not the UART's transmit and - receive lines should be looped back. Allowed values are as follows: - - MSS_UART_LOCAL_LOOPBACK_ON - - MSS_UART_LOCAL_LOOPBACK_OFF - - MSS_UART_REMOTE_LOOPBACK_ON - - MSS_UART_REMOTE_LOOPBACK_OFF - - MSS_UART_AUTO_ECHO_ON - - MSS_UART_AUTO_ECHO_OFF - - @return - This function does not return a value. - - Example: - @code - MSS_UART_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_set_loopback(&g_mss_uart0_lo, MSS_UART_LOCAL_LOOPBACK_OFF); - @endcode - */ -void -MSS_UART_set_loopback -( - mss_uart_instance_t * this_uart, - mss_uart_loopback_t loopback -); - -/***************************************************************************//** - The MSS_UART_fill_tx_fifo() function fills the UART's hardware transmitter - FIFO with the data found in the transmitter buffer that is passed via the - tx_buffer function parameter. If the transmitter FIFO is not empty when - the function is called, the function returns immediately without transferring - any data to the FIFO; otherwise, the function transfers data from the - transmitter buffer to the FIFO until it is full or until the complete - contents of the transmitter buffer have been copied into the FIFO. The - function returns the number of bytes copied into the UART's transmitter FIFO. - - Note: This function reads the UART's line status register (LSR) to check - for the active state of the transmitter holding register empty (THRE) bit - before transferring data from the data buffer to the transmitter FIFO. If - THRE is 0, the function returns immediately, without transferring any data - to the FIFO. If THRE is 1, the function transfers up to 16 bytes of data - to the FIFO and then returns. - - Note: The actual transmission over the serial connection will still be - in progress when this function returns. Use the MSS_UART_get_tx_status() - function if you need to know when the transmitter is empty. - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - @param tx_buffer - The tx_buffer parameter is a pointer to a buffer containing the data - to be transmitted. - - @param tx_size - The tx_size parameter is the size in bytes, of the data to be transmitted. - - @return - This function returns the number of bytes copied into the UART's - transmitter FIFO. - - Example: - @code - void send_using_interrupt(uint8_t * pbuff, size_t tx_size) - { - size_t size_in_fifo; - size_in_fifo = MSS_UART_fill_tx_fifo(&g_mss_uart0_lo, pbuff, tx_size); - } - @endcode - */ -size_t -MSS_UART_fill_tx_fifo -( - mss_uart_instance_t * this_uart, - const uint8_t * tx_buffer, - size_t tx_size -); - -/***************************************************************************//** - The MSS_UART_get_rx_status() function returns the receiver error status of the - MSS UART instance. It reads both the current error status of the receiver from - the UART's line status register (LSR) and the accumulated error status from - preceding calls to the MSS_UART_get_rx() function, and it combines them using - a bitwise OR. It returns the cumulative overrun, parity, framing, break and - FIFO error status of the receiver, since the previous call to - MSS_UART_get_rx_status(), as an 8-bit encoded value. - - Note: The MSS_UART_get_rx() function reads and accumulates the receiver - status of the MSS UART instance before reading each byte from the receiver's - data register/FIFO. The driver maintains a sticky record of the cumulative - receiver error status, which persists after the MSS_UART_get_rx() function - returns. The MSS_UART_get_rx_status() function clears the driver's sticky - receiver error record before returning. - - Note: The driver's transmit functions also read the line status - register (LSR) as part of their implementation. When the driver reads the - LSR, the UART clears any active receiver error bits in the LSR. This could - result in the driver losing receiver errors. To avoid any loss of receiver - errors, the transmit functions also update the driver's sticky record of the - cumulative receiver error status whenever they read the LSR. - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - @return - This function returns the UART's receiver error status as an 8-bit unsigned - integer. The returned value is 0 if no receiver errors occurred. The driver - provides a set of bit mask constants that should be compared with and/or - used to mask the returned value to determine the receiver error status. - When the return value is compared to the following bit masks, a non-zero - result indicates that the corresponding error occurred: - - MSS_UART_OVERRUN_ERROR (bit mask = 0x02) - - MSS_UART_PARITY_ERROR (bit mask = 0x04) - - MSS_UART_FRAMING_ERROR (bit mask = 0x08) - - MSS_UART_BREAK_ERROR (bit mask = 0x10) - - MSS_UART_FIFO_ERROR (bit mask = 0x80) - - When the return value is compared to the following bit mask, a non-zero - result indicates that no error occurred: - - MSS_UART_NO_ERROR (bit mask = 0x00) - - Upon unsuccessful execution, this function returns: - - MSS_UART_INVALID_PARAM (bit mask = 0xFF) - - Example: - @code - uint8_t rx_data[MAX_RX_DATA_SIZE]; - uint8_t err_status; - err_status = MSS_UART_get_rx_status(&g_mss_uart0); - - if(MSS_UART_NO_ERROR == err_status) - { - rx_size = MSS_UART_get_rx(&g_mss_uart0_lo, rx_data, MAX_RX_DATA_SIZE); - } - @endcode - */ -uint8_t -MSS_UART_get_rx_status -( - mss_uart_instance_t * this_uart -); - -/***************************************************************************//** - The MSS_UART_get_modem_status() function returns the modem status of the - MSS UART instance. It reads the modem status register (MSR) and returns - the 8 bit value. The bit encoding of the returned value is exactly the - same as the definition of the bits in the MSR. - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - @return - This function returns current state of the UART's MSR as an 8 bit - unsigned integer. The driver provides the following set of bit mask - constants that should be compared with and/or used to mask the - returned value to determine the modem status: - - MSS_UART_DCTS (bit mask = 0x01) - - MSS_UART_DDSR (bit mask = 0x02) - - MSS_UART_TERI (bit mask = 0x04) - - MSS_UART_DDCD (bit mask = 0x08) - - MSS_UART_CTS (bit mask = 0x10) - - MSS_UART_DSR (bit mask = 0x20) - - MSS_UART_RI (bit mask = 0x40) - - MSS_UART_DCD (bit mask = 0x80) - - Example: - @code - void uart_modem_status_isr(mss_uart_instance_t * this_uart) - { - uint8_t status; - status = MSS_UART_get_modem_status(this_uart); - if( status & MSS_UART_DCTS ) - { - uart_dcts_handler(); - } - if( status & MSS_UART_CTS ) - { - uart_cts_handler(); - } - } - @endcode - */ -uint8_t -MSS_UART_get_modem_status -( - const mss_uart_instance_t * this_uart -); - -/***************************************************************************//** - The MSS_UART_get_tx_status() function returns the transmitter status of the - MSS UART instance. It reads both the UART's line status register (LSR) and - returns the status of the transmit holding register empty (THRE) and - transmitter empty (TEMT) bits. - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - @return - This function returns the UART's transmitter status as an 8-bit unsigned - integer. The returned value is 0 if the transmitter status bits are not - set or the function execution failed. The driver provides a set of bit - mask constants that should be compared with and/or used to mask the - returned value to determine the transmitter status. - When the return value is compared to the following bit mask, a non-zero - result indicates that the corresponding transmitter status bit is set: - - MSS_UART_THRE (bit mask = 0x20) - - MSS_UART_TEMT (bit mask = 0x40) - - When the return value is compared to the following bit mask, a non-zero - result indicates that the transmitter is busy or the function execution - failed. - - MSS_UART_TX_BUSY (bit mask = 0x00) - - Example: - @code - uint8_t tx_buff[10] = "abcdefghi"; - MSS_UART_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_polled_tx(&g_mss_uart0_lo, tx_buff, sizeof(tx_buff)); - - while(!(MSS_UART_TEMT & MSS_UART_get_tx_status(&g_mss_uart0))) - { - ; - } - @endcode - */ -uint8_t -MSS_UART_get_tx_status -( - mss_uart_instance_t * this_uart -); - -/***************************************************************************//** - The MSS_UART_set_break() function is used to send the break - (9 zeros after stop bit) signal on the TX line. This function can be used - only when the MSS UART is initialized in LIN mode by using MSS_UART_lin_init(). - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - @return - This function does not return a value. - - Example: - @code - MSS_UART_lin_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_set_break(&g_mss_uart0); - @endcode - */ -void -MSS_UART_set_break -( - mss_uart_instance_t * this_uart -); - -/***************************************************************************//** - The MSS_UART_clear_break() function is used to remove the break signal on the - TX line. This function can be used only when the MSS UART is initialized in - LIN mode by using MSS_UART_lin_init(). - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - @return - This function does not return a value. - - Example: - @code - MSS_UART_lin_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_clear_break(&g_mss_uart0_lo); - @endcode - */ -void -MSS_UART_clear_break -( - mss_uart_instance_t * this_uart -); - -/***************************************************************************//** - The MSS_UART_enable_half_duplex() function is used to enable the half-duplex - (single wire) mode for the MSS UART. Though it finds application in Smartcard - mode, half-duplex mode can be used in other modes as well. - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - @return - This function does not return a value. - - Example: - @code - MSS_UART_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_enable_half_duplex(&g_mss_uart0_lo); - @endcode - */ -void -MSS_UART_enable_half_duplex -( - mss_uart_instance_t * this_uart -); - -/***************************************************************************//** - The MSS_UART_disable_half_duplex() function is used to disable the half-duplex - (single wire) mode for the MSS UART. Though it finds application in Smartcard - mode, half-duplex mode can be used in other modes as well. - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - @return - This function does not return a value. - - Example: - @code - MSS_UART_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_disable_half_duplex(&g_mss_uart0_lo); - @endcode - */ -void -MSS_UART_disable_half_duplex -( - mss_uart_instance_t * this_uart -); - -/***************************************************************************//** - The MSS_UART_set_rx_endian() function is used to configure the LSB first or - MSB first setting for MSS UART receiver - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - @param endian - The endian parameter tells the LSB first or MSB first configuration. - This parameter is of type mss_uart_endian_t. - - @return - This function does not return a value. - - Example: - @code - MSS_UART_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_set_rx_endian(&g_mss_uart0_lo, MSS_UART_LITTLEEND); - @endcode - */ -void -MSS_UART_set_rx_endian -( - mss_uart_instance_t * this_uart, - mss_uart_endian_t endian -); - -/***************************************************************************//** - The MSS_UART_set_tx_endian() function is used to configure the LSB first or - MSB first setting for MSS UART transmitter. - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - @param endian - The endian parameter tells the LSB first or MSB first configuration. - This parameter is of type mss_uart_endian_t. - - @return - This function does not return a value. - - Example: - @code - MSS_UART_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_set_tx_endian(&g_mss_uart0_lo, MSS_UART_LITTLEEND); - @endcode - */ -void -MSS_UART_set_tx_endian -( - mss_uart_instance_t * this_uart, - mss_uart_endian_t endian -); - -/***************************************************************************//** - The MSS_UART_set_filter_length () function is used to configure the glitch - filter length of the MSS UART. This should be configured in accordance with - the chosen baud rate. - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - @param length - The length parameter is of mss_uart_filter_length_t type that determines - the length of the glitch filter. - - @return - This function does not return a value. - - Example: - @code - MSS_UART_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_set_filter_length(&g_mss_uart0_lo, MSS_UART_LEN2); - @endcode - */ -void -MSS_UART_set_filter_length -( - mss_uart_instance_t * this_uart, - mss_uart_filter_length_t length -); - -/***************************************************************************//** - The MSS_UART_enable_afm() function is used to enable address flag detection - mode of the MSS UART - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - @return - This function does not return a value. - - Example: - @code - MSS_UART_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_enable_afm(&g_mss_uart0_lo); - @endcode - */ -void -MSS_UART_enable_afm -( - mss_uart_instance_t * this_uart -); - -/***************************************************************************//** - The MSS_UART_disable_afm() function is used to disable address flag detection - mode of the MSS UART. - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - Note that if you are using the UART on the AMP APB bus, the hardware - configuration to connect UART on AMP APB bus must already be done by the - application using SYSREG registers before initializing the UART instance - structure. - - @return - This function does not return a value. - - Example: - @code - MSS_UART_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_disable_afm(&g_mss_uart0_lo); - @endcode - */ -void -MSS_UART_disable_afm -( - mss_uart_instance_t * this_uart -); - -/***************************************************************************//** - The MSS_UART_enable_afclear () function is used to enable address flag clear - of the MSS UART. This should be used in conjunction with address flag - detection mode (AFM). - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - @return - This function does not return a value. - - Example: - @code - MSS_UART_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_enable_afclear(&g_mss_uart0_lo); - @endcode - */ -void -MSS_UART_enable_afclear -( - mss_uart_instance_t * this_uart -); - -/***************************************************************************//** - The MSS_UART_disable_afclear () function is used to disable address flag - clear of the MSS UART. This should be used in conjunction with address flag - detection mode (AFM). - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - Note that if you are using the UART on the AMP APB bus, the hardware - configuration to connect UART on AMP APB bus must already be done by the - application using SYSREG registers before initializing the UART instance - structure. - - @return - This function does not return a value. - - Example: - @code - MSS_UART_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_disable_afclear(&g_mss_uart0_lo); - @endcode - */ -void -MSS_UART_disable_afclear -( - mss_uart_instance_t * this_uart -); - -/***************************************************************************//** - The MSS_UART_enable_rx_timeout() function is used to enable and configure - the receiver timeout functionality of MSS UART. This function accepts the - timeout parameter and applies the timeout based up on the baud rate as per - the formula 4 x timeout x bit time. - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - @param timeout - The timeout parameter specifies the receiver timeout multiple. - It should be configured according to the baud rate in use. - - @return - This function does not return a value. - - Example: - @code - MSS_UART_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_enable_rx_timeout(&g_mss_uart0_lo, 24); - @endcode - */ -void -MSS_UART_enable_rx_timeout -( - mss_uart_instance_t * this_uart, - uint8_t timeout -); - -/***************************************************************************//** - The MSS_UART_disable_rx_timeout() function is used to disable the receiver - timeout functionality of MSS UART. - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - Note that if you are using the UART on the AMP APB bus, the hardware - configuration to connect UART on AMP APB bus must already be done by the - application using SYSREG registers before initializing the UART instance - structure. - - @return - This function does not return a value. - - Example: - @code - MSS_UART_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_disable_rx_timeout(&g_mss_uart0_lo); - @endcode - */ -void -MSS_UART_disable_rx_timeout -( - mss_uart_instance_t * this_uart -); - -/***************************************************************************//** - The MSS_UART_enable_tx_time_guard() function is used to enable and configure - the transmitter time guard functionality of MSS UART. This function accepts - the timeguard parameter and applies the timeguard based up on the baud rate - as per the formula timeguard x bit time. - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - Note that if you are using the UART on the AMP APB bus, the hardware - configuration to connect UART on AMP APB bus must already be done by the - application using SYSREG registers before initializing the UART instance - structure. - - @param timeguard - The timeguard parameter specifies the transmitter time guard multiple. - It should be configured according to the baud rate in use. - - @return - This function does not return a value. - - Example: - @code - MSS_UART_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_enable_tx_time_guard(&g_mss_uart0_lo, 24); - @endcode - */ -void -MSS_UART_enable_tx_time_guard -( - mss_uart_instance_t * this_uart, - uint8_t timeguard -); - -/***************************************************************************//** - The MSS_UART_disable_tx_time_guard() function is used to disable the - transmitter time guard functionality of MSS UART. - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - Note that if you are using the UART on the AMP APB bus, the hardware - configuration to connect UART on AMP APB bus must already be done by the - application using SYSREG registers before initializing the UART instance - structure. - - @return - This function does not return a value. - - Example: - @code - MSS_UART_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_disable_tx_time_guard(&g_mss_uart0_lo); - @endcode - */ -void -MSS_UART_disable_tx_time_guard -( - mss_uart_instance_t * this_uart -); - -/***************************************************************************//** - The MSS_UART_set_address() function is used to set the 8-bit address for - the MSS UART referenced by this_uart parameter. - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - @param address - The address parameter is the 8-bit address which is to be configured - to the MSS UART referenced by this_uart parameter. - - @return - This function does not return a value. - - Example: - @code - MSS_UART_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_set_address(&g_mss_uart0_lo, 0xAA); - @endcode - */ -void -MSS_UART_set_address -( - mss_uart_instance_t * this_uart, - uint8_t address -); - -/***************************************************************************//** - The MSS_UART_set_ready_mode() function is used to configure the MODE0 or MODE1 - to the TXRDY and RXRDY signals of the MSS UART referenced by this_uart - parameter. The mode parameter is used to provide the mode to be configured. - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - @param mode - The mode parameter is the mss_uart_ready_mode_t type which is used to - configure the TXRDY and RXRDY signal modes. - - @return - This function does not return a value. - - Example: - @code - MSS_UART_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_set_ready_mode(&g_mss_uart0_lo, MSS_UART_READY_MODE0); - @endcode - */ -void -MSS_UART_set_ready_mode -( - mss_uart_instance_t * this_uart, - mss_uart_ready_mode_t mode -); - -/***************************************************************************//** - The MSS_UART_set_usart_mode() function is used to configure the MSS UART - referenced by the parameter this_uart in USART mode. Various USART modes - are supported which can be configured by the parameter mode of type - mss_uart_usart_mode_t. - - @param this_uart - The this_uart parameter is a pointer to an mss_uart_instance_t - structure identifying the MSS UART hardware block that will perform - the requested function. There are ten such data structures, - g_mss_uart0_lo to g_mss_uart4_lo, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 5 (main APB bus) and - g_mss_uart0_hi to g_mss_uart4_hi, associated with MSS UART0 to MSS UART4 - when they are connected on the AXI switch slave 6 (AMP APB bus). - This parameter must point to one of these ten global data structure defined - within the UART driver. - - @param mode - The mode parameter is the USART mode to be configured. - This parameter is of type mss_uart_usart_mode_t. - - @return - This function does not return a value. - - Example: - @code - MSS_UART_init(&g_mss_uart0_lo, - MSS_UART_57600_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_set_usart_mode(&g_mss_uart0_lo, MSS_UART_SYNC_MASTER_POS_EDGE_CLK); - @endcode - */ -void -MSS_UART_set_usart_mode -( - mss_uart_instance_t * this_uart, - mss_uart_usart_mode_t mode -); - - -#ifdef __cplusplus -} -#endif - -#endif /* __MSS_UART_H_ */ -#endif diff --git a/sm/plat/mpfs/drivers/mss_uart/mss_uart_regs.h b/sm/plat/mpfs/drivers/mss_uart/mss_uart_regs.h deleted file mode 100644 index 4ff56a525..000000000 --- a/sm/plat/mpfs/drivers/mss_uart/mss_uart_regs.h +++ /dev/null @@ -1,133 +0,0 @@ - /******************************************************************************* - * Copyright 2019-2020 Microchip FPGA Embedded Systems Solutions. - * - * SPDX-License-Identifier: MIT - * - * Register bit offsets and masks definitions for PolarFire SoC MSS MMUART - * - */ - -#ifndef MSS_UART_REGS_H_ -#define MSS_UART_REGS_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -/******************************************************************************* - Register Bit definitions - */ - -/* Line Control register bit definitions */ -#define SB 6u /* Set break */ -#define DLAB 7u /* Divisor latch access bit */ - -/* Line Control register bit masks */ -#define SB_MASK (0x01u << SB) /* Set break */ -#define DLAB_MASK (0x01u << DLAB) /* Divisor latch access bit */ - -/* FIFO Control register bit definitions */ -#define RXRDY_TXRDYN_EN 0u /* Enable TXRDY and RXRDY signals */ -#define CLEAR_RX_FIFO 1u /* Clear receiver FIFO */ -#define CLEAR_TX_FIFO 2u /* Clear transmitter FIFO */ -#define RDYMODE 3u /* Mode 0 or Mode 1 for TXRDY and RXRDY */ - -/* FIFO Control register bit MASKS */ -#define RXRDY_TXRDYN_EN_MASK (0x01u << 0u) /* Enable TXRDY and RXRDY signals */ -#define CLEAR_RX_FIFO_MASK (0x01u << 1u) /* Clear receiver FIFO */ -#define CLEAR_TX_FIFO_MASK (0x01u << 2u) /* Clear transmitter FIFO */ -#define RDYMODE_MASK (0x01u << 3u) /* Mode 0 or Mode 1 for TXRDY and RXRDY */ - -/* Modem Control register bit definitions */ -#define LOOP 4u /* Local loopback */ -#define RLOOP 5u /* Remote loopback */ -#define ECHO 6u /* Automatic echo */ - -/* Modem Control register bit MASKS */ -#define LOOP_MASK (0x01u << 4u) /* Local loopback */ -#define RLOOP_MASK (0x01u << 5u) /* Remote loopback & Automatic echo*/ -#define ECHO_MASK (0x01u << 6u) /* Automatic echo */ - -/* Line Status register bit definitions */ -#define DR 0u /* Data ready */ -#define THRE 5u /* Transmitter holding register empty */ -#define TEMT 6u /* Transmitter empty */ - -/* Line Status register bit MASKS */ -#define DR_MASK (0x01u << 0u) /* Data ready */ -#define THRE_MASK (0x01u << 5u) /* Transmitter holding register empty */ -#define TEMT_MASK (0x01u << 6u) /* Transmitter empty */ - -/* Interrupt Enable register bit definitions */ -#define ERBFI 0u /* Enable receiver buffer full interrupt */ -#define ETBEI 1u /* Enable transmitter buffer empty interrupt */ -#define ELSI 2u /* Enable line status interrupt */ -#define EDSSI 3u /* Enable modem status interrupt */ - -/* Interrupt Enable register bit MASKS */ -#define ERBFI_MASK (0x01u << 0u) /* Enable receiver buffer full interrupt */ -#define ETBEI_MASK (0x01u << 1u) /* Enable transmitter buffer empty interrupt */ -#define ELSI_MASK (0x01u << 2u) /* Enable line status interrupt */ -#define EDSSI_MASK (0x01u << 3u) /* Enable modem status interrupt */ - -/* Multimode register 0 bit definitions */ -#define ELIN 3u /* Enable LIN header detection */ -#define ETTG 5u /* Enable transmitter time guard */ -#define ERTO 6u /* Enable receiver time-out */ -#define EFBR 7u /* Enable fractional baud rate mode */ - -/* Multimode register 0 bit MASKS */ -#define ELIN_MASK (0x01u << 3u) /* Enable LIN header detection */ -#define ETTG_MASK (0x01u << 5u) /* Enable transmitter time guard */ -#define ERTO_MASK (0x01u << 6u) /* Enable receiver time-out */ -#define EFBR_MASK (0x01u << 7u) /* Enable fractional baud rate mode */ - -/* Multimode register 1 bit definitions */ -#define E_MSB_RX 0u /* MSB / LSB first for receiver */ -#define E_MSB_TX 1u /* MSB / LSB first for transmitter */ -#define EIRD 2u /* Enable IrDA modem */ -#define EIRX 3u /* Input polarity for IrDA modem */ -#define EITX 4u /* Output polarity for IrDA modem */ -#define EITP 5u /* Output pulse width for IrDA modem */ - -/* Multimode register 1 bit MASKS */ -#define E_MSB_RX_MASK (0x01u << 0u) /* MSB / LSB first for receiver */ -#define E_MSB_TX_MASK (0x01u << 1u) /* MSB / LSB first for transmitter */ -#define EIRD_MASK (0x01u << 2u) /* Enable IrDA modem */ -#define EIRX_MASK (0x01u << 3u) /* Input polarity for IrDA modem */ -#define EITX_MASK (0x01u << 4u) /* Output polarity for IrDA modem */ -#define EITP_MASK (0x01u << 5u) /* Output pulse width for IrDA modem */ - -/* Multimode register 2 bit definitions */ -#define EERR 0u /* Enable ERR / NACK during stop time */ -#define EAFM 1u /* Enable 9-bit address flag mode */ -#define EAFC 2u /* Enable address flag clear */ -#define ESWM 3u /* Enable single wire half-duplex mode */ - -/* Multimode register 2 bit MASKS */ -#define EERR_MASK (0x01u << 0u) /* Enable ERR / NACK during stop time */ -#define EAFM_MASK (0x01u << 1u) /* Enable 9-bit address flag mode */ -#define EAFC_MASK (0x01u << 2u) /* Enable address flag clear */ -#define ESWM_MASK (0x01u << 3u) /* Enable single wire half-duplex mode */ - -/* Multimode Interrupt Enable register and - Multimode Interrupt Identification register definitions */ -#define ERTOI 0u /* Enable receiver timeout interrupt */ -#define ENACKI 1u /* Enable NACK / ERR interrupt */ -#define EPID_PEI 2u /* Enable PID parity error interrupt */ -#define ELINBI 3u /* Enable LIN break interrupt */ -#define ELINSI 4u /* Enable LIN sync detection interrupt */ - -/* Multimode Interrupt Enable register and - Multimode Interrupt Identification register MASKS */ -#define ERTOI_MASK (0x01u << 0u) /* Enable receiver timeout interrupt */ -#define ENACKI_MASK (0x01u << 1u) /* Enable NACK / ERR interrupt */ -#define EPID_PEI_MASK (0x01u << 2u) /* Enable PID parity error interrupt */ -#define ELINBI_MASK (0x01u << 3u) /* Enable LIN break interrupt */ -#define ELINSI_MASK (0x01u << 4u) /* Enable LIN sync detection interrupt */ - -#ifdef __cplusplus -} -#endif - -#endif /* MSS_UART_REGS_H_ */ diff --git a/sm/plat/mpfs/encoding.h b/sm/plat/mpfs/encoding.h deleted file mode 100644 index 0c5c25695..000000000 --- a/sm/plat/mpfs/encoding.h +++ /dev/null @@ -1,1532 +0,0 @@ -/* - Copyright (c) 2013, The Regents of the University of California (Regents). - All Rights Reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - 1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - 3. Neither the name of the Regents nor the - names of its contributors may be used to endorse or promote products - derived from this software without specific prior written permission. - - IN NO EVENT SHALL REGENTS BE LIABLE TO ANY PARTY FOR DIRECT, INDIRECT, - SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, INCLUDING LOST PROFITS, ARISING - OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF REGENTS HAS - BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - - REGENTS SPECIFICALLY DISCLAIMS ANY WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - PURPOSE. THE SOFTWARE AND ACCOMPANYING DOCUMENTATION, IF ANY, PROVIDED - HEREUNDER IS PROVIDED "AS IS". REGENTS HAS NO OBLIGATION TO PROVIDE - MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. -*/ - -/*********************************************************************************** - * Record of Microchip changes - */ - - -#ifndef RISCV_CSR_ENCODING_H -#define RISCV_CSR_ENCODING_H - -#define MSTATUS_UIE 0x00000001 -#define MSTATUS_SIE 0x00000002 -#define MSTATUS_HIE 0x00000004 -#define MSTATUS_MIE 0x00000008 -#define MSTATUS_UPIE 0x00000010 -#define MSTATUS_SPIE 0x00000020 -#define MSTATUS_HPIE 0x00000040 -#define MSTATUS_MPIE 0x00000080 -#define MSTATUS_SPP 0x00000100 -#define MSTATUS_HPP 0x00000600 -#define MSTATUS_MPP 0x00001800 -#define MSTATUS_FS 0x00006000 -#define MSTATUS_XS 0x00018000 -#define MSTATUS_MPRV 0x00020000 -#define MSTATUS_SUM 0x00040000 -#define MSTATUS_MXR 0x00080000 -#define MSTATUS_TVM 0x00100000 -#define MSTATUS_TW 0x00200000 -#define MSTATUS_TSR 0x00400000 -#define MSTATUS32_SD 0x80000000 -#define MSTATUS64_SD 0x8000000000000000 - -#define MCAUSE32_CAUSE 0x7FFFFFFF -#define MCAUSE64_CAUSE 0x7FFFFFFFFFFFFFFF -#define MCAUSE32_INT 0x80000000 -#define MCAUSE64_INT 0x8000000000000000 - -#define SSTATUS_UIE 0x00000001 -#define SSTATUS_SIE 0x00000002 -#define SSTATUS_UPIE 0x00000010 -#define SSTATUS_SPIE 0x00000020 -#define SSTATUS_SPP 0x00000100 -#define SSTATUS_FS 0x00006000 -#define SSTATUS_XS 0x00018000 -#define SSTATUS_SUM 0x00040000 -#define SSTATUS_MXR 0x00080000 -#define SSTATUS32_SD 0x80000000 -#define SSTATUS64_SD 0x8000000000000000 - -#define DCSR_XDEBUGVER (3U<<30) -#define DCSR_NDRESET (1<<29) -#define DCSR_FULLRESET (1<<28) -#define DCSR_EBREAKM (1<<15) -#define DCSR_EBREAKH (1<<14) -#define DCSR_EBREAKS (1<<13) -#define DCSR_EBREAKU (1<<12) -#define DCSR_STOPCYCLE (1<<10) -#define DCSR_STOPTIME (1<<9) -#define DCSR_CAUSE (7<<6) -#define DCSR_DEBUGINT (1<<5) -#define DCSR_HALT (1<<3) -#define DCSR_STEP (1<<2) -#define DCSR_PRV (3<<0) - -#define DCSR_CAUSE_NONE 0 -#define DCSR_CAUSE_SWBP 1 -#define DCSR_CAUSE_HWBP 2 -#define DCSR_CAUSE_DEBUGINT 3 -#define DCSR_CAUSE_STEP 4 -#define DCSR_CAUSE_HALT 5 - -#define MCONTROL_TYPE(xlen) (0xfULL<<((xlen)-4)) -#define MCONTROL_DMODE(xlen) (1ULL<<((xlen)-5)) -#define MCONTROL_MASKMAX(xlen) (0x3fULL<<((xlen)-11)) - -#define MCONTROL_SELECT (1U<<19) -#define MCONTROL_TIMING (1U<<18) -#define MCONTROL_ACTION (0x3fU<<12) -#define MCONTROL_CHAIN (1U<<11) -#define MCONTROL_MATCH (0xfU<<7) -#define MCONTROL_M (1U<<6) -#define MCONTROL_H (1U<<5) -#define MCONTROL_S (1U<<4) -#define MCONTROL_U (1U<<3) -#define MCONTROL_EXECUTE (1U<<2) -#define MCONTROL_STORE (1U<<1) -#define MCONTROL_LOAD (1U<<0) - -#define MCONTROL_TYPE_NONE 0 -#define MCONTROL_TYPE_MATCH 2 - -#define MCONTROL_ACTION_DEBUG_EXCEPTION 0 -#define MCONTROL_ACTION_DEBUG_MODE 1 -#define MCONTROL_ACTION_TRACE_START 2 -#define MCONTROL_ACTION_TRACE_STOP 3 -#define MCONTROL_ACTION_TRACE_EMIT 4 - -#define MCONTROL_MATCH_EQUAL 0 -#define MCONTROL_MATCH_NAPOT 1 -#define MCONTROL_MATCH_GE 2 -#define MCONTROL_MATCH_LT 3 -#define MCONTROL_MATCH_MASK_LOW 4 -#define MCONTROL_MATCH_MASK_HIGH 5 - -#define MIP_SSIP (1U << IRQ_S_SOFT) -#define MIP_HSIP (1U << IRQ_H_SOFT) -#define MIP_MSIP (1U << IRQ_M_SOFT) -#define MIP_STIP (1U << IRQ_S_TIMER) -#define MIP_HTIP (1U << IRQ_H_TIMER) -#define MIP_MTIP (1U << IRQ_M_TIMER) -#define MIP_SEIP (1U << IRQ_S_EXT) -#define MIP_HEIP (1U << IRQ_H_EXT) -#define MIP_MEIP (1U << IRQ_M_EXT) - -#define SIP_SSIP MIP_SSIP -#define SIP_STIP MIP_STIP - -#define PRV_U 0 -#define PRV_S 1 -#define PRV_H 2 -#define PRV_M 3 - -#define SPTBR32_MODE 0x80000000 -#define SPTBR32_ASID 0x7FC00000 -#define SPTBR32_PPN 0x003FFFFF -#define SPTBR64_MODE 0xF000000000000000 -#define SPTBR64_ASID 0x0FFFF00000000000 -#define SPTBR64_PPN 0x00000FFFFFFFFFFF - -#define SPTBR_MODE_OFF 0 -#define SPTBR_MODE_SV32 1 -#define SPTBR_MODE_SV39 8 -#define SPTBR_MODE_SV48 9 -#define SPTBR_MODE_SV57 10 -#define SPTBR_MODE_SV64 11 - -#define PMP_R 0x01 -#define PMP_W 0x02 -#define PMP_X 0x04 -#define PMP_A 0x18 -#define PMP_L 0x80 -#define PMP_SHIFT 2 - -#define PMP_TOR 0x08 -#define PMP_NA4 0x10 -#define PMP_NAPOT 0x18 - -#define IRQ_S_SOFT 1 -#define IRQ_H_SOFT 2 -#define IRQ_M_SOFT 3 -#define IRQ_S_TIMER 5 -#define IRQ_H_TIMER 6 -#define IRQ_M_TIMER 7 -#define IRQ_S_EXT 9 -#define IRQ_H_EXT 10 -#define IRQ_M_EXT 11 -#define IRQ_COP 12 -#define IRQ_HOST 13 - -#define DEFAULT_RSTVEC 0x00001000 -#define CLINT_BASE 0x02000000 -#define CLINT_SIZE 0x000c0000 -#define EXT_IO_BASE 0x40000000 -#define DRAM_BASE 0x80000000 - -// page table entry (PTE) fields -#define PTE_V 0x001 // Valid -#define PTE_R 0x002 // Read -#define PTE_W 0x004 // Write -#define PTE_X 0x008 // Execute -#define PTE_U 0x010 // User -#define PTE_G 0x020 // Global -#define PTE_A 0x040 // Accessed -#define PTE_D 0x080 // Dirty -#define PTE_SOFT 0x300 // Reserved for Software - -#define PTE_PPN_SHIFT 10 - -#define PTE_TABLE(PTE) (((PTE) & (PTE_V | PTE_R | PTE_W | PTE_X)) == PTE_V) - -#ifdef __riscv - -#if __riscv_xlen == 64 -# define MSTATUS_SD MSTATUS64_SD -# define SSTATUS_SD SSTATUS64_SD -# define RISCV_PGLEVEL_BITS 9 -# define SPTBR_MODE SPTBR64_MODE -# define MCAUSE_INT MCAUSE64_INT //ML added- should we be using later encoding.h? -# define MCAUSE_CAUSE MCAUSE64_CAUSE //ML added- should we be using later encoding.h? -#else -# define MSTATUS_SD MSTATUS32_SD -# define SSTATUS_SD SSTATUS32_SD -# define RISCV_PGLEVEL_BITS 10 -# define SPTBR_MODE SPTBR32_MODE -# define MCAUSE_INT MCAUSE32_INT //ML added- should we be using later encoding.h? -# define MCAUSE_CAUSE MCAUSE32_CAUSE //ML added- should we be using later encoding.h? -#endif -#define RISCV_PGSHIFT 12 -#define RISCV_PGSIZE (1 << RISCV_PGSHIFT) - -#ifndef __ASSEMBLER__ - -#ifdef __GNUC__ - -#define read_reg(reg) ({ unsigned long __tmp; \ - asm volatile ("mv %0, " #reg : "=r"(__tmp)); \ - __tmp; }) - -#define read_csr(reg) ({ unsigned long __tmp; \ - asm volatile ("csrr %0, " #reg : "=r"(__tmp)); \ - __tmp; }) - -#define write_csr(reg, val) ({ \ - asm volatile ("csrw " #reg ", %0" :: "rK"(val)); }) - -#define swap_csr(reg, val) ({ unsigned long __tmp; \ - asm volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "rK"(val)); \ - __tmp; }) - -#define set_csr(reg, bit) ({ unsigned long __tmp; \ - asm volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "rK"(bit)); \ - __tmp; }) - -#define clear_csr(reg, bit) ({ unsigned long __tmp; \ - asm volatile ("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "rK"(bit)); \ - __tmp; }) - -#if 0 -#define csr_write(csr, val) \ -({ \ - unsigned long __v = (unsigned long)(val); \ - asm volatile ("csrw " __ASM_STR(csr) ", %0" \ - : : "rK" (__v) \ - : "memory"); \ -}) - -#define csr_write(csr, val) \ -({ \ - unsigned long __v = (unsigned long)(val); \ - __asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0" \ - : : "rK" (__v) \ - : "memory"); \ -}) -#endif - -#define rdtime() read_csr(time) -#define rdcycle() read_csr(cycle) -#define rdinstret() read_csr(instret) - -#endif - -#endif - -#endif - -#endif -/* Automatically generated by parse-opcodes. */ -#ifndef RISCV_ENCODING_H -#define RISCV_ENCODING_H -#define MATCH_BEQ 0x63 -#define MASK_BEQ 0x707f -#define MATCH_BNE 0x1063 -#define MASK_BNE 0x707f -#define MATCH_BLT 0x4063 -#define MASK_BLT 0x707f -#define MATCH_BGE 0x5063 -#define MASK_BGE 0x707f -#define MATCH_BLTU 0x6063 -#define MASK_BLTU 0x707f -#define MATCH_BGEU 0x7063 -#define MASK_BGEU 0x707f -#define MATCH_JALR 0x67 -#define MASK_JALR 0x707f -#define MATCH_JAL 0x6f -#define MASK_JAL 0x7f -#define MATCH_LUI 0x37 -#define MASK_LUI 0x7f -#define MATCH_AUIPC 0x17 -#define MASK_AUIPC 0x7f -#define MATCH_ADDI 0x13 -#define MASK_ADDI 0x707f -#define MATCH_SLLI 0x1013 -#define MASK_SLLI 0xfc00707f -#define MATCH_SLTI 0x2013 -#define MASK_SLTI 0x707f -#define MATCH_SLTIU 0x3013 -#define MASK_SLTIU 0x707f -#define MATCH_XORI 0x4013 -#define MASK_XORI 0x707f -#define MATCH_SRLI 0x5013 -#define MASK_SRLI 0xfc00707f -#define MATCH_SRAI 0x40005013 -#define MASK_SRAI 0xfc00707f -#define MATCH_ORI 0x6013 -#define MASK_ORI 0x707f -#define MATCH_ANDI 0x7013 -#define MASK_ANDI 0x707f -#define MATCH_ADD 0x33 -#define MASK_ADD 0xfe00707f -#define MATCH_SUB 0x40000033 -#define MASK_SUB 0xfe00707f -#define MATCH_SLL 0x1033 -#define MASK_SLL 0xfe00707f -#define MATCH_SLT 0x2033 -#define MASK_SLT 0xfe00707f -#define MATCH_SLTU 0x3033 -#define MASK_SLTU 0xfe00707f -#define MATCH_XOR 0x4033 -#define MASK_XOR 0xfe00707f -#define MATCH_SRL 0x5033 -#define MASK_SRL 0xfe00707f -#define MATCH_SRA 0x40005033 -#define MASK_SRA 0xfe00707f -#define MATCH_OR 0x6033 -#define MASK_OR 0xfe00707f -#define MATCH_AND 0x7033 -#define MASK_AND 0xfe00707f -#define MATCH_ADDIW 0x1b -#define MASK_ADDIW 0x707f -#define MATCH_SLLIW 0x101b -#define MASK_SLLIW 0xfe00707f -#define MATCH_SRLIW 0x501b -#define MASK_SRLIW 0xfe00707f -#define MATCH_SRAIW 0x4000501b -#define MASK_SRAIW 0xfe00707f -#define MATCH_ADDW 0x3b -#define MASK_ADDW 0xfe00707f -#define MATCH_SUBW 0x4000003b -#define MASK_SUBW 0xfe00707f -#define MATCH_SLLW 0x103b -#define MASK_SLLW 0xfe00707f -#define MATCH_SRLW 0x503b -#define MASK_SRLW 0xfe00707f -#define MATCH_SRAW 0x4000503b -#define MASK_SRAW 0xfe00707f -#define MATCH_LB 0x3 -#define MASK_LB 0x707f -#define MATCH_LH 0x1003 -#define MASK_LH 0x707f -#define MATCH_LW 0x2003 -#define MASK_LW 0x707f -#define MATCH_LD 0x3003 -#define MASK_LD 0x707f -#define MATCH_LBU 0x4003 -#define MASK_LBU 0x707f -#define MATCH_LHU 0x5003 -#define MASK_LHU 0x707f -#define MATCH_LWU 0x6003 -#define MASK_LWU 0x707f -#define MATCH_SB 0x23 -#define MASK_SB 0x707f -#define MATCH_SH 0x1023 -#define MASK_SH 0x707f -#define MATCH_SW 0x2023 -#define MASK_SW 0x707f -#define MATCH_SD 0x3023 -#define MASK_SD 0x707f -#define MATCH_FENCE 0xf -#define MASK_FENCE 0x707f -#define MATCH_FENCE_I 0x100f -#define MASK_FENCE_I 0x707f -#define MATCH_MUL 0x2000033 -#define MASK_MUL 0xfe00707f -#define MATCH_MULH 0x2001033 -#define MASK_MULH 0xfe00707f -#define MATCH_MULHSU 0x2002033 -#define MASK_MULHSU 0xfe00707f -#define MATCH_MULHU 0x2003033 -#define MASK_MULHU 0xfe00707f -#define MATCH_DIV 0x2004033 -#define MASK_DIV 0xfe00707f -#define MATCH_DIVU 0x2005033 -#define MASK_DIVU 0xfe00707f -#define MATCH_REM 0x2006033 -#define MASK_REM 0xfe00707f -#define MATCH_REMU 0x2007033 -#define MASK_REMU 0xfe00707f -#define MATCH_MULW 0x200003b -#define MASK_MULW 0xfe00707f -#define MATCH_DIVW 0x200403b -#define MASK_DIVW 0xfe00707f -#define MATCH_DIVUW 0x200503b -#define MASK_DIVUW 0xfe00707f -#define MATCH_REMW 0x200603b -#define MASK_REMW 0xfe00707f -#define MATCH_REMUW 0x200703b -#define MASK_REMUW 0xfe00707f -#define MATCH_AMOADD_W 0x202f -#define MASK_AMOADD_W 0xf800707f -#define MATCH_AMOXOR_W 0x2000202f -#define MASK_AMOXOR_W 0xf800707f -#define MATCH_AMOOR_W 0x4000202f -#define MASK_AMOOR_W 0xf800707f -#define MATCH_AMOAND_W 0x6000202f -#define MASK_AMOAND_W 0xf800707f -#define MATCH_AMOMIN_W 0x8000202f -#define MASK_AMOMIN_W 0xf800707f -#define MATCH_AMOMAX_W 0xa000202f -#define MASK_AMOMAX_W 0xf800707f -#define MATCH_AMOMINU_W 0xc000202f -#define MASK_AMOMINU_W 0xf800707f -#define MATCH_AMOMAXU_W 0xe000202f -#define MASK_AMOMAXU_W 0xf800707f -#define MATCH_AMOSWAP_W 0x800202f -#define MASK_AMOSWAP_W 0xf800707f -#define MATCH_LR_W 0x1000202f -#define MASK_LR_W 0xf9f0707f -#define MATCH_SC_W 0x1800202f -#define MASK_SC_W 0xf800707f -#define MATCH_AMOADD_D 0x302f -#define MASK_AMOADD_D 0xf800707f -#define MATCH_AMOXOR_D 0x2000302f -#define MASK_AMOXOR_D 0xf800707f -#define MATCH_AMOOR_D 0x4000302f -#define MASK_AMOOR_D 0xf800707f -#define MATCH_AMOAND_D 0x6000302f -#define MASK_AMOAND_D 0xf800707f -#define MATCH_AMOMIN_D 0x8000302f -#define MASK_AMOMIN_D 0xf800707f -#define MATCH_AMOMAX_D 0xa000302f -#define MASK_AMOMAX_D 0xf800707f -#define MATCH_AMOMINU_D 0xc000302f -#define MASK_AMOMINU_D 0xf800707f -#define MATCH_AMOMAXU_D 0xe000302f -#define MASK_AMOMAXU_D 0xf800707f -#define MATCH_AMOSWAP_D 0x800302f -#define MASK_AMOSWAP_D 0xf800707f -#define MATCH_LR_D 0x1000302f -#define MASK_LR_D 0xf9f0707f -#define MATCH_SC_D 0x1800302f -#define MASK_SC_D 0xf800707f -#define MATCH_ECALL 0x73 -#define MASK_ECALL 0xffffffff -#define MATCH_EBREAK 0x100073 -#define MASK_EBREAK 0xffffffff -#define MATCH_URET 0x200073 -#define MASK_URET 0xffffffff -#define MATCH_SRET 0x10200073 -#define MASK_SRET 0xffffffff -#define MATCH_HRET 0x20200073 -#define MASK_HRET 0xffffffff -#define MATCH_MRET 0x30200073 -#define MASK_MRET 0xffffffff -#define MATCH_DRET 0x7b200073 -#define MASK_DRET 0xffffffff -#define MATCH_SFENCE_VMA 0x12000073 -#define MASK_SFENCE_VMA 0xfe007fff -#define MATCH_WFI 0x10500073 -#define MASK_WFI 0xffffffff -#define MATCH_CSRRW 0x1073 -#define MASK_CSRRW 0x707f -#define MATCH_CSRRS 0x2073 -#define MASK_CSRRS 0x707f -#define MATCH_CSRRC 0x3073 -#define MASK_CSRRC 0x707f -#define MATCH_CSRRWI 0x5073 -#define MASK_CSRRWI 0x707f -#define MATCH_CSRRSI 0x6073 -#define MASK_CSRRSI 0x707f -#define MATCH_CSRRCI 0x7073 -#define MASK_CSRRCI 0x707f -#define MATCH_FADD_S 0x53 -#define MASK_FADD_S 0xfe00007f -#define MATCH_FSUB_S 0x8000053 -#define MASK_FSUB_S 0xfe00007f -#define MATCH_FMUL_S 0x10000053 -#define MASK_FMUL_S 0xfe00007f -#define MATCH_FDIV_S 0x18000053 -#define MASK_FDIV_S 0xfe00007f -#define MATCH_FSGNJ_S 0x20000053 -#define MASK_FSGNJ_S 0xfe00707f -#define MATCH_FSGNJN_S 0x20001053 -#define MASK_FSGNJN_S 0xfe00707f -#define MATCH_FSGNJX_S 0x20002053 -#define MASK_FSGNJX_S 0xfe00707f -#define MATCH_FMIN_S 0x28000053 -#define MASK_FMIN_S 0xfe00707f -#define MATCH_FMAX_S 0x28001053 -#define MASK_FMAX_S 0xfe00707f -#define MATCH_FSQRT_S 0x58000053 -#define MASK_FSQRT_S 0xfff0007f -#define MATCH_FADD_D 0x2000053 -#define MASK_FADD_D 0xfe00007f -#define MATCH_FSUB_D 0xa000053 -#define MASK_FSUB_D 0xfe00007f -#define MATCH_FMUL_D 0x12000053 -#define MASK_FMUL_D 0xfe00007f -#define MATCH_FDIV_D 0x1a000053 -#define MASK_FDIV_D 0xfe00007f -#define MATCH_FSGNJ_D 0x22000053 -#define MASK_FSGNJ_D 0xfe00707f -#define MATCH_FSGNJN_D 0x22001053 -#define MASK_FSGNJN_D 0xfe00707f -#define MATCH_FSGNJX_D 0x22002053 -#define MASK_FSGNJX_D 0xfe00707f -#define MATCH_FMIN_D 0x2a000053 -#define MASK_FMIN_D 0xfe00707f -#define MATCH_FMAX_D 0x2a001053 -#define MASK_FMAX_D 0xfe00707f -#define MATCH_FCVT_S_D 0x40100053 -#define MASK_FCVT_S_D 0xfff0007f -#define MATCH_FCVT_D_S 0x42000053 -#define MASK_FCVT_D_S 0xfff0007f -#define MATCH_FSQRT_D 0x5a000053 -#define MASK_FSQRT_D 0xfff0007f -#define MATCH_FADD_Q 0x6000053 -#define MASK_FADD_Q 0xfe00007f -#define MATCH_FSUB_Q 0xe000053 -#define MASK_FSUB_Q 0xfe00007f -#define MATCH_FMUL_Q 0x16000053 -#define MASK_FMUL_Q 0xfe00007f -#define MATCH_FDIV_Q 0x1e000053 -#define MASK_FDIV_Q 0xfe00007f -#define MATCH_FSGNJ_Q 0x26000053 -#define MASK_FSGNJ_Q 0xfe00707f -#define MATCH_FSGNJN_Q 0x26001053 -#define MASK_FSGNJN_Q 0xfe00707f -#define MATCH_FSGNJX_Q 0x26002053 -#define MASK_FSGNJX_Q 0xfe00707f -#define MATCH_FMIN_Q 0x2e000053 -#define MASK_FMIN_Q 0xfe00707f -#define MATCH_FMAX_Q 0x2e001053 -#define MASK_FMAX_Q 0xfe00707f -#define MATCH_FCVT_S_Q 0x40300053 -#define MASK_FCVT_S_Q 0xfff0007f -#define MATCH_FCVT_Q_S 0x46000053 -#define MASK_FCVT_Q_S 0xfff0007f -#define MATCH_FCVT_D_Q 0x42300053 -#define MASK_FCVT_D_Q 0xfff0007f -#define MATCH_FCVT_Q_D 0x46100053 -#define MASK_FCVT_Q_D 0xfff0007f -#define MATCH_FSQRT_Q 0x5e000053 -#define MASK_FSQRT_Q 0xfff0007f -#define MATCH_FLE_S 0xa0000053 -#define MASK_FLE_S 0xfe00707f -#define MATCH_FLT_S 0xa0001053 -#define MASK_FLT_S 0xfe00707f -#define MATCH_FEQ_S 0xa0002053 -#define MASK_FEQ_S 0xfe00707f -#define MATCH_FLE_D 0xa2000053 -#define MASK_FLE_D 0xfe00707f -#define MATCH_FLT_D 0xa2001053 -#define MASK_FLT_D 0xfe00707f -#define MATCH_FEQ_D 0xa2002053 -#define MASK_FEQ_D 0xfe00707f -#define MATCH_FLE_Q 0xa6000053 -#define MASK_FLE_Q 0xfe00707f -#define MATCH_FLT_Q 0xa6001053 -#define MASK_FLT_Q 0xfe00707f -#define MATCH_FEQ_Q 0xa6002053 -#define MASK_FEQ_Q 0xfe00707f -#define MATCH_FCVT_W_S 0xc0000053 -#define MASK_FCVT_W_S 0xfff0007f -#define MATCH_FCVT_WU_S 0xc0100053 -#define MASK_FCVT_WU_S 0xfff0007f -#define MATCH_FCVT_L_S 0xc0200053 -#define MASK_FCVT_L_S 0xfff0007f -#define MATCH_FCVT_LU_S 0xc0300053 -#define MASK_FCVT_LU_S 0xfff0007f -#define MATCH_FMV_X_S 0xe0000053 -#define MASK_FMV_X_S 0xfff0707f -#define MATCH_FCLASS_S 0xe0001053 -#define MASK_FCLASS_S 0xfff0707f -#define MATCH_FCVT_W_D 0xc2000053 -#define MASK_FCVT_W_D 0xfff0007f -#define MATCH_FCVT_WU_D 0xc2100053 -#define MASK_FCVT_WU_D 0xfff0007f -#define MATCH_FCVT_L_D 0xc2200053 -#define MASK_FCVT_L_D 0xfff0007f -#define MATCH_FCVT_LU_D 0xc2300053 -#define MASK_FCVT_LU_D 0xfff0007f -#define MATCH_FMV_X_D 0xe2000053 -#define MASK_FMV_X_D 0xfff0707f -#define MATCH_FCLASS_D 0xe2001053 -#define MASK_FCLASS_D 0xfff0707f -#define MATCH_FCVT_W_Q 0xc6000053 -#define MASK_FCVT_W_Q 0xfff0007f -#define MATCH_FCVT_WU_Q 0xc6100053 -#define MASK_FCVT_WU_Q 0xfff0007f -#define MATCH_FCVT_L_Q 0xc6200053 -#define MASK_FCVT_L_Q 0xfff0007f -#define MATCH_FCVT_LU_Q 0xc6300053 -#define MASK_FCVT_LU_Q 0xfff0007f -#define MATCH_FMV_X_Q 0xe6000053 -#define MASK_FMV_X_Q 0xfff0707f -#define MATCH_FCLASS_Q 0xe6001053 -#define MASK_FCLASS_Q 0xfff0707f -#define MATCH_FCVT_S_W 0xd0000053 -#define MASK_FCVT_S_W 0xfff0007f -#define MATCH_FCVT_S_WU 0xd0100053 -#define MASK_FCVT_S_WU 0xfff0007f -#define MATCH_FCVT_S_L 0xd0200053 -#define MASK_FCVT_S_L 0xfff0007f -#define MATCH_FCVT_S_LU 0xd0300053 -#define MASK_FCVT_S_LU 0xfff0007f -#define MATCH_FMV_S_X 0xf0000053 -#define MASK_FMV_S_X 0xfff0707f -#define MATCH_FCVT_D_W 0xd2000053 -#define MASK_FCVT_D_W 0xfff0007f -#define MATCH_FCVT_D_WU 0xd2100053 -#define MASK_FCVT_D_WU 0xfff0007f -#define MATCH_FCVT_D_L 0xd2200053 -#define MASK_FCVT_D_L 0xfff0007f -#define MATCH_FCVT_D_LU 0xd2300053 -#define MASK_FCVT_D_LU 0xfff0007f -#define MATCH_FMV_D_X 0xf2000053 -#define MASK_FMV_D_X 0xfff0707f -#define MATCH_FCVT_Q_W 0xd6000053 -#define MASK_FCVT_Q_W 0xfff0007f -#define MATCH_FCVT_Q_WU 0xd6100053 -#define MASK_FCVT_Q_WU 0xfff0007f -#define MATCH_FCVT_Q_L 0xd6200053 -#define MASK_FCVT_Q_L 0xfff0007f -#define MATCH_FCVT_Q_LU 0xd6300053 -#define MASK_FCVT_Q_LU 0xfff0007f -#define MATCH_FMV_Q_X 0xf6000053 -#define MASK_FMV_Q_X 0xfff0707f -#define MATCH_FLW 0x2007 -#define MASK_FLW 0x707f -#define MATCH_FLD 0x3007 -#define MASK_FLD 0x707f -#define MATCH_FLQ 0x4007 -#define MASK_FLQ 0x707f -#define MATCH_FSW 0x2027 -#define MASK_FSW 0x707f -#define MATCH_FSD 0x3027 -#define MASK_FSD 0x707f -#define MATCH_FSQ 0x4027 -#define MASK_FSQ 0x707f -#define MATCH_FMADD_S 0x43 -#define MASK_FMADD_S 0x600007f -#define MATCH_FMSUB_S 0x47 -#define MASK_FMSUB_S 0x600007f -#define MATCH_FNMSUB_S 0x4b -#define MASK_FNMSUB_S 0x600007f -#define MATCH_FNMADD_S 0x4f -#define MASK_FNMADD_S 0x600007f -#define MATCH_FMADD_D 0x2000043 -#define MASK_FMADD_D 0x600007f -#define MATCH_FMSUB_D 0x2000047 -#define MASK_FMSUB_D 0x600007f -#define MATCH_FNMSUB_D 0x200004b -#define MASK_FNMSUB_D 0x600007f -#define MATCH_FNMADD_D 0x200004f -#define MASK_FNMADD_D 0x600007f -#define MATCH_FMADD_Q 0x6000043 -#define MASK_FMADD_Q 0x600007f -#define MATCH_FMSUB_Q 0x6000047 -#define MASK_FMSUB_Q 0x600007f -#define MATCH_FNMSUB_Q 0x600004b -#define MASK_FNMSUB_Q 0x600007f -#define MATCH_FNMADD_Q 0x600004f -#define MASK_FNMADD_Q 0x600007f -#define MATCH_C_NOP 0x1 -#define MASK_C_NOP 0xffff -#define MATCH_C_ADDI16SP 0x6101 -#define MASK_C_ADDI16SP 0xef83 -#define MATCH_C_JR 0x8002 -#define MASK_C_JR 0xf07f -#define MATCH_C_JALR 0x9002 -#define MASK_C_JALR 0xf07f -#define MATCH_C_EBREAK 0x9002 -#define MASK_C_EBREAK 0xffff -#define MATCH_C_LD 0x6000 -#define MASK_C_LD 0xe003 -#define MATCH_C_SD 0xe000 -#define MASK_C_SD 0xe003 -#define MATCH_C_ADDIW 0x2001 -#define MASK_C_ADDIW 0xe003 -#define MATCH_C_LDSP 0x6002 -#define MASK_C_LDSP 0xe003 -#define MATCH_C_SDSP 0xe002 -#define MASK_C_SDSP 0xe003 -#define MATCH_C_ADDI4SPN 0x0 -#define MASK_C_ADDI4SPN 0xe003 -#define MATCH_C_FLD 0x2000 -#define MASK_C_FLD 0xe003 -#define MATCH_C_LW 0x4000 -#define MASK_C_LW 0xe003 -#define MATCH_C_FLW 0x6000 -#define MASK_C_FLW 0xe003 -#define MATCH_C_FSD 0xa000 -#define MASK_C_FSD 0xe003 -#define MATCH_C_SW 0xc000 -#define MASK_C_SW 0xe003 -#define MATCH_C_FSW 0xe000 -#define MASK_C_FSW 0xe003 -#define MATCH_C_ADDI 0x1 -#define MASK_C_ADDI 0xe003 -#define MATCH_C_JAL 0x2001 -#define MASK_C_JAL 0xe003 -#define MATCH_C_LI 0x4001 -#define MASK_C_LI 0xe003 -#define MATCH_C_LUI 0x6001 -#define MASK_C_LUI 0xe003 -#define MATCH_C_SRLI 0x8001 -#define MASK_C_SRLI 0xec03 -#define MATCH_C_SRAI 0x8401 -#define MASK_C_SRAI 0xec03 -#define MATCH_C_ANDI 0x8801 -#define MASK_C_ANDI 0xec03 -#define MATCH_C_SUB 0x8c01 -#define MASK_C_SUB 0xfc63 -#define MATCH_C_XOR 0x8c21 -#define MASK_C_XOR 0xfc63 -#define MATCH_C_OR 0x8c41 -#define MASK_C_OR 0xfc63 -#define MATCH_C_AND 0x8c61 -#define MASK_C_AND 0xfc63 -#define MATCH_C_SUBW 0x9c01 -#define MASK_C_SUBW 0xfc63 -#define MATCH_C_ADDW 0x9c21 -#define MASK_C_ADDW 0xfc63 -#define MATCH_C_J 0xa001 -#define MASK_C_J 0xe003 -#define MATCH_C_BEQZ 0xc001 -#define MASK_C_BEQZ 0xe003 -#define MATCH_C_BNEZ 0xe001 -#define MASK_C_BNEZ 0xe003 -#define MATCH_C_SLLI 0x2 -#define MASK_C_SLLI 0xe003 -#define MATCH_C_FLDSP 0x2002 -#define MASK_C_FLDSP 0xe003 -#define MATCH_C_LWSP 0x4002 -#define MASK_C_LWSP 0xe003 -#define MATCH_C_FLWSP 0x6002 -#define MASK_C_FLWSP 0xe003 -#define MATCH_C_MV 0x8002 -#define MASK_C_MV 0xf003 -#define MATCH_C_ADD 0x9002 -#define MASK_C_ADD 0xf003 -#define MATCH_C_FSDSP 0xa002 -#define MASK_C_FSDSP 0xe003 -#define MATCH_C_SWSP 0xc002 -#define MASK_C_SWSP 0xe003 -#define MATCH_C_FSWSP 0xe002 -#define MASK_C_FSWSP 0xe003 -#define MATCH_CUSTOM0 0xb -#define MASK_CUSTOM0 0x707f -#define MATCH_CUSTOM0_RS1 0x200b -#define MASK_CUSTOM0_RS1 0x707f -#define MATCH_CUSTOM0_RS1_RS2 0x300b -#define MASK_CUSTOM0_RS1_RS2 0x707f -#define MATCH_CUSTOM0_RD 0x400b -#define MASK_CUSTOM0_RD 0x707f -#define MATCH_CUSTOM0_RD_RS1 0x600b -#define MASK_CUSTOM0_RD_RS1 0x707f -#define MATCH_CUSTOM0_RD_RS1_RS2 0x700b -#define MASK_CUSTOM0_RD_RS1_RS2 0x707f -#define MATCH_CUSTOM1 0x2b -#define MASK_CUSTOM1 0x707f -#define MATCH_CUSTOM1_RS1 0x202b -#define MASK_CUSTOM1_RS1 0x707f -#define MATCH_CUSTOM1_RS1_RS2 0x302b -#define MASK_CUSTOM1_RS1_RS2 0x707f -#define MATCH_CUSTOM1_RD 0x402b -#define MASK_CUSTOM1_RD 0x707f -#define MATCH_CUSTOM1_RD_RS1 0x602b -#define MASK_CUSTOM1_RD_RS1 0x707f -#define MATCH_CUSTOM1_RD_RS1_RS2 0x702b -#define MASK_CUSTOM1_RD_RS1_RS2 0x707f -#define MATCH_CUSTOM2 0x5b -#define MASK_CUSTOM2 0x707f -#define MATCH_CUSTOM2_RS1 0x205b -#define MASK_CUSTOM2_RS1 0x707f -#define MATCH_CUSTOM2_RS1_RS2 0x305b -#define MASK_CUSTOM2_RS1_RS2 0x707f -#define MATCH_CUSTOM2_RD 0x405b -#define MASK_CUSTOM2_RD 0x707f -#define MATCH_CUSTOM2_RD_RS1 0x605b -#define MASK_CUSTOM2_RD_RS1 0x707f -#define MATCH_CUSTOM2_RD_RS1_RS2 0x705b -#define MASK_CUSTOM2_RD_RS1_RS2 0x707f -#define MATCH_CUSTOM3 0x7b -#define MASK_CUSTOM3 0x707f -#define MATCH_CUSTOM3_RS1 0x207b -#define MASK_CUSTOM3_RS1 0x707f -#define MATCH_CUSTOM3_RS1_RS2 0x307b -#define MASK_CUSTOM3_RS1_RS2 0x707f -#define MATCH_CUSTOM3_RD 0x407b -#define MASK_CUSTOM3_RD 0x707f -#define MATCH_CUSTOM3_RD_RS1 0x607b -#define MASK_CUSTOM3_RD_RS1 0x707f -#define MATCH_CUSTOM3_RD_RS1_RS2 0x707b -#define MASK_CUSTOM3_RD_RS1_RS2 0x707f -#define CSR_FFLAGS 0x1 -#define CSR_FRM 0x2 -#define CSR_FCSR 0x3 -#define CSR_CYCLE 0xc00 -#define CSR_TIME 0xc01 -#define CSR_INSTRET 0xc02 -#define CSR_HPMCOUNTER3 0xc03 -#define CSR_HPMCOUNTER4 0xc04 -#define CSR_HPMCOUNTER5 0xc05 -#define CSR_HPMCOUNTER6 0xc06 -#define CSR_HPMCOUNTER7 0xc07 -#define CSR_HPMCOUNTER8 0xc08 -#define CSR_HPMCOUNTER9 0xc09 -#define CSR_HPMCOUNTER10 0xc0a -#define CSR_HPMCOUNTER11 0xc0b -#define CSR_HPMCOUNTER12 0xc0c -#define CSR_HPMCOUNTER13 0xc0d -#define CSR_HPMCOUNTER14 0xc0e -#define CSR_HPMCOUNTER15 0xc0f -#define CSR_HPMCOUNTER16 0xc10 -#define CSR_HPMCOUNTER17 0xc11 -#define CSR_HPMCOUNTER18 0xc12 -#define CSR_HPMCOUNTER19 0xc13 -#define CSR_HPMCOUNTER20 0xc14 -#define CSR_HPMCOUNTER21 0xc15 -#define CSR_HPMCOUNTER22 0xc16 -#define CSR_HPMCOUNTER23 0xc17 -#define CSR_HPMCOUNTER24 0xc18 -#define CSR_HPMCOUNTER25 0xc19 -#define CSR_HPMCOUNTER26 0xc1a -#define CSR_HPMCOUNTER27 0xc1b -#define CSR_HPMCOUNTER28 0xc1c -#define CSR_HPMCOUNTER29 0xc1d -#define CSR_HPMCOUNTER30 0xc1e -#define CSR_HPMCOUNTER31 0xc1f -#define CSR_SSTATUS 0x100 -#define CSR_SIE 0x104 -#define CSR_STVEC 0x105 -#define CSR_SCOUNTEREN 0x106 -#define CSR_SSCRATCH 0x140 -#define CSR_SEPC 0x141 -#define CSR_SCAUSE 0x142 -#define CSR_SBADADDR 0x143 -#define CSR_SIP 0x144 -#define CSR_SPTBR 0x180 -#define CSR_MSTATUS 0x300 -#define CSR_MISA 0x301 -#define CSR_MEDELEG 0x302 -#define CSR_MIDELEG 0x303 -#define CSR_MIE 0x304 -#define CSR_MTVEC 0x305 -#define CSR_MCOUNTEREN 0x306 -#define CSR_MSCRATCH 0x340 -#define CSR_MEPC 0x341 -#define CSR_MCAUSE 0x342 -#define CSR_MBADADDR 0x343 -#define CSR_MIP 0x344 -#define CSR_PMPCFG0 0x3a0 -#define CSR_PMPCFG1 0x3a1 -#define CSR_PMPCFG2 0x3a2 -#define CSR_PMPCFG3 0x3a3 -#define CSR_PMPADDR0 0x3b0 -#define CSR_PMPADDR1 0x3b1 -#define CSR_PMPADDR2 0x3b2 -#define CSR_PMPADDR3 0x3b3 -#define CSR_PMPADDR4 0x3b4 -#define CSR_PMPADDR5 0x3b5 -#define CSR_PMPADDR6 0x3b6 -#define CSR_PMPADDR7 0x3b7 -#define CSR_PMPADDR8 0x3b8 -#define CSR_PMPADDR9 0x3b9 -#define CSR_PMPADDR10 0x3ba -#define CSR_PMPADDR11 0x3bb -#define CSR_PMPADDR12 0x3bc -#define CSR_PMPADDR13 0x3bd -#define CSR_PMPADDR14 0x3be -#define CSR_PMPADDR15 0x3bf -#define CSR_TSELECT 0x7a0 -#define CSR_TDATA1 0x7a1 -#define CSR_TDATA2 0x7a2 -#define CSR_TDATA3 0x7a3 -#define CSR_DCSR 0x7b0 -#define CSR_DPC 0x7b1 -#define CSR_DSCRATCH 0x7b2 -#define CSR_MCYCLE 0xb00 -#define CSR_MINSTRET 0xb02 -#define CSR_MHPMCOUNTER3 0xb03 -#define CSR_MHPMCOUNTER4 0xb04 -#define CSR_MHPMCOUNTER5 0xb05 -#define CSR_MHPMCOUNTER6 0xb06 -#define CSR_MHPMCOUNTER7 0xb07 -#define CSR_MHPMCOUNTER8 0xb08 -#define CSR_MHPMCOUNTER9 0xb09 -#define CSR_MHPMCOUNTER10 0xb0a -#define CSR_MHPMCOUNTER11 0xb0b -#define CSR_MHPMCOUNTER12 0xb0c -#define CSR_MHPMCOUNTER13 0xb0d -#define CSR_MHPMCOUNTER14 0xb0e -#define CSR_MHPMCOUNTER15 0xb0f -#define CSR_MHPMCOUNTER16 0xb10 -#define CSR_MHPMCOUNTER17 0xb11 -#define CSR_MHPMCOUNTER18 0xb12 -#define CSR_MHPMCOUNTER19 0xb13 -#define CSR_MHPMCOUNTER20 0xb14 -#define CSR_MHPMCOUNTER21 0xb15 -#define CSR_MHPMCOUNTER22 0xb16 -#define CSR_MHPMCOUNTER23 0xb17 -#define CSR_MHPMCOUNTER24 0xb18 -#define CSR_MHPMCOUNTER25 0xb19 -#define CSR_MHPMCOUNTER26 0xb1a -#define CSR_MHPMCOUNTER27 0xb1b -#define CSR_MHPMCOUNTER28 0xb1c -#define CSR_MHPMCOUNTER29 0xb1d -#define CSR_MHPMCOUNTER30 0xb1e -#define CSR_MHPMCOUNTER31 0xb1f -#define CSR_MHPMEVENT3 0x323 -#define CSR_MHPMEVENT4 0x324 -#define CSR_MHPMEVENT5 0x325 -#define CSR_MHPMEVENT6 0x326 -#define CSR_MHPMEVENT7 0x327 -#define CSR_MHPMEVENT8 0x328 -#define CSR_MHPMEVENT9 0x329 -#define CSR_MHPMEVENT10 0x32a -#define CSR_MHPMEVENT11 0x32b -#define CSR_MHPMEVENT12 0x32c -#define CSR_MHPMEVENT13 0x32d -#define CSR_MHPMEVENT14 0x32e -#define CSR_MHPMEVENT15 0x32f -#define CSR_MHPMEVENT16 0x330 -#define CSR_MHPMEVENT17 0x331 -#define CSR_MHPMEVENT18 0x332 -#define CSR_MHPMEVENT19 0x333 -#define CSR_MHPMEVENT20 0x334 -#define CSR_MHPMEVENT21 0x335 -#define CSR_MHPMEVENT22 0x336 -#define CSR_MHPMEVENT23 0x337 -#define CSR_MHPMEVENT24 0x338 -#define CSR_MHPMEVENT25 0x339 -#define CSR_MHPMEVENT26 0x33a -#define CSR_MHPMEVENT27 0x33b -#define CSR_MHPMEVENT28 0x33c -#define CSR_MHPMEVENT29 0x33d -#define CSR_MHPMEVENT30 0x33e -#define CSR_MHPMEVENT31 0x33f -#define CSR_MVENDORID 0xf11 -#define CSR_MARCHID 0xf12 -#define CSR_MIMPID 0xf13 -#define CSR_MHARTID 0xf14 -#define CSR_CYCLEH 0xc80 -#define CSR_TIMEH 0xc81 -#define CSR_INSTRETH 0xc82 -#define CSR_HPMCOUNTER3H 0xc83 -#define CSR_HPMCOUNTER4H 0xc84 -#define CSR_HPMCOUNTER5H 0xc85 -#define CSR_HPMCOUNTER6H 0xc86 -#define CSR_HPMCOUNTER7H 0xc87 -#define CSR_HPMCOUNTER8H 0xc88 -#define CSR_HPMCOUNTER9H 0xc89 -#define CSR_HPMCOUNTER10H 0xc8a -#define CSR_HPMCOUNTER11H 0xc8b -#define CSR_HPMCOUNTER12H 0xc8c -#define CSR_HPMCOUNTER13H 0xc8d -#define CSR_HPMCOUNTER14H 0xc8e -#define CSR_HPMCOUNTER15H 0xc8f -#define CSR_HPMCOUNTER16H 0xc90 -#define CSR_HPMCOUNTER17H 0xc91 -#define CSR_HPMCOUNTER18H 0xc92 -#define CSR_HPMCOUNTER19H 0xc93 -#define CSR_HPMCOUNTER20H 0xc94 -#define CSR_HPMCOUNTER21H 0xc95 -#define CSR_HPMCOUNTER22H 0xc96 -#define CSR_HPMCOUNTER23H 0xc97 -#define CSR_HPMCOUNTER24H 0xc98 -#define CSR_HPMCOUNTER25H 0xc99 -#define CSR_HPMCOUNTER26H 0xc9a -#define CSR_HPMCOUNTER27H 0xc9b -#define CSR_HPMCOUNTER28H 0xc9c -#define CSR_HPMCOUNTER29H 0xc9d -#define CSR_HPMCOUNTER30H 0xc9e -#define CSR_HPMCOUNTER31H 0xc9f -#define CSR_MCYCLEH 0xb80 -#define CSR_MINSTRETH 0xb82 -#define CSR_MHPMCOUNTER3H 0xb83 -#define CSR_MHPMCOUNTER4H 0xb84 -#define CSR_MHPMCOUNTER5H 0xb85 -#define CSR_MHPMCOUNTER6H 0xb86 -#define CSR_MHPMCOUNTER7H 0xb87 -#define CSR_MHPMCOUNTER8H 0xb88 -#define CSR_MHPMCOUNTER9H 0xb89 -#define CSR_MHPMCOUNTER10H 0xb8a -#define CSR_MHPMCOUNTER11H 0xb8b -#define CSR_MHPMCOUNTER12H 0xb8c -#define CSR_MHPMCOUNTER13H 0xb8d -#define CSR_MHPMCOUNTER14H 0xb8e -#define CSR_MHPMCOUNTER15H 0xb8f -#define CSR_MHPMCOUNTER16H 0xb90 -#define CSR_MHPMCOUNTER17H 0xb91 -#define CSR_MHPMCOUNTER18H 0xb92 -#define CSR_MHPMCOUNTER19H 0xb93 -#define CSR_MHPMCOUNTER20H 0xb94 -#define CSR_MHPMCOUNTER21H 0xb95 -#define CSR_MHPMCOUNTER22H 0xb96 -#define CSR_MHPMCOUNTER23H 0xb97 -#define CSR_MHPMCOUNTER24H 0xb98 -#define CSR_MHPMCOUNTER25H 0xb99 -#define CSR_MHPMCOUNTER26H 0xb9a -#define CSR_MHPMCOUNTER27H 0xb9b -#define CSR_MHPMCOUNTER28H 0xb9c -#define CSR_MHPMCOUNTER29H 0xb9d -#define CSR_MHPMCOUNTER30H 0xb9e -#define CSR_MHPMCOUNTER31H 0xb9f -#define CAUSE_MISALIGNED_FETCH 0x0 -#define CAUSE_FETCH_ACCESS 0x1 -#define CAUSE_ILLEGAL_INSTRUCTION 0x2 -#define CAUSE_BREAKPOINT 0x3 -#define CAUSE_MISALIGNED_LOAD 0x4 -#define CAUSE_LOAD_ACCESS 0x5 -#define CAUSE_MISALIGNED_STORE 0x6 -#define CAUSE_STORE_ACCESS 0x7 -#define CAUSE_USER_ECALL 0x8 -#define CAUSE_SUPERVISOR_ECALL 0x9 -#define CAUSE_HYPERVISOR_ECALL 0xa -#define CAUSE_MACHINE_ECALL 0xb -#define CAUSE_FETCH_PAGE_FAULT 0xc -#define CAUSE_LOAD_PAGE_FAULT 0xd -#define CAUSE_STORE_PAGE_FAULT 0xf -#endif -#ifdef DECLARE_INSN -DECLARE_INSN(beq, MATCH_BEQ, MASK_BEQ) -DECLARE_INSN(bne, MATCH_BNE, MASK_BNE) -DECLARE_INSN(blt, MATCH_BLT, MASK_BLT) -DECLARE_INSN(bge, MATCH_BGE, MASK_BGE) -DECLARE_INSN(bltu, MATCH_BLTU, MASK_BLTU) -DECLARE_INSN(bgeu, MATCH_BGEU, MASK_BGEU) -DECLARE_INSN(jalr, MATCH_JALR, MASK_JALR) -DECLARE_INSN(jal, MATCH_JAL, MASK_JAL) -DECLARE_INSN(lui, MATCH_LUI, MASK_LUI) -DECLARE_INSN(auipc, MATCH_AUIPC, MASK_AUIPC) -DECLARE_INSN(addi, MATCH_ADDI, MASK_ADDI) -DECLARE_INSN(slli, MATCH_SLLI, MASK_SLLI) -DECLARE_INSN(slti, MATCH_SLTI, MASK_SLTI) -DECLARE_INSN(sltiu, MATCH_SLTIU, MASK_SLTIU) -DECLARE_INSN(xori, MATCH_XORI, MASK_XORI) -DECLARE_INSN(srli, MATCH_SRLI, MASK_SRLI) -DECLARE_INSN(srai, MATCH_SRAI, MASK_SRAI) -DECLARE_INSN(ori, MATCH_ORI, MASK_ORI) -DECLARE_INSN(andi, MATCH_ANDI, MASK_ANDI) -DECLARE_INSN(add, MATCH_ADD, MASK_ADD) -DECLARE_INSN(sub, MATCH_SUB, MASK_SUB) -DECLARE_INSN(sll, MATCH_SLL, MASK_SLL) -DECLARE_INSN(slt, MATCH_SLT, MASK_SLT) -DECLARE_INSN(sltu, MATCH_SLTU, MASK_SLTU) -DECLARE_INSN(xor, MATCH_XOR, MASK_XOR) -DECLARE_INSN(srl, MATCH_SRL, MASK_SRL) -DECLARE_INSN(sra, MATCH_SRA, MASK_SRA) -DECLARE_INSN(or, MATCH_OR, MASK_OR) -DECLARE_INSN(and, MATCH_AND, MASK_AND) -DECLARE_INSN(addiw, MATCH_ADDIW, MASK_ADDIW) -DECLARE_INSN(slliw, MATCH_SLLIW, MASK_SLLIW) -DECLARE_INSN(srliw, MATCH_SRLIW, MASK_SRLIW) -DECLARE_INSN(sraiw, MATCH_SRAIW, MASK_SRAIW) -DECLARE_INSN(addw, MATCH_ADDW, MASK_ADDW) -DECLARE_INSN(subw, MATCH_SUBW, MASK_SUBW) -DECLARE_INSN(sllw, MATCH_SLLW, MASK_SLLW) -DECLARE_INSN(srlw, MATCH_SRLW, MASK_SRLW) -DECLARE_INSN(sraw, MATCH_SRAW, MASK_SRAW) -DECLARE_INSN(lb, MATCH_LB, MASK_LB) -DECLARE_INSN(lh, MATCH_LH, MASK_LH) -DECLARE_INSN(lw, MATCH_LW, MASK_LW) -DECLARE_INSN(ld, MATCH_LD, MASK_LD) -DECLARE_INSN(lbu, MATCH_LBU, MASK_LBU) -DECLARE_INSN(lhu, MATCH_LHU, MASK_LHU) -DECLARE_INSN(lwu, MATCH_LWU, MASK_LWU) -DECLARE_INSN(sb, MATCH_SB, MASK_SB) -DECLARE_INSN(sh, MATCH_SH, MASK_SH) -DECLARE_INSN(sw, MATCH_SW, MASK_SW) -DECLARE_INSN(sd, MATCH_SD, MASK_SD) -DECLARE_INSN(fence, MATCH_FENCE, MASK_FENCE) -DECLARE_INSN(fence_i, MATCH_FENCE_I, MASK_FENCE_I) -DECLARE_INSN(mul, MATCH_MUL, MASK_MUL) -DECLARE_INSN(mulh, MATCH_MULH, MASK_MULH) -DECLARE_INSN(mulhsu, MATCH_MULHSU, MASK_MULHSU) -DECLARE_INSN(mulhu, MATCH_MULHU, MASK_MULHU) -DECLARE_INSN(div, MATCH_DIV, MASK_DIV) -DECLARE_INSN(divu, MATCH_DIVU, MASK_DIVU) -DECLARE_INSN(rem, MATCH_REM, MASK_REM) -DECLARE_INSN(remu, MATCH_REMU, MASK_REMU) -DECLARE_INSN(mulw, MATCH_MULW, MASK_MULW) -DECLARE_INSN(divw, MATCH_DIVW, MASK_DIVW) -DECLARE_INSN(divuw, MATCH_DIVUW, MASK_DIVUW) -DECLARE_INSN(remw, MATCH_REMW, MASK_REMW) -DECLARE_INSN(remuw, MATCH_REMUW, MASK_REMUW) -DECLARE_INSN(amoadd_w, MATCH_AMOADD_W, MASK_AMOADD_W) -DECLARE_INSN(amoxor_w, MATCH_AMOXOR_W, MASK_AMOXOR_W) -DECLARE_INSN(amoor_w, MATCH_AMOOR_W, MASK_AMOOR_W) -DECLARE_INSN(amoand_w, MATCH_AMOAND_W, MASK_AMOAND_W) -DECLARE_INSN(amomin_w, MATCH_AMOMIN_W, MASK_AMOMIN_W) -DECLARE_INSN(amomax_w, MATCH_AMOMAX_W, MASK_AMOMAX_W) -DECLARE_INSN(amominu_w, MATCH_AMOMINU_W, MASK_AMOMINU_W) -DECLARE_INSN(amomaxu_w, MATCH_AMOMAXU_W, MASK_AMOMAXU_W) -DECLARE_INSN(amoswap_w, MATCH_AMOSWAP_W, MASK_AMOSWAP_W) -DECLARE_INSN(lr_w, MATCH_LR_W, MASK_LR_W) -DECLARE_INSN(sc_w, MATCH_SC_W, MASK_SC_W) -DECLARE_INSN(amoadd_d, MATCH_AMOADD_D, MASK_AMOADD_D) -DECLARE_INSN(amoxor_d, MATCH_AMOXOR_D, MASK_AMOXOR_D) -DECLARE_INSN(amoor_d, MATCH_AMOOR_D, MASK_AMOOR_D) -DECLARE_INSN(amoand_d, MATCH_AMOAND_D, MASK_AMOAND_D) -DECLARE_INSN(amomin_d, MATCH_AMOMIN_D, MASK_AMOMIN_D) -DECLARE_INSN(amomax_d, MATCH_AMOMAX_D, MASK_AMOMAX_D) -DECLARE_INSN(amominu_d, MATCH_AMOMINU_D, MASK_AMOMINU_D) -DECLARE_INSN(amomaxu_d, MATCH_AMOMAXU_D, MASK_AMOMAXU_D) -DECLARE_INSN(amoswap_d, MATCH_AMOSWAP_D, MASK_AMOSWAP_D) -DECLARE_INSN(lr_d, MATCH_LR_D, MASK_LR_D) -DECLARE_INSN(sc_d, MATCH_SC_D, MASK_SC_D) -DECLARE_INSN(ecall, MATCH_ECALL, MASK_ECALL) -DECLARE_INSN(ebreak, MATCH_EBREAK, MASK_EBREAK) -DECLARE_INSN(uret, MATCH_URET, MASK_URET) -DECLARE_INSN(sret, MATCH_SRET, MASK_SRET) -DECLARE_INSN(hret, MATCH_HRET, MASK_HRET) -DECLARE_INSN(mret, MATCH_MRET, MASK_MRET) -DECLARE_INSN(dret, MATCH_DRET, MASK_DRET) -DECLARE_INSN(sfence_vma, MATCH_SFENCE_VMA, MASK_SFENCE_VMA) -DECLARE_INSN(wfi, MATCH_WFI, MASK_WFI) -DECLARE_INSN(csrrw, MATCH_CSRRW, MASK_CSRRW) -DECLARE_INSN(csrrs, MATCH_CSRRS, MASK_CSRRS) -DECLARE_INSN(csrrc, MATCH_CSRRC, MASK_CSRRC) -DECLARE_INSN(csrrwi, MATCH_CSRRWI, MASK_CSRRWI) -DECLARE_INSN(csrrsi, MATCH_CSRRSI, MASK_CSRRSI) -DECLARE_INSN(csrrci, MATCH_CSRRCI, MASK_CSRRCI) -DECLARE_INSN(fadd_s, MATCH_FADD_S, MASK_FADD_S) -DECLARE_INSN(fsub_s, MATCH_FSUB_S, MASK_FSUB_S) -DECLARE_INSN(fmul_s, MATCH_FMUL_S, MASK_FMUL_S) -DECLARE_INSN(fdiv_s, MATCH_FDIV_S, MASK_FDIV_S) -DECLARE_INSN(fsgnj_s, MATCH_FSGNJ_S, MASK_FSGNJ_S) -DECLARE_INSN(fsgnjn_s, MATCH_FSGNJN_S, MASK_FSGNJN_S) -DECLARE_INSN(fsgnjx_s, MATCH_FSGNJX_S, MASK_FSGNJX_S) -DECLARE_INSN(fmin_s, MATCH_FMIN_S, MASK_FMIN_S) -DECLARE_INSN(fmax_s, MATCH_FMAX_S, MASK_FMAX_S) -DECLARE_INSN(fsqrt_s, MATCH_FSQRT_S, MASK_FSQRT_S) -DECLARE_INSN(fadd_d, MATCH_FADD_D, MASK_FADD_D) -DECLARE_INSN(fsub_d, MATCH_FSUB_D, MASK_FSUB_D) -DECLARE_INSN(fmul_d, MATCH_FMUL_D, MASK_FMUL_D) -DECLARE_INSN(fdiv_d, MATCH_FDIV_D, MASK_FDIV_D) -DECLARE_INSN(fsgnj_d, MATCH_FSGNJ_D, MASK_FSGNJ_D) -DECLARE_INSN(fsgnjn_d, MATCH_FSGNJN_D, MASK_FSGNJN_D) -DECLARE_INSN(fsgnjx_d, MATCH_FSGNJX_D, MASK_FSGNJX_D) -DECLARE_INSN(fmin_d, MATCH_FMIN_D, MASK_FMIN_D) -DECLARE_INSN(fmax_d, MATCH_FMAX_D, MASK_FMAX_D) -DECLARE_INSN(fcvt_s_d, MATCH_FCVT_S_D, MASK_FCVT_S_D) -DECLARE_INSN(fcvt_d_s, MATCH_FCVT_D_S, MASK_FCVT_D_S) -DECLARE_INSN(fsqrt_d, MATCH_FSQRT_D, MASK_FSQRT_D) -DECLARE_INSN(fadd_q, MATCH_FADD_Q, MASK_FADD_Q) -DECLARE_INSN(fsub_q, MATCH_FSUB_Q, MASK_FSUB_Q) -DECLARE_INSN(fmul_q, MATCH_FMUL_Q, MASK_FMUL_Q) -DECLARE_INSN(fdiv_q, MATCH_FDIV_Q, MASK_FDIV_Q) -DECLARE_INSN(fsgnj_q, MATCH_FSGNJ_Q, MASK_FSGNJ_Q) -DECLARE_INSN(fsgnjn_q, MATCH_FSGNJN_Q, MASK_FSGNJN_Q) -DECLARE_INSN(fsgnjx_q, MATCH_FSGNJX_Q, MASK_FSGNJX_Q) -DECLARE_INSN(fmin_q, MATCH_FMIN_Q, MASK_FMIN_Q) -DECLARE_INSN(fmax_q, MATCH_FMAX_Q, MASK_FMAX_Q) -DECLARE_INSN(fcvt_s_q, MATCH_FCVT_S_Q, MASK_FCVT_S_Q) -DECLARE_INSN(fcvt_q_s, MATCH_FCVT_Q_S, MASK_FCVT_Q_S) -DECLARE_INSN(fcvt_d_q, MATCH_FCVT_D_Q, MASK_FCVT_D_Q) -DECLARE_INSN(fcvt_q_d, MATCH_FCVT_Q_D, MASK_FCVT_Q_D) -DECLARE_INSN(fsqrt_q, MATCH_FSQRT_Q, MASK_FSQRT_Q) -DECLARE_INSN(fle_s, MATCH_FLE_S, MASK_FLE_S) -DECLARE_INSN(flt_s, MATCH_FLT_S, MASK_FLT_S) -DECLARE_INSN(feq_s, MATCH_FEQ_S, MASK_FEQ_S) -DECLARE_INSN(fle_d, MATCH_FLE_D, MASK_FLE_D) -DECLARE_INSN(flt_d, MATCH_FLT_D, MASK_FLT_D) -DECLARE_INSN(feq_d, MATCH_FEQ_D, MASK_FEQ_D) -DECLARE_INSN(fle_q, MATCH_FLE_Q, MASK_FLE_Q) -DECLARE_INSN(flt_q, MATCH_FLT_Q, MASK_FLT_Q) -DECLARE_INSN(feq_q, MATCH_FEQ_Q, MASK_FEQ_Q) -DECLARE_INSN(fcvt_w_s, MATCH_FCVT_W_S, MASK_FCVT_W_S) -DECLARE_INSN(fcvt_wu_s, MATCH_FCVT_WU_S, MASK_FCVT_WU_S) -DECLARE_INSN(fcvt_l_s, MATCH_FCVT_L_S, MASK_FCVT_L_S) -DECLARE_INSN(fcvt_lu_s, MATCH_FCVT_LU_S, MASK_FCVT_LU_S) -DECLARE_INSN(fmv_x_s, MATCH_FMV_X_S, MASK_FMV_X_S) -DECLARE_INSN(fclass_s, MATCH_FCLASS_S, MASK_FCLASS_S) -DECLARE_INSN(fcvt_w_d, MATCH_FCVT_W_D, MASK_FCVT_W_D) -DECLARE_INSN(fcvt_wu_d, MATCH_FCVT_WU_D, MASK_FCVT_WU_D) -DECLARE_INSN(fcvt_l_d, MATCH_FCVT_L_D, MASK_FCVT_L_D) -DECLARE_INSN(fcvt_lu_d, MATCH_FCVT_LU_D, MASK_FCVT_LU_D) -DECLARE_INSN(fmv_x_d, MATCH_FMV_X_D, MASK_FMV_X_D) -DECLARE_INSN(fclass_d, MATCH_FCLASS_D, MASK_FCLASS_D) -DECLARE_INSN(fcvt_w_q, MATCH_FCVT_W_Q, MASK_FCVT_W_Q) -DECLARE_INSN(fcvt_wu_q, MATCH_FCVT_WU_Q, MASK_FCVT_WU_Q) -DECLARE_INSN(fcvt_l_q, MATCH_FCVT_L_Q, MASK_FCVT_L_Q) -DECLARE_INSN(fcvt_lu_q, MATCH_FCVT_LU_Q, MASK_FCVT_LU_Q) -DECLARE_INSN(fmv_x_q, MATCH_FMV_X_Q, MASK_FMV_X_Q) -DECLARE_INSN(fclass_q, MATCH_FCLASS_Q, MASK_FCLASS_Q) -DECLARE_INSN(fcvt_s_w, MATCH_FCVT_S_W, MASK_FCVT_S_W) -DECLARE_INSN(fcvt_s_wu, MATCH_FCVT_S_WU, MASK_FCVT_S_WU) -DECLARE_INSN(fcvt_s_l, MATCH_FCVT_S_L, MASK_FCVT_S_L) -DECLARE_INSN(fcvt_s_lu, MATCH_FCVT_S_LU, MASK_FCVT_S_LU) -DECLARE_INSN(fmv_s_x, MATCH_FMV_S_X, MASK_FMV_S_X) -DECLARE_INSN(fcvt_d_w, MATCH_FCVT_D_W, MASK_FCVT_D_W) -DECLARE_INSN(fcvt_d_wu, MATCH_FCVT_D_WU, MASK_FCVT_D_WU) -DECLARE_INSN(fcvt_d_l, MATCH_FCVT_D_L, MASK_FCVT_D_L) -DECLARE_INSN(fcvt_d_lu, MATCH_FCVT_D_LU, MASK_FCVT_D_LU) -DECLARE_INSN(fmv_d_x, MATCH_FMV_D_X, MASK_FMV_D_X) -DECLARE_INSN(fcvt_q_w, MATCH_FCVT_Q_W, MASK_FCVT_Q_W) -DECLARE_INSN(fcvt_q_wu, MATCH_FCVT_Q_WU, MASK_FCVT_Q_WU) -DECLARE_INSN(fcvt_q_l, MATCH_FCVT_Q_L, MASK_FCVT_Q_L) -DECLARE_INSN(fcvt_q_lu, MATCH_FCVT_Q_LU, MASK_FCVT_Q_LU) -DECLARE_INSN(fmv_q_x, MATCH_FMV_Q_X, MASK_FMV_Q_X) -DECLARE_INSN(flw, MATCH_FLW, MASK_FLW) -DECLARE_INSN(fld, MATCH_FLD, MASK_FLD) -DECLARE_INSN(flq, MATCH_FLQ, MASK_FLQ) -DECLARE_INSN(fsw, MATCH_FSW, MASK_FSW) -DECLARE_INSN(fsd, MATCH_FSD, MASK_FSD) -DECLARE_INSN(fsq, MATCH_FSQ, MASK_FSQ) -DECLARE_INSN(fmadd_s, MATCH_FMADD_S, MASK_FMADD_S) -DECLARE_INSN(fmsub_s, MATCH_FMSUB_S, MASK_FMSUB_S) -DECLARE_INSN(fnmsub_s, MATCH_FNMSUB_S, MASK_FNMSUB_S) -DECLARE_INSN(fnmadd_s, MATCH_FNMADD_S, MASK_FNMADD_S) -DECLARE_INSN(fmadd_d, MATCH_FMADD_D, MASK_FMADD_D) -DECLARE_INSN(fmsub_d, MATCH_FMSUB_D, MASK_FMSUB_D) -DECLARE_INSN(fnmsub_d, MATCH_FNMSUB_D, MASK_FNMSUB_D) -DECLARE_INSN(fnmadd_d, MATCH_FNMADD_D, MASK_FNMADD_D) -DECLARE_INSN(fmadd_q, MATCH_FMADD_Q, MASK_FMADD_Q) -DECLARE_INSN(fmsub_q, MATCH_FMSUB_Q, MASK_FMSUB_Q) -DECLARE_INSN(fnmsub_q, MATCH_FNMSUB_Q, MASK_FNMSUB_Q) -DECLARE_INSN(fnmadd_q, MATCH_FNMADD_Q, MASK_FNMADD_Q) -DECLARE_INSN(c_nop, MATCH_C_NOP, MASK_C_NOP) -DECLARE_INSN(c_addi16sp, MATCH_C_ADDI16SP, MASK_C_ADDI16SP) -DECLARE_INSN(c_jr, MATCH_C_JR, MASK_C_JR) -DECLARE_INSN(c_jalr, MATCH_C_JALR, MASK_C_JALR) -DECLARE_INSN(c_ebreak, MATCH_C_EBREAK, MASK_C_EBREAK) -DECLARE_INSN(c_ld, MATCH_C_LD, MASK_C_LD) -DECLARE_INSN(c_sd, MATCH_C_SD, MASK_C_SD) -DECLARE_INSN(c_addiw, MATCH_C_ADDIW, MASK_C_ADDIW) -DECLARE_INSN(c_ldsp, MATCH_C_LDSP, MASK_C_LDSP) -DECLARE_INSN(c_sdsp, MATCH_C_SDSP, MASK_C_SDSP) -DECLARE_INSN(c_addi4spn, MATCH_C_ADDI4SPN, MASK_C_ADDI4SPN) -DECLARE_INSN(c_fld, MATCH_C_FLD, MASK_C_FLD) -DECLARE_INSN(c_lw, MATCH_C_LW, MASK_C_LW) -DECLARE_INSN(c_flw, MATCH_C_FLW, MASK_C_FLW) -DECLARE_INSN(c_fsd, MATCH_C_FSD, MASK_C_FSD) -DECLARE_INSN(c_sw, MATCH_C_SW, MASK_C_SW) -DECLARE_INSN(c_fsw, MATCH_C_FSW, MASK_C_FSW) -DECLARE_INSN(c_addi, MATCH_C_ADDI, MASK_C_ADDI) -DECLARE_INSN(c_jal, MATCH_C_JAL, MASK_C_JAL) -DECLARE_INSN(c_li, MATCH_C_LI, MASK_C_LI) -DECLARE_INSN(c_lui, MATCH_C_LUI, MASK_C_LUI) -DECLARE_INSN(c_srli, MATCH_C_SRLI, MASK_C_SRLI) -DECLARE_INSN(c_srai, MATCH_C_SRAI, MASK_C_SRAI) -DECLARE_INSN(c_andi, MATCH_C_ANDI, MASK_C_ANDI) -DECLARE_INSN(c_sub, MATCH_C_SUB, MASK_C_SUB) -DECLARE_INSN(c_xor, MATCH_C_XOR, MASK_C_XOR) -DECLARE_INSN(c_or, MATCH_C_OR, MASK_C_OR) -DECLARE_INSN(c_and, MATCH_C_AND, MASK_C_AND) -DECLARE_INSN(c_subw, MATCH_C_SUBW, MASK_C_SUBW) -DECLARE_INSN(c_addw, MATCH_C_ADDW, MASK_C_ADDW) -DECLARE_INSN(c_j, MATCH_C_J, MASK_C_J) -DECLARE_INSN(c_beqz, MATCH_C_BEQZ, MASK_C_BEQZ) -DECLARE_INSN(c_bnez, MATCH_C_BNEZ, MASK_C_BNEZ) -DECLARE_INSN(c_slli, MATCH_C_SLLI, MASK_C_SLLI) -DECLARE_INSN(c_fldsp, MATCH_C_FLDSP, MASK_C_FLDSP) -DECLARE_INSN(c_lwsp, MATCH_C_LWSP, MASK_C_LWSP) -DECLARE_INSN(c_flwsp, MATCH_C_FLWSP, MASK_C_FLWSP) -DECLARE_INSN(c_mv, MATCH_C_MV, MASK_C_MV) -DECLARE_INSN(c_add, MATCH_C_ADD, MASK_C_ADD) -DECLARE_INSN(c_fsdsp, MATCH_C_FSDSP, MASK_C_FSDSP) -DECLARE_INSN(c_swsp, MATCH_C_SWSP, MASK_C_SWSP) -DECLARE_INSN(c_fswsp, MATCH_C_FSWSP, MASK_C_FSWSP) -DECLARE_INSN(custom0, MATCH_CUSTOM0, MASK_CUSTOM0) -DECLARE_INSN(custom0_rs1, MATCH_CUSTOM0_RS1, MASK_CUSTOM0_RS1) -DECLARE_INSN(custom0_rs1_rs2, MATCH_CUSTOM0_RS1_RS2, MASK_CUSTOM0_RS1_RS2) -DECLARE_INSN(custom0_rd, MATCH_CUSTOM0_RD, MASK_CUSTOM0_RD) -DECLARE_INSN(custom0_rd_rs1, MATCH_CUSTOM0_RD_RS1, MASK_CUSTOM0_RD_RS1) -DECLARE_INSN(custom0_rd_rs1_rs2, MATCH_CUSTOM0_RD_RS1_RS2, MASK_CUSTOM0_RD_RS1_RS2) -DECLARE_INSN(custom1, MATCH_CUSTOM1, MASK_CUSTOM1) -DECLARE_INSN(custom1_rs1, MATCH_CUSTOM1_RS1, MASK_CUSTOM1_RS1) -DECLARE_INSN(custom1_rs1_rs2, MATCH_CUSTOM1_RS1_RS2, MASK_CUSTOM1_RS1_RS2) -DECLARE_INSN(custom1_rd, MATCH_CUSTOM1_RD, MASK_CUSTOM1_RD) -DECLARE_INSN(custom1_rd_rs1, MATCH_CUSTOM1_RD_RS1, MASK_CUSTOM1_RD_RS1) -DECLARE_INSN(custom1_rd_rs1_rs2, MATCH_CUSTOM1_RD_RS1_RS2, MASK_CUSTOM1_RD_RS1_RS2) -DECLARE_INSN(custom2, MATCH_CUSTOM2, MASK_CUSTOM2) -DECLARE_INSN(custom2_rs1, MATCH_CUSTOM2_RS1, MASK_CUSTOM2_RS1) -DECLARE_INSN(custom2_rs1_rs2, MATCH_CUSTOM2_RS1_RS2, MASK_CUSTOM2_RS1_RS2) -DECLARE_INSN(custom2_rd, MATCH_CUSTOM2_RD, MASK_CUSTOM2_RD) -DECLARE_INSN(custom2_rd_rs1, MATCH_CUSTOM2_RD_RS1, MASK_CUSTOM2_RD_RS1) -DECLARE_INSN(custom2_rd_rs1_rs2, MATCH_CUSTOM2_RD_RS1_RS2, MASK_CUSTOM2_RD_RS1_RS2) -DECLARE_INSN(custom3, MATCH_CUSTOM3, MASK_CUSTOM3) -DECLARE_INSN(custom3_rs1, MATCH_CUSTOM3_RS1, MASK_CUSTOM3_RS1) -DECLARE_INSN(custom3_rs1_rs2, MATCH_CUSTOM3_RS1_RS2, MASK_CUSTOM3_RS1_RS2) -DECLARE_INSN(custom3_rd, MATCH_CUSTOM3_RD, MASK_CUSTOM3_RD) -DECLARE_INSN(custom3_rd_rs1, MATCH_CUSTOM3_RD_RS1, MASK_CUSTOM3_RD_RS1) -DECLARE_INSN(custom3_rd_rs1_rs2, MATCH_CUSTOM3_RD_RS1_RS2, MASK_CUSTOM3_RD_RS1_RS2) -#endif -#ifdef DECLARE_CSR -DECLARE_CSR(fflags, CSR_FFLAGS) -DECLARE_CSR(frm, CSR_FRM) -DECLARE_CSR(fcsr, CSR_FCSR) -DECLARE_CSR(cycle, CSR_CYCLE) -DECLARE_CSR(time, CSR_TIME) -DECLARE_CSR(instret, CSR_INSTRET) -DECLARE_CSR(hpmcounter3, CSR_HPMCOUNTER3) -DECLARE_CSR(hpmcounter4, CSR_HPMCOUNTER4) -DECLARE_CSR(hpmcounter5, CSR_HPMCOUNTER5) -DECLARE_CSR(hpmcounter6, CSR_HPMCOUNTER6) -DECLARE_CSR(hpmcounter7, CSR_HPMCOUNTER7) -DECLARE_CSR(hpmcounter8, CSR_HPMCOUNTER8) -DECLARE_CSR(hpmcounter9, CSR_HPMCOUNTER9) -DECLARE_CSR(hpmcounter10, CSR_HPMCOUNTER10) -DECLARE_CSR(hpmcounter11, CSR_HPMCOUNTER11) -DECLARE_CSR(hpmcounter12, CSR_HPMCOUNTER12) -DECLARE_CSR(hpmcounter13, CSR_HPMCOUNTER13) -DECLARE_CSR(hpmcounter14, CSR_HPMCOUNTER14) -DECLARE_CSR(hpmcounter15, CSR_HPMCOUNTER15) -DECLARE_CSR(hpmcounter16, CSR_HPMCOUNTER16) -DECLARE_CSR(hpmcounter17, CSR_HPMCOUNTER17) -DECLARE_CSR(hpmcounter18, CSR_HPMCOUNTER18) -DECLARE_CSR(hpmcounter19, CSR_HPMCOUNTER19) -DECLARE_CSR(hpmcounter20, CSR_HPMCOUNTER20) -DECLARE_CSR(hpmcounter21, CSR_HPMCOUNTER21) -DECLARE_CSR(hpmcounter22, CSR_HPMCOUNTER22) -DECLARE_CSR(hpmcounter23, CSR_HPMCOUNTER23) -DECLARE_CSR(hpmcounter24, CSR_HPMCOUNTER24) -DECLARE_CSR(hpmcounter25, CSR_HPMCOUNTER25) -DECLARE_CSR(hpmcounter26, CSR_HPMCOUNTER26) -DECLARE_CSR(hpmcounter27, CSR_HPMCOUNTER27) -DECLARE_CSR(hpmcounter28, CSR_HPMCOUNTER28) -DECLARE_CSR(hpmcounter29, CSR_HPMCOUNTER29) -DECLARE_CSR(hpmcounter30, CSR_HPMCOUNTER30) -DECLARE_CSR(hpmcounter31, CSR_HPMCOUNTER31) -DECLARE_CSR(sstatus, CSR_SSTATUS) -DECLARE_CSR(sie, CSR_SIE) -DECLARE_CSR(stvec, CSR_STVEC) -DECLARE_CSR(scounteren, CSR_SCOUNTEREN) -DECLARE_CSR(sscratch, CSR_SSCRATCH) -DECLARE_CSR(sepc, CSR_SEPC) -DECLARE_CSR(scause, CSR_SCAUSE) -DECLARE_CSR(sbadaddr, CSR_SBADADDR) -DECLARE_CSR(sip, CSR_SIP) -DECLARE_CSR(sptbr, CSR_SPTBR) -DECLARE_CSR(mstatus, CSR_MSTATUS) -DECLARE_CSR(misa, CSR_MISA) -DECLARE_CSR(medeleg, CSR_MEDELEG) -DECLARE_CSR(mideleg, CSR_MIDELEG) -DECLARE_CSR(mie, CSR_MIE) -DECLARE_CSR(mtvec, CSR_MTVEC) -DECLARE_CSR(mcounteren, CSR_MCOUNTEREN) -DECLARE_CSR(mscratch, CSR_MSCRATCH) -DECLARE_CSR(mepc, CSR_MEPC) -DECLARE_CSR(mcause, CSR_MCAUSE) -DECLARE_CSR(mbadaddr, CSR_MBADADDR) -DECLARE_CSR(mip, CSR_MIP) -DECLARE_CSR(pmpcfg0, CSR_PMPCFG0) -DECLARE_CSR(pmpcfg1, CSR_PMPCFG1) -DECLARE_CSR(pmpcfg2, CSR_PMPCFG2) -DECLARE_CSR(pmpcfg3, CSR_PMPCFG3) -DECLARE_CSR(pmpaddr0, CSR_PMPADDR0) -DECLARE_CSR(pmpaddr1, CSR_PMPADDR1) -DECLARE_CSR(pmpaddr2, CSR_PMPADDR2) -DECLARE_CSR(pmpaddr3, CSR_PMPADDR3) -DECLARE_CSR(pmpaddr4, CSR_PMPADDR4) -DECLARE_CSR(pmpaddr5, CSR_PMPADDR5) -DECLARE_CSR(pmpaddr6, CSR_PMPADDR6) -DECLARE_CSR(pmpaddr7, CSR_PMPADDR7) -DECLARE_CSR(pmpaddr8, CSR_PMPADDR8) -DECLARE_CSR(pmpaddr9, CSR_PMPADDR9) -DECLARE_CSR(pmpaddr10, CSR_PMPADDR10) -DECLARE_CSR(pmpaddr11, CSR_PMPADDR11) -DECLARE_CSR(pmpaddr12, CSR_PMPADDR12) -DECLARE_CSR(pmpaddr13, CSR_PMPADDR13) -DECLARE_CSR(pmpaddr14, CSR_PMPADDR14) -DECLARE_CSR(pmpaddr15, CSR_PMPADDR15) -DECLARE_CSR(tselect, CSR_TSELECT) -DECLARE_CSR(tdata1, CSR_TDATA1) -DECLARE_CSR(tdata2, CSR_TDATA2) -DECLARE_CSR(tdata3, CSR_TDATA3) -DECLARE_CSR(dcsr, CSR_DCSR) -DECLARE_CSR(dpc, CSR_DPC) -DECLARE_CSR(dscratch, CSR_DSCRATCH) -DECLARE_CSR(mcycle, CSR_MCYCLE) -DECLARE_CSR(minstret, CSR_MINSTRET) -DECLARE_CSR(mhpmcounter3, CSR_MHPMCOUNTER3) -DECLARE_CSR(mhpmcounter4, CSR_MHPMCOUNTER4) -DECLARE_CSR(mhpmcounter5, CSR_MHPMCOUNTER5) -DECLARE_CSR(mhpmcounter6, CSR_MHPMCOUNTER6) -DECLARE_CSR(mhpmcounter7, CSR_MHPMCOUNTER7) -DECLARE_CSR(mhpmcounter8, CSR_MHPMCOUNTER8) -DECLARE_CSR(mhpmcounter9, CSR_MHPMCOUNTER9) -DECLARE_CSR(mhpmcounter10, CSR_MHPMCOUNTER10) -DECLARE_CSR(mhpmcounter11, CSR_MHPMCOUNTER11) -DECLARE_CSR(mhpmcounter12, CSR_MHPMCOUNTER12) -DECLARE_CSR(mhpmcounter13, CSR_MHPMCOUNTER13) -DECLARE_CSR(mhpmcounter14, CSR_MHPMCOUNTER14) -DECLARE_CSR(mhpmcounter15, CSR_MHPMCOUNTER15) -DECLARE_CSR(mhpmcounter16, CSR_MHPMCOUNTER16) -DECLARE_CSR(mhpmcounter17, CSR_MHPMCOUNTER17) -DECLARE_CSR(mhpmcounter18, CSR_MHPMCOUNTER18) -DECLARE_CSR(mhpmcounter19, CSR_MHPMCOUNTER19) -DECLARE_CSR(mhpmcounter20, CSR_MHPMCOUNTER20) -DECLARE_CSR(mhpmcounter21, CSR_MHPMCOUNTER21) -DECLARE_CSR(mhpmcounter22, CSR_MHPMCOUNTER22) -DECLARE_CSR(mhpmcounter23, CSR_MHPMCOUNTER23) -DECLARE_CSR(mhpmcounter24, CSR_MHPMCOUNTER24) -DECLARE_CSR(mhpmcounter25, CSR_MHPMCOUNTER25) -DECLARE_CSR(mhpmcounter26, CSR_MHPMCOUNTER26) -DECLARE_CSR(mhpmcounter27, CSR_MHPMCOUNTER27) -DECLARE_CSR(mhpmcounter28, CSR_MHPMCOUNTER28) -DECLARE_CSR(mhpmcounter29, CSR_MHPMCOUNTER29) -DECLARE_CSR(mhpmcounter30, CSR_MHPMCOUNTER30) -DECLARE_CSR(mhpmcounter31, CSR_MHPMCOUNTER31) -DECLARE_CSR(mhpmevent3, CSR_MHPMEVENT3) -DECLARE_CSR(mhpmevent4, CSR_MHPMEVENT4) -DECLARE_CSR(mhpmevent5, CSR_MHPMEVENT5) -DECLARE_CSR(mhpmevent6, CSR_MHPMEVENT6) -DECLARE_CSR(mhpmevent7, CSR_MHPMEVENT7) -DECLARE_CSR(mhpmevent8, CSR_MHPMEVENT8) -DECLARE_CSR(mhpmevent9, CSR_MHPMEVENT9) -DECLARE_CSR(mhpmevent10, CSR_MHPMEVENT10) -DECLARE_CSR(mhpmevent11, CSR_MHPMEVENT11) -DECLARE_CSR(mhpmevent12, CSR_MHPMEVENT12) -DECLARE_CSR(mhpmevent13, CSR_MHPMEVENT13) -DECLARE_CSR(mhpmevent14, CSR_MHPMEVENT14) -DECLARE_CSR(mhpmevent15, CSR_MHPMEVENT15) -DECLARE_CSR(mhpmevent16, CSR_MHPMEVENT16) -DECLARE_CSR(mhpmevent17, CSR_MHPMEVENT17) -DECLARE_CSR(mhpmevent18, CSR_MHPMEVENT18) -DECLARE_CSR(mhpmevent19, CSR_MHPMEVENT19) -DECLARE_CSR(mhpmevent20, CSR_MHPMEVENT20) -DECLARE_CSR(mhpmevent21, CSR_MHPMEVENT21) -DECLARE_CSR(mhpmevent22, CSR_MHPMEVENT22) -DECLARE_CSR(mhpmevent23, CSR_MHPMEVENT23) -DECLARE_CSR(mhpmevent24, CSR_MHPMEVENT24) -DECLARE_CSR(mhpmevent25, CSR_MHPMEVENT25) -DECLARE_CSR(mhpmevent26, CSR_MHPMEVENT26) -DECLARE_CSR(mhpmevent27, CSR_MHPMEVENT27) -DECLARE_CSR(mhpmevent28, CSR_MHPMEVENT28) -DECLARE_CSR(mhpmevent29, CSR_MHPMEVENT29) -DECLARE_CSR(mhpmevent30, CSR_MHPMEVENT30) -DECLARE_CSR(mhpmevent31, CSR_MHPMEVENT31) -DECLARE_CSR(mvendorid, CSR_MVENDORID) -DECLARE_CSR(marchid, CSR_MARCHID) -DECLARE_CSR(mimpid, CSR_MIMPID) -DECLARE_CSR(mhartid, CSR_MHARTID) -DECLARE_CSR(cycleh, CSR_CYCLEH) -DECLARE_CSR(timeh, CSR_TIMEH) -DECLARE_CSR(instreth, CSR_INSTRETH) -DECLARE_CSR(hpmcounter3h, CSR_HPMCOUNTER3H) -DECLARE_CSR(hpmcounter4h, CSR_HPMCOUNTER4H) -DECLARE_CSR(hpmcounter5h, CSR_HPMCOUNTER5H) -DECLARE_CSR(hpmcounter6h, CSR_HPMCOUNTER6H) -DECLARE_CSR(hpmcounter7h, CSR_HPMCOUNTER7H) -DECLARE_CSR(hpmcounter8h, CSR_HPMCOUNTER8H) -DECLARE_CSR(hpmcounter9h, CSR_HPMCOUNTER9H) -DECLARE_CSR(hpmcounter10h, CSR_HPMCOUNTER10H) -DECLARE_CSR(hpmcounter11h, CSR_HPMCOUNTER11H) -DECLARE_CSR(hpmcounter12h, CSR_HPMCOUNTER12H) -DECLARE_CSR(hpmcounter13h, CSR_HPMCOUNTER13H) -DECLARE_CSR(hpmcounter14h, CSR_HPMCOUNTER14H) -DECLARE_CSR(hpmcounter15h, CSR_HPMCOUNTER15H) -DECLARE_CSR(hpmcounter16h, CSR_HPMCOUNTER16H) -DECLARE_CSR(hpmcounter17h, CSR_HPMCOUNTER17H) -DECLARE_CSR(hpmcounter18h, CSR_HPMCOUNTER18H) -DECLARE_CSR(hpmcounter19h, CSR_HPMCOUNTER19H) -DECLARE_CSR(hpmcounter20h, CSR_HPMCOUNTER20H) -DECLARE_CSR(hpmcounter21h, CSR_HPMCOUNTER21H) -DECLARE_CSR(hpmcounter22h, CSR_HPMCOUNTER22H) -DECLARE_CSR(hpmcounter23h, CSR_HPMCOUNTER23H) -DECLARE_CSR(hpmcounter24h, CSR_HPMCOUNTER24H) -DECLARE_CSR(hpmcounter25h, CSR_HPMCOUNTER25H) -DECLARE_CSR(hpmcounter26h, CSR_HPMCOUNTER26H) -DECLARE_CSR(hpmcounter27h, CSR_HPMCOUNTER27H) -DECLARE_CSR(hpmcounter28h, CSR_HPMCOUNTER28H) -DECLARE_CSR(hpmcounter29h, CSR_HPMCOUNTER29H) -DECLARE_CSR(hpmcounter30h, CSR_HPMCOUNTER30H) -DECLARE_CSR(hpmcounter31h, CSR_HPMCOUNTER31H) -DECLARE_CSR(mcycleh, CSR_MCYCLEH) -DECLARE_CSR(minstreth, CSR_MINSTRETH) -DECLARE_CSR(mhpmcounter3h, CSR_MHPMCOUNTER3H) -DECLARE_CSR(mhpmcounter4h, CSR_MHPMCOUNTER4H) -DECLARE_CSR(mhpmcounter5h, CSR_MHPMCOUNTER5H) -DECLARE_CSR(mhpmcounter6h, CSR_MHPMCOUNTER6H) -DECLARE_CSR(mhpmcounter7h, CSR_MHPMCOUNTER7H) -DECLARE_CSR(mhpmcounter8h, CSR_MHPMCOUNTER8H) -DECLARE_CSR(mhpmcounter9h, CSR_MHPMCOUNTER9H) -DECLARE_CSR(mhpmcounter10h, CSR_MHPMCOUNTER10H) -DECLARE_CSR(mhpmcounter11h, CSR_MHPMCOUNTER11H) -DECLARE_CSR(mhpmcounter12h, CSR_MHPMCOUNTER12H) -DECLARE_CSR(mhpmcounter13h, CSR_MHPMCOUNTER13H) -DECLARE_CSR(mhpmcounter14h, CSR_MHPMCOUNTER14H) -DECLARE_CSR(mhpmcounter15h, CSR_MHPMCOUNTER15H) -DECLARE_CSR(mhpmcounter16h, CSR_MHPMCOUNTER16H) -DECLARE_CSR(mhpmcounter17h, CSR_MHPMCOUNTER17H) -DECLARE_CSR(mhpmcounter18h, CSR_MHPMCOUNTER18H) -DECLARE_CSR(mhpmcounter19h, CSR_MHPMCOUNTER19H) -DECLARE_CSR(mhpmcounter20h, CSR_MHPMCOUNTER20H) -DECLARE_CSR(mhpmcounter21h, CSR_MHPMCOUNTER21H) -DECLARE_CSR(mhpmcounter22h, CSR_MHPMCOUNTER22H) -DECLARE_CSR(mhpmcounter23h, CSR_MHPMCOUNTER23H) -DECLARE_CSR(mhpmcounter24h, CSR_MHPMCOUNTER24H) -DECLARE_CSR(mhpmcounter25h, CSR_MHPMCOUNTER25H) -DECLARE_CSR(mhpmcounter26h, CSR_MHPMCOUNTER26H) -DECLARE_CSR(mhpmcounter27h, CSR_MHPMCOUNTER27H) -DECLARE_CSR(mhpmcounter28h, CSR_MHPMCOUNTER28H) -DECLARE_CSR(mhpmcounter29h, CSR_MHPMCOUNTER29H) -DECLARE_CSR(mhpmcounter30h, CSR_MHPMCOUNTER30H) -DECLARE_CSR(mhpmcounter31h, CSR_MHPMCOUNTER31H) -#endif -#ifdef DECLARE_CAUSE -DECLARE_CAUSE("misaligned fetch", CAUSE_MISALIGNED_FETCH) -DECLARE_CAUSE("fetch access", CAUSE_FETCH_ACCESS) -DECLARE_CAUSE("illegal instruction", CAUSE_ILLEGAL_INSTRUCTION) -DECLARE_CAUSE("breakpoint", CAUSE_BREAKPOINT) -DECLARE_CAUSE("misaligned load", CAUSE_MISALIGNED_LOAD) -DECLARE_CAUSE("load access", CAUSE_LOAD_ACCESS) -DECLARE_CAUSE("misaligned store", CAUSE_MISALIGNED_STORE) -DECLARE_CAUSE("store access", CAUSE_STORE_ACCESS) -DECLARE_CAUSE("user_ecall", CAUSE_USER_ECALL) -DECLARE_CAUSE("supervisor_ecall", CAUSE_SUPERVISOR_ECALL) -DECLARE_CAUSE("hypervisor_ecall", CAUSE_HYPERVISOR_ECALL) -DECLARE_CAUSE("machine_ecall", CAUSE_MACHINE_ECALL) -DECLARE_CAUSE("fetch page fault", CAUSE_FETCH_PAGE_FAULT) -DECLARE_CAUSE("load page fault", CAUSE_LOAD_PAGE_FAULT) -DECLARE_CAUSE("store page fault", CAUSE_STORE_PAGE_FAULT) -#endif diff --git a/sm/plat/mpfs/hss_clock.c b/sm/plat/mpfs/hss_clock.c deleted file mode 100644 index 39af0e64f..000000000 --- a/sm/plat/mpfs/hss_clock.c +++ /dev/null @@ -1,57 +0,0 @@ -/******************************************************************************* - * Copyright 2019 Microchip Corporation - * - * SPDX-License-Identifier: MIT - * - * MPFS HSS Embedded Software - * - */ - -/** - * \file Access Local Tick Information - * \brief Get acccess to tick counts from processor - */ - -#include -#include - -#include "config.h" -#include "hss_clock.h" -#include "csr_helper.h" - -/** - * \brief Get acccess to tick counts from processor - */ - -HSSTicks_t HSS_GetTime(void) -{ - HSSTicks_t tickCount; - - tickCount = CSR_GetTime(); - return tickCount; -} - -HSSTicks_t HSS_GetTickCount(void) -{ - HSSTicks_t volatile tickCount; - - tickCount = CSR_GetTickCount(); - return tickCount; -} - -bool HSS_Timer_IsElapsed(HSSTicks_t startTick, HSSTicks_t durationInTicks) -{ - return (HSS_GetTime() > (startTick + durationInTicks)); -} - -void HSS_SpinDelay_MilliSecs(uint32_t milliseconds) -{ - HSSTicks_t delayTick = HSS_GetTime(); - while (!HSS_Timer_IsElapsed(delayTick, ONE_MILLISEC * milliseconds)) { ; } -} - -void HSS_SpinDelay_Secs(uint32_t seconds) -{ - HSSTicks_t delayTick = HSS_GetTime(); - while (!HSS_Timer_IsElapsed(delayTick, ONE_SEC * seconds)) { ; } -} diff --git a/sm/plat/mpfs/hss_clock.h b/sm/plat/mpfs/hss_clock.h deleted file mode 100644 index 5ca21b8f6..000000000 --- a/sm/plat/mpfs/hss_clock.h +++ /dev/null @@ -1,68 +0,0 @@ -#ifndef HSS_CLOCK_H -#define HSS_CLOCK_H - -/******************************************************************************* - * Copyright 2019-2020 Microchip Corporation. - * - * SPDX-License-Identifier: MIT - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to - * deal in the Software without restriction, including without limitation the - * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Hart Software Services - Clock and Timer Abstraction - */ - -/** - * \file Local Clock Abstraction - * \brief Local Clock Abstraction methods - get tick count - */ - -#ifdef __cplusplus -extern "C" { -#endif - -//# define TICKS_PER_SEC 50000llu // This is about 1 sec on RENODE -//# define TICKS_PER_MILLISEC 5llu // This is about 1 millisec on RENODE - -#if IS_ENABLED(CONFIG_PLATFORM_MPFS) -# include "clocks/hw_mss_clks.h" -# define TICKS_PER_SEC ((unsigned long long)LIBERO_SETTING_MSS_RTC_TOGGLE_CLK) -# define TICKS_PER_MILLISEC (TICKS_PER_SEC/1000llu) -# define ONE_SEC (1llu * TICKS_PER_SEC) -# define ONE_MILLISEC (1llu * TICKS_PER_MILLISEC) -#endif - -#if IS_ENABLED(CONFIG_PLATFORM_FU540) -# define TICKS_PER_MILLISEC 1000llu -# define TICKS_PER_SEC (1000llu * TICKS_PER_MILLISEC) -# define ONE_SEC (1llu * TICKS_PER_SEC) -# define ONE_MILLISEC (1llu * TICKS_PER_MILLISEC) -#endif - -typedef uint64_t HSSTicks_t; -HSSTicks_t HSS_GetTime(void); -HSSTicks_t HSS_GetTickCount(void); -bool HSS_Timer_IsElapsed(HSSTicks_t startTick, HSSTicks_t durationInTicks); -void HSS_SpinDelay_MilliSecs(uint32_t milliseconds); -void HSS_SpinDelay_Secs(uint32_t seconds); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/sm/plat/mpfs/mpfs_reg_map.h b/sm/plat/mpfs/mpfs_reg_map.h deleted file mode 100644 index 386d1b7d8..000000000 --- a/sm/plat/mpfs/mpfs_reg_map.h +++ /dev/null @@ -1,228 +0,0 @@ -#ifndef HSS_MPFS_REG_MAP_H -#define HSS_MPFS_REG_MAP_H - -/******************************************************************************* - * Copyright 2019-2020 Microchip Corporation. - * - * SPDX-License-Identifier: MIT - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to - * deal in the Software without restriction, including without limitation the - * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * - * Hart Software Services - Register Definitions - * - */ - - -#ifdef __cplusplus -extern "C" { -#endif - -#define E51_DTIM_BASE_ADDR (0x01000000u) - -#define E51_ITIM_BASE_ADDR (0x01800000u) - -#define U54_1_ITIM_BASE_ADDR (0x01808000u) - -#define U54_2_ITIM_BASE_ADDR (0x01810000u) - -#define U54_3_ITIM_BASE_ADDR (0x01818000u) - -#define U54_4_ITIM_BASE_ADDR (0x01820000u) - -#define CLINT_BASE_ADDR (0x02000000u) -#define CLINT_MSIP_E51_0_OFFSET (0x0000u) -#define CLINT_MSIP_U54_1_OFFSET (0x0004u) -#define CLINT_MSIP_U54_2_OFFSET (0x0008u) -#define CLINT_MSIP_U54_3_OFFSET (0x000Cu) -#define CLINT_MSIP_U54_4_OFFSET (0x0010u) -#define CLINT_MTIME_OFFSET (0xBFF8u) - -#define L2_CACHE_CTRL_BASE_ADDR (0x02010000u) -#define L2_CACHE_CTRL_CONFIG_OFFSET (0x000u) -#define L2_CACHE_CTRL_WAYENABLE_OFFSET (0x008u) -#define L2_CACHE_CTRL_WAYMASK0_OFFSET (0x800u) -#define L2_CACHE_CTRL_WAYMASK1_OFFSET (0x008u) -#define L2_CACHE_CTRL_WAYMASK2_OFFSET (0x810u) -#define L2_CACHE_CTRL_WAYMASK3_OFFSET (0x818u) -#define L2_CACHE_CTRL_WAYMASK4_OFFSET (0x820u) - -#define WCB_BASE_ADDR (0x02020000u) - -#define DMA_CTRL_BASE_ADDR (0x03000000u) - -#define L2_LIM_BASE_ADDR (0x08000000u) - -#define L2_ZERODEV_BASE_ADDR (0x0A000000u) - -#ifndef PLIC_BASE_ADDR -# define PLIC_BASE_ADDR (0x0C000000u) -#endif - -#define SYSREGSCB_BASE_ADDR (0x20003000u) -#define SYSREGSCB_MSS_STATUS_OFFSET (0x0104u) - -#define MPU_BASE_ADDR (0x2000E000u) -#define MPU_FIC0_OFFSET (0x0000u) -#define MPU_FIC1_OFFSET (0x0100u) -#define MPU_FIC2_OFFSET (0x0200u) -#define MPU_CRYPTO_OFFSET (0x0300u) -#define MPU_ETHERNET0_OFFSET (0x0400u) -#define MPU_ETHERNET1_OFFSET (0x0500u) -#define MPU_USB_OFFSET (0x0600u) -#define MPU_MMC_OFFSET (0x0700u) -#define MPU_SCB_OFFSET (0x0800u) -#define MPU_SEG0_OFFSET (0x0D00u) -#define MPU_SEG1_OFFSET (0x0E00u) - -#define WDOG0_LO_BASE_ADDR (0x20001000u) -#define WDOG1_LO_BASE_ADDR (0x20101000u) -#define WDOG2_LO_BASE_ADDR (0x20103000u) -#define WDOG3_LO_BASE_ADDR (0x20105000u) -#define WDOG4_LO_BASE_ADDR (0x20107000u) - -#define WDOG_REFRESH_OFFSET (0x0000u) -#define WDOG_CONTROL_OFFSET (0x0004u) -#define WDOG_STATUS_OFFSET (0x0008u) -#define WDOG_TIME_OFFSET (0x000Cu) -#define WDOG_MSVP_OFFSET (0x0010u) -#define WDOG_TRIGGER_OFFSET (0x0014u) -#define WDOG_FORCE_OFFSET (0x0018u) - -#define WDOG_STATUS_DEVRST_MASK (1u << 5) -#define WDOG_STATUS_LOCKED_MASK (1u << 4) -#define WDOG_STATUS_TRIGGERED_MASK (1u << 3) -#define WDOG_STATUS_FORBIDDEN_MASK (1u << 2) -#define WDOG_STATUS_WDOG_TRIPPED_MASK (1u << 1) -#define WDOG_STATUS_MVSP_TRIPPED_MASK (1u << 0) - -#define WDOG0_LO_REFRESH_OFFSET WDOG_REFRESH_OFFSET -#define WDOG0_LO_CONTROL_OFFSET WDOG_CONTROL_OFFSET -#define WDOG0_LO_STATUS_OFFSET WDOG_STATUS_OFFSET -#define WDOG0_LO_TIME_OFFSET WDOG_TIME_OFFSET -#define WDOG0_LO_MSVP_OFFSET WDOG_MSVP_OFFSET -#define WDOG0_LO_TRIGGER_OFFSET WDOG_TRIGGER_OFFSET -#define WDOG0_LO_FORCE_OFFSET WDOG_FORCE_OFFSET - -#define WDOG1_LO_REFRESH_OFFSET WDOG_REFRESH_OFFSET -#define WDOG1_LO_CONTROL_OFFSET WDOG_CONTROL_OFFSET -#define WDOG1_LO_STATUS_OFFSET WDOG_STATUS_OFFSET -#define WDOG1_LO_TIME_OFFSET WDOG_TIME_OFFSET -#define WDOG1_LO_MSVP_OFFSET WDOG_MSVP_OFFSET -#define WDOG1_LO_TRIGGER_OFFSET WDOG_TRIGGER_OFFSET -#define WDOG1_LO_FORCE_OFFSET WDOG_FORCE_OFFSET - -#define WDOG2_LO_REFRESH_OFFSET WDOG_REFRESH_OFFSET -#define WDOG2_LO_CONTROL_OFFSET WDOG_CONTROL_OFFSET -#define WDOG2_LO_STATUS_OFFSET WDOG_STATUS_OFFSET -#define WDOG2_LO_TIME_OFFSET WDOG_TIME_OFFSET -#define WDOG2_LO_MSVP_OFFSET WDOG_MSVP_OFFSET -#define WDOG2_LO_TRIGGER_OFFSET WDOG_TRIGGER_OFFSET -#define WDOG2_LO_FORCE_OFFSET WDOG_FORCE_OFFSET - -#define WDOG3_LO_REFRESH_OFFSET WDOG_REFRESH_OFFSET -#define WDOG3_LO_CONTROL_OFFSET WDOG_CONTROL_OFFSET -#define WDOG3_LO_STATUS_OFFSET WDOG_STATUS_OFFSET -#define WDOG3_LO_TIME_OFFSET WDOG_TIME_OFFSET -#define WDOG3_LO_MSVP_OFFSET WDOG_MSVP_OFFSET -#define WDOG3_LO_TRIGGER_OFFSET WDOG_TRIGGER_OFFSET -#define WDOG3_LO_FORCE_OFFSET WDOG_FORCE_OFFSET - -#define WDOG4_LO_REFRESH_OFFSET WDOG_REFRESH_OFFSET -#define WDOG4_LO_CONTROL_OFFSET WDOG_CONTROL_OFFSET -#define WDOG4_LO_STATUS_OFFSET WDOG_STATUS_OFFSET -#define WDOG4_LO_TIME_OFFSET WDOG_TIME_OFFSET -#define WDOG4_LO_MSVP_OFFSET WDOG_MSVP_OFFSET -#define WDOG4_LO_TRIGGER_OFFSET WDOG_TRIGGER_OFFSET -#define WDOG4_LO_FORCE_OFFSET WDOG_FORCE_OFFSET - -#define WDOG0_HI_BASE_ADDR (0x28001000u) -#define WDOG1_HI_BASE_ADDR (0x28101000u) -#define WDOG2_HI_BASE_ADDR (0x28103000u) -#define WDOG3_HI_BASE_ADDR (0x28105000u) -#define WDOG4_HI_BASE_ADDR (0x28107000u) - -#define WDOG0_HI_REFRESH_OFFSET WDOG_REFRESH_OFFSET -#define WDOG0_HI_CONTROL_OFFSET WDOG_CONTROL_OFFSET -#define WDOG0_HI_STATUS_OFFSET WDOG_STATUS_OFFSET -#define WDOG0_HI_TIME_OFFSET WDOG_TIME_OFFSET -#define WDOG0_HI_MSVP_OFFSET WDOG_MSVP_OFFSET -#define WDOG0_HI_TRIGGER_OFFSET WDOG_TRIGGER_OFFSET -#define WDOG0_HI_FORCE_OFFSET WDOG_FORCE_OFFSET - -#define WDOG1_HI_REFRESH_OFFSET WDOG_REFRESH_OFFSET -#define WDOG1_HI_CONTROL_OFFSET WDOG_CONTROL_OFFSET -#define WDOG1_HI_STATUS_OFFSET WDOG_STATUS_OFFSET -#define WDOG1_HI_TIME_OFFSET WDOG_TIME_OFFSET -#define WDOG1_HI_MSVP_OFFSET WDOG_MSVP_OFFSET -#define WDOG1_HI_TRIGGER_OFFSET WDOG_TRIGGER_OFFSET -#define WDOG1_HI_FORCE_OFFSET WDOG_FORCE_OFFSET - -#define WDOG2_HI_REFRESH_OFFSET WDOG_REFRESH_OFFSET -#define WDOG2_LO_CONTROL_OFFSET WDOG_CONTROL_OFFSET -#define WDOG2_HI_STATUS_OFFSET WDOG_STATUS_OFFSET -#define WDOG2_HI_TIME_OFFSET WDOG_TIME_OFFSET -#define WDOG2_LO_MSVP_OFFSET WDOG_MSVP_OFFSET -#define WDOG2_HI_TRIGGER_OFFSET WDOG_TRIGGER_OFFSET -#define WDOG2_LO_FORCE_OFFSET WDOG_FORCE_OFFSET - -#define WDOG3_LO_REFRESH_OFFSET WDOG_REFRESH_OFFSET -#define WDOG3_HI_CONTROL_OFFSET WDOG_CONTROL_OFFSET -#define WDOG3_HI_STATUS_OFFSET WDOG_STATUS_OFFSET -#define WDOG3_LO_TIME_OFFSET WDOG_TIME_OFFSET -#define WDOG3_HI_MSVP_OFFSET WDOG_MSVP_OFFSET -#define WDOG3_HI_TRIGGER_OFFSET WDOG_TRIGGER_OFFSET -#define WDOG3_HI_FORCE_OFFSET WDOG_FORCE_OFFSET - -#define WDOG4_HI_REFRESH_OFFSET WDOG_REFRESH_OFFSET -#define WDOG4_HI_CONTROL_OFFSET WDOG_CONTROL_OFFSET -#define WDOG4_HI_STATUS_OFFSET WDOG_STATUS_OFFSET -#define WDOG4_HI_TIME_OFFSET WDOG_TIME_OFFSET -#define WDOG4_HI_MSVP_OFFSET WDOG_MSVP_OFFSET -#define WDOG4_HI_TRIGGER_OFFSET WDOG_TRIGGER_OFFSET -#define WDOG4_LO_FORCE_OFFSET WDOG_FORCE_OFFSET - -#define mHSS_WriteRegEx(type, block, reg, value) { *(type*)(block##_BASE_ADDR + block##_##reg##_OFFSET) = value; } -#define mHSS_WriteRegU8(block, reg, value) mHSS_WriteRegEx(uint8_t, block, reg, value) -#define mHSS_WriteRegU16(block, reg, value) mHSS_WriteRegEx(uint16_t, block, reg, value) -#define mHSS_WriteRegU32(block, reg, value) mHSS_WriteRegEx(uint32_t, block, reg, value) - -#define mHSS_WriteRegEx(type, block, reg, value) { *(type*)(block##_BASE_ADDR + block##_##reg##_OFFSET) = value; } -#define mHSS_WriteRegU8(block, reg, value) mHSS_WriteRegEx(uint8_t, block, reg, value) -#define mHSS_WriteRegU16(block, reg, value) mHSS_WriteRegEx(uint16_t, block, reg, value) -#define mHSS_WriteRegU32(block, reg, value) mHSS_WriteRegEx(uint32_t, block, reg, value) -#define mHSS_WriteRegU64(block, reg, value) mHSS_WriteRegEx(uint64_t, block, reg, value) - -#define mHSS_ReadRegEx(type, block, reg) (*(volatile type*)(block##_BASE_ADDR + block##_##reg##_OFFSET)) -#define mHSS_ReadRegU8(block, reg) mHSS_ReadRegEx(uint8_t, block, reg) -#define mHSS_ReadRegU16(block, reg) mHSS_ReadRegEx(uint16_t, block, reg) -#define mHSS_ReadRegU32(block, reg) mHSS_ReadRegEx(uint32_t, block, reg) -#define mHSS_ReadRegU64(block, reg) mHSS_ReadRegEx(uint64_t, block, reg) - -#define mHSS_ReadModWriteRegEx(type, block, reg, mask, value) mHSS_WriteRegEx(type, block, reg, (mHSS_ReadRegEx(type, block, reg) & mask) | (value & mask)) -#define mHSS_ReadModWriteRegU8(block, reg, mask, value) mHSS_WriteRegEx(uint8_t, block, reg, (mHSS_ReadRegEx(uint8_t, block, reg) & mask) | (value & mask)) -#define mHSS_ReadModWriteRegU16(block, reg, mask, value) mHSS_WriteRegEx(uint16_t, block, reg, (mHSS_ReadRegEx(uint16_t, block, reg) & mask) | (value & mask)) -#define mHSS_ReadModWriteRegU32(block, reg, mask, value) mHSS_WriteRegEx(uint32_t, block, reg, (mHSS_ReadRegEx(uint32_t, block, reg) & mask) | (value & mask)) -#define mHSS_ReadModWriteRegU64(block, reg, mask, value) mHSS_WriteRegEx(uint64_t, block, reg, (mHSS_ReadRegEx(uint64_t, block, reg) & mask) | (value & mask)) - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/sm/plat/mpfs/objects.mk b/sm/plat/mpfs/objects.mk index 348ab4e4c..7c5fcca36 100644 --- a/sm/plat/mpfs/objects.mk +++ b/sm/plat/mpfs/objects.mk @@ -6,41 +6,21 @@ # Authors: # Atish Patra # -PLATFORM = mpfs -KEYSTONE_SM_REL=../../ -platform-genflags-y += "-DTARGET_PLATFORM_HEADER=\"platform/$(PLATFORM)/platform.h\"" -platform-objs-y += $(KEYSTONE_SM_REL)src/attest.o -platform-objs-y += $(KEYSTONE_SM_REL)src/cpu.o -platform-objs-y += $(KEYSTONE_SM_REL)src/crypto.o -platform-objs-y += $(KEYSTONE_SM_REL)src/enclave.o -platform-objs-y += $(KEYSTONE_SM_REL)src/pmp.o -platform-objs-y += $(KEYSTONE_SM_REL)src/sm.o -platform-objs-y += $(KEYSTONE_SM_REL)src/sm-sbi.o -platform-objs-y += $(KEYSTONE_SM_REL)src/sm-sbi-opensbi.o -platform-objs-y += $(KEYSTONE_SM_REL)src/thread.o -platform-objs-y += $(KEYSTONE_SM_REL)src/mprv.o -platform-objs-y += $(KEYSTONE_SM_REL)src/sbi_trap_hack.o -platform-objs-y += $(KEYSTONE_SM_REL)src/trap.o -platform-objs-y += $(KEYSTONE_SM_REL)src/ipi.o +ifeq ($(KEYSTONE_SDK_DIR),) +$(error KEYSTONE_SDK_DIR not defined) +endif -platform-objs-y += $(KEYSTONE_SM_REL)src/sha3/sha3.o -platform-objs-y += $(KEYSTONE_SM_REL)src/ed25519/fe.o -platform-objs-y += $(KEYSTONE_SM_REL)src/ed25519/ge.o -platform-objs-y += $(KEYSTONE_SM_REL)src/ed25519/keypair.o -platform-objs-y += $(KEYSTONE_SM_REL)src/ed25519/sc.o -platform-objs-y += $(KEYSTONE_SM_REL)src/ed25519/sign.o +# Define our platform +export PLATFORM=mpfs -platform-objs-y += $(KEYSTONE_SM_REL)src/hkdf_sha3_512/hkdf_sha3_512.o -platform-objs-y += $(KEYSTONE_SM_REL)src/hmac_sha3/hmac_sha3.o +# Ensure that standard SM crypto does not get built here +export KEYSTONE_SM_NO_CRYPTO=y +include $(KEYSTONE_SM)/src/objects.mk -platform-objs-y += $(KEYSTONE_SM_REL)src/platform/$(PLATFORM)/platform.o +platform-genflags-y += -I$(KEYSTONE_SM)/plat/$(PLATFORM) -I$(KEYSTONE_SM)/src \ + -I$(KEYSTONE_SDK_DIR)/include/shared +platform-genflags-y += -DTARGET_PLATFORM_HEADER=\"platform/$(PLATFORM)/platform.h\" -platform-objs-y += $(KEYSTONE_SM_REL)src/plugins/plugins.o - -platform-objs-y += platform.o -platform-objs-y += uart_helper.o -platform-objs-y += csr_helper.o -platform-objs-y += hss_clock.o -platform-objs-y += drivers/mss_uart/mss_uart.o -platform-objs-y += drivers/mss_sys_services/mss_sys_services.o +platform-objs-y += $(addprefix $(KEYSTONE_SM)/src/,$(subst .c,.o,$(keystone-sm-sources))) +platform-objs-y += $(KEYSTONE_SM)/plat/$(PLATFORM)/crypto_interpose.o diff --git a/sm/plat/mpfs/platform.c b/sm/plat/mpfs/platform.c deleted file mode 100644 index 94b23f85c..000000000 --- a/sm/plat/mpfs/platform.c +++ /dev/null @@ -1,254 +0,0 @@ - -/****************************************************************************************** - * - * MPFS HSS Embedded Software - * - * Copyright 2019 Microchip Corporation. - * - * SPDX-License-Identifier: MIT - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to - * deal in the Software without restriction, including without limitation the - * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Originally based on code from OpenSBI, which is: - * - * Copyright (c) 2019 Western Digital Corporation or its affiliates. - * - */ - -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "uart_helper.h" -#include "drivers/mss_uart/mss_uart.h" - -#include - -#define MPFS_HART_COUNT 5 -#define MPFS_HART_STACK_SIZE 8192 - -#define MPFS_CLINT_ADDR 0x2000000 - -#define MPFS_PLIC_ADDR 0xc000000 -#define MPFS_PLIC_NUM_SOURCES 0x35 -#define MPFS_PLIC_NUM_PRIORITIES 7 - -/** - * The MPFS SoC has 5 HARTs but HART ID 0 doesn't have S mode. enable only - * HARTs 1 to 4. - */ -static u32 hart_idx2id[MPFS_HART_COUNT - 1] = { - [0] = 1, - [1] = 2, - [2] = 3, - [3] = 4, -}; - -extern unsigned long STACK_SIZE_PER_HART; - -static int mpfs_early_init(bool cold_boot) -{ - struct sbi_scratch *sbi = sbi_scratch_thishart_ptr(); - - // The SM expects that we'll be able to protect a region of size - // 0x200000. If we don't grow the fw_size, OpenSBI will only mark - // a small region of memory as reserved, and so later stage boot - // will try to access illegal memory. - if (sbi->fw_size > 0x200000) - return -1; - sbi->fw_size = 0x200000; - return 0; -} - -static int mpfs_final_init(bool cold_boot) -{ - sm_init(cold_boot); - - if (!cold_boot) return 0; - - void *fdt = sbi_scratch_thishart_arg1_ptr(); - fdt_cpu_fixup(fdt); - fdt_fixups(fdt); - fdt_reserved_memory_nomap_fixup(fdt); - - return 0; -} - -static bool console_initialized = false; - -static void mpfs_console_putc(char ch) -{ - if (console_initialized) { - u32 hartid = current_hartid(); - uart_putc(hartid, ch); - } -} - -#define NO_BLOCK 0 -#define GETC_EOF -1 -static int mpfs_console_getc(void) -{ - int result = GETC_EOF; - - uint8_t rcvBuf; - if (uart_getchar(&rcvBuf, NO_BLOCK, FALSE)) { - result = rcvBuf; - } - - return result; -} - -static int mpfs_console_init(void) -{ - console_initialized = true; - MSS_UART_init(&g_mss_uart0_lo, MSS_UART_115200_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - // default all UARTs to 115200 for now - // subsequent OS loads can change these if needed... - MSS_UART_init(&g_mss_uart1_lo, MSS_UART_115200_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_init(&g_mss_uart2_lo, MSS_UART_115200_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_init(&g_mss_uart3_lo, MSS_UART_115200_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - - MSS_UART_init(&g_mss_uart4_lo, MSS_UART_115200_BAUD, - MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT); - return 0; -} - -static struct plic_data plic = { MPFS_PLIC_ADDR, MPFS_PLIC_NUM_SOURCES }; - -static int mpfs_irqchip_init(bool cold_boot) -{ - int rc; - u32 hartid = current_hartid(); - - if (cold_boot) { - rc = plic_cold_irqchip_init(&plic); - - if (rc) { - return rc; - } - } - - rc = plic_warm_irqchip_init(&plic, - (hartid) ? (2 * hartid - 1) : 0, (hartid) ? (2 * hartid) : -1); - - return rc; -} - -static struct clint_data clint = { - .addr = MPFS_CLINT_ADDR, - .first_hartid = 0, - .hart_count = MPFS_HART_COUNT, - .has_64bit_mmio = true, -}; - -static int mpfs_ipi_init(bool cold_boot) -{ - int rc; - - if (cold_boot) { - rc = clint_cold_ipi_init(&clint); - - if (rc) { - return rc; - } - - } - - return clint_warm_ipi_init(); -} - -static int mpfs_timer_init(bool cold_boot) -{ - int rc; - - if (cold_boot) { - rc = clint_cold_timer_init(&clint, NULL); - - if (rc) { - return rc; - } - } - - return clint_warm_timer_init(); -} - -static int mpfs_reset_check(u32 type, u32 reason) -{ - return 0; -} - -#define MPFS_TLB_RANGE_FLUSH_LIMIT 0u -static u64 mpfs_get_tlbr_flush_limit(void) -{ - return MPFS_TLB_RANGE_FLUSH_LIMIT; -} - -const struct sbi_platform_operations platform_ops = { - .early_init = mpfs_early_init, - .final_init = mpfs_final_init, - .early_exit = NULL, - .final_exit = NULL, - - .console_putc = mpfs_console_putc, - .console_getc = mpfs_console_getc, - .console_init = mpfs_console_init, - - .irqchip_init = mpfs_irqchip_init, - - .ipi_send = clint_ipi_send, - .ipi_clear = clint_ipi_clear, - .ipi_init = mpfs_ipi_init, - - .get_tlbr_flush_limit = mpfs_get_tlbr_flush_limit, - - .timer_value = clint_timer_value, - .timer_event_start = clint_timer_event_start, - .timer_event_stop = clint_timer_event_stop, - .timer_init = mpfs_timer_init, - - .system_reset_check = mpfs_reset_check, -}; - -const struct sbi_platform platform = { - .opensbi_version = OPENSBI_VERSION, - .platform_version = SBI_PLATFORM_VERSION(0x0, 0x01), - .name = "Microchip PolarFire SoC", - //.features = SBI_PLATFORM_DEFAULT_FEATURES & (~SBI_PLATFORM_HAS_PMP), // already have PMPs setup - .features = SBI_PLATFORM_DEFAULT_FEATURES, // already have PMPs setup - .hart_count = (MPFS_HART_COUNT-1), - .hart_stack_size = MPFS_HART_STACK_SIZE, //TODO: revisit - .hart_index2id = hart_idx2id, - .platform_ops_addr = (unsigned long)&platform_ops, - .firmware_context = 0 -}; \ No newline at end of file diff --git a/sm/plat/mpfs/uart_helper.c b/sm/plat/mpfs/uart_helper.c deleted file mode 100644 index a6a50df7c..000000000 --- a/sm/plat/mpfs/uart_helper.c +++ /dev/null @@ -1,203 +0,0 @@ -/******************************************************************************* - * Copyright 2019 Microchip Corporation. - * - * SPDX-License-Identifier: MIT - * - * Implementation of uart_putstring/g(). - * This is function is intended to be used from ee_printf(). - */ - -#include - -#include "drivers/mss_uart/mss_uart.h" -#include -#include -#include -#include -#include - -#include "config.h" -#include "hss_clock.h" -#include "uart_helper.h" - -static inline mss_uart_instance_t *get_uart_instance(int hartid) -{ - mss_uart_instance_t *pUart; - - switch (hartid) { - default: - pUart = &g_mss_uart0_lo; - break; - case HSS_HART_E51: - pUart = &g_mss_uart0_lo; - break; - case HSS_HART_U54_1: - pUart = &g_mss_uart1_lo; - break; - case HSS_HART_U54_2: - pUart = &g_mss_uart2_lo; - break; - case HSS_HART_U54_3: - pUart = &g_mss_uart3_lo; - break; - case HSS_HART_U54_4: - pUart = &g_mss_uart4_lo; - break; - } - - return pUart; -} - -int uart_putstring(int hartid, const char *p) -{ - const uint32_t len = (uint32_t)strlen(p); - - mss_uart_instance_t *pUart = get_uart_instance(hartid); - MSS_UART_polled_tx_string(pUart, (const uint8_t *)p); - // TODO: if hartId is zero (i.e., E51), replace this with non-blocking - // queue implementation, with HSS_UART state machine consuming from queues... - return len; -} - -void uart_putc(int hartid, const char ch) -{ - uint8_t string[2]; - string[0] = (uint8_t)ch; - string[1] = 0u; - - mss_uart_instance_t *pUart = get_uart_instance(hartid); - MSS_UART_polled_tx_string(pUart, (const uint8_t *)string); -} - -#define HSS_UART_HELPER_MAX_GETLINE 80 -ssize_t uart_getline(char **pBuffer, size_t *pBufLen) -{ - ssize_t result = 0; - bool finished = false; - static char myBuffer[HSS_UART_HELPER_MAX_GETLINE]; // static to be stack friendly - const size_t bufferLen = ARRAY_SIZE(myBuffer); - - memset(myBuffer, 0, bufferLen); - - uint8_t cBuf[1]; - while (!finished) { - while (0 == MSS_UART_get_rx(&g_mss_uart0_lo, cBuf, 1)); - - switch (cBuf[0]) { - case '\r': - MSS_UART_polled_tx(&g_mss_uart0_lo, cBuf, 1u); - finished = true; - break; - - case '\n': - MSS_UART_polled_tx(&g_mss_uart0_lo, cBuf, 1u); - finished = true; - break; - - case 0x7Fu: // delete - if (result) { - result--; - MSS_UART_polled_tx(&g_mss_uart0_lo, (uint8_t const *)"\033[D \033[D", 7u); - myBuffer[result] = 0; - } - break; - - case 0x08u: // backspace - ^H - if (result) { - result--; - MSS_UART_polled_tx(&g_mss_uart0_lo, (uint8_t const *)" \033[D", 4u); - myBuffer[result] = 0; - } - break; - - case 0x03u: // intr - ^C - result = -1; - myBuffer[0] = 0; - finished = true; - break; - - case 0x1Bu: // ESC - result = -1; - myBuffer[0] = 0; - finished = true; - break; - - case 0x04u: // ^D - if (result == 0) { - result = -1; - myBuffer[0] = 0; - finished = true; - } - break; - - default: - if (result < bufferLen) { - MSS_UART_polled_tx(&g_mss_uart0_lo, cBuf, 1u); - myBuffer[result] = cBuf[0]; - result++; - } - break; - } - } - - const char crlf[] = CRLF; - MSS_UART_polled_tx_string(&g_mss_uart0_lo, (const uint8_t *)crlf); - - if (result > 0) { - *pBuffer = myBuffer; - *pBufLen = (size_t)result; - } else { - *pBuffer = NULL; - *pBufLen = 0u; - } - - return result; -} - -bool uart_getchar(uint8_t *pbuf, int32_t timeout_sec, bool do_sec_tick) -{ - bool result = false; - bool done = false; - uint8_t rx_buff[1]; - HSSTicks_t start_time = 0u; - HSSTicks_t last_sec_time = 0u; - - //if (timeout_sec > 0) { - start_time = last_sec_time = HSS_GetTime(); - //} - - const HSSTicks_t timeout_ticks = timeout_sec * TICKS_PER_SEC; - //(void)MSS_UART_get_rx_status(&g_mss_uart0_lo); // clear sticky status - - while (!done) { - size_t received = MSS_UART_get_rx(&g_mss_uart0_lo, rx_buff, 1u); - if (0u != received) { - done = true; - if (MSS_UART_NO_ERROR == MSS_UART_get_rx_status(&g_mss_uart0_lo)) { - *pbuf = rx_buff[0]; - result = true; - break; - } else { - mHSS_DEBUG_PRINTF(LOG_ERROR, "UART error" CRLF); - } - } - - if (do_sec_tick && HSS_Timer_IsElapsed(last_sec_time, TICKS_PER_SEC)) { - const uint8_t dot='.'; - MSS_UART_polled_tx(&g_mss_uart0_lo, &dot, 1); - last_sec_time = HSS_GetTime(); - } - - if (timeout_sec < 0) { - ; // blocking until UART data received, so nothing extra to do here... - } else if (timeout_sec > 0) { - // time limited - done = HSS_Timer_IsElapsed(start_time, timeout_ticks); - } else /* timeout == 0 */ { - // one-shot - break; - } - } - - return result; -} diff --git a/sm/plat/mpfs/uart_helper.h b/sm/plat/mpfs/uart_helper.h deleted file mode 100644 index 5105977a6..000000000 --- a/sm/plat/mpfs/uart_helper.h +++ /dev/null @@ -1,44 +0,0 @@ -#ifndef UART_HELPER_H -#define UART_HELPER_H - -/******************************************************************************* - * Copyright 2019-2020 Microchip Corporation. - * - * SPDX-License-Identifier: MIT - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to - * deal in the Software without restriction, including without limitation the - * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * - * Hart Software Services - Implementation of UART helper routines - */ - -#ifdef __cplusplus -extern "C" { -#endif - -int uart_putstring(int hartid, const char *p); -ssize_t uart_getline(char **pBuffer, size_t *pBufLen); -bool uart_getchar(uint8_t *pbuf, int32_t timeout_sec, bool do_sec_tick); -void uart_putc(int hartid, const char ch); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/sm/src/attest.c b/sm/src/attest.c index 9c888887d..cdef976da 100644 --- a/sm/src/attest.c +++ b/sm/src/attest.c @@ -3,7 +3,7 @@ // All Rights Reserved. See LICENSE for license details. //------------------------------------------------------------------------------ #include "enclave.h" -#include "crypto.h" +#include #include "page.h" #include diff --git a/sm/src/enclave.h b/sm/src/enclave.h index 2cb900448..0399a4d3d 100644 --- a/sm/src/enclave.h +++ b/sm/src/enclave.h @@ -12,7 +12,7 @@ #include "sm.h" #include "pmp.h" #include "thread.h" -#include "crypto.h" +#include // Special target platform header, set by configure script #include TARGET_PLATFORM_HEADER diff --git a/sm/src/objects.mk b/sm/src/objects.mk index 5e45dd4c3..6fa93c52c 100644 --- a/sm/src/objects.mk +++ b/sm/src/objects.mk @@ -3,14 +3,16 @@ ############# # General headers -keystone-sm-headers += assert.h cpu.h enclave.h ipi.h mprv.h page.h platform-hook.h \ +keystone-sm-headers += sm_assert.h cpu.h enclave.h ipi.h mprv.h page.h platform-hook.h \ pmp.h safe_math_util.h sm.h sm-sbi.h sm-sbi-opensbi.h thread.h # Crypto headers +ifneq ($(KEYSTONE_SM_NO_CRYPTO),y) keystone-sm-headers += crypto.h ed25519/ed25519.h ed25519/fe.h ed25519/fixedint.h \ ed25519/ge.h ed25519/precomp_data.h ed25519/sc.h \ hkdf_sha3_512/hkdf_sha3_512.h hmac_sha3/hmac_sha3.h \ sha3/sha3.h +endif # Platform headers keystone-sm-headers += platform/$(KEYSTONE_PLATFORM)/platform.h @@ -31,9 +33,11 @@ keystone-sm-sources += attest.c cpu.c enclave.c pmp.c sm.c sm-sbi.c sm-sbi-opens thread.c mprv.c sbi_trap_hack.c trap.c ipi.c # Crypto +ifneq ($(KEYSTONE_SM_NO_CRYPTO),y) keystone-sm-sources += crypto.c sha3/sha3.c ed25519/fe.c ed25519/ge.c ed25519/keypair.c \ ed25519/sc.c ed25519/sign.c hkdf_sha3_512/hkdf_sha3_512.c \ hmac_sha3/hmac_sha3.c +endif # Platform keystone-sm-sources += platform/$(PLATFORM)/platform.c diff --git a/sm/src/platform/generic/platform.c b/sm/src/platform/generic/platform.c index 16416fbe5..16dd4f369 100644 --- a/sm/src/platform/generic/platform.c +++ b/sm/src/platform/generic/platform.c @@ -1,5 +1,6 @@ /* Default platform does nothing special here */ #include "../../enclave.h" +#include unsigned long platform_init_global_once(){ return SBI_ERR_SM_ENCLAVE_SUCCESS; @@ -42,3 +43,27 @@ uint64_t platform_random(){ x += (w += s); return (x>>32) | (x<<32); } + +// Initialization functions + +/* from Sanctum BootROM */ +extern byte sanctum_sm_hash[MDSIZE]; +extern byte sanctum_sm_signature[SIGNATURE_SIZE]; +extern byte sanctum_sm_secret_key[PRIVATE_KEY_SIZE]; +extern byte sanctum_sm_public_key[PUBLIC_KEY_SIZE]; +extern byte sanctum_dev_public_key[PUBLIC_KEY_SIZE]; + +extern byte sm_hash[MDSIZE]; +extern byte sm_signature[SIGNATURE_SIZE]; +extern byte sm_public_key[PUBLIC_KEY_SIZE]; +extern byte sm_private_key[PRIVATE_KEY_SIZE]; +extern byte dev_public_key[PUBLIC_KEY_SIZE]; + +void sm_copy_key(void) +{ + sbi_memcpy(sm_hash, sanctum_sm_hash, MDSIZE); + sbi_memcpy(sm_signature, sanctum_sm_signature, SIGNATURE_SIZE); + sbi_memcpy(sm_public_key, sanctum_sm_public_key, PUBLIC_KEY_SIZE); + sbi_memcpy(sm_private_key, sanctum_sm_secret_key, PRIVATE_KEY_SIZE); + sbi_memcpy(dev_public_key, sanctum_dev_public_key, PUBLIC_KEY_SIZE); +} diff --git a/sm/src/platform/generic/platform.h b/sm/src/platform/generic/platform.h index 316452a17..7270378ce 100644 --- a/sm/src/platform/generic/platform.h +++ b/sm/src/platform/generic/platform.h @@ -22,4 +22,8 @@ struct platform_enclave_data{ // CPU configuration #define MAX_HARTS 16 +// Initialization functions +void sm_copy_key(void); + #endif // _PLATFORM_H_ + diff --git a/sm/src/platform/mpfs/platform.c b/sm/src/platform/mpfs/platform.c index 4b260d0cc..518500849 100644 --- a/sm/src/platform/mpfs/platform.c +++ b/sm/src/platform/mpfs/platform.c @@ -1,8 +1,9 @@ -/* Default platform does nothing special here */ + #include "platform-hook.h" -#include "../../enclave.h" -#include "../../../plat/mpfs/drivers/mss_sys_services/mss_sys_services.h" +#include "enclave.h" +#include #include +#include #include unsigned long platform_init_global_once(void){ @@ -57,3 +58,16 @@ uint64_t platform_random(void){ spin_unlock(&rand_state_lock); return out; } + +// Initialization functions +extern byte dev_public_key[PUBLIC_KEY_SIZE]; + +// Todo secure boot +void sm_copy_key(void) +{ + sbi_memset(sm_hash, 0, MDSIZE); + sbi_memset(sm_signature, 0, SIGNATURE_SIZE); + sbi_memset(sm_public_key, 0, PUBLIC_KEY_SIZE); + sbi_memset(sm_private_key, 0, PRIVATE_KEY_SIZE); + sbi_memset(dev_public_key, 0, PUBLIC_KEY_SIZE); +} diff --git a/sm/src/platform/mpfs/platform.h b/sm/src/platform/mpfs/platform.h index b45e760ea..5e9ddaf2e 100644 --- a/sm/src/platform/mpfs/platform.h +++ b/sm/src/platform/mpfs/platform.h @@ -23,4 +23,7 @@ struct platform_enclave_data{ // CPU configuration #define MAX_HARTS 5 +// Initialization functions +void sm_copy_key(void); + #endif // _PLATFORM_H_ diff --git a/sm/src/sm.c b/sm/src/sm.c index d3828fe52..351d49848 100644 --- a/sm/src/sm.c +++ b/sm/src/sm.c @@ -5,7 +5,7 @@ #include "ipi.h" #include "sm.h" #include "pmp.h" -#include "crypto.h" +#include #include "enclave.h" #include "platform-hook.h" #include "sm-sbi-opensbi.h" @@ -25,13 +25,6 @@ static int sm_region_id = 0, os_region_id = 0; // Special target platform header, set by configure script #include TARGET_PLATFORM_HEADER -/* from Sanctum BootROM */ -extern byte sanctum_sm_hash[MDSIZE]; -extern byte sanctum_sm_signature[SIGNATURE_SIZE]; -extern byte sanctum_sm_secret_key[PRIVATE_KEY_SIZE]; -extern byte sanctum_sm_public_key[PUBLIC_KEY_SIZE]; -extern byte sanctum_dev_public_key[PUBLIC_KEY_SIZE]; - byte sm_hash[MDSIZE] = { 0, }; byte sm_signature[SIGNATURE_SIZE] = { 0, }; byte sm_public_key[PUBLIC_KEY_SIZE] = { 0, }; @@ -87,15 +80,6 @@ int sm_derive_sealing_key(unsigned char *key, const unsigned char *key_ident, info, MDSIZE + key_ident_size, key, SEALING_KEY_SIZE); } -static void sm_copy_key(void) -{ - sbi_memcpy(sm_hash, sanctum_sm_hash, MDSIZE); - sbi_memcpy(sm_signature, sanctum_sm_signature, SIGNATURE_SIZE); - sbi_memcpy(sm_public_key, sanctum_sm_public_key, PUBLIC_KEY_SIZE); - sbi_memcpy(sm_private_key, sanctum_sm_secret_key, PRIVATE_KEY_SIZE); - sbi_memcpy(dev_public_key, sanctum_dev_public_key, PUBLIC_KEY_SIZE); -} - static void sm_print_hash(void) { for (int i=0; i Date: Fri, 30 Jun 2023 11:57:39 -0700 Subject: [PATCH 04/14] Integrate Keystone with Microchip --- .gitmodules | 3 + Makefile | 5 +- examples/attestation/CMakeLists.txt | 3 + mkutils/plat/mpfs/run.mk | 26 +++ overlays/keystone/Config.in | 1 + overlays/keystone/board/mpfs/hss-config.yaml | 17 ++ .../dt-overlay-mchp/0001-move-devtree.patch | 52 ++++++ .../patches/linux/0001-make-more-cma.patch | 118 +++++++++++++ .../patches/uboot/0001-change-base-addr.patch | 46 +++++ .../uboot/0002-use-hss-devicetree.patch | 53 ++++++ .../board/mpfs/uboot-fragment-rootfs.config | 3 + .../keystone/configs/linux64-mpfs-defconfig | 160 ++++++++++++++++++ .../keystone/configs/riscv64_mpfs_defconfig | 109 ++++++++++++ overlays/keystone/external.mk | 48 +++++- .../keystone-examples/keystone-examples.mk | 9 +- overlays/microchip | 1 + scripts/gdb/mpfs.cfg | 20 +++ 17 files changed, 669 insertions(+), 5 deletions(-) create mode 100644 mkutils/plat/mpfs/run.mk create mode 100644 overlays/keystone/board/mpfs/hss-config.yaml create mode 100644 overlays/keystone/board/mpfs/patches/dt-overlay-mchp/0001-move-devtree.patch create mode 100644 overlays/keystone/board/mpfs/patches/linux/0001-make-more-cma.patch create mode 100644 overlays/keystone/board/mpfs/patches/uboot/0001-change-base-addr.patch create mode 100644 overlays/keystone/board/mpfs/patches/uboot/0002-use-hss-devicetree.patch create mode 100644 overlays/keystone/board/mpfs/uboot-fragment-rootfs.config create mode 100644 overlays/keystone/configs/linux64-mpfs-defconfig create mode 100644 overlays/keystone/configs/riscv64_mpfs_defconfig create mode 160000 overlays/microchip create mode 100644 scripts/gdb/mpfs.cfg diff --git a/.gitmodules b/.gitmodules index 684383c88..88a168640 100644 --- a/.gitmodules +++ b/.gitmodules @@ -7,3 +7,6 @@ [submodule "overlays/keystone/board/cva6/cva6-sdk"] path = overlays/keystone/board/cva6/cva6-sdk url = https://github.com/openhwgroup/cva6-sdk +[submodule "overlays/microchip"] + path = overlays/microchip + url = https://github.com/linux4microchip/buildroot-external-microchip diff --git a/Makefile b/Makefile index c3bfba8c3..0181558f6 100644 --- a/Makefile +++ b/Makefile @@ -33,7 +33,8 @@ include mkutils/log.mk BUILDROOT_CONFIGFILE ?= riscv$(KEYSTONE_BITS)_$(KEYSTONE_PLATFORM)_defconfig ifeq ($(KEYSTONE_PLATFORM),mpfs) - EXTERNALS += microchip + EXTERNALS += microchip + ADDITIONAL_OVERLAYS := \$$(BR2_EXTERNAL_MCHP_PATH)/board/microchip/icicle/rootfs-overlay endif # Highest priority external @@ -69,7 +70,7 @@ BUILDROOT_CCACHE ?= $(HOME)/.buildroot-ccache $(BUILDROOT_BUILDDIR)/.config: $(BUILDROOT_BUILDDIR) $(call log,info,Configuring Buildroot with $(BUILDROOT_CONFIGFILE)) $(MAKE) $(BUILDROOT_MAKEFLAGS) $(BUILDROOT_CONFIGFILE) - echo "BR2_ROOTFS_OVERLAY=\"$(BUILDROOT_OVERLAYDIR)\"" >> $(BUILDROOT_BUILDDIR)/.config + echo "BR2_ROOTFS_OVERLAY=\"$(BUILDROOT_OVERLAYDIR) $(ADDITIONAL_OVERLAYS)\"" >> $(BUILDROOT_BUILDDIR)/.config echo "BR2_CCACHE_DIR=$(BUILDROOT_CCACHE)" >> $(BUILDROOT_BUILDDIR)/.config # Overlay diff --git a/examples/attestation/CMakeLists.txt b/examples/attestation/CMakeLists.txt index 153d58fc6..223e39b27 100644 --- a/examples/attestation/CMakeLists.txt +++ b/examples/attestation/CMakeLists.txt @@ -47,6 +47,9 @@ if(NOT DEFINED fw_bin) set(fw_bin ../../../images/fw_payload.bin) endif() +get_filename_component(fw_file ${fw_bin} NAME) +set(package_script "./attestor-runner attestor eyrie-rt loader.bin --sm-bin ${fw_file}") + # add target for packaging (see keystone.cmake) add_keystone_package(${eapp_bin}-package diff --git a/mkutils/plat/mpfs/run.mk b/mkutils/plat/mpfs/run.mk new file mode 100644 index 000000000..0674a3491 --- /dev/null +++ b/mkutils/plat/mpfs/run.mk @@ -0,0 +1,26 @@ + +########################### +## Flash and run targets ## +########################### + +export SC_INSTALL_DIR ?= /opt/microchip/SoftConsole-v2022.2-RISC-V-747 + +OPENOCD_FLAGS := -c "gdb_port 3333" -c "telnet_port 4444" -c "tcl_port 6666" \ + -c "set DEVICE MPFS" -c "set JTAG_KHZ 11000" + +ifneq ($(MPFS_COREID),) + OPENOCD_FLAGS += -c "set COREID $(MPFS_COREID)" +endif + +OPENOCD_FLAGS += --file board/microsemi-riscv.cfg + +run: + $(call log,info,Starting OpenOCD) + $(SC_INSTALL_DIR)/openocd/bin/openocd $(OPENOCD_FLAGS) + +debug-connect: + $(call log,info,Connecting to OpenOCD) + PYTHONPATH=$(BUILDROOT_BUILDDIR)/build/host-gcc-final-11.4.0/libstdc++-v3/python \ + $(BUILDROOT_BUILDDIR)/host/bin/riscv64-buildroot-linux-gnu-gdb \ + -iex "set KEYSTONE=$(KEYSTONE)" \ + -x $(KEYSTONE)/scripts/gdb/mpfs.cfg diff --git a/overlays/keystone/Config.in b/overlays/keystone/Config.in index 8755d2a7d..51f8f98d0 100644 --- a/overlays/keystone/Config.in +++ b/overlays/keystone/Config.in @@ -2,6 +2,7 @@ # Bootloaders source "$BR2_EXTERNAL_KEYSTONE_PATH/boot/keystone-bootrom/Config.in" source "$BR2_EXTERNAL_KEYSTONE_PATH/boot/keystone-sm/Config.in" +source "$BR2_EXTERNAL_KEYSTONE_PATH/boot/hss/Config.in" # Packages source "$BR2_EXTERNAL_KEYSTONE_PATH/package/keystone-driver/Config.in" diff --git a/overlays/keystone/board/mpfs/hss-config.yaml b/overlays/keystone/board/mpfs/hss-config.yaml new file mode 100644 index 000000000..f9da74885 --- /dev/null +++ b/overlays/keystone/board/mpfs/hss-config.yaml @@ -0,0 +1,17 @@ +# +# HSS Payload Generator - buildroot configuration file +# + +# This configuration file is almost verbatim copied from the one in overlays/microchip/board/microchip/icicle/config.yaml, +# with the only changes being to u-boot's starting addresses. Since we need quite a lot of contiguous physical memory +# (for VTA and Keystone), we've had to shift some of the firmwares around in order to make room. This configuration file +# simply causes u-boot to be loaded at 0x90200000 rather that 0x80200000. See this spreadsheet for memory maps: +# +# https://docs.google.com/spreadsheets/d/1udkXU-yJFux_UKdjfGWhB8Kl4OM-iYosNJppex-5UYA + +set-name: 'PolarFire-SoC-HSS::U-Boot' + +hart-entry-points: {u54_1: '0x90200000', u54_2: '0x90200000', u54_3: '0x90200000', u54_4: '0x90200000'} + +payloads: + src.bin: {exec-addr: '0x90200000', owner-hart: u54_1, secondary-hart: u54_2, secondary-hart: u54_3, secondary-hart: u54_4, priv-mode: prv_s, ancilliary-data: mpfs-icicle-kit.dtb} diff --git a/overlays/keystone/board/mpfs/patches/dt-overlay-mchp/0001-move-devtree.patch b/overlays/keystone/board/mpfs/patches/dt-overlay-mchp/0001-move-devtree.patch new file mode 100644 index 000000000..4f6cda0f1 --- /dev/null +++ b/overlays/keystone/board/mpfs/patches/dt-overlay-mchp/0001-move-devtree.patch @@ -0,0 +1,52 @@ +diff --git a/mpfs_icicle.its b/mpfs_icicle.its +index 7995ae0..a8ae0e2 100644 +--- a/mpfs_icicle.its ++++ b/mpfs_icicle.its +@@ -21,8 +21,8 @@ + arch = "riscv"; + os = "linux"; + compression = "gzip"; +- load = <0x80200000>; +- entry = <0x80200000>; ++ load = <0x90200000>; ++ entry = <0x90200000>; + hash-1 { + algo = "sha256"; + }; +@@ -33,7 +33,7 @@ + type = "flat_dt"; + arch = "riscv"; + compression = "none"; +- load = <0x8a000000>; ++ load = <0x94000000>; + hash-1 { + algo = "sha256"; + }; +@@ -44,7 +44,7 @@ + type = "flat_dt"; + arch = "riscv"; + compression = "none"; +- load = <0x8a080000>; ++ load = <0x94004000>; + hash-1 { + algo = "sha256"; + }; +@@ -55,7 +55,7 @@ + type = "flat_dt"; + arch = "riscv"; + compression = "none"; +- load = <0x8a090000>; ++ load = <0x94008000>; + hash-1 { + algo = "sha256"; + }; +@@ -66,7 +66,7 @@ + type = "flat_dt"; + arch = "riscv"; + compression = "none"; +- load = <0x8a0a0000>; ++ load = <0x9400C000>; + hash-1 { + algo = "sha256"; + }; + diff --git a/overlays/keystone/board/mpfs/patches/linux/0001-make-more-cma.patch b/overlays/keystone/board/mpfs/patches/linux/0001-make-more-cma.patch new file mode 100644 index 000000000..b0108960f --- /dev/null +++ b/overlays/keystone/board/mpfs/patches/linux/0001-make-more-cma.patch @@ -0,0 +1,118 @@ +diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts +index 518780fca665..4133621e3488 100644 +--- a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts ++++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts +@@ -41,19 +41,14 @@ cpus { + timebase-frequency = ; + }; + +- kernel: memory@80000000 { ++ ddr_cached_low: memory@90000000 { + device_type = "memory"; +- reg = <0x0 0x80000000 0x0 0x4000000>; ++ reg = <0x0 0x90000000 0x0 0x10000000>; + }; + +- ddr_cached_low: memory@8a000000 { ++ ddr_non_cached_low: memory@c0000000 { + device_type = "memory"; +- reg = <0x0 0x8a000000 0x0 0x8000000>; +- }; +- +- ddr_non_cached_low: memory@c4000000 { +- device_type = "memory"; +- reg = <0x0 0xc4000000 0x0 0x6000000>; ++ reg = <0x0 0xc0000000 0x0 0x10000000>; + }; + + ddr_cached_high: memory@1022000000 { +@@ -77,14 +72,6 @@ hss: hss-buffer@103fc00000 { + no-map; + }; + +- dma_non_cached_low: non-cached-low-buffer { +- compatible = "shared-dma-pool"; +- size = <0x0 0x4000000>; +- no-map; +- linux,dma-default; +- alloc-ranges = <0x0 0xc4000000 0x0 0x4000000>; +- }; +- + dma_non_cached_high: non-cached-high-buffer { + compatible = "shared-dma-pool"; + size = <0x0 0x10000000>; +@@ -92,26 +79,29 @@ dma_non_cached_high: non-cached-high-buffer { + linux,dma-default; + alloc-ranges = <0x14 0x12000000 0x0 0x10000000>; + }; +- ++/* + fabricbuf0ddrc: buffer@88000000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x88000000 0x0 0x2000000>; + no-map; + }; ++*/ + +- fabricbuf1ddrnc: buffer@c8000000 { ++ fabricbuf1ddrnc: buffer@c0000000 { + compatible = "shared-dma-pool"; +- reg = <0x0 0xc8000000 0x0 0x2000000>; ++ reg = <0x0 0xc0000000 0x0 0x10000000>; + no-map; + }; + ++/* + fabricbuf2ddrncwcb: buffer@d8000000 { + compatible = "shared-dma-pool"; + reg = <0x0 0xd8000000 0x0 0x2000000>; + no-map; + }; ++*/ + }; +- ++/* + udmabuf0 { + compatible = "ikwzm,u-dma-buf"; + device-name = "udmabuf-ddr-c0"; +@@ -120,16 +110,16 @@ udmabuf0 { + memory-region = <&fabricbuf0ddrc>; + sync-mode = <3>; + }; +- ++*/ + udmabuf1 { + compatible = "ikwzm,u-dma-buf"; + device-name = "udmabuf-ddr-nc0"; + minor-number = <1>; +- size = <0x0 0x2000000>; ++ size = <0x0 0x10000000>; + memory-region = <&fabricbuf1ddrnc>; + sync-mode = <3>; + }; +- ++/* + udmabuf2 { + compatible = "ikwzm,u-dma-buf"; + device-name = "udmabuf-ddr-nc-wcb0"; +@@ -138,6 +128,7 @@ udmabuf2 { + memory-region = <&fabricbuf2ddrncwcb>; + sync-mode = <3>; + }; ++ */ + }; + + &can0 { +diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c +index ebabd2750a99..abd65f78827c 100644 +--- a/arch/riscv/mm/init.c ++++ b/arch/riscv/mm/init.c +@@ -242,7 +242,7 @@ static void __init setup_bootmem(void) + memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va)); + } + +- dma_contiguous_reserve(dma32_phys_limit); ++ dma_contiguous_reserve(phys_ram_end); + if (IS_ENABLED(CONFIG_64BIT)) + hugetlb_cma_reserve(PUD_SHIFT - PAGE_SHIFT); + memblock_allow_resize(); diff --git a/overlays/keystone/board/mpfs/patches/uboot/0001-change-base-addr.patch b/overlays/keystone/board/mpfs/patches/uboot/0001-change-base-addr.patch new file mode 100644 index 000000000..14647153b --- /dev/null +++ b/overlays/keystone/board/mpfs/patches/uboot/0001-change-base-addr.patch @@ -0,0 +1,46 @@ +diff --git a/configs/microchip_mpfs_icicle_defconfig b/configs/microchip_mpfs_icicle_defconfig +index 13725c584e..d72e44e2fc 100644 +--- a/configs/microchip_mpfs_icicle_defconfig ++++ b/configs/microchip_mpfs_icicle_defconfig +@@ -1,4 +1,5 @@ + CONFIG_RISCV=y ++CONFIG_SYS_TEXT_BASE=0x90200000 + CONFIG_SYS_MALLOC_LEN=0x800000 + CONFIG_SYS_MALLOC_F_LEN=0x2000 + CONFIG_ENV_SIZE=0x2000 +@@ -7,7 +8,7 @@ CONFIG_TARGET_MICROCHIP_ICICLE=y + CONFIG_ARCH_RV64I=y + CONFIG_RISCV_SMODE=y + CONFIG_DISTRO_DEFAULTS=y +-CONFIG_SYS_LOAD_ADDR=0x80200000 ++CONFIG_SYS_LOAD_ADDR=0x90200000 + CONFIG_FIT=y + CONFIG_DISPLAY_CPUINFO=y + CONFIG_DISPLAY_BOARDINFO=y +diff --git a/include/configs/microchip_mpfs_icicle.h b/include/configs/microchip_mpfs_icicle.h +index 9ef5425c9f..7efed8376c 100644 +--- a/include/configs/microchip_mpfs_icicle.h ++++ b/include/configs/microchip_mpfs_icicle.h +@@ -9,12 +9,12 @@ + + #include + +-#define CONFIG_SYS_SDRAM_BASE 0x80000000 ++#define CONFIG_SYS_SDRAM_BASE 0x90000000 + #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M) + + #define CONFIG_SYS_BOOTM_LEN SZ_64M + +-#define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 ++#define CONFIG_STANDALONE_LOAD_ADDR 0x90200000 + + /* Environment options */ + +@@ -70,7 +70,7 @@ + + #define CONFIG_EXTRA_ENV_SETTINGS \ + "bootm_size=0x10000000\0" \ +- "scriptaddr=0x8e000000\0" \ ++ "scriptaddr=0x9e000000\0" \ + BOOTENV_DESIGN_OVERLAYS \ + BOOTENV \ diff --git a/overlays/keystone/board/mpfs/patches/uboot/0002-use-hss-devicetree.patch b/overlays/keystone/board/mpfs/patches/uboot/0002-use-hss-devicetree.patch new file mode 100644 index 000000000..8a77709e7 --- /dev/null +++ b/overlays/keystone/board/mpfs/patches/uboot/0002-use-hss-devicetree.patch @@ -0,0 +1,53 @@ +diff --git a/board/microchip/mpfs_icicle/mpfs_icicle.c b/board/microchip/mpfs_icicle/mpfs_icicle.c +index 4244ab0647..cd1a6af81d 100644 +--- a/board/microchip/mpfs_icicle/mpfs_icicle.c ++++ b/board/microchip/mpfs_icicle/mpfs_icicle.c +@@ -11,6 +11,7 @@ + #include + #include + #include ++#include + + DECLARE_GLOBAL_DATA_PTR; + +@@ -295,6 +296,17 @@ static void get_device_tree_overlays(void) + env_set("dtbo_size", dtbo_size); + } + ++void *board_fdt_blob_setup(int *err) ++{ ++ *err = 0; ++ if (IS_ENABLED(CONFIG_OF_SEPARATE) || IS_ENABLED(CONFIG_OF_BOARD)) { ++ if (gd->arch.firmware_fdt_addr) ++ return (ulong *)(uintptr_t)gd->arch.firmware_fdt_addr; ++ } ++ ++ return (ulong *)&_end; ++} ++ + int board_init(void) + { + /* For now nothing to do here. */ +diff --git a/configs/microchip_mpfs_icicle_defconfig b/configs/microchip_mpfs_icicle_defconfig +index d72e44e2fc..727577e201 100644 +--- a/configs/microchip_mpfs_icicle_defconfig ++++ b/configs/microchip_mpfs_icicle_defconfig +@@ -3,16 +3,17 @@ CONFIG_SYS_TEXT_BASE=0x90200000 + CONFIG_SYS_MALLOC_LEN=0x800000 + CONFIG_SYS_MALLOC_F_LEN=0x2000 + CONFIG_ENV_SIZE=0x2000 +-CONFIG_DEFAULT_DEVICE_TREE="microchip-mpfs-icicle-kit" + CONFIG_TARGET_MICROCHIP_ICICLE=y + CONFIG_ARCH_RV64I=y + CONFIG_RISCV_SMODE=y ++CONFIG_OF_BOARD_FIXUP=y + CONFIG_DISTRO_DEFAULTS=y + CONFIG_SYS_LOAD_ADDR=0x90200000 + CONFIG_FIT=y + CONFIG_DISPLAY_CPUINFO=y + CONFIG_DISPLAY_BOARDINFO=y + CONFIG_SYS_PROMPT="RISC-V # " ++CONFIG_OF_BOARD=y + CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_BOOTP_SEND_HOSTNAME=y + CONFIG_DM_MTD=y diff --git a/overlays/keystone/board/mpfs/uboot-fragment-rootfs.config b/overlays/keystone/board/mpfs/uboot-fragment-rootfs.config new file mode 100644 index 000000000..bcbc0cc19 --- /dev/null +++ b/overlays/keystone/board/mpfs/uboot-fragment-rootfs.config @@ -0,0 +1,3 @@ +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="earlycon root=/dev/mmcblk0p3 rootwait uio_pdrv_genirq.of_id=generic-uio cma=128M@0x98000000" +CONFIG_MPFS_PRIORITISE_QSPI_BOOT=n diff --git a/overlays/keystone/configs/linux64-mpfs-defconfig b/overlays/keystone/configs/linux64-mpfs-defconfig new file mode 100644 index 000000000..eef81cd33 --- /dev/null +++ b/overlays/keystone/configs/linux64-mpfs-defconfig @@ -0,0 +1,160 @@ +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_NO_HZ_IDLE=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_BPF_SYSCALL=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_CGROUPS=y +CONFIG_CGROUP_SCHED=y +CONFIG_CFS_BANDWIDTH=y +CONFIG_CGROUP_BPF=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_EXPERT=y +CONFIG_KALLSYMS_ALL=y +CONFIG_SOC_MICROCHIP_POLARFIRE=y +CONFIG_POLARFIRE_SOC_DMA_NONCOHERENT=y +CONFIG_SMP=y +CONFIG_CMDLINE="earlycon uio_pdrv_genirq.of_id=generic-uio" +CONFIG_JUMP_LABEL=y +# CONFIG_GCC_PLUGINS is not set +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_BLK_DEV_ZONED=y +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_CMA=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_PCI=y +CONFIG_PCI_HOST_GENERIC=y +CONFIG_PCIE_MICROCHIP_HOST=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_SPI_NAND=y +CONFIG_MTD_SPI_NOR=y +# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set +CONFIG_MTD_UBI=y +CONFIG_OF_OVERLAY=y +CONFIG_OF_CONFIGFS=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_NVME=y +CONFIG_MPFS_DMA_PROXY=y +CONFIG_BLK_DEV_SD=y +CONFIG_ATA=y +CONFIG_NETDEVICES=y +CONFIG_MACB=y +CONFIG_MICREL_PHY=y +CONFIG_MICROSEMI_PHY=y +CONFIG_INPUT_JOYDEV=m +CONFIG_INPUT_JOYSTICK=y +CONFIG_JOYSTICK_SENSEHAT=m +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_POLARFIRE_SOC=y +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MICROCHIP_CORE=y +CONFIG_SPI=y +CONFIG_SPI_MICROCHIP_CORE=y +CONFIG_SPI_MICROCHIP_CORE_QSPI=y +CONFIG_SPI_SPIDEV=m +CONFIG_GPIOLIB=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_POLARFIRE_SOC=y +CONFIG_POWER_RESET=y +CONFIG_PMBUS=m +CONFIG_MEDIA_SUPPORT=m +CONFIG_MEDIA_SUPPORT_FILTER=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_USB_SUPPORT=y +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_PLATFORM=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PLATFORM=y +CONFIG_USB_ACM=m +CONFIG_USB_STORAGE=m +CONFIG_USB_MUSB_HDRC=y +CONFIG_USB_MUSB_POLARFIRE_SOC=y +CONFIG_USB_INVENTRA_DMA=y +CONFIG_USB_SERIAL=m +CONFIG_NOP_USB_XCEIV=y +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_CADENCE=y +CONFIG_MMC_SPI=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_POLARFIRE_SOC=y +CONFIG_DMADEVICES=y +CONFIG_SF_PDMA=y +CONFIG_AUXDISPLAY=y +CONFIG_SENSEHAT_DISPLAY=m +CONFIG_UIO=y +CONFIG_UIO_PDRV_GENIRQ=y +CONFIG_UIO_DMEM_GENIRQ=y +CONFIG_UIO_MICROCHIP_CAN=y +CONFIG_UIO_MICROCHIP_DMA=y +CONFIG_POLARFIRE_SOC_MAILBOX=y +CONFIG_REMOTEPROC=y +CONFIG_REMOTEPROC_CDEV=y +CONFIG_MIV_REMOTEPROC=y +CONFIG_RPMSG_CHAR=m +CONFIG_RPMSG_MIV=y +CONFIG_RPMSG_MIV_TTY=m +CONFIG_RPMSG_VIRTIO=y +CONFIG_POLARFIRE_SOC_SYS_CTRL=y +CONFIG_POLARFIRE_SOC_GENERIC_SERVICE=y +CONFIG_SIFIVE_L2=y +CONFIG_IIO=m +CONFIG_IIO_SW_DEVICE=m +CONFIG_IIO_SW_TRIGGER=m +CONFIG_PAC193X=m +CONFIG_HTS221=m +CONFIG_IIO_ST_LSM6DSX=m +CONFIG_IIO_ST_MAGN_3AXIS=m +CONFIG_IIO_ST_PRESS=m +CONFIG_PWM=y +CONFIG_PWM_MICROCHIP_CORE=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_FANOTIFY=y +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_IOCHARSET="ascii" +CONFIG_EXFAT_FS=m +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_UBIFS_FS=y +CONFIG_NFS_FS=m +CONFIG_NFS_V4=m +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_NLS_CODEPAGE_437=m +CONFIG_NLS_CODEPAGE_850=m +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_UTF8=m +CONFIG_DMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=0 +CONFIG_PRINTK_TIME=y +CONFIG_DEBUG_INFO=y +CONFIG_GDB_SCRIPTS=y +CONFIG_DEBUG_FS=y +CONFIG_SCHED_STACK_END_CHECK=y +CONFIG_SOFTLOCKUP_DETECTOR=y +CONFIG_WQ_WATCHDOG=y +CONFIG_SCHEDSTATS=y +CONFIG_STACKTRACE=y +CONFIG_SAMPLES=y +CONFIG_SAMPLE_RPMSG_CLIENT=m diff --git a/overlays/keystone/configs/riscv64_mpfs_defconfig b/overlays/keystone/configs/riscv64_mpfs_defconfig new file mode 100644 index 000000000..aca2fbd8f --- /dev/null +++ b/overlays/keystone/configs/riscv64_mpfs_defconfig @@ -0,0 +1,109 @@ +BR2_riscv=y +BR2_riscv_custom=y +BR2_RISCV_ISA_CUSTOM_RVM=y +BR2_RISCV_ISA_CUSTOM_RVF=y +BR2_RISCV_ISA_CUSTOM_RVD=y +BR2_RISCV_ISA_CUSTOM_RVC=y +BR2_KERNEL_HEADERS_VERSION=y +BR2_DEFAULT_KERNEL_VERSION="5.15.30" +BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_15=y +BR2_PACKAGE_GLIBC_UTILS=y +BR2_BINUTILS_VERSION_2_37_X=y +BR2_TOOLCHAIN_BUILDROOT_CXX=y +BR2_PACKAGE_HOST_GDB=y +BR2_PACKAGE_HOST_GDB_PYTHON3=y +BR2_CCACHE=y +BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_KEYSTONE_PATH)/patches $(BR2_EXTERNAL_KEYSTONE_PATH)/board/mpfs/patches" +BR2_PER_PACKAGE_DIRECTORIES=y +BR2_SSP_NONE=y +BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_MDEV=y +BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_MCHP_PATH)/board/microchip/icicle/post-build.sh" +BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_MCHP_PATH)/board/microchip/icicle/post-image.sh" +BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_MCHP_PATH)/board/microchip/icicle/genimage_rootfs.cfg" +BR2_LINUX_KERNEL=y +BR2_LINUX_KERNEL_CUSTOM_TARBALL=y +BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="$(call github,linux4microchip,linux,linux-5.15-mchp+fpga)/linux4microchip+fpga-2023.02.01.tar.gz" +BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_KEYSTONE_PATH)/configs/linux64-mpfs-defconfig" +BR2_LINUX_KERNEL_DTS_SUPPORT=y +BR2_LINUX_KERNEL_INTREE_DTS_NAME="microchip/mpfs-icicle-kit" +BR2_LINUX_KERNEL_DTB_KEEP_DIRNAME=y +BR2_LINUX_KERNEL_DTB_OVERLAY_SUPPORT=y +BR2_PACKAGE_LINUX_TOOLS_GPIO=y +BR2_PACKAGE_LINUX_TOOLS_IIO=y +BR2_PACKAGE_BUSYBOX_SHOW_OTHERS=y +BR2_PACKAGE_DHRYSTONE=y +BR2_PACKAGE_LMBENCH=y +BR2_PACKAGE_E2FSPROGS=y +BR2_PACKAGE_MTD=y +BR2_PACKAGE_GPTFDISK=y +BR2_PACKAGE_GPTFDISK_GDISK=y +BR2_PACKAGE_GPTFDISK_SGDISK=y +BR2_PACKAGE_I2C_TOOLS=y +BR2_PACKAGE_PCIUTILS=y +BR2_PACKAGE_RNG_TOOLS=y +BR2_PACKAGE_PYTHON3=y +BR2_PACKAGE_PYTHON_FLASK=y +BR2_PACKAGE_CA_CERTIFICATES=y +BR2_PACKAGE_JPEG=y +BR2_PACKAGE_DTC=y +BR2_PACKAGE_DTC_PROGRAMS=y +BR2_PACKAGE_LIBGPIOD=y +BR2_PACKAGE_LIBGPIOD_TOOLS=y +BR2_PACKAGE_LIBIIO=y +BR2_PACKAGE_LIBIIO_BINDINGS_PYTHON=y +BR2_PACKAGE_COLLECTD=y +BR2_PACKAGE_COLLECTD_EXEC=y +BR2_PACKAGE_COLLECTD_CSV=y +BR2_PACKAGE_IPERF=y +BR2_PACKAGE_IPERF3=y +BR2_PACKAGE_NTP=y +BR2_PACKAGE_NTP_NTPDATE=y +BR2_PACKAGE_OPENSSH=y +BR2_PACKAGE_SOCAT=y +BR2_PACKAGE_WGET=y +BR2_PACKAGE_BASH=y +BR2_PACKAGE_SCREEN=y +BR2_PACKAGE_COREUTILS=y +BR2_PACKAGE_COREUTILS_INDIVIDUAL_BINARIES=y +BR2_PACKAGE_HTOP=y +BR2_PACKAGE_TAR=y +BR2_PACKAGE_NANO=y +BR2_TARGET_ROOTFS_EXT2=y +BR2_TARGET_ROOTFS_EXT2_4=y +BR2_TARGET_ROOTFS_EXT2_LABEL="ROOTFS" +BR2_TARGET_ROOTFS_EXT2_SIZE="512M" +# BR2_TARGET_ROOTFS_TAR is not set +BR2_TARGET_UBOOT=y +BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y +BR2_TARGET_UBOOT_CUSTOM_GIT=y +BR2_TARGET_UBOOT_CUSTOM_REPO_URL="https://github.com/polarfire-soc/u-boot" +BR2_TARGET_UBOOT_CUSTOM_REPO_VERSION="linux4microchip+fpga-2023.02" +BR2_TARGET_UBOOT_BOARD_DEFCONFIG="microchip_mpfs_icicle" +BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_KEYSTONE_PATH)/board/mpfs/uboot-fragment-rootfs.config" +BR2_TARGET_UBOOT_NEEDS_DTC=y +BR2_TARGET_UBOOT_NEEDS_OPENSSL=y +BR2_PACKAGE_HOST_BMAP_TOOLS=y +BR2_PACKAGE_HOST_GENEXT2FS=y +BR2_PACKAGE_HOST_GENIMAGE=y +BR2_PACKAGE_HOST_GPTFDISK=y +BR2_PACKAGE_HOST_MTOOLS=y +BR2_PACKAGE_HOST_SQUASHFS=y +BR2_PACKAGE_HOST_UBOOT_TOOLS=y +BR2_PACKAGE_HOST_UBOOT_TOOLS_FIT_SUPPORT=y +BR2_PACKAGE_HOST_UBOOT_TOOLS_BOOT_SCRIPT=y +BR2_PACKAGE_HOST_UBOOT_TOOLS_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_MCHP_PATH)/board/microchip/icicle/uboot-env.txt" +BR2_PACKAGE_DT_OVERLAY_MCHP=y +BR2_PACKAGE_DT_OVERLAY_MCHP_PLATFORM="mpfs_icicle" +BR2_PACKAGE_MPFS_EXAMPLES=y +BR2_PACKAGE_HOST_HSS_PAYLOAD_GENERATOR=y +BR2_PACKAGE_HOST_HSS_PAYLOAD_GENERATOR_CFG="$(BR2_EXTERNAL_KEYSTONE_PATH)/board/mpfs/hss-config.yaml" +BR2_PACKAGE_HOST_HSS_PAYLOAD_GENERATOR_SRC="$(BINARIES_DIR)/u-boot.bin" +BR2_TARGET_KEYSTONE_SM=y +BR2_TARGET_HSS=y +BR2_TARGET_HSS_SC_INSTALL_DIR="/opt/microchip/SoftConsole-v2022.2-RISC-V-747/" +BR2_TARGET_HSS_FPGENPROG="/home/grg/.local/bin/fpgenprog" +BR2_PACKAGE_KEYSTONE_DRIVER=y +BR2_PACKAGE_HOST_KEYSTONE_SDK=y +BR2_PACKAGE_KEYSTONE_RUNTIME=y +BR2_PACKAGE_KEYSTONE_EXAMPLES=y diff --git a/overlays/keystone/external.mk b/overlays/keystone/external.mk index 302329a56..e313ea993 100644 --- a/overlays/keystone/external.mk +++ b/overlays/keystone/external.mk @@ -9,15 +9,59 @@ include $(sort $(wildcard $(BR2_EXTERNAL_KEYSTONE_PATH)/boot/*/*.mk)) # Packages include $(sort $(wildcard $(BR2_EXTERNAL_KEYSTONE_PATH)/package/*/*.mk)) -# U-Boot +###################### +## Platform patches ## +###################### + +## unmatched ## ifeq ($(KEYSTONE_PLATFORM),hifive_unmatched) +# U-Boot define UBOOT_COPY_HIFIVE_SOURCES cp -ar $(KEYSTONE)/overlays/keystone/board/sifive/hifive-unmatched/src/uboot/keystone $(@D)/arch/riscv/lib cp -ar $(KEYSTONE)/overlays/keystone/board/sifive/hifive-unmatched/src/uboot/keystone.h $(@D)/arch/riscv/include/asm cp -ar $(KEYSTONE)/overlays/keystone/board/sifive/hifive-unmatched/src/uboot/u-boot-spl-sanctum.lds $(@D)/arch/riscv/cpu endef - UBOOT_POST_EXTRACT_HOOKS += UBOOT_COPY_HIFIVE_SOURCES endif + +## mpfs ## +ifeq ($(KEYSTONE_PLATFORM),mpfs) + +# post-image script +# pending https://lists.buildroot.org/pipermail/buildroot/2023-August/672838.html +target-post-image: keystone-fixup-per-package-paths +keystone-fixup-per-package-paths: host-finalize +ifeq ($(BR2_PER_PACKAGE_DIRECTORIES),y) + $(Q)grep --binary-files=without-match -lrZ '$(PER_PACKAGE_DIR)/[^/]\+/host' $(HOST_DIR) \ + |while read -d '' f; do \ + file -b --mime-type "$${f}" | grep -q '^text/' || continue; \ + printf '%s\0' "$${f}"; \ + done \ + |xargs -0 --no-run-if-empty \ + $(SED) 's:$(PER_PACKAGE_DIR)/[^/]\+/host:$(HOST_DIR):g' +endif + +# correct ldflags for hss-payload-generator +# pending https://github.com/linux4microchip/buildroot-external-microchip/pull/13 +define HOST_HSS_PAYLOAD_GENERATOR_BUILD_CORRECTLY + $(MAKE) -C $(@D)/tools/hss-payload-generator HOST_INCLUDES=-I$(HOST_DIR)/usr/include/ LDFLAGS="$(HOST_LDFLAGS)" +endef +HOST_HSS_PAYLOAD_GENERATOR_PRE_BUILD_HOOKS += HOST_HSS_PAYLOAD_GENERATOR_BUILD_CORRECTLY + +# For secure device mapping, Keystone needs access to the device tree at +# OpenSBI boot time. However, Microchip's default infrastructure does not +# do this -- instead, the device tree is embedded into the U-boot FIT image. +# Therefore, we need to induce a dependency on Linux from the HSS (to make +# sure that the device tree is built in time), and then also copy the device +# tree to where the hss-payload-generator expects it to be. +HOST_HSS_PAYLOAD_GENERATOR_DEPENDENCIES += linux +$(HOST_HSS_PAYLOAD_GENERATOR_TARGET_CONFIGURE): linux-install + +define HOST_HSS_PAYLOAD_GENERATOR_COPY_DTB + cp $(BINARIES_DIR)/microchip/* $(@D)/tools/hss-payload-generator/ +endef +HOST_HSS_PAYLOAD_GENERATOR_PRE_BUILD_HOOKS += HOST_HSS_PAYLOAD_GENERATOR_COPY_DTB + +endif diff --git a/overlays/keystone/package/keystone-examples/keystone-examples.mk b/overlays/keystone/package/keystone-examples/keystone-examples.mk index bc26edc6c..a0ad2a35b 100644 --- a/overlays/keystone/package/keystone-examples/keystone-examples.mk +++ b/overlays/keystone/package/keystone-examples/keystone-examples.mk @@ -10,7 +10,14 @@ else include $(KEYSTONE)/mkutils/pkg-keystone.mk endif -KEYSTONE_EXAMPLES_DEPENDENCIES += host-keystone-sdk keystone-runtime opensbi +KEYSTONE_EXAMPLES_DEPENDENCIES += host-keystone-sdk keystone-runtime +ifeq ($(KEYSTONE_PLATFORM),mpfs) +KEYSTONE_EXAMPLES_DEPENDENCIES += hss +KEYSTONE_EXAMPLES_CONF_OPTS += -Dfw_bin=$(BINARIES_DIR)/hss-l2scratch.bin +else +KEYSTONE_EXAMPLES_DEPENDENCIES += opensbi +endif + KEYSTONE_EXAMPLES_CONF_OPTS += -DKEYSTONE_SDK_DIR=$(HOST_DIR)/usr/share/keystone/sdk \ -DKEYSTONE_EYRIE_RUNTIME=$(KEYSTONE_RUNTIME_BUILDDIR) \ -DKEYSTONE_BITS=${KEYSTONE_BITS} diff --git a/overlays/microchip b/overlays/microchip new file mode 160000 index 000000000..132d25d51 --- /dev/null +++ b/overlays/microchip @@ -0,0 +1 @@ +Subproject commit 132d25d51d6b9d14ae59f949c769e0e1a53101c5 diff --git a/scripts/gdb/mpfs.cfg b/scripts/gdb/mpfs.cfg new file mode 100644 index 000000000..22f51f0f9 --- /dev/null +++ b/scripts/gdb/mpfs.cfg @@ -0,0 +1,20 @@ +target remote :3333 + +python +import os + +builddir = os.environ['BUILDROOT_BUILDDIR'] + '/build' +imagedir = os.environ['BUILDROOT_BUILDDIR'] + '/images' + +gdb.execute(f'add-symbol-file {builddir}/hss-v2023.06/Default/hss-l2scratch.elf') +gdb.execute(f'add-symbol-file {builddir}/linux-custom/vmlinux') +gdb.execute(f'add-symbol-file {builddir}/uboot-linux4microchip+fpga-2023.02/u-boot') +gdb.execute(f'source {builddir}/linux-custom/vmlinux-gdb.py') + +# Add pretty printers +gdb.execute(f'source {builddir}/host-gcc-final-11.4.0/build/riscv64-buildroot-linux-gnu/libstdc++-v3/python/gdb.py') + +end + +# Force hardware breakpoints +mem 0 0 ro From 2c151a90471ce94505c89fb0d36e91e28e1ee2ad Mon Sep 17 00:00:00 2001 From: Gregor Haas Date: Tue, 19 Dec 2023 17:02:28 -0800 Subject: [PATCH 05/14] Add functionality for network over USB --- overlays/keystone/board/mpfs/post-build.sh | 11 +++++++++++ .../keystone/board/mpfs/uboot-fragment-rootfs.config | 2 +- overlays/keystone/configs/linux64-mpfs-defconfig | 3 +++ overlays/keystone/configs/riscv64_mpfs_defconfig | 2 +- 4 files changed, 16 insertions(+), 2 deletions(-) create mode 100755 overlays/keystone/board/mpfs/post-build.sh diff --git a/overlays/keystone/board/mpfs/post-build.sh b/overlays/keystone/board/mpfs/post-build.sh new file mode 100755 index 000000000..705142a36 --- /dev/null +++ b/overlays/keystone/board/mpfs/post-build.sh @@ -0,0 +1,11 @@ +#!/bin/sh + +# Add usb network interface + +cat <> $TARGET_DIR/etc/network/interfaces + +auto usb0 +iface usb0 inet dhcp + pre-up /etc/network/nfs_check + +EOF diff --git a/overlays/keystone/board/mpfs/uboot-fragment-rootfs.config b/overlays/keystone/board/mpfs/uboot-fragment-rootfs.config index bcbc0cc19..9e970d8f9 100644 --- a/overlays/keystone/board/mpfs/uboot-fragment-rootfs.config +++ b/overlays/keystone/board/mpfs/uboot-fragment-rootfs.config @@ -1,3 +1,3 @@ CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="earlycon root=/dev/mmcblk0p3 rootwait uio_pdrv_genirq.of_id=generic-uio cma=128M@0x98000000" +CONFIG_BOOTARGS="earlycon root=/dev/mmcblk0p3 rootwait uio_pdrv_genirq.of_id=generic-uio cma=128M@0x98000000 g_ether.host_addr=de:ad:be:ef:de:ad g_ether.dev_addr=de:ad:ca:fe:d0:0d" CONFIG_MPFS_PRIORITISE_QSPI_BOOT=n diff --git a/overlays/keystone/configs/linux64-mpfs-defconfig b/overlays/keystone/configs/linux64-mpfs-defconfig index eef81cd33..1d32e5a29 100644 --- a/overlays/keystone/configs/linux64-mpfs-defconfig +++ b/overlays/keystone/configs/linux64-mpfs-defconfig @@ -85,10 +85,13 @@ CONFIG_USB_OHCI_HCD_PLATFORM=y CONFIG_USB_ACM=m CONFIG_USB_STORAGE=m CONFIG_USB_MUSB_HDRC=y +CONFIG_USB_MUSB_GADGET=y CONFIG_USB_MUSB_POLARFIRE_SOC=y CONFIG_USB_INVENTRA_DMA=y CONFIG_USB_SERIAL=m CONFIG_NOP_USB_XCEIV=y +CONFIG_USB_GADGET=y +CONFIG_USB_ETH=y CONFIG_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_PLTFM=y diff --git a/overlays/keystone/configs/riscv64_mpfs_defconfig b/overlays/keystone/configs/riscv64_mpfs_defconfig index aca2fbd8f..f1425edcb 100644 --- a/overlays/keystone/configs/riscv64_mpfs_defconfig +++ b/overlays/keystone/configs/riscv64_mpfs_defconfig @@ -17,7 +17,7 @@ BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_KEYSTONE_PATH)/patches $(BR2_EXTERNAL_KEYST BR2_PER_PACKAGE_DIRECTORIES=y BR2_SSP_NONE=y BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_MDEV=y -BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_MCHP_PATH)/board/microchip/icicle/post-build.sh" +BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_MCHP_PATH)/board/microchip/icicle/post-build.sh $(BR2_EXTERNAL_KEYSTONE_PATH)/board/mpfs/post-build.sh" BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_MCHP_PATH)/board/microchip/icicle/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_MCHP_PATH)/board/microchip/icicle/genimage_rootfs.cfg" BR2_LINUX_KERNEL=y From d7dc8072e10214f19df7187de40d80aa8d96c736 Mon Sep 17 00:00:00 2001 From: Gregor Haas Date: Thu, 28 Dec 2023 20:21:26 -0800 Subject: [PATCH 06/14] Integrate MPFS into CI --- .github/workflows/build-runtime.yml | 5 +- .github/workflows/main.yml | 11 +- .github/workflows/test-system.yml | 137 +++++++++++++++++- .../Continuous-Integration/Custom-Runner.rst | 42 ++++++ docs/source/index.rst | 6 + mkutils/plat/mpfs/run.mk | 8 + 6 files changed, 205 insertions(+), 4 deletions(-) create mode 100644 docs/source/Continuous-Integration/Custom-Runner.rst diff --git a/.github/workflows/build-runtime.yml b/.github/workflows/build-runtime.yml index d33c4ab07..e23fe190a 100644 --- a/.github/workflows/build-runtime.yml +++ b/.github/workflows/build-runtime.yml @@ -7,12 +7,15 @@ jobs: runs-on: ubuntu-latest strategy: matrix: - platform: [generic, hifive_unmatched, cva6] + platform: [generic, hifive_unmatched, cva6, mpfs] bits: [32, 64] exclude: # unmatched is not 32 bit - platform: hifive_unmatched bits: 32 + # mpfs is not 32 bit + - platform: mpfs + bits: 32 steps: # We don't need submodules here since Keystone is a monorepo! diff --git a/.github/workflows/main.yml b/.github/workflows/main.yml index e818b9a42..410704c2f 100644 --- a/.github/workflows/main.yml +++ b/.github/workflows/main.yml @@ -14,12 +14,15 @@ jobs: # platform that we support here strategy: matrix: - platform: [generic, hifive_unmatched, cva6] + platform: [generic, hifive_unmatched, cva6, mpfs] bits: [32, 64] exclude: # unmatched is not 32 bit - platform: hifive_unmatched bits: 32 + # mpfs is not 32 bit + - platform: mpfs + bits: 32 # Output cache keys that were used so we can consolidate them later. Note # that this is a matrix job, and job outputs for these are not well supported @@ -142,6 +145,10 @@ jobs: # Needed by end-to-end tests COMPRESSDIRS="$COMPRESSDIRS $BASEDIR/target/root/" + if [[ "${{ matrix.platform }}" == "mpfs" ]]; then + COMPRESSDIRS="$COMPRESSDIRS $BASEDIR/build/hss-v2023.06" + fi + tar -cf - $COMPRESSDIRS | xz -9 -T0 > build.tar.xz - name: Compress cache directories @@ -343,7 +350,7 @@ jobs: needs: build uses: ./.github/workflows/build-runtime.yml - # System tests, which are run for simulatable platforms + # System tests, which are run for simulatable and self-hostable platforms test-system: needs: build uses: ./.github/workflows/test-system.yml diff --git a/.github/workflows/test-system.yml b/.github/workflows/test-system.yml index 097d5605d..9078a8190 100644 --- a/.github/workflows/test-system.yml +++ b/.github/workflows/test-system.yml @@ -3,7 +3,7 @@ on: workflow_call: jobs: - test-system: + test-generic: runs-on: ubuntu-latest strategy: matrix: @@ -65,3 +65,138 @@ jobs: with: name: test-keystone-${{ matrix.platform }}${{ matrix.bits }}-cmd.log path: cmd.log + + test-mpfs: + runs-on: [self-hosted, mpfs] + environment: track + steps: + # We don't need submodules here since Keystone is a monorepo! + - name: Checkout Keystone + uses: actions/checkout@v3 + with: + submodules: 'false' + + - name: Restore build directory + uses: actions/download-artifact@v4 + with: + name: keystone-mpfs64-builddir + path: . + + - name: Decompress build directory + run: cat build.tar.xz | xz -d -T0 | tar -xf - + + # Test the firmware, first by flashing it + - name: Flash HSS + env: + POWER_ON_CMD: ${{ vars.POWER_ON_CMD_MPFS }} + POWER_OFF_CMD: ${{ vars.POWER_OFF_CMD_MPFS }} + SC_INSTALL_DIR: ${{ vars.SC_INSTALL_DIR }} + run: | + $POWER_ON_CMD + export FPGENPROG=$(which fpgenprog) + make -C build-mpfs64/buildroot.build/build/hss-v2023.06 program 2>/dev/null >program.log + $POWER_OFF_CMD + + # Check if we succeeded + [[ ! -z $(cat program.log | grep "mpfsBootmodeProgrammer completed successfully") ]] + + - name: Upload HSS program log + if: failure() + uses: actions/upload-artifact@v4 + with: + name: test-keystone-mpfs64-prog-hss.log + path: program.log + + # And then verifying that we can actually get to the command line + - name: Check HSS ok + env: + POWER_ON_CMD: ${{ vars.POWER_ON_CMD_MPFS }} + POWER_OFF_CMD: ${{ vars.POWER_OFF_CMD_MPFS }} + FIND_TTY_CMD: ${{ vars.FIND_TTY_CMD }} + run: | + # Collect serial output + TTYDEV=$($FIND_TTY_CMD 0) + screen -L -dmS mpfs-tty bash -c "stty raw -echo 115200 < $TTYDEV ; cat $TTYDEV > run-hss.log" + $POWER_ON_CMD ; sleep 30 ; $POWER_OFF_CMD + screen -XS mpfs-tty quit + + # At least the first hart should have started + [[ ! -z $(cat run-hss.log | sed -e 's/\x1b\[[0-9;]*m//g' | grep "u54 State Change: \[Running\]") ]] + + - name: Upload HSS run log + if: failure() + uses: actions/upload-artifact@v4 + with: + name: test-keystone-mpfs64-run-hss.log + path: run-hss.log + + # Now we also need to flash the disk. First, get into usbdmsc + - name: Flash OS + env: + POWER_ON_CMD: ${{ vars.POWER_ON_CMD_MPFS }} + POWER_OFF_CMD: ${{ vars.POWER_OFF_CMD_MPFS }} + FIND_TTY_CMD: ${{ vars.FIND_TTY_CMD }} + run: | + # Wait for the board to come up a bit. We'll hammer it with serial + # input to ensure that we halt the boot at HSS + TTYDEV=$($FIND_TTY_CMD 0) + $POWER_ON_CMD + NOW=$(date +%s) + stty raw -echo 115200 < "$TTYDEV" + while [[ $(( $(date +%s) - $NOW )) -lt 10 ]]; do echo 'a' > "$TTYDEV" ; done + + echo "" > "$TTYDEV" + echo "usbdmsc" > "$TTYDEV" + + # Wait a bit for the USB to connect then flash + sleep 10 + dd if=build-mpfs64/buildroot.build/images/sdcard.img of=/dev/sda bs=4M oflag=direct + $POWER_OFF_CMD + + - name: Test Keystone system + env: + POWER_ON_CMD: ${{ vars.POWER_ON_CMD_MPFS }} + POWER_OFF_CMD: ${{ vars.POWER_OFF_CMD_MPFS }} + FIND_TTY_CMD: ${{ vars.FIND_TTY_CMD }} + KEYSTONE_IP: ${{ vars.BOARD_IP_MPFS }} + run: | + # Fix permissions on the key + chmod 600 build-mpfs64/buildroot.build/target/root/.ssh/id-rsa + + # Start the board + TTYDEV=$($FIND_TTY_CMD 1) + export KEYSTONE_PLATFORM=mpfs + export KEYSTONE_BITS=64 + screen -L -dmS mpfs-tty bash -c "stty raw -echo 115200 < $TTYDEV ; cat $TTYDEV > run.log" + $POWER_ON_CMD + + # TODO: check for connectivity instead of sleeping + sleep 60 + + export CALL_LOGFILE=cmd.log + echo "" > $CALL_LOGFILE + + KEYSTONE_COMMAND="modprobe keystone-driver" make call + KEYSTONE_COMMAND="/usr/share/keystone/examples/tests.ke" make call + KEYSTONE_COMMAND="/usr/share/keystone/examples/attestor.ke" make call + + $POWER_OFF_CMD + screen -XS mpfs-tty quit + + - name: Check expected + run: | + [[ -z $(diff cmd.log scripts/ci/expected.log) ]] + + - name: Upload run log + if: failure() + uses: actions/upload-artifact@v4 + with: + name: test-keystone-mpfs64-run.log + path: run.log + + - name: Upload cmd log + if: failure() + uses: actions/upload-artifact@v4 + with: + name: test-keystone-mpfs64-cmd.log + path: cmd.log diff --git a/docs/source/Continuous-Integration/Custom-Runner.rst b/docs/source/Continuous-Integration/Custom-Runner.rst new file mode 100644 index 000000000..214404279 --- /dev/null +++ b/docs/source/Continuous-Integration/Custom-Runner.rst @@ -0,0 +1,42 @@ +Custom CI Runner +=========== + +We have created a custom CI runner set up with real RISC-V hardware so that we +can run CI tests even on platforms that don't have a good QEMU-based simulator. +This document details how this runner was setup so that it can be replicated or +extended with future hardware platforms. + +Setup +----------------- + +On the machine which has the RISC-V board connected, first create a new user and +assign them to any groups they will need in order to talk to the hardware. + +.. code-block:: bash + + sudo adduser runner + sudo usermod -aG disks runner + sudo usermod -aG dialout runner + ... + # To allow user systemd units to run even when user is not logged in + sudo loginctl enable-linger runner + +Then, login as that user and follow `these `_ +instructions for creating a new custom runner. When setting up the custom runner, +you will want to add any tags as necessary to describe the hardware that this +runner has access to. Then, optionally (but recommended), create a new systemd +unit file to automatically start the runner on machine boot. + +.. code-block:: bash + + mkdir -p /home/runner/.config/systemd/user + cat < /home/runner/.config/systemd/user/runner.service + [Service] + ExecStart=/home/runner/actions-runner/run.sh + + [Install] + WantedBy=default.target + EOF + + systemctl --user enable runner + systemctl --user start runner diff --git a/docs/source/index.rst b/docs/source/index.rst index 744dd5ebf..7a9eb2837 100644 --- a/docs/source/index.rst +++ b/docs/source/index.rst @@ -56,6 +56,12 @@ Welcome to Keystone Enclave's documentation! Security-Monitor/index +.. toctree:: + :maxdepth: 1 + :caption: Continuous Integration + :numbered: + + Continuous-Integration/Custom-Runner .. toctree:: :maxdepth: 1 diff --git a/mkutils/plat/mpfs/run.mk b/mkutils/plat/mpfs/run.mk index 0674a3491..8b81a0ad7 100644 --- a/mkutils/plat/mpfs/run.mk +++ b/mkutils/plat/mpfs/run.mk @@ -18,6 +18,14 @@ run: $(call log,info,Starting OpenOCD) $(SC_INSTALL_DIR)/openocd/bin/openocd $(OPENOCD_FLAGS) +CALL_LOGFILE ?= $(shell mktemp) +call: + $(call log,info,Calling command in QEMU) + ssh -i $(BUILDROOT_BUILDDIR)/target/root/.ssh/id-rsa \ + -o StrictHostKeyChecking=no -o UserKnownHostsFile=/dev/null \ + root@$(KEYSTONE_IP) $(KEYSTONE_COMMAND) 2>&1 | \ + grep -v "Warning: Permanently added" | tee -a $(CALL_LOGFILE) + debug-connect: $(call log,info,Connecting to OpenOCD) PYTHONPATH=$(BUILDROOT_BUILDDIR)/build/host-gcc-final-11.4.0/libstdc++-v3/python \ From 0f9ce3873138069667fc479ac29207a5ce752fb3 Mon Sep 17 00:00:00 2001 From: Gregor Haas Date: Sat, 30 Dec 2023 17:23:59 -0800 Subject: [PATCH 07/14] Disable attestation test since this does not yet work on mpfs --- .github/workflows/test-system.yml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/.github/workflows/test-system.yml b/.github/workflows/test-system.yml index 9078a8190..364a3388d 100644 --- a/.github/workflows/test-system.yml +++ b/.github/workflows/test-system.yml @@ -178,7 +178,8 @@ jobs: KEYSTONE_COMMAND="modprobe keystone-driver" make call KEYSTONE_COMMAND="/usr/share/keystone/examples/tests.ke" make call - KEYSTONE_COMMAND="/usr/share/keystone/examples/attestor.ke" make call + # Todo: attestation does not yet work in mpfs + #KEYSTONE_COMMAND="/usr/share/keystone/examples/attestor.ke" make call $POWER_OFF_CMD screen -XS mpfs-tty quit From b72f6675e816b3d867fbe71f4752e97e287bfec0 Mon Sep 17 00:00:00 2001 From: Gregor Haas Date: Sat, 13 Jan 2024 13:43:40 -0800 Subject: [PATCH 08/14] regularize configs --- .../keystone/configs/riscv32_cva6_defconfig | 18 +++++++----------- .../keystone/configs/riscv64_cva6_defconfig | 15 ++++++--------- .../keystone/configs/riscv64_mpfs_defconfig | 2 -- 3 files changed, 13 insertions(+), 22 deletions(-) diff --git a/overlays/keystone/configs/riscv32_cva6_defconfig b/overlays/keystone/configs/riscv32_cva6_defconfig index 7d8c90317..fe591c128 100644 --- a/overlays/keystone/configs/riscv32_cva6_defconfig +++ b/overlays/keystone/configs/riscv32_cva6_defconfig @@ -1,36 +1,32 @@ BR2_riscv=y -BR2_RISCV_32=y BR2_riscv_custom=y BR2_RISCV_ISA_CUSTOM_RVM=y -BR2_RISCV_ABI_ILP32=y +BR2_RISCV_32=y BR2_TOOLCHAIN_BUILDROOT_CXX=y BR2_PACKAGE_HOST_GDB=y BR2_PACKAGE_HOST_GDB_TUI=y BR2_PACKAGE_HOST_GDB_PYTHON3=y BR2_CCACHE=y -BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_KEYSTONE_PATH)/patches $(BR2_EXTERNAL_KEYSTONE_PATH)/board/cva6/patches" +BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_KEYSTONE_PATH)/patches $(BR2_EXTERNAL_KEYSTONE_PATH)/board/cva6/patches" BR2_PER_PACKAGE_DIRECTORIES=y BR2_SSP_NONE=y BR2_TARGET_GENERIC_ROOT_PASSWD="sifive" -BR2_SYSTEM_BIN_SH_BASH=y BR2_SYSTEM_DHCP="eth0" -BR2_ROOTFS_OVERLAY="/invalid" BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_KEYSTONE_PATH)/board/cva6/post-build.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_KEYSTONE_PATH)/board/cva6/configs/linux32-cva6-defconfig" BR2_PACKAGE_BUSYBOX_CONFIG="$(BR2_EXTERNAL_KEYSTONE_PATH)/board/cva6/configs/busybox32-cva6.config" BR2_PACKAGE_DROPBEAR=y -BR2_TARGET_ROOTFS_INITRAMFS=y BR2_TARGET_ROOTFS_EXT2=y +BR2_TARGET_ROOTFS_INITRAMFS=y +BR2_TARGET_OPENSBI=y BR2_TARGET_OPENSBI_CUSTOM_VERSION=y BR2_TARGET_OPENSBI_CUSTOM_VERSION_VALUE="1.1" BR2_TARGET_OPENSBI_PLAT="fpga/ariane" -BR2_TARGET_OPENSBI_INSTALL_JUMP_IMG=n -BR2_TARGET_OPENSBI_INSTALL_DYNAMIC_IMG=n -BR2_TARGET_OPENSBI_LINUX_PAYLOAD=y -BR2_TARGET_OPENSBI_INSTALL_PAYLOAD_IMG=y -BR2_TARGET_KEYSTONE_BOOTROM=n +# BR2_TARGET_OPENSBI_INSTALL_DYNAMIC_IMG is not set +# BR2_TARGET_OPENSBI_INSTALL_JUMP_IMG is not set +BR2_TARGET_OPENSBI_LINUX_PAYLOAD=y BR2_TARGET_KEYSTONE_SM=y BR2_PACKAGE_KEYSTONE_DRIVER=y BR2_PACKAGE_HOST_KEYSTONE_SDK=y diff --git a/overlays/keystone/configs/riscv64_cva6_defconfig b/overlays/keystone/configs/riscv64_cva6_defconfig index 538ddb064..cbea16b7a 100644 --- a/overlays/keystone/configs/riscv64_cva6_defconfig +++ b/overlays/keystone/configs/riscv64_cva6_defconfig @@ -1,33 +1,30 @@ BR2_riscv=y -BR2_TOOLCHAIN_BUILDROOT_GLIBC=y BR2_TOOLCHAIN_BUILDROOT_CXX=y BR2_PACKAGE_HOST_GDB=y BR2_PACKAGE_HOST_GDB_TUI=y BR2_PACKAGE_HOST_GDB_PYTHON3=y BR2_CCACHE=y -BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_KEYSTONE_PATH)/patches $(BR2_EXTERNAL_KEYSTONE_PATH)/board/cva6/patches" +BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_KEYSTONE_PATH)/patches $(BR2_EXTERNAL_KEYSTONE_PATH)/board/cva6/patches" BR2_PER_PACKAGE_DIRECTORIES=y BR2_SSP_NONE=y BR2_TARGET_GENERIC_ROOT_PASSWD="sifive" BR2_SYSTEM_BIN_SH_BASH=y BR2_SYSTEM_DHCP="eth0" -BR2_ROOTFS_OVERLAY="/invalid" +BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_KEYSTONE_PATH)/board/cva6/post-build.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y -BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_KEYSTONE_PATH)/board/cva6/post-build.sh" BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_KEYSTONE_PATH)/board/cva6/configs/linux64-cva6-defconfig" BR2_PACKAGE_BUSYBOX_SHOW_OTHERS=y BR2_PACKAGE_DROPBEAR=y -BR2_TARGET_ROOTFS_INITRAMFS=y BR2_TARGET_ROOTFS_EXT2=y +BR2_TARGET_ROOTFS_INITRAMFS=y +BR2_TARGET_OPENSBI=y BR2_TARGET_OPENSBI_CUSTOM_VERSION=y BR2_TARGET_OPENSBI_CUSTOM_VERSION_VALUE="1.1" BR2_TARGET_OPENSBI_PLAT="fpga/ariane" -BR2_TARGET_OPENSBI_INSTALL_JUMP_IMG=n -BR2_TARGET_OPENSBI_INSTALL_DYNAMIC_IMG=n +# BR2_TARGET_OPENSBI_INSTALL_DYNAMIC_IMG is not set +# BR2_TARGET_OPENSBI_INSTALL_JUMP_IMG is not set BR2_TARGET_OPENSBI_LINUX_PAYLOAD=y -BR2_TARGET_OPENSBI_INSTALL_PAYLOAD_IMG=y -BR2_TARGET_KEYSTONE_BOOTROM=n BR2_TARGET_KEYSTONE_SM=y BR2_PACKAGE_KEYSTONE_DRIVER=y BR2_PACKAGE_HOST_KEYSTONE_SDK=y diff --git a/overlays/keystone/configs/riscv64_mpfs_defconfig b/overlays/keystone/configs/riscv64_mpfs_defconfig index f1425edcb..9fd1084e3 100644 --- a/overlays/keystone/configs/riscv64_mpfs_defconfig +++ b/overlays/keystone/configs/riscv64_mpfs_defconfig @@ -101,8 +101,6 @@ BR2_PACKAGE_HOST_HSS_PAYLOAD_GENERATOR_CFG="$(BR2_EXTERNAL_KEYSTONE_PATH)/board/ BR2_PACKAGE_HOST_HSS_PAYLOAD_GENERATOR_SRC="$(BINARIES_DIR)/u-boot.bin" BR2_TARGET_KEYSTONE_SM=y BR2_TARGET_HSS=y -BR2_TARGET_HSS_SC_INSTALL_DIR="/opt/microchip/SoftConsole-v2022.2-RISC-V-747/" -BR2_TARGET_HSS_FPGENPROG="/home/grg/.local/bin/fpgenprog" BR2_PACKAGE_KEYSTONE_DRIVER=y BR2_PACKAGE_HOST_KEYSTONE_SDK=y BR2_PACKAGE_KEYSTONE_RUNTIME=y From 2b0905b03b84a5dae13050ec42fe1ccbdbfb0aad Mon Sep 17 00:00:00 2001 From: Gregor Haas Date: Sat, 13 Jan 2024 16:15:26 -0800 Subject: [PATCH 09/14] empty From b6f5be942b80a46470e705887beb3813160d5a0c Mon Sep 17 00:00:00 2001 From: Gregor Haas Date: Sat, 13 Jan 2024 17:05:29 -0800 Subject: [PATCH 10/14] randomize qemu port for tests --- .github/workflows/test-system.yml | 1 + mkutils/plat/generic/run.mk | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/.github/workflows/test-system.yml b/.github/workflows/test-system.yml index 364a3388d..f7a8b6678 100644 --- a/.github/workflows/test-system.yml +++ b/.github/workflows/test-system.yml @@ -34,6 +34,7 @@ jobs: # Launch QEMU export KEYSTONE_PLATFORM=${{ matrix.platform }} export KEYSTONE_BITS=${{ matrix.bits }} + export QEMU_PORT=$(( RANDOM + 1024 )) export LD_LIBRARY_PATH=build-${{ matrix.platform }}${{ matrix.bits }}/buildroot.build/host/lib screen -L -dmS qemu bash -c "make run 2>&1 | tee run.log" diff --git a/mkutils/plat/generic/run.mk b/mkutils/plat/generic/run.mk index 45db1bb5e..f1c113f58 100644 --- a/mkutils/plat/generic/run.mk +++ b/mkutils/plat/generic/run.mk @@ -17,7 +17,7 @@ QEMU_FLAGS := -m $(QEMU_MEM) -smp $(QEMU_SMP) -nographic \ -drive file=$(BUILDROOT_BUILDDIR)/images/rootfs.ext2,format=raw,id=hd0 \ -device virtio-blk-device,drive=hd0 \ -append "console=ttyS0 ro root=/dev/vda" \ - -netdev user,id=net0,net=192.168.100.1/24,dhcpstart=192.168.100.128,hostfwd=tcp::9821-:22 \ + -netdev user,id=net0,net=192.168.100.1/24,dhcpstart=192.168.100.128,hostfwd=tcp::$(QEMU_PORT)-:22 \ -device virtio-net-device,netdev=net0 \ -device virtio-rng-pci \ From fbc9fa5e1eba7403f621a8dcf2287d6f6a38f262 Mon Sep 17 00:00:00 2001 From: Gregor Haas Date: Sat, 13 Jan 2024 18:12:56 -0800 Subject: [PATCH 11/14] Fix caching --- .github/workflows/main.yml | 4 +++- overlays/keystone/configs/riscv32_cva6_defconfig | 1 + overlays/keystone/configs/riscv32_generic_defconfig | 1 + overlays/keystone/configs/riscv64_cva6_defconfig | 1 + overlays/keystone/configs/riscv64_generic_defconfig | 1 + overlays/keystone/configs/riscv64_hifive_unmatched_defconfig | 1 + overlays/keystone/configs/riscv64_mpfs_defconfig | 1 + 7 files changed, 9 insertions(+), 1 deletion(-) diff --git a/.github/workflows/main.yml b/.github/workflows/main.yml index 410704c2f..097f13a02 100644 --- a/.github/workflows/main.yml +++ b/.github/workflows/main.yml @@ -162,7 +162,9 @@ jobs: fi if [[ $(du -s buildroot-ccache | awk -F' ' '{ print $1 }') -gt 4 ]]; then - tar -cf - buildroot-ccache | xz -9 -T0 > ccache.tar.xz + # Ignore character device files, which are used as "whiteouts" in overlayfs + find buildroot-ccache -type f -not -type c -print0 | \ + tar --null -cf - -T - | xz -9 -T0 > ccache.tar.xz fi - name: Upload build directory diff --git a/overlays/keystone/configs/riscv32_cva6_defconfig b/overlays/keystone/configs/riscv32_cva6_defconfig index fe591c128..adfbf74e3 100644 --- a/overlays/keystone/configs/riscv32_cva6_defconfig +++ b/overlays/keystone/configs/riscv32_cva6_defconfig @@ -7,6 +7,7 @@ BR2_PACKAGE_HOST_GDB=y BR2_PACKAGE_HOST_GDB_TUI=y BR2_PACKAGE_HOST_GDB_PYTHON3=y BR2_CCACHE=y +BR2_CCACHE_INITIAL_SETUP="-M0 -F0" BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_KEYSTONE_PATH)/patches $(BR2_EXTERNAL_KEYSTONE_PATH)/board/cva6/patches" BR2_PER_PACKAGE_DIRECTORIES=y BR2_SSP_NONE=y diff --git a/overlays/keystone/configs/riscv32_generic_defconfig b/overlays/keystone/configs/riscv32_generic_defconfig index d1a6325fb..6847b4a22 100644 --- a/overlays/keystone/configs/riscv32_generic_defconfig +++ b/overlays/keystone/configs/riscv32_generic_defconfig @@ -5,6 +5,7 @@ BR2_PACKAGE_HOST_GDB=y BR2_PACKAGE_HOST_GDB_TUI=y BR2_PACKAGE_HOST_GDB_PYTHON3=y BR2_CCACHE=y +BR2_CCACHE_INITIAL_SETUP="-M0 -F0" BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_KEYSTONE_PATH)/patches" BR2_PER_PACKAGE_DIRECTORIES=y BR2_SSP_NONE=y diff --git a/overlays/keystone/configs/riscv64_cva6_defconfig b/overlays/keystone/configs/riscv64_cva6_defconfig index cbea16b7a..44758e4ea 100644 --- a/overlays/keystone/configs/riscv64_cva6_defconfig +++ b/overlays/keystone/configs/riscv64_cva6_defconfig @@ -4,6 +4,7 @@ BR2_PACKAGE_HOST_GDB=y BR2_PACKAGE_HOST_GDB_TUI=y BR2_PACKAGE_HOST_GDB_PYTHON3=y BR2_CCACHE=y +BR2_CCACHE_INITIAL_SETUP="-M0 -F0" BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_KEYSTONE_PATH)/patches $(BR2_EXTERNAL_KEYSTONE_PATH)/board/cva6/patches" BR2_PER_PACKAGE_DIRECTORIES=y BR2_SSP_NONE=y diff --git a/overlays/keystone/configs/riscv64_generic_defconfig b/overlays/keystone/configs/riscv64_generic_defconfig index 4ccf9a9c3..89e02f35b 100644 --- a/overlays/keystone/configs/riscv64_generic_defconfig +++ b/overlays/keystone/configs/riscv64_generic_defconfig @@ -5,6 +5,7 @@ BR2_PACKAGE_HOST_GDB=y BR2_PACKAGE_HOST_GDB_TUI=y BR2_PACKAGE_HOST_GDB_PYTHON3=y BR2_CCACHE=y +BR2_CCACHE_INITIAL_SETUP="-M0 -F0" BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_KEYSTONE_PATH)/patches" BR2_PER_PACKAGE_DIRECTORIES=y BR2_SSP_NONE=y diff --git a/overlays/keystone/configs/riscv64_hifive_unmatched_defconfig b/overlays/keystone/configs/riscv64_hifive_unmatched_defconfig index b7547e5fd..8883a9e00 100644 --- a/overlays/keystone/configs/riscv64_hifive_unmatched_defconfig +++ b/overlays/keystone/configs/riscv64_hifive_unmatched_defconfig @@ -1,6 +1,7 @@ BR2_riscv=y BR2_TOOLCHAIN_BUILDROOT_CXX=y BR2_CCACHE=y +BR2_CCACHE_INITIAL_SETUP="-M0 -F0" BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_KEYSTONE_PATH)/patches $(BR2_EXTERNAL_KEYSTONE_PATH)/board/sifive/hifive-unmatched/patches" BR2_PER_PACKAGE_DIRECTORIES=y BR2_SSP_NONE=y diff --git a/overlays/keystone/configs/riscv64_mpfs_defconfig b/overlays/keystone/configs/riscv64_mpfs_defconfig index 9fd1084e3..91c63309d 100644 --- a/overlays/keystone/configs/riscv64_mpfs_defconfig +++ b/overlays/keystone/configs/riscv64_mpfs_defconfig @@ -13,6 +13,7 @@ BR2_TOOLCHAIN_BUILDROOT_CXX=y BR2_PACKAGE_HOST_GDB=y BR2_PACKAGE_HOST_GDB_PYTHON3=y BR2_CCACHE=y +BR2_CCACHE_INITIAL_SETUP="-M0 -F0" BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_KEYSTONE_PATH)/patches $(BR2_EXTERNAL_KEYSTONE_PATH)/board/mpfs/patches" BR2_PER_PACKAGE_DIRECTORIES=y BR2_SSP_NONE=y From 8ce45bf49814800b6b8af55b39b2b2ed0a73a3a5 Mon Sep 17 00:00:00 2001 From: Gregor Haas Date: Sat, 13 Jan 2024 20:49:28 -0800 Subject: [PATCH 12/14] compare against a different log for mpfs for now --- .github/workflows/test-system.yml | 2 +- scripts/ci/expected-mpfs.log | 18 ++++++++++++++++++ 2 files changed, 19 insertions(+), 1 deletion(-) create mode 100644 scripts/ci/expected-mpfs.log diff --git a/.github/workflows/test-system.yml b/.github/workflows/test-system.yml index f7a8b6678..c46344867 100644 --- a/.github/workflows/test-system.yml +++ b/.github/workflows/test-system.yml @@ -187,7 +187,7 @@ jobs: - name: Check expected run: | - [[ -z $(diff cmd.log scripts/ci/expected.log) ]] + [[ -z $(diff cmd.log scripts/ci/expected-mpfs.log) ]] - name: Upload run log if: failure() diff --git a/scripts/ci/expected-mpfs.log b/scripts/ci/expected-mpfs.log new file mode 100644 index 000000000..a9ef4c0d4 --- /dev/null +++ b/scripts/ci/expected-mpfs.log @@ -0,0 +1,18 @@ + +Verifying archive integrity... MD5 checksums are OK. All good. +Uncompressing Keystone Enclave Package +testing test-stack +testing test-loop +testing test-malloc +testing test-long-nop +testing test-fibonacci +testing test-fib-bench +testing test-attestation +Attestation report is invalid +testing test-untrusted +Enclave said: hello world! +Enclave said: 2nd hello world! +Enclave said value: 13 +Enclave said value: 20 +testing test-data-sealing +Enclave said: Sealing key derivation successful! From d1d038f6eb170b94216ddb8705bb513348ac7355 Mon Sep 17 00:00:00 2001 From: Gregor Haas Date: Sun, 14 Jan 2024 11:55:14 -0800 Subject: [PATCH 13/14] discover mpfs flash device rather than hardcoding --- .github/workflows/test-system.yml | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/.github/workflows/test-system.yml b/.github/workflows/test-system.yml index c46344867..5deebf1fe 100644 --- a/.github/workflows/test-system.yml +++ b/.github/workflows/test-system.yml @@ -151,8 +151,17 @@ jobs: # Wait a bit for the USB to connect then flash sleep 10 - dd if=build-mpfs64/buildroot.build/images/sdcard.img of=/dev/sda bs=4M oflag=direct + FOUND_DEVICE="" + for d in /dev/sd? ; do + if [[ ! -z $(udevadm info --query=all -n "$d" | grep -i polarfire) ]]; then + FOUND_DEVICE="yes" + dd if=build-mpfs64/buildroot.build/images/sdcard.img of="$d" bs=4M oflag=direct + break + fi + done + $POWER_OFF_CMD + [[ ! -z "$FOUND_DEVICE" ]] - name: Test Keystone system env: From f6c91176d3a9dac6e1f2929541c323768275f97c Mon Sep 17 00:00:00 2001 From: Gregor Haas Date: Thu, 25 Jan 2024 12:42:29 -0800 Subject: [PATCH 14/14] Bump github action versions --- .github/workflows/build-runtime.yml | 2 +- .github/workflows/main.yml | 18 +++++++++--------- .github/workflows/test-system.yml | 4 ++-- Makefile | 2 +- 4 files changed, 13 insertions(+), 13 deletions(-) diff --git a/.github/workflows/build-runtime.yml b/.github/workflows/build-runtime.yml index e23fe190a..f12fbb548 100644 --- a/.github/workflows/build-runtime.yml +++ b/.github/workflows/build-runtime.yml @@ -20,7 +20,7 @@ jobs: steps: # We don't need submodules here since Keystone is a monorepo! - name: Checkout Keystone - uses: actions/checkout@v3 + uses: actions/checkout@v4 with: submodules: 'false' diff --git a/.github/workflows/main.yml b/.github/workflows/main.yml index 097f13a02..06224bdab 100644 --- a/.github/workflows/main.yml +++ b/.github/workflows/main.yml @@ -46,7 +46,7 @@ jobs: # First, we need to get the version of Keystone we are working on. We # will also need submodules here since we are doing full builds - name: Checkout Keystone - uses: actions/checkout@v3 + uses: actions/checkout@v4 with: submodules: 'true' @@ -75,7 +75,7 @@ jobs: # since we really only care about keeping the latest cache anyways. - name: Restore buildroot packages id: restore-buildroot-dl - uses: actions/cache/restore@v3 + uses: actions/cache/restore@v4 with: path: dl.tar key: buildroot-dl-${{ steps.cache-keys.outputs.YMDH }} @@ -87,7 +87,7 @@ jobs: - name: Restore ccache id: restore-ccache - uses: actions/cache/restore@v3 + uses: actions/cache/restore@v4 with: path: ccache.tar.xz key: ccache-${{ steps.cache-keys.outputs.YMDH }} @@ -239,14 +239,14 @@ jobs: fi - name: Restore buildroot packages - uses: actions/cache/restore@v3 + uses: actions/cache/restore@v4 if: ${{ steps.check-caches.outputs.BUILDROOT_DL_UPDATE == 'true' }} with: path: dl.tar key: ${{ needs.build.outputs.buildroot-dl-matched-key }} - name: Restore ccache - uses: actions/cache/restore@v3 + uses: actions/cache/restore@v4 if: ${{ steps.check-caches.outputs.BUILDROOT_CCACHE_UPDATE == 'true' }} with: path: ccache.tar.xz @@ -295,14 +295,14 @@ jobs: fi - name: Save buildroot download cache - uses: actions/cache/save@v3 + uses: actions/cache/save@v4 if: ${{ steps.check-caches.outputs.BUILDROOT_DL_UPDATE == 'true' }} with: path: dl.tar key: ${{ needs.build.outputs.buildroot-dl-primary-key }} - name: Save ccache - uses: actions/cache/save@v3 + uses: actions/cache/save@v4 if: ${{ steps.check-caches.outputs.BUILDROOT_CCACHE_UPDATE == 'true' }} with: path: ccache.tar.xz @@ -318,7 +318,7 @@ jobs: steps: # We don't need submodules here since Keystone is a monorepo! - name: Checkout Keystone - uses: actions/checkout@v3 + uses: actions/checkout@v4 with: submodules: 'false' @@ -333,7 +333,7 @@ jobs: runs-on: ubuntu-latest steps: - name: Checkout Keystone - uses: actions/checkout@v3 + uses: actions/checkout@v4 with: submodules: 'true' diff --git a/.github/workflows/test-system.yml b/.github/workflows/test-system.yml index 5deebf1fe..11f7f5592 100644 --- a/.github/workflows/test-system.yml +++ b/.github/workflows/test-system.yml @@ -13,7 +13,7 @@ jobs: steps: # We don't need submodules here since Keystone is a monorepo! - name: Checkout Keystone - uses: actions/checkout@v3 + uses: actions/checkout@v4 with: submodules: 'false' @@ -73,7 +73,7 @@ jobs: steps: # We don't need submodules here since Keystone is a monorepo! - name: Checkout Keystone - uses: actions/checkout@v3 + uses: actions/checkout@v4 with: submodules: 'false' diff --git a/Makefile b/Makefile index 0181558f6..6bbbfed94 100644 --- a/Makefile +++ b/Makefile @@ -24,7 +24,7 @@ export BUILDROOT_OVERLAYDIR ?= $(BUILDDIR)/overlay export BUILDROOT_BUILDDIR ?= $(BUILDDIR)/buildroot.build -# options: generic, cva6, hifive_unmatched +# options: generic, cva6, hifive_unmatched, mpfs export KEYSTONE_PLATFORM ?= generic export KEYSTONE_BITS ?= 64