Porting Keystone to an arbitrary RISC-V system

[ahmrr]

Describe the bug
Not a bug

Question
I am a student currently trying to port Keystone to a Rocket RISC-V system running on the Arty A7-100T FPGA. I was looking for any guidance possible with (generally) porting Keystone to an arbitrary RISC-V system.

I also had three specific questions:

1. Do I need to modify the bootrom I currently have on my FPGA at all? The generic target for QEMU generates a bootrom.bin. Additionally, the bootloader.c file's comments suggest that porting to a new system does require integrating the "secure boot" steps with the bootrom of the target platform. However, the paper does say: "Keystone does not rely on a specific implementation...Keystone simulates secure boot via a modified first-stage bootloader for all the above steps" (section 4.5). If the bootrom does need to be modified, are there any concrete guidelines I can follow to do so? If so, the SM initialization process happens before loading the SD card firmware, correct?
2. What changes would need to happen in the security monitor? I have already included my system's platform.c for OpenSBI (but have not tested it yet). Is there anything aside from this that needs to be changed?
3. What would need to change in the buildroot configuration to accomodate my system?