diff --git a/.clang-format b/.clang-format index 4e030cd14..16a889f20 100644 --- a/.clang-format +++ b/.clang-format @@ -2,8 +2,8 @@ Language: Cpp AccessModifierOffset: -4 AlignAfterOpenBracket: Align AllowShortEnumsOnASingleLine: false -AlignConsecutiveAssignments: false -AlignConsecutiveDeclarations: false +AlignConsecutiveAssignments: true +AlignConsecutiveDeclarations: true AlignEscapedNewlines: Right AlignOperands: true AlignTrailingComments: true @@ -59,4 +59,4 @@ SpacesInParentheses: false SpacesInSquareBrackets: false Standard: Cpp11 TabWidth: 4 -UseTab: Never \ No newline at end of file +UseTab: Never diff --git a/.dockerignore b/.dockerignore new file mode 100644 index 000000000..537fb4e37 --- /dev/null +++ b/.dockerignore @@ -0,0 +1,15 @@ +docker +.dockerignore +.gitlab +.gitlab-ci.yml + +*build* +./models +__pycache__ +.vscode +translation +.cache +*.npy +*.pth +*.o +**/.ipynb_checkpoints \ No newline at end of file diff --git a/.gitignore b/.gitignore index 99c0440d7..77849f435 100644 --- a/.gitignore +++ b/.gitignore @@ -4,10 +4,15 @@ ./models/ __pycache__/ .vscode +.idea ./translation .cache *.npy *.pth !tests/data/**/*.npy /models -**/.ipynb_checkpoints/ \ No newline at end of file +/notebooks +**/.ipynb_checkpoints/ + +/3rdparty/NeMo/ +/3rdparty/apex/ \ No newline at end of file diff --git a/3rdparty/CMakeLists.txt b/3rdparty/CMakeLists.txt index b2e6e1778..03976e77b 100644 --- a/3rdparty/CMakeLists.txt +++ b/3rdparty/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -12,4 +12,8 @@ # See the License for the specific language governing permissions and # limitations under the License. -add_subdirectory(trt_fused_multihead_attention) \ No newline at end of file +add_subdirectory(common) +add_subdirectory(trt_fused_multihead_attention) +if(ENABLE_FP8) +add_subdirectory(fp8_qgmma_1x1) +endif() \ No newline at end of file diff --git a/3rdparty/common/CMakeLists.txt b/3rdparty/common/CMakeLists.txt new file mode 100644 index 000000000..5905d4bfd --- /dev/null +++ b/3rdparty/common/CMakeLists.txt @@ -0,0 +1,25 @@ +# +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +cmake_minimum_required(VERSION 3.8) + +set(cuda_driver_wrapper_files + cudaDriverWrapper.cpp +) + +add_library(cuda_driver_wrapper STATIC ${cuda_driver_wrapper_files}) +target_link_libraries(cuda_driver_wrapper PRIVATE -lcublas -lcudart) +set_property(TARGET cuda_driver_wrapper PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET cuda_driver_wrapper PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) \ No newline at end of file diff --git a/3rdparty/common/cudaDriverWrapper.cpp b/3rdparty/common/cudaDriverWrapper.cpp new file mode 100644 index 000000000..c80e10719 --- /dev/null +++ b/3rdparty/common/cudaDriverWrapper.cpp @@ -0,0 +1,138 @@ +/* + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#define CUDA_LIB_NAME "cuda" + +#if defined(_WIN32) +#if !defined(WIN32_LEAN_AND_MEAN) +#define WIN32_LEAN_AND_MEAN +#endif // defined(WIN32_LEAN_AND_MEAN) +#include +#define dllOpen(name) (void*) LoadLibraryA("nv" name ".dll") +#define dllClose(handle) FreeLibrary(static_cast(handle)) +#define dllGetSym(handle, name) GetProcAddress(static_cast(handle), name) +#else +#include +#define dllOpen(name) dlopen("lib" name ".so", RTLD_LAZY) +#define dllClose(handle) dlclose(handle) +#define dllGetSym(handle, name) dlsym(handle, name) +#endif + +#include "cudaDriverWrapper.h" +// #include "plugin.h" +#include +#include + +// using namespace nvinfer1; + +CUDADriverWrapper::CUDADriverWrapper() +{ + handle = dllOpen(CUDA_LIB_NAME); + // ASSERT(handle != nullptr); // TODO check + + auto load_sym = [](void* handle, const char* name) { + void* ret = dllGetSym(handle, name); + // ASSERT(ret != nullptr); // TODO check + return ret; + }; + + *(void**) (&_cuGetErrorName) = load_sym(handle, "cuGetErrorName"); + *(void**) (&_cuFuncSetAttribute) = load_sym(handle, "cuFuncSetAttribute"); + *(void**) (&_cuLinkComplete) = load_sym(handle, "cuLinkComplete"); + *(void**) (&_cuModuleUnload) = load_sym(handle, "cuModuleUnload"); + *(void**) (&_cuLinkDestroy) = load_sym(handle, "cuLinkDestroy"); + *(void**) (&_cuModuleLoadData) = load_sym(handle, "cuModuleLoadData"); + *(void**) (&_cuLinkCreate) = load_sym(handle, "cuLinkCreate_v2"); + *(void**) (&_cuModuleGetFunction) = load_sym(handle, "cuModuleGetFunction"); + *(void**) (&_cuLinkAddFile) = load_sym(handle, "cuLinkAddFile_v2"); + *(void**) (&_cuLinkAddData) = load_sym(handle, "cuLinkAddData_v2"); + *(void**) (&_cuLaunchCooperativeKernel) = load_sym(handle, "cuLaunchCooperativeKernel"); + *(void**) (&_cuLaunchKernel) = load_sym(handle, "cuLaunchKernel"); +} + +CUDADriverWrapper::~CUDADriverWrapper() +{ + dllClose(handle); +} + +CUresult CUDADriverWrapper::cuGetErrorName(CUresult error, const char** pStr) const +{ + return (*_cuGetErrorName)(error, pStr); +} + +CUresult CUDADriverWrapper::cuFuncSetAttribute(CUfunction hfunc, CUfunction_attribute attrib, int value) const +{ + return (*_cuFuncSetAttribute)(hfunc, attrib, value); +} + +CUresult CUDADriverWrapper::cuLinkComplete(CUlinkState state, void** cubinOut, size_t* sizeOut) const +{ + return (*_cuLinkComplete)(state, cubinOut, sizeOut); +} + +CUresult CUDADriverWrapper::cuModuleUnload(CUmodule hmod) const +{ + return (*_cuModuleUnload)(hmod); +} + +CUresult CUDADriverWrapper::cuLinkDestroy(CUlinkState state) const +{ + return (*_cuLinkDestroy)(state); +} + +CUresult CUDADriverWrapper::cuModuleLoadData(CUmodule* module, const void* image) const +{ + return (*_cuModuleLoadData)(module, image); +} + +CUresult CUDADriverWrapper::cuLinkCreate( + unsigned int numOptions, CUjit_option* options, void** optionValues, CUlinkState* stateOut) const +{ + return (*_cuLinkCreate)(numOptions, options, optionValues, stateOut); +} + +CUresult CUDADriverWrapper::cuModuleGetFunction(CUfunction* hfunc, CUmodule hmod, const char* name) const +{ + return (*_cuModuleGetFunction)(hfunc, hmod, name); +} + +CUresult CUDADriverWrapper::cuLinkAddFile(CUlinkState state, CUjitInputType type, const char* path, + unsigned int numOptions, CUjit_option* options, void** optionValues) const +{ + return (*_cuLinkAddFile)(state, type, path, numOptions, options, optionValues); +} + +CUresult CUDADriverWrapper::cuLinkAddData(CUlinkState state, CUjitInputType type, void* data, size_t size, + const char* name, unsigned int numOptions, CUjit_option* options, void** optionValues) const +{ + return (*_cuLinkAddData)(state, type, data, size, name, numOptions, options, optionValues); +} + +CUresult CUDADriverWrapper::cuLaunchCooperativeKernel(CUfunction f, unsigned int gridDimX, unsigned int gridDimY, + unsigned int gridDimZ, unsigned int blockDimX, unsigned int blockDimY, unsigned int blockDimZ, + unsigned int sharedMemBytes, CUstream hStream, void** kernelParams) const +{ + return (*_cuLaunchCooperativeKernel)( + f, gridDimX, gridDimY, gridDimZ, blockDimX, blockDimY, blockDimZ, sharedMemBytes, hStream, kernelParams); +} + +CUresult CUDADriverWrapper::cuLaunchKernel(CUfunction f, unsigned int gridDimX, unsigned int gridDimY, + unsigned int gridDimZ, unsigned int blockDimX, unsigned int blockDimY, unsigned int blockDimZ, + unsigned int sharedMemBytes, CUstream hStream, void** kernelParams, void** extra) const +{ + return (*_cuLaunchKernel)( + f, gridDimX, gridDimY, gridDimZ, blockDimX, blockDimY, blockDimZ, sharedMemBytes, hStream, kernelParams, extra); +} diff --git a/3rdparty/common/cudaDriverWrapper.h b/3rdparty/common/cudaDriverWrapper.h new file mode 100644 index 000000000..e3b1f4023 --- /dev/null +++ b/3rdparty/common/cudaDriverWrapper.h @@ -0,0 +1,101 @@ +/* + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef CUDA_DRIVER_WRAPPER_H +#define CUDA_DRIVER_WRAPPER_H + +#include +#include +#pragma once + +#define cuErrCheck(stat, wrap) \ + { \ + cuErrCheck_((stat), wrap, __FILE__, __LINE__); \ + } + +// namespace nvinfer1 +// { +class CUDADriverWrapper +{ +public: + CUDADriverWrapper(); + + ~CUDADriverWrapper(); + + CUresult cuGetErrorName(CUresult error, const char** pStr) const; + + CUresult cuFuncSetAttribute(CUfunction hfunc, CUfunction_attribute attrib, int value) const; + + CUresult cuLinkComplete(CUlinkState state, void** cubinOut, size_t* sizeOut) const; + + CUresult cuModuleUnload(CUmodule hmod) const; + + CUresult cuLinkDestroy(CUlinkState state) const; + + CUresult cuModuleLoadData(CUmodule* module, const void* image) const; + + CUresult cuLinkCreate( + unsigned int numOptions, CUjit_option* options, void** optionValues, CUlinkState* stateOut) const; + + CUresult cuModuleGetFunction(CUfunction* hfunc, CUmodule hmod, const char* name) const; + + CUresult cuLinkAddFile(CUlinkState state, CUjitInputType type, const char* path, unsigned int numOptions, + CUjit_option* options, void** optionValues) const; + + CUresult cuLinkAddData(CUlinkState state, CUjitInputType type, void* data, size_t size, const char* name, + unsigned int numOptions, CUjit_option* options, void** optionValues) const; + + CUresult cuLaunchCooperativeKernel(CUfunction f, unsigned int gridDimX, unsigned int gridDimY, + unsigned int gridDimZ, unsigned int blockDimX, unsigned int blockDimY, unsigned int blockDimZ, + unsigned int sharedMemBytes, CUstream hStream, void** kernelParams) const; + + CUresult cuLaunchKernel(CUfunction f, unsigned int gridDimX, unsigned int gridDimY, unsigned int gridDimZ, + unsigned int blockDimX, unsigned int blockDimY, unsigned int blockDimZ, unsigned int sharedMemBytes, + CUstream hStream, void** kernelParams, void** extra) const; + +private: + void* handle; + CUresult (*_cuGetErrorName)(CUresult, const char**); + CUresult (*_cuFuncSetAttribute)(CUfunction, CUfunction_attribute, int); + CUresult (*_cuLinkComplete)(CUlinkState, void**, size_t*); + CUresult (*_cuModuleUnload)(CUmodule); + CUresult (*_cuLinkDestroy)(CUlinkState); + CUresult (*_cuLinkCreate)(unsigned int, CUjit_option*, void**, CUlinkState*); + CUresult (*_cuModuleLoadData)(CUmodule*, const void*); + CUresult (*_cuModuleGetFunction)(CUfunction*, CUmodule, const char*); + CUresult (*_cuLinkAddFile)(CUlinkState, CUjitInputType, const char*, unsigned int, CUjit_option*, void**); + CUresult (*_cuLinkAddData)( + CUlinkState, CUjitInputType, void*, size_t, const char*, unsigned int, CUjit_option*, void**); + CUresult (*_cuLaunchCooperativeKernel)(CUfunction, unsigned int, unsigned int, unsigned int, unsigned int, + unsigned int, unsigned int, unsigned int, CUstream, void**); + CUresult (*_cuLaunchKernel)(CUfunction f, unsigned int gridDimX, unsigned int gridDimY, unsigned int gridDimZ, + unsigned int blockDimX, unsigned int blockDimY, unsigned int blockDimZ, unsigned int sharedMemBytes, + CUstream hStream, void** kernelParams, void** extra); +}; + +inline void cuErrCheck_(CUresult stat, const CUDADriverWrapper& wrap, const char* file, int line) +{ + if (stat != CUDA_SUCCESS) + { + const char* msg = nullptr; + wrap.cuGetErrorName(stat, &msg); + fprintf(stderr, "CUDA Error: %s %s %d\n", msg, file, line); + } +} + +// } // namespace nvinfer1 + +#endif // CUDA_DRIVER_WRAPPER_H diff --git a/3rdparty/fp8_qgmma_1x1/CMakeLists.txt b/3rdparty/fp8_qgmma_1x1/CMakeLists.txt new file mode 100644 index 000000000..b5295687a --- /dev/null +++ b/3rdparty/fp8_qgmma_1x1/CMakeLists.txt @@ -0,0 +1,26 @@ +# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +cmake_minimum_required(VERSION 3.8) + +set(fp8_gemm_1x1_files + fp8_qgmma_1x1_utils.cu +) + +file(GLOB fp8_gemm_1x1_files ${fp8_gemm_1x1_files} cubins/*.cubin.cpp) + +add_library(fp8_qgmma_1x1_utils STATIC ${fp8_gemm_1x1_files}) +target_link_libraries(fp8_qgmma_1x1_utils PUBLIC cuda_driver_wrapper) +set_property(TARGET fp8_qgmma_1x1_utils PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET fp8_qgmma_1x1_utils PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) diff --git a/3rdparty/fp8_qgmma_1x1/compute.cuh b/3rdparty/fp8_qgmma_1x1/compute.cuh new file mode 100755 index 000000000..ae03257c3 --- /dev/null +++ b/3rdparty/fp8_qgmma_1x1/compute.cuh @@ -0,0 +1,24 @@ +#include "fp8_gemm_1x1.h" + +struct Compute { + struct Host { + ComputeParams _params; + __host__ Host() {} + + __host__ ComputeParams params() { return _params; } + + __host__ void configure(uint8_t* D, int N, int P, int Q, int C, int K, float ab_scale, float d_scale) + { + _params.D = D; + _params.N = N; + _params.NPQ = N*P*Q; + _params.PQ = P*Q; + _params.P = P; + _params.Q = Q; + _params.C = C; + _params.K = K; + _params.ab_scale = ab_scale; + _params.d_scale = d_scale; + } + }; +}; diff --git a/3rdparty/fp8_qgmma_1x1/conv1x1.cuh b/3rdparty/fp8_qgmma_1x1/conv1x1.cuh new file mode 100755 index 000000000..3163697fd --- /dev/null +++ b/3rdparty/fp8_qgmma_1x1/conv1x1.cuh @@ -0,0 +1,125 @@ +#ifndef CONV_1x1_CUH +#define CONV_1x1_CUH + +#include "conv1x1_interface.hpp" +#include "fp8_gemm_1x1.h" +#include "tile_profile.cuh" +#include "traits.h" + +void swizzleBias(int K, uint16_t* h_bias, uint16_t* d_bias) { + std::vector h_bias_swizzled(K); + + /* + idx: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, .., 64, 65, ..] + swiz: [0, 1, 2, 3, 16, 17, 18, 19, 32, 33, 34, 35, 48, 49, 50, 51, 4, 5, .., 64, 65, ..] + */ + for (int ni = 0; ni < K; ni++) { + int swiz = (ni/64)*64 + 16*((ni/4)&3) + 4*((ni%64)/16) + (ni%4); + h_bias_swizzled[ni] = h_bias[swiz]; + } + + gpuErrChk(cudaMemcpy(d_bias, &h_bias_swizzled[0], K * sizeof(uint16_t), cudaMemcpyHostToDevice)); +} + +void swizzleB(int C, int K, uint8_t* h_B, uint8_t* d_B) { + std::vector h_B_swizzled(C * K); + + int swiz64[64]; + /* + idx: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, ..] + new_offset: [0, 1, 8, 9, 16, 17, 24, 25, 32, 33, 40, 41, 48, 49, 56, 57, 2, 3, ..] + swiz64: [0, 1, 16, 17, 32, 33, 48, 49, 2, 3, 24, 25, 40, 41, 56, 57, 4, 5, ..] + */ + for (int i=0; i<64; i++) { + int tid = i/16; + int thread_offset = i%16; + int new_offset = (thread_offset>>1)*8 + (thread_offset&1) + tid*2; + swiz64[new_offset] = i; + } + for (int ni=0; ni +class Conv1x1 : public Conv1x1Interface { + private: + using Traits = Kernel_traits_v1; + + typename Traits::Scheduler::Host* _p_sched; + typename Traits::Dma::Host* _p_dma; + typename Traits::Compute::Host* _p_compute; + ProfileParams _profileParams; + cudaStream_t stream_; + Fp8Gemm1x1Kernel const* mKernels{}; + int32_t mSM = 90; + + public: + Conv1x1(uint8_t* workspace, cudaStream_t stream): stream_(stream) + { + _p_dma = new typename Traits::Dma::Host(&workspace, stream); + _p_sched = new typename Traits::Scheduler::Host(&workspace, stream); + _p_compute = new typename Traits::Compute::Host(); + + mKernels = getFp8Gemm1x1Kernels(mSM); + } + + static uint32_t getWorkSpaceSize(int K) + { + return Traits::Dma::Host::getWorkSpaceSize() + Traits::Scheduler::Host::getWorkSpaceSize(K); + } + + void run(uint8_t* D, uint8_t* A, uint8_t* B, uint16_t* bias, float ab_scale, float d_scale, int N, int H, int W, int C, int K) override { + // ... and if we're already making that assumption, let's just assume multiple of TILE_K so that we don't have to have a check in the epilogue + assert((K % Traits::TILE_K) == 0); + + _p_dma->configure(N, H, W, C, K, A, B, bias); + _p_sched->configure(N, H, W, K); + _p_compute->configure(D, N, H, W, C, K, ab_scale, d_scale); + + int tiles_m = (N*H*W+Traits::TILE_M-1)/Traits::TILE_M; + int tiles_n = (K+Traits::TILE_N-1)/Traits::TILE_N; + int num_tiles = tiles_m*tiles_n; + + if (Traits::PROFILE_ENABLED) + { + gpuErrChk(cudaMalloc(&_profileParams.profile,num_tiles*sizeof(tile_profile))); + gpuErrChk(cudaMemset(_profileParams.profile,0,sizeof(tile_profile))); + } + + _profileParams.num_tiles = num_tiles; + _profileParams.tiles_n = tiles_n; + + KernelParams params; + params.scheduler_params = _p_sched->params(); + params.dma_params = _p_dma->params(); + params.compute_params = _p_compute->params(); + params.profile_params = _profileParams; + params.relu = RELU; + params.gelu = GELU; + + mKernels->run(params, stream_); + + // run_fp8_gemm_1x1(params, _p_sched->grid(), _threads, _smem_size, stream); + } +}; + +#endif // CONV_1x1_CUH \ No newline at end of file diff --git a/3rdparty/fp8_qgmma_1x1/conv1x1_interface.hpp b/3rdparty/fp8_qgmma_1x1/conv1x1_interface.hpp new file mode 100755 index 000000000..1308bfc5f --- /dev/null +++ b/3rdparty/fp8_qgmma_1x1/conv1x1_interface.hpp @@ -0,0 +1,10 @@ +#ifndef CONV1x1_INTERFACE_HPP_ +#define CONV1x1_INTERFACE_HPP_ + +class Conv1x1Interface +{ +public: + virtual void run(uint8_t* D, uint8_t* A, uint8_t* B, uint16_t* bias, float ab_scale, float d_scale, int N, int H, int W, int C, int K) = 0; +}; + +#endif // CONV1x1_INTERFACE_HPP_ \ No newline at end of file diff --git a/3rdparty/fp8_qgmma_1x1/cubins/fp8_gemm_1x1_gelu.cubin.cpp b/3rdparty/fp8_qgmma_1x1/cubins/fp8_gemm_1x1_gelu.cubin.cpp new file mode 100755 index 000000000..cab2a25b7 --- /dev/null +++ b/3rdparty/fp8_qgmma_1x1/cubins/fp8_gemm_1x1_gelu.cubin.cpp @@ -0,0 +1,3583 @@ +unsigned char cubin_fp8_gemm_1x1_gelu_cu_cubin[] = { + 0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x33, 0x07, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xbe, 0x00, 0x76, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xb0, 0xa6, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xb0, 0xa3, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x5a, 0x05, 0x5a, 0x00, 0x40, 0x00, 0x38, 0x00, 0x05, 0x00, 0x40, 0x00, + 0x0c, 0x00, 0x01, 0x00, 0x00, 0x2e, 0x73, 0x68, 0x73, 0x74, 0x72, 0x74, + 0x61, 0x62, 0x00, 0x2e, 0x73, 0x74, 0x72, 0x74, 0x61, 0x62, 0x00, 0x2e, + 0x73, 0x79, 0x6d, 0x74, 0x61, 0x62, 0x00, 0x2e, 0x73, 0x79, 0x6d, 0x74, + 0x61, 0x62, 0x5f, 0x73, 0x68, 0x6e, 0x64, 0x78, 0x00, 0x2e, 0x6e, 0x76, + 0x2e, 0x69, 0x6e, 0x66, 0x6f, 0x00, 0x2e, 0x74, 0x65, 0x78, 0x74, 0x2e, + 0x6b, 0x65, 0x72, 0x6e, 0x65, 0x6c, 0x5f, 0x47, 0x45, 0x4c, 0x55, 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file mode 100755 index 000000000..df5425148 --- /dev/null +++ b/3rdparty/fp8_qgmma_1x1/cubins/fp8_gemm_1x1_relu.cubin.cpp @@ -0,0 +1,2729 @@ +unsigned char cubin_fp8_gemm_1x1_relu_cu_cubin[] = { + 0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x33, 0x07, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xbe, 0x00, 0x76, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xb0, 0x7e, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xb0, 0x7b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x5a, 0x05, 0x5a, 0x00, 0x40, 0x00, 0x38, 0x00, 0x05, 0x00, 0x40, 0x00, + 0x0c, 0x00, 0x01, 0x00, 0x00, 0x2e, 0x73, 0x68, 0x73, 0x74, 0x72, 0x74, + 0x61, 0x62, 0x00, 0x2e, 0x73, 0x74, 0x72, 0x74, 0x61, 0x62, 0x00, 0x2e, + 0x73, 0x79, 0x6d, 0x74, 0x61, 0x62, 0x00, 0x2e, 0x73, 0x79, 0x6d, 0x74, + 0x61, 0x62, 0x5f, 0x73, 0x68, 0x6e, 0x64, 0x78, 0x00, 0x2e, 0x6e, 0x76, + 0x2e, 0x69, 0x6e, 0x66, 0x6f, 0x00, 0x2e, 0x74, 0x65, 0x78, 0x74, 0x2e, + 0x6b, 0x65, 0x72, 0x6e, 0x65, 0x6c, 0x5f, 0x52, 0x45, 0x4c, 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0x00, 0x00, 0x00, 0x00, 0xb0, 0x02, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +}; +unsigned int cubin_fp8_gemm_1x1_relu_cu_cubin_len = 32712; diff --git a/3rdparty/fp8_qgmma_1x1/dma.cuh b/3rdparty/fp8_qgmma_1x1/dma.cuh new file mode 100755 index 000000000..dad71ceed --- /dev/null +++ b/3rdparty/fp8_qgmma_1x1/dma.cuh @@ -0,0 +1,190 @@ +#include "fp8_gemm_1x1.h" +#include "utils.h" + +template +struct DMA { + + struct DMAHostDescriptors { + cudaTmaDesc a_desc; + cudaTmaDesc b_desc; + cudaTmaDesc bias_desc; + }; + + struct Host { + static const uint32_t cudaTmaDescAlignment = 64; + DMAParams _params; + uint8_t* workspace_; + cudaStream_t stream_; + + __host__ Host( uint8_t** workspace, cudaStream_t stream): workspace_(*workspace), stream_(stream) { + if (((uintptr_t)*workspace) % cudaTmaDescAlignment != 0) + { + throw std::runtime_error("Address of workspace is not aligned to cudaTmaDescAlignment"); + } + + *workspace += getWorkSpaceSize(); + } + + __host__ void configure(int N, int H, int W, int C, int K, uint8_t* A, uint8_t* B, uint16_t* bias) + { + _params.C = C; + _params.HW = H*W; + _params.H = H; + _params.W = W; + + if (INTERLEAVED) createTmaDescriptors(N,H,W,C,K,A,B,bias,workspace_, stream_); + else createTmaDescriptors(N*H*W,1,1,C,K,A,B,bias,workspace_, stream_); + + if (INTERLEAVED) { + // Fast divmod + find_divisor(_params.mul_hw, _params.shr_hw, H*W); + find_divisor(_params.mul_w, _params.shr_w, W); + } + } + + static __host__ uint32_t getWorkSpaceSize() + { + // descriptor a_desc + b_desc + bias_desc + return sizeof(cudaTmaDesc) * 3; + } + + __host__ void createTmaDescriptors(int N, int H, int W, int C, int K, uint8_t* A, uint8_t* B, uint16_t* bias, uint8_t* workspace, cudaStream_t stream) { + DMAHostDescriptors descs; + + uint32_t tensor_size_a[5]; + tensor_size_a[0] = INTERLEAVED ? W : C; + tensor_size_a[1] = INTERLEAVED ? H : W; + tensor_size_a[2] = INTERLEAVED ? 1 : H; + tensor_size_a[3] = INTERLEAVED ? C/32 : 1; + tensor_size_a[4] = N; + + uint64_t tensor_stride_a[4]; + tensor_stride_a[0] = INTERLEAVED ? W*32 : C; + tensor_stride_a[1] = INTERLEAVED ? H*W*32 : C*W; + tensor_stride_a[2] = INTERLEAVED ? H*W*32 : C*H*W; + tensor_stride_a[3] = INTERLEAVED ? (C/32)*H*W*32 : C*H*W; + + uint32_t traversal_stride_a[5] = {1,1,1,1,1}; + + traversal_stride_a[3] = 1; // D + traversal_stride_a[2] = 1; // H + traversal_stride_a[1] = 1; // W + + uint32_t box_size_ndhw_a = TILE_M; + uint32_t box_size_rangec_a = INTERLEAVED ? 1 : TILE_K; + + int32_t base_corner_a[3], far_corner_a[3]; + base_corner_a[2] = 0; // -pad_d + base_corner_a[1] = 0; // -pad_h + base_corner_a[0] = 0; // -pad_w + far_corner_a[2] = 0; // pad_d - t*dilation + far_corner_a[1] = 0; // pad_h - r*dilation + far_corner_a[0] = 0; // pad_w - s*dilation + + gpuErrChk(cudaSetTmaIm2ColDescriptor(&descs.a_desc, + A, + 5, + U8, + INTERLEAVED ? INTERLEAVE_32B : INTERLEAVE_DISABLED, + INTERLEAVED ? SWIZZLE_32B : SWIZZLE_128B, + PROMOTION_DISABLED, + tensor_size_a, + tensor_stride_a, + traversal_stride_a, + box_size_rangec_a, + box_size_ndhw_a, + base_corner_a, + far_corner_a, + 0, + 0)); + + void* initial_workspace = reinterpret_cast(workspace); + auto assignAligned = [&](cudaTmaDesc** dst, uint8_t** workspace) { + const auto alignSize = cudaTmaDescAlignment; + uint64_t newPtr = reinterpret_cast(*workspace); + const auto remainder = newPtr % alignSize; + if (remainder != 0) { + newPtr += alignSize - remainder; + } + + *workspace = reinterpret_cast(newPtr); + *dst = reinterpret_cast(*workspace); + *workspace += sizeof(cudaTmaDesc); + }; + + assignAligned(&_params.a_desc, &workspace); + + uint32_t tensor_size_b[5]; + tensor_size_b[0] = C; + tensor_size_b[1] = 1; // s + tensor_size_b[2] = 1; // r + tensor_size_b[3] = 1; // t + tensor_size_b[4] = K; + + uint64_t tensor_stride_b[4]; + tensor_stride_b[0] = tensor_size_b[0]; + tensor_stride_b[1] = tensor_size_b[1] * tensor_stride_b[0]; + tensor_stride_b[2] = tensor_size_b[2] * tensor_stride_b[1]; + tensor_stride_b[3] = tensor_size_b[3] * tensor_stride_b[2]; + + uint32_t traversal_stride_b[5] = {1,1,1,1,1}; + + uint32_t box_size_b[5] = {1,1,1,1,1}; + box_size_b[0] = TILE_K; + box_size_b[4] = TILE_N; + + for (int i=0; i<8; i++) descs.b_desc.data[i] = 0; + gpuErrChk(cudaSetTmaTileDescriptor(&descs.b_desc, + B, + 5, + U8, + INTERLEAVE_DISABLED, + SWIZZLE_128B, + PROMOTION_DISABLED, + tensor_size_b, + tensor_stride_b, + traversal_stride_b, + box_size_b, + 0, + 0)); + + assignAligned(&_params.b_desc, &workspace); + + uint32_t tensor_size_bias[2]; + tensor_size_bias[0] = K; + tensor_size_bias[1] = 1; + + uint64_t tensor_stride_bias[1]; + tensor_stride_bias[0] = tensor_size_bias[0]*sizeof(uint16_t); + + uint32_t traversal_stride_bias[2] = {1, 1}; + + uint32_t box_size_bias[2] = {TILE_N, 1}; + + for (int i=0; i<8; i++) descs.bias_desc.data[i] = 0; + gpuErrChk(cudaSetTmaTileDescriptor(&descs.bias_desc, + bias, + 2, + BF16_RN, + INTERLEAVE_DISABLED, + SWIZZLE_DISABLED, + PROMOTION_DISABLED, + tensor_size_bias, + tensor_stride_bias, + traversal_stride_bias, + box_size_bias, + 0, + 0)); + + assignAligned(&_params.bias_desc, &workspace); + + if (workspace - reinterpret_cast(initial_workspace) != sizeof(DMAHostDescriptors)) + { + throw std::runtime_error("Addresses were not aligned and the single memcpy of TMA descriptors is not possible"); + } + gpuErrChk(cudaMemcpyAsync(initial_workspace, &descs, sizeof(DMAHostDescriptors), cudaMemcpyHostToDevice, stream)); + } + + __host__ DMAParams params() { return _params; } + }; +}; diff --git a/3rdparty/fp8_qgmma_1x1/fp8_gemm_1x1.h b/3rdparty/fp8_qgmma_1x1/fp8_gemm_1x1.h new file mode 100755 index 000000000..f43f639ca --- /dev/null +++ b/3rdparty/fp8_qgmma_1x1/fp8_gemm_1x1.h @@ -0,0 +1,152 @@ +/* + * Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef FP8_GEMM_1X1_H +#define FP8_GEMM_1X1_H + +#include "sharedCubinLoader.h" +#include "tile_profile.cuh" +#include "utils.h" + +namespace fp8_gemm_1x1 { + +enum DataType +{ + DATA_TYPE_BOOL, + DATA_TYPE_E8M10, + DATA_TYPE_E8M7, + DATA_TYPE_FP16, + DATA_TYPE_FP32, + DATA_TYPE_INT4, + DATA_TYPE_INT8, + DATA_TYPE_INT32 +}; + +} // namespace fp8_gemm_1x1 + +constexpr int32_t kSM_90 = 90; + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Do not modify this, it is integrated from original fp8_gemm_1x1 codes. +//////////////////////////////////////////////////////////////////////////////////////////////////// +struct SchedulerParams { + int tiles_m; + int tiles_n; + int num_tiles; + int* tile_counter; + int* cta_completion_counter; +}; + +struct ComputeParams { + uint8_t* D; + int N; + int NPQ; + int PQ; + int P; + int Q; + int C; + int K; + float ab_scale; + float d_scale; +}; + +struct DMAParams { + cudaTmaDesc* a_desc; + cudaTmaDesc* b_desc; + cudaTmaDesc* bias_desc; + int C; + int HW; + int H; + int W; + + // fast_divmod stuff + uint32_t mul_hw, shr_hw; + uint32_t mul_w, shr_w; +}; + +struct KernelParams { + SchedulerParams scheduler_params; + DMAParams dma_params; + ComputeParams compute_params; + ProfileParams profile_params; + bool gelu; + bool relu; +}; + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Do not modify this, it is integrated from original fp8_gemm_1x1 codes. +//////////////////////////////////////////////////////////////////////////////////////////////////// +extern unsigned char cubin_fp8_gemm_1x1_gelu_cu_cubin[]; +extern unsigned char cubin_fp8_gemm_1x1_no_act_cu_cubin[]; +extern unsigned char cubin_fp8_gemm_1x1_relu_cu_cubin[]; + +extern uint32_t cubin_fp8_gemm_1x1_gelu_cu_cubin_len; +extern uint32_t cubin_fp8_gemm_1x1_no_act_cu_cubin_len; +extern uint32_t cubin_fp8_gemm_1x1_relu_cu_cubin_len; + +static const struct Fp8Gemm1x1MetaInfo +{ + bool mGelu; + bool mRelu; + int32_t mSM; + unsigned char const* mCubin; + uint32_t mCubinSize; + char const* mFuncName; + int32_t mSharedMemBytes; + int32_t mThreadsPerCTA; +} sFp8Gemm1x1KernelMetaInfos[] = { + { true, false, kSM_90, cubin_fp8_gemm_1x1_gelu_cu_cubin, cubin_fp8_gemm_1x1_gelu_cu_cubin_len, "kernel_GELU", 197920, 384 }, + { false, false, kSM_90, cubin_fp8_gemm_1x1_no_act_cu_cubin, cubin_fp8_gemm_1x1_no_act_cu_cubin_len, "kernel_no_act", 197920, 384 }, + { false, true, kSM_90, cubin_fp8_gemm_1x1_relu_cu_cubin, cubin_fp8_gemm_1x1_relu_cu_cubin_len, "kernel_RELU", 197920, 384 }, +}; + +//////////////////////////////////////////////////////////////////////////////////////////////////// +class Fp8Gemm1x1Kernel + : public TSharedCubinKernel +{ +public: + Fp8Gemm1x1Kernel(Fp8Gemm1x1MetaInfo const* pMetaStart, + int32_t nMetaCount, int32_t sm) + : TSharedCubinKernel( + pMetaStart, nMetaCount, sm) + { + } + + uint64_t hashID(bool gelu, bool relu) const + { + return (gelu ? 2U : 0U) | (relu ? 1U : 0U); + } + + uint64_t hashID(KernelParams const& param) const + { + return hashID(param.gelu, param.relu); + } + + uint64_t hashID(KernelMeta const& kernelMeta) const + { + return hashID(kernelMeta.mGelu, kernelMeta.mRelu); + } +}; + +using Fp8Gemm1x1KernelFactory = TSharedCubinKernelFactory; + +inline Fp8Gemm1x1Kernel const* getFp8Gemm1x1Kernels(int32_t sm) +{ + return Fp8Gemm1x1KernelFactory::Get().getCubinKernels( + sFp8Gemm1x1KernelMetaInfos, sizeof(sFp8Gemm1x1KernelMetaInfos) / sizeof(sFp8Gemm1x1KernelMetaInfos[0]), sm); +} + +#endif // FP8_GEMM_1X1_H diff --git a/3rdparty/fp8_qgmma_1x1/fp8_qgmma_1x1_utils.cu b/3rdparty/fp8_qgmma_1x1/fp8_qgmma_1x1_utils.cu new file mode 100644 index 000000000..566fa7800 --- /dev/null +++ b/3rdparty/fp8_qgmma_1x1/fp8_qgmma_1x1_utils.cu @@ -0,0 +1,155 @@ +/* + * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef CUDART_VERSION +#error CUDART_VERSION Undefined! +#endif + +#define gpuErrChk(ans) \ + { \ + gpuAssert((ans), __FILE__, __LINE__); \ + } +inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort = true) +{ + if (code != cudaSuccess) + { + fprintf(stderr, "GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line); + if (abort) + exit(code); + } +} + +#include + +#include "conv1x1.cuh" +#include "fp8_qgmma_1x1_utils.h" + + +namespace fastertransformer +{ + void invokeSwizzleQgmmaWeights(int C, int K, uint8_t *h_B, uint8_t *d_B, uint16_t *h_bias, uint16_t *d_bias) + { + swizzleQgmmaWeights(C, K, h_B, d_B, h_bias, d_bias); + } + + template + void qgmma1x1Launcher::invokeQgmma1x1(__nv_fp8_e4m3 *res, + int m, + int n, + int k, + const __nv_fp8_e4m3 *input, + const __nv_fp8_e4m3 *kernel, + const __nv_bfloat16 *bias, + const float input_scale, + const float kernel_scale, + const float output_scale, + void *workspace, + cudaStream_t stream) + { + qgmmaDimsKey key(RELU, GELU); + if (launcher_map_.count(key) == 0) + { + launcher_map_[key] = std::make_unique< + Conv1x1>(reinterpret_cast(workspace), stream); + } + + launcher_map_[key]->run(reinterpret_cast(res), + reinterpret_cast(const_cast<__nv_fp8_e4m3 *>(input)), + reinterpret_cast(const_cast<__nv_fp8_e4m3 *>(kernel)), + reinterpret_cast(const_cast<__nv_bfloat16 *>(bias)), + input_scale * kernel_scale, + output_scale, + m, + 1, + 1, + k, + n); + } + + template + void qgmma1x1Launcher::getWorkSpaceSize(int n, + size_t &workspace_size) + { + using Conv1x1Launcher = Conv1x1; + workspace_size = (size_t)(Conv1x1Launcher::getWorkSpaceSize(n)); + } + + template void qgmma1x1Launcher::invokeQgmma1x1(__nv_fp8_e4m3 *res, + int m, + int n, + int k, + const __nv_fp8_e4m3 *input, + const __nv_fp8_e4m3 *kernel, + const __nv_bfloat16 *bias, + const float input_scale, + const float kernel_scale, + const float output_scale, + void *workspace, + cudaStream_t stream); + + template void qgmma1x1Launcher::invokeQgmma1x1(__nv_fp8_e4m3 *res, + int m, + int n, + int k, + const __nv_fp8_e4m3 *input, + const __nv_fp8_e4m3 *kernel, + const __nv_bfloat16 *bias, + const float input_scale, + const float kernel_scale, + const float output_scale, + void *workspace, + cudaStream_t stream); + + template void qgmma1x1Launcher::invokeQgmma1x1(__nv_fp8_e4m3 *res, + int m, + int n, + int k, + const __nv_fp8_e4m3 *input, + const __nv_fp8_e4m3 *kernel, + const __nv_bfloat16 *bias, + const float input_scale, + const float kernel_scale, + const float output_scale, + void *workspace, + cudaStream_t stream); + + template void qgmma1x1Launcher::invokeQgmma1x1(__nv_fp8_e4m3 *res, + int m, + int n, + int k, + const __nv_fp8_e4m3 *input, + const __nv_fp8_e4m3 *kernel, + const __nv_bfloat16 *bias, + const float input_scale, + const float kernel_scale, + const float output_scale, + void *workspace, + cudaStream_t stream); + + template void qgmma1x1Launcher::getWorkSpaceSize(int n, + size_t &workspace_size); + + template void qgmma1x1Launcher::getWorkSpaceSize(int n, + size_t &workspace_size); + + template void qgmma1x1Launcher::getWorkSpaceSize(int n, + size_t &workspace_size); + + template void qgmma1x1Launcher::getWorkSpaceSize(int n, + size_t &workspace_size); +} // namespace fastertransformer \ No newline at end of file diff --git a/3rdparty/fp8_qgmma_1x1/fp8_qgmma_1x1_utils.h b/3rdparty/fp8_qgmma_1x1/fp8_qgmma_1x1_utils.h new file mode 100644 index 000000000..8c65353f9 --- /dev/null +++ b/3rdparty/fp8_qgmma_1x1/fp8_qgmma_1x1_utils.h @@ -0,0 +1,82 @@ +/* + * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include "conv1x1_interface.hpp" +#include +#include + +namespace fastertransformer { + +void invokeSwizzleQgmmaWeights(int C, int K, uint8_t* h_B, uint8_t* d_B, uint16_t* h_bias, uint16_t* d_bias); + +class qgmma1x1Launcher +{ +public: + struct qgmmaDimsKey { + bool relu; + bool gelu; + + // constructor + qgmmaDimsKey(bool relu, bool gelu) + { + this->relu = relu; + this->gelu = gelu; + } + + // `operator==` is required to compare keys in case of a hash collision + bool operator==(const qgmmaDimsKey &p) const { + return relu == p.relu && gelu == p.gelu; + } + }; + + // The specialized hash function for `unordered_map` keys + struct hashQgmmaDimsKey + { + std::size_t operator() (const qgmmaDimsKey &node) const + { + std::size_t h1 = std::hash()(node.relu); + std::size_t h2 = std::hash()(node.gelu); + + return h1 ^ h2; + } + }; + + qgmma1x1Launcher() {} + + template + void invokeQgmma1x1(__nv_fp8_e4m3* res, + int m, + int n, + int k, + const __nv_fp8_e4m3* input, + const __nv_fp8_e4m3* kernel, + const __nv_bfloat16* bias, + const float input_scale, + const float kernel_scale, + const float output_scale, + void* workspace, + cudaStream_t stream); + + template + void getWorkSpaceSize(int n, + size_t& workspace_size); + +private: + std::unordered_map, hashQgmmaDimsKey> launcher_map_; +}; + +} // namespace fastertransformer \ No newline at end of file diff --git a/3rdparty/fp8_qgmma_1x1/parse_profile.py b/3rdparty/fp8_qgmma_1x1/parse_profile.py new file mode 100755 index 000000000..b5a22d537 --- /dev/null +++ b/3rdparty/fp8_qgmma_1x1/parse_profile.py @@ -0,0 +1,74 @@ +import collections +import sys + +colors = ["gray", "darkorange", "limegreen", "royalblue", "lightcoral", "bisque", "forestgreen", "blueviolet", "red", "gold", "cyan", "purple", "saddlebrown", "yellow", "slategray", "magenta", "peachpuff", "darkkhaki", "teal", "pink"] + + +profile = {} + +filename = "profile.txt" +if len(sys.argv) > 1: + filename = sys.argv[1] + +for line in open(filename): + if line.startswith("Tile"): + tile_id = line.split(":")[0].split()[1] + profile[tile_id] = {} + else: + toks = line.strip().split(": ") + if (toks[0] != "sm_id"): + timestamp = int(toks[1]) + profile[tile_id][toks[0]] = int(toks[1]) + +min_time = None +for tile in profile: + if profile[tile]["sm_id"] == 0: + start_time = profile[tile]["scheduler_fetch_start"] + if min_time is None or start_time < min_time: + min_time = start_time + +for tile in profile: + for key in profile[tile]: + if key != "sm_id": + assert(profile[tile][key] is not None) + profile[tile][key] = profile[tile][key] - min_time + +import matplotlib.pyplot as plt +from matplotlib.patches import Rectangle + +fig, ax = plt.subplots() + +max_time = 0 + +tile_offset = 0 + +totals = collections.defaultdict(float) + +for tile_id in profile: + entry = profile[tile_id] + if entry["sm_id"] == 0: + + ax.add_patch(Rectangle((entry["scheduler_fetch_start"],tile_offset),entry["scheduler_fetch_complete"]-entry["scheduler_fetch_start"],0.4,facecolor="blue")) + ax.add_patch(Rectangle((entry["dma_tile_wait_start"],tile_offset),entry["dma_tile_wait_complete"]-entry["dma_tile_wait_start"],0.4,facecolor="red")) + ax.add_patch(Rectangle((entry["dma_tile_wait_complete"],tile_offset),entry["dma_loads_issued"]-entry["dma_tile_wait_complete"],0.4,facecolor="yellow")) + ax.add_patch(Rectangle((entry["compute_tile_wait_start"],tile_offset+.25),entry["compute_tile_wait_complete"]-entry["compute_tile_wait_start"],0.4,facecolor="orange")) + totals["tile_wait"] += entry["compute_tile_wait_complete"]-entry["compute_tile_wait_start"] + ax.add_patch(Rectangle((entry["compute_tile_wait_complete"],tile_offset+.25),entry["compute_first_data_wait_complete"]-entry["compute_tile_wait_complete"],0.4,facecolor="green")) + totals["first_data_wait"] += entry["compute_first_data_wait_complete"]-entry["compute_tile_wait_complete"] + ax.add_patch(Rectangle((entry["compute_first_data_wait_complete"],tile_offset+.25),entry["epilogue_begin"]-entry["compute_first_data_wait_complete"],0.4,facecolor="pink")) + totals["mainloop"] += entry["epilogue_begin"]-entry["compute_first_data_wait_complete"] + ax.add_patch(Rectangle((entry["epilogue_begin"],tile_offset+.25),entry["epilogue_complete"]-entry["epilogue_begin"],0.4,facecolor="grey")) + totals["epilogue"] += entry["epilogue_complete"]-entry["epilogue_begin"] + + if entry["epilogue_complete"] > max_time: + max_time = entry["epilogue_complete"] + tile_offset += 1 + +for k in ("tile_wait", "first_data_wait", "mainloop", "epilogue"): + mean = float(totals[k])/tile_offset + print("%s mean: %.02f"%(k,mean)) + +plt.xlim([0,max_time]) +plt.ylim([0,tile_offset+1]) +plt.show() + diff --git a/3rdparty/fp8_qgmma_1x1/scheduler.cuh b/3rdparty/fp8_qgmma_1x1/scheduler.cuh new file mode 100755 index 000000000..951c8d188 --- /dev/null +++ b/3rdparty/fp8_qgmma_1x1/scheduler.cuh @@ -0,0 +1,57 @@ +#include "fp8_gemm_1x1.h" + +template +struct DynamicScheduler { + + struct Host { + dim3 _grid; + dim3 _cga; + SchedulerParams _params; + Host(uint8_t** workspace, cudaStream_t stream) { + cudaDeviceProp prop; + gpuErrChk(cudaGetDeviceProperties(&prop,0)); + + _grid = dim3(prop.multiProcessorCount,1,1); + _cga = dim3(2,1,1); + + if (PERSISTENT_WEIGHTS) + { + throw std::runtime_error("Persistent weights are currently not supported by the interface"); + } + + int num_tile_counters = 1; + + _params.tile_counter = reinterpret_cast(*workspace); + *workspace += num_tile_counters * sizeof(int); + _params.cta_completion_counter = reinterpret_cast(*workspace); + *workspace += sizeof(int); + } + + __host__ void configure(int N, int P, int Q, int K) + { + _params.tiles_n = (K+TILE_N-1)/TILE_N; + _params.tiles_n /= CTAS_PER_CGA; + + _params.tiles_m = (N*P*Q+TILE_M-1)/TILE_M; + _params.num_tiles = _params.tiles_m*_params.tiles_n; + } + + static __host__ uint32_t getWorkSpaceSize(int K) + { + if (PERSISTENT_WEIGHTS) + { + throw std::runtime_error("Persistent weights are currently not supported by the interface"); + } + + int tiles_n = (K+TILE_N-1)/TILE_N; + tiles_n /= CTAS_PER_CGA; + int num_tile_counters = PERSISTENT_WEIGHTS ? tiles_n : 1; + return num_tile_counters * sizeof(int) + sizeof(int); + } + + __host__ dim3 grid() { return _grid; } + __host__ dim3 cga() { return _cga; } + __host__ SchedulerParams params() { return _params; } + }; +}; + diff --git a/3rdparty/fp8_qgmma_1x1/sharedCubinLoader.h b/3rdparty/fp8_qgmma_1x1/sharedCubinLoader.h new file mode 100755 index 000000000..97eeb80cf --- /dev/null +++ b/3rdparty/fp8_qgmma_1x1/sharedCubinLoader.h @@ -0,0 +1,182 @@ +/* + * Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef SHARED_CUBIN_LOADER_H +#define SHARED_CUBIN_LOADER_H + +#include "3rdparty/common/cudaDriverWrapper.h" +#include +#include +#include +#include +#include +#include +#include + +template +class TSharedCubinKernel +{ +public: + using KernelMeta = TKernelMeta; + using KernelParam = TKernelParam; + + virtual uint64_t hashID(KernelMeta const& kernelMeta) const = 0; + virtual uint64_t hashID(TKernelParam const& param) const = 0; + + TSharedCubinKernel(TKernelMeta const* pMetaStart, int32_t nMetaCount, int32_t sm) + : mKernelMeta(pMetaStart) + , mKernelMetaCount(nMetaCount) + , mSM(sm) + { + gpuErrChk(cudaGetDeviceProperties(&mProp, 0)); + } + + void loadCubinKernels(int32_t smVersion) + { + for (int32_t i = 0; i < mKernelMetaCount; ++i) + { + auto const& kernelMeta = mKernelMeta[i]; + auto const kernelKey = hashID(kernelMeta); + if (kernelMeta.mSM == smVersion + && mFunctions.find(kernelKey) == mFunctions.end()) + { + int32_t const DEFAULT_SMEM_SIZE{48 * 1024}; + if (kernelMeta.mSharedMemBytes >= DEFAULT_SMEM_SIZE) + { + int32_t deviceID{0}; + cudaGetDevice(&deviceID); + int32_t sharedMemPerMultiprocessor{0}; + if (cudaDeviceGetAttribute( + &sharedMemPerMultiprocessor, cudaDevAttrMaxSharedMemoryPerBlockOptin, deviceID) + != cudaSuccess + || sharedMemPerMultiprocessor < kernelMeta.mSharedMemBytes) + { + // skip load function because not enough shared memory to launch the kernel + continue; + } + } + + CUmodule hmod{0}; + auto findModuleIter = mModules.find(kernelMeta.mCubin); + if (findModuleIter != mModules.end()) + { + hmod = findModuleIter->second; + } + else + { + cuErrCheck(mDriver.cuModuleLoadData(&hmod, kernelMeta.mCubin), mDriver); + mModules.insert(std::make_pair(kernelMeta.mCubin, hmod)); + } + + Fp8Gemm1x1KernelInfo funcInfo; + funcInfo.mMetaInfoIndex = i; + cuErrCheck(mDriver.cuModuleGetFunction(&funcInfo.mDeviceFunction, hmod, kernelMeta.mFuncName), mDriver); + if (kernelMeta.mSharedMemBytes >= DEFAULT_SMEM_SIZE) + { + if (mDriver.cuFuncSetAttribute(funcInfo.mDeviceFunction, + CU_FUNC_ATTRIBUTE_MAX_DYNAMIC_SHARED_SIZE_BYTES, kernelMeta.mSharedMemBytes) + != CUDA_SUCCESS) + { + // some chip may not have enough shared memory to launch the kernel + continue; + } + } + mFunctions.insert({kernelKey, funcInfo}); + } + } + } + + void loadCubinKernels() + { + if (!mFunctions.empty()) + { + return; + } + + loadCubinKernels(mSM); + } + + virtual void run(TKernelParam& params, cudaStream_t ss) const + { + auto const findIter = mFunctions.find(hashID(params)); + auto const& kernelMeta = mKernelMeta[findIter->second.mMetaInfoIndex]; + CUfunction const func = findIter->second.mDeviceFunction; + + void* kernelParams[] = {¶ms, nullptr}; + cuErrCheck(mDriver.cuLaunchKernel(func, mProp.multiProcessorCount, 1, 1, kernelMeta.mThreadsPerCTA, 1, 1, + kernelMeta.mSharedMemBytes, ss, kernelParams, nullptr), + mDriver); + } + + virtual ~TSharedCubinKernel() = default; + +protected: + cudaDeviceProp mProp; + + CUDADriverWrapper mDriver; + + TKernelMeta const* mKernelMeta; + int32_t mKernelMetaCount; + int32_t mSM; + std::unordered_map mModules; + struct Fp8Gemm1x1KernelInfo + { + int32_t mMetaInfoIndex; + CUfunction mDeviceFunction; + }; + std::unordered_map mFunctions; +}; + +template +class TSharedCubinKernelFactory +{ +public: + TKernelList const* getCubinKernels( + typename TKernelList::KernelMeta const* pKernelList, int32_t nbKernels, int32_t sm) + { + static std::mutex sMutex; + std::lock_guard lg(sMutex); + + auto const id = hashID(sm); + auto const findIter = mKernels.find(id); + if (findIter == mKernels.end()) + { + auto* newKernel = new TKernelList{pKernelList, nbKernels, sm}; + newKernel->loadCubinKernels(); + mKernels.insert(std::make_pair(id, std::unique_ptr(newKernel))); + return newKernel; + } + return findIter->second.get(); + } + + static TSharedCubinKernelFactory& Get() + { + static TSharedCubinKernelFactory gFactory; + return gFactory; + } + +private: + TSharedCubinKernelFactory() = default; + + inline uint64_t hashID(int32_t sm) const + { + return (uint64_t)sm; + } + + std::unordered_map const> mKernels; +}; + +#endif // SHARED_CUBIN_LOADER_H diff --git a/3rdparty/fp8_qgmma_1x1/tile_profile.cuh b/3rdparty/fp8_qgmma_1x1/tile_profile.cuh new file mode 100755 index 000000000..03f94a40d --- /dev/null +++ b/3rdparty/fp8_qgmma_1x1/tile_profile.cuh @@ -0,0 +1,24 @@ +#ifndef TILE_PROFILE_CUH +#define TILE_PROFILE_CUH + +struct tile_profile { + uint64_t scheduler_fetch_start; + uint64_t scheduler_fetch_complete; + uint64_t dma_tile_wait_start; + uint64_t dma_tile_wait_complete; + uint64_t dma_loads_issued; + uint64_t compute_tile_wait_start; + uint64_t compute_tile_wait_complete; + uint64_t compute_first_data_wait_complete; + uint64_t epilogue_begin; + uint64_t epilogue_complete; + int sm_id; +}; + +struct ProfileParams { + int num_tiles; + int tiles_n; + tile_profile* profile; +}; + +#endif // TILE_PROFILE_CUH \ No newline at end of file diff --git a/3rdparty/fp8_qgmma_1x1/traits.h b/3rdparty/fp8_qgmma_1x1/traits.h new file mode 100755 index 000000000..df3a8ecff --- /dev/null +++ b/3rdparty/fp8_qgmma_1x1/traits.h @@ -0,0 +1,64 @@ +#ifndef TRAITS_H +#define TRAITS_H + +#include "scheduler.cuh" +#include "dma.cuh" +#include "compute.cuh" + +template< + int TILE_M_, + int TILE_N_, + int TILE_K_, + int STAGES_, + bool PERSISTENT_WEIGHTS_, + int CTAS_PER_CGA_, + bool PROFILE_ENABLED_, + bool USE_COMPUTE_MUTEX_, + bool MULTICAST_, + bool INTERLEAVED_, + bool RELU_, + bool GELU_ +> +struct Kernel_traits_ { + + // The version. + enum { TILE_M = TILE_M_ }; + enum { TILE_N = TILE_N_ }; + enum { TILE_K = TILE_K_ }; + enum { STAGES = STAGES_ }; + enum { CTAS_PER_CGA = CTAS_PER_CGA_ }; + enum : bool { PERSISTENT_WEIGHTS = PERSISTENT_WEIGHTS_ }; + enum : bool { PROFILE_ENABLED = PROFILE_ENABLED_ }; + enum : bool { USE_COMPUTE_MUTEX = USE_COMPUTE_MUTEX_ }; + enum : bool { MULTICAST = MULTICAST_ }; + enum : bool { INTERLEAVED = INTERLEAVED_ }; + enum : bool { RELU = RELU_ }; + enum : bool { GELU = GELU_ }; + + using Scheduler = DynamicScheduler; + using Dma = DMA; + using Compute = Compute; +}; + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +template< + bool RELU = false, + bool GELU = false +> +using Kernel_traits_v1 = Kernel_traits_<128, + 128, + 128, + 6, + false, + 1, + false, + true, + false, + false, + RELU, + GELU>; + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +#endif // TRAITS_H \ No newline at end of file diff --git a/3rdparty/fp8_qgmma_1x1/utils.h b/3rdparty/fp8_qgmma_1x1/utils.h new file mode 100755 index 000000000..581893300 --- /dev/null +++ b/3rdparty/fp8_qgmma_1x1/utils.h @@ -0,0 +1,433 @@ +#ifndef UTILS_H +#define UTILS_H + +#include +#include +#include + +#define gpuErrChk(ans) { gpuAssert((ans), __FILE__, __LINE__); } + +typedef struct alignas(64) { + uint64_t data[8]; +} cudaTmaDesc; + +typedef enum { TILED = 0, IM2COL } cudaTmaDescType; + +typedef enum { SWIZZLE_DISABLED, SWIZZLE_32B, SWIZZLE_64B, SWIZZLE_128B, SWIZZLE_MAX } cudaTmaDescSwizzle; + +typedef enum { + INTERLEAVE_DISABLED, + INTERLEAVE_16B, + INTERLEAVE_32B, + INTERLEAVE_MAX +} cudaTmaDescInterleave; + +typedef enum { + PROMOTION_DISABLED = 0, + PROMOTION_64B, + PROMOTION_128B, + PROMOTION_256B +} cudaTmaDescPromotion; + +typedef enum { + U8 = 0, + U16, + U32, + S32, + U64, + S64, + F16_RN, + F32_RN, + F32_FTZ_RN, + F64_RN, + BF16_RN, + FORMAT_MAX +} cudaTmaDescFormat; + +typedef struct { + uint64_t tensor_common0; + uint32_t tensor_common1; + + uint32_t tensor_stride_lower[4]; //< 36b of 64b with 4B aligned + uint32_t tensor_stride_upper; + uint32_t tensor_size[5]; //< value -1 + uint32_t traversal_stride_box_0; //< packed 3b (-1) + + uint32_t box_size_end; +} cudaTmaDescTiled; + +typedef struct { + uint64_t tensor_common0; + uint32_t tensor_common1; + + uint32_t tensor_stride_lower[4]; + uint32_t tensor_stride_upper; + uint32_t tensor_size[5]; + uint32_t traversal_stride_range_c; + + uint32_t box_corner_dhw; + uint32_t range_ndhw; +} cudaTmaDescIm2Col; + + +static inline void set_tensor_common_0( cudaTmaDesc *p_desc, uint64_t addr ) { + cudaTmaDescTiled *desc = reinterpret_cast( p_desc ); + desc->tensor_common0 = 0; + desc->tensor_common0 |= ( addr ); +} + +static inline void set_tensor_common_1( cudaTmaDesc *p_desc, + cudaTmaDescType desc_type, + uint32_t dims, + cudaTmaDescFormat format, + cudaTmaDescInterleave interleave, + cudaTmaDescSwizzle swizzle, + uint32_t fill, + uint32_t f32_to_tf32, + cudaTmaDescPromotion promotion ) { + cudaTmaDescTiled *desc = reinterpret_cast( p_desc ); + + desc->tensor_common1 = 0; + desc->tensor_common1 |= desc_type == TILED ? 0x0 : 0x1; + + constexpr uint32_t VERSION_SHIFT = 1; + constexpr uint32_t VERSION_BITS = 3; + desc->tensor_common1 |= ( 1u << VERSION_SHIFT ); + + constexpr uint32_t DIM_BITS = 3; + constexpr uint32_t DIM_SHIFT = VERSION_SHIFT + VERSION_BITS; + constexpr uint32_t DIM_MASK = ( 1u << DIM_BITS ) - 1; + desc->tensor_common1 |= ( ( dims - 1 ) & DIM_MASK ) << DIM_SHIFT; + + constexpr uint32_t FORMAT_BITS = 4; + constexpr uint32_t FORMAT_SHIFT = DIM_SHIFT + DIM_BITS; + constexpr uint32_t FORMAT_MASK = ( 1u << FORMAT_BITS ) - 1; + desc->tensor_common1 |= ( static_cast( format ) & FORMAT_MASK ) << FORMAT_SHIFT; + + constexpr uint32_t INTERLEAVE_BITS = 2; + constexpr uint32_t INTERLEAVE_SHIFT = FORMAT_SHIFT + FORMAT_BITS; + constexpr uint32_t INTERLEAVE_MASK = ( 1u << INTERLEAVE_BITS ) - 1; + desc->tensor_common1 |= ( static_cast( interleave ) & INTERLEAVE_MASK ) + << INTERLEAVE_SHIFT; + + constexpr uint32_t SWIZZLE_BITS = 2; + constexpr uint32_t SWIZZLE_SHIFT = INTERLEAVE_SHIFT + INTERLEAVE_BITS; + constexpr uint32_t SWIZZLE_MASK = ( 1u << SWIZZLE_BITS ) - 1; + desc->tensor_common1 |= ( static_cast( swizzle ) & SWIZZLE_MASK ) << SWIZZLE_SHIFT; + + constexpr uint32_t FILL_BITS = 1; + constexpr uint32_t FILL_SHIFT = SWIZZLE_SHIFT + SWIZZLE_BITS; + constexpr uint32_t FILL_MASK = ( 1u << FILL_BITS ) - 1; + desc->tensor_common1 |= ( static_cast( fill ) & FILL_MASK ) << FILL_SHIFT; + + constexpr uint32_t F32_TO_TF32_BITS = 1; + constexpr uint32_t F32_TO_TF32_SHIFT = FILL_SHIFT + FILL_BITS; + constexpr uint32_t F32_TO_TF32_MASK = ( 1u << F32_TO_TF32_BITS ) - 1; + desc->tensor_common1 |= ( static_cast( f32_to_tf32 ) & F32_TO_TF32_MASK ) + << F32_TO_TF32_SHIFT; + + constexpr uint32_t PROMOTION_BITS = 2; + constexpr uint32_t PROMOTION_SHIFT = F32_TO_TF32_SHIFT + F32_TO_TF32_BITS; + constexpr uint32_t PROMOTION_MASK = ( 1u << PROMOTION_BITS ) - 1; + desc->tensor_common1 |= ( static_cast( promotion ) & PROMOTION_MASK ) + << PROMOTION_SHIFT; +} + +static inline void +set_tensor_stride( cudaTmaDesc *p_desc, uint64_t *p_tensor_stride, uint32_t dims ) { + cudaTmaDescTiled *desc = reinterpret_cast( p_desc ); + + constexpr uint32_t TENSOR_STRIDE_UPPER_BITS = 4; + constexpr uint32_t TENSOR_STRIDE_UPPER_MASK = ( 1u << TENSOR_STRIDE_UPPER_BITS ) - 1; + + for( uint32_t i = 0; i < dims - 1; i++ ) { + desc->tensor_stride_lower[i] = 0u; + uint64_t tensor_stride_lower_64b = (p_tensor_stride[i] >> 4) & 0xFFFFFFFFlu; + desc->tensor_stride_lower[i] = static_cast(tensor_stride_lower_64b); + } + desc->tensor_stride_upper = 0u; + + for( uint32_t i = 0; i < dims - 1; i++ ) { + uint64_t tensor_stride = p_tensor_stride[i]; + tensor_stride = tensor_stride >> 4; + uint64_t tensor_stride_upper = tensor_stride >> 32; + uint32_t tensor_stride_upper_32b = static_cast( tensor_stride_upper ); + desc->tensor_stride_upper |= ( ( tensor_stride_upper_32b & TENSOR_STRIDE_UPPER_MASK ) + << ( i * TENSOR_STRIDE_UPPER_BITS ) ); + } +} + +static inline void +set_tensor_size( cudaTmaDesc *p_desc, uint32_t *p_tensor_size, uint32_t dims ) { + cudaTmaDescTiled *desc = reinterpret_cast( p_desc ); + for( uint32_t dim = 0; dim < dims; dim++ ) { + desc->tensor_size[dim] = p_tensor_size[dim] - 1; + } +} + +static inline void +set_traversal_stride_tiled( cudaTmaDesc *p_desc, uint32_t *p_traversal_stride, uint32_t dims ) { + cudaTmaDescTiled *desc = reinterpret_cast( p_desc ); + + desc->traversal_stride_box_0 = 0; + + constexpr uint32_t TRAVERSAL_STRIDE_BITS = 3; + constexpr uint32_t TRAVERSAL_STRIDE_MASK = ( 1u << TRAVERSAL_STRIDE_BITS ) - 1; + + for( uint32_t dim = 0; dim < dims; dim++ ) { + uint32_t traversal_stride = p_traversal_stride[dim] - 1; + traversal_stride = ( traversal_stride & TRAVERSAL_STRIDE_MASK ) + << ( dim * TRAVERSAL_STRIDE_BITS ); + desc->traversal_stride_box_0 |= traversal_stride; + } +} + +static inline void set_box_size( cudaTmaDesc *p_desc, uint32_t *p_box_size, uint32_t dims ) { + cudaTmaDescTiled *desc = reinterpret_cast( p_desc ); + + desc->box_size_end = 0; + + constexpr uint32_t BOX_SIZE_BITS = 8; + constexpr uint32_t BOX_SIZE_MASK = ( 1 << BOX_SIZE_BITS ) - 1; + + if( dims > 1 ) { + uint32_t box_size_0 = p_box_size[0] - 1; + box_size_0 = box_size_0 & BOX_SIZE_MASK; + box_size_0 = box_size_0 << 24; + desc->traversal_stride_box_0 |= box_size_0; + } + + for( uint32_t dim = 1; dim < dims; dim++ ) { + uint32_t box_size = p_box_size[dim] - 1; + box_size = box_size & BOX_SIZE_MASK; + box_size = box_size << ( ( dim - 1 ) * BOX_SIZE_BITS ); + desc->box_size_end |= box_size; + } +} + +static inline void +set_traversal_stride_im2col( cudaTmaDesc *p_desc, uint32_t *p_traversal_stride, uint32_t dims ) { + + cudaTmaDescIm2Col *desc = reinterpret_cast( p_desc ); + + desc->traversal_stride_range_c = 0; + + constexpr uint32_t TRAVERSAL_STRIDE_BITS = 3; + constexpr uint32_t TRAVERSAL_STRIDE_MASK = ( 1u << ( TRAVERSAL_STRIDE_BITS + 1 ) ) - 1; + + for( uint32_t dim = 0; dim < dims; dim++ ) { + uint32_t traversal_stride = p_traversal_stride[dim] - 1; + traversal_stride = ( traversal_stride & TRAVERSAL_STRIDE_MASK ) + << ( dim * TRAVERSAL_STRIDE_BITS ); + desc->traversal_stride_range_c |= traversal_stride; + } +} + + +static inline void set_range_c( cudaTmaDesc *p_desc, uint32_t range_c ) { + cudaTmaDescIm2Col *desc = reinterpret_cast( p_desc ); + + constexpr uint32_t RANGE_C_BITS = 8; + constexpr uint32_t RANGE_C_MASK = ( 1u << RANGE_C_BITS ) - 1; + + range_c = range_c & RANGE_C_MASK; + desc->traversal_stride_range_c |= ( ( range_c - 1 ) << 24 ); +} + +static inline void set_box_corner_dhw( cudaTmaDesc *p_desc, + uint32_t *p_base_corner, + uint32_t *p_far_corner, + uint32_t dims ) { + cudaTmaDescIm2Col *desc = reinterpret_cast( p_desc ); + + desc->box_corner_dhw = 0; + + uint32_t box_base_corner = 0, box_far_corner = 0; + uint32_t box_corner_dhw = 0; + + if( dims == 3 ) { + constexpr uint32_t BOX_CORNER_BITS = 16; + constexpr uint32_t BOX_CORNER_MASK = ( 1u << BOX_CORNER_BITS ) - 1; + + box_base_corner = p_base_corner[0] & BOX_CORNER_MASK; + box_far_corner = p_far_corner[0] & BOX_CORNER_MASK; + } + + if( dims == 4 ) { + constexpr uint32_t BOX_CORNER_BITS = 8; + constexpr uint32_t BOX_CORNER_MASK = ( 1u << BOX_CORNER_BITS ) - 1; + + box_base_corner = p_base_corner[0] & BOX_CORNER_MASK; + box_base_corner |= ( ( p_base_corner[1] & BOX_CORNER_MASK ) << BOX_CORNER_BITS ); + + box_far_corner = p_far_corner[0] & BOX_CORNER_MASK; + box_far_corner |= ( ( p_far_corner[1] & BOX_CORNER_MASK ) << BOX_CORNER_BITS ); + } + + if( dims == 5 ) { + constexpr uint32_t BOX_CORNER_BITS = 5; + constexpr uint32_t BOX_CORNER_MASK = ( 1u << BOX_CORNER_BITS ) - 1; + + box_base_corner = p_base_corner[0] & BOX_CORNER_MASK; + box_base_corner |= ( ( p_base_corner[1] & BOX_CORNER_MASK ) << BOX_CORNER_BITS ); + box_base_corner |= ( ( p_base_corner[2] & BOX_CORNER_MASK ) << ( 2 * BOX_CORNER_BITS ) ); + + box_far_corner = p_far_corner[0] & BOX_CORNER_MASK; + box_far_corner |= ( ( p_far_corner[1] & BOX_CORNER_MASK ) << BOX_CORNER_BITS ); + box_far_corner |= ( ( p_far_corner[2] & BOX_CORNER_MASK ) << ( 2 * BOX_CORNER_BITS ) ); + } + + box_corner_dhw = box_base_corner; + box_corner_dhw |= ( box_far_corner << 16 ); + + desc->box_corner_dhw = box_corner_dhw; +} + +static inline void set_range_ndhw( cudaTmaDesc *p_desc, uint32_t ndhw ) { + cudaTmaDescIm2Col *desc = reinterpret_cast( p_desc ); + + desc->range_ndhw = 0; + + constexpr uint32_t RANGE_NDHW_BITS = 10; + constexpr uint32_t RANGE_NDHW_MASK = ( 1u << RANGE_NDHW_BITS ) - 1; + + desc->range_ndhw = ( ( ndhw - 1 ) & RANGE_NDHW_MASK ); + +} + +static inline cudaError cudaSetTmaTileDescriptor( cudaTmaDesc *p_desc, + const void *p_addr, + uint32_t dims, + cudaTmaDescFormat format, + cudaTmaDescInterleave interleave, + cudaTmaDescSwizzle swizzle, + cudaTmaDescPromotion promotion, + uint32_t *p_tensor_size, + uint64_t *p_tensor_stride, + uint32_t *p_traversal_stride, + uint32_t *p_box_size, + uint32_t fill_oob, + uint32_t round_to_tf32 ) { + + set_tensor_common_0( p_desc, reinterpret_cast( p_addr ) ); + set_tensor_common_1( p_desc, + TILED, + dims, + format, + interleave, + swizzle, + fill_oob, + round_to_tf32, + promotion ); + + set_tensor_stride( p_desc, p_tensor_stride, dims ); + set_tensor_size( p_desc, p_tensor_size, dims ); + + set_traversal_stride_tiled( p_desc, p_traversal_stride, dims ); + + set_box_size( p_desc, p_box_size, dims ); + return cudaSuccess; +} + +static inline cudaError cudaSetTmaIm2ColDescriptor( cudaTmaDesc *p_desc, + const void *p_addr, + uint32_t dims, + cudaTmaDescFormat format, + cudaTmaDescInterleave interleave, + cudaTmaDescSwizzle swizzle, + cudaTmaDescPromotion promotion, + uint32_t *p_tensor_size, + uint64_t *p_tensor_stride, + uint32_t *p_traversal_stride, + uint32_t range_c, + uint32_t range_ndhw, + int32_t *p_box_base_corner_dhw, + int32_t *p_box_far_corner_dhw, + uint32_t fill_oob, + uint32_t round_to_f32 ) { + + set_tensor_common_0( p_desc, reinterpret_cast( p_addr ) ); + set_tensor_common_1( p_desc, + IM2COL, + dims, + format, + interleave, + swizzle, + fill_oob, + round_to_f32, + promotion ); + + set_tensor_stride( p_desc, p_tensor_stride, dims ); + set_tensor_size( p_desc, p_tensor_size, dims ); + + set_traversal_stride_im2col( p_desc, p_traversal_stride, dims ); + + set_range_c( p_desc, range_c ); + set_box_corner_dhw( p_desc, + reinterpret_cast( p_box_base_corner_dhw ), + reinterpret_cast( p_box_far_corner_dhw ), + dims ); + set_range_ndhw( p_desc, range_ndhw ); + return cudaSuccess; +} + +static inline cudaError cudaSetDescriptorGmem(cudaTmaDesc* p_desc, const void* p_addr) +{ + set_tensor_common_0(p_desc, reinterpret_cast(p_addr)); + return cudaSuccess; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline int clz(int x) { + for( int i = 31; i >= 0; --i ) { + if( (1 << i) & x ) { + return 31 - i; + } + } + return 32; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline int find_log_2(int x, bool round_up = false) { + int a = 31 - clz(x); + if( round_up ) { + a += (x & (x-1)) ? 1 : 0; + } + return a; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline void find_divisor(uint32_t &mul, uint32_t &shr, int x) { + assert(x != 0); + if( x == 1 ) { + // If dividing by 1, reduced math doesn't work because mul_coeff would need to be 2^32, + // which doesn't fit into unsigned int. the div() routine handles this special case + // separately. + mul = 0; + shr = 0; + } else { + // To express the division N/D in terms of a multiplication, what we first + // imagine is simply N*(1/D). However, 1/D will always evaluate to 0 (for D>1), + // so we need another way. There's nothing that says we have to use exactly + // the fraction 1/D; instead it could be any X/Y that reduces to 1/D (i.e., + // Y=X*D), or at least to "close enough" to it. If we pick Y that is a power + // of two, then the N*(X/Y) can be N*X followed by a right-shift by some amount. + // The power of two we should pick should be at least 2^32, because in the + // div() routine we'll use umulhi(), which returns only the upper 32 bits -- + // this being equivalent to a right-shift by 32. But we might want a higher + // power of two for better accuracy depending on the magnitude of the denominator. + // Once we've picked Y, then X [our mul_coeff value] is simply Y/D, rounding up, + // and we save shift_coeff as whatever further shift we have to do beyond + // what the umulhi() implies. + uint32_t p = 31 + find_log_2(x, true); + uint32_t m = (uint32_t)(((1ull << p) + (uint32_t) x - 1) / (uint32_t) x); + + mul = m; + shr = p - 32; + } +} + +#endif // UTILS_H \ No newline at end of file diff --git a/3rdparty/trt_fp8_fmha/fused_multihead_attention.h b/3rdparty/trt_fp8_fmha/fused_multihead_attention.h new file mode 100644 index 000000000..acb3977b1 --- /dev/null +++ b/3rdparty/trt_fp8_fmha/fused_multihead_attention.h @@ -0,0 +1,235 @@ +/* + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once +#include "../trt_fused_multihead_attention/fused_multihead_attention.h" +#include "../../src/fastertransformer/utils/cuda_utils.h" +#include "../trt_fused_multihead_attention/fused_multihead_attention_common.h" +#include +#include + +namespace fastertransformer{ +struct Fused_multihead_attention_params_base { + // The QKV matrices. + void *qkv_ptr; + // The O matrix (output). + void *o_ptr; + + // The stride between rows of the Q, K and V matrices. + int64_t qkv_stride_in_bytes; + // The stride between rows of O. + int64_t o_stride_in_bytes; + +#if defined(STORE_P) + // The pointer to the P matrix (for debugging). + void *p_ptr; + // The stride between rows of the P matrix (for debugging). + int64_t p_stride_in_bytes; +#endif // defined(STORE_P) + +#if defined(STORE_S) + // The pointer to the S matrix (for debugging). + void *s_ptr; + // The stride between rows of the S matrix (for debugging). + int64_t s_stride_in_bytes; +#endif // defined(STORE_S) + + +#if defined(DEBUG_HAS_PRINT_BUFFER) + void *print_ptr; +#endif + + // The dimensions. + int b, h, s, d; + // The scaling factors for the kernel. + uint32_t scale_bmm1, scale_softmax, scale_bmm2; + + // Do we use Niall's trick to avoid I2F/F2I in the INT8 kernel. + // See https://confluence.nvidia.com/pages/viewpage.action?pageId=302779721 for details. + bool enable_i2f_trick; + + // true: for int8, instead of doing max reduce, use max value encoded in scale factor + bool use_int8_scale_max = false; + + // The number of heads computed by one iteration of the wave. + int heads_per_wave; + // Buffers to perform a global sync and a critical section. + int *counters, *max_barriers, *sum_barriers, *locks; + // Scratch buffers to finalize softmax. + float *max_scratch_ptr, *sum_scratch_ptr; + // Scratch buffer to finalize the output (not needed for FP16). + int *o_scratch_ptr; +}; + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +struct Fused_multihead_attention_params_v1 : Fused_multihead_attention_params_base { + // The mask to implement drop-out. + void *packed_mask_ptr; + + // The stride between matrices of packed mask. + int64_t packed_mask_stride_in_bytes; +}; + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +struct Fused_multihead_attention_params_FP8_v2 : Fused_multihead_attention_params_base { + // array of length b+1 holding prefix sum of actual sequence lenghts. + int *cu_seqlens; + // use C/32 Format. + bool interleaved = false; + + // flags to control small batch kernel choice + // true: never unroll + bool ignore_b1opt = false; + // true: always unroll + bool force_unroll = false; + // by default TMA is not used. + bool use_tma = false; + // when we use TMA we need to know the actual seqlens to set the TMA desc. + uint32_t *seqlens; +}; + +//////////////////////////////////////////////////////////////////////////////////////////////////// +extern unsigned char cubin_fmha_v2_e4m3_128_64_ldgsts_sm90_cu_cubin[]; +extern unsigned char cubin_fmha_v2_e4m3_192_64_ldgsts_sm90_cu_cubin[]; +extern unsigned char cubin_fmha_v2_e4m3_256_64_ldgsts_sm90_cu_cubin[]; +extern unsigned char cubin_fmha_v2_e4m3_384_64_ldgsts_sm90_cu_cubin[]; +extern unsigned char cubin_fmha_v2_e4m3_512_64_ldgsts_sm90_cu_cubin[]; + +extern unsigned int cubin_fmha_v2_e4m3_128_64_ldgsts_sm90_cu_cubin_len; +extern unsigned int cubin_fmha_v2_e4m3_192_64_ldgsts_sm90_cu_cubin_len; +extern unsigned int cubin_fmha_v2_e4m3_256_64_ldgsts_sm90_cu_cubin_len; +extern unsigned int cubin_fmha_v2_e4m3_384_64_ldgsts_sm90_cu_cubin_len; +extern unsigned int cubin_fmha_v2_e4m3_512_64_ldgsts_sm90_cu_cubin_len; + +static const struct FusedMultiHeadAttentionKernelMetaInfoFP8V2 +{ + Data_type mDataType; + unsigned int mS; + unsigned int mD; + unsigned int mSM; + const unsigned char* mCubin; + unsigned int mCubinSize; + const char* mFuncName; + unsigned int mSharedMemBytes; + unsigned int mThreadsPerCTA; + unsigned int mUnrollStep; + bool mInterleaved; +} sMhaKernelMetaInfosFP8V2[] = { +#if CUDA_VERSION >= 11080 + // Hopper + {DATA_TYPE_E4M3, 128, 64, kSM_90, cubin_fmha_v2_e4m3_128_64_ldgsts_sm90_cu_cubin, + cubin_fmha_v2_e4m3_128_64_ldgsts_sm90_cu_cubin_len, + "fmha_v2_e4m3_128_64_ldgsts_sm90_kernel_nl", 25600, 128, 64, false}, + {DATA_TYPE_E4M3, 192, 64, kSM_90, cubin_fmha_v2_e4m3_192_64_ldgsts_sm90_cu_cubin, + cubin_fmha_v2_e4m3_192_64_ldgsts_sm90_cu_cubin_len, + "fmha_v2_e4m3_192_64_ldgsts_sm90_kernel_nl", 33792, 128, 64, false}, + {DATA_TYPE_E4M3, 256, 64, kSM_90, cubin_fmha_v2_e4m3_256_64_ldgsts_sm90_cu_cubin, + cubin_fmha_v2_e4m3_256_64_ldgsts_sm90_cu_cubin_len, + "fmha_v2_e4m3_256_64_ldgsts_sm90_kernel_nl", 41984, 128, 64, false}, + {DATA_TYPE_E4M3, 384, 64, kSM_90, cubin_fmha_v2_e4m3_384_64_ldgsts_sm90_cu_cubin, + cubin_fmha_v2_e4m3_384_64_ldgsts_sm90_cu_cubin_len, + "fmha_v2_e4m3_384_64_ldgsts_sm90_kernel_nl", 58368, 128, 64, false}, + {DATA_TYPE_E4M3, 512, 64, kSM_90, cubin_fmha_v2_e4m3_512_64_ldgsts_sm90_cu_cubin, + cubin_fmha_v2_e4m3_512_64_ldgsts_sm90_cu_cubin_len, + "fmha_v2_e4m3_512_64_ldgsts_sm90_kernel_nl", 108032, 256, 64, false}, + {DATA_TYPE_E4M3, 128, 64, kSM_90, cubin_fmha_v2_e4m3_128_64_ldgsts_sm90_cu_cubin, + cubin_fmha_v2_e4m3_128_64_ldgsts_sm90_cu_cubin_len, + "fmha_v2_e4m3_128_64_ldgsts_sm90_kernel", 25600, 128, 0, false}, + {DATA_TYPE_E4M3, 192, 64, kSM_90, cubin_fmha_v2_e4m3_192_64_ldgsts_sm90_cu_cubin, + cubin_fmha_v2_e4m3_192_64_ldgsts_sm90_cu_cubin_len, + "fmha_v2_e4m3_192_64_ldgsts_sm90_kernel", 33792, 128, 0, false}, + {DATA_TYPE_E4M3, 256, 64, kSM_90, cubin_fmha_v2_e4m3_256_64_ldgsts_sm90_cu_cubin, + cubin_fmha_v2_e4m3_256_64_ldgsts_sm90_cu_cubin_len, + "fmha_v2_e4m3_256_64_ldgsts_sm90_kernel", 41984, 128, 0, false}, + {DATA_TYPE_E4M3, 384, 64, kSM_90, cubin_fmha_v2_e4m3_384_64_ldgsts_sm90_cu_cubin, + cubin_fmha_v2_e4m3_384_64_ldgsts_sm90_cu_cubin_len, + "fmha_v2_e4m3_384_64_ldgsts_sm90_kernel", 58368, 128, 0, false}, + {DATA_TYPE_E4M3, 512, 64, kSM_90, cubin_fmha_v2_e4m3_512_64_ldgsts_sm90_cu_cubin, + cubin_fmha_v2_e4m3_512_64_ldgsts_sm90_cu_cubin_len, + "fmha_v2_e4m3_512_64_ldgsts_sm90_kernel", 108032, 256, 0, false}, +#endif +}; + +class FusedMultiHeadAttentionXMMAKernelFP8V2 + : public TFusedMultiHeadAttentionXMMAKernel +{ +public: + FusedMultiHeadAttentionXMMAKernelFP8V2(const FusedMultiHeadAttentionKernelMetaInfoFP8V2* pMetaStart, + unsigned int nMetaCount, Data_type type, unsigned int sm) + : TFusedMultiHeadAttentionXMMAKernel(pMetaStart, nMetaCount, type, sm) + { + } + + inline uint64_t hashID(unsigned int s, unsigned int d, bool interleaved, bool unroll) const + { + return (uint64_t) s << 32 | d |(interleaved ? 2ull : 0ull) | (unroll ? 1ull : 0ull); + } + + virtual uint64_t hashID(const KernelMeta& kernelMeta) const + { + assert(kernelMeta.mD == 64 || kernelMeta.mD == 32); + return hashID(kernelMeta.mS, kernelMeta.mD, kernelMeta.mInterleaved, kernelMeta.mUnrollStep); + } + + virtual void run(Fused_multihead_attention_params_FP8_v2& params, cudaStream_t ss) const + { + assert(params.d == 64); + assert(!params.interleaved && !params.use_tma); + + bool forceUnroll = true; + + if (!1 || (!params.force_unroll && (params.ignore_b1opt || params.b > 1))) + { + forceUnroll = false; + } + + const auto findIter = mFunctions.find(hashID(params.s, params.d, params.interleaved, forceUnroll)); + assert(findIter != mFunctions.end()); + + const auto& kernelMeta = mKernelMeta[findIter->second.mMetaInfoIndex]; + const CUfunction func = findIter->second.mDeviceFunction; + + void* kernelParams[] = {(void*)¶ms}; + if (!forceUnroll) + { + cuErrCheck(mDriver.cuLaunchKernel(func, params.h, params.b, 1, kernelMeta.mThreadsPerCTA, 1, 1, + kernelMeta.mSharedMemBytes, ss, kernelParams, nullptr), + mDriver); + } + else + { + int unroll = kernelMeta.mS / kernelMeta.mUnrollStep; + assert(kernelMeta.mS == kernelMeta.mUnrollStep * unroll); + cuErrCheck(mDriver.cuLaunchKernel(func, params.h, params.b, unroll, kernelMeta.mThreadsPerCTA, 1, 1, + kernelMeta.mSharedMemBytes, ss, kernelParams, nullptr), + mDriver); + } + } +}; + +using FusedMHAKernelFactoryFP8V2 = TFusedMHAKernelFactory; + +inline const FusedMultiHeadAttentionXMMAKernelFP8V2* getXMMAKernelsFP8V2(Data_type type, unsigned int sm) +{ + return FusedMHAKernelFactoryFP8V2::Get().getXMMAKernels( + sMhaKernelMetaInfosFP8V2, sizeof(sMhaKernelMetaInfosFP8V2) / sizeof(sMhaKernelMetaInfosFP8V2[0]), type, sm); +} + +} // namespace fastertransformer diff --git a/3rdparty/trt_fused_multihead_attention/CMakeLists.txt b/3rdparty/trt_fused_multihead_attention/CMakeLists.txt index a31b2d4eb..495c7db7e 100644 --- a/3rdparty/trt_fused_multihead_attention/CMakeLists.txt +++ b/3rdparty/trt_fused_multihead_attention/CMakeLists.txt @@ -1,5 +1,5 @@ # -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -16,13 +16,13 @@ cmake_minimum_required(VERSION 3.8) set(trt_fused_multi_head_attention_files - cudaDriverWrapper.cpp qkvToContext.cu ) file(GLOB trt_fused_multi_head_attention_files ${trt_fused_multi_head_attention_files} *sm*.cpp) +file(GLOB trt_fused_multi_head_attention_files ${trt_fused_multi_head_attention_files} ./sm90/*.cubin.cpp) add_library(trt_fused_multi_head_attention STATIC ${trt_fused_multi_head_attention_files}) -target_link_libraries(trt_fused_multi_head_attention PUBLIC -lcublas -lcudart) +target_link_libraries(trt_fused_multi_head_attention PUBLIC cuda_driver_wrapper -lcublas -lcudart) set_property(TARGET trt_fused_multi_head_attention PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET trt_fused_multi_head_attention PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) diff --git a/3rdparty/trt_fused_multihead_attention/common.cuh b/3rdparty/trt_fused_multihead_attention/common.cuh index b17e6a013..3249cf645 100644 --- a/3rdparty/trt_fused_multihead_attention/common.cuh +++ b/3rdparty/trt_fused_multihead_attention/common.cuh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_32_sm75.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_32_sm75.cubin.cpp index 31f9eeaf9..a3dcf86ab 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_32_sm75.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_32_sm75.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_32_sm80.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_32_sm80.cubin.cpp index c5115c99f..81c422b6b 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_32_sm80.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_32_sm80.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_32_sm86.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_32_sm86.cubin.cpp index bf8e01d67..3a7d7693b 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_32_sm86.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_32_sm86.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_64_sm70.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_64_sm70.cubin.cpp index 91f3ddab0..feb3b12d8 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_64_sm70.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_64_sm70.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_64_sm72.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_64_sm72.cubin.cpp index e3126569e..e832c8b6d 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_64_sm72.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_64_sm72.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_64_sm75.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_64_sm75.cubin.cpp index 4f66da922..a6db7bf0e 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_64_sm75.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_64_sm75.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_64_sm80.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_64_sm80.cubin.cpp index 873f75609..9d1f9187e 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_64_sm80.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_64_sm80.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_64_sm86.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_64_sm86.cubin.cpp index 27f794189..d85801bfd 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_64_sm86.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_0_64_sm86.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_128_sm70.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_128_sm70.cubin.cpp index 58c715d68..d0573e6d9 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_128_sm70.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_128_sm70.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_128_sm72.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_128_sm72.cubin.cpp index f76cc2fe9..b610ec804 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_128_sm72.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_128_sm72.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_128_sm75.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_128_sm75.cubin.cpp index 030a9faf7..e9e06a52e 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_128_sm75.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_128_sm75.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_128_sm80.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_128_sm80.cubin.cpp index 466e88299..c73a96c7a 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_128_sm80.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_128_sm80.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_128_sm86.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_128_sm86.cubin.cpp index 1ff188ea1..b9a8f244a 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_128_sm86.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_128_sm86.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_128_sm89.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_128_sm89.cubin.cpp index 9a8020732..2136ca521 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_128_sm89.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_128_sm89.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_144_sm70.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_144_sm70.cubin.cpp index 1ae7d5c95..48ab2c267 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_144_sm70.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_144_sm70.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_144_sm72.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_144_sm72.cubin.cpp index 4c3a4ebc5..e0c9de932 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_144_sm72.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_144_sm72.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_144_sm75.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_144_sm75.cubin.cpp index 78cf9f70b..0a2e13aa5 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_144_sm75.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_144_sm75.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_144_sm80.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_144_sm80.cubin.cpp index 93cd475d0..db29b2fec 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_144_sm80.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_144_sm80.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_144_sm86.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_144_sm86.cubin.cpp index e4e943aad..8bde07be5 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_144_sm86.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_144_sm86.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_144_sm89.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_144_sm89.cubin.cpp index f873b0b68..d1dbdfa2b 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_144_sm89.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_144_sm89.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_160_sm70.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_160_sm70.cubin.cpp index 41dae64b2..2a1a19bf4 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_160_sm70.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_160_sm70.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_160_sm72.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_160_sm72.cubin.cpp index fed7d1366..f71837366 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_160_sm72.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_160_sm72.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_160_sm75.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_160_sm75.cubin.cpp index 7606174e0..44f10a68b 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_160_sm75.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_160_sm75.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_160_sm80.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_160_sm80.cubin.cpp index 2991b4fbe..2258ddf25 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_160_sm80.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_160_sm80.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_160_sm86.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_160_sm86.cubin.cpp index 6474c9ab2..eb2c370b9 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_160_sm86.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_160_sm86.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_160_sm89.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_160_sm89.cubin.cpp index 745575db7..283b6f32e 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_160_sm89.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_160_sm89.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_256_sm70.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_256_sm70.cubin.cpp index f7ce605a8..1e073cf9d 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_256_sm70.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_256_sm70.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_256_sm72.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_256_sm72.cubin.cpp index 1ade25696..38aa0fb37 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_256_sm72.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_256_sm72.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_256_sm75.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_256_sm75.cubin.cpp index fcc937863..6a855c220 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_256_sm75.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_256_sm75.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_256_sm80.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_256_sm80.cubin.cpp index d02385995..cf5cd5d3c 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_256_sm80.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_256_sm80.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_256_sm86.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_256_sm86.cubin.cpp index 75580f31f..762a33fc8 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_256_sm86.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_256_sm86.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_256_sm89.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_256_sm89.cubin.cpp index 6aec5ecdd..05e0997f9 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_256_sm89.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_256_sm89.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_32_sm70.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_32_sm70.cubin.cpp index 507c7a079..761e14905 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_32_sm70.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_32_sm70.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_32_sm72.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_32_sm72.cubin.cpp index 02680c03e..0973cf0ef 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_32_sm72.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_32_sm72.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_32_sm75.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_32_sm75.cubin.cpp index 0a6337a8d..e603205d6 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_32_sm75.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_32_sm75.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_32_sm80.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_32_sm80.cubin.cpp index 1656e691a..52cdab519 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_32_sm80.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_32_sm80.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_32_sm86.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_32_sm86.cubin.cpp index aa1f9953f..fa7c4564e 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_32_sm86.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_32_sm86.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_32_sm89.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_32_sm89.cubin.cpp index 45d3810db..19077a299 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_32_sm89.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_32_sm89.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_40_sm70.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_40_sm70.cubin.cpp index 68820978d..ac2ad2b88 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_40_sm70.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_40_sm70.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_40_sm72.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_40_sm72.cubin.cpp index 961113c94..3f6f72902 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_40_sm72.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_40_sm72.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_40_sm75.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_40_sm75.cubin.cpp index b7321bb33..8c60e0e4f 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_40_sm75.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_40_sm75.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_40_sm80.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_40_sm80.cubin.cpp index 6e68dd61f..f9a35c42a 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_40_sm80.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_40_sm80.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_40_sm86.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_40_sm86.cubin.cpp index 1f9815bc5..f34546809 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_40_sm86.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_40_sm86.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_40_sm89.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_40_sm89.cubin.cpp index 33bdcda1d..f77ac458e 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_40_sm89.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_40_sm89.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_64_sm70.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_64_sm70.cubin.cpp index 7882456fb..0b0131ef2 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_64_sm70.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_64_sm70.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_64_sm72.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_64_sm72.cubin.cpp index dacd4a7f7..80ad0f31a 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_64_sm72.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_64_sm72.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_64_sm75.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_64_sm75.cubin.cpp index c8d033ec7..00d298710 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_64_sm75.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_64_sm75.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_64_sm80.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_64_sm80.cubin.cpp index 02a813db6..4f52de32b 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_64_sm80.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_64_sm80.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_64_sm86.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_64_sm86.cubin.cpp index 045d9a4e2..96ac202b8 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_64_sm86.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_64_sm86.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_64_sm89.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_64_sm89.cubin.cpp index 97e235311..265fba492 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_64_sm89.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_64_sm89.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_80_sm70.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_80_sm70.cubin.cpp index d37b7b49b..3a39122e9 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_80_sm70.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_80_sm70.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_80_sm72.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_80_sm72.cubin.cpp index 13bf46270..173ca4301 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_80_sm72.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_80_sm72.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_80_sm75.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_80_sm75.cubin.cpp index 52fa4592c..c2233134a 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_80_sm75.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_80_sm75.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_80_sm80.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_80_sm80.cubin.cpp index c47e43607..3b106c051 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_80_sm80.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_80_sm80.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_80_sm86.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_80_sm86.cubin.cpp index c26e7c2fc..52576fef1 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_80_sm86.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_80_sm86.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_80_sm89.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_80_sm89.cubin.cpp index 821d3513a..703b1e2b6 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_80_sm89.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_flash_attention_fp16_Causal_0_80_sm89.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_32_sm70.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_32_sm70.cubin.cpp index 119b40908..d0730c9c0 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_32_sm70.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_32_sm70.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_32_sm72.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_32_sm72.cubin.cpp index f63c0707c..0618006a6 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_32_sm72.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_32_sm72.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_32_sm75.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_32_sm75.cubin.cpp index 811934d1e..6f5379e07 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_32_sm75.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_32_sm75.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_32_sm80.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_32_sm80.cubin.cpp index 2550e1301..279441dfb 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_32_sm80.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_32_sm80.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_32_sm86.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_32_sm86.cubin.cpp index d52eef7dc..ea5a5759a 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_32_sm86.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_32_sm86.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_32_sm89.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_32_sm89.cubin.cpp index d051896d1..d7490f698 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_32_sm89.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_32_sm89.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_40_sm70.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_40_sm70.cubin.cpp index 512489650..1da35cf1a 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_40_sm70.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_40_sm70.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_40_sm72.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_40_sm72.cubin.cpp index 16105dc9c..4a15eb8d0 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_40_sm72.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_40_sm72.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_40_sm75.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_40_sm75.cubin.cpp index a13912171..996363264 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_40_sm75.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_40_sm75.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_40_sm80.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_40_sm80.cubin.cpp index 7e54ed270..8386b0fc3 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_40_sm80.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_40_sm80.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_40_sm86.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_40_sm86.cubin.cpp index a6876d24a..ba8e5412a 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_40_sm86.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_40_sm86.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_40_sm89.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_40_sm89.cubin.cpp index 53dd1e543..848b5694c 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_40_sm89.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_40_sm89.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_64_sm70.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_64_sm70.cubin.cpp index 9dc35c3dd..e7a9a7d8c 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_64_sm70.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_64_sm70.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_64_sm72.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_64_sm72.cubin.cpp index d108464fc..d05dabe08 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_64_sm72.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_64_sm72.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_64_sm75.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_64_sm75.cubin.cpp index eb232595f..fe1df9f9e 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_64_sm75.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_64_sm75.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_64_sm80.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_64_sm80.cubin.cpp index 322443620..103e3fa92 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_64_sm80.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_64_sm80.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_64_sm86.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_64_sm86.cubin.cpp index 4dbbab70d..0697439be 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_64_sm86.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_64_sm86.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_64_sm89.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_64_sm89.cubin.cpp index 094a707aa..330ccb661 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_64_sm89.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_128_64_sm89.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_32_sm70.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_32_sm70.cubin.cpp index 09fd9d288..1f250f212 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_32_sm70.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_32_sm70.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_32_sm72.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_32_sm72.cubin.cpp index 7f26db7d4..6e04ebc41 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_32_sm72.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_32_sm72.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_32_sm75.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_32_sm75.cubin.cpp index caf41710a..60d864c80 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_32_sm75.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_32_sm75.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_32_sm80.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_32_sm80.cubin.cpp index 4e8f4f6c0..1d52edb55 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_32_sm80.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_32_sm80.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_32_sm86.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_32_sm86.cubin.cpp index 8e722f4f9..e2f434067 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_32_sm86.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_32_sm86.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_32_sm89.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_32_sm89.cubin.cpp index 2ea01de05..e446351fd 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_32_sm89.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_32_sm89.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_40_sm70.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_40_sm70.cubin.cpp index 74d737202..c8f9da533 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_40_sm70.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_40_sm70.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_40_sm72.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_40_sm72.cubin.cpp index 5a5e92443..bb99e4a68 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_40_sm72.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_40_sm72.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_40_sm75.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_40_sm75.cubin.cpp index 2c46423bc..dc8e228ed 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_40_sm75.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_40_sm75.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_40_sm80.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_40_sm80.cubin.cpp index 5049c8c2b..bec66422c 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_40_sm80.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_40_sm80.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_40_sm86.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_40_sm86.cubin.cpp index 121679666..1fcc29c66 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_40_sm86.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_40_sm86.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_40_sm89.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_40_sm89.cubin.cpp index fa4ca2226..b800bf105 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_40_sm89.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_40_sm89.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_64_sm70.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_64_sm70.cubin.cpp index 6608d5d68..cd3810750 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_64_sm70.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_64_sm70.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_64_sm72.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_64_sm72.cubin.cpp index 23d38f2bd..f0eab0627 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_64_sm72.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_64_sm72.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_64_sm75.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_64_sm75.cubin.cpp index dde168606..a80219995 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_64_sm75.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_64_sm75.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_64_sm80.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_64_sm80.cubin.cpp index 50a8c03b7..6d560412b 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_64_sm80.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_64_sm80.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_64_sm86.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_64_sm86.cubin.cpp index c1044b350..cae50b50d 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_64_sm86.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_64_sm86.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_64_sm89.cubin.cpp b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_64_sm89.cubin.cpp index 111893da3..81fdc15d5 100644 --- a/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_64_sm89.cubin.cpp +++ b/3rdparty/trt_fused_multihead_attention/fmha_v2_fp16_Causal_64_64_sm89.cubin.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_128_32_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_128_32_kernel.sm75.cpp index f07640e86..6e64123a1 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_128_32_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_128_32_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_128_32_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_128_32_kernel.sm80.cpp index c37a83b81..b471af3b6 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_128_32_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_128_32_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_128_32_kernel.sm86.cpp b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_128_32_kernel.sm86.cpp index 1d8a3fb72..f4ddaa4ca 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_128_32_kernel.sm86.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_128_32_kernel.sm86.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_256_32_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_256_32_kernel.sm75.cpp index ea7a861a9..17f6eaf0c 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_256_32_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_256_32_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_256_32_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_256_32_kernel.sm80.cpp index 889624327..5badf2b6b 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_256_32_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_256_32_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_256_32_kernel.sm86.cpp b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_256_32_kernel.sm86.cpp index 12f64c6e5..f078de40a 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_256_32_kernel.sm86.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_256_32_kernel.sm86.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_64_32_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_64_32_kernel.sm75.cpp index 48290d1e1..7f5a6e04c 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_64_32_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_64_32_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_64_32_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_64_32_kernel.sm80.cpp index ee352d348..fa378eefc 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_64_32_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_64_32_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_64_32_kernel.sm86.cpp b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_64_32_kernel.sm86.cpp index fb8b6224c..0af8cfd95 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_64_32_kernel.sm86.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_64_32_kernel.sm86.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_int8_256_32_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_int8_256_32_kernel.sm75.cpp index 107962728..4414598d6 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_int8_256_32_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_int8_256_32_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_int8_256_32_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_int8_256_32_kernel.sm80.cpp index 2ccffb8c8..dc8591131 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_int8_256_32_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_int8_256_32_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_int8_64_32_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_int8_64_32_kernel.sm75.cpp index 26ad77054..c1052e708 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_int8_64_32_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_int8_64_32_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_int8_64_32_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_int8_64_32_kernel.sm80.cpp index 8511bf41a..8bde8fdf6 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_int8_64_32_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_int8_64_32_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention.h b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention.h index 61d66d29c..7d38eccef 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention.h +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -15,7 +15,7 @@ */ #pragma once -#include "cudaDriverWrapper.h" +#include "3rdparty/common/cudaDriverWrapper.h" #include "cuda_runtime_api.h" #include "fused_multihead_attention_common.h" #include @@ -25,28 +25,41 @@ #include #include #include -namespace fastertransformer -{ +namespace fastertransformer { static inline size_t get_size_in_bytes(size_t n, Data_type dtype) { - switch (dtype) - { - case DATA_TYPE_E8M10: return n * 4; - case DATA_TYPE_FP32: return n * 4; - case DATA_TYPE_FP16: return n * 2; - case DATA_TYPE_INT32: return n * 4; - case DATA_TYPE_INT8: return n; - case DATA_TYPE_INT4: return n / 2; - case DATA_TYPE_BOOL: return n / 8; - case DATA_TYPE_E8M7: return n * 2; - default: assert(false); return 0; + switch (dtype) { + case DATA_TYPE_E8M10: + return n * 4; + case DATA_TYPE_FP32: + return n * 4; + case DATA_TYPE_FP16: + return n * 2; + case DATA_TYPE_INT32: + return n * 4; + case DATA_TYPE_INT8: + return n; + case DATA_TYPE_INT4: + return n / 2; + case DATA_TYPE_BOOL: + return n / 8; + case DATA_TYPE_E8M7: + return n * 2; + case DATA_TYPE_BF16: + return n * 2; + case DATA_TYPE_E4M3: + return n; + case DATA_TYPE_E5M2: + return n; + default: + assert(false); + return 0; } } //////////////////////////////////////////////////////////////////////////////////////////////////// -struct Fused_multihead_attention_params -{ +struct Fused_multihead_attention_params { // The QKV matrices. void* qkv_ptr; // The mask to implement drop-out. @@ -66,14 +79,14 @@ struct Fused_multihead_attention_params void* p_ptr; // The stride between rows of the P matrix (for debugging). int64_t p_stride_in_bytes; -#endif // defined(STORE_P) +#endif // defined(STORE_P) #if defined(STORE_S) // The pointer to the S matrix (for debugging). void* s_ptr; // The stride between rows of the S matrix (for debugging). int64_t s_stride_in_bytes; -#endif // defined(STORE_S) +#endif // defined(STORE_S) // The dimensions. int b, h, s, d; @@ -112,8 +125,7 @@ extern unsigned int fused_multihead_attention_int8_128_64_kernel_sm80_cu_o_len; extern unsigned int fused_multihead_attention_fp16_128_64_kernel_sm80_cu_o_len; extern unsigned int fused_multihead_attention_fp16_384_64_kernel_sm80_cu_o_len; -static const struct FusedMultiHeadAttentionKernelMetaInfoV1 -{ +static const struct FusedMultiHeadAttentionKernelMetaInfoV1 { Data_type mDataType; unsigned int mS; unsigned int mD; @@ -125,110 +137,205 @@ static const struct FusedMultiHeadAttentionKernelMetaInfoV1 unsigned int mThreadsPerCTA; } sMhaKernelMetaInfos[] = { // Turing - {DATA_TYPE_FP16, 64, 64, kSM_75, fused_multihead_attention_fp16_64_64_kernel_sm75_cu_o, - fused_multihead_attention_fp16_64_64_kernel_sm75_cu_o_len, - "fused_multihead_attention_v2_fp16_64_64_kernel_sm75", 24576, 128}, - {DATA_TYPE_FP16, 96, 64, kSM_75, fused_multihead_attention_fp16_96_64_kernel_sm75_cu_o, - fused_multihead_attention_fp16_96_64_kernel_sm75_cu_o_len, - "fused_multihead_attention_v2_fp16_96_64_kernel_sm75", 24576, 128}, - {DATA_TYPE_FP16, 128, 64, kSM_75, fused_multihead_attention_fp16_128_64_kernel_sm75_cu_o, - fused_multihead_attention_fp16_128_64_kernel_sm75_cu_o_len, "fused_multihead_attention_fp16_128_64_kernel_sm75", - 32768, 128}, - {DATA_TYPE_FP16, 384, 64, kSM_75, fused_multihead_attention_fp16_384_64_kernel_sm75_cu_o, - fused_multihead_attention_fp16_384_64_kernel_sm75_cu_o_len, "fused_multihead_attention_fp16_384_64_kernel_sm75", - 57344, 256}, - {DATA_TYPE_INT8, 128, 64, kSM_75, fused_multihead_attention_int8_128_64_kernel_sm75_cu_o, - fused_multihead_attention_int8_128_64_kernel_sm75_cu_o_len, "fused_multihead_attention_int8_128_64_kernel_sm75", - 16384, 128}, - {DATA_TYPE_INT8, 384, 64, kSM_75, fused_multihead_attention_int8_384_64_kernel_sm75_cu_o, - fused_multihead_attention_int8_384_64_kernel_sm75_cu_o_len, "fused_multihead_attention_int8_384_64_kernel_sm75", - 53284, 256}, + {DATA_TYPE_FP16, + 64, + 64, + kSM_75, + fused_multihead_attention_fp16_64_64_kernel_sm75_cu_o, + fused_multihead_attention_fp16_64_64_kernel_sm75_cu_o_len, + "fused_multihead_attention_v2_fp16_64_64_kernel_sm75", + 24576, + 128}, + {DATA_TYPE_FP16, + 96, + 64, + kSM_75, + fused_multihead_attention_fp16_96_64_kernel_sm75_cu_o, + fused_multihead_attention_fp16_96_64_kernel_sm75_cu_o_len, + "fused_multihead_attention_v2_fp16_96_64_kernel_sm75", + 24576, + 128}, + {DATA_TYPE_FP16, + 128, + 64, + kSM_75, + fused_multihead_attention_fp16_128_64_kernel_sm75_cu_o, + fused_multihead_attention_fp16_128_64_kernel_sm75_cu_o_len, + "fused_multihead_attention_fp16_128_64_kernel_sm75", + 32768, + 128}, + {DATA_TYPE_FP16, + 384, + 64, + kSM_75, + fused_multihead_attention_fp16_384_64_kernel_sm75_cu_o, + fused_multihead_attention_fp16_384_64_kernel_sm75_cu_o_len, + "fused_multihead_attention_fp16_384_64_kernel_sm75", + 57344, + 256}, + {DATA_TYPE_INT8, + 128, + 64, + kSM_75, + fused_multihead_attention_int8_128_64_kernel_sm75_cu_o, + fused_multihead_attention_int8_128_64_kernel_sm75_cu_o_len, + "fused_multihead_attention_int8_128_64_kernel_sm75", + 16384, + 128}, + {DATA_TYPE_INT8, + 384, + 64, + kSM_75, + fused_multihead_attention_int8_384_64_kernel_sm75_cu_o, + fused_multihead_attention_int8_384_64_kernel_sm75_cu_o_len, + "fused_multihead_attention_int8_384_64_kernel_sm75", + 53284, + 256}, #if CUDA_VERSION >= 11000 // Ampere - {DATA_TYPE_FP16, 64, 64, kSM_80, fused_multihead_attention_fp16_64_64_kernel_sm80_cu_o, - fused_multihead_attention_fp16_64_64_kernel_sm80_cu_o_len, - "fused_multihead_attention_v2_fp16_64_64_kernel_sm80", 32768, 128}, - {DATA_TYPE_FP16, 96, 64, kSM_80, fused_multihead_attention_fp16_96_64_kernel_sm80_cu_o, - fused_multihead_attention_fp16_96_64_kernel_sm80_cu_o_len, - "fused_multihead_attention_v2_fp16_96_64_kernel_sm80", 49152, 128}, - {DATA_TYPE_FP16, 128, 64, kSM_80, fused_multihead_attention_fp16_128_64_kernel_sm80_cu_o, - fused_multihead_attention_fp16_128_64_kernel_sm80_cu_o_len, "fused_multihead_attention_fp16_128_64_kernel_sm80", - 49152, 128}, - {DATA_TYPE_FP16, 384, 64, kSM_80, fused_multihead_attention_fp16_384_64_kernel_sm80_cu_o, - fused_multihead_attention_fp16_384_64_kernel_sm80_cu_o_len, "fused_multihead_attention_fp16_384_64_kernel_sm80", - 114688, 256}, - {DATA_TYPE_INT8, 128, 64, kSM_80, fused_multihead_attention_int8_128_64_kernel_sm80_cu_o, - fused_multihead_attention_int8_128_64_kernel_sm80_cu_o_len, "fused_multihead_attention_int8_128_64_kernel_sm80", - 24576, 128}, - {DATA_TYPE_INT8, 384, 64, kSM_80, fused_multihead_attention_int8_384_64_kernel_sm80_cu_o, - fused_multihead_attention_int8_384_64_kernel_sm80_cu_o_len, "fused_multihead_attention_int8_384_64_kernel_sm80", - 57344, 256}, + {DATA_TYPE_FP16, + 64, + 64, + kSM_80, + fused_multihead_attention_fp16_64_64_kernel_sm80_cu_o, + fused_multihead_attention_fp16_64_64_kernel_sm80_cu_o_len, + "fused_multihead_attention_v2_fp16_64_64_kernel_sm80", + 32768, + 128}, + {DATA_TYPE_FP16, + 96, + 64, + kSM_80, + fused_multihead_attention_fp16_96_64_kernel_sm80_cu_o, + fused_multihead_attention_fp16_96_64_kernel_sm80_cu_o_len, + "fused_multihead_attention_v2_fp16_96_64_kernel_sm80", + 49152, + 128}, + {DATA_TYPE_FP16, + 128, + 64, + kSM_80, + fused_multihead_attention_fp16_128_64_kernel_sm80_cu_o, + fused_multihead_attention_fp16_128_64_kernel_sm80_cu_o_len, + "fused_multihead_attention_fp16_128_64_kernel_sm80", + 49152, + 128}, + {DATA_TYPE_FP16, + 384, + 64, + kSM_80, + fused_multihead_attention_fp16_384_64_kernel_sm80_cu_o, + fused_multihead_attention_fp16_384_64_kernel_sm80_cu_o_len, + "fused_multihead_attention_fp16_384_64_kernel_sm80", + 114688, + 256}, + {DATA_TYPE_INT8, + 128, + 64, + kSM_80, + fused_multihead_attention_int8_128_64_kernel_sm80_cu_o, + fused_multihead_attention_int8_128_64_kernel_sm80_cu_o_len, + "fused_multihead_attention_int8_128_64_kernel_sm80", + 24576, + 128}, + {DATA_TYPE_INT8, + 384, + 64, + kSM_80, + fused_multihead_attention_int8_384_64_kernel_sm80_cu_o, + fused_multihead_attention_int8_384_64_kernel_sm80_cu_o_len, + "fused_multihead_attention_int8_384_64_kernel_sm80", + 57344, + 256}, // GA10x // Note: For GA10X keep only kernels whose sharedMemBytes < 100KiB - {DATA_TYPE_FP16, 64, 64, kSM_86, fused_multihead_attention_fp16_64_64_kernel_sm80_cu_o, - fused_multihead_attention_fp16_64_64_kernel_sm80_cu_o_len, - "fused_multihead_attention_v2_fp16_64_64_kernel_sm80", 32768, 128}, - {DATA_TYPE_FP16, 96, 64, kSM_86, fused_multihead_attention_fp16_96_64_kernel_sm80_cu_o, - fused_multihead_attention_fp16_96_64_kernel_sm80_cu_o_len, - "fused_multihead_attention_v2_fp16_96_64_kernel_sm80", 49152, 128}, - {DATA_TYPE_FP16, 128, 64, kSM_86, fused_multihead_attention_fp16_128_64_kernel_sm80_cu_o, - fused_multihead_attention_fp16_128_64_kernel_sm80_cu_o_len, "fused_multihead_attention_fp16_128_64_kernel_sm80", - 49152, 128}, - {DATA_TYPE_INT8, 128, 64, kSM_86, fused_multihead_attention_int8_128_64_kernel_sm80_cu_o, - fused_multihead_attention_int8_128_64_kernel_sm80_cu_o_len, "fused_multihead_attention_int8_128_64_kernel_sm80", - 24576, 128}, - {DATA_TYPE_INT8, 384, 64, kSM_86, fused_multihead_attention_int8_384_64_kernel_sm80_cu_o, - fused_multihead_attention_int8_384_64_kernel_sm80_cu_o_len, "fused_multihead_attention_int8_384_64_kernel_sm80", - 57344, 256}, + {DATA_TYPE_FP16, + 64, + 64, + kSM_86, + fused_multihead_attention_fp16_64_64_kernel_sm80_cu_o, + fused_multihead_attention_fp16_64_64_kernel_sm80_cu_o_len, + "fused_multihead_attention_v2_fp16_64_64_kernel_sm80", + 32768, + 128}, + {DATA_TYPE_FP16, + 96, + 64, + kSM_86, + fused_multihead_attention_fp16_96_64_kernel_sm80_cu_o, + fused_multihead_attention_fp16_96_64_kernel_sm80_cu_o_len, + "fused_multihead_attention_v2_fp16_96_64_kernel_sm80", + 49152, + 128}, + {DATA_TYPE_FP16, + 128, + 64, + kSM_86, + fused_multihead_attention_fp16_128_64_kernel_sm80_cu_o, + fused_multihead_attention_fp16_128_64_kernel_sm80_cu_o_len, + "fused_multihead_attention_fp16_128_64_kernel_sm80", + 49152, + 128}, + {DATA_TYPE_INT8, + 128, + 64, + kSM_86, + fused_multihead_attention_int8_128_64_kernel_sm80_cu_o, + fused_multihead_attention_int8_128_64_kernel_sm80_cu_o_len, + "fused_multihead_attention_int8_128_64_kernel_sm80", + 24576, + 128}, + {DATA_TYPE_INT8, + 384, + 64, + kSM_86, + fused_multihead_attention_int8_384_64_kernel_sm80_cu_o, + fused_multihead_attention_int8_384_64_kernel_sm80_cu_o_len, + "fused_multihead_attention_int8_384_64_kernel_sm80", + 57344, + 256}, #endif }; -template -class TFusedMultiHeadAttentionXMMAKernel -{ +template +class TFusedMultiHeadAttentionXMMAKernel { public: using KernelMeta = TKernelMeta; using KernelParam = TKernelParam; inline uint64_t hashID(unsigned int s, unsigned int d) const { - return (uint64_t) s << 32 | d; + return (uint64_t)s << 32 | d; } virtual uint64_t hashID(const KernelMeta& kernelMeta) const { return hashID(kernelMeta.mS, kernelMeta.mD); } - TFusedMultiHeadAttentionXMMAKernel( - const TKernelMeta* pMetaStart, unsigned int nMetaCount, Data_type type, unsigned int sm) - : mDataType(type) - , mKernelMeta(pMetaStart) - , mKernelMetaCount(nMetaCount) - , mSM(sm) + TFusedMultiHeadAttentionXMMAKernel(const TKernelMeta* pMetaStart, + unsigned int nMetaCount, + Data_type type, + unsigned int sm): + mDataType(type), mKernelMeta(pMetaStart), mKernelMetaCount(nMetaCount), mSM(sm) { } void loadXMMAKernels() { - if (!mFunctions.empty()) - { + if (!mFunctions.empty()) { return; } - for (unsigned int i = 0; i < mKernelMetaCount; ++i) - { + for (unsigned int i = 0; i < mKernelMetaCount; ++i) { const auto& kernelMeta = mKernelMeta[i]; - if (kernelMeta.mSM == mSM && kernelMeta.mDataType == mDataType) - { + if (kernelMeta.mSM == mSM && kernelMeta.mDataType == mDataType) { CUmodule hmod{0}; auto findModuleIter = mModules.find(kernelMeta.mCubin); - if (findModuleIter != mModules.end()) - { + if (findModuleIter != mModules.end()) { hmod = findModuleIter->second; } - else - { + else { cuErrCheck(mDriver.cuModuleLoadData(&hmod, kernelMeta.mCubin), mDriver); mModules.insert(std::make_pair(kernelMeta.mCubin, hmod)); } @@ -236,11 +343,11 @@ class TFusedMultiHeadAttentionXMMAKernel FusedMultiHeadAttentionKernelInfo funcInfo; funcInfo.mMetaInfoIndex = i; cuErrCheck(mDriver.cuModuleGetFunction(&funcInfo.mDeviceFunction, hmod, kernelMeta.mFuncName), mDriver); - if (kernelMeta.mSharedMemBytes >= 48 * 1024) - { + if (kernelMeta.mSharedMemBytes >= 48 * 1024) { cuErrCheck(mDriver.cuFuncSetAttribute(funcInfo.mDeviceFunction, - CU_FUNC_ATTRIBUTE_MAX_DYNAMIC_SHARED_SIZE_BYTES, kernelMeta.mSharedMemBytes), - mDriver); + CU_FUNC_ATTRIBUTE_MAX_DYNAMIC_SHARED_SIZE_BYTES, + kernelMeta.mSharedMemBytes), + mDriver); } mFunctions.insert(std::make_pair(hashID(kernelMeta), funcInfo)); int s = static_cast(kernelMeta.mS); @@ -264,9 +371,18 @@ class TFusedMultiHeadAttentionXMMAKernel const CUfunction func = findIter->second.mDeviceFunction; void* kernelParams[] = {¶ms, nullptr}; - cuErrCheck(mDriver.cuLaunchKernel(func, params.h, params.b, 1, kernelMeta.mThreadsPerCTA, 1, 1, - kernelMeta.mSharedMemBytes, ss, kernelParams, nullptr), - mDriver); + cuErrCheck(mDriver.cuLaunchKernel(func, + params.h, + params.b, + 1, + kernelMeta.mThreadsPerCTA, + 1, + 1, + kernelMeta.mSharedMemBytes, + ss, + kernelParams, + nullptr), + mDriver); } virtual ~TFusedMultiHeadAttentionXMMAKernel() = default; @@ -280,8 +396,7 @@ class TFusedMultiHeadAttentionXMMAKernel unsigned int mKernelMetaCount; unsigned int mSM; std::unordered_map mModules; - struct FusedMultiHeadAttentionKernelInfo - { + struct FusedMultiHeadAttentionKernelInfo { unsigned int mMetaInfoIndex; CUfunction mDeviceFunction; }; @@ -289,20 +404,20 @@ class TFusedMultiHeadAttentionXMMAKernel std::set mValidSequences; }; -template -class TFusedMHAKernelFactory -{ +template +class TFusedMHAKernelFactory { public: const TFusedMHAKernelList* getXMMAKernels(const typename TFusedMHAKernelList::KernelMeta* pKernelList, - unsigned int nbKernels, Data_type type, unsigned int sm) + unsigned int nbKernels, + Data_type type, + unsigned int sm) { static std::mutex s_mutex; std::lock_guard lg(s_mutex); const auto id = hashID(type, sm); const auto findIter = mKernels.find(id); - if (findIter == mKernels.end()) - { + if (findIter == mKernels.end()) { TFusedMHAKernelList* newKernel = new TFusedMHAKernelList{pKernelList, nbKernels, type, sm}; newKernel->loadXMMAKernels(); mKernels.insert(std::make_pair(id, std::unique_ptr(newKernel))); @@ -329,14 +444,14 @@ class TFusedMHAKernelFactory inline uint64_t hashID(Data_type type, unsigned int sm) const { - return (uint64_t) type << 32 | sm; + return (uint64_t)type << 32 | sm; } std::unordered_map> mKernels; }; -using FusedMultiHeadAttentionXMMAKernel - = TFusedMultiHeadAttentionXMMAKernel; +using FusedMultiHeadAttentionXMMAKernel = + TFusedMultiHeadAttentionXMMAKernel; using FusedMHAKernelFactory = TFusedMHAKernelFactory; inline const FusedMultiHeadAttentionXMMAKernel* getXMMAKernels(Data_type type, unsigned int sm) @@ -345,4 +460,4 @@ inline const FusedMultiHeadAttentionXMMAKernel* getXMMAKernels(Data_type type, u sMhaKernelMetaInfos, sizeof(sMhaKernelMetaInfos) / sizeof(sMhaKernelMetaInfos[0]), type, sm); } -} // namespace fastertransformer +} // namespace fastertransformer diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_common.h b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_common.h index 4a463d81c..9e09eb312 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_common.h +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_common.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -28,7 +28,10 @@ enum Data_type DATA_TYPE_FP32, DATA_TYPE_INT4, DATA_TYPE_INT8, - DATA_TYPE_INT32 + DATA_TYPE_INT32, + DATA_TYPE_BF16, + DATA_TYPE_E4M3, + DATA_TYPE_E5M2 }; constexpr int32_t kSM_70 = 70; @@ -37,4 +40,5 @@ constexpr int32_t kSM_75 = 75; constexpr int32_t kSM_80 = 80; constexpr int32_t kSM_86 = 86; constexpr int32_t kSM_89 = 89; +constexpr int32_t kSM_90 = 90; } // namespace fastertransformer diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_128_64_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_128_64_kernel.sm75.cpp index b91e0ca27..f27a95d5b 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_128_64_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_128_64_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_128_64_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_128_64_kernel.sm80.cpp index d37587ceb..221bac5c2 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_128_64_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_128_64_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_384_64_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_384_64_kernel.sm75.cpp index a2a0179b2..6c7a84fb9 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_384_64_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_384_64_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_384_64_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_384_64_kernel.sm80.cpp index bd20a0221..9b0915eff 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_384_64_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_384_64_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_64_64_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_64_64_kernel.sm75.cpp index eea56b4e3..32c110c51 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_64_64_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_64_64_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_64_64_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_64_64_kernel.sm80.cpp index abb05c208..e1b9d8f4b 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_64_64_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_64_64_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_96_64_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_96_64_kernel.sm75.cpp index 8f3f93471..e28632075 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_96_64_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_96_64_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_96_64_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_96_64_kernel.sm80.cpp index 658714fee..dcaad6b2e 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_96_64_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_fp16_96_64_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_int8_128_64_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_int8_128_64_kernel.sm75.cpp index 847b85b6f..3d6ce80b7 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_int8_128_64_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_int8_128_64_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_int8_128_64_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_int8_128_64_kernel.sm80.cpp index 5a3dbcf8c..bc46a75cb 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_int8_128_64_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_int8_128_64_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_int8_384_64_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_int8_384_64_kernel.sm75.cpp index 5d6309ec4..a3f918ffc 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_int8_384_64_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_int8_384_64_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_int8_384_64_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_int8_384_64_kernel.sm80.cpp index c22b46c82..dadd47323 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_int8_384_64_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_int8_384_64_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2.h b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2.h index d91e3f4ef..a210db7d1 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2.h +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -5304,12 +5304,6 @@ class FusedMultiHeadAttentionXMMAKernelV2: {kSM_75, fastertransformer::DATA_TYPE_INT8, 256, 64, 1}, {kSM_75, fastertransformer::DATA_TYPE_INT8, 384, 64, 1}, #if CUDA_VERSION >= 11000 - {kSM_80, fastertransformer::DATA_TYPE_FP16, 128, 32, 4}, - {kSM_80, fastertransformer::DATA_TYPE_FP16, 128, 40, 4}, - {kSM_80, fastertransformer::DATA_TYPE_FP16, 128, 64, 4}, - {kSM_80, fastertransformer::DATA_TYPE_FP16, 256, 64, 4}, - {kSM_80, fastertransformer::DATA_TYPE_FP16, 384, 64, 4}, - {kSM_80, fastertransformer::DATA_TYPE_INT8, 128, 64, 4}, {kSM_80, fastertransformer::DATA_TYPE_INT8, 192, 64, 16}, {kSM_80, fastertransformer::DATA_TYPE_INT8, 256, 64, 8}, {kSM_80, fastertransformer::DATA_TYPE_INT8, 384, 64, 8}, diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_128_32_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_128_32_kernel.sm75.cpp index d32539e2c..8a912c215 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_128_32_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_128_32_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_128_32_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_128_32_kernel.sm80.cpp index 9dc82119c..18a5281b6 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_128_32_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_128_32_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_128_64_kernel.sm70.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_128_64_kernel.sm70.cpp index de8cde29b..7878fa070 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_128_64_kernel.sm70.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_128_64_kernel.sm70.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_128_64_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_128_64_kernel.sm75.cpp index f66e7bda9..4e3cc6243 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_128_64_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_128_64_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_128_64_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_128_64_kernel.sm80.cpp index 86b7d635d..bde151d25 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_128_64_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_128_64_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_192_32_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_192_32_kernel.sm75.cpp index 8839185ee..c21bb9cc0 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_192_32_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_192_32_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_192_32_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_192_32_kernel.sm80.cpp index 60cad4864..14ab6504e 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_192_32_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_192_32_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_192_64_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_192_64_kernel.sm75.cpp index 54b0d2e58..4079ed111 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_192_64_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_192_64_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_192_64_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_192_64_kernel.sm80.cpp index 7057e44e6..191e569e7 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_192_64_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_192_64_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_256_32_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_256_32_kernel.sm75.cpp index a426f386b..f0cd32d5a 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_256_32_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_256_32_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_256_32_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_256_32_kernel.sm80.cpp index 7a32fc648..18eb19ca1 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_256_32_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_256_32_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_256_64_kernel.sm70.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_256_64_kernel.sm70.cpp index 8a0c7c265..734847d77 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_256_64_kernel.sm70.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_256_64_kernel.sm70.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_256_64_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_256_64_kernel.sm75.cpp index 9b3c41cef..880f305d3 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_256_64_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_256_64_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_256_64_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_256_64_kernel.sm80.cpp index d91d10bc6..2d137bde2 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_256_64_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_256_64_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_32_32_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_32_32_kernel.sm75.cpp index 8b26ad558..1d36ba03d 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_32_32_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_32_32_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_32_32_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_32_32_kernel.sm80.cpp index a2305f696..0ef0ddff8 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_32_32_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_32_32_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_32_64_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_32_64_kernel.sm75.cpp index 6f27ea2ad..d89b83119 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_32_64_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_32_64_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_32_64_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_32_64_kernel.sm80.cpp index f16b08e61..cca47388d 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_32_64_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_32_64_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_384_32_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_384_32_kernel.sm75.cpp index 13da55151..85b4a49d1 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_384_32_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_384_32_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_384_32_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_384_32_kernel.sm80.cpp index 4e78eda2a..905f2fa42 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_384_32_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_384_32_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_384_64_kernel.sm70.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_384_64_kernel.sm70.cpp index 878d2ec30..fb1658c7e 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_384_64_kernel.sm70.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_384_64_kernel.sm70.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_384_64_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_384_64_kernel.sm75.cpp index f81bdaef1..c28359730 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_384_64_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_384_64_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_384_64_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_384_64_kernel.sm80.cpp index 71b29085b..725938d39 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_384_64_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_384_64_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_512_32_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_512_32_kernel.sm75.cpp new file mode 100644 index 000000000..c060d9c19 --- /dev/null +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_512_32_kernel.sm75.cpp @@ -0,0 +1,3883 @@ +/* +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*/ +namespace fastertransformer +{ +unsigned char cubin_fmha_v2_fp16_512_32_sm75_cu_cubin[] = { + 0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x33, 0x07, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xbe, 0x00, 0x73, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0xb1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x4b, 0x05, 0x4b, 0x00, 0x40, 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index 000000000..9d462a5b1 --- /dev/null +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_512_32_kernel.sm80.cpp @@ -0,0 +1,3552 @@ +/* +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*/ +namespace fastertransformer +{ +unsigned char cubin_fmha_v2_fp16_512_32_sm80_cu_cubin[] = { + 0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x33, 0x07, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xbe, 0x00, 0x73, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x80, 0xa1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x50, 0x05, 0x50, 0x00, 0x40, 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0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +}; +unsigned int cubin_fmha_v2_fp16_512_32_sm80_cu_cubin_len = 42368; +} diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_512_64_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_512_64_kernel.sm80.cpp new file mode 100644 index 000000000..557b9095d --- /dev/null +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_512_64_kernel.sm80.cpp @@ -0,0 +1,4075 @@ +/* +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*/ +namespace fastertransformer +{ +unsigned char cubin_fmha_v2_fp16_512_64_sm80_cu_cubin[] = { + 0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x33, 0x07, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xbe, 0x00, 0x73, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0xba, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x50, 0x05, 0x50, 0x00, 0x40, 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0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, + 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x8e, 0x01, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x90, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x06, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x48, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x5b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xb8, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x0c, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x48, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x0d, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xbe, 0x01, 0x00, 0x00, + 0x0b, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc8, 0x07, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x9b, 0x01, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xa0, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xb5, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xc0, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xd0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x0c, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x01, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x90, 0x0a, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xd0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x0d, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x32, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x06, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x80, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x55, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0xa7, + 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xe6, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x06, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x62, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x58, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x08, 0x00, 0x00, 0xff, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x87, 0x00, 0x00, 0x00, + 0x08, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xba, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x35, 0x01, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0xba, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0d, 0x00, 0x00, 0x00, + 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00 +}; +unsigned int cubin_fmha_v2_fp16_512_64_sm80_cu_cubin_len = 48640; +} diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_64_32_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_64_32_kernel.sm75.cpp index b7cbff045..e48fad1a6 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_64_32_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_64_32_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_64_32_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_64_32_kernel.sm80.cpp index 21141c1d1..29c9e15e7 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_64_32_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_64_32_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_64_64_kernel.sm70.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_64_64_kernel.sm70.cpp index 14d8823a3..3cb2ffd45 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_64_64_kernel.sm70.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_64_64_kernel.sm70.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_64_64_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_64_64_kernel.sm75.cpp index d08b181a3..6d8bf232e 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_64_64_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_64_64_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_64_64_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_64_64_kernel.sm80.cpp index 1e2a0467c..6d8862742 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_64_64_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_64_64_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_96_32_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_96_32_kernel.sm75.cpp index d9060e2dc..9f49e755f 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_96_32_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_96_32_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_96_32_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_96_32_kernel.sm80.cpp index dff612905..d68ac7a06 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_96_32_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_96_32_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_96_64_kernel.sm70.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_96_64_kernel.sm70.cpp index 54dc5cdc7..1cd85f544 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_96_64_kernel.sm70.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_96_64_kernel.sm70.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_96_64_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_96_64_kernel.sm75.cpp index 7a3a8edeb..14987f63c 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_96_64_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_96_64_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_96_64_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_96_64_kernel.sm80.cpp index e59301fb1..f51009696 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_96_64_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_fp16_96_64_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_128_32_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_128_32_kernel.sm75.cpp index d842356b0..17fa6105b 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_128_32_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_128_32_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_128_32_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_128_32_kernel.sm80.cpp index 5f4d9de17..e31bdc92e 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_128_32_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_128_32_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_128_64_kernel.sm72.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_128_64_kernel.sm72.cpp index a6126088f..4648d4e69 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_128_64_kernel.sm72.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_128_64_kernel.sm72.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_128_64_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_128_64_kernel.sm75.cpp index cda1696c2..f7652d43e 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_128_64_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_128_64_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_128_64_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_128_64_kernel.sm80.cpp index 259f00a16..30809148a 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_128_64_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_128_64_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_192_32_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_192_32_kernel.sm75.cpp index f5ca1be72..170ebfd7f 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_192_32_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_192_32_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_192_32_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_192_32_kernel.sm80.cpp index 3114969f4..5f20fea56 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_192_32_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_192_32_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_192_64_kernel.sm72.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_192_64_kernel.sm72.cpp index 90c12018f..fd220a997 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_192_64_kernel.sm72.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_192_64_kernel.sm72.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_192_64_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_192_64_kernel.sm75.cpp index 2c0f22b51..f969e13e6 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_192_64_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_192_64_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_192_64_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_192_64_kernel.sm80.cpp index d3d0f7f21..b8bd21fd1 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_192_64_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_192_64_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_256_32_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_256_32_kernel.sm75.cpp index f51169b47..f7c137586 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_256_32_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_256_32_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_256_32_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_256_32_kernel.sm80.cpp index e41e986f6..c50d60637 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_256_32_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_256_32_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_256_64_kernel.sm72.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_256_64_kernel.sm72.cpp index 62269673c..7de047531 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_256_64_kernel.sm72.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_256_64_kernel.sm72.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_256_64_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_256_64_kernel.sm75.cpp index 5c2234bb3..48bb05bf9 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_256_64_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_256_64_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_256_64_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_256_64_kernel.sm80.cpp index bfe2b20fc..bbe7cad98 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_256_64_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_256_64_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_384_32_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_384_32_kernel.sm75.cpp index 10100ccbc..6a13f615f 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_384_32_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_384_32_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_384_32_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_384_32_kernel.sm80.cpp index 57bbcdebb..3049b9ce8 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_384_32_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_384_32_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_384_64_kernel.sm72.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_384_64_kernel.sm72.cpp index a162ef92d..ef94e6292 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_384_64_kernel.sm72.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_384_64_kernel.sm72.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_384_64_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_384_64_kernel.sm75.cpp index 299c20452..0b7d710ff 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_384_64_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_384_64_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_384_64_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_384_64_kernel.sm80.cpp index 881775557..0b9c5965c 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_384_64_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_384_64_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_512_32_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_512_32_kernel.sm75.cpp index 89ee43693..e169a19c2 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_512_32_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_512_32_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_512_32_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_512_32_kernel.sm80.cpp index 45e3d909d..6e0d178dd 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_512_32_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_512_32_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_512_64_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_512_64_kernel.sm80.cpp index bcf00c7da..34ffeabdd 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_512_64_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_512_64_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_64_32_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_64_32_kernel.sm75.cpp index 071642d69..4f9e41170 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_64_32_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_64_32_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_64_32_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_64_32_kernel.sm80.cpp index a00aeadb7..388c16b8b 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_64_32_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_64_32_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_64_64_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_64_64_kernel.sm75.cpp index c2c48565d..4bf2178b3 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_64_64_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_64_64_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_64_64_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_64_64_kernel.sm80.cpp index 4a403f9dd..9e2c2e23d 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_64_64_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_64_64_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_96_32_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_96_32_kernel.sm75.cpp index 8918aa92b..ea7c30889 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_96_32_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_96_32_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_96_32_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_96_32_kernel.sm80.cpp index b01572677..8be91a7c7 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_96_32_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_96_32_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_96_64_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_96_64_kernel.sm75.cpp index 3571cca79..b05f45853 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_96_64_kernel.sm75.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_96_64_kernel.sm75.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_96_64_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_96_64_kernel.sm80.cpp index ae07da3f5..c6e9dbe95 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_96_64_kernel.sm80.cpp +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2_int8_96_64_kernel.sm80.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/qkvToContext.cu b/3rdparty/trt_fused_multihead_attention/qkvToContext.cu index 23f093609..24ab3e521 100644 --- a/3rdparty/trt_fused_multihead_attention/qkvToContext.cu +++ b/3rdparty/trt_fused_multihead_attention/qkvToContext.cu @@ -25,11 +25,11 @@ namespace fastertransformer { union __half2_uint32_t_union { - half2 fp162; + half2 fp162; uint32_t u32; }; union __float_uint32_t_union { - float fp32; + float fp32; uint32_t u32; }; @@ -38,16 +38,21 @@ static inline void set_alpha(uint32_t& alpha, float norm, Data_type dtype) if (dtype == DATA_TYPE_FP16) { __half2_uint32_t_union temp; temp.fp162 = __float2half2_rn(norm); - alpha = temp.u32; + alpha = temp.u32; } else if (dtype == DATA_TYPE_FP32) { __float_uint32_t_union temp; temp.fp32 = norm; - alpha = temp.u32; + alpha = temp.u32; } else if (dtype == DATA_TYPE_INT32) { int32_t inorm = static_cast(norm); - alpha = reinterpret_cast(inorm); + alpha = reinterpret_cast(inorm); + } + else if (dtype == DATA_TYPE_BF16) { + // TODO HACK!! BF16 Outputs are computed in FP32 for FP8. + // This is because cublas does not allow current FP32 output. + alpha = reinterpret_cast(norm); } else { assert(false); @@ -59,8 +64,8 @@ public: mhaImpl(FusedMHARunnerFP16v2* interface): interface(interface), sm(interface->mSm), xmmaKernel(getXMMAKernelsV2(DATA_TYPE_FP16, sm)) { - assert((sm == kSM_70 || sm == kSM_72 || sm == kSM_75 || sm == kSM_80 || sm == kSM_86 || sm == kSM_89) - && "Unsupported architecture"); + assert((sm == kSM_70 || sm == kSM_72 || sm == kSM_75 || sm == kSM_80 || sm == kSM_86 || + sm == kSM_89) && "Unsupported architecture"); params.clear(); } @@ -125,9 +130,9 @@ public: // The number of xmmas in the N dimension. xmmas_n = (S + 16 * warps_n - 1) / (16 * warps_n); - const float scale_bmm1 = interface->mRsqrtHeadSize; + const float scale_bmm1 = interface->mRsqrtHeadSize; const float scale_softmax = 1.f; // Seems to be only required for int8 - const float scale_bmm2 = 1.f; + const float scale_bmm2 = 1.f; Data_type scale_type = DATA_TYPE_FP16; set_alpha(params.scale_bmm1, scale_bmm1, scale_type); @@ -145,9 +150,9 @@ public: // mLdQKV = 3 * B * mNumHeads * mHeadSize; // mLdOut = B * mNumHeads * mHeadSize; - params.qkv_stride_in_bytes = 3 * interface->mNumHeads * interface->mHeadSize * sizeof(half); + params.qkv_stride_in_bytes = 3 * interface->mNumHeads * interface->mHeadSize * sizeof(half); params.packed_mask_stride_in_bytes = xmmas_m * threads_per_cta * sizeof(uint32_t); - params.o_stride_in_bytes = interface->mNumHeads * interface->mHeadSize * sizeof(half); + params.o_stride_in_bytes = interface->mNumHeads * interface->mHeadSize * sizeof(half); // for bert and vit, use flash attention when s >= 512 use_flash_attention = (params.s >= 512); @@ -157,7 +162,7 @@ public: void setup_causal_masked_fmha(const int S, const int B) { const float scale_bmm1 = interface->mRsqrtHeadSize; - const float scale_softmax = 1.f; // Seems to be only required for int8 + const float scale_softmax = 1.f; // Seems to be only required for int8 const float scale_bmm2 = 1.f; Data_type scale_type = DATA_TYPE_FP16; @@ -196,14 +201,14 @@ public: bool fmha_supported(bool causal_mask) { if (causal_mask) { - return (sm == kSM_70 || sm == kSM_72 || sm == kSM_75 || sm == kSM_80 || sm == kSM_86 || sm == kSM_89) - && (interface->mHeadSize == 32 || interface->mHeadSize == 40 || interface->mHeadSize == 64 - || interface->mHeadSize == 80 || interface->mHeadSize == 128 || interface->mHeadSize == 144 - || interface->mHeadSize == 160 || interface->mHeadSize == 256); + return (sm == kSM_70 || sm == kSM_72 || sm == kSM_75 || sm == kSM_80 || sm == kSM_86 || sm == kSM_89) && + (interface->mHeadSize == 32 || interface->mHeadSize == 40 || interface->mHeadSize == 64 || + interface->mHeadSize == 80 || interface->mHeadSize == 128 || interface->mHeadSize == 144 + || interface->mHeadSize == 160 || interface->mHeadSize == 256); } else { - return (sm == kSM_75 || sm == kSM_80 || sm == kSM_86) - && (interface->mHeadSize == 32 || interface->mHeadSize == 64); + return (sm == kSM_75 || sm == kSM_80 || sm == kSM_86) && + (interface->mHeadSize == 32 || interface->mHeadSize == 64); } } @@ -234,34 +239,34 @@ public: // The number of xmmas in the N dimension. xmmas_n = (S + 16 * warps_n - 1) / (16 * warps_n); - const float scale_bmm1 = interface->mRsqrtHeadSize; + const float scale_bmm1 = interface->mRsqrtHeadSize; const float scale_softmax = 1.f; // Seems to be only required for int8 - const float scale_bmm2 = 1.f; + const float scale_bmm2 = 1.f; Data_type scale_type = DATA_TYPE_FP16; set_alpha(params.scale_bmm1, scale_bmm1, scale_type); set_alpha(params.scale_softmax, scale_softmax, scale_type); set_alpha(params.scale_bmm2, scale_bmm2, scale_type); - params.b = B; - params.h = interface->mNumHeads; - params.s = S; - params.d = interface->mHeadSize; + params.b = B; + params.h = interface->mNumHeads; + params.s = S; + params.d = interface->mHeadSize; params.window_num = window_num; // mLdQKV = 3 * B * mNumHeads * mHeadSize; // mLdOut = B * mNumHeads * mHeadSize; - params.qkv_stride_in_bytes = 3 * interface->mNumHeads * interface->mHeadSize * sizeof(half); + params.qkv_stride_in_bytes = 3 * interface->mNumHeads * interface->mHeadSize * sizeof(half); params.packed_mask_stride_in_bytes = S * sizeof(half); - params.o_stride_in_bytes = interface->mNumHeads * interface->mHeadSize * sizeof(half); + params.o_stride_in_bytes = interface->mNumHeads * interface->mHeadSize * sizeof(half); } - void run(const void* qkvPtr, - const void* maskPtr, - const void* cuSeqlenPtr, - void* output, - void* workspace, + void run(const void* qkvPtr, + const void* maskPtr, + const void* cuSeqlenPtr, + void* output, + void* workspace, cudaStream_t stream) { params.qkv_ptr = const_cast(qkvPtr); @@ -275,12 +280,12 @@ public: check_cuda_error(cudaPeekAtLastError()); } - void run(const void* qkvPtr, - const void* maskPtr, - const void* relative_position_bias, - const int actual_seqlen, - void* output, - void* workspace, + void run(const void* qkvPtr, + const void* maskPtr, + const void* relative_position_bias, + const int actual_seqlen, + void* output, + void* workspace, cudaStream_t stream) { params.qkv_ptr = const_cast(qkvPtr); @@ -298,8 +303,7 @@ public: check_cuda_error(cudaPeekAtLastError()); } - void run_causal_masked_fmha( - const void* qkvPtr, const void* cuSeqlenPtr, void* output, bool causal_mask, cudaStream_t stream) + void run_causal_masked_fmha(const void* qkvPtr, const void* cuSeqlenPtr, void* output, bool causal_mask, cudaStream_t stream) { params.qkv_ptr = const_cast(qkvPtr); @@ -369,14 +373,14 @@ public: } private: - FusedMHARunnerFP16v2* interface; - Fused_multihead_attention_params_v2 params; - int sm; + FusedMHARunnerFP16v2* interface; + Fused_multihead_attention_params_v2 params; + int sm; const FusedMultiHeadAttentionXMMAKernelV2* xmmaKernel; - size_t xmmas_m; - size_t xmmas_n; - size_t threads_per_cta; - bool use_flash_attention = false; + size_t xmmas_m; + size_t xmmas_n; + size_t threads_per_cta; + bool use_flash_attention = false; }; FusedMHARunnerFP16v2::FusedMHARunnerFP16v2(const int numHeads, const int headSize, const int sm, const float q_scaling): @@ -424,19 +428,18 @@ void FusedMHARunnerFP16v2::run( pimpl->run(input, mask, seqlen, output, workspace, stream); } -void FusedMHARunnerFP16v2::run(const void* input, - const void* mask, - const void* relative_position_bias, - const int actual_seqlen, - void* workspace, - void* output, +void FusedMHARunnerFP16v2::run(const void* input, + const void* mask, + const void* relative_position_bias, + const int actual_seqlen, + void* workspace, + void* output, cudaStream_t stream) { pimpl->run(input, mask, relative_position_bias, actual_seqlen, output, workspace, stream); } -void FusedMHARunnerFP16v2::run_causal_masked_fmha( - const void* qkvPtr, const void* cuSeqlenPtr, void* output, bool causal_mask, cudaStream_t stream) +void FusedMHARunnerFP16v2::run_causal_masked_fmha(const void* qkvPtr, const void* cuSeqlenPtr, void* output, bool causal_mask, cudaStream_t stream) { pimpl->run_causal_masked_fmha(qkvPtr, cuSeqlenPtr, output, causal_mask, stream); } @@ -496,39 +499,39 @@ public: // The number of xmmas in the N dimension. xmmas_n = (S + 16 * warps_n - 1) / (16 * warps_n); - params.b = B; - params.h = interface->mNumHeads; - params.s = S; - params.d = interface->mHeadSize; - params.window_num = window_num; - params.use_int8_scale_max = true; + params.b = B; + params.h = interface->mNumHeads; + params.s = S; + params.d = interface->mHeadSize; + params.window_num = window_num; + params.use_int8_scale_max = true; params.packed_mask_stride_in_bytes = S * sizeof(half); - params.qkv_stride_in_bytes = 3 * interface->mNumHeads * interface->mHeadSize * sizeof(int8_t); - params.o_stride_in_bytes = interface->mNumHeads * interface->mHeadSize * sizeof(int8_t); + params.qkv_stride_in_bytes = 3 * interface->mNumHeads * interface->mHeadSize * sizeof(int8_t); + params.o_stride_in_bytes = interface->mNumHeads * interface->mHeadSize * sizeof(int8_t); - float scaleBmm1 = interface->mScaleQkv * interface->mRsqrtHeadSize; - float scaleBmm2 = interface->mScaleCtx; + float scaleBmm1 = interface->mScaleQkv * interface->mRsqrtHeadSize; + float scaleBmm2 = interface->mScaleCtx; float scaleSoftmax = interface->mDqProbs; __float_uint32_t_union temp; - temp.fp32 = scaleBmm1; - params.scale_bmm1 = temp.u32; - temp.fp32 = scaleBmm2; - params.scale_bmm2 = temp.u32; - temp.fp32 = scaleSoftmax; + temp.fp32 = scaleBmm1; + params.scale_bmm1 = temp.u32; + temp.fp32 = scaleBmm2; + params.scale_bmm2 = temp.u32; + temp.fp32 = scaleSoftmax; params.scale_softmax = temp.u32; params.enable_i2f_trick = -double(1 << 22) * double(scaleBmm2) <= -128.f && double(1 << 22) * double(scaleBmm2) >= 127.f; } - void run(const void* qkvPtr, - const void* maskPtr, - const void* relativePositionBiasPtr, - int actual_seqlen, - void* output, - void* workspace, + void run(const void* qkvPtr, + const void* maskPtr, + const void* relativePositionBiasPtr, + int actual_seqlen, + void* output, + void* workspace, cudaStream_t stream) { params.qkv_ptr = const_cast(qkvPtr); @@ -577,37 +580,37 @@ public: params.d = interface->mHeadSize; // TODO: // For now we set window_num = 0, to avoid using fused multi-head window-attention kernel - params.window_num = 0; - params.use_int8_scale_max = true; + params.window_num = 0; + params.use_int8_scale_max = true; params.packed_mask_stride_in_bytes = xmmas_m * threads_per_cta * sizeof(uint32_t); - params.qkv_stride_in_bytes = 3 * interface->mNumHeads * interface->mHeadSize * sizeof(int8_t); - params.o_stride_in_bytes = interface->mNumHeads * interface->mHeadSize * sizeof(int8_t); + params.qkv_stride_in_bytes = 3 * interface->mNumHeads * interface->mHeadSize * sizeof(int8_t); + params.o_stride_in_bytes = interface->mNumHeads * interface->mHeadSize * sizeof(int8_t); float scaleQkv = interface->mScaleQkv; float scaleCtx = interface->mScaleCtx; - float scaleBmm1 = scaleQkv * scaleQkv * (1.f / sqrtf(interface->mHeadSize)); - float scaleBmm2 = interface->mDqProbs * scaleQkv / scaleCtx; + float scaleBmm1 = scaleQkv * scaleQkv * (1.f / sqrtf(interface->mHeadSize)); + float scaleBmm2 = interface->mDqProbs * scaleQkv / scaleCtx; float scaleSoftmax = 1.f / interface->mDqProbs; __float_uint32_t_union temp; - temp.fp32 = scaleBmm1; - params.scale_bmm1 = temp.u32; - temp.fp32 = scaleBmm2; - params.scale_bmm2 = temp.u32; - temp.fp32 = scaleSoftmax; + temp.fp32 = scaleBmm1; + params.scale_bmm1 = temp.u32; + temp.fp32 = scaleBmm2; + params.scale_bmm2 = temp.u32; + temp.fp32 = scaleSoftmax; params.scale_softmax = temp.u32; params.enable_i2f_trick = -double(1 << 22) * double(scaleBmm2) <= -128.f && double(1 << 22) * double(scaleBmm2) >= 127.f; } - void run(const void* qkvPtr, - const void* maskPtr, - const void* cuSeqlenPtr, - void* output, - void* workspace, + void run(const void* qkvPtr, + const void* maskPtr, + const void* cuSeqlenPtr, + void* output, + void* workspace, cudaStream_t stream) { params.qkv_ptr = const_cast(qkvPtr); @@ -681,13 +684,13 @@ public: } private: - FusedMHARunnerInt8v2* interface; - Fused_multihead_attention_params_v2 params; - int sm; + FusedMHARunnerInt8v2* interface; + Fused_multihead_attention_params_v2 params; + int sm; const FusedMultiHeadAttentionXMMAKernelV2* xmmaKernel; - size_t xmmas_m; - size_t xmmas_n; - size_t threads_per_cta; + size_t xmmas_m; + size_t xmmas_n; + size_t threads_per_cta; }; FusedMHARunnerInt8v2::FusedMHARunnerInt8v2(const int numHeads, const int headSize, const int sm, const float q_scaling): @@ -697,7 +700,7 @@ FusedMHARunnerInt8v2::FusedMHARunnerInt8v2(const int numHeads, const int headSiz void FusedMHARunnerInt8v2::setScaleList(const float scaleQkv, const float dqProbs, const float scaleCtx) { - mDqProbs = dqProbs; + mDqProbs = dqProbs; mScaleQkv = scaleQkv; mScaleCtx = scaleCtx; } @@ -722,12 +725,12 @@ void FusedMHARunnerInt8v2::run(const void* input, const void* mask, void* worksp assert(false && "Not implemented"); } -void FusedMHARunnerInt8v2::run(const void* input, - const void* mask, - const void* relative_position_bias, - int actual_seqlen, - void* workspace, - void* output, +void FusedMHARunnerInt8v2::run(const void* input, + const void* mask, + const void* relative_position_bias, + int actual_seqlen, + void* workspace, + void* output, cudaStream_t stream) { pimpl->run(input, mask, relative_position_bias, actual_seqlen, output, workspace, stream); @@ -749,4 +752,214 @@ int FusedMHARunnerInt8v2::getSFromMaxSeqLen(const int max_seq_len, const bool wi return pimpl->getSFromMaxSeqLen(max_seq_len, withRelativePositionBias); } +#ifdef ENABLE_FP8 +class FusedMHARunnerFP8v2::mhaImpl +{ +public: + mhaImpl(FusedMHARunnerFP8v2* interface) + : interface(interface) + , sm(interface->mSm) + , xmmaKernel(getXMMAKernelsFP8V2(DATA_TYPE_E4M3, sm)) + { + assert((sm == kSM_90) && "Unsupported architecture"); + memset(¶ms, 0, sizeof(params)); + } + + ~mhaImpl() {} + + size_t getPackedMaskSizeInBytes() const + { + // check that we initialized + assert(xmmas_m > 0); + assert(threads_per_cta > 0); + assert(interface->mB > 0); + return interface->mB * xmmas_m * threads_per_cta * sizeof(uint32_t); + } + + void setup_flags(const bool interleaved, const bool ignore_b1opt, const bool force_unroll, const bool use_int8_scale_max, const bool use_tma) + { + // Set flags + params.interleaved = interleaved; + params.ignore_b1opt = ignore_b1opt; + params.force_unroll = force_unroll; + params.use_int8_scale_max = use_int8_scale_max; + params.use_tma = use_tma; + } + + void setup(const int S, const int B) + { + // mLdQKV = 3 * B * mNumHeads * mHeadSize; + // mLdOut = B * mNumHeads * mHeadSize; + + params.qkv_stride_in_bytes = get_size_in_bytes(3 * interface->mNumHeads * interface->mHeadSize, DATA_TYPE_E4M3); + params.o_stride_in_bytes = get_size_in_bytes(interface->mNumHeads * interface->mHeadSize, DATA_TYPE_E4M3); + + float scaleQkv = interface->mScaleQkv; + float scaleCtx = interface->mScaleCtx; + + float scaleBmm1 = scaleQkv * (1.f / sqrtf(1.0f * interface->mHeadSize)); + float scaleBmm2 = scaleCtx; + float scaleSoftmax = interface->mDqProbs; + + Data_type scale_type = DATA_TYPE_FP32; + set_alpha(params.scale_bmm1, scaleBmm1, scale_type); + set_alpha(params.scale_softmax, scaleSoftmax, scale_type); + set_alpha(params.scale_bmm2, scaleBmm2, scale_type); + + params.b = B; + params.h = interface->mNumHeads; + params.s = S; + params.d = interface->mHeadSize; + + // interleaved + } + + void setup(const int S, const int B, const int window_num) + { + return; + } + + void run(const void* qkvPtr, + const void* maskPtr, + const void* cuSeqlenPtr, + void* output, + void* workspace, + cudaStream_t stream) + { + params.qkv_ptr = const_cast(qkvPtr); + + params.o_ptr = output; + + params.cu_seqlens = static_cast(const_cast(cuSeqlenPtr)); + + xmmaKernel->run(params, stream); + check_cuda_error(cudaPeekAtLastError()); + return; + } + + void run(const void* qkvPtr, + const void* maskPtr, + const void* relative_position_bias, + const int actual_seqlen, + void* output, + void* workspace, + cudaStream_t stream) + { + return; + } + + bool isValid(int s, const bool withRelativePositionBias) const + { + return xmmaKernel->isValid(s) && (withRelativePositionBias == false); + } + + int getSFromMaxSeqLen(const int max_seq_len, const bool withRelativePositionBias) + { + int S = 128; + if (max_seq_len <= 128) + { + S = 128; + } + else if (max_seq_len <= 192) + { + S = 192; + } + else if (max_seq_len <= 256) + { + S = 256; + } + else if (max_seq_len <= 384) + { + S = 384; + } + else if (max_seq_len <= 512) + { + S = 512; + } + return S; + } + +private: + FusedMHARunnerFP8v2* interface; + Fused_multihead_attention_params_FP8_v2 params; + int sm; + const FusedMultiHeadAttentionXMMAKernelFP8V2* xmmaKernel; + size_t xmmas_m; + size_t xmmas_n; + size_t threads_per_cta; +}; + +FusedMHARunnerFP8v2::FusedMHARunnerFP8v2(const int numHeads, const int headSize, const int sm, const float q_scaling) + : MHARunner(numHeads, headSize, 2, q_scaling) + , mSm(sm) + , pimpl(new mhaImpl(this)) +{ +} + +void FusedMHARunnerFP8v2::setup_flags(const bool interleaved, const bool ignore_b1opt, const bool force_unroll, const bool use_int8_scale_max, const bool use_tma) +{ + pimpl->setup_flags(interleaved, ignore_b1opt, force_unroll, use_int8_scale_max, use_tma); +} + +void FusedMHARunnerFP8v2::setScaleList(const float scaleQkv, const float dqProbs, const float scaleCtx) +{ + mDqProbs = dqProbs; + mScaleQkv = scaleQkv; + mScaleCtx = scaleCtx; +} + +void FusedMHARunnerFP8v2::setup(const int S, const int B) +{ + MHARunner::setup(S, B); + pimpl->setup(S, B); +} + +void FusedMHARunnerFP8v2::setup(const int S, const int B, const int window_num) +{ + MHARunner::setup(S, B, window_num); + pimpl->setup(S, B, window_num); +} + +size_t FusedMHARunnerFP8v2::getWorkspaceSize() const +{ + return 0; +} + +void FusedMHARunnerFP8v2::run(const void* input, const void* mask, void* workspace, void* output, cudaStream_t stream) +{ + assert(false && "not implemented"); +} + +void FusedMHARunnerFP8v2::run(const void* input, const void* mask, const void* seqlen, void* workspace, void* output, cudaStream_t stream) +{ + pimpl->run(input, mask, seqlen, output, workspace, stream); +} + +void FusedMHARunnerFP8v2::run(const void* input, + const void* mask, + const void* relatice_position_bias, + const int actual_seqlen, + void* workspace, + void* output, + cudaStream_t stream) +{ + assert(false && "not implemented"); +} + +bool FusedMHARunnerFP8v2::isValid(int s, const bool withRelativePositionBias) const +{ + return pimpl->isValid(s, withRelativePositionBias) && (withRelativePositionBias == false); +} + +int FusedMHARunnerFP8v2::getSFromMaxSeqLen(const int max_seq_len, const bool withRelativePositionBias) +{ + if (withRelativePositionBias) { + return false; + } + else { + return pimpl->getSFromMaxSeqLen(max_seq_len, withRelativePositionBias); + } +} +#endif // ENABLE_FP8 + } // namespace fastertransformer diff --git a/3rdparty/trt_fused_multihead_attention/qkvToContext.h b/3rdparty/trt_fused_multihead_attention/qkvToContext.h index 398e79748..2595a5ada 100644 --- a/3rdparty/trt_fused_multihead_attention/qkvToContext.h +++ b/3rdparty/trt_fused_multihead_attention/qkvToContext.h @@ -26,6 +26,7 @@ #include "src/fastertransformer/utils/cuda_utils.h" #include "fused_multihead_attention_v2.h" +#include "../trt_fp8_fmha/fused_multihead_attention.h" #pragma once namespace fastertransformer @@ -79,15 +80,16 @@ class MHARunner { setup(S, B); } + virtual void setup_flags(const bool interleaved, const bool ignore_b1opt, const bool force_unroll, const bool use_int8_scale_max, const bool use_tma) {return;}; - virtual void run(const void* input, const void* mask, void* workspace, void* output, cudaStream_t stream) = 0; - virtual void run(const void* input, const void* mask, const void* seqlen, void* workspace, void* output, cudaStream_t stream) = 0; + virtual void run(const void* input, const void* mask, void* workspace, void* output, cudaStream_t stream) = 0; + virtual void run(const void* input, const void* mask, const void* seqlen, void* workspace, void* output, cudaStream_t stream) = 0; + virtual void run(const void* input, const void* mask, const void* relative_position_bias, const int actual_seqlen, void* workspace, void* output, cudaStream_t stream) = 0; virtual void run_causal_masked_fmha(const void* input, const void* cu_seqlens, void* output, bool causal_mask, cudaStream_t stream) { // unimplemented ; } - virtual void run(const void* input, const void* mask, const void* relative_position_bias, const int actual_seqlen, void* workspace, void* output, cudaStream_t stream) = 0; virtual void setScaleList(const float scaleQkv, const float dqProbs, const float scaleCtx) = 0; @@ -172,4 +174,35 @@ class FusedMHARunnerInt8v2 : public MHARunner std::unique_ptr pimpl; }; +#ifdef ENABLE_FP8 +class FusedMHARunnerFP8v2 : public MHARunner +{ +public: + FusedMHARunnerFP8v2(const int numHeads, const int headSize, const int sm, const float q_scaling); + ~FusedMHARunnerFP8v2() = default; // for pimpl + + virtual void setup(const int S, const int B) override; + virtual void setup(const int S, const int B, const int window_num) override; + virtual void setup_flags(const bool interleaved, const bool ignore_b1opt, const bool force_unroll, const bool use_int8_scale_max, const bool use_tma) override; + + void run(const void* input, const void* mask, void* workspace, void* output, cudaStream_t stream); + void run(const void* input, const void* mask, const void* seqlen, void* workspace, void* output, cudaStream_t stream) override; + void run(const void* input, const void* mask, const void* relatice_position_bias, const int actual_seqlen, void* workspace, void* output, cudaStream_t stream) override; + + void setScaleList(const float scaleQkv, const float dqProbs, const float scaleCtx) override; + + size_t getWorkspaceSize() const override; + + bool isValid(int s, const bool withRelativePositionBias) const override; + + int getSFromMaxSeqLen(const int max_seq_len, const bool withRelativePositionBias = false) override; + +private: + float mDqProbs, mScaleQkv, mScaleCtx; + int mSm; + class mhaImpl; + std::unique_ptr pimpl; +}; +#endif // ENABLE_FP8 + } // namespace fastertransformer diff --git a/3rdparty/trt_fused_multihead_attention/sm90/fmha_v2_e4m3_128_64_ldgsts_sm90.cubin.cpp b/3rdparty/trt_fused_multihead_attention/sm90/fmha_v2_e4m3_128_64_ldgsts_sm90.cubin.cpp new file mode 100644 index 000000000..81bcd8627 --- /dev/null +++ b/3rdparty/trt_fused_multihead_attention/sm90/fmha_v2_e4m3_128_64_ldgsts_sm90.cubin.cpp @@ -0,0 +1,15741 @@ +/* +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*/ +namespace fastertransformer +{ +unsigned char cubin_fmha_v2_e4m3_128_64_ldgsts_sm90_cu_cubin[] = { + 0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x33, 0x07, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xbe, 0x00, 0x76, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x02, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x80, 0xda, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x5a, 0x05, 0x5a, 0x00, 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All rights reserved. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*/ +namespace fastertransformer +{ +unsigned char cubin_fmha_v2_e4m3_192_64_ldgsts_sm90_cu_cubin[] = { + 0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x33, 0x07, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xbe, 0x00, 0x76, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xd5, 0x03, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x80, 0xcf, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x5a, 0x05, 0x5a, 0x00, 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0x03, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +}; +unsigned int cubin_fmha_v2_e4m3_192_64_ldgsts_sm90_cu_cubin_len = 251360; +} \ No newline at end of file diff --git a/3rdparty/trt_fused_multihead_attention/sm90/fmha_v2_e4m3_256_64_ldgsts_sm90.cubin.cpp b/3rdparty/trt_fused_multihead_attention/sm90/fmha_v2_e4m3_256_64_ldgsts_sm90.cubin.cpp new file mode 100644 index 000000000..18f522da7 --- /dev/null +++ b/3rdparty/trt_fused_multihead_attention/sm90/fmha_v2_e4m3_256_64_ldgsts_sm90.cubin.cpp @@ -0,0 +1,25928 @@ +/* +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*/ +namespace fastertransformer +{ +unsigned char cubin_fmha_v2_e4m3_256_64_ldgsts_sm90_cu_cubin[] = { + 0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x33, 0x07, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xbe, 0x00, 0x76, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xbd, 0x04, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0xb8, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x5a, 0x05, 0x5a, 0x00, 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100644 index 000000000..e20447439 --- /dev/null +++ b/3rdparty/trt_fused_multihead_attention/sm90/fmha_v2_e4m3_384_64_ldgsts_sm90.cubin.cpp @@ -0,0 +1,36328 @@ +/* +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*/ +namespace fastertransformer +{ +unsigned char cubin_fmha_v2_e4m3_384_64_ldgsts_sm90_cu_cubin[] = { + 0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x33, 0x07, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xbe, 0x00, 0x76, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa5, 0x06, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x80, 0x9f, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x5a, 0x05, 0x5a, 0x00, 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0x00, 0x00, + 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +}; +unsigned int cubin_fmha_v2_e4m3_384_64_ldgsts_sm90_cu_cubin_len = 435680; +} \ No newline at end of file diff --git a/3rdparty/trt_fused_multihead_attention/sm90/fmha_v2_e4m3_512_64_ldgsts_sm90.cubin.cpp b/3rdparty/trt_fused_multihead_attention/sm90/fmha_v2_e4m3_512_64_ldgsts_sm90.cubin.cpp new file mode 100644 index 000000000..0fcb9021b --- /dev/null +++ b/3rdparty/trt_fused_multihead_attention/sm90/fmha_v2_e4m3_512_64_ldgsts_sm90.cubin.cpp @@ -0,0 +1,26504 @@ +/* +* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*/ +namespace fastertransformer +{ +unsigned char cubin_fmha_v2_e4m3_512_64_ldgsts_sm90_cu_cubin[] = { + 0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x33, 0x07, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xbe, 0x00, 0x76, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xd8, 0x04, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0xd3, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x5a, 0x05, 0x5a, 0x00, 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0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x80, 0xd8, 0x04, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +}; +unsigned int cubin_fmha_v2_e4m3_512_64_ldgsts_sm90_cu_cubin_len = 317792; +} \ No newline at end of file diff --git a/CMakeLists.txt b/CMakeLists.txt old mode 100644 new mode 100755 index ec4381da3..75bf71c1d --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -18,7 +18,27 @@ find_package(CUDA 10.2 REQUIRED) if(${CUDA_VERSION_MAJOR} VERSION_GREATER_EQUAL "11") add_definitions("-DENABLE_BF16") - message("CUDA_VERSION ${CUDA_VERSION_MAJOR} is greater or equal than 11, enable -DENABLE_BF16 flag") + message("CUDA_VERSION ${CUDA_VERSION_MAJOR}.${CUDA_VERSION_MINOR} is greater or equal than 11.0, enable -DENABLE_BF16 flag") +endif() + +if((${CUDA_VERSION_MAJOR} VERSION_GREATER_EQUAL "11" AND ${CUDA_VERSION_MINOR} VERSION_GREATER_EQUAL "7") OR (${CUDA_VERSION_MAJOR} VERSION_GREATER_EQUAL "12")) + add_definitions("-DENABLE_FP8") + option(ENABLE_FP8 "ENABLE_FP8" OFF) + if(ENABLE_FP8) + message("CUDA_VERSION ${CUDA_VERSION_MAJOR}.${CUDA_VERSION_MINOR} is greater or equal than 11.7, enable -DENABLE_FP8 flag") + endif() +endif() + +option(BUILD_CUTLASS_MOE "Builds CUTLASS kernels supporting MoE GEMM" ON) +if(BUILD_CUTLASS_MOE) + message(STATUS "Add DBUILD_CUTLASS_MOE, requires CUTLASS. Increases compilation time") + add_definitions("-DBUILD_CUTLASS_MOE") +endif() + +option(BUILD_CUTLASS_MIXED_GEMM "Builds CUTLASS kernels supporting mixed gemm" ON) +if(BUILD_CUTLASS_MIXED_GEMM) + message(STATUS "Add DBUILD_CUTLASS_MIXED_GEMM, requires CUTLASS. Increases compilation time") + add_definitions("-DBUILD_CUTLASS_MIXED_GEMM") endif() option(BUILD_CUTLASS_MOE "Builds CUTLASS kernels supporting MoE GEMM" ON) @@ -71,9 +91,6 @@ if(BUILD_MULTI_GPU) set(CMAKE_MODULE_PATH ${PROJECT_SOURCE_DIR}/cmake/Modules) find_package(MPI REQUIRED) find_package(NCCL REQUIRED) - #if(${NCCL_VERSION} LESS 2.7) - # message(FATAL_ERROR "NCCL_VERSION ${NCCL_VERSION} is less than 2.7") - #endif() set(CMAKE_MODULE_PATH "") # prevent the bugs for pytorch building endif() @@ -107,7 +124,7 @@ endif() list(APPEND CMAKE_MODULE_PATH ${CUDA_PATH}/lib64) # profiling -option(USE_NVTX "Whether or not to use nvtx" OFF) +option(USE_NVTX "Whether or not to use nvtx" ON) if(USE_NVTX) message(STATUS "NVTX is enabled.") add_definitions("-DUSE_NVTX") @@ -118,7 +135,7 @@ set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS}") set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -std=c++17") set(CMAKE_CUDA_FLAGS "${CMAKE_CUDA_FLAGS} -Xcompiler -Wall -ldl") # -Xptxas -v -set(SM_SETS 52 60 61 70 75 80 86) +set(SM_SETS 52 60 61 70 75 80 86 90) set(USING_WMMA False) set(FIND_SM False) @@ -131,7 +148,7 @@ foreach(SM_NUM IN LISTS SM_SETS) set(FIND_SM True) set(CMAKE_CUDA_FLAGS "${CMAKE_CUDA_FLAGS} -gencode=arch=compute_${SM_NUM},code=\\\"sm_${SM_NUM},compute_${SM_NUM}\\\"") - if (SM_NUM STREQUAL 70 OR SM_NUM STREQUAL 75 OR SM_NUM STREQUAL 80 OR SM_NUM STREQUAL 86) + if (SM_NUM STREQUAL 70 OR SM_NUM STREQUAL 75 OR SM_NUM STREQUAL 80 OR SM_NUM STREQUAL 86 OR SM_NUM STREQUAL 90) set(USING_WMMA True) endif() @@ -178,17 +195,17 @@ endif() set(CMAKE_C_FLAGS_DEBUG "${CMAKE_C_FLAGS_DEBUG} -Wall -O0") set(CMAKE_CXX_FLAGS_DEBUG "${CMAKE_CXX_FLAGS_DEBUG} -Wall -O0") # set(CMAKE_CUDA_FLAGS_DEBUG "${CMAKE_CUDA_FLAGS_DEBUG} -O0 -G -Xcompiler -Wall --ptxas-options=-v --resource-usage") -set(CMAKE_CUDA_FLAGS_DEBUG "${CMAKE_CUDA_FLAGS_DEBUG} -O0 -G -Xcompiler -Wall") +set(CMAKE_CUDA_FLAGS_DEBUG "${CMAKE_CUDA_FLAGS_DEBUG} -O0 -G -Xcompiler -Wall -DCUDA_PTX_FP8_F2FP_ENABLED") set(CMAKE_CXX_STANDARD "${CXX_STD}") set(CMAKE_CXX_STANDARD_REQUIRED ON) set(CMAKE_CUDA_FLAGS "${CMAKE_CUDA_FLAGS} --expt-extended-lambda") set(CMAKE_CUDA_FLAGS "${CMAKE_CUDA_FLAGS} --expt-relaxed-constexpr") -set(CMAKE_CUDA_FLAGS "${CMAKE_CUDA_FLAGS} --std=c++${CXX_STD}") +set(CMAKE_CUDA_FLAGS "${CMAKE_CUDA_FLAGS} --std=c++${CXX_STD} -DCUDA_PTX_FP8_F2FP_ENABLED") set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -O3") # set(CMAKE_CUDA_FLAGS_RELEASE "${CMAKE_CUDA_FLAGS_RELEASE} -Xcompiler -O3 --ptxas-options=--verbose") -set(CMAKE_CUDA_FLAGS_RELEASE "${CMAKE_CUDA_FLAGS_RELEASE} -Xcompiler -O3") +set(CMAKE_CUDA_FLAGS_RELEASE "${CMAKE_CUDA_FLAGS_RELEASE} -Xcompiler -O3 -DCUDA_PTX_FP8_F2FP_ENABLED") if(BUILD_FAST_MATH) set(CMAKE_CUDA_FLAGS_RELEASE "${CMAKE_CUDA_FLAGS_RELEASE} --use_fast_math") message("CMAKE_CUDA_FLAGS_RELEASE: ${CMAKE_CUDA_FLAGS_RELEASE}") @@ -203,6 +220,8 @@ set(COMMON_HEADER_DIRS ${CUDA_PATH}/include ${CUTLASS_HEADER_DIR} ${CUTLASS_EXTENSIONS_DIR} + ${PROJECT_SOURCE_DIR}/3rdparty/trt_fp8_fmha/src + ${PROJECT_SOURCE_DIR}/3rdparty/trt_fp8_fmha/generated ) message("-- COMMON_HEADER_DIRS: ${COMMON_HEADER_DIRS}") @@ -304,15 +323,14 @@ endif() ######################################## -# Following feature requires cmake 3.15 -# TODO Remove this part or modify such that we can run it under cmake 3.10 -cmake_minimum_required(VERSION 3.15 FATAL_ERROR) -add_library(transformer-static STATIC +add_library(transformer-shared SHARED $ $ $ $ + $ $ + $ $ $ $ @@ -331,6 +349,7 @@ add_library(transformer-static STATIC $ $ $ + $ $ $ $ @@ -338,6 +357,7 @@ add_library(transformer-static STATIC $ $ $ + $ $ $ $ @@ -365,6 +385,7 @@ add_library(transformer-static STATIC $ $ $ + $ $ $ $ @@ -375,6 +396,7 @@ add_library(transformer-static STATIC $ $ $ + $ $ $ $ @@ -388,6 +410,7 @@ add_library(transformer-static STATIC $ $ $ + $ $ $ $ @@ -401,104 +424,46 @@ add_library(transformer-static STATIC $ $ ) -set_property(TARGET transformer-static PROPERTY POSITION_INDEPENDENT_CODE ON) -set_property(TARGET transformer-static PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) -target_link_libraries(transformer-static PUBLIC -lcudart -lcublas -lcublasLt -lcurand) -add_library(transformer-shared SHARED - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ - $ +if (BUILD_MULTI_GPU) +target_link_libraries(transformer-shared PUBLIC + -lmpi + -lnccl +) +endif() + +if(USE_NVTX) +target_link_libraries(transformer-shared PUBLIC + -lnvToolsExt ) +endif() + +if (ENABLE_FP8) +target_link_libraries(transformer-shared PUBLIC + $ + $ + $ + $ + $ + $ + $ + $ + $ + $ + $ + $ + $ + $ + $ + $ + $ + $ + $ + $ + $ +) +endif() + set_target_properties(transformer-shared PROPERTIES POSITION_INDEPENDENT_CODE ON) set_target_properties(transformer-shared PROPERTIES CUDA_RESOLVE_DEVICE_SYMBOLS ON) set_target_properties(transformer-shared PROPERTIES LINKER_LANGUAGE CXX) @@ -538,19 +503,6 @@ install( ${INSTALL_CONFIGDIR} ) -file(GLOB_RECURSE HEADER_FILES "*.h" "*.hpp" "*.cuh") -foreach ( file ${HEADER_FILES} ) - file( RELATIVE_PATH rfile ${CMAKE_CURRENT_SOURCE_DIR} ${file} ) - get_filename_component( dir ${rfile} DIRECTORY ) - install( FILES ${file} DESTINATION ${CMAKE_INSTALL_PREFIX}/include/${dir} ) -endforeach() - - -################################################################################ -# add_executable(gpt sample/cpp/gpt_sample.cc ) -# target_link_libraries(gpt PUBLIC -lcublas -lcublasLt -lcudart -lcurand -lnccl -lmpi transformer-static) -# target_link_libraries(gpt PUBLIC -lcublas -lcublasLt -lcudart -lcurand -lnccl -lmpi decoder decoding) - export( EXPORT transformer-shared-targets diff --git a/README.md b/README.md index 09b8f9b4f..a82098cd4 100644 --- a/README.md +++ b/README.md @@ -9,6 +9,7 @@ This repository provides a script and recipe to run the highly optimized transfo - [Model overview](#model-overview) - [Support matrix](#support-matrix) - [Advanced](#advanced) + - [Global Environment](#global-environment) - [Performance](#performance) - [BERT base performance](#bert-base-performance) - [BERT base performances of FasterTransformer new features](#bert-base-performances-of-fastertransformer-new-features) @@ -30,36 +31,41 @@ FasterTransformer is built on top of CUDA, cuBLAS, cuBLASLt and C++. We provide ### Support matrix -| Models | Framework | FP16 | INT8 (after Turing) | Sparsity (after Ampere) | Tensor parallel | Pipeline parallel | -| ---------------- | -------------- | ---- | ------------------- | ----------------------- | --------------- | ----------------- | -| BERT | TensorFlow | Yes | Yes | - | - | - | -| BERT | PyTorch | Yes | Yes | Yes | Yes | Yes | -| BERT | Triton backend | Yes | - | - | Yes | Yes | -| XLNet | C++ | Yes | - | - | - | - | -| Encoder | TensorFlow | Yes | Yes | - | - | - | -| Encoder | PyTorch | Yes | Yes | Yes | - | - | -| Decoder | TensorFlow | Yes | - | - | - | - | -| Decoder | PyTorch | Yes | - | - | - | - | -| Decoding | TensorFlow | Yes | - | - | - | - | -| Decoding | PyTorch | Yes | - | - | - | - | -| GPT | TensorFlow | Yes | - | - | - | - | -| GPT/OPT | PyTorch | Yes | - | - | Yes | Yes | -| GPT/OPT | Triton backend | Yes | - | - | Yes | Yes | -| BLOOM | PyTorch | Yes | - | - | Yes | Yes | -| BLOOM | Triton backend | Yes | - | - | Yes | Yes | -| GPT-J | Triton backend | Yes | - | - | Yes | Yes | -| Longformer | PyTorch | Yes | - | - | - | - | -| T5/UL2 | PyTorch | Yes | - | - | Yes | Yes | -| T5 | TensorFlow 2 | Yes | - | - | - | - | -| T5/UL2 | Triton backend | Yes | - | - | Yes | Yes | -| T5 | TensorRT | Yes | - | - | Yes | Yes | -| Swin Transformer | PyTorch | Yes | Yes | - | - | - | -| Swin Transformer | TensorRT | Yes | Yes | - | - | - | -| ViT | PyTorch | Yes | Yes | - | - | - | -| ViT | TensorRT | Yes | Yes | - | - | - | -| GPT-NeoX | Triton backend | Yes | - | - | Yes | Yes | -| BART/mBART | PyTorch | Yes | - | - | Yes | Yes | -| WeNet | C++ | Yes | - | - | - | - | +| Models | Framework | FP16 | INT8 (after Turing) | Sparsity (after Ampere) | Tensor parallel | Pipeline parallel | FP8 (after Hopper) | +| ---------------- | -------------- | ---- | ------------------- | ----------------------- | --------------- | ----------------- | ------------------ | +| BERT | TensorFlow | Yes | Yes | - | - | - | - | +| BERT | PyTorch | Yes | Yes | Yes | Yes | Yes | - | +| BERT | Triton backend | Yes | - | - | Yes | Yes | - | +| BERT | C++ | Yes | Yes | - | - | - | Yes | +| XLNet | C++ | Yes | - | - | - | - | - | +| Encoder | TensorFlow | Yes | Yes | - | - | - | - | +| Encoder | PyTorch | Yes | Yes | Yes | - | - | - | +| Decoder | TensorFlow | Yes | - | - | - | - | - | +| Decoder | PyTorch | Yes | - | - | - | - | - | +| Decoding | TensorFlow | Yes | - | - | - | - | - | +| Decoding | PyTorch | Yes | - | - | - | - | - | +| GPT | TensorFlow | Yes | - | - | - | - | - | +| GPT/OPT | PyTorch | Yes | - | - | Yes | Yes | Yes | +| GPT/OPT | Triton backend | Yes | - | - | Yes | Yes | - | +| GPT-MoE | PyTorch | Yes | - | - | Yes | Yes | - | +| BLOOM | PyTorch | Yes | - | - | Yes | Yes | - | +| BLOOM | Triton backend | Yes | - | - | Yes | Yes | - | +| GPT-J | Triton backend | Yes | - | - | Yes | Yes | - | +| Longformer | PyTorch | Yes | - | - | - | - | - | +| T5/UL2 | PyTorch | Yes | - | - | Yes | Yes | - | +| T5 | TensorFlow 2 | Yes | - | - | - | - | - | +| T5/UL2 | Triton backend | Yes | - | - | Yes | Yes | - | +| T5 | TensorRT | Yes | - | - | Yes | Yes | - | +| T5-MoE | PyTorch | Yes | - | - | Yes | Yes | - | +| Swin Transformer | PyTorch | Yes | Yes | - | - | - | - | +| Swin Transformer | TensorRT | Yes | Yes | - | - | - | - | +| ViT | PyTorch | Yes | Yes | - | - | - | - | +| ViT | TensorRT | Yes | Yes | - | - | - | - | +| GPT-NeoX | Triton backend | Yes | - | - | Yes | Yes | - | +| BART/mBART | PyTorch | Yes | - | - | Yes | Yes | - | +| WeNet | C++ | Yes | - | - | - | - | - | +| DeBERTa | TensorFlow 2 | Yes | - | - | On-going | On-going | - | +| DeBERTa | PyTorch | Yes | - | - | On-going | On-going | - | * Note that the FasterTransformer supports the models above on C++ because all source codes are built on C++. @@ -93,6 +99,15 @@ The following code lists the directory structure of FasterTransformer: Note that many folders contains many sub-folders to split different models. Quantization tools are move to `examples`, like `examples/tensorflow/bert/bert-quantization/` and `examples/pytorch/bert/bert-quantization-sparsity/`. + +### Global Environment + +FasterTransformer provides some convenient environment variables for debuging and testing. + +1. `FT_LOG_LEVEL`: This environment controls the log level of debug messae. More details are in `src/fastertransformer/utils/logger.h`. Note that the program will print lots of message when the level is lower than `DEBUG` and the program would become very slow. +2. `FT_NVTX`: If it is set to be `ON` like `FT_NVTX=ON ./bin/gpt_example`, the program will insert tha tag of nvtx to help profiling the program. +3. `FT_DEBUG_LEVEL`: If it is set to be `DEBUG`, then the program will run `cudaDeviceSynchronize()` after every kernels. Otherwise, the kernel is executued asynchronously by default. It is helpful to locate the error point during debuging. But this flag affects the performance of program significantly. So, it should be used only for debuging. + ## Performance Hardware settings: @@ -197,12 +212,23 @@ In the experiments of decoding, we updated the following parameters: ### Changelog +January 2023 +- Support GPT MoE +- Support FP8 for Bert and GPT (**Experimental**) +- Support DeBERTa on TensorFlow 2 and PyTorch + +Dec 2022 +- **Release the FasterTransformer 5.2** +- Support min length penalty + Nov 2022 - Support T5 Tensorflow 2 custom op. +- Support T5 MoE - Support WeNet - Support BART & mBART - Support SwinV2 - Initial support for w8a8 int8 mode with GPT (preview) +- Support fused mha in GPT Oct 2022 - Support BLOOM diff --git a/benchmarks/bert/pyt_benchmark.sh b/benchmarks/bert/pyt_benchmark.sh index b8d56de57..2495fc344 100644 --- a/benchmarks/bert/pyt_benchmark.sh +++ b/benchmarks/bert/pyt_benchmark.sh @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/benchmarks/bert/pyt_int8_benchmark.sh b/benchmarks/bert/pyt_int8_benchmark.sh index 8aaf0be89..ba5dd766a 100644 --- a/benchmarks/bert/pyt_int8_benchmark.sh +++ b/benchmarks/bert/pyt_int8_benchmark.sh @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/benchmarks/bert/pyt_sp_fp16_benchmark.sh b/benchmarks/bert/pyt_sp_fp16_benchmark.sh index 2dd00349b..f4f60420b 100644 --- a/benchmarks/bert/pyt_sp_fp16_benchmark.sh +++ b/benchmarks/bert/pyt_sp_fp16_benchmark.sh @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/benchmarks/bert/pyt_sp_int8_mode2_benchmark.sh b/benchmarks/bert/pyt_sp_int8_mode2_benchmark.sh index c793c6a5e..2cf8845c4 100644 --- a/benchmarks/bert/pyt_sp_int8_mode2_benchmark.sh +++ b/benchmarks/bert/pyt_sp_int8_mode2_benchmark.sh @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/benchmarks/bert/pyt_tp_benchmark.sh b/benchmarks/bert/pyt_tp_benchmark.sh index bc8df3162..4999b6085 100644 --- a/benchmarks/bert/pyt_tp_benchmark.sh +++ b/benchmarks/bert/pyt_tp_benchmark.sh @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/benchmarks/bert/tf_benchmark.sh b/benchmarks/bert/tf_benchmark.sh index 608acc94b..0b396e107 100644 --- a/benchmarks/bert/tf_benchmark.sh +++ b/benchmarks/bert/tf_benchmark.sh @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/benchmarks/bert/tf_int8_benchmark.sh b/benchmarks/bert/tf_int8_benchmark.sh index dfc295a2d..77f586eda 100644 --- a/benchmarks/bert/tf_int8_benchmark.sh +++ b/benchmarks/bert/tf_int8_benchmark.sh @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/benchmarks/decoding/pyt_decoding_beamsearch_benchmark.sh b/benchmarks/decoding/pyt_decoding_beamsearch_benchmark.sh index 74f78bc6e..58a8c107e 100644 --- a/benchmarks/decoding/pyt_decoding_beamsearch_benchmark.sh +++ b/benchmarks/decoding/pyt_decoding_beamsearch_benchmark.sh @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/benchmarks/decoding/tf_decoding_beamsearch_benchmark.sh b/benchmarks/decoding/tf_decoding_beamsearch_benchmark.sh index 592697eb9..12de88900 100644 --- a/benchmarks/decoding/tf_decoding_beamsearch_benchmark.sh +++ b/benchmarks/decoding/tf_decoding_beamsearch_benchmark.sh @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/benchmarks/decoding/tf_decoding_sampling_benchmark.sh b/benchmarks/decoding/tf_decoding_sampling_benchmark.sh index 10d46b7de..a51978886 100644 --- a/benchmarks/decoding/tf_decoding_sampling_benchmark.sh +++ b/benchmarks/decoding/tf_decoding_sampling_benchmark.sh @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/benchmarks/gpt/cpp_benchmark.sh b/benchmarks/gpt/cpp_benchmark.sh index 824beada6..122bc418e 100644 --- a/benchmarks/gpt/cpp_benchmark.sh +++ b/benchmarks/gpt/cpp_benchmark.sh @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/benchmarks/t5/pyt_benchmark.sh b/benchmarks/t5/pyt_benchmark.sh index 3157bb49f..6f4015071 100644 --- a/benchmarks/t5/pyt_benchmark.sh +++ b/benchmarks/t5/pyt_benchmark.sh @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/cmake/FasterTransformerConfig.cmake.in b/cmake/FasterTransformerConfig.cmake.in index d91a016f8..290213c96 100644 --- a/cmake/FasterTransformerConfig.cmake.in +++ b/cmake/FasterTransformerConfig.cmake.in @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions diff --git a/docker/Dockerfile.tf b/docker/Dockerfile.tf index de10137d0..1ad825ccc 100644 --- a/docker/Dockerfile.tf +++ b/docker/Dockerfile.tf @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -36,7 +36,8 @@ RUN git submodule update --init --recursive ENV NCCL_LAUNCH_MODE=GROUP ARG SM=80 ARG FORCE_BACKEND_REBUILD=0 +ARG ENABLE_FP8=OFF RUN mkdir /var/run/sshd -p && \ mkdir build -p && cd build && \ - cmake -DSM=${SM} -DCMAKE_BUILD_TYPE=Release -DBUILD_TF=ON -DTF_PATH=/usr/local/lib/python3.8/dist-packages/tensorflow_core/ -DBUILD_MULTI_GPU=ON .. && \ + cmake -DSM=${SM} -DCMAKE_BUILD_TYPE=Release -DBUILD_TF=ON -DTF_PATH=/usr/local/lib/python3.8/dist-packages/tensorflow_core/ -DBUILD_MULTI_GPU=ON -DENABLE_FP8=${ENABLE_FP8} .. && \ make -j"$(grep -c ^processor /proc/cpuinfo)" diff --git a/docker/Dockerfile.tf2 b/docker/Dockerfile.tf2 index f48a27ae5..4a7e307a3 100644 --- a/docker/Dockerfile.tf2 +++ b/docker/Dockerfile.tf2 @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -35,7 +35,8 @@ RUN git submodule update --init --recursive ARG SM=80 ARG FORCE_BACKEND_REBUILD=0 +ARG ENABLE_FP8=OFF RUN mkdir /var/run/sshd -p && \ mkdir build -p && cd build && \ - cmake -DSM=${SM} -DCMAKE_BUILD_TYPE=Release -DBUILD_TF2=ON -DTF_PATH=/usr/local/lib/python3.8/dist-packages/tensorflow/ .. && \ + cmake -DSM=${SM} -DCMAKE_BUILD_TYPE=Release -DBUILD_TF2=ON -DTF_PATH=/usr/local/lib/python3.8/dist-packages/tensorflow/ -DENABLE_FP8=${ENABLE_FP8} .. && \ make -j"$(grep -c ^processor /proc/cpuinfo)" diff --git a/docker/Dockerfile.torch b/docker/Dockerfile.torch index dc07f931a..746f9e7e5 100644 --- a/docker/Dockerfile.torch +++ b/docker/Dockerfile.torch @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -44,7 +44,8 @@ RUN git submodule update --init --recursive && \ # RUN pip uninstall -y apex && \ # pip install git+https://github.com/NVIDIA/apex --global-option="--cpp_ext" --global-option="--cuda_ext" --global-option="--fast_layer_norm" && \ # pip install 3rdparty/NeMo[nlp] -RUN pip install 3rdparty/NeMo[nlp] +RUN pip install --upgrade --no-cache-dir pip \ + && pip install --no-cache-dir 3rdparty/NeMo[nlp] ENV NCCL_LAUNCH_MODE=GROUP ARG SM=80 @@ -52,11 +53,12 @@ ARG BUILD_MIXED_GEMM=OFF ARG FORCE_BACKEND_REBUILD=0 ARG SPARSITY_SUPPORT=OFF ARG BUILD_MULTI_GPU=ON +ARG ENABLE_FP8=OFF RUN mkdir /var/run/sshd -p && \ mkdir build -p && cd build && \ wget https://developer.download.nvidia.com/compute/libcusparse-lt/0.1.0/local_installers/libcusparse_lt-linux-x86_64-0.1.0.2.tar.gz && \ tar -xzvf libcusparse_lt-linux-x86_64-0.1.0.2.tar.gz && \ cmake -DSM=${SM} -DCMAKE_BUILD_TYPE=Release -DBUILD_PYT=ON -DSPARSITY_SUPPORT=${SPARSITY_SUPPORT} -DMEASURE_BUILD_TIME=ON \ -DBUILD_CUTLASS_MIXED_GEMM=${BUILD_MIXED_GEMM} -DCUSPARSELT_PATH=/workspace/FasterTransformer/build/libcusparse_lt/ \ - -DBUILD_MULTI_GPU=${BUILD_MULTI_GPU} -DBUILD_TRT=ON .. && \ + -DBUILD_MULTI_GPU=${BUILD_MULTI_GPU} -DBUILD_TRT=ON -DENABLE_FP8=${ENABLE_FP8} .. && \ make -j"$(grep -c ^processor /proc/cpuinfo)" diff --git a/docs/bert_guide.md b/docs/bert_guide.md index a444e4859..13cc47c30 100644 --- a/docs/bert_guide.md +++ b/docs/bert_guide.md @@ -43,7 +43,7 @@ The following configurations are supported in the FasterTransformer encoder. - Sequence length (S): smaller or equal to 4096. For INT8 mode=1, S should be a multiple of 32 when S > 384. - Size per head (N): Even number and smaller than 128. - Head number (H): Any number satisfying that H * N <= 1024 under FP32, or H * N <= 2048 under FP16. -- Data type: FP32, FP16, BF16 and INT8 +- Data type: FP32, FP16, BF16, INT8 and FP8 (**Experimental**). - Any number layer (N1) if the memory is enough In the FasterTransformer v1.0, we provide a highly optimized BERT-equivalent encoder model. Next, based on the idea of [Effective Transformer](https://github.com/bytedance/effective_transformer), we further optimize BERT inference by removing the useless padding in FasterTransformer v2.1 and provide the Effective FasterTransformer. In FasterTransformer v3.0, we provide INT8 quantization inference to get better performance. In FasterTransformer v3.1, we optimize the INT8 kernels to improve the performance of INT8 inference and integrate the multi-head attention of TensorRT plugin into FasterTransformer. In FasterTransformer v4.0, we add the multi-head attention kernel to support FP16 on V100 and INT8 on T4, A100. The following graph demonstrates the flow chart of these optimization, except INT8. In FasterTransformer v5.0, we refactor the codes, encapsulating the mask building and padding removing into the Bert forward function, and add the sparsity feature of Ampere GPU to accelerate the GEMM. In FasterTransformer v5.1, we support multi-node multi-GPU inference on Bert FP16. @@ -394,6 +394,24 @@ By default, `-DSM` is set by 70, 75, 80 and 86. When users set more kinds of `-D [INFO] batch_size 32 seq_len 32 layer 12 FT-CPP-time 2.69 ms ( 50 iterations) ``` +7. Run FasterTransformer under FP8 on C++ (Experimental) + + Note that FP8 is supported since Hopper and CUDA 11.8. Here, we use docker image `nvcr.io/nvidia/pytorch:22.10-py3` to demonstrate + + ```bash + nvidia-docker run -ti --shm-size 5g --rm nvcr.io/nvidia/pytorch:22.10-py3 bash + git clone https://github.com/NVIDIA/FasterTransformer.git + mkdir -p FasterTransformer/build + cd FasterTransformer/build + git submodule init && git submodule update + cmake -DSM=90 -DCMAKE_BUILD_TYPE=Release -DENABLE_FP8=ON .. + make -j12 + git lfs clone https://huggingface.co/bert-base-uncased + python3 ../examples/pytorch/bert/utils/huggingface_bert_convert.py -i bert-base-uncased/ -o bert-base-uncased/ft_fp32/ -i_g 1 + python3 ../examples/pytorch/bert/utils/huggingface_bert_fp8_convert.py -i bert-base-uncased/ -o bert-base-uncased/ft_fp8/ + ./bin/bert_fp8_example 4 12 384 12 64 1 1 ./bert-base-uncased/ + ``` + ### Run FasterTransformer BERT on TensorFlow 1. Run FasterTransformer encoder under FP32 on TensorFlow diff --git a/docs/deberta_guide.md b/docs/deberta_guide.md new file mode 100644 index 000000000..fe4ed062e --- /dev/null +++ b/docs/deberta_guide.md @@ -0,0 +1,125 @@ +# FasterTransformer DeBERTa + +The FasterTransformer DeBERTa implements the huggingface DeBERTa-V2 model (https://huggingface.co/docs/transformers/model_doc/deberta-v2). + +## Table Of Contents + +- [FasterTransformer DeBERTa](#fastertransformer-deberta) + - [Table Of Contents](#table-of-contents) + - [Introduction](#introduction) + - [Supported features](#supported-features) + - [Optimization](#optimization) + - [Setup](#setup) + - [Requirements](#requirements) + - [Build FasterTransformer](#build-fastertransformer) + - [Prepare](#prepare) + - [Build the project](#build-the-project) + - [How to use](#how-to-use) + +## Introduction + +This document describes what FasterTransformer provides for the `DeBERTa` model, explaining the workflow and optimization. We also provide a guide to help users to run the `DeBERTa` model on FasterTransformer. + +### Supported features + +* Checkpoint loading + * Huggingface +* Data type + * FP32 + * FP16 + * BF16 +* Feature + * Multi-GPU multi-node inference (implemented, not verified yet) + * Disentangled attention mechanism support with fused kernels +* Frameworks + * PyTorch + * TensorFlow + +### Optimization + +We implemented an efficient algorithm to perform the calculation of disentangled attention matrices for DeBERTa-variant types of Transformers. + +Unlike [BERT](https://arxiv.org/abs/1810.04805) where each word is represented by one vector that sums the content embedding and position embedding, [DeBERTa](https://arxiv.org/abs/2006.03654) design first proposed the concept of disentangled attention, which uses two vectors to encode content and position respectively and forms attention weights by summing disentangled matrices. Performance gap has been identified between the new attention scheme and the original self-attention, mainly due to extra indexing and gather opertaions. Major optimizations implemented in this plugin includes: (i) fusion of gather and pointwise operataions (ii) utilizing the pattern of relative position matrix and shortcuting out-of-boundary index calculation (iii) parallel index calculation. + +The disentangled attention support is primarily intended to be used together with DeBERTa network (with HuggingFace [DeBERTa](https://huggingface.co/docs/transformers/model_doc/deberta) and [DeBERTa-V2](https://huggingface.co/docs/transformers/model_doc/deberta-v2) implementation), but also applies to generic architectures that adopt disentangeld attention. + +## Setup + +The following section lists the requirements to use FasterTransformer. + +### Requirements + +- CMake >= 3.13 for PyTorch +- CUDA 11.0 or newer version +- NCCL 2.10 or newer version +- Python: Only verify on Python 3. +- TensorFlow 2.0: Verify on 2.10.0. + +Ensure you have the following components: +- [NVIDIA Docker](https://github.com/NVIDIA/nvidia-docker) and NGC container are recommended +- [NVIDIA Pascal](https://www.nvidia.com/en-us/data-center/pascal-gpu-architecture/) or [Volta](https://www.nvidia.com/en-us/data-center/volta-gpu-architecture/) or [Turing](https://www.nvidia.com/en-us/geforce/turing/) or [Ampere](https://www.nvidia.com/en-us/data-center/nvidia-ampere-gpu-architecture/) based GPU + +For more information about how to get started with NGC containers, see the following sections from the NVIDIA GPU Cloud Documentation and the Deep Learning Documentation: + +- [Getting Started Using NVIDIA GPU Cloud](https://docs.nvidia.com/ngc/ngc-getting-started-guide/index.html) +- [Accessing And Pulling From The NGC Container Registry](https://docs.nvidia.com/deeplearning/frameworks/user-guide/index.html#accessing_registry) +- [Running PyTorch](https://docs.nvidia.com/deeplearning/frameworks/pytorch-release-notes/index.html) + +For those unable to use the NGC container, to set up the required environment or create your own container, see the versioned [NVIDIA Container Support Matrix](https://docs.nvidia.com/deeplearning/frameworks/support-matrix/index.html). + +### Build FasterTransformer + +#### Prepare + +You can choose the pytorch version and python version you want. Here, we suggest image `nvcr.io/nvidia/pytorch:22.09-py3`, which contains the PyTorch 1.13.0 and python 3.8. + + ```bash + nvidia-docker run -ti --shm-size 5g --rm nvcr.io/nvidia/pytorch:22.09-py3 bash + git clone https://github.com/NVIDIA/FasterTransformer.git + mkdir -p FasterTransformer/build + cd FasterTransformer/build + git submodule init && git submodule update + ``` + +#### Build the project + +* Note: the `xx` of `-DSM=xx` in following scripts means the compute capability of your GPU. The following table shows the compute capability of common GPUs. + +| GPU | compute capacity | +| :---: | :--------------: | +| P40 | 60 | +| P4 | 61 | +| V100 | 70 | +| T4 | 75 | +| A100 | 80 | +| A30 | 80 | +| A10 | 86 | + +By default, `-DSM` is set by 70, 75, 80 and 86. When users set more kinds of `-DSM`, it requires longer time to compile. So, we suggest setting the `-DSM` for the device you use only. Here, we use `xx` as an example due to convenience. + +1. build with TensorFlow + + ```bash + docker build -f docker/Dockerfile.tf2 --build-arg SM=XX --tag=ft-tf2 . + docker run --gpus all --ipc=host --ulimit memlock=-1 --ulimit stack=67108864 -it --rm ft-tf2:latest + + mkdir build && cd build + cmake -DSM=xx -DCMAKE_BUILD_TYPE=Release -DBUILD_MULTI_GPU=ON -DBUILD_TF2=ON -DTF_PATH=/usr/local/lib/python3.8/dist-packages/tensorflow/ .. + make -j12 + ``` + This will build the TensorFlow custom class. Please make sure that the `TensorFlow >= 2.0`. + +2. build with PyTorch + + ```bash + docker build -f docker/Dockerfile.torch --build-arg SM=XX --tag=ft-pytorch . + + mkdir build && cd build + cmake -DSM=xx -DCMAKE_BUILD_TYPE=Release -DBUILD_PYT=ON -DBUILD_MULTI_GPU=ON .. + make -j12 + ``` + + This will build the TorchScript custom class. Please make sure that the `PyTorch >= 1.5.0`. + +## How to use +Please refer to [DeBERTa examples](../examples/tensorflow/deberta/) for demo of FT DeBERTa usage. Meanwhile, task specific examples are under development. \ No newline at end of file diff --git a/docs/gpt_guide.md b/docs/gpt_guide.md index c3c2b2505..5f08f6719 100644 --- a/docs/gpt_guide.md +++ b/docs/gpt_guide.md @@ -22,10 +22,15 @@ - [Download onnx model and convert](#download-onnx-model-and-convert) - [Download huggingface gpt model and convert](#download-huggingface-gpt-model-and-convert) - [Run GPT](#run-gpt) + - [Set up in interactive mode](#set-up-in-interactive-mode) + - [Run on singe-node](#run-on-singe-node) + - [Run on multi-node](#run-on-multi-node) - [Run GPT with prompts](#run-gpt-with-prompts) - [Run Meta OPT](#run-meta-opt) - [Run BLOOM](#run-bloom) - [gpt with triton backend](#gpt-with-triton-backend) + - [GPT with MOE](#gpt-with-moe) + - [GPT with FP8 (Experimental)](#gpt-with-fp8-experimental) - [Advanced features](#advanced-features) - [generate different sentences and enable shared context](#generate-different-sentences-and-enable-shared-context) - [Interactive generation](#interactive-generation) @@ -51,7 +56,7 @@ GPT is a variant of Decoding model, which does not have the encoder module, cros * Huggingface * Megatron * Nemo Megatron - * TensorFlow  + * TensorFlow * Data type * FP32 * FP16 @@ -65,6 +70,8 @@ GPT is a variant of Decoding model, which does not have the encoder module, cros * Note: * Weights are preprocessed offline based on the current GPU to optimize the weight alignment for consumption by tensorcores. Currently, we directly consume FP32/BF16/FP16 weights and quantize them just before inference. If we want to store quantized weights, they MUST be preprocessed for the GPU intended to be used with inference. * When using the torch APIs, int8 mode is only available via the Parallel GPT Op. The Parallel GPT Op can also be used on single GPU. + * INT8 with SmoothQuant + * FP8 (**Experimental**) * Feature * Multi-GPU multi-node inference * Dynamic random seed @@ -100,17 +107,19 @@ FasterTransformer splits the whole workflow into 2 parts. The first one is “co

The following examples demonstrating how to run multi-GPU and multi-node GPT model. + 1. `examples/cpp/multi_gpu_gpt_example.cc`: It uses MPI to organize all GPUs. 2. `examples/cpp/multi_gpu_gpt_triton_example.cc`: It uses threading for intra node, and MPI for inter node. This example also demonstrates how to use Triton backend API of FasterTransformer to run the GPT model. 3. `examples/pytorch/gpt/multi_gpu_gpt_example.py`: This example is similar to `examples/cpp/multi_gpu_gpt_example.cc`, but encapsulate the instance of FasterTransformer by PyTorch OP. In summary, the workflow to run the GPT model is: -1. Initializing the NCCL comm and setting ranks of tensor parallel and pipeline parallel by MPI or threading -2. Load weights by the ranks of tensor parallel, pipeline parallel and other model hyper-parameters. -3. Create the instance of `ParalelGpt` by the ranks of tensor parallel, pipeline parallel and other model hyper-parameters. -4. Receive the request from client and convert the request to the format of input tensors for ParallelGpt. -5. Run forward -6. Convert the output tensors of ParallelGpt to response of client and return the response. + +1. Initializing the NCCL comm and setting ranks of tensor parallel and pipeline parallel by MPI or threading +2. Load weights by the ranks of tensor parallel, pipeline parallel and other model hyper-parameters. +3. Create the instance of `ParalelGpt` by the ranks of tensor parallel, pipeline parallel and other model hyper-parameters. +4. Receive the request from client and convert the request to the format of input tensors for ParallelGpt. +5. Run forward +6. Convert the output tensors of ParallelGpt to response of client and return the response. In c++ example codes, we skip the step 4 and step 6, loading the request by `examples/cpp/multi_gpu_gpt/start_ids.csv`. In PyTorch example codes, the request comes from the PyTorch side. In Triton example codes, we have a completed examples from step 1 to step 6. The source codes are put in `src/fastertransformer/models/multi_gpu_gpt/ParallelGpt.cc`. The arguments, input tensors and output tensors of GPT: @@ -125,18 +134,10 @@ The source codes are put in `src/fastertransformer/models/multi_gpu_gpt/Parallel | [3] | beam_width | size_t | **Deprecated, move to input** | | [4] | head_num | size_t | Head number for model configuration | | [5] | size_per_head | size_t | Size per head for model configuration | -| [6] | inter_size | size_t | The inter size of feed forward network. It is often set to 4 * head_num * size_per_head. | +| [6] | inter_size | size_t | The inter size of feed forward network. It is often set to 4 \* head_num \* size_per_head. | | [7] | num_layer | size_t | Number of transformer layers for model configuration | | [8] | vocab_size | int | Vocabulary size for model configuration | | [9] | start_id | int | Start id for vocabulary | -| [10] | end_id | int | End id for vocabulary | -| [11] | prompt_learning_start_id | int | The start id of virtual token in p/prompt-tuning | -| [12] | prompt_learning_type | PromptLearningType | The type of prompt learning when we load the prompt embedding in constructor. FT supports `no_prompt`, `soft_prompt`, `prefix_prompt`, `p_prompt_tuning` now | -| [13] | gpt_variant_params | gptVariantParams | This structure defines some hyper-parameters of gpt layers, including type of layernorm and activation | -| [14] | beam_search_diversity_rate | float | **Deprecated, move to input** | -| [15] | top_k | size_t | **Deprecated, move to input** | -| [16] | top_p | float | **Deprecated, move to input** | -| [17] | random_seed | unsigned long long | **Deprecated, move to input** | | [18] | temperature | float | **Deprecated, move to input** | | [19] | len_penalty | float | **Deprecated, move to input** | | [20] | repetition_penalty | float | **Deprecated, move to input** | @@ -144,7 +145,6 @@ The source codes are put in `src/fastertransformer/models/multi_gpu_gpt/Parallel | [22] | pipeline_para | NcclParam | Pipeline Parallel information, which is declared in `src/fastertransformer/utils/nccl_utils.h` | | [23] | stream | cudaStream_t | CUDA stream | | [24] | cublas_wrapper | cublasMMWrapper* | Pointer of cuBLAS wrapper, which is declared in `src/fastertransformer/utils/cublasMMWrapper.h` | -| [25] | allocator | IAllocator* | Pointer of memory allocator, which is declared in `src/fastertransformer/utils/allocator.h` | | [26] | is_free_buffer_after_forward | bool | If setting to be `true`, FasterTransformer will allocate buffer before forward, and free buffer after forward. When the allocator is based on memory pool, setting to `true` may help reducing the memory usage during inference. | | [27] | cuda_device_prop | cudaDeviceProp* | Pointer of CUDA device properties, which is used to get the properties of hardware like size of shared memory | | [28] | sparse | bool | Is using sparsity. **Experimental feature** | @@ -164,14 +164,9 @@ The source codes are put in `src/fastertransformer/models/multi_gpu_gpt/Parallel | output_seq_len | [batch_size] | CPU | uint32_t | The largest number of tokens you hope for results. Note that it contains the input length | | stop_words_list | [batch_size, 2, stop_words_length] | GPU | int | **Optional**. When FT generates words in this list, it will stop the generation. An extension of stop id | | bad_words_list | [batch_size, 2, bad_words_length] | GPU | int | **Optional**. The words in the list will never be sampled. | -| start_id | [batch_size] | CPU | int | **Optional**. If FT receives this input, FT will replace default start id by it | -| end_id | [batch_size] | CPU | int | **Optional**. If FT receives this input, FT will replace default end id by it | -| runtime_top_k | [1] or [batch_size] | CPU | uint | **Optional**. top_k value for top k sampling | -| runtime_top_p | [1] or [batch_size] | CPU | float | **Optional**. top_p value for top p sampling | -| beam_search_diversity_rate | [1] or [batch_size] | CPU | float | **Optional**. A hyper hyper-parameter for [simple diverse decoding](https://arxiv.org/pdf/1611.08562.pdf) | -| temperature | [1] or [batch_size] | CPU | float | **Optional**. Temperature applied to logits for both beam search and sampling | -| len_penalty | [1] or [batch_size] | CPU | float | **Optional**. Length penalty applied to logits for only beam search | -| repetition_penalty | [1] or [batch_size] | CPU | float | **Optional**. Repetition penalty applied to logits for both beam search and sampling | +| repetition_penalty | [1] or [batch_size] | CPU | float | **Optional**. Repetition penalty applied to logits for both beam search and sampling. Exclusive with presence_penalty. | +| presence_penalty | [1] or [batch_size] | CPU | float | **Optional**. Presence penalty - additive type of repetition penalty - applied to logits for both beam search and sampling. Exclusive with repetition_penalty. | +| min_length | [1] or [batch_size] | CPU | int | **Optional**. Minimum number of tokens to generate | | random_seed | [1] or [batch_size] | CPU | unsigned long long int | **Optional**. Random seed to initialize the random table in sampling. | | request_prompt_lengths | [batch_size], | GPU | int | **Optional**. Length of prefix soft prompt embedding. This describes how many tokens of soft prompt embedding in each sentence. | | request_prompt_embedding | [batch_size, max_prompt_length, hidden_units] | GPU | float/half/bfloat16 | **Optional**. FT will concat them with results of embedding lookup kernel. For prefix soft prompt embedding, the type must be float; for p/prompt tuning, the type is same to weight. | @@ -199,14 +194,14 @@ The `beam_width` value is set by the output shape directly. When the `beam_width ### Optimization -1. Kernel optimization: many kernels are based on the kernels of decoder and decoding modules, which are already highly optimized. To prevent from recomputing the previous keys and values, we will allocate a buffer to store them at each step. Although it takes some additional memory usage, we can save the cost of recomputing, allocating buffer at each step, and the cost of concatenation. -2. Memory optimization: Different to traditional models like BERT, GPT-3 has 175 billion parameters, taking 350 GBs even if we store the model by half precision. Therefore, we must reduce the memory usage for other parts. In FasterTransformer, we will reuse the memory buffer of different decoder layers. Since the number of layers in GPT-3 is 96, we only need 1/96 memory. -3. Model parallelism: In GPT model, FasterTransormer provides both tensor parallelism and pipeline parallelism. For tensor parallelism, FasterTransformer follows the idea of [Megatron]( https://arxiv.org/pdf/1909.08053.pdf). For both self-attention block and feed forward network block, we split the weights of first matrix multiplication by row and split the weights of the second matrix multiplication by column. By optimization, we can reduce the reduction operation to 2 times for each transformer block. The workflow is demonstrated in Fig 3. For pipeline parallelism, FasterTransformer splits the whole batch of request into multiple micro batches and hide the bubble of communication. FasterTransformer will adjust the micro batch size automatically for different cases. Users can adjust the model parallelism by modifying the `gpt_config.ini` file. We recommend to use tensor parallel intra node, and use pipeline parallel inter node because tensor parallel requires more NCCL communication. -4. Multiple frameworks: Except the source codes on c, FasterTransformer also provide the TensorFlow op, PyTorch op and Triton backend. Currently, TensorFlow op only supports the single GPU, while PyTorch op and Triton backend support multi-GPU and multi-node. To prevent the additional work of splitting model for model parallelism, FasterTransformer also provides a tool to split and convert the model of Megatron to binary files, then FasterTransformer can load the model in binary directly. +1. Kernel optimization: many kernels are based on the kernels of decoder and decoding modules, which are already highly optimized. To prevent from recomputing the previous keys and values, we will allocate a buffer to store them at each step. Although it takes some additional memory usage, we can save the cost of recomputing, allocating buffer at each step, and the cost of concatenation. +2. Memory optimization: Different to traditional models like BERT, GPT-3 has 175 billion parameters, taking 350 GBs even if we store the model by half precision. Therefore, we must reduce the memory usage for other parts. In FasterTransformer, we will reuse the memory buffer of different decoder layers. Since the number of layers in GPT-3 is 96, we only need 1/96 memory. +3. Model parallelism: In GPT model, FasterTransormer provides both tensor parallelism and pipeline parallelism. For tensor parallelism, FasterTransformer follows the idea of [Megatron]( https://arxiv.org/pdf/1909.08053.pdf). For both self-attention block and feed forward network block, we split the weights of first matrix multiplication by row and split the weights of the second matrix multiplication by column. By optimization, we can reduce the reduction operation to 2 times for each transformer block. The workflow is demonstrated in Fig 3. For pipeline parallelism, FasterTransformer splits the whole batch of request into multiple micro batches and hide the bubble of communication. FasterTransformer will adjust the micro batch size automatically for different cases. Users can adjust the model parallelism by modifying the `gpt_config.ini` file. We recommend to use tensor parallel intra node, and use pipeline parallel inter node because tensor parallel requires more NCCL communication. +4. Multiple frameworks: Except the source codes on c, FasterTransformer also provide the TensorFlow op, PyTorch op and Triton backend. Currently, TensorFlow op only supports the single GPU, while PyTorch op and Triton backend support multi-GPU and multi-node. To prevent the additional work of splitting model for model parallelism, FasterTransformer also provides a tool to split and convert the model of Megatron to binary files, then FasterTransformer can load the model in binary directly. ### Note -- `is_context_qk_buf_float_` (whether use float accumulation for GPT-Neox context QK GEMM or not) is set to `false` by default. If you meet accuracy issues releated to GPT-NeoX Context attention blocks, please try to enable it in the `GptNeoX.h`. +* `is_context_qk_buf_float_` (whether use float accumulation for GPT context QK GEMM or not) is set to `false` by default. If you meet accuracy issues related to GPT Context attention blocks, please try to enable it in the `ParallelGpt.h`. ## Setup @@ -214,31 +209,31 @@ The following guide demonstrates how to run the examples of c++, PyTorch and Tri ### Requirements -- CMake >= 3.8 for Tensorflow, CMake >= 3.13 for PyTorch -- CUDA 11.0 or newer version -- NCCL 2.10 or newer version -- Python: Only verify on python 3 -- Tensorflow: Verify on 1.15, 1.13 and 1.14 should work. -- PyTorch: Verify on 1.8.0, >= 1.5.0 should work. +* CMake >= 3.8 for Tensorflow, CMake >= 3.13 for PyTorch +* CUDA 11.0 or newer version +* NCCL 2.10 or newer version +* Python: Only verify on python 3 +* Tensorflow: Verify on 1.15, 1.13 and 1.14 should work. +* PyTorch: Verify on 1.8.0, >= 1.5.0 should work. Recommend use nvcr image like `nvcr.io/nvidia/tensorflow:22.09-tf1-py3` or `nvcr.io/nvidia/pytorch:22.09-py3`. These components are readily available within the NGC TensorFlow Docker image below. Ensure you have the following components: -- [NVIDIA Docker](https://github.com/NVIDIA/nvidia-docker) and NGC container are recommended -- [NVIDIA Pascal](https://www.nvidia.com/en-us/data-center/pascal-gpu-architecture/) or [Volta](https://www.nvidia.com/en-us/data-center/volta-gpu-architecture/) or [Turing](https://www.nvidia.com/en-us/geforce/turing/) or [Ampere](https://www.nvidia.com/en-us/data-center/nvidia-ampere-gpu-architecture/) based GPU + +* [NVIDIA Docker](https://github.com/NVIDIA/nvidia-docker) and NGC container are recommended +* [NVIDIA Pascal](https://www.nvidia.com/en-us/data-center/pascal-gpu-architecture/) or [Volta](https://www.nvidia.com/en-us/data-center/volta-gpu-architecture/) or [Turing](https://www.nvidia.com/en-us/geforce/turing/) or [Ampere](https://www.nvidia.com/en-us/data-center/nvidia-ampere-gpu-architecture/) based GPU For more information about how to get started with NGC containers, see the following sections from the NVIDIA GPU Cloud Documentation and the Deep Learning Documentation: -- [Getting Started Using NVIDIA GPU Cloud](https://docs.nvidia.com/ngc/ngc-getting-started-guide/index.html) -- [Accessing And Pulling From The NGC Container Registry](https://docs.nvidia.com/deeplearning/frameworks/user-guide/index.html#accessing_registry) -- [Running TensorFlow](https://docs.nvidia.com/deeplearning/frameworks/tensorflow-release-notes/running.html#running) -- [Running PyTorch](https://docs.nvidia.com/deeplearning/frameworks/pytorch-release-notes/index.html) +* [Getting Started Using NVIDIA GPU Cloud](https://docs.nvidia.com/ngc/ngc-getting-started-guide/index.html) +* [Accessing And Pulling From The NGC Container Registry](https://docs.nvidia.com/deeplearning/frameworks/user-guide/index.html#accessing_registry) +* [Running TensorFlow](https://docs.nvidia.com/deeplearning/frameworks/tensorflow-release-notes/running.html#running) +* [Running PyTorch](https://docs.nvidia.com/deeplearning/frameworks/pytorch-release-notes/index.html) For those unable to use the NGC container, to set up the required environment or create your own container, see the versioned [NVIDIA Container Support Matrix](https://docs.nvidia.com/deeplearning/frameworks/support-matrix/index.html). - ### Build the FasterTransformer #### Prepare @@ -463,14 +458,16 @@ python ../examples/pytorch/gpt/utils/huggingface_gpt_convert.py -i gpt2-xl/ -o . For generating outputs based on context inputs, create a text file including the context inputs (line by line) and set `--sample_file_input` to the text file path. (By default, the script will generate outputs without context inputs.) Set `--sample_file_output` to write the outputs to a file. Use `--data_type fp16/bf16` to run in FP16 or BF16. Run with `-h` to see more settings. + ```bash - python ../examples/pytorch/gpt/gpt_example.py -h + python ../examples/pytorch/gpt/multi_gpu_gpt_example.py -h ``` 2.1 Run GPT with TP and PP on single node (NVIDIA DGX A100). Note that the number of processes must equal to `tensor_para_size * pipeline_para_size`. + ```bash # No parallelism (tensor_para_size=1, pipeline_para_size=1) - python ../examples/pytorch/gpt/gpt_example.py + python ../examples/pytorch/gpt/multi_gpu_gpt_example.py # TP (tensor_para_size=8, pipeline_para_size=1) mpirun -n 8 --allow-run-as-root python ../examples/pytorch/gpt/multi_gpu_gpt_example.py --tensor_para_size=8 --pipeline_para_size=1 --ckpt_path="/workspace/fastertransformer/models/megatron-models/c-model/345m/8-gpu" @@ -483,7 +480,8 @@ python ../examples/pytorch/gpt/utils/huggingface_gpt_convert.py -i gpt2-xl/ -o . ``` 2.2 Run GPT with TP and PP on single-node/multi-node (NVIDIA SuperPOD) - #### Set up in interactive mode + +#### Set up in interactive mode ```bash srun -A devtech -J devtech-gpt:gpt -p luna -N1 --mpi=pmix --ntasks-per-node=8 --container-image nvcr.io/nvidia/pytorch:22.09-py3 --container-mounts /lustre/fsw/devtech/hpc-devtech/dahn/FasterTransformer:/workspace/fastertransformer --container-workdir /workspace/fastertransformer --pty bash @@ -492,14 +490,16 @@ python ../examples/pytorch/gpt/utils/huggingface_gpt_convert.py -i gpt2-xl/ -o . cmake -DSM=80 -DCMAKE_BUILD_TYPE=Release -DBUILD_PYT=ON .. && make -j12 ``` - #### Run on singe-node +#### Run on singe-node + * tensor_para_size=8, pipeline_para_size=1 ```bash srun -A devtech -p luna -N1 --mpi=pmix --ntasks-per-node=8 --container-image nvcr.io/nvidia/pytorch:22.09-py3 --container-mounts /lustre/fsw/devtech/hpc-devtech/dahn/FasterTransformer:/workspace/fastertransformer --container-workdir /workspace/fastertransformer/build python ../examples/pytorch/gpt/multi_gpu_gpt_example.py --tensor_para_size=8 --pipeline_para_size=1 --ckpt_path="/workspace/fastertransformer/models/megatron-models/c-model/345m/8-gpu" ``` - #### Run on multi-node +#### Run on multi-node + * tensor_para_size=8, pipeline_para_size=2 ```bash @@ -526,7 +526,7 @@ python ../examples/pytorch/gpt/utils/huggingface_gpt_convert.py -i gpt2-xl/ -o . python ../examples/pytorch/gpt/lambada_task_example.py \ --batch-size 64 \ --checkpoint-path ../models/megatron-models/c-model/345m/1-gpu/ \ - --lib-path lib/libth_parallel_gpt.so \ + --lib-path lib/libth_transformer.so \ --lambada-path ../models/megatron-models/lambada_test.jsonl ``` @@ -550,14 +550,14 @@ python ../examples/pytorch/gpt/utils/huggingface_gpt_convert.py -i gpt2-xl/ -o . GPT now supports p/prompt-tuning. It works with [nemo checkpoint and prompt learning](https://docs.nvidia.com/deeplearning/nemo/user-guide/docs/en/main/nlp/prompt_learning.html). -1. Convert the prompt weights +1. Convert the prompt weights Use the `examples/pytorch/gpt/utils/nemo_ckpt_convert.py` to convert the NeMo Megatron Prompt Weights. It will automatically generate configuration needed for triton backend inference. Note that you need to specify `start_id`, `end_id` by yourself in order to make sure that it is consistent with the tokenizer. -2. Run GPT with C++ example +2. Run GPT with C++ example You need to specify the example gpt_config.ini like below to enable the p/prompt_tuning feature. @@ -589,10 +589,10 @@ GPT now supports p/prompt-tuning. It works with [nemo checkpoint and prompt lear **prompt_learning_type**: - - no prompt: 0 - - soft_prompt: 1 - - prefix_prompt: 2 - - p/prompt_tuning: 3 + * no prompt: 0 + * soft_prompt: 1 + * prefix_prompt: 2 + * p/prompt_tuning: 3 ### Run Meta OPT @@ -605,6 +605,7 @@ You need to convert the Huggingface Meta Opt models to fastertransformer format In order to run with Meta Opt models, you need to add additional configuraitons: `model_variant`, which controls the `layernorm_eps, layernorm_type, activation_type, has_post_decoder_layernorm`. For example, the opt 125m model configuraitons would be like: + ```ini [opt_125M] head_num=12 @@ -616,18 +617,18 @@ You need to convert the Huggingface Meta Opt models to fastertransformer format inter_size=3072 model_variant=opt-pre ;define variant structure ``` + There are two model types: opt-pre = [pre_layernorm](https://github.com/huggingface/transformers/blob/main/src/transformers/models/opt/modeling_opt.py#L332), opt_post = [post_layernorm](https://github.com/huggingface/transformers/blob/main/src/transformers/models/opt/modeling_opt.py#L323)\ **Note that:** [the model has post decoder layernorm when layernorm_type is pre_layernorm](https://github.com/huggingface/transformers/blob/main/src/transformers/models/opt/modeling_opt.py#L498). 1.1 Support for w8a8 int8 mode with OPT (preview) - FasterTransformer supports having certain operations with both weights and activations in int8. To keep high accuracy with your model, we recommend [SmoothQuant](https://arxiv.org/pdf/2211.10438.pdf) models. Fig 4 shows the workflow, except that the batched gemm of multi-head attention is under half. You can convert a regular OPT model to a SmoothQuant one with this [repo](https://github.com/mit-han-lab/smoothquant). You must also generate activation records for calibrating the scaling factors. With these, you can convert the SmoothQuant model for w8a8 inference in FT: - + FasterTransformer supports having certain operations with both weights and activations in int8. To keep high accuracy with your model, we recommend [SmoothQuant](https://arxiv.org/pdf/2211.10438.pdf) models. Fig 4 presents the data flow. You can convert a regular OPT model to a SmoothQuant one with this [repo](https://github.com/mit-han-lab/smoothquant). You must also generate activation records for calibrating the scaling factors. With these, you can convert the SmoothQuant model for w8a8 inference in FT: ``` python3 examples/pytorch/gpt/utils/huggingface_opt_convert.py -i ../smoothquant/opt-1.3b-smooth/ -o ../nlp-models/ft/test/opt-1.3b-int8/ -i_g 1 -act_scale ../smoothquant/opt-1.3b-smooth.scales.pt ``` - Then, set the `int8_mode` to `2` in `examples/cpp/gpt/gpt_config.ini` and run `bin/multi_gpu_gpt_example`. Note that this optimization only supports OPT with per-layernorm (`opt-pre`). + Then, set the `int8_mode` to `2` in `examples/cpp/gpt/gpt_config.ini` and run `bin/multi_gpu_gpt_example`. Note that this optimization only supports OPT with pre-layernorm (`opt-pre`).
      @@ -739,6 +740,7 @@ You need to convert the Huggingface Meta Opt models to fastertransformer format Model configurations have been automatically generated when converting the [meta opt models](https://huggingface.co/docs/transformers/model_doc/opt).\ Then, you can use the converted weights and configuration file to serve the model by triton servers. Example of the `config.ini` when converting the model: + ```ini [gpt] model_name = opt-350m/ @@ -805,7 +807,9 @@ Users can convert a pretrained Huggingface BLOOM model into fastertransformer fo --dataset-path ../datasets/lambada/lambada_test.jsonl \ --show-progress ``` + The result accuracy will be around 35.3% in both cases. + ``` (HF) Accuracy: 35.3775% (1823/5153) (elapsed time: 23.3663 sec) (FT) Accuracy: 35.3386% (1821/5153) (elapsed time: 10.8444 sec) @@ -831,11 +835,139 @@ Users can convert a pretrained Huggingface BLOOM model into fastertransformer fo end_id=2 ``` - ### gpt with triton backend Details are in [transformer_backend](https://github.com/triton-inference-server/fastertransformer_backend) +### GPT with MOE + +We choose the [checkpoint](https://www.modelscope.cn/models/PAI/nlp_gpt3_text-generation_0.35B_MoE-64/summary) provided by modelscope. This checkpoint is trained by chinese dataset. So, we will test by some chinese texts. Besides, we need some modification on Megatron-DeepSpeed to load the MOE checkpoint. We have put the modified Megtron-DeepSpeed codes in `moe_ft` branch of https://github.com/byshiue/Megatron-DeepSpeed/. + +```bash +pip install git+https://github.com/microsoft/DeepSpeed.git +git clone https://github.com/byshiue/Megatron-DeepSpeed/ -b moe_ft +pip install Megatron-DeepSpeed/ +pip install jieba +pip install -r ../examples/pytorch/gpt/requirement.txt + +git lfs clone https://www.modelscope.cn/PAI/nlp_gpt3_text-generation_0.35B_MoE-64.git +mv nlp_gpt3_text-generation_0.35B_MoE-64 ../models +PYTHONPATH=$PWD/../ python ../examples/pytorch/gpt/utils/megatron_gpt_moe_ckpt_convert.py \ + --input-dir ../models/nlp_gpt3_text-generation_0.35B_MoE-64/model \ + --saved-dir ../models/nlp_gpt3_text-generation_0.35B_MoE-64/model/c-models \ + --infer-gpu-num 1 \ + --vocab-path ../models/gpt2-vocab.json \ + --merges-path ../models/gpt2-merges.txt + +echo \ +'据悉,自驾 +“首金”花落谁家,无疑' > sample_input_file.txt + +python3 ../examples/pytorch/gpt/multi_gpu_gpt_example.py \ + --tensor_para_size=1 \ + --pipeline_para_size=1 \ + --ckpt_path=../models/nlp_gpt3_text-generation_0.35B_MoE-64/model/c-models/1-gpu/ \ + --data_type=fp16 \ + --vocab_file=../models/nlp_gpt3_text-generation_0.35B_MoE-64/tokenizer.json \ + --vocab_size=51200 \ + --start_id=7 \ + --end_id=7 \ + --sample_input_file=sample_input_file.txt \ + --use_jieba_tokenizer +``` + +The output should be like + +```bash +[INFO] batch 0, beam 0: +[Context] +据悉,自驾 + +[Output] +游的人数正在逐年增加,而且越来越多的人选择自驾游,而且越来越多的人选择自驾 + +[INFO] batch 1, beam 0: +[Context] +“首金”花落谁家,无疑 + +[Output] +是一场精彩的“战役”。 “首金”花落谁家,是一场精彩的“战役”。 +``` + +modelscope also provides [27B checkpoint](https://modelscope.cn/models/PAI/nlp_gpt3_text-generation_1.3B_MoE-64/summary), which can be put in single A100-80GB under FP16 and have higher qualities. + + +FT also supports GPT-MOE with model parallelism. + +```bash +PYTHONPATH=$PWD/../ python ../examples/pytorch/gpt/utils/megatron_gpt_moe_ckpt_convert.py \ + --input-dir ../models/nlp_gpt3_text-generation_0.35B_MoE-64/model \ + --saved-dir ../models/nlp_gpt3_text-generation_0.35B_MoE-64/model/c-models \ + --infer-gpu-num 2 \ + --vocab-path ../models/gpt2-vocab.json \ + --merges-path ../models/gpt2-merges.txt + +mpirun -n 2 python3 ../examples/pytorch/gpt/multi_gpu_gpt_example.py \ + --tensor_para_size=2 \ + --pipeline_para_size=1 \ + --ckpt_path=../models/nlp_gpt3_text-generation_0.35B_MoE-64/model/c-models/2-gpu/ \ + --data_type=fp16 \ + --vocab_file=../models/nlp_gpt3_text-generation_0.35B_MoE-64/tokenizer.json \ + --vocab_size=51200 \ + --start_id=7 \ + --end_id=7 \ + --sample_input_file=sample_input_file.txt \ + --use_jieba_tokenizer + +mpirun -n 2 python3 ../examples/pytorch/gpt/multi_gpu_gpt_example.py \ + --tensor_para_size=1 \ + --pipeline_para_size=2 \ + --ckpt_path=../models/nlp_gpt3_text-generation_0.35B_MoE-64/model/c-models/1-gpu/ \ + --data_type=fp16 \ + --vocab_file=../models/nlp_gpt3_text-generation_0.35B_MoE-64/tokenizer.json \ + --vocab_size=51200 \ + --start_id=7 \ + --end_id=7 \ + --sample_input_file=sample_input_file.txt \ + --use_jieba_tokenizer +``` + +### GPT with FP8 (Experimental) + +Note that FP8 is supported since Hopper and CUDA 11.8. Here, we use docker image `nvcr.io/nvidia/pytorch:22.10-py3` to demonstrate + +```bash +mkdir build +cmake -DSM=90 -DCMAKE_BUILD_TYPE=Release -DBUILD_PYT=ON -DBUILD_MULTI_GPU=ON -DENABLE_FP8=ON .. +make -j12 +wget --content-disposition https://api.ngc.nvidia.com/v2/models/nvidia/megatron_lm_345m/versions/v0.0/zip -O megatron_lm_345m_v0.0.zip +mkdir models/345m/ -p +unzip megatron_lm_345m_v0.0.zip -d ./models/345m + +export PYTHONPATH=$PWD/..:${PYTHONPATH} +python3 ../examples/pytorch/gpt/utils/megatron_fp8_ckpt_convert.py \ + -i ./models/345m/release \ + -o ./models/345m/c-model/ \ + -i_g 1 \ + -head_num 16 \ + -trained_tensor_parallel_size 1 + +python3 ../examples/pytorch/gpt/gpt_summarization.py \ + --data_type fp8 \ + --lib_path ./lib/libth_transformer.so \ + --summarize \ + --ft_model_location ./models/345m/c-model/ +``` + +The checkpoint does not have quantization. FT will initialize them by identity scales directly. However, the accuracy is still good like following: + +```bash +rouge1 : 23.264943073521202 +rouge2 : 6.43987431806994 +rougeL : 16.517620811297537 +rougeLsum : 21.24054457217973 +``` + ### Advanced features #### generate different sentences and enable shared context diff --git a/docs/gptj_guide.md b/docs/gptj_guide.md index 31547cdf7..e6de929d2 100644 --- a/docs/gptj_guide.md +++ b/docs/gptj_guide.md @@ -78,7 +78,9 @@ Optimization in GPT-j are similar to optimization in GPT, describing in the [gpt | beam_search_diversity_rate | [1] or [batch_size] | CPU | float | **Optional**. A hyper hyper-parameter for [simple diverse decoding](https://arxiv.org/pdf/1611.08562.pdf) | | temperature | [1] or [batch_size] | CPU | float | **Optional**. Temperature applied to logits for both beam search and sampling | | len_penalty | [1] or [batch_size] | CPU | float | **Optional**. Length penalty applied to logits for only beam search | -| repetition_penalty | [1] or [batch_size] | CPU | float | **Optional**. Repetition penalty applied to logits for both beam search and sampling | +| repetition_penalty | [1] or [batch_size] | CPU | float | **Optional**. Repetition penalty applied to logits for both beam search and sampling. Exclusive with presence_penalty. | +| presence_penalty | [1] or [batch_size] | CPU | float | **Optional**. Presence penalty - additive type of repetition penalty - applied to logits for both beam search and sampling. Exclusive with repetition_penalty. | +| min_length | [1] or [batch_size] | CPU | int | **Optional**. Minimum number of tokens to generate | | random_seed | [1] or [batch_size] | CPU | unsigned long long int | **Optional**. Random seed to initialize the random table in sampling. | | request_prompt_lengths | [batch_size], | GPU | int | **Optional**. Length of prefix soft prompt embedding. This describes how many tokens of soft prompt embedding in each sentence. | | request_prompt_embedding | [batch_size, max_prompt_length, hidden_units] | GPU | float | **Optional**. Prefix soft prompt embedding. FT will concat them with results of embedding lookup kernel | @@ -98,7 +100,7 @@ The `beam_width` value is set by the output shape directly. When the `beam_width ### Note -- `is_context_qk_buf_float_` (whether use float accumulation for GPT-Neox context QK GEMM or not) is set to `false` by default. If you meet accuracy issues releated to GPT-NeoX Context attention blocks, please try to enable it in the `GptNeoX.h`. +- `is_context_qk_buf_float_` (whether use float accumulation for GPT-J context QK GEMM or not) is set to `false` by default. If you meet accuracy issues related to GPT-J Context attention blocks, please try to enable it in the `GptJ.h`. ### Supported features @@ -134,7 +136,7 @@ These components are readily available within the NGC Docker image below. Ensure you have the following components: - [NVIDIA Docker](https://github.com/NVIDIA/nvidia-docker) and NGC container are recommended -- [NVIDIA Pascal](https://www.nvidia.com/en-us/data-center/pascal-gpu-architecture/) or [Volta](https://www.nvidia.com/en-us/data-center/volta-gpu-architecture/) or [Turing](https://www.nvidia.com/en-us/geforce/turing/) or [Ampere](https://www.nvidia.com/en-us/data-center/nvidia-ampere-gpu-architecture/) based GPU +- [NVIDIA Pascal](https://www.nvidia.com/en-us/data-center/pascal-gpu-architecture/) or [Volta](https://www.nvidia.com/en-us/data-center/volta-gpu-architecture/) or [Turing](https://www.nvidia.com/en-us/geforce/turing/) or [Ampere](https://www.nvidia.com/en-us/data-center/nvidia-ampere-gpu-architecture/) based GPU For more information about how to get started with NGC containers, see the following sections from the NVIDIA GPU Cloud Documentation and the Deep Learning Documentation: diff --git a/docs/gptneox_guide.md b/docs/gptneox_guide.md index b54395b4e..56aa23880 100644 --- a/docs/gptneox_guide.md +++ b/docs/gptneox_guide.md @@ -25,7 +25,7 @@ Optimization in gpt-neox are similar to optimization in GPT, describing in the [ ### Note -- `is_context_qk_buf_float_` (whether use float accumulation for GPT-Neox context QK GEMM or not) is set to `false` by default. If you meet accuracy issues releated to GPT-NeoX Context attention blocks, please try to enable it in the `GptNeoX.h`. +- `is_context_qk_buf_float_` (whether use float accumulation for GPT-Neox context QK GEMM or not) is set to `false` by default. If you meet accuracy issues related to GPT-NeoX Context attention blocks, please try to enable it in the `GptNeoX.h`. ### Supported features diff --git a/docs/longformer_guide.md b/docs/longformer_guide.md index 345ece6b8..4cebd3171 100644 --- a/docs/longformer_guide.md +++ b/docs/longformer_guide.md @@ -102,7 +102,7 @@ Run the python scripts with: ``` cd /workspace/FasterTransformer python3 examples/pytorch/longformer/longformer_qa.py \ - --ft-longformer-lib build/lib/libth_longformer.so \ + --ft-longformer-lib build/lib/libth_transformer.so \ --model-dir examples/pytorch/longformer/longformer-large-4096-finetuned-triviaqa \ --passage "Jim Henson was a nice puppet" \ --question "Who was Jim Henson?" \ diff --git a/docs/t5_guide.md b/docs/t5_guide.md index 3cff7c85e..247b06924 100644 --- a/docs/t5_guide.md +++ b/docs/t5_guide.md @@ -1,6 +1,6 @@ # FasterTransformer T5 -The FasterTransformer T5 implements the huggingface t5 model (https://huggingface.co/t5-base). +The FasterTransformer T5 implements the huggingface t5 model (). ## Table Of Contents @@ -30,7 +30,7 @@ The FasterTransformer T5 implements the huggingface t5 model (https://huggingfac ## Introduction -This document describes what FasterTransformer provides for the `T5` model, explaining the workflow and optimization. We also provide a guide to help users to run the `T5` model on FasterTransformer. Finally, we provide benchmark to demonstrate the speed of FasterTransformer on `T5`. +This document describes what FasterTransformer provides for the `T5` model, explaining the workflow and optimization. We also provide a guide to help users to run the `T5` model on FasterTransformer. Finally, we provide benchmark to demonstrate the speed of FasterTransformer on `T5`. ### Supported features @@ -66,7 +66,7 @@ The source codes are put in `src/fastertransformer/models/t5`. | [1] | max_seq_len | size_t | **Deprecated, move to input** | | [2] | head_num | size_t | Head number for model configuration | | [3] | size_per_head | size_t | Size per head for model configuration | -| [4] | inter_size | size_t | The inter size of feed forward network. It is often set to 4 * head_num * size_per_head. | +| [4] | inter_size | size_t | The inter size of feed forward network. It is often set to 4 \* head_num \* size_per_head. | | [5] | d_model | size_t | The dimension of embedding of transformer input. | | [6] | num_layer | size_t | Number of transformer layers for model configuration | | [7] | num_bucket_or_max_seq_len | size_t | Number of bucket in relative position embedding, or max sequence length for absolute position embedding | @@ -80,7 +80,7 @@ The source codes are put in `src/fastertransformer/models/t5`. | [15] | attention_type | AttentionType | Determine fusing the attention or not, remove padding or not, which is declared in `src/fastertransformer/layers/attention_layers/BaseAttentionLayer.h` | | [16] | sparse | bool | Is using sparsity. **Experimental feature** | | [17] | activation_type | ActivationType | Determine the activation in FFN, which is declared in `src/fastertransformer/layers/attention_layers/FfnLayer.h` | -| [18] | layernorm_type | LayerNormType | Determine using pre-layernorm or post-layernorm, which is declared in `src/fastertransformer/kernels/layernorm_kernels.h` | +| [18] | layernorm_type | LayerNormType | Determine using pre-layernorm or post-layernorm, which is declared in `src/fastertransformer/kernels/layernorm_kernels.h`. Note that only `pre_layernorm` is supported at the moment. | | [19] | tensor_para | NcclParam | Tensor Parallel information, which is declared in `src/fastertransformer/utils/nccl_utils.h` | | [20] | pipeline_para | NcclParam | Pipeline Parallel information, which is declared in `src/fastertransformer/utils/nccl_utils.h` | | [21] | prompt_learning_start_id | int | The start id of virtual token in p/prompt-tuning | @@ -116,7 +116,7 @@ The source codes are put in `src/fastertransformer/models/t5`. | [3] | beam_width | size_t | **Deprecated, move to input** | | [4] | head_num | size_t | Head number for model configuration | | [5] | size_per_head | size_t | Size per head for model configuration | -| [6] | inter_size | size_t | The inter size of feed forward network. It is often set to 4 * head_num * size_per_head. | +| [6] | inter_size | size_t | The inter size of feed forward network. It is often set to 4 \* head_num \* size_per_head | | [7] | d_model | size_t | The dimension of embedding of transformer input. | | [8] | num_layer | size_t | Number of transformer layers for model configuration | | [9] | vocab_size | size_t | Vocabulary size for model configuration | @@ -145,22 +145,24 @@ The source codes are put in `src/fastertransformer/models/t5`. * Input of T5 Decoding -| Name | Tensor/Parameter Shape | Location | Data Type | Description | -| :------------------------: | :-------------------------------------------: | :------: | :--------------------: | :-------------------------------------------------------------------------------------------------------: | -| encoder_output | [batch_size, mem_max_seq_len, memory_d_model] | GPU | fp32/fp16/bf16 | The output of T5 Encoder | -| encoder_sequence_length | [batch_size] | GPU | int | The sequence length of encoder input/output | -| stop_words_list | [batch_size, 2, stop_words_length] | GPU | int | **Optional**. When FT generates words in this list, it will stop the generation. An extension of stop id | -| bad_words_list | [batch_size, 2, bad_words_length] | GPU | int | **Optional**. The words in the list will never be sampled. | -| start_id | [batch_size] | CPU | int | **Optional**. If FT receives this input, FT will replace default start id by it | -| end_id | [batch_size] | CPU | int | **Optional**. If FT receives this input, FT will replace default end id by it | -| runtime_top_k | [1] or [batch_size] | CPU | uint | **Optional**. top_k value for top k sampling | -| runtime_top_p | [1] or [batch_size] | CPU | float | **Optional**. top_p value for top p sampling | -| beam_search_diversity_rate | [1] or [batch_size] | CPU | float | **Optional**. A hyper hyper-parameter for [simple diverse decoding](https://arxiv.org/pdf/1611.08562.pdf) | -| temperature | [1] or [batch_size] | CPU | float | **Optional**. Temperature applied to logits for both beam search and sampling | -| len_penalty | [1] or [batch_size] | CPU | float | **Optional**. Length penalty applied to logits for only beam search | -| repetition_penalty | [1] or [batch_size] | CPU | float | **Optional**. Repetition penalty applied to logits for both beam search and sampling | -| random_seed | [1] or [batch_size] | CPU | unsigned long long int | **Optional**. Random seed to initialize the random table in sampling. | -| ia3_tasks | [batch_size] | GPU | int | **Optional**. Which IA3 weights to use for each sequence. | +| Name | Tensor/Parameter Shape | Location | Data Type | Description | +| :------------------------: | :-------------------------------------------: | :------: | :--------------------: | :------------------------------------------------------------------------------------------------------------------------------------------------------------: | +| encoder_output | [batch_size, mem_max_seq_len, memory_d_model] | GPU | fp32/fp16/bf16 | The output of T5 Encoder | +| encoder_sequence_length | [batch_size] | GPU | int | The sequence length of encoder input/output | +| stop_words_list | [batch_size, 2, stop_words_length] | GPU | int | **Optional**. When FT generates words in this list, it will stop the generation. An extension of stop id | +| bad_words_list | [batch_size, 2, bad_words_length] | GPU | int | **Optional**. The words in the list will never be sampled. | +| start_id | [batch_size] | CPU | int | **Optional**. If FT receives this input, FT will replace default start id by it | +| end_id | [batch_size] | CPU | int | **Optional**. If FT receives this input, FT will replace default end id by it | +| runtime_top_k | [1] or [batch_size] | CPU | uint | **Optional**. top_k value for top k sampling | +| runtime_top_p | [1] or [batch_size] | CPU | float | **Optional**. top_p value for top p sampling | +| beam_search_diversity_rate | [1] or [batch_size] | CPU | float | **Optional**. A hyper hyper-parameter for [simple diverse decoding](https://arxiv.org/pdf/1611.08562.pdf) | +| temperature | [1] or [batch_size] | CPU | float | **Optional**. Temperature applied to logits for both beam search and sampling | +| len_penalty | [1] or [batch_size] | CPU | float | **Optional**. Length penalty applied to logits for only beam search | +| repetition_penalty | [1] or [batch_size] | CPU | float | **Optional**. Repetition penalty applied to logits for both beam search and sampling. Exclusive with presence_penalty | +| presence_penalty | [1] or [batch_size] | CPU | float | **Optional**. Presence penalty - additive type of repetition penalty - applied to logits for both beam search and sampling. Exclusive with repetition_penalty. | +| min_length | [1] or [batch_size] | CPU | int | **Optional**. Minimum number of tokens to generate | +| random_seed | [1] or [batch_size] | CPU | unsigned long long int | **Optional**. Random seed to initialize the random table in sampling. | +| ia3_tasks | [batch_size] | GPU | int | **Optional**. Which IA3 weights to use for each sequence. | * Output of T5 Decoding @@ -174,7 +176,7 @@ The source codes are put in `src/fastertransformer/models/t5`. ### Optimization -1. Kernel optimization: First, since the sequence length of query in `SelfAttention` and `CrossAttention` is always 1, we use customed fused multi-head attention kernel to optimize. Second, we fuse many small operations into one kernel. For example, `AddBiasResidualLayerNorm` combines the adding bias, adding residual of previous block and the computation of layer normalization into 1 kernel. Third, we optimize top k operation and sampling to accelerate the beam search and sampling. Finally, to prevent from recomputing the previous keys and values, we allocate a buffer to store them at each step. Although it takes some additional memory usage, we can save the cost of recomputing, allocating buffer at each step, and the cost of concatenation. +1. Kernel optimization: First, since the sequence length of query in `SelfAttention` and `CrossAttention` is always 1, we use customed fused multi-head attention kernel to optimize. Second, we fuse many small operations into one kernel. For example, `AddBiasResidualLayerNorm` combines the adding bias, adding residual of previous block and the computation of layer normalization into 1 kernel. Third, we optimize top k operation and sampling to accelerate the beam search and sampling. Finally, to prevent from recomputing the previous keys and values, we allocate a buffer to store them at each step. Although it takes some additional memory usage, we can save the cost of recomputing, allocating buffer at each step, and the cost of concatenation. ## Setup @@ -182,23 +184,24 @@ The following section lists the requirements to use FasterTransformer. ### Requirements -- CMake >= 3.13 for PyTorch -- CUDA 11.0 or newer version -- NCCL 2.10 or newer version -- Python: Only verify on Python 3. -- PyTorch: Verify on 1.10.0, >= 1.5.0 should work. +* CMake >= 3.13 for PyTorch +* CUDA 11.0 or newer version +* NCCL 2.10 or newer version +* Python: Only verify on Python 3. +* PyTorch: Verify on 1.10.0, >= 1.5.0 should work. Recommend use nvcr image like `nvcr.io/nvidia/pytorch:22.09-py3`. Ensure you have the following components: -- [NVIDIA Docker](https://github.com/NVIDIA/nvidia-docker) and NGC container are recommended -- [NVIDIA Pascal](https://www.nvidia.com/en-us/data-center/pascal-gpu-architecture/) or [Volta](https://www.nvidia.com/en-us/data-center/volta-gpu-architecture/) or [Turing](https://www.nvidia.com/en-us/geforce/turing/) or [Ampere](https://www.nvidia.com/en-us/data-center/nvidia-ampere-gpu-architecture/) based GPU + +* [NVIDIA Docker](https://github.com/NVIDIA/nvidia-docker) and NGC container are recommended +* [NVIDIA Pascal](https://www.nvidia.com/en-us/data-center/pascal-gpu-architecture/) or [Volta](https://www.nvidia.com/en-us/data-center/volta-gpu-architecture/) or [Turing](https://www.nvidia.com/en-us/geforce/turing/) or [Ampere](https://www.nvidia.com/en-us/data-center/nvidia-ampere-gpu-architecture/) based GPU For more information about how to get started with NGC containers, see the following sections from the NVIDIA GPU Cloud Documentation and the Deep Learning Documentation: -- [Getting Started Using NVIDIA GPU Cloud](https://docs.nvidia.com/ngc/ngc-getting-started-guide/index.html) -- [Accessing And Pulling From The NGC Container Registry](https://docs.nvidia.com/deeplearning/frameworks/user-guide/index.html#accessing_registry) -- [Running PyTorch](https://docs.nvidia.com/deeplearning/frameworks/pytorch-release-notes/index.html) +* [Getting Started Using NVIDIA GPU Cloud](https://docs.nvidia.com/ngc/ngc-getting-started-guide/index.html) +* [Accessing And Pulling From The NGC Container Registry](https://docs.nvidia.com/deeplearning/frameworks/user-guide/index.html#accessing_registry) +* [Running PyTorch](https://docs.nvidia.com/deeplearning/frameworks/pytorch-release-notes/index.html) For those unable to use the NGC container, to set up the required environment or create your own container, see the versioned [NVIDIA Container Support Matrix](https://docs.nvidia.com/deeplearning/frameworks/support-matrix/index.html). @@ -242,7 +245,6 @@ By default, `-DSM` is set by 70, 75, 80 and 86. When users set more kinds of `-D This will build the TorchScript custom class. Please make sure that the `PyTorch >= 1.5.0`. 2. build with TensorRT - Can use `nvcr.io/nvidia/pytorch:22.09-py3` docker image, too. ```bash @@ -275,20 +277,20 @@ By default, `-DSM` is set by 70, 75, 80 and 86. When users set more kinds of `-D Assume the settings of decoding are as follows. - - `batch_size` = 8 - - `beam_width` = 4 - - `max_mem_seq_len` = 32 - - `encoder_d_model` = 512 - - `encoder_head_num` = 8 - - `encoder_size_per_head` = 64 - - `encoder_inter_size` = 2048 - - `decoder_d_model` = 512 - - `decoder_head_num` = 8 - - `decoder_size_per_head` = 64 - - `decoder_inter_size` = 2048 - - `decoder_vocab_size` = 32128 - - `data_type` = 0 (FP32) or 1 (FP16) or 2 (BF16) - - `tensor_para_size` = 2 + * `batch_size` = 8 + * `beam_width` = 4 + * `max_mem_seq_len` = 32 + * `encoder_d_model` = 512 + * `encoder_head_num` = 8 + * `encoder_size_per_head` = 64 + * `encoder_inter_size` = 2048 + * `decoder_d_model` = 512 + * `decoder_head_num` = 8 + * `decoder_size_per_head` = 64 + * `decoder_inter_size` = 2048 + * `decoder_vocab_size` = 32128 + * `data_type` = 0 (FP32) or 1 (FP16) or 2 (BF16) + * `tensor_para_size` = 2 Then the following scripts can generate the best GEMM configuration under such settings and record the configuration into the `gemm_config.in` file. @@ -303,7 +305,7 @@ By default, `-DSM` is set by 70, 75, 80 and 86. When users set more kinds of `-D ./bin/t5_gemm 16 4 32 512 8 64 2048 512 8 64 2048 32128 0 2 1 # bs 16, append results in existed gemm_config.ini ``` - 1.2 Run the PyTorch T5 example: + 1.2 Run the PyTorch T5 example: ```bash python ../examples/pytorch/t5/translate_example.py \ @@ -365,6 +367,7 @@ By default, `-DSM` is set by 70, 75, 80 and 86. When users set more kinds of `-D --data_type fp16 \ --ckpt_path ./ft_t5_small/1-gpu ``` + * Input/Output Tensor/Parameter of T5Encoder Plugin | Classification | Tensor/Parameter Shape | Data Type | Description | @@ -406,7 +409,7 @@ By default, `-DSM` is set by 70, 75, 80 and 86. When users set more kinds of `-D | [0] | [batch_size,beam_width,max_seq_len] | float32/float16 | decoding output | | [1] | [batch_size,beam_width] | float32/float16 | real sequence length of each output | -The model configuration are stored in `config.ini` of checkpoint path. For example, after running, +The model configuration are stored in `config.ini` of checkpoint path. For example, after running, ``` python ../examples/tensorrt/t5/extractT5ModelToBIN.py \ @@ -430,20 +433,20 @@ users can see the model configuration in `./ft_t5_small/1-gpu/config.ini` Assume the settings of decoding are as follows. - - `batch_size` = 8 - - `beam_width` = 4 - - `max_mem_seq_len` = 32 - - `encoder_d_model` = 512 - - `encoder_head_num` = 8 - - `encoder_size_per_head` = 64 - - `encoder_inter_size` = 2048 - - `decoder_d_model` = 512 - - `decoder_head_num` = 8 - - `decoder_size_per_head` = 64 - - `decoder_inter_size` = 2048 - - `decoder_vocab_size` = 32128 - - `data_type` = 0 (FP32) or 1 (FP16) or 2 (BF16) - - `tensor_para_size` = 2 + * `batch_size` = 8 + * `beam_width` = 4 + * `max_mem_seq_len` = 32 + * `encoder_d_model` = 512 + * `encoder_head_num` = 8 + * `encoder_size_per_head` = 64 + * `encoder_inter_size` = 2048 + * `decoder_d_model` = 512 + * `decoder_head_num` = 8 + * `decoder_size_per_head` = 64 + * `decoder_inter_size` = 2048 + * `decoder_vocab_size` = 32128 + * `data_type` = 0 (FP32) or 1 (FP16) or 2 (BF16) + * `tensor_para_size` = 2 Then the following scripts can generate the best GEMM configuration under such settings and record the configuration into the `gemm_config.in` file. @@ -451,7 +454,7 @@ users can see the model configuration in `./ft_t5_small/1-gpu/config.ini` ./bin/t5_gemm 8 4 32 512 8 64 2048 512 8 64 2048 32128 0 2 1 ``` - 3.2 Run the Tensorflow T5 example: + 3.2 Run the Tensorflow T5 example: ```bash python ../examples/tensorflow/t5/translate_example.py \ @@ -473,7 +476,7 @@ users can see the model configuration in `./ft_t5_small/1-gpu/config.ini` 2022-11-09 01:34:30,687 __main__ [INFO] ft-sampling translates 94 batches taking 14.80 sec to translate 99745 tokens, BLEU score: 25.36, 6740 tokens/sec. (62029 words, 4191 words/sec) ``` - 3.3 Run the Tensorflow T5 v1_1 example: + 3.3 Run the Tensorflow T5 v1_1 example: ```bash python ../examples/tensorflow/t5/translate_example.py \ @@ -506,19 +509,19 @@ users can see the model configuration in `./ft_t5_small/1-gpu/config.ini` We show how to sever UL2 by FasterTransformer PyTorch op on huggingface's model in this section. - 3.1 Download model (It requires some time because the model size is about 40GBs) +1. Download model (It requires some time because the model size is about 40GBs) - ``` + ```bash sudo apt-get install git-lfs git lfs install git lfs clone https://huggingface.co/google/ul2 ``` - 3.2 Convert the checkpoint to FT +2. Convert the checkpoint to FT Because loading UL2 model on pytorch and do prprocessing takes long time, and `summarization.py` only supports loading FT's model from binary files, we convert the pytorch checkpoint to FasterTransformer by converter `huggingface_t5_ckpt_convert.py`. - ``` + ```bash python3 ../examples/pytorch/t5/utils/huggingface_t5_ckpt_convert.py \ -saved_dir ul2/c-models \ -in_file ul2/ \ @@ -526,9 +529,9 @@ We show how to sever UL2 by FasterTransformer PyTorch op on huggingface's model -weight_data_type fp32 ``` - 3.3 Run UL2 on summarization task +3. Run UL2 on summarization task - ``` + ```bash mpirun -n 2 python3 ../examples/pytorch/t5/summarization.py \ --ft_model_location ul2/c-models/ \ --hf_model_location ul2/ \ @@ -539,7 +542,7 @@ We show how to sever UL2 by FasterTransformer PyTorch op on huggingface's model The results would be like - ``` + ```bash rouge1 : 23.673944166014593 rouge2 : 5.946485383012474 rougeL : 14.749827731626247 @@ -548,18 +551,17 @@ We show how to sever UL2 by FasterTransformer PyTorch op on huggingface's model ### Running t5-v1.1 - 3.1 Download model (It requires some time because the model size is about 40GBs) +1. Download model (It requires some time because the model size is about 40GBs) - ``` + ```bash sudo apt-get install git-lfs git lfs install git lfs clone https://huggingface.co/google/t5-v1_1-base ``` +2. Convert the checkpoint to FT - 3.2 Convert the checkpoint to FT - - ``` + ```bash python3 ../examples/pytorch/t5/utils/huggingface_t5_ckpt_convert.py \ -saved_dir t5-v1_1-base/c-models \ -in_file t5-v1_1-base/ \ @@ -567,9 +569,9 @@ We show how to sever UL2 by FasterTransformer PyTorch op on huggingface's model -weight_data_type fp32 ``` - 3.3 Run t5-v1.1 on summarization task +3. Run t5-v1.1 on summarization task - ``` + ```bash python3 ../examples/pytorch/t5/summarization.py \ --ft_model_location t5-v1_1-base/c-models/ \ --hf_model_location t5-v1_1-base/ \ @@ -579,7 +581,7 @@ We show how to sever UL2 by FasterTransformer PyTorch op on huggingface's model The results would be like - ``` + ```bash Hugging Face (total latency: 21.826529 sec) rouge1 : 10.786476875527406 rouge2 : 1.8231246974441166 @@ -592,22 +594,21 @@ We show how to sever UL2 by FasterTransformer PyTorch op on huggingface's model rougeLsum : 10.453229536094794 ``` - * Note that these models are not fine-tuned, so running with FP16 or setting topk > 1 may lead to unstable results. +* Note that these models are not fine-tuned, so running with FP16 or setting topk > 1 may lead to unstable results. ### Running mt5 - 3.1 Download model (It requires some time because the model size is about 40GBs) +1. Download model (It requires some time because the model size is about 40GBs) - ``` + ```bash sudo apt-get install git-lfs git lfs install git lfs clone https://huggingface.co/google/mt5-base ``` +2. Convert the checkpoint to FT - 3.2 Convert the checkpoint to FT - - ``` + ```bash python3 ../examples/pytorch/t5/utils/huggingface_t5_ckpt_convert.py \ -saved_dir mt5-base/c-models \ -in_file mt5-base/ \ @@ -615,9 +616,9 @@ We show how to sever UL2 by FasterTransformer PyTorch op on huggingface's model -weight_data_type fp32 ``` - 3.3 Run mt5 on summarization task +3. Run mt5 on summarization task - ``` + ```bash python3 ../examples/pytorch/t5/summarization.py \ --ft_model_location mt5-base/c-models/ \ --hf_model_location mt5-base/ \ @@ -627,7 +628,7 @@ We show how to sever UL2 by FasterTransformer PyTorch op on huggingface's model The results would be like - ``` + ```bash Hugging Face (total latency: 3.143815 sec) rouge1 : 4.636193727758547 rouge2 : 0.20661157024793395 @@ -644,7 +645,8 @@ We show how to sever UL2 by FasterTransformer PyTorch op on huggingface's model ## Performance -Hardware settings: +Hardware settings: + * CPU: Intel(R) Xeon(R) Gold 6132 CPU @ 2.60GHz * V100-16GB (with mclk 877MHz, pclk 1380MHz) with Intel(R) Xeon(R) CPU E5-2698 v4 @ 2.20GHz (dgx-1 server) * A100-40GB diff --git a/docs/vit_guide.md b/docs/vit_guide.md index 27acd6247..5514cfd49 100644 --- a/docs/vit_guide.md +++ b/docs/vit_guide.md @@ -141,7 +141,7 @@ python infer_visiontransformer_op.py \ --img_size=384 \ --pretrained_dir=./ViT-quantization/ViT-B_16.npz \ --batch-size=32 \ - --th-path=$WORKSPACE/build/lib/libpyt_vit.so + --th-path=$WORKSPACE/build/lib/libth_transformer.so ``` **Run INT8 pytorch op** @@ -186,7 +186,7 @@ python infer_visiontransformer_int8_op.py \ --img_size 384 \ --calibrated_dir ViT-B_16_calib.pth \ --batch-size=32 \ - --th-path=$WORKSPACE/build/lib/libpyt_vit.so \ + --th-path=$WORKSPACE/build/lib/libth_transformer.so \ --quant-mode ft2 ``` diff --git a/examples/CMakeLists.txt b/examples/CMakeLists.txt index 4f946e7fd..d2fd51ada 100644 --- a/examples/CMakeLists.txt +++ b/examples/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/cpp/CMakeLists.txt b/examples/cpp/CMakeLists.txt index 7c225471d..da24d72c6 100644 --- a/examples/cpp/CMakeLists.txt +++ b/examples/cpp/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -27,3 +27,8 @@ add_subdirectory(wenet) add_subdirectory(gptj) add_subdirectory(gptneox) add_subdirectory(multi_gpu_gpt) + +if(ENABLE_FP8) + add_subdirectory(gpt_fp8) + add_subdirectory(bert_fp8) +endif() diff --git a/examples/cpp/bert/CMakeLists.txt b/examples/cpp/bert/CMakeLists.txt index 6440fe50b..fe9be2ff3 100644 --- a/examples/cpp/bert/CMakeLists.txt +++ b/examples/cpp/bert/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -13,14 +13,11 @@ # limitations under the License. add_executable(bert_example bert_example.cc) +target_link_libraries(bert_example PUBLIC -lcublas -lcublasLt -lcudart nvtx_utils Bert) if (SPARSITY_SUPPORT) -target_link_libraries(bert_example PUBLIC -lcublas -lcublasLt -lcudart -lcusparse -lcusparseLt Bert) -else() -target_link_libraries(bert_example PUBLIC -lcublas -lcublasLt -lcudart Bert) +target_link_libraries(bert_example PUBLIC -lcusparse -lcusparseLt) endif() -if(BUILD_MULTI_GPU) add_executable(bert_triton_example bert_triton_example.cc) target_link_libraries(bert_triton_example PUBLIC -lcublas -lcublasLt -lcudart -lpthread - BertTritonBackend TransformerTritonBackend mpi_utils nccl_utils) -endif() + BertTritonBackend TransformerTritonBackend nvtx_utils mpi_utils nccl_utils) diff --git a/examples/cpp/bert/bert_example.cc b/examples/cpp/bert/bert_example.cc index 78851873d..e5f6a3e45 100644 --- a/examples/cpp/bert/bert_example.cc +++ b/examples/cpp/bert/bert_example.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -16,6 +16,8 @@ #include "src/fastertransformer/models/bert/Bert.h" #include "src/fastertransformer/utils/logger.h" +#include "src/fastertransformer/utils/nvtx_utils.h" +#include using namespace fastertransformer; @@ -161,12 +163,14 @@ int bertExample( print_mem_usage("After inference"); // profile time - const int ite = 10; + const int ite = 100; CudaTimer cuda_timer(stream); cuda_timer.start(); + cudaProfilerStart(); for (int i = 0; i < ite; i++) { bert.forward(&output_tensors, &input_tensors, &bert_weights); } + cudaProfilerStop(); float total_time = cuda_timer.stop(); FT_LOG_INFO("batch_size %ld seq_len %ld layer %ld " diff --git a/examples/cpp/bert/bert_triton_example.cc b/examples/cpp/bert/bert_triton_example.cc index e1e5783a9..39873a191 100644 --- a/examples/cpp/bert/bert_triton_example.cc +++ b/examples/cpp/bert/bert_triton_example.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -20,6 +20,7 @@ #include "src/fastertransformer/triton_backend/bert/BertTritonModel.h" #include "src/fastertransformer/utils/mpi_utils.h" #include "src/fastertransformer/utils/nccl_utils.h" +#include "src/fastertransformer/utils/nvtx_utils.h" namespace ft = fastertransformer; diff --git a/examples/cpp/bert_fp8/CMakeLists.txt b/examples/cpp/bert_fp8/CMakeLists.txt new file mode 100644 index 000000000..33512b705 --- /dev/null +++ b/examples/cpp/bert_fp8/CMakeLists.txt @@ -0,0 +1,25 @@ +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +add_executable(bert_fp8_example bert_fp8_example.cc) +target_link_libraries(bert_fp8_example PUBLIC -lcublas -lcublasLt -lcudart BertFP8 Bert nvtx_utils) +if (SPARSITY_SUPPORT) +target_link_libraries(bert_fp8_example PUBLIC -lcusparse -lcusparseLt) +endif() + +add_executable(bert_fp8_example_squad bert_fp8_example_squad.cc) +target_link_libraries(bert_fp8_example_squad PUBLIC -lcublas -lcublasLt -lcudart BertFP8 Bert nvtx_utils) +if (SPARSITY_SUPPORT) +target_link_libraries(bert_fp8_example_squad PUBLIC -lcublas -lcusparse -lcusparseLt) +endif() diff --git a/examples/cpp/bert_fp8/bert_fp8_example.cc b/examples/cpp/bert_fp8/bert_fp8_example.cc new file mode 100644 index 000000000..812018b3b --- /dev/null +++ b/examples/cpp/bert_fp8/bert_fp8_example.cc @@ -0,0 +1,452 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/models/bert/Bert.h" +#include "src/fastertransformer/models/bert_fp8/BertFP8.h" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" +#include "src/fastertransformer/utils/logger.h" +#include "src/fastertransformer/utils/nvtx_utils.h" +#include +#include + +using namespace fastertransformer; + +template +int bertExample(size_t batch_size, + size_t num_layers, + size_t seq_len, + size_t head_num, + size_t size_per_head, + bool is_remove_padding, + std::string model_path, + const float& mean_rel_diff_threshold); + +template +void compareTwoTensorV2(const T1* pred, + const T2* ref, + const int batch_size, + const int* sequence_lengths, + const int hidden_unit, + const int max_length, + const int print_size = 0, + const std::string filename = "", + const float& mean_rel_diff_threshold = -1.0f) +{ + std::vector v_sequence_lengths(sequence_lengths, sequence_lengths + batch_size); + const int size = batch_size * max_length * hidden_unit; + T1* h_pred = new T1[size]; + T2* h_ref = new T2[size]; + check_cuda_error(cudaMemcpy(h_pred, pred, size * sizeof(T1), cudaMemcpyDeviceToHost)); + check_cuda_error(cudaMemcpy(h_ref, ref, size * sizeof(T2), cudaMemcpyDeviceToHost)); + + FILE* fd = nullptr; + if (filename != "") { + fd = fopen(filename.c_str(), "w"); + fprintf(fd, "| %10s | %10s | %10s | %10s | \n", "pred", "ref", "abs_diff", "rel_diff(%)"); + } + + if (print_size > 0) { + FT_LOG_INFO(" id | pred | ref |abs diff | rel diff (%) |"); + } + float mean_abs_diff = 0.0f; + float mean_rel_diff = 0.0f; + int count = 0; + for (int i = 0; i < batch_size; i++) { + for (int j = 0; j < sequence_lengths[i] * hidden_unit; j++) { + const int idx = i * max_length * hidden_unit + j; + if (idx < print_size) { + FT_LOG_INFO("%4d | % 6.4f | % 6.4f | % 6.4f | % 7.4f |\r", + i, + (float)h_pred[idx], + (float)h_ref[idx], + abs((float)h_pred[idx] - (float)h_ref[idx]), + abs((float)h_pred[idx] - (float)h_ref[idx]) / (abs((float)h_ref[idx]) + 1e-6f) * 100.f); + } + + if ((float)h_pred[idx] == 0) { + continue; + } + count += 1; + mean_abs_diff += abs((float)h_pred[idx] - (float)h_ref[idx]); + mean_rel_diff += abs((float)h_pred[idx] - (float)h_ref[idx]) / (abs((float)h_ref[idx]) + 1e-6f) * 100.f; + + if (fd != nullptr) { + fprintf(fd, + "| %10.5f | %10.5f | %10.5f | %11.5f |\n", + (float)h_pred[idx], + (float)h_ref[idx], + abs((float)h_pred[idx] - (float)h_ref[idx]), + abs((float)h_pred[idx] - (float)h_ref[idx]) / (abs((float)h_ref[idx]) + 1e-6f) * 100.f); + } + } + } + + mean_abs_diff = mean_abs_diff / (float)count; + mean_rel_diff = mean_rel_diff / (float)count; + FT_LOG_INFO("mean_abs_diff: % 6.4f, mean_rel_diff: % 6.4f (%%)", mean_abs_diff, mean_rel_diff); + + if (fd != nullptr) { + fprintf(fd, "mean_abs_diff: % 6.4f, mean_rel_diff: % 6.4f (%%)", mean_abs_diff, mean_rel_diff); + fclose(fd); + } + delete[] h_pred; + delete[] h_ref; + + if (mean_rel_diff_threshold > 0.0f) { + FT_CHECK_WITH_INFO(mean_rel_diff_threshold >= mean_rel_diff, + fmtstr("mean_rel_diff (%f) is larger than mean_rel_diff_threshold (%f)", + mean_rel_diff, + mean_rel_diff_threshold)); + FT_LOG_INFO("Test PASS!"); + } +} + +int main(int argc, char** argv) +{ + if (argc < 8 || argc > 10) { + FT_LOG_ERROR("bert_example batch_size num_layers seq_len head_num size_per_head is_remove_padding thread_num"); + FT_LOG_ERROR("e.g., ./bin/bert_example 32 12 32 12 64 0 1"); + return 0; + } + + int batch_size = atoi(argv[1]); + int num_layers = atoi(argv[2]); + int seq_len = atoi(argv[3]); + int head_num = atoi(argv[4]); + int size_per_head = atoi(argv[5]); + bool is_remove_padding = static_cast(atoi(argv[6])); + const int thread_num = atoi(argv[7]); + std::string model_path = argc >= 9 ? std::string(argv[8]) : ""; + const float mean_rel_diff_threshold = argc >= 10 ? atof(argv[9]) : -1.0f; + + std::vector threads; + threads.clear(); + + for (int i = 0; i < thread_num; i++) { + threads.push_back(std::thread(bertExample<__nv_fp8_e4m3, __nv_bfloat16>, + batch_size, + num_layers, + seq_len, + head_num, + size_per_head, + is_remove_padding, + model_path, + mean_rel_diff_threshold)); + } + for (auto& t : threads) { + t.join(); + } + + return 0; +} + +template +int bertExample(size_t batch_size, + size_t num_layers, + size_t seq_len, + size_t head_num, + size_t size_per_head, + bool is_remove_padding, + std::string model_path, + const float& mean_rel_diff_threshold) +{ + const int fp8_mode = 2; + FT_LOG_INFO("fp8_mode: %d", fp8_mode); + FT_LOG_INFO("Device: %s \n", getDeviceName().c_str()); + + const size_t hidden_units = head_num * size_per_head; + const size_t inter_size = 4 * hidden_units; + const size_t vocab_size = 30522; // Fixed by bert model config + const size_t max_position_embeddings = 512; // Fixed by bert model config + const size_t token_type_vocab_size = 2; // Fixed by bert model config + + cudaStream_t stream; + cublasHandle_t cublas_handle; + cublasLtHandle_t cublaslt_handle; + cudaStreamCreate(&stream); + cublasCreate(&cublas_handle); + cublasLtCreate(&cublaslt_handle); +#ifdef SPARSITY_ENABLED + cusparseLtHandle_t cusparselt_handle; + CHECK_CUSPARSE(cusparseLtInit(&cusparselt_handle)); +#endif + cublasSetStream(cublas_handle, stream); + cublasAlgoMap* cublas_algo_map = new cublasAlgoMap("gemm_config.in", ""); + + Allocator allocator(getDevice()); + + std::mutex* cublas_wrapper_mutex = new std::mutex(); +#ifdef SPARSITY_ENABLED + // cublasFP8MMWrapper cublas_wrapper = cublasMMWrapper( + // cublas_handle, cublaslt_handle, cusparselt_handle, stream, cublas_algo_map, cublas_wrapper_mutex, + // &allocator); +#else + cublasFP8MMWrapper cublas_wrapper = + cublasFP8MMWrapper(cublas_handle, cublaslt_handle, stream, cublas_algo_map, cublas_wrapper_mutex, &allocator); +#endif + + const size_t input_size = batch_size * seq_len * head_num * size_per_head; + std::string fp32_ckpt_path = model_path + "/ft_fp32/1-gpu/"; + std::string fp8_ckpt_path = model_path + "/ft_fp8/1-gpu/"; + std::string input_path = model_path + "/bert_input_unit_test/bs_"; // use random ids + + // Preare FP16 bert model and weight + BertWeight f_bert_weights(hidden_units, inter_size, num_layers); + f_bert_weights.loadModel(fp32_ckpt_path); + + AttentionType fp8_attention_type = getAttentionType(size_per_head, getSMVersion(), is_remove_padding, seq_len); + AttentionType f_attention_type = getAttentionType(size_per_head, getSMVersion(), is_remove_padding, seq_len); + cublasMMWrapper f_cublas_wrapper = + cublasMMWrapper(cublas_handle, cublaslt_handle, stream, cublas_algo_map, cublas_wrapper_mutex, &allocator); + f_cublas_wrapper.setFP16GemmConfig(); + + Bert f_bert = Bert(batch_size, + seq_len, + head_num, + size_per_head, + inter_size, + num_layers, + getSMVersion(), + 1.0f, + stream, + &f_cublas_wrapper, + &allocator, + false, + f_attention_type, + false, + ActivationType::Gelu, + LayerNormType::post_layernorm); + + // Prepare FP8 bert model and weight + BertFP8Weight bert_weights(hidden_units, + head_num, + size_per_head, + inter_size, + num_layers, + vocab_size, + max_position_embeddings, + token_type_vocab_size, + 1, + 1, + fp8_mode, + true, + true); + bert_weights.loadModel(fp8_ckpt_path); + bert_weights.transposeWeight(); + + NcclParam tensor_para; + NcclParam pipeline_para; + + BertFP8 bert = BertFP8(head_num, + size_per_head, + head_num * size_per_head, + inter_size, + num_layers, + tensor_para, + pipeline_para, + getSMVersion(), + 1.0f, + stream, + &cublas_wrapper, + &allocator, + false, + fp8_attention_type, + false, + ActivationType::Gelu, + LayerNormType::post_layernorm, + fp8_mode); + + half* f_from_tensor; + half* f_out_tensor; + half* f_ref_tensor; + deviceMalloc(&f_from_tensor, input_size, true); + deviceMalloc(&f_out_tensor, input_size, false); + deviceMalloc(&f_ref_tensor, input_size, false); + + half* h_results_baseline = new half[input_size]; + half* h_results_fp8 = new half[input_size]; + int* h_sequence_lengths = new int[batch_size]; + + half* out_tensor; + T2* ft_pooled_output; + deviceMalloc(&out_tensor, input_size, false); + deviceMalloc(&ft_pooled_output, batch_size * 1 * head_num * size_per_head, false); + + int* d_input_ids; + int* d_sequence_lengths; + int* d_token_type_ids; + + deviceMalloc(&d_input_ids, batch_size * seq_len, false); + deviceMalloc(&d_sequence_lengths, batch_size, false); + deviceMalloc(&d_token_type_ids, batch_size * seq_len, false); + + if (checkIfFileExist(input_path + std::to_string(0) + "_input_ids.bin") + && checkIfFileExist(input_path + std::to_string(0) + "_input_lengths.bin") + && checkIfFileExist(input_path + std::to_string(0) + "_token_type_ids.bin")) { + + loadWeightFromBin(d_input_ids, {(batch_size * seq_len)}, input_path + std::to_string(0) + "_input_ids.bin"); + loadWeightFromBin(d_sequence_lengths, {batch_size}, input_path + std::to_string(0) + "_input_lengths.bin"); + loadWeightFromBin( + d_token_type_ids, {(batch_size * seq_len)}, input_path + std::to_string(0) + "_token_type_ids.bin"); + + cudaD2Hcpy(h_sequence_lengths, d_sequence_lengths, batch_size); + } + else { + FT_LOG_WARNING(fmtstr("Cannot load real sequence length data, set all are %d for running benchmark", seq_len)); + for (int i = 0; i < batch_size; i++) { + h_sequence_lengths[i] = seq_len; + } + cudaH2Dcpy(d_sequence_lengths, h_sequence_lengths, batch_size); + deviceFill(d_input_ids, (batch_size * seq_len), 0); + deviceFill(d_token_type_ids, (batch_size * seq_len), 0); + } + + // run embedding lookup for FP16 baseline + { + T1* tmp; + cudaMalloc(&tmp, sizeof(T1) * input_size); + { + RemovePaddingEmbLookupLayerNormFP8OutParam param{ + tmp, + d_input_ids, + nullptr, + d_token_type_ids, + nullptr, + bert_weights.word_embeddings, + bert_weights.position_embeddings, + bert_weights.token_type_embeddings, + bert_weights.embeddings_layernorm.gamma, + bert_weights.embeddings_layernorm.beta, + bert_weights.bert_layer_weights[0].attention_weights.query_weight.input_scale_inv, + d_sequence_lengths, + (int)(batch_size * seq_len), + (int)hidden_units, + (int)batch_size, + (int)seq_len, + 0, // pad_token_id + stream, + false, + }; + PUSH_RANGE("invokeRemovePaddingEmbLookupLayerNormFP8Out"); + invokeRemovePaddingEmbLookupLayerNormFP8Out(param); + sync_check_cuda_error(); + POP_RANGE; + } + { + QuantizeMatrixRebuildPaddingParam param{ + f_from_tensor, + tmp, + nullptr, + (int)(batch_size * seq_len), + (int)hidden_units, + bert_weights.bert_layer_weights[0].attention_weights.query_weight.input_scale, + stream}; + PUSH_RANGE("invokeQuantizeMatrixRebuildPadding"); + invokeQuantizeMatrixRebuildPadding(param); + sync_check_cuda_error(); + POP_RANGE; + } + cudaFree(tmp); + } + + TensorMap input_tensors = TensorMap(std::unordered_map{ + {"input_ids", Tensor{MEMORY_GPU, TYPE_INT32, std::vector{batch_size, seq_len}, d_input_ids}}, + {"sequence_lengths", Tensor{MEMORY_GPU, TYPE_INT32, std::vector{batch_size}, d_sequence_lengths}}, + {"token_type_ids", + Tensor{MEMORY_GPU, TYPE_INT32, std::vector{batch_size, seq_len}, d_token_type_ids}}}); + + TensorMap output_tensors = TensorMap(std::unordered_map{ + {"output_hidden_state", + Tensor{ + MEMORY_GPU, getTensorType(), {batch_size, seq_len, (size_t)(head_num * size_per_head)}, out_tensor}}, + {"ft_pooled_output", + Tensor{MEMORY_GPU, getTensorType(), {batch_size, (size_t)(head_num * size_per_head)}, ft_pooled_output}}}); + + std::vector f_input_tensors = + std::vector{Tensor{MEMORY_GPU, + getTensorType(), + std::vector{batch_size, seq_len, (size_t)(head_num * size_per_head)}, + f_from_tensor}, + Tensor{MEMORY_GPU, TYPE_INT32, std::vector{batch_size}, d_sequence_lengths}}; + + std::vector f_output_tensors = + std::vector{Tensor{MEMORY_GPU, + getTensorType(), + std::vector{batch_size, seq_len, (size_t)(head_num * size_per_head)}, + f_out_tensor}}; + + FT_LOG_INFO("run FP8 bert"); + + // warmup + for (int i = 0; i < 0; i++) { + bert.forward(&output_tensors, &input_tensors, &bert_weights); + } + + cudaProfilerStart(); + CudaTimer cuda_timer(stream); + ft_nvtx::resetScope(); + ft_nvtx::addScope("Bert"); + cuda_timer.start(); + + const int ite = 1; + for (int i = 0; i < ite; i++) { + bert.forward(&output_tensors, &input_tensors, &bert_weights); + } + float total_time = cuda_timer.stop(); + cudaProfilerStop(); + + FT_LOG_INFO("batch_size %ld seq_len %ld layer %ld FT-CPP-time %.2f ms (%d iterations) ", + batch_size, + seq_len, + num_layers, + total_time / ite, + ite); + + // verify correctness + { + FT_LOG_INFO("run FP16 bert"); + f_bert.forward(&f_output_tensors, &f_input_tensors, &f_bert_weights); + compareTwoTensorV2( + out_tensor, f_out_tensor, batch_size, h_sequence_lengths, hidden_units, seq_len, 0, "diff.fp8.fp16.txt"); + } + + if (checkIfFileExist(input_path + std::to_string(0) + "_layer_" + std::to_string(num_layers - 1) + "_output.bin")) { + loadWeightFromBin(f_ref_tensor, + {input_size}, + input_path + std::to_string(0) + "_layer_" + std::to_string(num_layers - 1) + "_output.bin", + FtCudaDataType::FP32); + compareTwoTensorV2(out_tensor, + f_ref_tensor, + batch_size, + h_sequence_lengths, + hidden_units, + seq_len, + 0, + "diff.fp8.hf-fp16.txt", + mean_rel_diff_threshold); + } + + delete[] h_results_baseline; + delete[] h_results_fp8; + delete[] h_sequence_lengths; + +#ifdef SPARSITY_ENABLED + // cusparseLtDestroy(&cusparselt_handle); +#endif + delete cublas_algo_map; + delete cublas_wrapper_mutex; + return 0; +} diff --git a/examples/cpp/bert_fp8/bert_fp8_example_squad.cc b/examples/cpp/bert_fp8/bert_fp8_example_squad.cc new file mode 100644 index 000000000..228541e90 --- /dev/null +++ b/examples/cpp/bert_fp8/bert_fp8_example_squad.cc @@ -0,0 +1,235 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/models/bert/Bert.h" +#include "src/fastertransformer/models/bert_fp8/BertFP8.h" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" +#include "src/fastertransformer/utils/logger.h" + +using namespace fastertransformer; + +template +int bertExample(size_t max_batch_size, + size_t num_layers, + size_t head_num, + size_t size_per_head, + bool is_remove_padding, + bool allow_gemm_test = false); + +int main(int argc, char** argv) +{ + if (argc != 8 && argc != 9) { + FT_LOG_ERROR( + "bert_fp8_example_squad max_batch_size num_layers seq_len head_num size_per_head is_fp16 is_remove_padding"); + FT_LOG_ERROR("e.g., ./bin/bert_fp8_example_squad 32 24 384 16 64 1 1"); + return 0; + } + bool allow_gemm_test = false; + if (argc == 9) { + allow_gemm_test = (atoi(argv[8]) == 1) ? true : false; + } + + int max_batch_size = atoi(argv[1]); + int num_layers = atoi(argv[2]); + int seq_len = atoi(argv[3]); + int head_num = atoi(argv[4]); + int size_per_head = atoi(argv[5]); + bool is_remove_padding = static_cast(atoi(argv[7])); + + return bertExample<__nv_fp8_e4m3, __nv_bfloat16>( + max_batch_size, num_layers, head_num, size_per_head, is_remove_padding, allow_gemm_test); +} + +template +int bertExample(size_t max_batch_size, + size_t num_layers, + size_t head_num, + size_t size_per_head, + bool is_remove_padding, + bool allow_gemm_test) +{ + const int fp8_mode = 2; + FT_LOG_INFO("fp8_mode: %d", fp8_mode); + FT_LOG_INFO("Device: %s \n", getDeviceName().c_str()); + + const size_t hidden_units = head_num * size_per_head; + const size_t inter_size = 4 * hidden_units; + const size_t vocab_size = 30522; // Fixed by bert model config + const size_t max_position_embeddings = 512; // Fixed by bert model config + const size_t token_type_vocab_size = 2; // Fixed by bert model config + + cudaStream_t stream; + cublasHandle_t cublas_handle; + cublasLtHandle_t cublaslt_handle; + cudaStreamCreate(&stream); + cublasCreate(&cublas_handle); + cublasLtCreate(&cublaslt_handle); +#ifdef SPARSITY_ENABLED + cusparseLtHandle_t cusparselt_handle; + CHECK_CUSPARSE(cusparseLtInit(&cusparselt_handle)); +#endif + cublasSetStream(cublas_handle, stream); + cublasAlgoMap* cublas_algo_map = new cublasAlgoMap("gemm_config.in", ""); + + Allocator allocator(getDevice()); + + std::mutex* cublas_wrapper_mutex = new std::mutex(); +#ifdef SPARSITY_ENABLED + // cublasFP8MMWrapper cublas_wrapper = cublasFP8MMWrapper( + // cublas_handle, cublaslt_handle, cusparselt_handle, stream, cublas_algo_map, cublas_wrapper_mutex, + // &allocator); +#else + cublasFP8MMWrapper cublas_wrapper = + cublasFP8MMWrapper(cublas_handle, cublaslt_handle, stream, cublas_algo_map, cublas_wrapper_mutex, &allocator); +#endif + + // Prepare FP8 bert model and weight + BertFP8Weight bert_weights(hidden_units, + head_num, + size_per_head, + inter_size, + num_layers, + vocab_size, + max_position_embeddings, + token_type_vocab_size, + 1, + 1, + fp8_mode, + true, + true); + bert_weights.loadModel("/home/scratch.bhsueh_sw_1/FP8/mlperf/ft_fp8/"); + bert_weights.transposeWeight(); + + NcclParam tensor_para; + NcclParam pipeline_para; + AttentionType attention_type = getAttentionType(size_per_head, getSMVersion(), is_remove_padding, 384); + BertFP8 bert = BertFP8(head_num, + size_per_head, + head_num * size_per_head, + inter_size, + num_layers, + tensor_para, + pipeline_para, + getSMVersion(), + 1.0f, + stream, + &cublas_wrapper, + &allocator, + false, + attention_type, + false, + ActivationType::Gelu, + LayerNormType::post_layernorm, + fp8_mode); + + // SQuAD test settings + const int TOTAL_SENTENCE_NUM = 10833; + const int seq_len = 384; + + // unit test settings + FT_CHECK(seq_len == 384); + + half* out_tensor; + deviceMalloc(&out_tensor, max_batch_size * seq_len * hidden_units, false); + T2* ft_pooled_output; + deviceMalloc(&ft_pooled_output, max_batch_size * 1 * hidden_units, false); + int* d_input_ids; + deviceMalloc(&d_input_ids, TOTAL_SENTENCE_NUM * seq_len, false); + int* d_sequence_lengths; + deviceMalloc(&d_sequence_lengths, TOTAL_SENTENCE_NUM, false); + int* d_token_type_ids; + deviceMalloc(&d_token_type_ids, TOTAL_SENTENCE_NUM * seq_len, false); + half* h_results_fp8 = new half[max_batch_size * seq_len * hidden_units]; + + loadWeightFromBin(d_input_ids, + {(int)(TOTAL_SENTENCE_NUM * seq_len)}, + "/home/scratch.bhsueh_sw_1/FP8/bert_input/bs_0_input_ids.bin"); + + loadWeightFromBin(d_sequence_lengths, + {(int)TOTAL_SENTENCE_NUM}, + "/home/scratch.bhsueh_sw_1/FP8/bert_input/bs_0_input_lengths.bin"); + + loadWeightFromBin(d_token_type_ids, + {(int)(TOTAL_SENTENCE_NUM * seq_len)}, + "/home/scratch.bhsueh_sw_1/FP8/bert_input/bs_0_token_type_ids.bin"); + + std::string output_path = "./bert_output/"; + int remain_sentences = TOTAL_SENTENCE_NUM; + int* d_input_ids_ptr = d_input_ids; + int* d_sequence_lengths_ptr = d_sequence_lengths; + int* d_token_type_ids_ptr = d_token_type_ids; + int batch_count = 0; + while (remain_sentences > 0) { + FT_LOG_INFO("remain_sentences = (%5d/%5d), batch_count: %5d/%d", + remain_sentences, + TOTAL_SENTENCE_NUM, + batch_count, + (TOTAL_SENTENCE_NUM + (max_batch_size - 1)) / max_batch_size); + const size_t batch_size = remain_sentences > max_batch_size ? max_batch_size : remain_sentences; + const size_t input_size = batch_size * seq_len * hidden_units; + + TensorMap input_tensors = TensorMap(std::unordered_map{ + {"input_ids", Tensor{MEMORY_GPU, TYPE_INT32, std::vector{batch_size, seq_len}, d_input_ids_ptr}}, + {"sequence_lengths", + Tensor{MEMORY_GPU, TYPE_INT32, std::vector{batch_size}, d_sequence_lengths_ptr}}, + {"token_type_ids", + Tensor{MEMORY_GPU, TYPE_INT32, std::vector{batch_size, seq_len}, d_token_type_ids_ptr}}}); + + TensorMap output_tensors = TensorMap( + std::unordered_map{{"output_hidden_state", + Tensor{MEMORY_GPU, + getTensorType(), + {batch_size, seq_len, (size_t)(head_num * size_per_head)}, + out_tensor}}, + {"ft_pooled_output", + Tensor{MEMORY_GPU, + getTensorType(), + {batch_size, (size_t)(head_num * size_per_head)}, + ft_pooled_output}}}); + bert.forward(&output_tensors, &input_tensors, &bert_weights); + + { + cudaD2Hcpy(h_results_fp8, out_tensor, input_size); + std::string filename = output_path + "/bs_" + std::to_string(batch_count) + "_outputs.bin"; + std::ofstream out(filename, std::ios::out | std::ios::binary); + if (!out.is_open()) { + FT_LOG_WARNING("file %s cannot be opened, loading model fails! \n", filename.c_str()); + return 0; + } + + out.write((char*)h_results_fp8, input_size * sizeof(half)); + } + d_input_ids_ptr += batch_size * seq_len; + d_sequence_lengths_ptr += batch_size; + d_token_type_ids_ptr += batch_size * seq_len; + remain_sentences -= batch_size; + batch_count++; + } + + deviceFree(out_tensor); + deviceFree(ft_pooled_output); + deviceFree(d_input_ids); + deviceFree(d_sequence_lengths); + deviceFree(d_token_type_ids); + delete[] h_results_fp8; + +#ifdef SPARSITY_ENABLED + // cusparseLtDestroy(&cusparselt_handle); +#endif + delete cublas_algo_map; + delete cublas_wrapper_mutex; + return 0; +} diff --git a/examples/cpp/bert_int8/CMakeLists.txt b/examples/cpp/bert_int8/CMakeLists.txt index e67a624c9..b31f149d9 100644 --- a/examples/cpp/bert_int8/CMakeLists.txt +++ b/examples/cpp/bert_int8/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -13,4 +13,4 @@ # limitations under the License. add_executable(bert_int8_example bert_int8_example.cc) -target_link_libraries(bert_int8_example PUBLIC -lcublas -lcublasLt -lcudart BertINT8 nvtx_utils) +target_link_libraries(bert_int8_example PUBLIC -lcublas -lcublasLt -lcudart BertINT8 BertLayerINT8Weight nvtx_utils) diff --git a/examples/cpp/bert_int8/bert_int8_example.cc b/examples/cpp/bert_int8/bert_int8_example.cc index 77cb38dfd..ee34ca944 100644 --- a/examples/cpp/bert_int8/bert_int8_example.cc +++ b/examples/cpp/bert_int8/bert_int8_example.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -22,10 +22,6 @@ #error CUDART_VERSION Undefined! #endif -#ifdef USE_NVTX -bool NVTX_ON = true; -#endif - using namespace fastertransformer; template @@ -173,11 +169,12 @@ int bertINT8Example(size_t batch_size, } // profile time + cudaProfilerStart(); const int ite = 100; cudaProfilerStart(); CudaTimer cuda_timer(stream); - nvtx::resetScope(); - nvtx::addScope("BertInt8"); + ft_nvtx::resetScope(); + ft_nvtx::addScope("BertInt8"); cuda_timer.start(); for (int i = 0; i < ite; i++) { bert_int8.forward(&output_tensors, &input_tensors, &bert_layer_weights); diff --git a/examples/cpp/decoding/CMakeLists.txt b/examples/cpp/decoding/CMakeLists.txt index 294cb9e0c..8cdfb5978 100644 --- a/examples/cpp/decoding/CMakeLists.txt +++ b/examples/cpp/decoding/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/cpp/decoding/decoding_example.cc b/examples/cpp/decoding/decoding_example.cc index 56d66913f..7841a77d4 100644 --- a/examples/cpp/decoding/decoding_example.cc +++ b/examples/cpp/decoding/decoding_example.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -15,7 +15,7 @@ */ #include "src/fastertransformer/models/decoding/Decoding.h" - +#include "src/fastertransformer/utils/nvtx_utils.h" #include #include diff --git a/examples/cpp/decoding/layernorm_test.cc b/examples/cpp/decoding/layernorm_test.cc index 32275f3cf..ece219d3e 100644 --- a/examples/cpp/decoding/layernorm_test.cc +++ b/examples/cpp/decoding/layernorm_test.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -213,6 +213,7 @@ void add_bias_residual_layernorm_test(const int m, const int n) (float*)nullptr, (float*)nullptr, (float*)nullptr, + (float*)nullptr, 0, stream, 0); @@ -230,6 +231,7 @@ void add_bias_residual_layernorm_test(const int m, const int n) (float*)nullptr, (float*)nullptr, (float*)nullptr, + (float*)nullptr, 0, stream, opt_version); @@ -268,6 +270,7 @@ void add_bias_residual_layernorm_test(const int m, const int n) (float*)nullptr, (float*)nullptr, (float*)nullptr, + (float*)nullptr, 0, stream, 0); @@ -284,6 +287,7 @@ void add_bias_residual_layernorm_test(const int m, const int n) (float*)nullptr, (float*)nullptr, (float*)nullptr, + (float*)nullptr, 0, stream, opt_version); @@ -306,6 +310,7 @@ void add_bias_residual_layernorm_test(const int m, const int n) (float*)nullptr, (float*)nullptr, (float*)nullptr, + (float*)nullptr, 0, stream, 0); @@ -331,6 +336,7 @@ void add_bias_residual_layernorm_test(const int m, const int n) (float*)nullptr, (float*)nullptr, (float*)nullptr, + (float*)nullptr, 0, stream, opt_version); diff --git a/examples/cpp/gpt/CMakeLists.txt b/examples/cpp/gpt/CMakeLists.txt index a1dee72fe..a6062ea27 100644 --- a/examples/cpp/gpt/CMakeLists.txt +++ b/examples/cpp/gpt/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/cpp/gpt/gpt_config.ini b/examples/cpp/gpt/gpt_config.ini index 7a87be765..ebeb066ad 100644 --- a/examples/cpp/gpt/gpt_config.ini +++ b/examples/cpp/gpt/gpt_config.ini @@ -6,6 +6,7 @@ top_k=0 ; k value for top k sampling top_p=0.5 ; p value for top p sampling temperature=1.0 ; Use for sampling repetition_penalty=2.0 ; Use for sampling +presence_penalty=0.0 ; Only one of repetition_penalty and presence_penalty are allowed. len_penalty=0.0 beam_search_diversity_rate=0.0 data_type=fp16 @@ -54,3 +55,4 @@ head_num=32 size_per_head=128 vocab_size=51200 decoder_layers=32 + diff --git a/examples/cpp/gpt/gpt_example.cc b/examples/cpp/gpt/gpt_example.cc index 7e596e8c0..2f4b29799 100644 --- a/examples/cpp/gpt/gpt_example.cc +++ b/examples/cpp/gpt/gpt_example.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -25,10 +25,6 @@ #include #include -#ifdef USE_NVTX -bool NVTX_ON = true; -#endif - using namespace fastertransformer; template @@ -152,7 +148,9 @@ void gpt_example(const INIReader reader) const uint top_k = (uint)reader.GetInteger("ft_instance_hyperparameter", "top_k"); const float top_p = reader.GetFloat("ft_instance_hyperparameter", "top_p"); const float temperature = reader.GetFloat("ft_instance_hyperparameter", "temperature"); - const float repetition_penalty = reader.GetFloat("ft_instance_hyperparameter", "repetition_penalty"); + const float repetition_penalty = reader.GetFloat("ft_instance_hyperparameter", "repetition_penalty", 1.0f); + const float presence_penalty = reader.GetFloat("ft_instance_hyperparameter", "presence_penalty", 0.0f); + const int min_length = reader.GetInteger("ft_instance_hyperparameter", "min_length", 0); const std::string model_dir = std::string(reader.Get("ft_instance_hyperparameter", "model_dir")); const bool sparse = static_cast(reader.GetInteger("ft_instance_hyperparameter", "sparse")); const float shared_contexts_ratio = reader.GetFloat("ft_instance_hyperparameter", "shared_contexts_ratio", 1.0f); @@ -161,6 +159,14 @@ void gpt_example(const INIReader reader) reader.GetFloat("ft_instance_hyperparameter", "beam_search_diversity_rate"); const unsigned long long int random_seed = 0; + FT_CHECK_WITH_INFO( + repetition_penalty == 1.0f || presence_penalty == 0.0f, + fmtstr("Found ambiguous parameters repetition_penalty (%f) and presence_penalty (%f) " + "which are mutually exclusive. Please remove one of repetition_penalty or presence_penalty " + "or set to a default value.", + repetition_penalty, + presence_penalty)); + const size_t head_num = reader.GetInteger(model_name, "head_num"); const size_t size_per_head = reader.GetInteger(model_name, "size_per_head"); const size_t vocab_size = reader.GetInteger(model_name, "vocab_size"); @@ -283,6 +289,9 @@ void gpt_example(const INIReader reader) size_per_head, inter_size, decoder_layers, + 0, // expert_num + 0, // moe_k + {}, // moe_layer_index vocab_size, start_id, end_id, @@ -324,7 +333,16 @@ void gpt_example(const INIReader reader) Tensor{MEMORY_CPU, TYPE_UINT32, std::vector{request_batch_size}, output_seq_len.data()}}, {"temperature", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &temperature}}, {"len_penalty", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &len_penalty}}, - {"repetition_penalty", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &repetition_penalty}}}; + {"min_length", Tensor{MEMORY_CPU, TYPE_INT32, std::vector{1}, &min_length}}}; + + if (repetition_penalty != 1.0f) { + input_tensors.insert( + {"repetition_penalty", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &repetition_penalty}}); + } + if (presence_penalty != 0.0f) { + input_tensors.insert( + {"presence_penalty", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &presence_penalty}}); + } if (top_k == 0 && top_p == 0.0f) { FT_CHECK(beam_width > 1); input_tensors.insert({"beam_search_diversity_rate", @@ -373,20 +391,20 @@ void gpt_example(const INIReader reader) cudaProfilerStart(); // warm up ite = 1; - nvtx::setScope("warmup_time"); + ft_nvtx::setScope("warmup_time"); PUSH_RANGE("warmup time") for (int i = 0; i < ite; ++i) { gpt.forward(&output_tensors, &input_tensors, &gpt_weights); } cudaDeviceSynchronize(); POP_RANGE; - nvtx::resetScope(); + ft_nvtx::resetScope(); struct timeval start, end; cudaDeviceSynchronize(); gettimeofday(&start, NULL); - nvtx::setScope("total_time"); + ft_nvtx::setScope("total_time"); PUSH_RANGE("total time") for (int i = 0; i < ite; ++i) { gpt.forward(&output_tensors, &input_tensors, &gpt_weights); @@ -394,7 +412,7 @@ void gpt_example(const INIReader reader) cudaDeviceSynchronize(); POP_RANGE; - nvtx::resetScope(); + ft_nvtx::resetScope(); gettimeofday(&end, NULL); cudaProfilerStop(); diff --git a/examples/cpp/gpt_fp8/CMakeLists.txt b/examples/cpp/gpt_fp8/CMakeLists.txt new file mode 100644 index 000000000..99f365f15 --- /dev/null +++ b/examples/cpp/gpt_fp8/CMakeLists.txt @@ -0,0 +1,21 @@ +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +add_executable(gpt_fp8_example gpt_fp8_example.cc) +target_link_libraries(gpt_fp8_example PUBLIC -lcublas -lcublasLt -lcudart GptFP8 ParallelGptWeight nvtx_utils nccl_utils mpi_utils) + +add_executable(gpt_fp8_triton_example gpt_fp8_triton_example.cc) +target_link_libraries(gpt_fp8_triton_example PUBLIC -lcublas -lcublasLt -lcudart + ParallelGptFP8TritonBackend TransformerTritonBackend memory_utils + custom_ar_comm gpt_example_utils -lpthread) diff --git a/examples/cpp/gpt_fp8/gpt_config.ini b/examples/cpp/gpt_fp8/gpt_config.ini new file mode 100644 index 000000000..aa197001e --- /dev/null +++ b/examples/cpp/gpt_fp8/gpt_config.ini @@ -0,0 +1,81 @@ +[ft_instance_hyperparameter] +max_batch_size=16 ; Use for allocate the buffer +max_seq_len=1024 ; The sequence length of position embedding table, should move to model hyper-parameter +beam_width=1 ; beam width for beam search +top_k=1 ; k value for top k sampling +top_p=0.0 ; p value for top p sampling +temperature=1.0 ; Use for sampling +repetition_penalty=1.0 ; Use for sampling +len_penalty=0.0 +beam_search_diversity_rate=0.0 +; model_name=gpt_89B +model_name=megatron_6.7B +tensor_para_size=1 +pipeline_para_size=1 +; model_name=megatron_345M +; model_name=megatron_6.7B +; model_name=gpt_175B +; model_name=self_defined +; model_dir=./models/megatron-models/c-model/6.7b/ +; model_dir=/home/scratch.bhsueh_sw_1/models/GPT/Megatron/c-model/345m/1-gpu/ +; model_dir=/home/scratch.bhsueh_sw_1/models/GPT/Megatron_FP8/iter_0750000/c-model/2-gpu/ +; model_dir=/workspace/FasterTransformer/models/124m/1-gpu +; model_dir=/workspace/gpt3-8.3b-calibrated/1-gpu +model_dir=/workspace/gpt3-6.7b/99.999/1-gpu +; model_dir=/workspace/gpt3-89b/1-gpu + +[request] +request_batch_size=16 # determine by the request +request_input_len=16 +request_output_len=16 # determine by the request + +[gpt_124M] +head_num=12 +size_per_head=64 +vocab_size=50257 +decoder_layers=12 +inter_size=3072 +start_id=50256 +end_id=50256 + +[gpt_175B] +head_num=96 +size_per_head=128 +vocab_size=51200 +decoder_layers=96 + +[gpt_89B] +head_num=96 +size_per_head=128 +vocab_size=51200 +decoder_layers=8 +inter_size=49152 +start_id=50256 +end_id=50256 + +[self_defined] +head_num=16 +size_per_head=64 +vocab_size=30000 +decoder_layers=12 + +[megatron_345M] +head_num=16 +size_per_head=64 +vocab_size=50304 +decoder_layers=24 + +[megatron_6.7B] +head_num=32 +size_per_head=128 +vocab_size=50688 +decoder_layers=32 +inter_size=16384 +start_id=50256 +end_id=50256 + +[megatron_8.3B] +head_num=64 +size_per_head=64 +vocab_size=50688 +decoder_layers=40 diff --git a/examples/cpp/gpt_fp8/gpt_fp8_example.cc b/examples/cpp/gpt_fp8/gpt_fp8_example.cc new file mode 100644 index 000000000..b72292e55 --- /dev/null +++ b/examples/cpp/gpt_fp8/gpt_fp8_example.cc @@ -0,0 +1,425 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "3rdparty/INIReader.h" +#include "src/fastertransformer/models/gpt_fp8/GptFP8.h" +#include "src/fastertransformer/utils/mpi_utils.h" +#include "src/fastertransformer/utils/nvtx_utils.h" + +#include +#include +#include +#include +#include +#include + +using namespace fastertransformer; + +template +void gpt_example(const INIReader reader); + +int main(int argc, char* argv[]) +{ + mpi::initialize(&argc, &argv); + srand(0); + struct cudaDeviceProp prop; + check_cuda_error(cudaGetDeviceProperties(&prop, 0)); + printf("Device %s\n", prop.name); + + std::string ini_name; + if (argc == 2) + ini_name = std::string(argv[1]); + else + ini_name = "../examples/cpp/gpt_fp8/gpt_config.ini"; + + INIReader reader = INIReader(ini_name); + if (reader.ParseError() < 0) { + std::cout << "[ERROR] Can't load '" << ini_name << "'\n"; + return -1; + } + gpt_example<__nv_fp8_e4m3, __nv_bfloat16>(reader); + mpi::finalize(); + return 0; +} + +int read_start_ids(int batch_size, + std::vector* v_start_lengths, + std::vector* v_start_ids, + int& max_input_len, + const int end_id, + const int beam_width) +{ + std::vector> tmp_start_ids; + std::vector tmp_start_lengths; + + std::string file_name = "../examples/cpp/gpt_fp8/start_ids.csv"; + std::ifstream start_id_file(file_name, std::ios::in); + if (start_id_file.is_open()) { + std::string line; + int i0 = 0; + while (std::getline(start_id_file, line)) { + std::stringstream lineStream(line); + std::string vals; + int i1 = 0; + std::vector tmp_vec; + while (std::getline(lineStream, vals, ',')) { + tmp_vec.push_back(std::stoi(vals)); + i1++; + } + tmp_start_ids.push_back(tmp_vec); + tmp_start_lengths.push_back(i1); + i0++; + } + } + else { + printf("[WARNING] Cannot open the file '%s'. \n", file_name.c_str()); + max_input_len = 0; + return 0; + } + + // max_input_len = tmp_start_lengths.data()[0]; + for (uint i = 1; i < (uint)tmp_start_lengths.size(); i++) { + max_input_len = max_input_len > tmp_start_lengths.data()[i] ? max_input_len : tmp_start_lengths.data()[i]; + } + + while ((int)tmp_start_lengths.size() < batch_size) { + std::vector padding_ids; + for (int i = 0; i < max_input_len; i++) { + padding_ids.push_back(end_id); + } + tmp_start_ids.push_back(padding_ids); + tmp_start_lengths.push_back(max_input_len); + } + + // Add padding + for (int i = 0; i < (int)tmp_start_ids.size(); i++) { + for (int j = (int)tmp_start_ids[i].size(); j < max_input_len; j++) { + tmp_start_ids[i].push_back(end_id); + } + } + + for (int i = 0; i < (int)tmp_start_ids.size(); i++) { + for (int b = 0; b < beam_width; b++) { + for (int j = 0; j < (int)tmp_start_ids[i].size(); j++) { + v_start_ids->push_back(tmp_start_ids[i][j]); + } + v_start_lengths->push_back(tmp_start_lengths[i]); + } + } + + return 0; +} + +template +void gpt_example(const INIReader reader) +{ + const std::string model_name = reader.Get("ft_instance_hyperparameter", "model_name"); + const size_t max_batch_size = reader.GetInteger("ft_instance_hyperparameter", "max_batch_size"); + const size_t max_seq_len = reader.GetInteger("ft_instance_hyperparameter", "max_seq_len"); + const size_t beam_width = reader.GetInteger("ft_instance_hyperparameter", "beam_width"); + const int top_k = reader.GetInteger("ft_instance_hyperparameter", "top_k"); + const float top_p = reader.GetFloat("ft_instance_hyperparameter", "top_p"); + const float temperature = reader.GetFloat("ft_instance_hyperparameter", "temperature"); + const float repetition_penalty = reader.GetFloat("ft_instance_hyperparameter", "repetition_penalty"); + const std::string model_dir = std::string(reader.Get("ft_instance_hyperparameter", "model_dir")); + const float len_penalty = 1.0f; + const float beam_search_diversity_rate = 0.0f; + const unsigned long long int random_seed = 0; + + const int tensor_para_size = reader.GetInteger("ft_instance_hyperparameter", "tensor_para_size"); + const int pipeline_para_size = reader.GetInteger("ft_instance_hyperparameter", "pipeline_para_size"); + + const size_t head_num = reader.GetInteger(model_name, "head_num"); + const size_t size_per_head = reader.GetInteger(model_name, "size_per_head"); + const size_t vocab_size = reader.GetInteger(model_name, "vocab_size"); + const size_t decoder_layers = reader.GetInteger(model_name, "decoder_layers"); + const size_t hidden_units = head_num * size_per_head; + const size_t inter_size = 4 * hidden_units; + + const size_t request_batch_size = reader.GetInteger("request", "request_batch_size"); + // The length of tokens we hope this model to generate + const int request_output_len = reader.GetInteger("request", "request_output_len"); + + const int start_id = 50256; + const int end_id = 50256; + + FT_CHECK(head_num % tensor_para_size == 0); + FT_CHECK(decoder_layers % pipeline_para_size == 0); + + // Prepare the parallelism parameters + int rank = mpi::getCommWorldRank(); + int world_size = mpi::getCommWorldSize(); + + if (rank == 0) { + FT_LOG_INFO("Total ranks: %d.", world_size); + } + int device, device_count; + check_cuda_error(cudaGetDeviceCount(&device_count)); + check_cuda_error(cudaSetDevice(rank % device_count)); + check_cuda_error(cudaGetDevice(&device)); + + struct cudaDeviceProp prop; + check_cuda_error(cudaGetDeviceProperties(&prop, device)); + FT_LOG_INFO("Device %s", prop.name); + FT_LOG_INFO("P%d is running with %d GPU.", rank, device); + + FT_CHECK_WITH_INFO(tensor_para_size * pipeline_para_size == world_size, + fmtstr("[ERROR] tensor_para_size (%d) * pipeline_para_size (%d) should equal to world_size (%d)", + tensor_para_size, + pipeline_para_size, + world_size)); + + const int tensor_para_rank = rank % tensor_para_size; + const int pipeline_para_rank = rank / tensor_para_size; + const int layers_per_group = decoder_layers / pipeline_para_size; + if (layers_per_group * pipeline_para_size != (int)decoder_layers) { + printf("[ERROR] layers_per_group (%d) * pipeline_para_size (%d) should equal to decoder_layers (%ld) \n", + layers_per_group, + pipeline_para_size, + decoder_layers); + exit(-1); + } + + // assume gpu_num = k * n, + // tensor parallelism group size is n + // pipeline parallelism group size is k + NcclParam tensor_para; + NcclParam pipeline_para; + ftNcclInitialize(tensor_para, pipeline_para, tensor_para_size, pipeline_para_size); + + // Read ids of request from file. + int max_input_len = reader.GetInteger("request", "request_input_len", 0); + std::vector v_start_lengths; + std::vector v_start_ids; + read_start_ids(request_batch_size, &v_start_lengths, &v_start_ids, max_input_len, end_id, 1); + + int* d_input_ids; + int* d_input_lengths; + if (max_input_len == 0) { + // unconditional case, no input ids, so do nothing. + d_input_ids = nullptr; + d_input_lengths = nullptr; + } + else { + // conditional case. + deviceMalloc(&d_input_ids, request_batch_size * max_input_len, false); + deviceMalloc(&d_input_lengths, request_batch_size, false); + cudaH2Dcpy(d_input_ids, v_start_ids.data(), request_batch_size * max_input_len); + cudaH2Dcpy(d_input_lengths, v_start_lengths.data(), request_batch_size); + } + + const int total_output_len = max_input_len + request_output_len; + if (total_output_len > (int)max_seq_len) { + printf("[ERROR] total_output_len (%d) should be <= max_seq_len (%ld). \n", total_output_len, max_seq_len); + exit(-1); + } + + std::vector output_seq_len_array(request_batch_size, total_output_len); + + cudaStream_t stream; + cublasHandle_t cublas_handle; + cublasLtHandle_t cublaslt_handle; + cudaStreamCreate(&stream); + cublasCreate(&cublas_handle); + cublasLtCreate(&cublaslt_handle); + cublasSetStream(cublas_handle, stream); +#ifdef SPARSITY_ENABLED + // cusparseLtHandle_t cusparselt_handle; + // CHECK_CUSPARSE(cusparseLtInit(&cusparselt_handle)); + // cublasAlgoMap* cublas_algo_map = new cublasAlgoMap(GEMM_CONFIG, SPGEMM_CONFIG); +#else + cublasAlgoMap* cublas_algo_map = new cublasAlgoMap(GEMM_CONFIG); +#endif + + Allocator allocator(getDevice()); + + std::mutex* cublas_wrapper_mutex = new std::mutex(); + cublasFP8MMWrapper cublas_wrapper = + cublasFP8MMWrapper(cublas_handle, cublaslt_handle, stream, cublas_algo_map, cublas_wrapper_mutex, &allocator); + + cublas_wrapper.setGemmConfig(CUDA_R_16BF, CUDA_R_16BF, CUDA_R_16BF, CUDA_R_32F); + + fastertransformer::GptFP8Weight gpt_weights(hidden_units, + inter_size, + vocab_size, + decoder_layers, + max_seq_len, + tensor_para_size, + tensor_para_rank, + pipeline_para_size, + pipeline_para_rank); + + gpt_weights.loadModel(model_dir); + gpt_weights.transposeWeight(); + +#ifdef SPARSITY_ENABLED + // if (sparse) { + // printf("[INFO] Compress weights for sparse inference\n"); + // gpt_weights.compress_weights(cublas_wrapper); + // } +#endif + + // Need to remove them in the future. + GptFP8 gpt = GptFP8(beam_width, + head_num, + size_per_head, + inter_size, + decoder_layers, + vocab_size, + start_id, + end_id, + tensor_para, + pipeline_para, + stream, + &cublas_wrapper, + &allocator, + false, + &prop, + false); + + int* d_output_ids; + int* d_sequence_lengths; + deviceMalloc(&d_output_ids, request_batch_size * beam_width * total_output_len, false); + deviceMalloc(&d_sequence_lengths, request_batch_size * beam_width, false); + + std::unordered_map input_tensors = std::unordered_map{ + {"input_ids", + Tensor{MEMORY_GPU, TYPE_INT32, std::vector{request_batch_size, (size_t)max_input_len}, d_input_ids}}, + {"input_lengths", Tensor{MEMORY_GPU, TYPE_INT32, std::vector{request_batch_size}, d_input_lengths}}, + {"output_seq_len", + Tensor{MEMORY_CPU, TYPE_UINT32, std::vector{request_batch_size}, output_seq_len_array.data()}}, + {"temperature", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &temperature}}, + {"len_penalty", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &len_penalty}}, + {"repetition_penalty", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &repetition_penalty}}}; + if (top_k == 0 && top_p == 0.0f) { + FT_CHECK(beam_width > 1); + input_tensors.insert({"beam_search_diversity_rate", + Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &beam_search_diversity_rate}}); + } + else { + input_tensors.insert({"random_seed", Tensor{MEMORY_CPU, TYPE_UINT64, std::vector{1}, &random_seed}}); + if (top_p != 0.0f) { + input_tensors.insert({"runtime_top_p", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &top_p}}); + } + if (top_k != 0) { + input_tensors.insert({"runtime_top_k", Tensor{MEMORY_CPU, TYPE_INT32, std::vector{1}, &top_k}}); + } + } + + std::unordered_map output_tensors = std::unordered_map{ + {"output_ids", + Tensor{MEMORY_GPU, + TYPE_INT32, + std::vector{request_batch_size, beam_width, (size_t)total_output_len}, + d_output_ids}}, + {"sequence_length", + Tensor{MEMORY_GPU, TYPE_INT32, std::vector{request_batch_size, beam_width}, d_sequence_lengths}}, + {"output_cum_log_probs", + Tensor{MEMORY_GPU, + TYPE_FP32, + std::vector{(size_t)request_output_len, request_batch_size, beam_width}, + nullptr}}}; + + print_mem_usage(); + int ite = 5; + cudaDeviceSynchronize(); + mpi::barrier(); + + // warm up + ite = 1; + ft_nvtx::setScope("warmup_time"); + PUSH_RANGE("warmup time") + for (int i = 0; i < ite; ++i) { + gpt.forward(&output_tensors, &input_tensors, &gpt_weights); + } + cudaDeviceSynchronize(); + mpi::barrier(); + POP_RANGE; + ft_nvtx::resetScope(); + + ite = 10; + + struct timeval start, end; + cudaDeviceSynchronize(); + mpi::barrier(); + cudaProfilerStart(); + gettimeofday(&start, NULL); + + ft_nvtx::setScope("total_time"); + PUSH_RANGE("total time") + for (int i = 0; i < ite; ++i) { + gpt.forward(&output_tensors, &input_tensors, &gpt_weights); + } + + cudaDeviceSynchronize(); + mpi::barrier(); + POP_RANGE; + ft_nvtx::resetScope(); + gettimeofday(&end, NULL); + + cudaProfilerStop(); + + printf("[INFO] request_batch_size %ld beam_width %ld head_num %ld size_per_head %ld total_output_len %d" + " decoder_layers %ld vocab_size %ld FT-CPP-decoding-beamsearch-time %.2f ms\n", + request_batch_size, + beam_width, + head_num, + size_per_head, + total_output_len, + decoder_layers, + vocab_size, + ((end.tv_sec - start.tv_sec) * 1000 + (end.tv_usec - start.tv_usec) * 0.001) / ite); + + if (rank == 0) { + + std::string fName = "out"; + auto outFile = std::ofstream(fName, std::ios::out); + if (!outFile.is_open()) { + printf("[WARNING] Cannot write results into output file %s \n", fName.c_str()); + } + else { + size_t outCount = total_output_len * request_batch_size * beam_width; + int* hBuf = new int[outCount]; + cudaD2Hcpy(hBuf, d_output_ids, outCount); + + { + std::cout << "Writing " << outCount << " elements\n"; + int zeroCount = 0; + for (size_t i = 0; i < outCount; i++) { + if (hBuf[i] == int(0)) + zeroCount++; + outFile << hBuf[i] << " "; + if ((i + 1) % (total_output_len) == 0) + outFile << std::endl; + + if (i < 10) + printf("%5d ", hBuf[i]); + if ((i + 1) % (total_output_len) == 0 && i < 10) + std::cout << std::endl; + } + std::cout << std::endl << "zeroCount = " << zeroCount << std::endl; + } + delete[] hBuf; + } + } + +#ifdef SPARSITY_ENABLED + // cusparseLtDestroy(&cusparselt_handle); +#endif + delete cublas_algo_map; + delete cublas_wrapper_mutex; + return; +} diff --git a/examples/cpp/gpt_fp8/gpt_fp8_triton_example.cc b/examples/cpp/gpt_fp8/gpt_fp8_triton_example.cc new file mode 100644 index 000000000..244704ed1 --- /dev/null +++ b/examples/cpp/gpt_fp8/gpt_fp8_triton_example.cc @@ -0,0 +1,426 @@ +/* + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include + +#include "3rdparty/INIReader.h" +#include "examples/cpp/multi_gpu_gpt/gpt_example_utils.h" +#include "src/fastertransformer/triton_backend/multi_gpu_gpt_fp8/ParallelGptFP8TritonModel.h" +#include "src/fastertransformer/triton_backend/multi_gpu_gpt_fp8/ParallelGptFP8TritonModelInstance.h" +#include "src/fastertransformer/utils/custom_ar_comm.h" +#include "src/fastertransformer/utils/mpi_utils.h" + +namespace ft = fastertransformer; + +std::vector>> +broadcastRequest(const std::vector& v_start_ids, + const std::vector& v_start_lengths, + const int node_id, + const int gpu_count, + const int beam_width, + const int request_output_len, + const float beam_search_diversity_rate, + const uint runtime_top_k, + const float runtime_top_p, + const float temperature, + const float len_penalty, + const float repetition_penalty, + const unsigned long long int random_seed, + const bool is_return_log_probs, + const bool is_return_context_cum_log_probs, + std::vector* pointer_record) +{ + // broadcast the request to all nodes, and copy "gpu_count" copies on different gpu + int size_1 = v_start_ids.size(); + int size_2 = v_start_lengths.size(); + ft::mpi::bcast(&size_1, 1, ft::mpi::MPI_TYPE_INT, 0, ft::mpi::COMM_WORLD); + ft::mpi::bcast(&size_2, 1, ft::mpi::MPI_TYPE_INT, 0, ft::mpi::COMM_WORLD); + + std::vector v_input_ids(size_1); + std::vector v_input_lengths(size_2); + + if (node_id == 0) { + memcpy(v_input_ids.data(), v_start_ids.data(), size_1 * sizeof(int)); + memcpy(v_input_lengths.data(), v_start_lengths.data(), size_2 * sizeof(int)); + } + ft::mpi::barrier(); + + int request_batch_size = size_2; + int max_input_len = size_1 / size_2; + + ft::mpi::bcast(v_input_ids.data(), size_1, ft::mpi::MPI_TYPE_INT, 0, ft::mpi::COMM_WORLD); + ft::mpi::bcast(v_input_lengths.data(), size_2, ft::mpi::MPI_TYPE_INT, 0, ft::mpi::COMM_WORLD); + + int* total_output_len_ptr = new int{max_input_len + request_output_len}; + + std::vector>> request_list; + for (int device_id = 0; device_id < gpu_count; device_id++) { + ft::check_cuda_error(cudaSetDevice(device_id)); + + int* d_input_ids; + int* d_input_lengths; + + if (max_input_len == 0) { + // unconditional case, no input ids, so do nothing. + d_input_ids = nullptr; + d_input_lengths = nullptr; + max_input_len = 0; + } + else { + // conditional case. + ft::deviceMalloc(&d_input_ids, size_1, false); + ft::deviceMalloc(&d_input_lengths, size_2, false); + ft::cudaH2Dcpy(d_input_ids, v_input_ids.data(), size_1); + ft::cudaH2Dcpy(d_input_lengths, v_input_lengths.data(), size_2); + } + + uint32_t* request_output_len_ptr = (uint32_t*)malloc(request_batch_size * sizeof(uint32_t)); + for (int i = 0; i < request_batch_size; i++) { + request_output_len_ptr[i] = request_output_len; + } + + request_list.push_back(std::shared_ptr>( + new std::unordered_map{ + {"input_ids", + triton::Tensor{triton::MEMORY_GPU, + triton::TYPE_INT32, + std::vector{(size_t)request_batch_size, (size_t)max_input_len}, + d_input_ids}}, + {"input_lengths", + triton::Tensor{triton::MEMORY_GPU, + triton::TYPE_INT32, + std::vector{(size_t)request_batch_size}, + d_input_lengths}}, + {"request_output_len", + triton::Tensor{triton::MEMORY_CPU, + triton::TYPE_INT32, + std::vector{(size_t)request_batch_size}, + request_output_len_ptr}}})); + int* beam_width_ptr = new int(beam_width); + pointer_record->push_back(beam_width_ptr); + request_list[device_id]->insert( + {"beam_width", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_INT32, std::vector{1}, beam_width_ptr}}); + if (beam_width > 1) { + float* beam_search_diversity_rate_ptr = new float(beam_search_diversity_rate); + pointer_record->push_back(beam_search_diversity_rate_ptr); + request_list[device_id]->insert( + {"beam_search_diversity_rate", + triton::Tensor{ + triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, beam_search_diversity_rate_ptr}}); + } + else { + if (runtime_top_p != 0.0f) { + float* runtime_top_p_ptr = new float(runtime_top_p); + pointer_record->push_back(runtime_top_p_ptr); + request_list[device_id]->insert( + {"runtime_top_p", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, runtime_top_p_ptr}}); + } + if (runtime_top_k != 0) { + uint* runtime_top_k_ptr = new uint(runtime_top_k); + pointer_record->push_back(runtime_top_k_ptr); + request_list[device_id]->insert( + {"runtime_top_k", + triton::Tensor{ + triton::MEMORY_CPU, triton::TYPE_UINT32, std::vector{1}, runtime_top_k_ptr}}); + } + } + float* temperature_ptr = new float(temperature); + pointer_record->push_back(temperature_ptr); + request_list[device_id]->insert( + {"temperature", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, temperature_ptr}}); + float* len_penalty_ptr = new float(len_penalty); + pointer_record->push_back(len_penalty_ptr); + request_list[device_id]->insert( + {"len_penalty", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, len_penalty_ptr}}); + float* repetition_penalty_ptr = new float(repetition_penalty); + pointer_record->push_back(repetition_penalty_ptr); + request_list[device_id]->insert( + {"repetition_penalty", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, repetition_penalty_ptr}}); + unsigned long long int* random_seed_ptr = new unsigned long long int(random_seed); + pointer_record->push_back(random_seed_ptr); + request_list[device_id]->insert( + {"random_seed", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_UINT64, std::vector{1}, random_seed_ptr}}); + bool* is_return_log_probs_ptr = new bool(is_return_log_probs); + pointer_record->push_back(is_return_log_probs_ptr); + request_list[device_id]->insert( + {"is_return_log_probs", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_BOOL, std::vector{1}, is_return_log_probs_ptr}}); + bool* is_return_context_cum_log_probs_ptr = new bool(is_return_context_cum_log_probs); + pointer_record->push_back(is_return_context_cum_log_probs_ptr); + request_list[device_id]->insert( + {"is_return_context_cum_log_probs", + triton::Tensor{ + triton::MEMORY_CPU, triton::TYPE_BOOL, std::vector{1}, is_return_context_cum_log_probs_ptr}}); + pointer_record->push_back(d_input_ids); + pointer_record->push_back(d_input_lengths); + pointer_record->push_back(request_output_len_ptr); + } + + return request_list; +} + +std::vector>> +prepareRequest(std::string ini_name, const int node_id, const int gpu_count, std::vector* pointer_record) +{ + INIReader reader = INIReader(ini_name); + if (reader.ParseError() < 0) { + std::cout << "[ERROR] Can't load '" << ini_name << "'\n"; + ft::FT_CHECK(false); + } + + const size_t request_batch_size = reader.GetInteger("request", "request_batch_size"); + const size_t beam_width = reader.GetInteger("ft_instance_hyperparameter", "beam_width"); + const size_t request_output_len = reader.GetInteger("request", "request_output_len"); + const int top_k = reader.GetInteger("ft_instance_hyperparameter", "top_k"); + const float top_p = reader.GetFloat("ft_instance_hyperparameter", "top_p"); + const float temperature = reader.GetFloat("ft_instance_hyperparameter", "temperature"); + const float repetition_penalty = reader.GetFloat("ft_instance_hyperparameter", "repetition_penalty"); + const float len_penalty = reader.GetFloat("ft_instance_hyperparameter", "len_penalty"); + const float beam_search_diversity_rate = + reader.GetFloat("ft_instance_hyperparameter", "beam_search_diversity_rate"); + const unsigned long long int random_seed = 0; + const bool is_return_log_probs = reader.GetBoolean("request", "return_log_probs", false); + // Whether to include input contexts in computing the cumulative log probabilities. + const bool is_return_context_cum_log_probs = reader.GetBoolean("request", "context_log_probs", false); + if (!is_return_log_probs && !is_return_context_cum_log_probs) { + FT_LOG_WARNING("context_log_probs will be ignored since return_log_probs is disabled."); + } + + const int end_id = 50256; + std::vector v_start_ids; + std::vector v_start_lengths; + + size_t max_input_len = 0; + ft::read_start_ids(request_batch_size, + &v_start_lengths, + &v_start_ids, + max_input_len, + end_id, + 1, + "../examples/cpp/gpt_fp8/start_ids.csv"); + + auto request_list = broadcastRequest(v_start_ids, + v_start_lengths, + node_id, + gpu_count, + beam_width, + request_output_len, + beam_search_diversity_rate, + top_k, + top_p, + temperature, + len_penalty, + repetition_penalty, + random_seed, + is_return_log_probs, + is_return_context_cum_log_probs, + pointer_record); + return request_list; +} + +int threadCreateModelInstances(std::shared_ptr model, + std::vector>* model_instances, + const int device_id, + const int rank, + std::pair, std::vector> nccl_comms, + std::shared_ptr custom_all_reduce_comm = nullptr) +{ + FT_LOG_INFO("rank = %d", rank); + ft::check_cuda_error(cudaSetDevice(device_id)); + cudaStream_t stream; + ft::check_cuda_error(cudaStreamCreate(&stream)); + model->createSharedWeights(device_id, rank); + auto model_instance = model->createModelInstance(device_id, rank, stream, nccl_comms, custom_all_reduce_comm); + model_instances->at(device_id) = std::move(model_instance); + FT_LOG_INFO("model instance %d is created", device_id); + ft::print_mem_usage(); + return 0; +} + +int threadForward(std::unique_ptr* model_instance, + std::shared_ptr> request, + std::shared_ptr>* output_tensors, + const int device_id) +{ + ft::check_cuda_error(cudaSetDevice(device_id)); + *output_tensors = (*model_instance)->forward(request); + // fastertransformer::print_to_screen((int*)output_tensors[0].get()->at("output_ids").data, 10); + return 0; +} + +int main(int argc, char* argv[]) +{ + /* + Prepare the nccl ids, node id, device id and world size + by MPI or triton + */ + + ft::mpi::initialize(&argc, &argv); + int node_id = ft::mpi::getCommWorldRank(); + int node_num = ft::mpi::getCommWorldSize(); + + // Note: Only supports that all nodes have same gpu count + const int gpu_count = ft::getDeviceCount(); + const int world_size = node_num * gpu_count; + std::string ini_name = argc >= 2 ? std::string(argv[1]) : "../examples/cpp/gpt_fp8/gpt_config.ini"; + + // step 1: Create model + std::shared_ptr model = AbstractTransformerModel::createGptFP8Model(ini_name); + int tensor_para_size = model->getTensorParaSize(); + int pipeline_para_size = model->getPipelineParaSize(); + ft::FT_CHECK_WITH_INFO(world_size == (tensor_para_size * pipeline_para_size), + "World Size != Tensor Parallel Size * Pipeline Parallel Size !"); + + std::cout << model->toString(); + + // step 2: Initialize the NCCL + std::pair, std::vector> nccl_comms = model->createNcclParams(node_id); + cudaDeviceSynchronize(); + + // Optional Step: create custom all reduce comm + std::vector> custom_all_reduce_comms; + model->createCustomComms(&custom_all_reduce_comms, world_size); + + // step 3: Create model instances + std::vector> model_instances((size_t)gpu_count); + std::vector threads; + + threads.clear(); + + for (int device_id = 0; device_id < gpu_count; device_id++) { + const int rank = node_id * gpu_count + device_id; + threads.push_back(std::thread(threadCreateModelInstances, + model, + &model_instances, + device_id, + rank, + nccl_comms, + custom_all_reduce_comms[rank])); + } + for (auto& t : threads) { + t.join(); + } + + // step 4: prepare request + std::vector pointer_record; // Used to prevent the pointers are release after leaving functions + std::vector>> request_list = + prepareRequest(ini_name, node_id, gpu_count, &pointer_record); + FT_LOG_INFO("request is created"); + + // step 5: Forward + std::vector>> output_tensors_lists( + (size_t)gpu_count); + for (int i = 0; i < 2; i++) { + threads.clear(); + for (int device_id = 0; device_id < gpu_count; device_id++) { + threads.push_back(std::thread(threadForward, + &model_instances[device_id], + request_list[device_id], + &output_tensors_lists[device_id], + device_id)); + } + for (auto& t : threads) { + t.join(); + } + } + FT_LOG_INFO("forward is completed."); + + const int* d_output_ids = (const int*)output_tensors_lists[0].get()->at("output_ids").data; + const int batch_size = output_tensors_lists[0].get()->at("output_ids").shape[0]; + const int beam_width = output_tensors_lists[0].get()->at("output_ids").shape[1]; + const int seq_len = output_tensors_lists[0].get()->at("output_ids").shape[2]; + + // step 6: check results + if (node_id == 0) { + + std::string fName = "out"; + auto outFile = std::ofstream(fName, std::ios::out); + if (!outFile.is_open()) { + FT_LOG_WARNING("Cannot write results into output file %s", fName.c_str()); + } + else { + size_t outCount = batch_size * beam_width * seq_len; + int* hBuf = new int[outCount]; + ft::cudaD2Hcpy(hBuf, d_output_ids, outCount); + + { + std::cout << "Writing " << outCount << " elements\n"; + int zeroCount = 0; + for (size_t i = 0; i < outCount; i++) { + if (hBuf[i] == int(0)) { + zeroCount++; + } + outFile << hBuf[i] << " "; + if ((i + 1) % (seq_len) == 0) { + outFile << std::endl; + } + + if (i < 10) { + printf("%5d ", hBuf[i]); + } + if ((i + 1) % (seq_len) == 0 && i < 10) { + std::cout << std::endl; + } + } + std::cout << std::endl << "zeroCount = " << zeroCount << std::endl; + } + delete[] hBuf; + } + } + + // test time + struct timeval start, end; + ft::mpi::barrier(); + cudaDeviceSynchronize(); + gettimeofday(&start, NULL); + + const int ite = 1; + for (int i = 0; i < ite; i++) { + threads.clear(); + for (int device_id = 0; device_id < gpu_count; device_id++) { + threads.push_back(std::thread(threadForward, + &model_instances[device_id], + request_list[device_id], + &output_tensors_lists[device_id], + device_id)); + } + for (auto& t : threads) { + t.join(); + } + } + + cudaDeviceSynchronize(); + ft::mpi::barrier(); + + gettimeofday(&end, NULL); + + FT_LOG_INFO("batch_size %d beam_width %d seq_len %d" + " FT-CPP-GPT-Triton-time %.2f ms", + batch_size, + beam_width, + seq_len, + ((end.tv_sec - start.tv_sec) * 1000 + (end.tv_usec - start.tv_usec) * 0.001) / ite); + + ft::mpi::finalize(); + return 0; +} diff --git a/examples/cpp/gpt_fp8/start_ids.csv b/examples/cpp/gpt_fp8/start_ids.csv new file mode 100644 index 000000000..798785108 --- /dev/null +++ b/examples/cpp/gpt_fp8/start_ids.csv @@ -0,0 +1,16 @@ +818, 262, 938, 3155, 286, 1528, 11, 257, 649, 1492, 468, 587, 3199, 416, 3271, 509 +198, 464, 968, 8221, 2732, 286, 15198, 318, 5922, 257, 720, 16, 13, 17, 2997, 1628 +464, 968, 1971, 12056, 423, 257, 649, 1182, 3985, 11, 290, 262, 1074, 318, 1016, 284 +464, 968, 1971, 3782, 468, 3199, 663, 5079, 564, 250, 2437, 262, 2159, 447, 247, 82 +818, 257, 1445, 326, 481, 1884, 787, 340, 4577, 329, 6505, 284, 2251, 649, 6725, 11 +464, 968, 1971, 12056, 6, 5859, 41683, 423, 257, 8507, 329, 852, 262, 1266, 287, 4346 +198, 198, 464, 5398, 4332, 628, 628, 198, 14, 3000, 9983, 59, 50256, 50256, 50256, 50256 +464, 717, 640, 314, 2497, 262, 3807, 11, 616, 19218, 5710, 13, 632, 373, 257, 6833 +818, 262, 938, 3155, 286, 1528, 11, 257, 649, 1492, 468, 587, 3199, 416, 3271, 509 +198, 464, 968, 8221, 2732, 286, 15198, 318, 5922, 257, 720, 16, 13, 17, 2997, 1628 +464, 968, 1971, 12056, 423, 257, 649, 1182, 3985, 11, 290, 262, 1074, 318, 1016, 284 +464, 968, 1971, 3782, 468, 3199, 663, 5079, 564, 250, 2437, 262, 2159, 447, 247, 82 +818, 257, 1445, 326, 481, 1884, 787, 340, 4577, 329, 6505, 284, 2251, 649, 6725, 11 +464, 968, 1971, 12056, 6, 5859, 41683, 423, 257, 8507, 329, 852, 262, 1266, 287, 4346 +198, 198, 464, 5398, 4332, 628, 628, 198, 14, 3000, 9983, 59, 50256, 50256, 50256, 50256 +464, 717, 640, 314, 2497, 262, 3807, 11, 616, 19218, 5710, 13, 632, 373, 257, 6833 diff --git a/examples/cpp/gptj/CMakeLists.txt b/examples/cpp/gptj/CMakeLists.txt index 05e6425c8..0cc697b92 100644 --- a/examples/cpp/gptj/CMakeLists.txt +++ b/examples/cpp/gptj/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -19,4 +19,4 @@ target_link_libraries(gptj_example PUBLIC -lcublas -lcublasLt -lcudart add_executable(gptj_triton_example gptj_triton_example.cc) target_link_libraries(gptj_triton_example PUBLIC -lcublas -lcublasLt -lcudart -lpthread GptJTritonBackend TransformerTritonBackend custom_ar_comm - gpt_example_utils word_list mpi_utils nccl_utils) + gpt_example_utils word_list mpi_utils nccl_utils nvtx_utils) diff --git a/examples/cpp/gptj/gptj_config.ini b/examples/cpp/gptj/gptj_config.ini index d62ec2e06..b59a464ad 100644 --- a/examples/cpp/gptj/gptj_config.ini +++ b/examples/cpp/gptj/gptj_config.ini @@ -6,6 +6,7 @@ top_k=0 ; k value for top k sampling top_p=0.5 ; p value for top p sampling temperature=1.0 ; Use for sampling repetition_penalty=2.0 ; Use for sampling +presence_penalty=0.0 ; Only one of repetition_penalty and presence_penalty are allowed. len_penalty=0.0 beam_search_diversity_rate=0.0 data_type=fp16 diff --git a/examples/cpp/gptj/gptj_example.cc b/examples/cpp/gptj/gptj_example.cc index ea84488a2..05f285e85 100644 --- a/examples/cpp/gptj/gptj_example.cc +++ b/examples/cpp/gptj/gptj_example.cc @@ -28,10 +28,6 @@ #include #include -#ifdef USE_NVTX -bool NVTX_ON = true; -#endif - using namespace fastertransformer; template @@ -86,8 +82,10 @@ void gptj_example(const INIReader reader) const uint top_k = (uint)reader.GetInteger("ft_instance_hyperparameter", "top_k"); const float top_p = reader.GetFloat("ft_instance_hyperparameter", "top_p"); const float temperature = reader.GetFloat("ft_instance_hyperparameter", "temperature"); - const float repetition_penalty = reader.GetFloat("ft_instance_hyperparameter", "repetition_penalty"); + const float repetition_penalty = reader.GetFloat("ft_instance_hyperparameter", "repetition_penalty", 1.0f); + const float presence_penalty = reader.GetFloat("ft_instance_hyperparameter", "presence_penalty", 0.0f); const float len_penalty = reader.GetFloat("ft_instance_hyperparameter", "len_penalty"); + const int min_length = reader.GetInteger("ft_instance_hyperparameter", "min_length", 0); const float beam_search_diversity_rate = reader.GetFloat("ft_instance_hyperparameter", "beam_search_diversity_rate"); std::string model_dir = std::string(reader.Get("ft_instance_hyperparameter", "model_dir")); @@ -113,6 +111,13 @@ void gptj_example(const INIReader reader) FT_CHECK(head_num % tensor_para_size == 0); FT_CHECK(decoder_layers % pipeline_para_size == 0); + FT_CHECK_WITH_INFO( + repetition_penalty == 1.0f || presence_penalty == 0.0f, + fmtstr("Found ambiguous parameters repetition_penalty (%f) and presence_penalty (%f) " + "which are mutually exclusive. Please remove one of repetition_penalty or presence_penalty " + "or set to a default value.", + repetition_penalty, + presence_penalty)); // Prepare the parallelism parameters int rank = mpi::getCommWorldRank(); @@ -349,9 +354,19 @@ void gptj_example(const INIReader reader) Tensor{MEMORY_CPU, TYPE_UINT32, std::vector{request_batch_size}, output_seq_len.data()}}, {"temperature", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &temperature}}, {"len_penalty", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &len_penalty}}, - {"repetition_penalty", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &repetition_penalty}}, + {"min_length", Tensor{MEMORY_CPU, TYPE_INT32, std::vector{1}, &min_length}}, {"start_id", Tensor{MEMORY_CPU, TYPE_INT32, std::vector{request_batch_size}, start_ids.data()}}, {"end_id", Tensor{MEMORY_CPU, TYPE_INT32, std::vector{request_batch_size}, end_ids.data()}}}; + + if (repetition_penalty != 1.0f) { + input_tensors.insert( + {"repetition_penalty", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &repetition_penalty}}); + } + if (presence_penalty != 0.0f) { + input_tensors.insert( + {"presence_penalty", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &presence_penalty}}); + } + if (!bad_words.empty()) { input_tensors.insert( {"bad_words_list", Tensor{MEMORY_GPU, TYPE_INT32, {2, bad_words.size() / 2}, d_bad_words}}); @@ -401,7 +416,7 @@ void gptj_example(const INIReader reader) cudaProfilerStart(); // warm up ite = 1; - nvtx::setScope("warmup_time"); + ft_nvtx::setScope("warmup_time"); PUSH_RANGE("warmup time") for (int i = 0; i < ite; ++i) { gpt.forward(&output_tensors, &input_tensors, &gpt_weights); @@ -411,7 +426,7 @@ void gptj_example(const INIReader reader) mpi::barrier(); POP_RANGE; - nvtx::resetScope(); + ft_nvtx::resetScope(); if (rank == 0) { @@ -456,7 +471,7 @@ void gptj_example(const INIReader reader) cudaDeviceSynchronize(); gettimeofday(&start, NULL); - nvtx::setScope("total_time"); + ft_nvtx::setScope("total_time"); PUSH_RANGE("total time") for (int i = 0; i < ite; ++i) { gpt.forward(&output_tensors, &input_tensors, &gpt_weights); @@ -466,7 +481,7 @@ void gptj_example(const INIReader reader) mpi::barrier(); POP_RANGE; - nvtx::resetScope(); + ft_nvtx::resetScope(); gettimeofday(&end, NULL); cudaProfilerStop(); diff --git a/examples/cpp/gptj/gptj_triton_example.cc b/examples/cpp/gptj/gptj_triton_example.cc index 20682af4c..cac02c334 100644 --- a/examples/cpp/gptj/gptj_triton_example.cc +++ b/examples/cpp/gptj/gptj_triton_example.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -21,6 +21,7 @@ #include "src/fastertransformer/utils/custom_ar_comm.h" #include "src/fastertransformer/utils/mpi_utils.h" #include "src/fastertransformer/utils/nccl_utils.h" +#include "src/fastertransformer/utils/nvtx_utils.h" #include "src/fastertransformer/utils/word_list.h" #include @@ -37,6 +38,8 @@ struct RequestParam { float temperature; float len_penalty; float repetition_penalty; + float presence_penalty; + int min_length; unsigned long long int random_seed; int start_id; int end_id; @@ -187,11 +190,26 @@ broadCastRequest(const std::vector& v_start_ids, request_list[device_id]->insert( {"len_penalty", triton::Tensor{triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, len_penalty_ptr}}); - float* repetition_penalty_ptr = new float(param.repetition_penalty); - pointer_record->push_back(repetition_penalty_ptr); + if (param.repetition_penalty != 1.0f) { + float* repetition_penalty_ptr = new float(param.repetition_penalty); + pointer_record->push_back(repetition_penalty_ptr); + request_list[device_id]->insert( + {"repetition_penalty", + triton::Tensor{ + triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, repetition_penalty_ptr}}); + } + if (param.presence_penalty != 0.0f) { + float* presence_penalty_ptr = new float(param.presence_penalty); + pointer_record->push_back(presence_penalty_ptr); + request_list[device_id]->insert( + {"presence_penalty", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, presence_penalty_ptr}}); + } + int* min_length_ptr = new int(param.min_length); + pointer_record->push_back(min_length_ptr); request_list[device_id]->insert( - {"repetition_penalty", - triton::Tensor{triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, repetition_penalty_ptr}}); + {"min_length", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_INT32, std::vector{1}, min_length_ptr}}); unsigned long long int* random_seed_ptr = new unsigned long long int(param.random_seed); pointer_record->push_back(random_seed_ptr); request_list[device_id]->insert( @@ -244,7 +262,9 @@ prepareRequest(std::string ini_name, const int node_id, const int gpu_count, std param.runtime_top_p = reader.GetFloat("ft_instance_hyperparameter", "top_p"); param.temperature = reader.GetFloat("ft_instance_hyperparameter", "temperature"); param.len_penalty = reader.GetFloat("ft_instance_hyperparameter", "len_penalty"); - param.repetition_penalty = reader.GetFloat("ft_instance_hyperparameter", "repetition_penalty"); + param.repetition_penalty = reader.GetFloat("ft_instance_hyperparameter", "repetition_penalty", 1.0f); + param.presence_penalty = reader.GetFloat("ft_instance_hyperparameter", "presence_penalty", 0.0f); + param.min_length = reader.GetInteger("ft_instance_hyperparameter", "min_length", 0); param.random_seed = (unsigned long long int)0; param.start_id = start_id; param.end_id = end_id; diff --git a/examples/cpp/gptneox/CMakeLists.txt b/examples/cpp/gptneox/CMakeLists.txt index 7177f1c80..5d68d2e29 100644 --- a/examples/cpp/gptneox/CMakeLists.txt +++ b/examples/cpp/gptneox/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -19,4 +19,4 @@ target_link_libraries(gptneox_example PUBLIC -lcublas -lcublasLt -lcudart add_executable(gptneox_triton_example gptneox_triton_example.cc) target_link_libraries(gptneox_triton_example PUBLIC -lcublas -lcublasLt -lcudart GptNeoXTritonBackend TransformerTritonBackend custom_ar_comm - mpi_utils nccl_utils gpt_example_utils word_list -lpthread) + mpi_utils nccl_utils gpt_example_utils word_list -lpthread nvtx_utils) diff --git a/examples/cpp/gptneox/gptneox_config.ini b/examples/cpp/gptneox/gptneox_config.ini index 528b51dd2..ab1bf7556 100644 --- a/examples/cpp/gptneox/gptneox_config.ini +++ b/examples/cpp/gptneox/gptneox_config.ini @@ -14,6 +14,7 @@ top_k=1 ; k value for top k sampling top_p=0.0 ; p value for top p sampling temperature=1.0 ; Use for sampling repetition_penalty=1.0 ; Use for sampling +presence_penalty=0.0 ; Only one of repetition_penalty and presence_penalty are allowed. len_penalty=0.0 beam_search_diversity_rate=0.0 request_batch_size=8 # determine by the request diff --git a/examples/cpp/gptneox/gptneox_example.cc b/examples/cpp/gptneox/gptneox_example.cc index 204bb6a81..6fc2233ee 100644 --- a/examples/cpp/gptneox/gptneox_example.cc +++ b/examples/cpp/gptneox/gptneox_example.cc @@ -29,10 +29,6 @@ #include #include -#ifdef USE_NVTX -bool NVTX_ON = true; -#endif - using namespace fastertransformer; template @@ -96,15 +92,24 @@ void gptneox_example(const INIReader reader) const uint top_k = (uint)reader.GetInteger("request", "top_k"); const float top_p = reader.GetFloat("request", "top_p"); const float temperature = reader.GetFloat("request", "temperature"); - const float repetition_penalty = reader.GetFloat("request", "repetition_penalty"); + const float repetition_penalty = reader.GetFloat("request", "repetition_penalty", 1.0f); + const float presence_penalty = reader.GetFloat("request", "presence_penalty", 0.0f); const float len_penalty = reader.GetFloat("request", "len_penalty"); const float beam_search_diversity_rate = reader.GetFloat("request", "beam_search_diversity_rate"); + const int min_length = reader.GetInteger("request", "min_length", 0); const size_t request_batch_size = reader.GetInteger("request", "request_batch_size"); // The length of tokens we hope this model to generate const int request_output_len = reader.GetInteger("request", "request_output_len"); FT_CHECK(head_num % tensor_para_size == 0); FT_CHECK(decoder_layers % pipeline_para_size == 0); + FT_CHECK_WITH_INFO( + repetition_penalty == 1.0f || presence_penalty == 0.0f, + fmtstr("Found ambiguous parameters repetition_penalty (%f) and presence_penalty (%f) " + "which are mutually exclusive. Please remove one of repetition_penalty or presence_penalty " + "or set to a default value.", + repetition_penalty, + presence_penalty)); // Prepare the parallelism parameters int rank = mpi::getCommWorldRank(); @@ -336,10 +341,19 @@ void gptneox_example(const INIReader reader) {"stop_words_list", Tensor{MEMORY_GPU, TYPE_INT32, {request_batch_size, 2, stop_words_len}, d_stop_words}}, {"temperature", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &temperature}}, {"len_penalty", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &len_penalty}}, - {"repetition_penalty", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &repetition_penalty}}, + {"min_length", Tensor{MEMORY_CPU, TYPE_INT32, std::vector{1}, &min_length}}, {"start_id", Tensor{MEMORY_CPU, TYPE_INT32, std::vector{request_batch_size}, start_ids.data()}}, {"end_id", Tensor{MEMORY_CPU, TYPE_INT32, std::vector{request_batch_size}, end_ids.data()}}}; + if (repetition_penalty != 1.0f) { + input_tensors.insert( + {"repetition_penalty", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &repetition_penalty}}); + } + if (presence_penalty != 0.0f) { + input_tensors.insert( + {"presence_penalty", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &presence_penalty}}); + } + if (num_tasks > 0) { // Prefix Prompt Task Name Ids here input_tensors.insert( @@ -385,7 +399,7 @@ void gptneox_example(const INIReader reader) cudaProfilerStart(); // warm up ite = 1; - nvtx::setScope("warmup_time"); + ft_nvtx::setScope("warmup_time"); PUSH_RANGE("warmup time") for (int i = 0; i < ite; ++i) { gpt.forward(&output_tensors, &input_tensors, &gpt_weights); @@ -394,7 +408,7 @@ void gptneox_example(const INIReader reader) mpi::barrier(); POP_RANGE; - nvtx::resetScope(); + ft_nvtx::resetScope(); if (rank == 0) { @@ -439,7 +453,7 @@ void gptneox_example(const INIReader reader) cudaDeviceSynchronize(); gettimeofday(&start, NULL); - nvtx::setScope("total_time"); + ft_nvtx::setScope("total_time"); PUSH_RANGE("total time") for (int i = 0; i < ite; ++i) { gpt.forward(&output_tensors, &input_tensors, &gpt_weights); @@ -449,7 +463,7 @@ void gptneox_example(const INIReader reader) mpi::barrier(); POP_RANGE; - nvtx::resetScope(); + ft_nvtx::resetScope(); gettimeofday(&end, NULL); cudaProfilerStop(); diff --git a/examples/cpp/gptneox/gptneox_triton_example.cc b/examples/cpp/gptneox/gptneox_triton_example.cc index 7fcb6ad88..a7b13cd1a 100644 --- a/examples/cpp/gptneox/gptneox_triton_example.cc +++ b/examples/cpp/gptneox/gptneox_triton_example.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -21,6 +21,7 @@ #include "src/fastertransformer/utils/custom_ar_comm.h" #include "src/fastertransformer/utils/mpi_utils.h" #include "src/fastertransformer/utils/nccl_utils.h" +#include "src/fastertransformer/utils/nvtx_utils.h" #include "src/fastertransformer/utils/word_list.h" #include @@ -37,6 +38,8 @@ struct RequestParam { float temperature; float len_penalty; float repetition_penalty; + float presence_penalty; + int min_length; unsigned long long int random_seed; int start_id; int end_id; @@ -180,11 +183,26 @@ broadCastRequest(const std::vector& v_start_ids, request_list[device_id]->insert( {"len_penalty", triton::Tensor{triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, len_penalty_ptr}}); - float* repetition_penalty_ptr = new float(param.repetition_penalty); - pointer_record->push_back(repetition_penalty_ptr); + if (param.repetition_penalty != 1.0f) { + float* repetition_penalty_ptr = new float(param.repetition_penalty); + pointer_record->push_back(repetition_penalty_ptr); + request_list[device_id]->insert( + {"repetition_penalty", + triton::Tensor{ + triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, repetition_penalty_ptr}}); + } + if (param.presence_penalty != 0.0f) { + float* presence_penalty_ptr = new float(param.presence_penalty); + pointer_record->push_back(presence_penalty_ptr); + request_list[device_id]->insert( + {"presence_penalty", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, presence_penalty_ptr}}); + } + int* min_length_ptr = new int(param.min_length); + pointer_record->push_back(min_length_ptr); request_list[device_id]->insert( - {"repetition_penalty", - triton::Tensor{triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, repetition_penalty_ptr}}); + {"min_length", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_INT32, std::vector{1}, min_length_ptr}}); unsigned long long int* random_seed_ptr = new unsigned long long int(param.random_seed); pointer_record->push_back(random_seed_ptr); request_list[device_id]->insert( @@ -237,7 +255,9 @@ prepareRequest(std::string ini_name, const int node_id, const int gpu_count, std param.runtime_top_p = reader.GetFloat("request", "top_p"); param.temperature = reader.GetFloat("request", "temperature"); param.len_penalty = reader.GetFloat("request", "len_penalty"); - param.repetition_penalty = reader.GetFloat("request", "repetition_penalty"); + param.repetition_penalty = reader.GetFloat("request", "repetition_penalty", 1.0f); + param.presence_penalty = reader.GetFloat("request", "presence_penalty", 0.0f); + param.min_length = reader.GetInteger("request", "min_length", 0); param.random_seed = (unsigned long long int)0; param.start_id = start_id; param.end_id = end_id; diff --git a/examples/cpp/multi_gpu_gpt/CMakeLists.txt b/examples/cpp/multi_gpu_gpt/CMakeLists.txt index 2421e4833..1e08e3235 100644 --- a/examples/cpp/multi_gpu_gpt/CMakeLists.txt +++ b/examples/cpp/multi_gpu_gpt/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -27,7 +27,7 @@ target_link_libraries(multi_gpu_gpt_async_example PUBLIC -lcublas -lcublasLt -lc add_executable(multi_gpu_gpt_triton_example multi_gpu_gpt_triton_example.cc) target_link_libraries(multi_gpu_gpt_triton_example PUBLIC -lcublas -lcublasLt -lcudart ParallelGptTritonBackend TransformerTritonBackend memory_utils - custom_ar_comm mpi_utils nccl_utils gpt_example_utils -lpthread) + custom_ar_comm nvtx_utils mpi_utils nccl_utils gpt_example_utils -lpthread) add_executable(multi_gpu_gpt_interactive_example multi_gpu_gpt_interactive_example.cc) target_link_libraries(multi_gpu_gpt_interactive_example PUBLIC -lcublas -lcublasLt -lcudart diff --git a/examples/cpp/multi_gpu_gpt/gpt_config.ini b/examples/cpp/multi_gpu_gpt/gpt_config.ini index 15e06aad3..908df31e9 100644 --- a/examples/cpp/multi_gpu_gpt/gpt_config.ini +++ b/examples/cpp/multi_gpu_gpt/gpt_config.ini @@ -6,30 +6,33 @@ top_k=1 ; k value for top k sampling top_p=0 ; p value for top p sampling temperature=1.0 ; Use for sampling repetition_penalty=1.0 ; Use for sampling +presence_penalty=0.0 ; Only one of repetition_penalty and presence_penalty are allowed. tensor_para_size=1 pipeline_para_size=1 -data_type=fp16 +data_type=bf16 sparse=0 int8_mode=0 enable_custom_all_reduce=0 ; model_name=gpt_124M -model_name=megatron_345M +; model_name=megatron_345M ; model_name=megatron_1.3B_adapter -; model_name=megatron_6.7B +model_name=gpt_89B ; model_name=megatron_20B ; model_name=gpt_175B ; model_name=opt_125M ; model_name=opt_350M ; model_name=bloom_560M ; model_name=self_defined -; model_dir=./models/megatron-models/c-model/6.7b/ -model_dir=../models/megatron-models/c-model/345m/1-gpu/ +; model_dir=/workspace/gpt3-6.7b/99.999/1-gpu +model_dir=/workspace/gpt3_89b/1-gpu +; model_dir=../models/megatron-models/c-model/345m/1-gpu/ len_penalty=0.0 beam_search_diversity_rate=0.0 -shared_contexts_ratio=1.0 +shared_contexts_ratio=0.0 [request] -request_batch_size=8 ; determine by the request +request_batch_size=1 ; determine by the request +request_input_len=512 request_output_len=32 ; determine by the request return_log_probs=false ; return the output log probs and cumulative log probs. context_log_probs=false ; include input contexts in the cumulative log probability computation. @@ -85,7 +88,7 @@ has_adapters=true [megatron_6.7B] head_num=32 size_per_head=128 -vocab_size=51200 +vocab_size=50688 decoder_layers=32 start_id=50256 end_id=50256 @@ -109,6 +112,15 @@ start_id=50256 end_id=50256 inter_size=49152 +[gpt_89B] +head_num=96 +size_per_head=128 +vocab_size=51200 +decoder_layers=8 +inter_size=49152 +start_id=50256 +end_id=50256 + [opt_125M] head_num=12 size_per_head=64 @@ -167,3 +179,4 @@ decoder_layers=12 start_id=50256 end_id=50256 inter_size=4096 + diff --git a/examples/cpp/multi_gpu_gpt/gpt_example_utils.cc b/examples/cpp/multi_gpu_gpt/gpt_example_utils.cc index ca5e4d117..f06ad8a0b 100644 --- a/examples/cpp/multi_gpu_gpt/gpt_example_utils.cc +++ b/examples/cpp/multi_gpu_gpt/gpt_example_utils.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -15,6 +15,7 @@ */ #include "examples/cpp/multi_gpu_gpt/gpt_example_utils.h" #include "src/fastertransformer/utils/mpi_utils.h" +#include "src/fastertransformer/utils/nvtx_utils.h" #include #include @@ -174,11 +175,21 @@ request_config_t read_request_config(const INIReader& reader) { request_config_t config; - config.beam_width = reader.GetInteger("ft_instance_hyperparameter", "beam_width"); - config.top_k = reader.GetInteger("ft_instance_hyperparameter", "top_k"); - config.top_p = reader.GetFloat("ft_instance_hyperparameter", "top_p"); - config.temperature = reader.GetFloat("ft_instance_hyperparameter", "temperature"); - config.repetition_penalty = reader.GetFloat("ft_instance_hyperparameter", "repetition_penalty"); + config.beam_width = reader.GetInteger("ft_instance_hyperparameter", "beam_width"); + config.top_k = reader.GetInteger("ft_instance_hyperparameter", "top_k"); + config.top_p = reader.GetFloat("ft_instance_hyperparameter", "top_p"); + config.temperature = reader.GetFloat("ft_instance_hyperparameter", "temperature"); + config.min_length = reader.GetInteger("ft_instance_hyperparameter", "min_length", 0); + + config.repetition_penalty = reader.GetFloat("ft_instance_hyperparameter", "repetition_penalty", 1.0f); + config.presence_penalty = reader.GetFloat("ft_instance_hyperparameter", "presence_penalty", 0.0f); + FT_CHECK_WITH_INFO( + config.repetition_penalty == 1.0f || config.presence_penalty == 0.0f, + fmtstr("Found ambiguous parameters repetition_penalty (%f) and presence_penalty (%f) " + "which are mutually exclusive. Please remove one of repetition_penalty or presence_penalty " + "or set to a default value.", + config.repetition_penalty, + config.presence_penalty)); config.request_batch_size = reader.GetInteger("request", "request_batch_size"); // The length of tokens we hope this model to generate @@ -255,6 +266,7 @@ Allocator init_cuda_ctx(cudaStream_t& stream, cudaDevicePro check_cuda_error(cudaGetDeviceProperties(&prop, device)); printf("Device %s\n", prop.name); + ft_nvtx::setDeviceDomain(getDevice()); return Allocator(getDevice()); } @@ -358,7 +370,13 @@ void populate_request(std::unordered_map& input_tensors, input_tensors.insert({"output_seq_len", {MEMORY_CPU, TYPE_UINT32, {request_batch_size}, output_seq_len.data()}}); input_tensors.insert({"temperature", {MEMORY_CPU, TYPE_FP32, {1}, &request_config.temperature}}); input_tensors.insert({"len_penalty", {MEMORY_CPU, TYPE_FP32, {1}, &request_config.len_penalty}}); - input_tensors.insert({"repetition_penalty", {MEMORY_CPU, TYPE_FP32, {1}, &request_config.repetition_penalty}}); + if (request_config.repetition_penalty != 1.0f) { + input_tensors.insert({"repetition_penalty", {MEMORY_CPU, TYPE_FP32, {1}, &request_config.repetition_penalty}}); + } + if (request_config.presence_penalty != 0.0f) { + input_tensors.insert({"presence_penalty", {MEMORY_CPU, TYPE_FP32, {1}, &request_config.presence_penalty}}); + } + input_tensors.insert({"min_length", {MEMORY_CPU, TYPE_FP32, {1}, &request_config.min_length}}); input_tensors.insert({"random_seed", {MEMORY_CPU, TYPE_UINT64, {1}, &random_seed}}); if (request_config.top_k == 0 && request_config.top_p == 0.0f) { diff --git a/examples/cpp/multi_gpu_gpt/gpt_example_utils.h b/examples/cpp/multi_gpu_gpt/gpt_example_utils.h index 3d8238b1f..d61a82f53 100644 --- a/examples/cpp/multi_gpu_gpt/gpt_example_utils.h +++ b/examples/cpp/multi_gpu_gpt/gpt_example_utils.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -69,6 +69,8 @@ struct request_config_t { float top_p; float temperature; float repetition_penalty; + float presence_penalty; + int min_length; float len_penalty; float beam_search_diversity_rate; diff --git a/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_async_example.cc b/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_async_example.cc index 623db2e17..ba2c06a0d 100644 --- a/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_async_example.cc +++ b/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_async_example.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -39,10 +39,6 @@ static bool USE_ASYNC = true; const int START_TOKEN_ID = 50256; const int END_TOKEN_ID = 50256; -#ifdef USE_NVTX -bool NVTX_ON = true; -#endif - using namespace fastertransformer; namespace strutils { @@ -689,6 +685,9 @@ void multi_gpu_gpt_example(const INIReader reader) size_per_head, inter_size, decoder_layers, + 0, // expert_num + 0, // moe_k + {}, // moe_layer_index vocab_size, start_id, end_id, @@ -784,7 +783,7 @@ void multi_gpu_gpt_example(const INIReader reader) cudaProfilerStart(); // warm up - nvtx::setScope("warmup_time"); + ft_nvtx::setScope("warmup_time"); PUSH_RANGE("warmup time") if (USE_ASYNC) { gpt_streamer.run(&gpt, &output_tensors, &input_tensors, &gpt_weights); @@ -795,7 +794,7 @@ void multi_gpu_gpt_example(const INIReader reader) cudaDeviceSynchronize(); mpi::barrier(); POP_RANGE; - nvtx::resetScope(); + ft_nvtx::resetScope(); if (rank == 0) { printf("[INFO] Profiling\n"); @@ -810,7 +809,7 @@ void multi_gpu_gpt_example(const INIReader reader) mpi::barrier(); gettimeofday(&start, NULL); - nvtx::setScope("total_time"); + ft_nvtx::setScope("total_time"); PUSH_RANGE("total time") int ite = 1; for (int i = 0; i < ite; ++i) { @@ -825,7 +824,7 @@ void multi_gpu_gpt_example(const INIReader reader) cudaDeviceSynchronize(); mpi::barrier(); POP_RANGE; - nvtx::resetScope(); + ft_nvtx::resetScope(); gettimeofday(&end, NULL); cudaProfilerStop(); diff --git a/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_example.cc b/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_example.cc index b8d93c12f..178274b53 100644 --- a/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_example.cc +++ b/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_example.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -29,10 +29,6 @@ #include #include -#ifdef USE_NVTX -bool NVTX_ON = true; -#endif - using namespace fastertransformer; template @@ -170,6 +166,9 @@ void multi_gpu_gpt_example(const INIReader reader, std::string in_csv) model_config.size_per_head, model_config.inter_size, model_config.decoder_layers, + 0, // expert_num + 0, // moe_k + {}, // moe_layer_index model_config.vocab_size, model_config.start_id, model_config.end_id, @@ -236,7 +235,8 @@ void multi_gpu_gpt_example(const INIReader reader, std::string in_csv) cudaProfilerStart(); // warm up ite = 1; - nvtx::setScope("warmup_time"); + + ft_nvtx::setScope("warmup_time"); PUSH_RANGE("warmup time") for (int i = 0; i < ite; ++i) { gpt.forward(&output_tensors, &input_tensors, &gpt_weights); @@ -245,7 +245,7 @@ void multi_gpu_gpt_example(const INIReader reader, std::string in_csv) mpi::barrier(); POP_RANGE; - nvtx::resetScope(); + ft_nvtx::resetScope(); if (rank == 0) { write_output_tensors(output_tensors); @@ -258,17 +258,15 @@ void multi_gpu_gpt_example(const INIReader reader, std::string in_csv) ite = 10; - nvtx::setScope("total_time"); - PUSH_RANGE("total time") for (int i = 0; i < ite; ++i) { + PUSH_RANGE("batch"); gpt.forward(&output_tensors, &input_tensors, &gpt_weights); + POP_RANGE; } cudaDeviceSynchronize(); mpi::barrier(); - POP_RANGE; - nvtx::resetScope(); gettimeofday(&end, NULL); cudaProfilerStop(); diff --git a/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_interactive_example.cc b/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_interactive_example.cc index 61d98c12e..3c0b6cfca 100644 --- a/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_interactive_example.cc +++ b/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_interactive_example.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -28,10 +28,6 @@ #include #include -#ifdef USE_NVTX -bool NVTX_ON = true; -#endif - using namespace fastertransformer; template @@ -102,13 +98,15 @@ void multi_gpu_gpt_interactive_example(const INIReader reader, std::string in_cs const uint top_k = (uint)reader.GetInteger("ft_instance_hyperparameter", "top_k"); const float top_p = reader.GetFloat("ft_instance_hyperparameter", "top_p"); const float temperature = reader.GetFloat("ft_instance_hyperparameter", "temperature"); - const float repetition_penalty = reader.GetFloat("ft_instance_hyperparameter", "repetition_penalty"); + const float repetition_penalty = reader.GetFloat("ft_instance_hyperparameter", "repetition_penalty", 1.0f); + const float presence_penalty = reader.GetFloat("ft_instance_hyperparameter", "presence_penalty", 0.0f); const std::string model_dir = std::string(reader.Get("ft_instance_hyperparameter", "model_dir")); const bool sparse = static_cast(reader.GetInteger("ft_instance_hyperparameter", "sparse")); const int int8_mode = reader.GetInteger("ft_instance_hyperparameter", "int8_mode"); const float len_penalty = reader.GetFloat("ft_instance_hyperparameter", "len_penalty"); const float beam_search_diversity_rate = reader.GetFloat("ft_instance_hyperparameter", "beam_search_diversity_rate"); + const int min_length = reader.GetInteger("ft_instance_hyperparameter", "min_length", 0); const float shared_contexts_ratio = reader.GetFloat("ft_instance_hyperparameter", "shared_contexts_ratio", true); const int tensor_para_size = reader.GetInteger("ft_instance_hyperparameter", "tensor_para_size"); @@ -386,6 +384,9 @@ void multi_gpu_gpt_interactive_example(const INIReader reader, std::string in_cs size_per_head, inter_size, decoder_layers, + 0, // expert_num + 0, // moe_k + {}, // moe_layer_index vocab_size, start_id, end_id, @@ -448,8 +449,13 @@ void multi_gpu_gpt_interactive_example(const INIReader reader, std::string in_cs input_tensors.insert({"session_len", Tensor{MEMORY_CPU, TYPE_UINT32, std::vector{1}, &session_len}}); input_tensors.insert({"temperature", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &temperature}}); input_tensors.insert({"len_penalty", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &len_penalty}}); - input_tensors.insert( - {"repetition_penalty", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &repetition_penalty}}); + if (repetition_penalty != 1.0f) { + input_tensors.insert({"repetition_penalty", {MEMORY_CPU, TYPE_FP32, {1}, &repetition_penalty}}); + } + if (presence_penalty != 0.0f) { + input_tensors.insert({"presence_penalty", {MEMORY_CPU, TYPE_FP32, {1}, &presence_penalty}}); + } + input_tensors.insert({"min_length", Tensor{MEMORY_CPU, TYPE_INT32, std::vector{1}, &min_length}}); input_tensors.insert({"random_seed", Tensor{MEMORY_CPU, TYPE_UINT64, std::vector{1}, &random_seed}}); std::unordered_map output_tensors = std::unordered_map{ @@ -533,7 +539,7 @@ void multi_gpu_gpt_interactive_example(const INIReader reader, std::string in_cs cudaProfilerStart(); // warm up ite = 1; - nvtx::setScope("warmup_time"); + ft_nvtx::setScope("warmup_time"); PUSH_RANGE("warmup time") for (int i = 0; i < ite; ++i) { gpt.forward(&output_tensors, &input_tensors, &gpt_weights); @@ -543,7 +549,7 @@ void multi_gpu_gpt_interactive_example(const INIReader reader, std::string in_cs mpi::barrier(); POP_RANGE; - nvtx::resetScope(); + ft_nvtx::resetScope(); if (rank == 0) { size_t outCount = first_output_len * request_batch_size * beam_width; @@ -583,7 +589,7 @@ void multi_gpu_gpt_interactive_example(const INIReader reader, std::string in_cs ite = 10; - nvtx::setScope("total_time"); + ft_nvtx::setScope("total_time"); PUSH_RANGE("total time") for (int i = 0; i < ite; ++i) { gpt.forward(&output_tensors, &input_tensors, &gpt_weights); @@ -594,7 +600,7 @@ void multi_gpu_gpt_interactive_example(const INIReader reader, std::string in_cs mpi::barrier(); POP_RANGE; - nvtx::resetScope(); + ft_nvtx::resetScope(); gettimeofday(&end, NULL); cudaProfilerStop(); diff --git a/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_triton_example.cc b/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_triton_example.cc index 59b67ad9b..d4dc021be 100644 --- a/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_triton_example.cc +++ b/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_triton_example.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -24,6 +24,7 @@ #include "src/fastertransformer/utils/custom_ar_comm.h" #include "src/fastertransformer/utils/mpi_utils.h" #include "src/fastertransformer/utils/nccl_utils.h" +#include "src/fastertransformer/utils/nvtx_utils.h" namespace ft = fastertransformer; @@ -40,6 +41,8 @@ broadcastRequest(const std::vector& v_start_ids, const float temperature, const float len_penalty, const float repetition_penalty, + const float presence_penalty, + const int min_length, const unsigned long long int random_seed, const bool is_return_log_probs, const bool is_return_context_cum_log_probs, @@ -155,6 +158,26 @@ broadcastRequest(const std::vector& v_start_ids, request_list[device_id]->insert( {"repetition_penalty", triton::Tensor{triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, repetition_penalty_ptr}}); + if (repetition_penalty != 1.0f) { + float* repetition_penalty_ptr = new float(repetition_penalty); + pointer_record->push_back(repetition_penalty_ptr); + request_list[device_id]->insert( + {"repetition_penalty", + triton::Tensor{ + triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, repetition_penalty_ptr}}); + } + if (presence_penalty != 0.0f) { + float* presence_penalty_ptr = new float(presence_penalty); + pointer_record->push_back(presence_penalty_ptr); + request_list[device_id]->insert( + {"presence_penalty", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, presence_penalty_ptr}}); + } + int* min_length_ptr = new int(min_length); + pointer_record->push_back(min_length_ptr); + request_list[device_id]->insert( + {"min_length", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_INT32, std::vector{1}, min_length_ptr}}); unsigned long long int* random_seed_ptr = new unsigned long long int(random_seed); pointer_record->push_back(random_seed_ptr); request_list[device_id]->insert( @@ -201,7 +224,9 @@ prepareRequest(std::string ini_name, const int node_id, const int gpu_count, std const int top_k = reader.GetInteger("ft_instance_hyperparameter", "top_k"); const float top_p = reader.GetFloat("ft_instance_hyperparameter", "top_p"); const float temperature = reader.GetFloat("ft_instance_hyperparameter", "temperature"); - const float repetition_penalty = reader.GetFloat("ft_instance_hyperparameter", "repetition_penalty"); + const float repetition_penalty = reader.GetFloat("ft_instance_hyperparameter", "repetition_penalty", 1.0f); + const float presence_penalty = reader.GetFloat("ft_instance_hyperparameter", "presence_penalty", 0.0f); + const int min_length = reader.GetInteger("ft_instance_hyperparameter", "min_length", 0); const float len_penalty = reader.GetFloat("ft_instance_hyperparameter", "len_penalty"); const float beam_search_diversity_rate = reader.GetFloat("ft_instance_hyperparameter", "beam_search_diversity_rate"); @@ -239,6 +264,8 @@ prepareRequest(std::string ini_name, const int node_id, const int gpu_count, std temperature, len_penalty, repetition_penalty, + presence_penalty, + min_length, random_seed, is_return_log_probs, is_return_context_cum_log_probs, diff --git a/examples/cpp/swin/CMakeLists.txt b/examples/cpp/swin/CMakeLists.txt index 4aaa82c22..40185961c 100644 --- a/examples/cpp/swin/CMakeLists.txt +++ b/examples/cpp/swin/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/cpp/swin_int8/CMakeLists.txt b/examples/cpp/swin_int8/CMakeLists.txt index bade98c37..fccc9f4a0 100644 --- a/examples/cpp/swin_int8/CMakeLists.txt +++ b/examples/cpp/swin_int8/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/cpp/vit/CMakeLists.txt b/examples/cpp/vit/CMakeLists.txt index af2b87103..7a619064a 100644 --- a/examples/cpp/vit/CMakeLists.txt +++ b/examples/cpp/vit/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -15,4 +15,4 @@ cmake_minimum_required(VERSION 3.8) add_executable(vit_example vit_example.cc) target_link_libraries(vit_example PUBLIC ViT trt_fused_multi_head_attention vit_kernels - cublasMMWrapper -lcublas -lcublasLt -lcudart -lcudnn -lm) + cublasMMWrapper -lcublas -lcublasLt -lcudart -lcudnn -lm nvtx_utils) diff --git a/examples/cpp/vit/vit_example.cc b/examples/cpp/vit/vit_example.cc index 4a336dcb2..0a6fa225b 100644 --- a/examples/cpp/vit/vit_example.cc +++ b/examples/cpp/vit/vit_example.cc @@ -15,6 +15,7 @@ */ #include "src/fastertransformer/models/vit/ViT.h" +#include "src/fastertransformer/utils/nvtx_utils.h" #include "stdio.h" #include "stdlib.h" #include diff --git a/examples/cpp/vit_int8/CMakeLists.txt b/examples/cpp/vit_int8/CMakeLists.txt index 1e1ca5aa5..905f965ef 100644 --- a/examples/cpp/vit_int8/CMakeLists.txt +++ b/examples/cpp/vit_int8/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/cpp/vit_int8/vit_int8_example.cc b/examples/cpp/vit_int8/vit_int8_example.cc index ce89aa8da..ec84d1aea 100644 --- a/examples/cpp/vit_int8/vit_int8_example.cc +++ b/examples/cpp/vit_int8/vit_int8_example.cc @@ -22,10 +22,6 @@ #include #include -#ifdef USE_NVTX -bool NVTX_ON = true; -#endif - using namespace fastertransformer; using namespace std; diff --git a/examples/cpp/wenet/CMakeLists.txt b/examples/cpp/wenet/CMakeLists.txt index d532dbca8..3cff4f192 100644 --- a/examples/cpp/wenet/CMakeLists.txt +++ b/examples/cpp/wenet/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -13,15 +13,13 @@ # limitations under the License. add_executable(wenet_encoder_example wenet_encoder_example.cc) -if (SPARSITY_SUPPORT) -target_link_libraries(wenet_encoder_example PUBLIC -lcublas -lcublasLt -lcudart -lcusparse -lcusparseLt -lcudnn WenetEncoder) -else() target_link_libraries(wenet_encoder_example PUBLIC -lcublas -lcublasLt -lcudart -lcudnn WenetEncoder) +if (SPARSITY_SUPPORT) +target_link_libraries(wenet_encoder_example PUBLIC -lcusparse -lcusparseLt) endif() add_executable(wenet_decoder_example wenet_decoder_example.cc) +target_link_libraries(wenet_decoder_example PUBLIC -lcublas -lcublasLt -lcudart -lcudnn WenetDecoder) if(SPARSITY_SUPPORT) - target_link_libraries(wenet_decoder_example PUBLIC -lcublas -lcublasLt -lcudart -lcusparse -lcusparseLt -lcudnn WenetDecoder) -else() - target_link_libraries(wenet_decoder_example PUBLIC -lcublas -lcublasLt -lcudart -lcudnn WenetDecoder) + target_link_libraries(wenet_decoder_example PUBLIC -lcublas -lcusparse -lcusparseLt) endif() \ No newline at end of file diff --git a/examples/cpp/wenet/wenet_decoder_example.cc b/examples/cpp/wenet/wenet_decoder_example.cc index f30c090bc..4de639513 100644 --- a/examples/cpp/wenet/wenet_decoder_example.cc +++ b/examples/cpp/wenet/wenet_decoder_example.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/examples/cpp/wenet/wenet_encoder_example.cc b/examples/cpp/wenet/wenet_encoder_example.cc index ddcc1d753..524eeccd1 100644 --- a/examples/cpp/wenet/wenet_encoder_example.cc +++ b/examples/cpp/wenet/wenet_encoder_example.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/examples/cpp/xlnet/CMakeLists.txt b/examples/cpp/xlnet/CMakeLists.txt index 531c8f862..842ac15a2 100644 --- a/examples/cpp/xlnet/CMakeLists.txt +++ b/examples/cpp/xlnet/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -17,8 +17,8 @@ target_link_libraries(cnpy PUBLIC -lz) set_property(TARGET cnpy PROPERTY POSITION_INDEPENDENT_CODE ON) add_executable(xlnet_example xlnet_example.cc) -target_link_libraries(xlnet_example PUBLIC -lcublas -lcublasLt -lcudart -lz cnpy Xlnet) +target_link_libraries(xlnet_example PUBLIC -lcublas -lcublasLt -lcudart -lz cnpy nvtx_utils Xlnet) add_executable(xlnet_correctness_example xlnet_correctness_example.cc) -target_link_libraries(xlnet_correctness_example PUBLIC -lcublas -lcublasLt -lcudart -lz cnpy Xlnet) +target_link_libraries(xlnet_correctness_example PUBLIC -lcublas -lcublasLt -lcudart -lz cnpy nvtx_utils Xlnet) diff --git a/examples/cpp/xlnet/xlnet_correctness_example.cc b/examples/cpp/xlnet/xlnet_correctness_example.cc index 1faf2fde7..b5299cb5a 100644 --- a/examples/cpp/xlnet/xlnet_correctness_example.cc +++ b/examples/cpp/xlnet/xlnet_correctness_example.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -17,6 +17,9 @@ #include "cnpy.h" #include "src/fastertransformer/models/xlnet/Xlnet.h" #include "src/fastertransformer/utils/cuda_bf16_wrapper.h" + +#include "src/fastertransformer/utils/nvtx_utils.h" + using namespace fastertransformer; using namespace std; #include diff --git a/examples/cpp/xlnet/xlnet_example.cc b/examples/cpp/xlnet/xlnet_example.cc index 000fcf7fd..81a42bbd7 100644 --- a/examples/cpp/xlnet/xlnet_example.cc +++ b/examples/cpp/xlnet/xlnet_example.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -16,6 +16,8 @@ #include "cnpy.h" #include "src/fastertransformer/models/xlnet/Xlnet.h" +#include "src/fastertransformer/utils/nvtx_utils.h" + using namespace fastertransformer; template diff --git a/examples/onnx/multi_gpu_gpt/onnx_ckpt_convert.py b/examples/onnx/multi_gpu_gpt/onnx_ckpt_convert.py index 1852e436d..a97f1b298 100644 --- a/examples/onnx/multi_gpu_gpt/onnx_ckpt_convert.py +++ b/examples/onnx/multi_gpu_gpt/onnx_ckpt_convert.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/bart/bart.ipynb b/examples/pytorch/bart/bart.ipynb index 3af50602d..e5737655d 100644 --- a/examples/pytorch/bart/bart.ipynb +++ b/examples/pytorch/bart/bart.ipynb @@ -29,7 +29,7 @@ "import sys\n", "ROOT_DIR = os.path.abspath(\"../../../\")\n", "sys.path.append(ROOT_DIR)\n", - "lib_path = os.path.join(ROOT_DIR, './build/lib/libth_bart.so')\n", + "lib_path = os.path.join(ROOT_DIR, './build/lib/libth_transformer.so')\n", "\n", "# disable warning in notebook\n", "os.environ[\"TOKENIZERS_PARALLELISM\"] = \"false\"" diff --git a/examples/pytorch/bart/translate_example.py b/examples/pytorch/bart/translate_example.py index 0afdff0fc..3d32f9907 100644 --- a/examples/pytorch/bart/translate_example.py +++ b/examples/pytorch/bart/translate_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -350,7 +350,7 @@ def translate(args_dict): help='Probability (p) value of top p sampling in decoding. Default is 0.0. ') parser.add_argument('-d', '--inference_data_type', type=str, default="fp32", metavar='STRING', help='data type for inference (default: fp32)', choices=['fp32', 'fp16', 'bf16']) - parser.add_argument('-lib_path', '--lib_path', type=str, default="lib/libth_bart.so", metavar='STRING', + parser.add_argument('-lib_path', '--lib_path', type=str, default="lib/libth_transformer.so", metavar='STRING', help='the path of FasterTransformer pytorch bart op library.') parser.add_argument('-model_path', '--model_path', type=str, default=None, metavar='STRING', help='T5 model path.') diff --git a/examples/pytorch/bart/utils/ft_decoding.py b/examples/pytorch/bart/utils/ft_decoding.py index 6bcdca610..0f3ec00ad 100644 --- a/examples/pytorch/bart/utils/ft_decoding.py +++ b/examples/pytorch/bart/utils/ft_decoding.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/bart/utils/ft_encoder.py b/examples/pytorch/bart/utils/ft_encoder.py index 017c4d131..1bf616918 100644 --- a/examples/pytorch/bart/utils/ft_encoder.py +++ b/examples/pytorch/bart/utils/ft_encoder.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/bert/bert_example.py b/examples/pytorch/bert/bert_example.py index 467a70542..c9852c5f6 100644 --- a/examples/pytorch/bert/bert_example.py +++ b/examples/pytorch/bert/bert_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -72,7 +72,7 @@ def main(): parser.add_argument('--weight_path', type=str, default=None, help='path containing the pretrained weights') - parser.add_argument('--ths_path', type=str, default='./lib/libth_bert.so', + parser.add_argument('--ths_path', type=str, default='./lib/libth_transformer.so', help='path of the pyt_fastertransformer dynamic lib file') parser.add_argument('-thread_num', '--thread_num', type=int, default=1, metavar='int', help='Testing multithread if thread_num > 1.') diff --git a/examples/pytorch/bert/run_glue.py b/examples/pytorch/bert/run_glue.py index d4b4373b1..c5b23efb9 100644 --- a/examples/pytorch/bert/run_glue.py +++ b/examples/pytorch/bert/run_glue.py @@ -255,7 +255,7 @@ def main(): parser.add_argument("--model_type", type=str, help="ori, ths, thsext") parser.add_argument('--data_type', type=str, choices=['fp32', 'fp16', 'bf16'], default='fp32') - parser.add_argument('--ths_path', type=str, default='./lib/libth_bert.so', + parser.add_argument('--ths_path', type=str, default='./lib/libth_transformer.so', help='path of the pyt_fastertransformer dynamic lib file') parser.add_argument('--remove_padding', action='store_true', help='Remove the padding of sentences of encoder.') diff --git a/examples/pytorch/bert/run_squad.py b/examples/pytorch/bert/run_squad.py index 294582503..f04cdab0b 100644 --- a/examples/pytorch/bert/run_squad.py +++ b/examples/pytorch/bert/run_squad.py @@ -356,7 +356,7 @@ def main(): parser.add_argument("--threads", type=int, default=1, help="multiple threads for converting example to features") parser.add_argument("--model_type", type=str, help="ori, ths, thsext") parser.add_argument("--data_type", type=str, help="fp32, fp16, bf16") - parser.add_argument('--ths_path', type=str, default='./lib/libth_bert.so', + parser.add_argument('--ths_path', type=str, default='./lib/libth_transformer.so', help='path of the pyt_fastertransformer dynamic lib file') parser.add_argument('--int8_mode', type=int, default=0, metavar='NUMBER', help='int8 mode (default: 0)', choices=[0, 1, 2, 3]) diff --git a/examples/pytorch/bert/utils/checkpoint_quantization.py b/examples/pytorch/bert/utils/checkpoint_quantization.py index 15046bddc..89bb4197c 100644 --- a/examples/pytorch/bert/utils/checkpoint_quantization.py +++ b/examples/pytorch/bert/utils/checkpoint_quantization.py @@ -1,216 +1,216 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. - -import sys -import argparse -import re -import numpy as np -import torch - -ACTIVATION_AMAX_NUM = 72 -INT8O_GEMM_NUM = 8 -TRT_FUSED_MHA_AMAX_NUM = 3 -SCALE_RESERVE_NUM = 21 - -def checkpoint_quantization(init_dict, sparse, ths_path='./lib/libth_bert_int8.so', verbose=True): - print("Quantizing checkpoint ...") - torch.classes.load_library(ths_path) - weight_quantize = torch.ops.fastertransformer.weight_quantize - - def init_graph(): - layer_num = 0 - regex = re.compile('layer.\d+') - amaxTotalNum = 0 - for name, tensor_value in init_dict.items(): - if "intermediate.dense.weight" in name and amaxTotalNum == 0: - amaxTotalNum = ACTIVATION_AMAX_NUM + 9 * tensor_value.size(1) + INT8O_GEMM_NUM + TRT_FUSED_MHA_AMAX_NUM + SCALE_RESERVE_NUM - if verbose: - print("amaxTotalNum", amaxTotalNum) - print("Hidden size:", tensor_value.size(1)) - tmp = regex.findall(name) - if len(tmp) < 1: - continue - num_tmp = int(tmp[0].replace("layer.", "")) - if layer_num < num_tmp: - layer_num = num_tmp - layer_num = layer_num + 1 - #add new var for amax - for i in range(layer_num): - init_dict["bert.encoder.layer.{}.amaxList".format(i)] = torch.zeros((amaxTotalNum,), dtype=torch.float32) - return layer_num, amaxTotalNum - layer_num, amaxTotalNum = init_graph() - - kernel_name_list = ["attention.self.query", - "attention.self.key", - "attention.self.value", - "attention.output.dense", - "intermediate.dense", - "output.dense"] - - amax_name_list = ["attention.self.query._input_quantizer", - "attention.self.query._aftergemm_quantizer", - "attention.self.matmul_q_input_quantizer", - "attention.self.key._aftergemm_quantizer", - "attention.self.matmul_k_input_quantizer", - "attention.self.value._aftergemm_quantizer", - "attention.self.matmul_v_input_quantizer", - "attention.self.softmax_input_quantizer", - "attention.self.matmul_a_input_quantizer", - "attention.output.dense._input_quantizer", - "attention.output.dense._aftergemm_quantizer", - "intermediate.dense._input_quantizer", - "intermediate.dense._aftergemm_quantizer", - "output.dense._input_quantizer", - "output.dense._aftergemm_quantizer", - "special_F2Bias_scale", - ] - - int8O_gemm_weight_amax_list = [0 for i in range(INT8O_GEMM_NUM)] - int8O_gemm_weight_list = ["attention.self.query", - "attention.self.key", - "attention.self.value", - "attention.self.matmul_k_input_quantizer", - "attention.self.matmul_v_input_quantizer", - "attention.output.dense", - "intermediate.dense", - "output.dense"] - - int8O_gemm_input_amax_list = [0 for i in range(INT8O_GEMM_NUM)] - int8O_gemm_input_list = ["attention.self.query._input_quantizer", - "attention.self.key._input_quantizer", - "attention.self.value._input_quantizer", - "attention.self.matmul_q_input_quantizer", - "attention.self.matmul_a_input_quantizer", - "attention.output.dense._input_quantizer", - "intermediate.dense._input_quantizer", - "output.dense._input_quantizer"] - - int8O_gemm_output_amax_list = [0 for i in range(INT8O_GEMM_NUM)] - int8O_gemm_output_list = ["attention.self.query._aftergemm_quantizer", - "attention.self.key._aftergemm_quantizer", - "attention.self.value._aftergemm_quantizer", - "attention.self.softmax_input_quantizer", - "attention.output.dense._input_quantizer", - "attention.output.dense._aftergemm_quantizer", - "intermediate.dense._aftergemm_quantizer", - "output.dense._aftergemm_quantizer"] - - same_value_tuple_list = [("attention.self.query._input_quantizer", - "attention.self.key._input_quantizer", - "attention.self.value._input_quantizer", - "attention.output.add_residual_input_quantizer"), - ("intermediate.dense._input_quantizer", - "output.add_residual_input_quantizer")] - - factor = 1000000.0 - for i in range(layer_num): - amaxList = np.zeros([amaxTotalNum]).astype(np.float32) - amax_id = 0 - # verify some quantizers have same value. input_quantizer is per-tensor quantization - for same_value_tuple in same_value_tuple_list: - tmp_v = init_dict["bert.encoder.layer.{}.{}._amax".format(i, same_value_tuple[0])].numpy() - for same_value_name in same_value_tuple: - tmp_v_2 = init_dict["bert.encoder.layer.{}.{}._amax".format(i, same_value_name)].numpy() - assert(np.allclose(tmp_v, tmp_v_2)) - - for amax_name in amax_name_list: - if amax_name == "special_F2Bias_scale": - if i != layer_num - 1: - quant_max = init_dict["bert.encoder.layer.{}.{}._amax".format(i+1, amax_name_list[0])].item() - amax = abs(quant_max) - else: - #not used, placeholder - amax = 1.0 - amaxList[amax_id] = amax - amax_id += 1 - amaxList[amax_id] = amax/127.0 - amax_id += 1 - amaxList[amax_id] = amax/127.0/127.0 - amax_id += 1 - amaxList[amax_id] = 127.0/amax - amax_id += 1 - continue - - quant_max = init_dict["bert.encoder.layer.{}.{}._amax".format(i, amax_name)].item() - amax = abs(quant_max)#round(abs(quant_max)*factor)/factor - if amax_name in int8O_gemm_input_list: - int8O_gemm_input_amax_list[int8O_gemm_input_list.index(amax_name)] = amax - if amax_name == "attention.self.query._input_quantizer": - int8O_gemm_input_amax_list[int8O_gemm_input_list.index("attention.self.key._input_quantizer")] = amax - int8O_gemm_input_amax_list[int8O_gemm_input_list.index("attention.self.value._input_quantizer")] = amax - if amax_name in int8O_gemm_output_list: - int8O_gemm_output_amax_list[int8O_gemm_output_list.index(amax_name)] = amax - if amax_name in int8O_gemm_weight_list: - int8O_gemm_weight_amax_list[int8O_gemm_weight_list.index(amax_name)] = amax - amaxList[amax_id] = amax - amax_id += 1 - amaxList[amax_id] = amax/127.0 - amax_id += 1 - amaxList[amax_id] = amax/127.0/127.0 - amax_id += 1 - amaxList[amax_id] = 127.0/amax - amax_id += 1 - # if verbose: - # print(i, amax_name) - # print('quant_max:', quant_max) - # print('amax:', amax) - if verbose: - print("done process layer_{} activation amax".format(i)) - - #kernel amax starts from ACTIVATION_AMAX_NUM - assert amax_id == 64 - amax_id = ACTIVATION_AMAX_NUM - for kernel_id, kernel_name in enumerate(kernel_name_list): - kernel = init_dict["bert.encoder.layer.{}.{}.weight".format(i, kernel_name)].transpose(-1, -2).contiguous() - quant_max2 = init_dict["bert.encoder.layer.{}.{}._weight_quantizer._amax".format(i, kernel_name)] - amax2 = abs(quant_max2) - if (amax2.dim() == 0): - quant_max_processed = torch.full((kernel.size(1),), amax2.item(), dtype=amax2.dtype, device=amax2.device) - else: - quant_max_processed = amax2.view(-1) - kernel_processed = weight_quantize(kernel, quant_max_processed.cuda(), sparse) - init_dict["bert.encoder.layer.{}.{}.weight".format(i, kernel_name)] = kernel_processed - if kernel_name in int8O_gemm_weight_list: - int8O_gemm_weight_amax_list[int8O_gemm_weight_list.index(kernel_name)] = quant_max_processed[0] - for e in quant_max_processed: - amaxList[amax_id] = e - amax_id += 1 - # if verbose: - # print(i, kernel_name) - # print('kernel:', kernel) - # print('quant_max2:', quant_max2) - # print('quant_max_processed_:', quant_max_processed) - - #for int8O gemm deQuant - for j in range(INT8O_GEMM_NUM): - amaxList[amax_id] = (int8O_gemm_input_amax_list[j]*int8O_gemm_weight_amax_list[j])/(127.0*int8O_gemm_output_amax_list[j]) - amax_id += 1 - - #for trt fused MHA amax - #### QKV_addBias_amax - amaxList[amax_id] = np.maximum(np.maximum(amaxList[8],amaxList[16]), amaxList[24]) - amax_id += 1 - #### softmax amax - amaxList[amax_id] = amaxList[32] - amax_id += 1 - #### bmm2 amax - amaxList[amax_id] = amaxList[36] - amax_id += 1 - - init_dict["bert.encoder.layer.{}.amaxList".format(i)] = torch.tensor(amaxList, dtype=torch.float32) - if verbose: - print("done process layer_{} kernel weight".format(i)) - - print("Quantizing checkpoint done.") - return init_dict +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import sys +import argparse +import re +import numpy as np +import torch + +ACTIVATION_AMAX_NUM = 72 +INT8O_GEMM_NUM = 8 +TRT_FUSED_MHA_AMAX_NUM = 3 +SCALE_RESERVE_NUM = 21 + +def checkpoint_quantization(init_dict, sparse, ths_path='./lib/libth_transformer.so', verbose=True): + print("Quantizing checkpoint ...") + torch.classes.load_library(ths_path) + weight_quantize = torch.ops.fastertransformer.weight_quantize + + def init_graph(): + layer_num = 0 + regex = re.compile('layer.\d+') + amaxTotalNum = 0 + for name, tensor_value in init_dict.items(): + if "intermediate.dense.weight" in name and amaxTotalNum == 0: + amaxTotalNum = ACTIVATION_AMAX_NUM + 9 * tensor_value.size(1) + INT8O_GEMM_NUM + TRT_FUSED_MHA_AMAX_NUM + SCALE_RESERVE_NUM + if verbose: + print("amaxTotalNum", amaxTotalNum) + print("Hidden size:", tensor_value.size(1)) + tmp = regex.findall(name) + if len(tmp) < 1: + continue + num_tmp = int(tmp[0].replace("layer.", "")) + if layer_num < num_tmp: + layer_num = num_tmp + layer_num = layer_num + 1 + #add new var for amax + for i in range(layer_num): + init_dict["bert.encoder.layer.{}.amaxList".format(i)] = torch.zeros((amaxTotalNum,), dtype=torch.float32) + return layer_num, amaxTotalNum + layer_num, amaxTotalNum = init_graph() + + kernel_name_list = ["attention.self.query", + "attention.self.key", + "attention.self.value", + "attention.output.dense", + "intermediate.dense", + "output.dense"] + + amax_name_list = ["attention.self.query._input_quantizer", + "attention.self.query._aftergemm_quantizer", + "attention.self.matmul_q_input_quantizer", + "attention.self.key._aftergemm_quantizer", + "attention.self.matmul_k_input_quantizer", + "attention.self.value._aftergemm_quantizer", + "attention.self.matmul_v_input_quantizer", + "attention.self.softmax_input_quantizer", + "attention.self.matmul_a_input_quantizer", + "attention.output.dense._input_quantizer", + "attention.output.dense._aftergemm_quantizer", + "intermediate.dense._input_quantizer", + "intermediate.dense._aftergemm_quantizer", + "output.dense._input_quantizer", + "output.dense._aftergemm_quantizer", + "special_F2Bias_scale", + ] + + int8O_gemm_weight_amax_list = [0 for i in range(INT8O_GEMM_NUM)] + int8O_gemm_weight_list = ["attention.self.query", + "attention.self.key", + "attention.self.value", + "attention.self.matmul_k_input_quantizer", + "attention.self.matmul_v_input_quantizer", + "attention.output.dense", + "intermediate.dense", + "output.dense"] + + int8O_gemm_input_amax_list = [0 for i in range(INT8O_GEMM_NUM)] + int8O_gemm_input_list = ["attention.self.query._input_quantizer", + "attention.self.key._input_quantizer", + "attention.self.value._input_quantizer", + "attention.self.matmul_q_input_quantizer", + "attention.self.matmul_a_input_quantizer", + "attention.output.dense._input_quantizer", + "intermediate.dense._input_quantizer", + "output.dense._input_quantizer"] + + int8O_gemm_output_amax_list = [0 for i in range(INT8O_GEMM_NUM)] + int8O_gemm_output_list = ["attention.self.query._aftergemm_quantizer", + "attention.self.key._aftergemm_quantizer", + "attention.self.value._aftergemm_quantizer", + "attention.self.softmax_input_quantizer", + "attention.output.dense._input_quantizer", + "attention.output.dense._aftergemm_quantizer", + "intermediate.dense._aftergemm_quantizer", + "output.dense._aftergemm_quantizer"] + + same_value_tuple_list = [("attention.self.query._input_quantizer", + "attention.self.key._input_quantizer", + "attention.self.value._input_quantizer", + "attention.output.add_residual_input_quantizer"), + ("intermediate.dense._input_quantizer", + "output.add_residual_input_quantizer")] + + factor = 1000000.0 + for i in range(layer_num): + amaxList = np.zeros([amaxTotalNum]).astype(np.float32) + amax_id = 0 + # verify some quantizers have same value. input_quantizer is per-tensor quantization + for same_value_tuple in same_value_tuple_list: + tmp_v = init_dict["bert.encoder.layer.{}.{}._amax".format(i, same_value_tuple[0])].numpy() + for same_value_name in same_value_tuple: + tmp_v_2 = init_dict["bert.encoder.layer.{}.{}._amax".format(i, same_value_name)].numpy() + assert(np.allclose(tmp_v, tmp_v_2)) + + for amax_name in amax_name_list: + if amax_name == "special_F2Bias_scale": + if i != layer_num - 1: + quant_max = init_dict["bert.encoder.layer.{}.{}._amax".format(i+1, amax_name_list[0])].item() + amax = abs(quant_max) + else: + #not used, placeholder + amax = 1.0 + amaxList[amax_id] = amax + amax_id += 1 + amaxList[amax_id] = amax/127.0 + amax_id += 1 + amaxList[amax_id] = amax/127.0/127.0 + amax_id += 1 + amaxList[amax_id] = 127.0/amax + amax_id += 1 + continue + + quant_max = init_dict["bert.encoder.layer.{}.{}._amax".format(i, amax_name)].item() + amax = abs(quant_max)#round(abs(quant_max)*factor)/factor + if amax_name in int8O_gemm_input_list: + int8O_gemm_input_amax_list[int8O_gemm_input_list.index(amax_name)] = amax + if amax_name == "attention.self.query._input_quantizer": + int8O_gemm_input_amax_list[int8O_gemm_input_list.index("attention.self.key._input_quantizer")] = amax + int8O_gemm_input_amax_list[int8O_gemm_input_list.index("attention.self.value._input_quantizer")] = amax + if amax_name in int8O_gemm_output_list: + int8O_gemm_output_amax_list[int8O_gemm_output_list.index(amax_name)] = amax + if amax_name in int8O_gemm_weight_list: + int8O_gemm_weight_amax_list[int8O_gemm_weight_list.index(amax_name)] = amax + amaxList[amax_id] = amax + amax_id += 1 + amaxList[amax_id] = amax/127.0 + amax_id += 1 + amaxList[amax_id] = amax/127.0/127.0 + amax_id += 1 + amaxList[amax_id] = 127.0/amax + amax_id += 1 + # if verbose: + # print(i, amax_name) + # print('quant_max:', quant_max) + # print('amax:', amax) + if verbose: + print("done process layer_{} activation amax".format(i)) + + #kernel amax starts from ACTIVATION_AMAX_NUM + assert amax_id == 64 + amax_id = ACTIVATION_AMAX_NUM + for kernel_id, kernel_name in enumerate(kernel_name_list): + kernel = init_dict["bert.encoder.layer.{}.{}.weight".format(i, kernel_name)].transpose(-1, -2).contiguous() + quant_max2 = init_dict["bert.encoder.layer.{}.{}._weight_quantizer._amax".format(i, kernel_name)] + amax2 = abs(quant_max2) + if (amax2.dim() == 0): + quant_max_processed = torch.full((kernel.size(1),), amax2.item(), dtype=amax2.dtype, device=amax2.device) + else: + quant_max_processed = amax2.view(-1) + kernel_processed = weight_quantize(kernel, quant_max_processed.cuda(), sparse) + init_dict["bert.encoder.layer.{}.{}.weight".format(i, kernel_name)] = kernel_processed + if kernel_name in int8O_gemm_weight_list: + int8O_gemm_weight_amax_list[int8O_gemm_weight_list.index(kernel_name)] = quant_max_processed[0] + for e in quant_max_processed: + amaxList[amax_id] = e + amax_id += 1 + # if verbose: + # print(i, kernel_name) + # print('kernel:', kernel) + # print('quant_max2:', quant_max2) + # print('quant_max_processed_:', quant_max_processed) + + #for int8O gemm deQuant + for j in range(INT8O_GEMM_NUM): + amaxList[amax_id] = (int8O_gemm_input_amax_list[j]*int8O_gemm_weight_amax_list[j])/(127.0*int8O_gemm_output_amax_list[j]) + amax_id += 1 + + #for trt fused MHA amax + #### QKV_addBias_amax + amaxList[amax_id] = np.maximum(np.maximum(amaxList[8],amaxList[16]), amaxList[24]) + amax_id += 1 + #### softmax amax + amaxList[amax_id] = amaxList[32] + amax_id += 1 + #### bmm2 amax + amaxList[amax_id] = amaxList[36] + amax_id += 1 + + init_dict["bert.encoder.layer.{}.amaxList".format(i)] = torch.tensor(amaxList, dtype=torch.float32) + if verbose: + print("done process layer_{} kernel weight".format(i)) + + print("Quantizing checkpoint done.") + return init_dict diff --git a/examples/pytorch/bert/utils/encoder.py b/examples/pytorch/bert/utils/encoder.py index 237447f7e..cdac7ad90 100644 --- a/examples/pytorch/bert/utils/encoder.py +++ b/examples/pytorch/bert/utils/encoder.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -219,7 +219,7 @@ def to_bfloat16(self): for k, v in self.weights.items(): self.weights[k] = v.bfloat16() - def to_int8(self, sparse=False, ths_path='./lib/libth_bert.so'): + def to_int8(self, sparse=False, ths_path='./lib/libth_transformer.so'): if self._generated_weights: amax_tensor_1 = torch.Tensor(self.hidden_dim).fill_(127.) amax_tensor_2 = torch.Tensor(self.hidden_dim * 4).fill_(127.) @@ -270,7 +270,7 @@ def to_int8(self, sparse=False, ths_path='./lib/libth_bert.so'): class CustomEncoder(torch.nn.Module): def __init__(self, layer_num, head_num, head_size, weights, int8_mode=0, remove_padding=False, sparse=False, - path='./lib/libth_bert.so', tensor_para_size=1, + path='./lib/libth_transformer.so', tensor_para_size=1, pipeline_para_size=1): super().__init__() self.layer_num = layer_num diff --git a/examples/pytorch/bert/utils/huggingface_bert_convert.py b/examples/pytorch/bert/utils/huggingface_bert_convert.py index f8c2537fd..babe9e886 100644 --- a/examples/pytorch/bert/utils/huggingface_bert_convert.py +++ b/examples/pytorch/bert/utils/huggingface_bert_convert.py @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/bert/utils/huggingface_bert_fp8_convert.py b/examples/pytorch/bert/utils/huggingface_bert_fp8_convert.py new file mode 100644 index 000000000..e25060a77 --- /dev/null +++ b/examples/pytorch/bert/utils/huggingface_bert_fp8_convert.py @@ -0,0 +1,191 @@ +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + + +import argparse +import configparser +import numpy as np +from pathlib import Path +import torch + +import os +# import sys +# dir_path = os.path.dirname(os.path.realpath(__file__)) +# sys.path.append(dir_path + "/../../../..") + +from transformers import BertModel + +def get_weight_data_type(data_type): + if data_type == "fp32": + return np.float32 + elif data_type == "fp16": + return np.float16 + else: + assert False, f"Invalid weight data type {data_type}" + +def split_and_convert(args): + assert args.infer_gpu_num == 1, "only support args.infer_gpu_num == 1 now" + + saved_dir = args.saved_dir + "/%d-gpu/" % args.infer_gpu_num + + if(os.path.exists(saved_dir) == False): + os.makedirs(saved_dir) + ckpt_name = args.in_file + + torch_device = 'cuda' if torch.cuda.is_available() else 'cpu' + bert_model = BertModel.from_pretrained(args.in_file).to(torch_device) + + try: + config = configparser.ConfigParser() + config["bert"] = {} + for key in vars(args): + config["bert"][key] = f"{vars(args)[key]}" + for k, v in vars(bert_model.config).items(): + config["bert"][k] = f"{v}" + config["bert"]["weight_data_type"] = args.weight_data_type + with open((Path(saved_dir) / f"config.ini").as_posix(), 'w') as configfile: + config.write(configfile) + except Exception as e: + print(f"Fail to save the config in config.ini. due to {e}") + np_weight_data_type = get_weight_data_type(args.weight_data_type) + + ''' + huggingface_model_name_pattern = [ + "attention.output.add_local_input_quantizer._amax", + "attention.output.add_residual_input_quantizer._amax", + "attention.output.dense.bias", + "attention.output.dense._input_quantizer._amax", + "attention.output.dense.weight", + "attention.output.dense._weight_quantizer._amax", + "attention.output.LayerNorm.bias", + "attention.output.LayerNorm.weight", + "attention.self.key.bias", + "attention.self.key._input_quantizer._amax", + "attention.self.key.weight", + "attention.self.key._weight_quantizer._amax", + "attention.self.matmul_a_input_quantizer._amax", + "attention.self.matmul_k_input_quantizer._amax", + "attention.self.matmul_q_input_quantizer._amax", + "attention.self.matmul_v_input_quantizer._amax", + "attention.self.query.bias", + "attention.self.query._input_quantizer._amax", + "attention.self.query.weight", + "attention.self.query._weight_quantizer._amax", + "attention.self.value.bias", + "attention.self.value._input_quantizer._amax", + "attention.self.value.weight", + "attention.self.value._weight_quantizer._amax", + "intermediate.dense.bias", + "intermediate.dense._input_quantizer._amax", + "intermediate.dense.weight", + "intermediate.dense._weight_quantizer._amax", + "intermediate.intermediate_act_fn_input_quantizer._amax", + "output.add_local_input_quantizer._amax", + "output.add_residual_input_quantizer._amax", + "output.dense.bias", + "output.dense._input_quantizer._amax", + "output.dense.weight", + "output.dense._weight_quantizer._amax", + "output.LayerNorm.bias", + "output.LayerNorm.weight", + ] + ''' + + model = {} + for key, param in bert_model.named_parameters(): + model[key] = param + + for key in model: + if key == "bert.embeddings.word_embeddings.weight" or \ + key == "bert.embeddings.position_embeddings.weight" or \ + key == "bert.embeddings.token_type_embeddings.weight": + weight = model[key] + weight.detach().cpu().numpy().astype(np_weight_data_type).tofile(f"{saved_dir}/bert.{key}.bin") + print(f"convert {key}") + elif key.find("self.query") == -1 and key.find("self.key") == -1 and key.find("self.value") == -1: + # If not query, key and values, we don't do concat or other operations. Convert them directly. + weight = model[key] + if weight.dim() == 2: + weight = weight.transpose(1, 0) + weight.detach().cpu().numpy().astype(np_weight_data_type).tofile(f"{saved_dir}/bert.{key}.bin") + print(f"convert {key}") + elif key.find("self.query.bias") != -1: + q_name = key + k_name = key.replace("query", "key") + v_name = key.replace("query", "value") + q_bias = model[q_name] + k_bias = model[k_name] + v_bias = model[v_name] + qkv_bias = torch.cat([q_bias, k_bias, v_bias]) + new_name = key.replace("query", "query_key_value") + qkv_bias.detach().cpu().numpy().astype(np_weight_data_type).tofile(f"{saved_dir}/bert.{new_name}.bin") + print(f"convert {new_name}") + elif key.find("self.query._input_quantizer") != -1: + new_name = key.replace("query", "query_key_value") + model[key].detach().cpu().numpy().astype(np_weight_data_type).tofile(f"{saved_dir}/bert.{new_name}.bin") + print(f"convert {new_name}") + elif key.find("self.query.weight") != -1: + q_name = key + k_name = key.replace("query", "key") + v_name = key.replace("query", "value") + q_weight = model[q_name].transpose(1, 0) + k_weight = model[k_name].transpose(1, 0) + v_weight = model[v_name].transpose(1, 0) + qkv_weight = torch.cat([q_weight, k_weight, v_weight], axis=-1) + new_name = key.replace("query", "query_key_value") + qkv_weight.detach().cpu().numpy().astype(np_weight_data_type).tofile(f"{saved_dir}/bert.{new_name}.bin") + print(f"convert {new_name}") + elif key.find("self.query._weight_quantizer") != -1: + # PER CHANNEL + ''' + q_name = key + k_name = key.replace("query", "key") + v_name = key.replace("query", "value") + q_quantizer = model[q_name] + k_quantizer = model[k_name] + v_quantizer = model[v_name] + qkv_quantizer = torch.cat([q_quantizer, k_quantizer, v_quantizer]) + new_name = key.replace("query", "query_key_value") + qkv_quantizer.detach().cpu().numpy().astype(np_weight_data_type).tofile(f"{saved_dir}/{new_name}.bin") + # print(f"name: {new_name}, {qkv_quantizer.shape}") + ''' + + # PER TENSOR, the checkpoint has separate q, k, v quantizers, need to choose max one + q_name = key + k_name = key.replace("query", "key") + v_name = key.replace("query", "value") + q_quantizer = model[q_name].view(1) + k_quantizer = model[k_name].view(1) + v_quantizer = model[v_name].view(1) + qkv_quantizer = torch.max(torch.cat([q_quantizer, k_quantizer, v_quantizer])) + new_name = key.replace("query", "query_key_value") + qkv_quantizer.detach().cpu().numpy().astype(np_weight_data_type).tofile(f"{saved_dir}/bert.{new_name}.bin") + print(f"convert {new_name}") + +if __name__ == "__main__": + parser = argparse.ArgumentParser(formatter_class=argparse.RawTextHelpFormatter) + parser.add_argument('-saved_dir', '-o', type=str, help='file name of output file', required=True) + parser.add_argument('-in_file', '-i', type=str, help='file name of input checkpoint file', required=True) + # parser.add_argument('-trained_gpu_num', '-t_g', type=int, help='How many gpus for inference', default=1) + parser.add_argument('-infer_gpu_num', '-i_g', type=int, help='How many gpus for inference', default=1) + # parser.add_argument("-processes", "-p", type=int, help="How many processes to spawn for conversion (default: 4)", default=4) + parser.add_argument("-weight_data_type", type=str, default="fp32", choices=["fp32", "fp16"]) + + args = parser.parse_args() + print("\n=============== Argument ===============") + for key in vars(args): + print("{}: {}".format(key, vars(args)[key])) + print("========================================") + + split_and_convert(args) diff --git a/examples/pytorch/bert/utils/update_bert_config.py b/examples/pytorch/bert/utils/update_bert_config.py index cf3df6a67..76f88698e 100644 --- a/examples/pytorch/bert/utils/update_bert_config.py +++ b/examples/pytorch/bert/utils/update_bert_config.py @@ -1,5 +1,5 @@ #!/usr/bin/env python3 -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/decoder/decoder_example.py b/examples/pytorch/decoder/decoder_example.py index b62b19f71..f0715d68e 100644 --- a/examples/pytorch/decoder/decoder_example.py +++ b/examples/pytorch/decoder/decoder_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -43,11 +43,11 @@ def main(): help='size per head') parser.add_argument('--step', type=int, default=0, help='decoding step number') - parser.add_argument('--decoder_ths_path', type=str, default='./lib/libth_decoder.so', + parser.add_argument('--decoder_ths_path', type=str, default='./lib/libth_transformer.so', help='path of the pyt_fastertransformer dynamic lib file') parser.add_argument('--time', action='store_true', help='test the time or not.') - parser.add_argument('--ths_path', type=str, default='./lib/libpyt_fastertransformer.so', + parser.add_argument('--ths_path', type=str, default='./lib/libth_transformer.so', help='path of the pyt_fastertransformer dynamic lib file') parser.add_argument('-d', '--data_type', type=str, default="fp32", metavar='STRING', help='data type (default: fp32)', choices=['fp32', 'fp16', 'bf16']) diff --git a/examples/pytorch/decoder/utils/decoder.py b/examples/pytorch/decoder/utils/decoder.py index 66523dc48..228df8b57 100644 --- a/examples/pytorch/decoder/utils/decoder.py +++ b/examples/pytorch/decoder/utils/decoder.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/decoder/utils/ft_decoder.py b/examples/pytorch/decoder/utils/ft_decoder.py index 392e73ada..7582a13c3 100644 --- a/examples/pytorch/decoder/utils/ft_decoder.py +++ b/examples/pytorch/decoder/utils/ft_decoder.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/decoding/decoding_example.py b/examples/pytorch/decoding/decoding_example.py index fd85cd3df..0e510f2f6 100644 --- a/examples/pytorch/decoding/decoding_example.py +++ b/examples/pytorch/decoding/decoding_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -54,9 +54,9 @@ def main(): help='test the time or not.') parser.add_argument('--use_pretrained', action='store_true', help='use pretrained weights or not.') - parser.add_argument('--decoding_ths_path', type=str, default='./lib/libth_decoding.so', + parser.add_argument('--decoding_ths_path', type=str, default='./lib/libth_transformer.so', help='path of the pyt_fastertransformer dynamic lib file') - parser.add_argument('--decoder_ths_path', type=str, default='./lib/libth_decoder.so', + parser.add_argument('--decoder_ths_path', type=str, default='./lib/libth_transformer.so', help='path of the pyt_fastertransformer dynamic lib file') parser.add_argument('-diversity_rate', '--beam_search_diversity_rate', type=float, default=0.0, metavar='NUMBER', help='deviersity rate of beam search. default is 0. When diversity rate = 0, it is equivalent to the naive beam search.') diff --git a/examples/pytorch/decoding/translate_example.py b/examples/pytorch/decoding/translate_example.py index 26948dbfe..f0b3b1968 100644 --- a/examples/pytorch/decoding/translate_example.py +++ b/examples/pytorch/decoding/translate_example.py @@ -36,11 +36,11 @@ parser.add_argument('--data_type', type=str, choices=['fp32', 'fp16', 'bf16'], default='fp32') parser.add_argument('--model_path', type=str, default='./pytorch/translation/models/averaged-10-epoch.pt', help='path for model checkpoint') -parser.add_argument('--decoding_ths_path', type=str, default='./lib/libth_decoding.so', +parser.add_argument('--decoding_ths_path', type=str, default='./lib/libth_transformer.so', help='path of the pyt_fastertransformer dynamic lib file') -parser.add_argument('--decoder_ths_path', type=str, default='./lib/libth_decoder.so', +parser.add_argument('--decoder_ths_path', type=str, default='./lib/libth_transformer.so', help='path of the pyt_fastertransformer dynamic lib file') -parser.add_argument('--encoder_ths_path', type=str, default='./lib/libth_encoder.so', +parser.add_argument('--encoder_ths_path', type=str, default='./lib/libth_transformer.so', help='path of the pyt_fastertransformer dynamic lib file') parser.add_argument('--input_file', type=str, default='../examples/tensorflow/decoding/utils/translation/test.en', help='input file path') diff --git a/examples/pytorch/decoding/utils/__init__.py b/examples/pytorch/decoding/utils/__init__.py index 74183d081..295b5bf3c 100644 --- a/examples/pytorch/decoding/utils/__init__.py +++ b/examples/pytorch/decoding/utils/__init__.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/decoding/utils/bleu_score.py b/examples/pytorch/decoding/utils/bleu_score.py index 5c79235cf..19aee23d5 100644 --- a/examples/pytorch/decoding/utils/bleu_score.py +++ b/examples/pytorch/decoding/utils/bleu_score.py @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/decoding/utils/decoding.py b/examples/pytorch/decoding/utils/decoding.py index 81d565835..a10147768 100644 --- a/examples/pytorch/decoding/utils/decoding.py +++ b/examples/pytorch/decoding/utils/decoding.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -191,7 +191,7 @@ def finalize(beam_size, output_ids, parent_ids, out_seq_lens, end_id, max_seq_le output_ids = torch.reshape(output_ids, shape) parent_ids = torch.reshape(parent_ids, shape) if output_ids.is_cuda: - torch.classes.load_library("./lib/libth_gather_tree.so") + torch.classes.load_library("./lib/libth_transformer.so") batch_size = output_ids.shape[1] end_ids = end_id * torch.ones(batch_size, dtype=torch.int32, device=output_ids.device) ids = torch.ops.fastertransformer.gather_tree(output_ids.to(torch.int32), parent_ids.to(torch.int32), out_seq_lens.to(torch.int32), end_ids) diff --git a/examples/pytorch/decoding/utils/ft_decoding.py b/examples/pytorch/decoding/utils/ft_decoding.py index f87f12b55..53e0a3b4a 100644 --- a/examples/pytorch/decoding/utils/ft_decoding.py +++ b/examples/pytorch/decoding/utils/ft_decoding.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/decoding/utils/translation_model.py b/examples/pytorch/decoding/utils/translation_model.py index 050c27aa0..74ac58631 100644 --- a/examples/pytorch/decoding/utils/translation_model.py +++ b/examples/pytorch/decoding/utils/translation_model.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/decoding/utils/translator.py b/examples/pytorch/decoding/utils/translator.py index b0fc29508..2e86f4cb1 100644 --- a/examples/pytorch/decoding/utils/translator.py +++ b/examples/pytorch/decoding/utils/translator.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/encoder/encoder_example.py b/examples/pytorch/encoder/encoder_example.py index 0bbb7d528..b4fd74ecd 100644 --- a/examples/pytorch/encoder/encoder_example.py +++ b/examples/pytorch/encoder/encoder_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -52,7 +52,7 @@ def main(): help='Remove the padding of sentences of encoder.') parser.add_argument('--allow_gemm_test', action='store_true', help='Whether allow gemm test inside FT.') - parser.add_argument('--ths_path', type=str, default='./lib/libth_encoder.so', + parser.add_argument('--ths_path', type=str, default='./lib/libth_transformer.so', help='path of the pyt_fastertransformer dynamic lib file') args = parser.parse_args() encoder_example(vars(args)) diff --git a/examples/pytorch/encoder/utils/ft_encoder.py b/examples/pytorch/encoder/utils/ft_encoder.py index 04a8061d7..693bee52e 100644 --- a/examples/pytorch/encoder/utils/ft_encoder.py +++ b/examples/pytorch/encoder/utils/ft_encoder.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -91,7 +91,7 @@ def to_bfloat16(self): class CustomEncoder(torch.nn.Module): def __init__(self, layer_num, head_num, head_size, weights, - remove_padding=False, allow_gemm_test=False, path='./lib/libth_encoder.so', embedding=None): + remove_padding=False, allow_gemm_test=False, path='./lib/libth_transformer.so', embedding=None): super().__init__() self.layer_num = layer_num self.remove_padding = remove_padding diff --git a/examples/pytorch/gpt/bloom_lambada.py b/examples/pytorch/gpt/bloom_lambada.py index a2e9ee649..937ecbedd 100644 --- a/examples/pytorch/gpt/bloom_lambada.py +++ b/examples/pytorch/gpt/bloom_lambada.py @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -138,7 +138,7 @@ def get_args(): help='A file path of a pretrained tokenizer or a checkpoint directory ' 'of HF pretrained model.') group.add_argument( - '--lib-path', type=str, metavar='PATH', default='./lib/libth_parallel_gpt.so', + '--lib-path', type=str, metavar='PATH', default='./lib/libth_transformer.so', help='A FT library path to load `FasterTransformer.ParallelGptOp`') group.add_argument( '--test-hf', action='store_true', @@ -162,6 +162,11 @@ def get_args(): choices=[None, 'fp32', 'fp16'], help='The data type of FT checkpoint. If None, it will be retrieved ' 'from the config file in the checkpoint directory.') + group.add_argument( + '--int8_mode', type=int, default=0, choices=[0, 1], + help='The level of quantization to perform.' + ' 0: No quantization. All computation in data_type' + ' 1: Quantize weights to int8, all compute occurs in fp16/bf16. Not supported when data_type is fp32') args = parser.parse_args() print('\n=================== Arguments ===================') @@ -233,7 +238,8 @@ def get_model_and_tokenizer(args: argparse.Namespace): model_args.update(dict( lib_path=args.lib_path, pipeline_para_size=args.pipeline_para_size, - shared_contexts_ratio=args.shared_contexts_ratio + shared_contexts_ratio=args.shared_contexts_ratio, + int8_mode=args.int8_mode )) print('[FT][INFO] Load BLOOM model') diff --git a/examples/pytorch/gpt/evaluate_zeroshot_gpt.py b/examples/pytorch/gpt/evaluate_zeroshot_gpt.py index 42e02d14e..29ab55492 100644 --- a/examples/pytorch/gpt/evaluate_zeroshot_gpt.py +++ b/examples/pytorch/gpt/evaluate_zeroshot_gpt.py @@ -324,7 +324,7 @@ def main(): # Set up model and load checkpoint. model = GPT(args.num_attention_heads, (int)(args.hidden_size / args.num_attention_heads), args.padded_vocab_size, tokenzier.eod, tokenzier.eod, - args.num_layers, args.seq_length, 1, 1, "lib/libth_gpt.so", weights_data_type=args.weights_data_type) + args.num_layers, args.seq_length, 1, 1, "lib/libth_transformer.so", weights_data_type=args.weights_data_type) if not model.load(ckpt_path=args.ckpt_path): print("[ERROR] Checkpoint file not found at {}.".format(args.ckpt_path)) diff --git a/examples/pytorch/gpt/gpt_example.py b/examples/pytorch/gpt/gpt_example.py index 5c23fb14c..b67b7c29f 100644 --- a/examples/pytorch/gpt/gpt_example.py +++ b/examples/pytorch/gpt/gpt_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # Copyright (c) 2021, NAVER Corp. Authored by CLOVA. # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -20,14 +20,17 @@ import os import sys import argparse +import configparser import timeit import torch import numpy as np dir_path = os.path.dirname(os.path.realpath(__file__)) sys.path.append(dir_path + "/../../..") +from examples.pytorch.gpt.utils.gpt_fp8 import GPTFp8 from examples.pytorch.gpt.utils.gpt import GPT, GPTWeights import examples.pytorch.gpt.utils.gpt_token_encoder as encoder +from utils import word_list def main(): parser = argparse.ArgumentParser() @@ -59,7 +62,7 @@ def main(): help='pipeline parallel size') parser.add_argument('--ckpt_path', type=str, default='../models/megatron-models/c-model/345m/1-gpu', help='path to the checkpoint file.') - parser.add_argument('--lib_path', type=str, default='./lib/libth_gpt.so', + parser.add_argument('--lib_path', type=str, default='./lib/libth_transformer.so', help='path to the pyt_fastertransformer dynamic lib file.') parser.add_argument('--vocab_file', type=str, default="../models/gpt2-vocab.json", help='vocabulary file.') @@ -73,9 +76,11 @@ def main(): help='max batch size.') parser.add_argument('--repetition_penalty', type=float, default=1., help='repetition penalty') + parser.add_argument('--min_length', type=int, default=0, + help='A minimum number of tokens to generate') parser.add_argument('--max_seq_len', type=int, default=1024, help='max sequence length for position embedding table.') - parser.add_argument('--inference_data_type', '--data_type', type=str, choices=['fp32', 'fp16', 'bf16'], default='fp32') + parser.add_argument('--inference_data_type', '--data_type', type=str, choices=['fp32', 'fp16', 'bf16', 'fp8'], default='fp32') parser.add_argument('--time', action='store_true', help='whether or not to measure time elapsed.') parser.add_argument('--sample_input_file', type=str, default=None, @@ -84,8 +89,14 @@ def main(): help='path to sample output file.') parser.add_argument('--enable_random_seed', action='store_true', help='is enable the random seed.') + parser.add_argument('--skip_end_tokens', dest='skip_end_tokens', action='store_true', + help='Whether to remove or not end tokens in outputs.') + parser.add_argument('--no_detokenize', dest='detokenize', action='store_false', + help='Skip detokenizing output token ids.') parser.add_argument('--sparse', action='store_true', dest='sparse', help='Enable sparse matrix multiplication. (Need SM 8.0 or 8.6 and SPARSITY_SUPPORT=ON)') + parser.add_argument('--use_jieba_tokenizer', action='store_true', + help='use JiebaBPETokenizer as tokenizer.') parser.add_argument( '--weights_data_type', type=str, @@ -99,8 +110,65 @@ def main(): ' 1: return the cumulative log probs of generated sequences' ' 2: return the cumulative log probs of sequences') + parser.add_argument('--banned_words', + type=str, + default="", + help='A comma separated list of tokens that should never be generated. Everything between the commas will' + ' be tokenized and converted to token ids that will be banned.' + ' Note that spaces before and after commas are included in tokenization.' + ' An example highlighting this importance is that "the" and " the" are' + ' two separate tokens some vocabularies.' + ' Therefore, do ban a certain phrase, we would need to specify all tokens' + ' in the vocabulary that include the phrase.' + ' Example use: --banned_words "the, the,a,boy". This will ban the tokens "the", " the", "a" and "boy".' + ' We can also use a pipe "|" to ban different tokens for different sentences in a batch.' + ' Example: --banned_words "the, the|a,boy" will ban the tokens "the" and " the" in output sentence 1 and' + ' ban the tokens "a" and "boy" in output sentence 2. When using this mode, we must specify a set of tokens to ban' + ' for each sentence in the batch.', + ) + args = parser.parse_args() + ckpt_config = configparser.ConfigParser() + ckpt_config_path = os.path.join(args.ckpt_path, 'config.ini') + if os.path.isfile(ckpt_config_path): + ckpt_config.read(ckpt_config_path) + if 'gpt' in ckpt_config.keys(): + for args_key, config_key, func in [ + ('layer_num', 'num_layer', ckpt_config.getint), + ('max_seq_len', 'max_pos_seq_len', ckpt_config.getint), + ('weights_data_type', 'weight_data_type', ckpt_config.get), + ]: + if config_key in ckpt_config['gpt'].keys(): + prev_val = args.__dict__[args_key] + args.__dict__[args_key] = func('gpt', config_key) + print('Loading {} from config.ini, previous: {}, current: {}'.format( + args_key, prev_val, args.__dict__[args_key])) + else: + print('Not loading {} from config.ini'.format(args_key)) + for key in ['head_num', 'size_per_head', 'tensor_para_size']: + if key in args.__dict__: + prev_val = args.__dict__[key] + args.__dict__[key] = ckpt_config.getint('gpt', key) + print('Loading {} from config.ini, previous: {}, current: {}'.format( + key, prev_val, args.__dict__[key])) + else: + print('Not loading {} from config.ini'.format(key)) + if 'structure' in ckpt_config.keys(): + gpt_with_moe = ckpt_config.getboolean('structure', 'gpt_with_moe') + expert_num = ckpt_config.getint('structure', 'expert_num') + moe_layer_index_str = ckpt_config.get('structure', 'moe_layers') + if len(moe_layer_index_str) <= 2: + moe_layer_index = [] + else: + moe_layer_index = [int(n) for n in moe_layer_index_str[1:-1].replace(' ', '').split(',')] + moe_k = 1 + else: + gpt_with_moe = False + expert_num = 0 + moe_layer_index = [] + moe_k = 0 + layer_num = args.layer_num output_len = args.output_len head_num = args.head_num @@ -119,6 +187,7 @@ def main(): max_batch_size = args.max_batch_size max_seq_len = args.max_seq_len repetition_penalty = args.repetition_penalty + min_length = args.min_length return_cum_log_probs = args.return_cum_log_probs return_output_length = return_cum_log_probs > 0 @@ -127,7 +196,16 @@ def main(): print("{}: {}".format(arg, getattr(args, arg))) print("=========================================\n") - enc = encoder.get_encoder(args.vocab_file, args.merges_file) + if args.use_jieba_tokenizer: + from examples.pytorch.gpt.utils.tokenizer import JiebaBPETokenizer + enc = JiebaBPETokenizer(args.vocab_file) + else: + enc = encoder.get_encoder(args.vocab_file, args.merges_file) + bad_words_list=None + if args.banned_words: + batch_banned_words = args.banned_words.split("|") + banned_words = [[banned_words_for_batch] for banned_words_for_batch in batch_banned_words] + bad_words_list = torch.tensor(word_list.to_word_list_format(banned_words, enc)).to("cuda") # Inputs contexts = [] @@ -150,15 +228,24 @@ def main(): start_lengths = torch.IntTensor(start_lengths) if args.enable_random_seed == True: - random_seed_tensor = torch.randint(0, 10000, size=[max_batch_size], dtype=torch.int64) + random_seed_tensor = torch.randint(0, 10000, size=[batch_size], dtype=torch.int64) else: - random_seed_tensor = torch.zeros([max_batch_size], dtype=torch.int64) + random_seed_tensor = torch.zeros([batch_size], dtype=torch.int64) # Prepare model. - gpt = GPT(head_num, size_per_head, vocab_size, start_id, end_id, layer_num, + if args.inference_data_type == 'fp8': + gpt = GPTFp8(head_num, size_per_head, vocab_size, start_id, end_id, layer_num, + max_seq_len, tensor_para_size, pipeline_para_size, lib_path=args.lib_path, + ckpt_path=args.ckpt_path, weights_data_type=args.weights_data_type) + else: + gpt = GPT(head_num, size_per_head, vocab_size, start_id, end_id, layer_num, max_seq_len, tensor_para_size, pipeline_para_size, lib_path=args.lib_path, inference_data_type=args.inference_data_type, - weights_data_type=args.weights_data_type) + weights_data_type=args.weights_data_type, + gpt_with_moe=gpt_with_moe, + expert_num=expert_num, + moe_k=moe_k, + moe_layer_index=moe_layer_index) if not gpt.load(ckpt_path=args.ckpt_path): print("[WARNING] Checkpoint file not found. Model loading is skipped.") if args.sparse: @@ -166,19 +253,22 @@ def main(): with torch.no_grad(): # Generate tokens. - tokens_batch = gpt(start_ids, - start_lengths, - output_len, - beam_width, - top_k * torch.ones(size=[max_batch_size], dtype=torch.int32), - top_p * torch.ones(size=[max_batch_size], dtype=torch.float32), - beam_search_diversity_rate * torch.ones(size=[max_batch_size], dtype=torch.float32), - temperature * torch.ones(size=[max_batch_size], dtype=torch.float32), - len_penalty * torch.ones(size=[max_batch_size], dtype=torch.float32), - repetition_penalty * torch.ones(size=[max_batch_size], dtype=torch.float32), - random_seed_tensor, - return_output_length, - return_cum_log_probs) + tokens_batch = gpt( + start_ids=start_ids, + start_lengths=start_lengths, + output_len=output_len, + beam_width=beam_width, + top_k=top_k * torch.ones(size=[batch_size], dtype=torch.int32), + top_p=top_p * torch.ones(size=[batch_size], dtype=torch.float32), + beam_search_diversity_rate=beam_search_diversity_rate * torch.ones(size=[batch_size], dtype=torch.float32), + temperature=temperature * torch.ones(size=[batch_size], dtype=torch.float32), + len_penalty=len_penalty * torch.ones(size=[batch_size], dtype=torch.float32), + repetition_penalty=repetition_penalty * torch.ones(size=[batch_size], dtype=torch.float32), + min_length=min_length * torch.ones(size=[batch_size], dtype=torch.int32), + random_seed=random_seed_tensor, + bad_words_list=bad_words_list, + return_output_length=return_output_length, + return_cum_log_probs=return_cum_log_probs) if return_cum_log_probs > 0: tokens_batch, _, cum_log_probs = tokens_batch print('[INFO] Log probs of sentences:', cum_log_probs) @@ -189,7 +279,10 @@ def main(): for i, (context, tokens) in enumerate(zip(contexts, tokens_batch)): for beam_id in range(beam_width): token = tokens[beam_id][start_lengths[i]:] # exclude context input from the output - output = enc.decode(token) + if args.skip_end_tokens: + print('skip eos', len(tokens[beam_id]), start_lengths[i], len(token), len(token[token != end_id])) + token = token[token != end_id] + output = enc.decode(token) if args.detokenize else ' '.join(str(t) for t in token.tolist()) outputs.append(output) print(f"[INFO] batch {i}, beam {beam_id}: \n[Context]\n{context}\n\n[Output]\n{output}\n") @@ -203,37 +296,43 @@ def main(): iterations = 10 # warmup for i in range(iterations): - tokens_batch = gpt(start_ids, - start_lengths, - output_len, - beam_width, - top_k * torch.ones(size=[max_batch_size], dtype=torch.int32), - top_p * torch.ones(size=[max_batch_size], dtype=torch.float32), - beam_search_diversity_rate * torch.ones(size=[max_batch_size], dtype=torch.float32), - temperature * torch.ones(size=[max_batch_size], dtype=torch.float32), - len_penalty * torch.ones(size=[max_batch_size], dtype=torch.float32), - repetition_penalty * torch.ones(size=[max_batch_size], dtype=torch.float32), - random_seed_tensor, - return_output_length, - return_cum_log_probs) + tokens_batch = gpt( + start_ids=start_ids, + start_lengths=start_lengths, + output_len=output_len, + beam_width=beam_width, + top_k=top_k * torch.ones(size=[batch_size], dtype=torch.int32), + top_p=top_p * torch.ones(size=[batch_size], dtype=torch.float32), + beam_search_diversity_rate=beam_search_diversity_rate * torch.ones(size=[batch_size], dtype=torch.float32), + temperature=temperature * torch.ones(size=[batch_size], dtype=torch.float32), + len_penalty=len_penalty * torch.ones(size=[batch_size], dtype=torch.float32), + repetition_penalty=repetition_penalty * torch.ones(size=[batch_size], dtype=torch.float32), + min_length=min_length * torch.ones(size=[batch_size], dtype=torch.int32), + random_seed=random_seed_tensor, + bad_words_list=bad_words_list, + return_output_length=return_output_length, + return_cum_log_probs=return_cum_log_probs) batch_num = 0 token_num = 0 time = timeit.default_timer() for i in range(iterations): - tokens_batch = gpt(start_ids, - start_lengths, - output_len, - beam_width, - top_k * torch.ones(size=[max_batch_size], dtype=torch.int32), - top_p * torch.ones(size=[max_batch_size], dtype=torch.float32), - beam_search_diversity_rate * torch.ones(size=[max_batch_size], dtype=torch.float32), - temperature * torch.ones(size=[max_batch_size], dtype=torch.float32), - len_penalty * torch.ones(size=[max_batch_size], dtype=torch.float32), - repetition_penalty * torch.ones(size=[max_batch_size], dtype=torch.float32), - random_seed_tensor, - return_output_length, - return_cum_log_probs) + tokens_batch = gpt( + start_ids=start_ids, + start_lengths=start_lengths, + output_len=output_len, + beam_width=beam_width, + top_k=top_k * torch.ones(size=[batch_size], dtype=torch.int32), + top_p=top_p * torch.ones(size=[batch_size], dtype=torch.float32), + beam_search_diversity_rate=beam_search_diversity_rate * torch.ones(size=[batch_size], dtype=torch.float32), + temperature=temperature * torch.ones(size=[batch_size], dtype=torch.float32), + len_penalty=len_penalty * torch.ones(size=[batch_size], dtype=torch.float32), + repetition_penalty=repetition_penalty * torch.ones(size=[batch_size], dtype=torch.float32), + min_length=min_length * torch.ones(size=[batch_size], dtype=torch.int32), + random_seed=random_seed_tensor, + bad_words_list=bad_words_list, + return_output_length=return_output_length, + return_cum_log_probs=return_cum_log_probs) batch_num += 1 for j, tokens in enumerate(tokens_batch): token_num += tokens.shape[-1] - start_lengths[j] diff --git a/examples/pytorch/gpt/gpt_summarization.py b/examples/pytorch/gpt/gpt_summarization.py index 5d32e5c92..1780df1a7 100644 --- a/examples/pytorch/gpt/gpt_summarization.py +++ b/examples/pytorch/gpt/gpt_summarization.py @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -18,6 +18,7 @@ import os import numpy as np +import sys import torch from datasets import load_dataset, load_metric from tqdm import tqdm @@ -27,7 +28,7 @@ from utils import gpt_decoder from utils import profiler from utils.parallel_gpt import ParallelGPT - +from utils.gpt_fp8 import GPTFp8 def main(): parser = argparse.ArgumentParser() @@ -37,12 +38,12 @@ def main(): default='/models/GPT/HF/gpt2-xl/') parser.add_argument('--summarize', action='store_true') parser.add_argument('--test_hf', action='store_true') - parser.add_argument('--data_type', type=str, choices=['fp32', 'fp16', 'bf16'], default='fp32') + parser.add_argument('--data_type', type=str, choices=['fp32', 'fp16', 'bf16', 'fp8'], default='fp32') parser.add_argument("--cache_path", type=str, default="/workdir/datasets/ccdv/") parser.add_argument("--max_ite", type=int, default=20) parser.add_argument("--ft_use_hf_config", action="store_true", help="use the hyper-parameters from the hf model") - parser.add_argument('--lib_path', type=str, default='./lib/libth_parallel_gpt.so', + parser.add_argument('--lib_path', type=str, default='./lib/libth_transformer.so', help='path to the pyt_fastertransformer dynamic lib file.') parser.add_argument('--tensor_para_size', type=int, default=1, help='tensor parallel size') @@ -108,6 +109,10 @@ def main(): else: top_k = 1 output_len = 256 + + if args.data_type == "fp8": + top_k = 1 + top_p = 0.0 random_seed = 5 temperature = 1 @@ -115,6 +120,8 @@ def main(): max_batch_size = 1 repetition_penalty = 1 vocab_size = 50257 + if not args.ft_use_hf_config and ft_config.has_option('gpt', 'vocab_size'): + vocab_size = ft_config.getint('gpt', 'vocab_size', fallback=vocab_size) tensor_para_size = args.tensor_para_size pipeline_para_size = args.pipeline_para_size lib_path = args.lib_path @@ -134,7 +141,7 @@ def main(): print(f"lib_path: {lib_path}") print(f"ckpt_path: {ckpt_path}") print(f"hf_config: {hf_config}") - + infer_decode_args = dict( beam_width=1, top_k=top_k * torch.ones(max_batch_size, dtype=torch.int32), @@ -144,38 +151,45 @@ def main(): random_seed=random_seed * torch.ones(max_batch_size, dtype=torch.int64) ) - if not args.use_gpt_decoder_ops: - gpt = ParallelGPT(head_num, size_per_head, vocab_size, start_id, end_id, layer_num, - max_seq_len, tensor_para_size, pipeline_para_size, lib_path=lib_path, - inference_data_type=args.data_type, int8_mode=args.int8_mode, - weights_data_type=args.weights_data_type) - if not gpt.load(ckpt_path=ckpt_path): - print("[WARNING] Checkpoint file not found. Model loading is skipped.") + random_seed_tensor = random_seed * torch.ones([max_batch_size], dtype=torch.int64) + + if args.data_type == 'fp8': + gpt = GPTFp8(head_num, size_per_head, vocab_size, start_id, end_id, layer_num, + max_seq_len, tensor_para_size, pipeline_para_size, lib_path=lib_path, + ckpt_path=ckpt_path, int8_mode=0, weights_data_type=args.weights_data_type) else: - gpt = gpt_decoder.Gpt( - num_heads=head_num, - size_per_head=size_per_head, - num_layers=layer_num, - vocab_size=vocab_size, - start_id=start_id, - end_id=end_id, - tensor_para_size=tensor_para_size, - pipeline_para_size=pipeline_para_size, - lib_path=lib_path, - max_seq_len=max_seq_len, - int8_mode = args.int8_mode, - inference_data_type=args.data_type, - weights_data_type=args.weights_data_type, - use_fp32_to_compute_logit=args.use_fp32_to_compute_logit) - gpt.load(ckpt_path, args.data_type) - - if (test_hf and summarize) or not summarize: - model = GPT2LMHeadModel.from_pretrained(hf_model_location) - model.cuda() - if args.data_type == 'fp16': - model.half() - elif args.data_type == 'bf16': - model.bfloat16() + if not args.use_gpt_decoder_ops: + gpt = ParallelGPT(head_num, size_per_head, vocab_size, start_id, end_id, layer_num, + max_seq_len, tensor_para_size, pipeline_para_size, lib_path=lib_path, + inference_data_type=args.data_type, int8_mode=args.int8_mode, + weights_data_type=args.weights_data_type) + if not gpt.load(ckpt_path=ckpt_path): + print("[WARNING] Checkpoint file not found. Model loading is skipped.") + else: + gpt = gpt_decoder.Gpt( + num_heads=head_num, + size_per_head=size_per_head, + num_layers=layer_num, + vocab_size=vocab_size, + start_id=start_id, + end_id=end_id, + tensor_para_size=tensor_para_size, + pipeline_para_size=pipeline_para_size, + lib_path=lib_path, + max_seq_len=max_seq_len, + int8_mode = args.int8_mode, + inference_data_type=args.data_type, + weights_data_type=args.weights_data_type, + use_fp32_to_compute_logit=args.use_fp32_to_compute_logit) + gpt.load(ckpt_path, args.data_type) + + if (test_hf and summarize) or not summarize: + model = GPT2LMHeadModel.from_pretrained(hf_model_location) + model.cuda() + if args.data_type == 'fp16': + model.half() + elif args.data_type == 'bf16': + model.bfloat16() def summarize_ft_e2e(datapoint): if summarize: @@ -194,9 +208,9 @@ def summarize_ft_e2e(datapoint): with torch.no_grad(): output, ft_output_len = gpt(line_encoded, torch.IntTensor([len(line_encoded[0])]), - output_len, - return_output_length=True, - **infer_decode_args) + output_len, + return_output_length=True, + **infer_decode_args) tokens = output[0][0][len(line_encoded[0]):ft_output_len[0]].cpu().numpy() diff --git a/examples/pytorch/gpt/lambada_task_example.py b/examples/pytorch/gpt/lambada_task_example.py index 83f20d942..882ce5030 100644 --- a/examples/pytorch/gpt/lambada_task_example.py +++ b/examples/pytorch/gpt/lambada_task_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/gpt/multi_gpu_gpt_example.py b/examples/pytorch/gpt/multi_gpu_gpt_example.py index e510e2fb7..89330b242 100644 --- a/examples/pytorch/gpt/multi_gpu_gpt_example.py +++ b/examples/pytorch/gpt/multi_gpu_gpt_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # Copyright (c) 2021, NAVER Corp. Authored by CLOVA. # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -14,6 +14,7 @@ # limitations under the License. import argparse +import configparser import os import sys import timeit @@ -28,6 +29,7 @@ from examples.pytorch.gpt.utils import gpt_decoder from examples.pytorch.gpt.utils.parallel_gpt import ParallelGPT +from utils import word_list @torch.no_grad() def main(): @@ -62,7 +64,7 @@ def main(): help='pipeline parallel size') parser.add_argument('--ckpt_path', type=str, default='../models/megatron-models/c-model/345m/1-gpu', help='path to the checkpoint file.') - parser.add_argument('--lib_path', type=str, default='./lib/libth_parallel_gpt.so', + parser.add_argument('--lib_path', type=str, default='./lib/libth_transformer.so', help='path to the pyt_fastertransformer dynamic lib file.') parser.add_argument('--vocab_file', type=str, default="../models/gpt2-vocab.json", help='vocabulary file.') @@ -76,6 +78,10 @@ def main(): help='max batch size.') parser.add_argument('--repetition_penalty', type=float, default=1., help='repetition penalty') + parser.add_argument('--presence_penalty', type=float, default=0., + help='presence penalty. Similar to repetition, but addive rather than multiplicative.') + parser.add_argument('--min_length', type=int, default=0, + help='A minimum number of tokens to generate') parser.add_argument('--max_seq_len', type=int, default=1024, help='max sequence length for position embedding table.') parser.add_argument('--inference_data_type', '--data_type', type=str, choices=['fp32', 'fp16', 'bf16'], default='fp32') @@ -87,6 +93,12 @@ def main(): help='path to sample output file.') parser.add_argument('--enable_random_seed', action='store_true', help='is use the random seed for sentences in a batch.') + parser.add_argument('--skip_end_tokens', dest='skip_end_tokens', action='store_true', + help='Whether to remove or not end tokens in outputs.') + parser.add_argument('--no_detokenize', dest='detokenize', action='store_false', + help='Skip detokenizing output token ids.') + parser.add_argument('--use_jieba_tokenizer', action='store_true', + help='use JiebaBPETokenizer as tokenizer.') parser.add_argument('--int8_mode', type=int, default=0, choices=[0, 1], help='The level of quantization to perform.' ' 0: No quantization. All computation in data_type' @@ -107,10 +119,66 @@ def main(): help='Triggers the shared context optimization when' 'compact_size <= shared_contexts_ratio * batch_size' 'A value of 0.0 deactivate the optimization') + parser.add_argument('--banned_words', + type=str, + default="", + help='A comma separated list of tokens that should never be generated. Everything between the commas will' + ' be tokenized and converted to token ids that will be banned.' + ' Note that spaces before and after commas are included in tokenization.' + ' An example highlighting this importance is that "the" and " the" are' + ' two separate tokens some vocabularies.' + ' Therefore, do ban a certain phrase, we would need to specify all tokens' + ' in the vocabulary that include the phrase.' + ' Example use: --banned_words "the, the,a,boy". This will ban the tokens "the", " the", "a" and "boy".' + ' We can also use a pipe "|" to ban different tokens for different sentences in a batch.' + ' Example: --banned_words "the, the|a,boy" will ban the tokens "the" and " the" in output sentence 1 and' + ' ban the tokens "a" and "boy" in output sentence 2. When using this mode, we must specify a set of tokens to ban' + ' for each sentence in the batch.', + ) parser.add_argument('--use_gpt_decoder_ops', action='store_true', help='Use separate decoder FT operators instead of end-to-end model op.') args = parser.parse_args() + ckpt_config = configparser.ConfigParser() + ckpt_config_path = os.path.join(args.ckpt_path, 'config.ini') + if os.path.isfile(ckpt_config_path): + ckpt_config.read(ckpt_config_path) + if 'gpt' in ckpt_config.keys(): + for args_key, config_key, func in [ + ('layer_num', 'num_layer', ckpt_config.getint), + ('max_seq_len', 'max_pos_seq_len', ckpt_config.getint), + ('weights_data_type', 'weight_data_type', ckpt_config.get), + ]: + if config_key in ckpt_config['gpt'].keys(): + prev_val = args.__dict__[args_key] + args.__dict__[args_key] = func('gpt', config_key) + print('Loading {} from config.ini, previous: {}, current: {}'.format( + args_key, prev_val, args.__dict__[args_key])) + else: + print('Not loading {} from config.ini'.format(args_key)) + for key in ['head_num', 'size_per_head', 'tensor_para_size']: + if key in args.__dict__: + prev_val = args.__dict__[key] + args.__dict__[key] = ckpt_config.getint('gpt', key) + print('Loading {} from config.ini, previous: {}, current: {}'.format( + key, prev_val, args.__dict__[key])) + else: + print('Not loading {} from config.ini'.format(key)) + if 'structure' in ckpt_config.keys(): + gpt_with_moe = ckpt_config.getboolean('structure', 'gpt_with_moe') + expert_num = ckpt_config.getint('structure', 'expert_num') + moe_layer_index_str = ckpt_config.get('structure', 'moe_layers') + if len(moe_layer_index_str) <= 2: + moe_layer_index = [] + else: + moe_layer_index = [int(n) for n in moe_layer_index_str[1:-1].replace(' ', '').split(',')] + moe_k = 1 + else: + gpt_with_moe = False + expert_num = 0 + moe_layer_index = [] + moe_k = 0 + layer_num = args.layer_num output_len = args.output_len head_num = args.head_num @@ -129,6 +197,8 @@ def main(): max_batch_size = args.max_batch_size max_seq_len = args.max_seq_len repetition_penalty = args.repetition_penalty + presence_penalty = args.presence_penalty + min_length = args.min_length weights_data_type = args.weights_data_type return_cum_log_probs = args.return_cum_log_probs return_output_length = return_cum_log_probs > 0 @@ -139,7 +209,11 @@ def main(): print(f'{k.ljust(30, ".")}: {v}') print('=================================================\n') - enc = encoder.get_encoder(args.vocab_file, args.merges_file) + if args.use_jieba_tokenizer: + from examples.pytorch.gpt.utils.tokenizer import JiebaBPETokenizer + enc = JiebaBPETokenizer(args.vocab_file) + else: + enc = encoder.get_encoder(args.vocab_file, args.merges_file) torch.manual_seed(0) comm.initialize_model_parallel(args.tensor_para_size, args.pipeline_para_size) @@ -171,10 +245,15 @@ def main(): layer_num, max_seq_len, tensor_para_size, pipeline_para_size, lib_path=args.lib_path, inference_data_type=args.inference_data_type, int8_mode=args.int8_mode, weights_data_type=weights_data_type, - shared_contexts_ratio=shared_contexts_ratio) + shared_contexts_ratio=shared_contexts_ratio, + gpt_with_moe=gpt_with_moe, + expert_num=expert_num, + moe_k=moe_k, + moe_layer_index=moe_layer_index) if not gpt.load(ckpt_path=args.ckpt_path): print("[WARNING] Checkpoint file not found. Model loading is skipped.") else: + assert moe_layer_index == [] gpt = gpt_decoder.Gpt( num_heads=head_num, size_per_head=size_per_head, @@ -191,18 +270,30 @@ def main(): gpt.load(args.ckpt_path, args.inference_data_type) if args.enable_random_seed: - random_seed_tensor = torch.randint(0, 10000, size=[max_batch_size], dtype=torch.int64) + random_seed_tensor = torch.randint(0, 10000, size=[batch_size], dtype=torch.int64) else: - random_seed_tensor = torch.zeros([max_batch_size], dtype=torch.int64) + random_seed_tensor = torch.zeros([batch_size], dtype=torch.int64) + + bad_words_list=None + if args.banned_words: + batch_banned_words = args.banned_words.split("|") + banned_words = [[banned_words_for_batch] for banned_words_for_batch in batch_banned_words] + bad_words_list = torch.tensor(word_list.to_word_list_format(banned_words, enc)).to("cuda") + + repetition_penalty_vec = None if repetition_penalty == 1. else repetition_penalty * torch.ones(batch_size, dtype=torch.float32) + presence_penalty_vec = None if presence_penalty == 0. else presence_penalty * torch.ones(batch_size, dtype=torch.float32) infer_decode_args = dict( beam_width=beam_width, - top_k=top_k * torch.ones(max_batch_size, dtype=torch.int32), - top_p=top_p * torch.ones(max_batch_size, dtype=torch.float32), - temperature=temperature * torch.ones(max_batch_size, dtype=torch.float32), - repetition_penalty=repetition_penalty * torch.ones(max_batch_size, dtype=torch.float32), - beam_search_diversity_rate=beam_search_diversity_rate * torch.ones(max_batch_size, dtype=torch.float32), - len_penalty=len_penalty * torch.ones(size=[max_batch_size], dtype=torch.float32), + top_k=top_k * torch.ones(batch_size, dtype=torch.int32), + top_p=top_p * torch.ones(batch_size, dtype=torch.float32), + temperature=temperature * torch.ones(batch_size, dtype=torch.float32), + repetition_penalty=repetition_penalty_vec, + presence_penalty=presence_penalty_vec, + beam_search_diversity_rate=beam_search_diversity_rate * torch.ones(batch_size, dtype=torch.float32), + len_penalty=len_penalty * torch.ones(size=[batch_size], dtype=torch.float32), + bad_words_list=bad_words_list, + min_length=min_length * torch.ones(size=[batch_size], dtype=torch.int32), random_seed=random_seed_tensor ) @@ -246,7 +337,9 @@ def gpt_generate_fn(): for i, (context, tokens) in enumerate(zip(contexts, tokens_batch)): for beam_id in range(beam_width): token = tokens[beam_id][start_lengths[i]:] # exclude context input from the output - output = enc.decode(token) + if args.skip_end_tokens: + token = token[token != end_id] + output = enc.decode(token) if args.detokenize else ' '.join(str(t) for t in token.tolist()) outputs.append(output) print(f'[INFO] batch {i}, beam {beam_id}:\n[Context]\n{context}\n\n[Output]\n{output}\n') diff --git a/examples/pytorch/gpt/opt_summarization.py b/examples/pytorch/gpt/opt_summarization.py index 1f086e92a..88dd7ead9 100644 --- a/examples/pytorch/gpt/opt_summarization.py +++ b/examples/pytorch/gpt/opt_summarization.py @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -41,7 +41,7 @@ def main(): parser.add_argument('--data_type', type=str, choices=['fp32', 'fp16', 'bf16'], default='fp32') parser.add_argument("--cache_path", type=str, default="/workdir/datasets/ccdv/") parser.add_argument("--max_ite", type=int, default=20) - parser.add_argument('--lib_path', type=str, default='./lib/libth_parallel_gpt.so', + parser.add_argument('--lib_path', type=str, default='./lib/libth_transformer.so', help='path to the pyt_fastertransformer dynamic lib file.') parser.add_argument('--tensor_para_size', type=int, default=1, help='tensor parallel size') diff --git a/examples/pytorch/gpt/requirement.txt b/examples/pytorch/gpt/requirement.txt index a84bd4859..16194a40b 100644 --- a/examples/pytorch/gpt/requirement.txt +++ b/examples/pytorch/gpt/requirement.txt @@ -1,3 +1,4 @@ +accelerate~=0.15.0 datasets~=2.3.2 fire~=0.4.0 omegaconf~=2.1.2 diff --git a/examples/pytorch/gpt/scripts/evaluate_zeroshot_gpt.sh b/examples/pytorch/gpt/scripts/evaluate_zeroshot_gpt.sh index d7b990096..1729a4616 100644 --- a/examples/pytorch/gpt/scripts/evaluate_zeroshot_gpt.sh +++ b/examples/pytorch/gpt/scripts/evaluate_zeroshot_gpt.sh @@ -29,7 +29,7 @@ python -m torch.distributed.run --nproc_per_node 1 ../examples/pytorch/gpt/evalu --no-load-optim \ --no-load-rng \ --ckpt-path "${CHECKPOINT}" \ - --lib-path "lib/libth_gpt.so" \ + --lib-path "lib/libth_transformer.so" \ --beam_width 1 \ --top_k 1 \ --top_p 0.0 @@ -57,7 +57,7 @@ python -m torch.distributed.run --nproc_per_node 1 ../examples/pytorch/gpt/evalu --no-load-optim \ --no-load-rng \ --ckpt-path "${CHECKPOINT}" \ - --lib-path "lib/libth_gpt.so" \ + --lib-path "lib/libth_transformer.so" \ --beam_width 1 \ --top_k 0 \ --top_p 0.5 \ No newline at end of file diff --git a/examples/pytorch/gpt/utils/bloom.py b/examples/pytorch/gpt/utils/bloom.py index 7d85beb5c..a41aa2888 100644 --- a/examples/pytorch/gpt/utils/bloom.py +++ b/examples/pytorch/gpt/utils/bloom.py @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -29,7 +29,8 @@ class BloomWeight(gpt.GPTWeights): def __init__(self, head_num, size_per_head, layer_num, vocab_size, - tensor_para_size, pipeline_para_size, weights_data_type, inference_data_type): + tensor_para_size, pipeline_para_size, weights_data_type, inference_data_type, + int8_mode=0): super().__init__( head_num, size_per_head, layer_num, vocab_size, 0, tensor_para_size, pipeline_para_size, weights_data_type, @@ -39,7 +40,7 @@ def __init__(self, head_num, size_per_head, layer_num, vocab_size, has_positional_encoding=False, has_pre_decoder_layernorm=True, has_post_decoder_layernorm=True, - int8_mode=0) + int8_mode=int8_mode) @dataclasses.dataclass @@ -239,7 +240,8 @@ def __init__(self, inference_data_type: str, weights_data_type: str | np.dtype = np.float32, layernorm_eps: float = 1e-5, - shared_contexts_ratio: float = 1.0): + shared_contexts_ratio: float = 1.0, + int8_mode: int = 0): super().__init__( head_num, size_per_head, vocab_size, start_id, end_id, layer_num, 0, tensor_para_size, pipeline_para_size, @@ -255,7 +257,7 @@ def __init__(self, has_adapters=False, adapter_inter_size=0, use_attention_linear_bias=True, - int8_mode=0, + int8_mode=int8_mode, weights_data_type=weights_data_type, shared_contexts_ratio=shared_contexts_ratio) diff --git a/examples/pytorch/gpt/utils/comm.py b/examples/pytorch/gpt/utils/comm.py index 21f3bdfdf..25fa76040 100644 --- a/examples/pytorch/gpt/utils/comm.py +++ b/examples/pytorch/gpt/utils/comm.py @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/gpt/utils/generate_gpt_config.py b/examples/pytorch/gpt/utils/generate_gpt_config.py index 4b16957d3..a3ece7cd0 100644 --- a/examples/pytorch/gpt/utils/generate_gpt_config.py +++ b/examples/pytorch/gpt/utils/generate_gpt_config.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/gpt/utils/generate_start_ids.py b/examples/pytorch/gpt/utils/generate_start_ids.py index 07c9c8e6b..917261f47 100644 --- a/examples/pytorch/gpt/utils/generate_start_ids.py +++ b/examples/pytorch/gpt/utils/generate_start_ids.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/gpt/utils/gpt.py b/examples/pytorch/gpt/utils/gpt.py index 5965ab145..add811822 100644 --- a/examples/pytorch/gpt/utils/gpt.py +++ b/examples/pytorch/gpt/utils/gpt.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -32,13 +32,17 @@ def __init__(self, head_num, size_per_head, layer_num, vocab_size, max_seq_len, inference_data_type: str, has_adapters: bool = False, adapter_inter_size: int = 0, + gpt_with_moe: bool = False, has_positional_encoding: bool = True, has_pre_decoder_layernorm: bool = False, has_post_decoder_layernorm: bool = True, - int8_mode: int = 0): + int8_mode: int = 0, + inter_size: int = 0): assert(head_num % tensor_para_size == 0) if int8_mode == 1: + torch_infer_dtype = str_type_map[inference_data_type] + assert torch_infer_dtype == torch.float16 or torch_infer_dtype == torch.bfloat16, "Weight only quant only supported for infer type fp16 or bf16." quant = torch.ops.fastertransformer.symmetric_quantize_last_axis_of_batched_matrix self.weight_transpose_calibrate_quantize = lambda x: quant(x, torch.int8) else: @@ -55,6 +59,7 @@ def __init__(self, head_num, size_per_head, layer_num, vocab_size, max_seq_len, self.has_adapters = has_adapters self.adapter_inter_size = adapter_inter_size + self.gpt_with_moe = gpt_with_moe self.has_positional_encoding = has_positional_encoding self.has_pre_decoder_layernorm = has_pre_decoder_layernorm self.has_post_decoder_layernorm = has_post_decoder_layernorm @@ -64,6 +69,9 @@ def __init__(self, head_num, size_per_head, layer_num, vocab_size, max_seq_len, local_hidden_units = local_head_num * size_per_head global_hidden_units = global_head_num * size_per_head local_inter_size = local_hidden_units * 4 + if inter_size != 0: + assert inter_size % tensor_para_size == 0, f"inter_size({inter_size}) \% tensor_para_size({tensor_para_size}) must be 0" + local_inter_size = inter_size // tensor_para_size local_adapter_inter_size = self.adapter_inter_size // tensor_para_size self.local_head_num = local_head_num @@ -73,6 +81,7 @@ def __init__(self, head_num, size_per_head, layer_num, vocab_size, max_seq_len, self.local_inter_size = local_inter_size self.int8_mode = int8_mode + self.share_embed = False if isinstance(weights_data_type, str): try: @@ -137,12 +146,17 @@ def __init__(self, head_num, size_per_head, layer_num, vocab_size, max_seq_len, self.inference_data_type])) # position_encoding_table optional_adapter_offset += 1 + self.pre_embed_idx = len(self.w) self.w.append(torch.zeros(vocab_size, global_hidden_units, dtype=str_type_map[self.inference_data_type])) # embedding_table + self.post_embed_idx = len(self.w) self.w.append(torch.zeros(vocab_size, global_hidden_units, dtype=str_type_map[ self.inference_data_type])) # post embedding_kernel self.adapter_offset = 2 + optional_adapter_offset + self.w.extend([torch.empty(0)] * layer_num) # gating_weight + self.adapter_offset += layer_num + # adapters if self.has_adapters: self.w.extend([torch.zeros(global_hidden_units, local_adapter_inter_size, @@ -204,12 +218,19 @@ def __len__(self): return len(self.w) def _map(self, func): + assert(self.pre_embed_idx < self.post_embed_idx, "Pre decoder embedding index should be lower than post decoder embedding index.") for i in range(len(self.w)): if isinstance(self.w[i], list): for j in range(len(self.w[i])): self.w[i][j] = func(self.w[i][j]) else: - self.w[i] = func(self.w[i]) + if self.share_embed and i == self.post_embed_idx: + # If sharing the pre and post embedding, any mapping to + # the pre decoder weight will give the same output to the + # post decoder weight, so we just copy here. + self.w[self.post_embed_idx] = self.w[self.pre_embed_idx] + else: + self.w[i] = func(self.w[i]) def _map_int8(self, func): for i in range(len(self.int8_w)): @@ -269,13 +290,25 @@ def load_to_torch(file_path: str, is_load: bool): w.extend([load_to_torch(f"{ckpt_path}/model.layers.{i}.post_attention_layernorm.bias.bin", is_load(i)) for i in range(self.layer_num)]) w.extend([load_to_torch( - f"{ckpt_path}/model.layers.{i}.mlp.dense_h_to_4h.weight.{tp_rank}.bin", is_load(i)) for i in range(self.layer_num)]) - w.extend([load_to_torch(f"{ckpt_path}/model.layers.{i}.mlp.dense_h_to_4h.bias.{tp_rank}.bin", - is_load(i)) for i in range(self.layer_num)]) + f"{ckpt_path}/model.layers.{i}.mlp.dense_h_to_4h.weight.{tp_rank}.bin" \ + if os.path.isfile(f"{ckpt_path}/model.layers.{i}.mlp.dense_h_to_4h.weight.{tp_rank}.bin") \ + else f"{ckpt_path}/model.layers.{i}.mlp.moe.experts.dense_h_to_4h.weight.{tp_rank}.bin", + is_load(i)) for i in range(self.layer_num)]) w.extend([load_to_torch( - f"{ckpt_path}/model.layers.{i}.mlp.dense_4h_to_h.weight.{tp_rank}.bin", is_load(i)) for i in range(self.layer_num)]) - w.extend([load_to_torch(f"{ckpt_path}/model.layers.{i}.mlp.dense_4h_to_h.bias.bin", is_load(i)) - for i in range(self.layer_num)]) + f"{ckpt_path}/model.layers.{i}.mlp.dense_h_to_4h.bias.{tp_rank}.bin" \ + if os.path.isfile(f"{ckpt_path}/model.layers.{i}.mlp.dense_h_to_4h.bias.{tp_rank}.bin") \ + else f"{ckpt_path}/model.layers.{i}.mlp.moe.experts.dense_h_to_4h.bias.{tp_rank}.bin", + is_load(i)) for i in range(self.layer_num)]) + w.extend([load_to_torch( + f"{ckpt_path}/model.layers.{i}.mlp.dense_4h_to_h.weight.{tp_rank}.bin" \ + if os.path.isfile(f"{ckpt_path}/model.layers.{i}.mlp.dense_4h_to_h.weight.{tp_rank}.bin") \ + else f"{ckpt_path}/model.layers.{i}.mlp.moe.experts.dense_4h_to_h.weight.{tp_rank}.bin", + is_load(i)) for i in range(self.layer_num)]) + w.extend([load_to_torch( + f"{ckpt_path}/model.layers.{i}.mlp.dense_4h_to_h.bias.bin" \ + if os.path.isfile(f"{ckpt_path}/model.layers.{i}.mlp.dense_4h_to_h.bias.bin") \ + else f"{ckpt_path}/model.layers.{i}.mlp.moe.experts.dense_4h_to_h.bias.bin", + is_load(i)) for i in range(self.layer_num)]) if self.has_pre_decoder_layernorm: w.append(load_to_torch(f"{ckpt_path}/model.pre_decoder_layernorm.weight.bin", True)) @@ -294,32 +327,68 @@ def load_to_torch(file_path: str, is_load: bool): w.append(wpe) w.append(load_to_torch(f"{ckpt_path}/model.wte.bin", True)) if os.path.isfile(f"{ckpt_path}/model.lm_head.weight.bin"): + self.share_embed = False w.append(load_to_torch(f"{ckpt_path}/model.lm_head.weight.bin", True)) else: - w.append(load_to_torch(f"{ckpt_path}/model.wte.bin", True)) + self.share_embed = True + w.append(torch.empty(0).to(str_type_map[self.inference_data_type])) + + gate_list = [] + for i in range(self.layer_num): + if (os.path.isfile(f"{ckpt_path}/model.layers.{i}.mlp.moe.gate.wg.weight.bin")): + gate_list.append(load_to_torch(f"{ckpt_path}/model.layers.{i}.mlp.moe.gate.wg.weight.bin", True)) + else: + gate_list.append(load_to_torch(f"{ckpt_path}/model.layers.{i}.mlp.moe.gate.wg.weight.bin", False)) + w.extend(gate_list) if self.has_adapters: w.extend([load_to_torch( - f"{ckpt_path}/model.layers.{i}.after_attention_adapter.dense_h_to_4h.weight.{tp_rank}.bin", is_load(i)) for i in range(self.layer_num)]) + f"{ckpt_path}/model.layers.{i}.after_attention_adapter.dense_h_to_4h.weight.{tp_rank}.bin" \ + if os.path.isfile(f"{ckpt_path}/model.layers.{i}.after_attention_adapter.dense_h_to_4h.weight.{tp_rank}.bin") \ + else f"{ckpt_path}/model.layers.{i}.after_attention_adapter.moe.experts.dense_h_to_4h.weight.{tp_rank}.bin", + is_load(i)) for i in range(self.layer_num)]) w.extend([load_to_torch( - f"{ckpt_path}/model.layers.{i}.after_attention_adapter.dense_h_to_4h.bias.{tp_rank}.bin", is_load(i)) for i in range(self.layer_num)]) + f"{ckpt_path}/model.layers.{i}.after_attention_adapter.dense_h_to_4h.bias.{tp_rank}.bin" \ + if os.path.isfile(f"{ckpt_path}/model.layers.{i}.after_attention_adapter.dense_h_to_4h.bias.{tp_rank}.bin") \ + else f"{ckpt_path}/model.layers.{i}.after_attention_adapter.moe.experts.dense_h_to_4h.bias.{tp_rank}.bin", + is_load(i)) for i in range(self.layer_num)]) w.extend([load_to_torch( - f"{ckpt_path}/model.layers.{i}.after_attention_adapter.dense_4h_to_h.weight.{tp_rank}.bin", is_load(i)) for i in range(self.layer_num)]) + f"{ckpt_path}/model.layers.{i}.after_attention_adapter.dense_4h_to_h.weight.{tp_rank}.bin" \ + if os.path.isfile(f"{ckpt_path}/model.layers.{i}.after_attention_adapter.dense_4h_to_h.weight.{tp_rank}.bin") \ + else f"{ckpt_path}/model.layers.{i}.after_attention_adapter.moe.experts.dense_4h_to_h.weight.{tp_rank}.bin", + is_load(i)) for i in range(self.layer_num)]) w.extend([load_to_torch( - f"{ckpt_path}/model.layers.{i}.after_attention_adapter.dense_4h_to_h.bias.bin", is_load(i)) for i in range(self.layer_num)]) + f"{ckpt_path}/model.layers.{i}.after_attention_adapter.dense_4h_to_h.bias.bin" \ + if os.path.isfile(f"{ckpt_path}/model.layers.{i}.after_attention_adapter.dense_4h_to_h.bias.bin") \ + else f"{ckpt_path}/model.layers.{i}.after_attention_adapter.moe.experts.dense_4h_to_h.bias.bin", + is_load(i)) for i in range(self.layer_num)]) w.extend([load_to_torch( - f"{ckpt_path}/model.layers.{i}.after_ffn_adapter.dense_h_to_4h.weight.{tp_rank}.bin", is_load(i)) for i in range(self.layer_num)]) + f"{ckpt_path}/model.layers.{i}.after_ffn_adapter.dense_h_to_4h.weight.{tp_rank}.bin" \ + if os.path.isfile(f"{ckpt_path}/model.layers.{i}.after_ffn_adapter.dense_h_to_4h.weight.{tp_rank}.bin") \ + else f"{ckpt_path}/model.layers.{i}.after_ffn_adapter.moe.experts.dense_h_to_4h.weight.{tp_rank}.bin", + is_load(i)) for i in range(self.layer_num)]) w.extend([load_to_torch( - f"{ckpt_path}/model.layers.{i}.after_ffn_adapter.dense_h_to_4h.bias.{tp_rank}.bin", is_load(i)) for i in range(self.layer_num)]) + f"{ckpt_path}/model.layers.{i}.after_ffn_adapter.dense_h_to_4h.bias.{tp_rank}.bin" \ + if os.path.isfile(f"{ckpt_path}/model.layers.{i}.after_ffn_adapter.dense_h_to_4h.bias.{tp_rank}.bin") \ + else f"{ckpt_path}/model.layers.{i}.after_ffn_adapter.moe.experts.dense_h_to_4h.bias.{tp_rank}.bin", + is_load(i)) for i in range(self.layer_num)]) w.extend([load_to_torch( - f"{ckpt_path}/model.layers.{i}.after_ffn_adapter.dense_4h_to_h.weight.{tp_rank}.bin", is_load(i)) for i in range(self.layer_num)]) + f"{ckpt_path}/model.layers.{i}.after_ffn_adapter.dense_4h_to_h.weight.{tp_rank}.bin" \ + if os.path.isfile(f"{ckpt_path}/model.layers.{i}.after_ffn_adapter.dense_4h_to_h.weight.{tp_rank}.bin") \ + else f"{ckpt_path}/model.layers.{i}.after_ffn_adapter.moe.experts.dense_4h_to_h.weight.{tp_rank}.bin", + is_load(i)) for i in range(self.layer_num)]) w.extend([load_to_torch( - f"{ckpt_path}/model.layers.{i}.after_ffn_adapter.dense_4h_to_h.bias.bin", is_load(i)) for i in range(self.layer_num)]) + f"{ckpt_path}/model.layers.{i}.after_ffn_adapter.dense_4h_to_h.bias.bin" \ + if os.path.isfile(f"{ckpt_path}/model.layers.{i}.after_ffn_adapter.dense_4h_to_h.bias.bin") \ + else f"{ckpt_path}/model.layers.{i}.after_ffn_adapter.moe.experts.dense_4h_to_h.bias.bin", + is_load(i)) for i in range(self.layer_num)]) + + assert len(self.w) == len(w) # Reshape try: for i in range(len(w)): - if w[i].nelement() > 0: + if w[i].nelement() == self.w[i].nelement(): self.w[i] = w[i].reshape(self.w[i].shape) else: self.w[i] = w[i] @@ -378,10 +447,15 @@ def __init__(self, pipeline_para_size: int, lib_path: typing.Union[str, pathlib.Path], inference_data_type: str, + inter_size: int = 0, # gpt_variant_params layernorm_eps: float = 1e-6, layernorm_type: typing.Literal['pre_layernorm', 'post_layernorm'] = "pre_layernorm", activation_type: str = "Gelu", + gpt_with_moe: bool = False, + expert_num: int = 0, + moe_k: int = 0, + moe_layer_index: typing.List = [], has_positional_encoding: bool = True, has_pre_decoder_layernorm: bool = False, has_post_decoder_layernorm: bool = True, @@ -398,11 +472,16 @@ def __init__(self, self.start_id = start_id self.end_id = end_id self.layer_num = layer_num + self.inter_size = inter_size if inter_size != 0 else 4 * self.head_num * self.size_per_head # gpt_variant_params self.layernorm_eps = layernorm_eps self.layernorm_type = layernorm_type self.activation_type = activation_type + self.gpt_with_moe = gpt_with_moe + self.expert_num = expert_num + self.moe_k = moe_k + self.moe_layer_index = moe_layer_index self.has_positional_encoding = has_positional_encoding self.has_pre_decoder_layernorm = has_pre_decoder_layernorm self.has_post_decoder_layernorm = has_post_decoder_layernorm @@ -432,12 +511,14 @@ def __init__(self, max_seq_len, tensor_para_size, pipeline_para_size, weights_data_type=weights_data_type, inference_data_type=inference_data_type, + gpt_with_moe=self.gpt_with_moe, has_positional_encoding=self.has_positional_encoding, has_pre_decoder_layernorm=self.has_pre_decoder_layernorm, has_post_decoder_layernorm=self.has_post_decoder_layernorm, has_adapters=self.has_adapters, adapter_inter_size=self.adapter_inter_size, - int8_mode=int8_mode) + int8_mode=int8_mode, + inter_size=inter_size) # Prepare for tensor/pipeline parallel try: @@ -476,8 +557,12 @@ def cuda(self): self.build_model = False self.model = torch.classes.FasterTransformer.GptOp( - self.head_num, self.size_per_head, 4 * self.head_num * self.size_per_head, - self.layer_num, self.vocab_size, self.start_id, self.end_id, + self.head_num, self.size_per_head, self.inter_size, + self.layer_num, + self.expert_num, + self.moe_k, + self.moe_layer_index, + self.vocab_size, self.start_id, self.end_id, self.use_sparse_gemm, # gpt_variant_params self.layernorm_eps, @@ -493,19 +578,22 @@ def cuda(self): self.build_model = True def forward(self, - start_ids, - start_lengths, - output_len, - beam_width=1, - top_k=None, - top_p=None, - beam_search_diversity_rate=None, - temperature=None, - len_penalty=None, - repetition_penalty=None, - random_seed=None, - return_output_length=False, - return_cum_log_probs=0): + start_ids: torch.IntTensor, + start_lengths: torch.IntTensor, + output_len: int, + beam_width: int = 1, + top_k: typing.Optional[torch.IntTensor] = None, + top_p: typing.Optional[torch.FloatTensor] = None, + beam_search_diversity_rate: typing.Optional[torch.FloatTensor] = None, + temperature: typing.Optional[torch.FloatTensor] = None, + len_penalty: typing.Optional[torch.FloatTensor] = None, + repetition_penalty: typing.Optional[torch.FloatTensor] = None, + presence_penalty: typing.Optional[torch.FloatTensor] = None, + min_length: typing.Optional[torch.IntTensor] = None, + random_seed: typing.Optional[torch.LongTensor] = None, + bad_words_list: typing.Optional[torch.IntTensor] = None, + return_output_length: bool = False, + return_cum_log_probs: int = 0): if not self.build_model: # for the cases we don't load model self.cuda() @@ -527,7 +615,10 @@ def forward(self, temperature, # optional, can be None len_penalty, # optional, can be None repetition_penalty, # optional, can be None + presence_penalty, # optional, can be None + min_length, # optional, can be None random_seed, # optional, can be None + bad_words_list, # optional, can be None return_cum_log_probs) # optional, can be None if return_cum_log_probs == 0: output_ids, output_lengths = outputs @@ -577,6 +668,7 @@ class GptInitModelParameters: has_pre_decoder_layernorm: bool = False has_post_decoder_layernorm: bool = True use_attention_linear_bias: bool = False + inter_size: int = 0 PREDEFINED_MODELS: typing.ClassVar[dict] = { 'default': dict(), @@ -606,9 +698,11 @@ def gpt_init_kwargs(self): @classmethod def from_args(cls, args, config_reader): model_name = args.model_name + head_num = config_reader.getint(model_name, "head_num") + size_per_head = config_reader.getint(model_name, "size_per_head") param = cls( - head_num=config_reader.getint(model_name, "head_num"), - size_per_head=config_reader.getint(model_name, "size_per_head"), + head_num=head_num, + size_per_head=size_per_head, layer_num=config_reader.getint(model_name, "num_layer"), # There is no limitation on the length when no positional encoding, # setting by a large enough integer. @@ -635,6 +729,7 @@ def from_args(cls, args, config_reader): fallback=config_reader.get(model_name, "weight_data_type")) ), sparse=int(getattr(args, 'sparse', False)), + inter_size=config_reader.getint(model_name, "inter_size", fallback=4*head_num*size_per_head) ) if config_reader.has_option(model_name, 'model_variant'): @@ -682,21 +777,21 @@ def from_args(cls, args, config_reader, batch_size=None): if batch_size is not None: bs = batch_size return cls( - beam_width=args.beam_width or config_reader.getint("ft_instance_hyperparameter", "beam_width"), - top_k=(args.sampling_top_k or config_reader.getint("ft_instance_hyperparameter", "top_k")) * + beam_width=args.beam_width or config_reader.getint("ft_instance_hyperparameter", "beam_width", fallback=1), + top_k=(args.sampling_top_k or config_reader.getint("ft_instance_hyperparameter", "top_k", fallback=1)) * torch.ones(size=[bs], dtype=torch.int32), - top_p=(args.sampling_top_p or config_reader.getfloat("ft_instance_hyperparameter", "top_p")) * + top_p=(args.sampling_top_p or config_reader.getfloat("ft_instance_hyperparameter", "top_p", fallback=0.0)) * torch.ones(size=[bs], dtype=torch.float32), beam_search_diversity_rate=( args.beam_search_diversity_rate - or config_reader.getfloat("ft_instance_hyperparameter", "beam_search_diversity_rate") + or config_reader.getfloat("ft_instance_hyperparameter", "beam_search_diversity_rate", fallback=0.0) ) * torch.ones(size=[bs], dtype=torch.float32), temperature=(args.temperature or config_reader.getfloat("ft_instance_hyperparameter", - "temperature")) * torch.ones(size=[bs], dtype=torch.float32), + "temperature", fallback=1.0)) * torch.ones(size=[bs], dtype=torch.float32), len_penalty=(args.len_penalty or config_reader.getfloat("ft_instance_hyperparameter", - "len_penalty")) * torch.ones(size=[bs], dtype=torch.float32), + "len_penalty", fallback=0.0)) * torch.ones(size=[bs], dtype=torch.float32), repetition_penalty=( - args.repetition_penalty or config_reader.getfloat("ft_instance_hyperparameter", "repetition_penalty") + args.repetition_penalty or config_reader.getfloat("ft_instance_hyperparameter", "repetition_penalty", fallback=1.0) ) * torch.ones(size=[bs], dtype=torch.float32), ) diff --git a/examples/pytorch/gpt/utils/gpt_decoder.py b/examples/pytorch/gpt/utils/gpt_decoder.py index 405996aa7..c86ce1a96 100644 --- a/examples/pytorch/gpt/utils/gpt_decoder.py +++ b/examples/pytorch/gpt/utils/gpt_decoder.py @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -767,6 +767,7 @@ def __init__(self, self.use_fp32_to_compute_logit = use_fp32_to_compute_logit self.weight = None + self.shared_contexts_ratio = shared_contexts_ratio torch.classes.load_library(os.path.abspath(lib_path)) @@ -807,7 +808,8 @@ def register_param(name, p): if comm.is_pipeline_group_first(): register_param( 'word_embedding', - torch.nn.Embedding(self.vocab_size, hidden_dim, dtype=compute_dtype)) + torch.nn.Embedding(self.vocab_size_padded, hidden_dim, dtype=compute_dtype)) + self._mask_padded_vocab_weights(self.word_embedding.weight) if self.config.has_positional_encoding: register_param( 'position_encoding', @@ -828,10 +830,10 @@ def register_param(name, p): torch.nn.LayerNorm(hidden_dim, eps=layernorm_eps, dtype=compute_dtype)) else: self.post_decoder_layernorm = None - lm_head_ctype = compute_dtype if not self.use_fp32_to_compute_logit else torch.float32 + self.lm_head_ctype = compute_dtype if not self.use_fp32_to_compute_logit else torch.float32 register_param( 'lm_head', - torch.nn.Linear(hidden_dim, self.vocab_size_padded, bias=False, dtype=lm_head_ctype)) + torch.nn.Linear(hidden_dim, self.vocab_size_padded, bias=False, dtype=self.lm_head_ctype)) self._mask_padded_vocab_weights(self.lm_head.weight) @classmethod @@ -888,12 +890,11 @@ def _safe_load_from_bin(param: torch.nn.Parameter, fname): else: raise FileNotFoundError(f'Faile to load {fname}') - def _safe_load_lm_head_from_bin(param, fname): + def _safe_load_lm_head_from_bin(param, fname, ctype): if (checkpoint_path / fname).exists(): shape = (self.vocab_size, self.config.head_num * self.config.size_per_head) # np_w is 1-D array since a bin file doesn't have shape info. w_ = np.fromfile(checkpoint_path / fname, dtype=weight_dtype) - ctype = compute_dtype if not self.use_fp32_to_compute_logit else torch.float32 param.data = param.data.to(ctype) param.data[:self.vocab_size, :] = torch.from_numpy(w_).reshape(shape).to(ctype) else: @@ -903,7 +904,7 @@ def _safe_load_lm_head_from_bin(param, fname): # pylint:disable=line-too-long if comm.is_pipeline_group_first(): - _safe_load_from_bin(self.word_embedding.weight, 'model.wte.bin') + _safe_load_lm_head_from_bin(self.word_embedding.weight, 'model.wte.bin', compute_dtype) self._mask_padded_vocab_weights(self.word_embedding.weight) if self.position_encoding is not None: _safe_load_from_bin(self.position_encoding.weight, 'model.wpe.bin') @@ -919,9 +920,19 @@ def _safe_load_lm_head_from_bin(param, fname): _safe_load_from_bin(self.post_decoder_layernorm.bias, 'model.final_layernorm.bias.bin') if (checkpoint_path / 'model.lm_head.weight.bin').exists(): - _safe_load_lm_head_from_bin(self.lm_head.weight, 'model.lm_head.weight.bin') + _safe_load_lm_head_from_bin(self.lm_head.weight, 'model.lm_head.weight.bin', self.lm_head_ctype) else: - _safe_load_lm_head_from_bin(self.lm_head.weight, 'model.wte.bin') + if self.use_fp32_to_compute_logit: + _safe_load_lm_head_from_bin(self.lm_head.weight, 'model.wte.bin', torch.float32) + else: + # In this branch we can share the pre and post decoder embeddings, but ONLY pipeline size is 1. + # When pipeline size > 1, these two weights will end up on different GPUs, so we must load the + # post decoder weight again (else case). + if comm.get_pipeline_para_size() == 1: + self.lm_head.weight = self.word_embedding.weight + else: + _safe_load_lm_head_from_bin(self.lm_head.weight, 'model.wte.bin', compute_dtype) + self.to(device) @property @@ -1013,6 +1024,8 @@ def generate(self, top_p_reset_ids: Optional[torch.IntTensor] = None, temperature: Optional[torch.FloatTensor] = None, repetition_penalty: Optional[torch.FloatTensor] = None, + presence_penalty: Optional[torch.FloatTensor] = None, + min_length: Optional[torch.IntTensor] = None, len_penalty: Optional[torch.FloatTensor] = None, beam_search_diversity_rate: Optional[torch.FloatTensor] = None, stop_words_list: Optional[torch.IntTensor] = None, @@ -1048,6 +1061,11 @@ def generate(self, The temperature value for smoothing the logit distribution. repetition_penalty: FloatTensor, (batch_size,), The repetition penalty. + presence_penalty: FloatTensor, (batch_size,), + The presence penalty, which is exclusive with repetition_penalty. + Only one of repetition and presence penalties is allowed. + min_length: IntTensor, (batch_size,), + Minimum length for each sentences. EOS is masked if length is below min. len_penalty: FloatTensor, (batch_size,) The exponent of the length penalty of beam scores. beam_search_diversity_rate: FloatTensor, (batch_size,), @@ -1089,7 +1107,10 @@ def generate(self, eos_token_id = eos_token_id if eos_token_id is not None else self.config.end_id assert eos_token_id is not None, 'eos_token-id must be specified in generation.' eos_token_ids = eos_token_id * torch.ones(batch_size, dtype=torch.int32, device=device) - + assert repetition_penalty is None or presence_penalty is None,\ + 'Found ambiguous parameters repetition_penalty and presence_penalty '\ + 'which are mutually exclusive. Please provide one of repetition_penalty '\ + 'and presence_penalty.' # Setup decoder_op prior to calling the forward function. self.decode_op.setup(batch_size, beam_width, @@ -1097,6 +1118,8 @@ def generate(self, top_p, temperature, repetition_penalty, + presence_penalty, + min_length, len_penalty, beam_search_diversity_rate, random_seed, @@ -1160,12 +1183,24 @@ def generate(self, dtype=self.context_decoder.dtype, device=device) + use_shared_contexts = (self.shared_contexts_ratio > 0.) and (max_input_length >= 1) and (batch_size > 1) + batch_to_compact, compact_to_batch = None, None + if use_shared_contexts: + find_context_duplications = torch.ops.fastertransformer.find_context_duplications + batch_to_compact, compact_to_batch = find_context_duplications(input_token_ids) + use_shared_contexts = compact_to_batch.shape[0] <= self.shared_contexts_ratio * batch_size + + if not use_shared_contexts: + batch_to_compact, compact_to_batch = None , None + profiler.start('ft-context-decoder') _, k_cache, v_cache, last_token_hidden_states = self.context_decoder.forward( input_embeds=input_embeds, attention_mask=attention_mask, input_lengths=input_lengths, - memory_length=memory_length) + memory_length=memory_length, + batch_to_compact_index=batch_to_compact, + compact_index=compact_to_batch) profiler.stop('ft-context-decoder') for step in range(max_input_length, max_seq_length): @@ -1240,6 +1275,8 @@ def generate(self, top_p, temperature, repetition_penalty, + presence_penalty, + min_length, len_penalty, beam_search_diversity_rate, top_p_decay, diff --git a/examples/pytorch/gpt/utils/gpt_fp8.py b/examples/pytorch/gpt/utils/gpt_fp8.py new file mode 100644 index 000000000..59e8250b2 --- /dev/null +++ b/examples/pytorch/gpt/utils/gpt_fp8.py @@ -0,0 +1,496 @@ +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +from __future__ import print_function + +import argparse +import dataclasses +import json +import os +import pathlib +import typing + +import torch +import torch.nn as nn +import numpy as np +import torch.distributed as dist + + +class GPTFp8Weights(object): + def __init__(self, head_num, size_per_head, layer_num, vocab_size, max_seq_len, tensor_para_size, pipeline_para_size, + has_post_decoder_layernorm=True, int8_mode=0, fp8_mode=0, weights_data_type=typing.Union[str, np.float32]): + assert(head_num % tensor_para_size == 0) + + if int8_mode != 0: + self.weight_transpose_calibrate_quantize = torch.ops.fastertransformer.weight_transpose_calibrate_quantize + + self.head_num = head_num + self.size_per_head = size_per_head + self.layer_num = layer_num + self.vocab_size = vocab_size + self.max_seq_len = max_seq_len + self.tensor_para_size = tensor_para_size + self.pipeline_para_size = pipeline_para_size + self.layers_per_device = layer_num // pipeline_para_size + + self.has_post_decoder_layernorm = has_post_decoder_layernorm + + local_head_num = head_num // tensor_para_size + global_head_num = head_num + local_hidden_units = local_head_num * size_per_head + global_hidden_units = global_head_num * size_per_head + local_inter_size = local_hidden_units * 4 + + self.local_head_num = local_head_num + self.global_head_num = global_head_num + self.local_hidden_units = local_hidden_units + self.global_hidden_units = global_hidden_units + self.local_inter_size = local_inter_size + + self.int8_mode = int8_mode + + if isinstance(weights_data_type, str): + try: + weights_data_type = { + "fp16": np.float16, + "fp32": np.float32, + "float16": np.float16, + "float32": np.float32, + }[weights_data_type] + except KeyError: + raise ValueError(f"Don't know how to interpret weights_data_type: {weights_data_type}") + + assert weights_data_type in [np.float32, np.float16] + self.weights_data_type = weights_data_type + + self.w = [] + self.int8_w = [] + self.scale = [] + # Transformer blocks + self.w.extend([torch.zeros(global_hidden_units)] * layer_num) # self_layernorm_gamma + self.w.extend([torch.zeros(global_hidden_units)] * layer_num) # self_layernorm_beta + self.w.extend([torch.zeros(global_hidden_units, local_hidden_units * 3)] * layer_num) # self_kernel + self.w.extend([torch.zeros(local_hidden_units * 3)] * layer_num) # self_bias + self.w.extend([torch.zeros(local_hidden_units, global_hidden_units)] * layer_num) # self_output_kernel + self.w.extend([torch.zeros(global_hidden_units)] * layer_num) # self_output_bias + self.w.extend([torch.zeros(global_hidden_units)] * layer_num) # ffn_layernorm_gamma + self.w.extend([torch.zeros(global_hidden_units)] * layer_num) # ffn_layernorm_beta + self.w.extend([torch.zeros(global_hidden_units, local_inter_size)] * layer_num) # ffn_kernel1 + self.w.extend([torch.zeros(local_inter_size)] * layer_num) # ffn_bias1 + self.w.extend([torch.zeros(local_inter_size, global_hidden_units)] * layer_num) # ffn_kernel2 + self.w.extend([torch.zeros(global_hidden_units)] * layer_num) # ffn_bias2 + # After Transformer blocks + if self.has_post_decoder_layernorm: + self.w.append(torch.zeros(global_hidden_units)) # layernorm_gamma + self.w.append(torch.zeros(global_hidden_units)) # layernorm_beta + self.w.append(torch.zeros(max_seq_len, global_hidden_units)) # position_encoding_table + self.w.append(torch.zeros(vocab_size, global_hidden_units)) # embedding_table + self.w.append(torch.zeros(vocab_size, global_hidden_units)) # embedding_kernel + + # Initialization + self._map(lambda w: torch.nn.init.normal_(w, mean=0., std=1.)) + + + if (self.int8_mode != 0): + self.int8_w.extend([torch.zeros(global_hidden_units, local_hidden_units * 3, dtype=torch.int8)] * layer_num) # self_int8_kernel + self.scale.extend([torch.zeros(local_hidden_units * 3, dtype=torch.float)] * layer_num) # self_scale + self.int8_w.extend([torch.zeros(local_hidden_units, global_hidden_units, dtype=torch.int8)] * layer_num) # self_output_int8_kernel + self.scale.extend([torch.zeros(global_hidden_units, dtype=torch.float)] * layer_num) # self_output_scale + self.int8_w.extend([torch.zeros(global_hidden_units, local_inter_size, dtype=torch.int8)] * layer_num) # ffn_int8_kernel1 + self.scale.extend([torch.zeros(local_inter_size, dtype=torch.float)] * layer_num) # ffn_scale1 + self.int8_w.extend([torch.zeros(local_inter_size, global_hidden_units, dtype=torch.int8)] * layer_num) # ffn_int8_kernel2 + self.scale.extend([torch.zeros(global_hidden_units, dtype=torch.float)] * layer_num) # ffn_scale2 + + + + def __getitem__(self, idx): + return self.w[idx] + + def __setitem__(self, idx, val): + self.w[idx] = val + + def __len__(self): + return len(self.w) + + def _map(self, func): + for i in range(len(self.w)): + if isinstance(self.w[i], list): + for j in range(len(self.w[i])): + self.w[i][j] = func(self.w[i][j]) + else: + self.w[i] = func(self.w[i]) + + def _map_int8(self, func): + for i in range(len(self.int8_w)): + if isinstance(self.int8_w[i], list): + for j in range(len(self.int8_w[i])): + self.int8_w[i][j] = func(self.int8_w[i][j]) + + else: + self.int8_w[i] = func(self.int8_w[i]) + for i in range(len(self.scale)): + if isinstance(self.scale[i], list): + for j in range(len(self.scale[i])): + self.scale[i][j] = func(self.scale[i][j]) + + else: + self.scale[i] = func(self.scale[i]) + + def load(self, ckpt_path, tensor_para_rank, pipeline_para_rank): + if not os.path.exists(ckpt_path): + return False + w = [] + + # Load + def is_load(i): return i >= self.layers_per_device * \ + pipeline_para_rank and i < self.layers_per_device * (pipeline_para_rank + 1) + w.extend([torch.from_numpy(np.fromfile(ckpt_path + "/model.layers.{}.input_layernorm.weight.bin".format(i), + dtype=self.weights_data_type)) if is_load(i) else torch.empty(0) for i in range(self.layer_num)]) + w.extend([torch.from_numpy(np.fromfile(ckpt_path + "/model.layers.{}.input_layernorm.bias.bin".format(i), + dtype=self.weights_data_type)) if is_load(i) else torch.empty(0) for i in range(self.layer_num)]) + w.extend([torch.from_numpy(np.fromfile(ckpt_path + "/model.layers.{}.attention.query_key_value.weight.{}.bin".format(i, + tensor_para_rank), dtype=self.weights_data_type)) if is_load(i) else torch.empty(0) for i in range(self.layer_num)]) + w.extend([torch.from_numpy(np.fromfile(ckpt_path + "/model.layers.{}.attention.query_key_value.bias.{}.bin".format(i, + tensor_para_rank), dtype=self.weights_data_type)) if is_load(i) else torch.empty(0) for i in range(self.layer_num)]) + w.extend([torch.from_numpy(np.fromfile(ckpt_path + "/model.layers.{}.attention.dense.weight.{}.bin".format(i, + tensor_para_rank), dtype=self.weights_data_type)) if is_load(i) else torch.empty(0) for i in range(self.layer_num)]) + w.extend([torch.from_numpy(np.fromfile(ckpt_path + "/model.layers.{}.attention.dense.bias.bin".format(i), + dtype=self.weights_data_type)) if is_load(i) else torch.empty(0) for i in range(self.layer_num)]) + w.extend([torch.from_numpy(np.fromfile(ckpt_path + "/model.layers.{}.post_attention_layernorm.weight.bin".format(i), + dtype=self.weights_data_type)) if is_load(i) else torch.empty(0) for i in range(self.layer_num)]) + w.extend([torch.from_numpy(np.fromfile(ckpt_path + "/model.layers.{}.post_attention_layernorm.bias.bin".format(i), + dtype=self.weights_data_type)) if is_load(i) else torch.empty(0) for i in range(self.layer_num)]) + w.extend([torch.from_numpy(np.fromfile(ckpt_path + "/model.layers.{}.mlp.dense_h_to_4h.weight.{}.bin".format(i, + tensor_para_rank), dtype=self.weights_data_type)) if is_load(i) else torch.empty(0) for i in range(self.layer_num)]) + w.extend([torch.from_numpy(np.fromfile(ckpt_path + "/model.layers.{}.mlp.dense_h_to_4h.bias.{}.bin".format(i, + tensor_para_rank), dtype=self.weights_data_type)) if is_load(i) else torch.empty(0) for i in range(self.layer_num)]) + w.extend([torch.from_numpy(np.fromfile(ckpt_path + "/model.layers.{}.mlp.dense_4h_to_h.weight.{}.bin".format(i, + tensor_para_rank), dtype=self.weights_data_type)) if is_load(i) else torch.empty(0) for i in range(self.layer_num)]) + w.extend([torch.from_numpy(np.fromfile(ckpt_path + "/model.layers.{}.mlp.dense_4h_to_h.bias.bin".format(i), + dtype=self.weights_data_type)) if is_load(i) else torch.empty(0) for i in range(self.layer_num)]) + + if self.has_post_decoder_layernorm: + w.append(torch.from_numpy(np.fromfile(ckpt_path + "/model.final_layernorm.weight.bin", dtype=self.weights_data_type))) + w.append(torch.from_numpy(np.fromfile(ckpt_path + "/model.final_layernorm.bias.bin", dtype=self.weights_data_type))) + + wpe = torch.from_numpy(np.fromfile(ckpt_path + "/model.wpe.bin", dtype=self.weights_data_type) + ).reshape(-1, self.global_hidden_units) + assert self.max_seq_len <= wpe.size(0), ( + f"max_seq_len ({self.max_seq_len} must not exceed " + f"the value of maximum sequence length during training ({wpe.size(0)})." + ) + w.append(wpe) + w.append(torch.from_numpy(np.fromfile(ckpt_path + "/model.wte.bin", dtype=self.weights_data_type))) + if os.path.isfile(ckpt_path + "/model.lm_head.weight.bin"): + w.append(torch.from_numpy(np.fromfile(ckpt_path + "/model.lm_head.weight.bin", dtype=self.weights_data_type))) + else: + w.append(torch.from_numpy(np.fromfile(ckpt_path + "/model.wte.bin", dtype=self.weights_data_type))) + + # Reshape + try: + for i in range(len(w)): + if w[i].nelement() > 0: + self.w[i] = w[i].reshape(self.w[i].shape) + + except RuntimeError: + raise RuntimeError( + f"head_num, size_per_head, vocab_size, and max_seq_len must be the same as the ones during training " + f"(idx: {i} expected shape: {self.w[i].shape} got shape: {w[i].shape})." + ) + + #transpose calibrate quantize the kernel + layer_num = self.layer_num + if self.int8_mode != 0: + for i in range(layer_num): + self.int8_w[i + 0*layer_num], self.scale[i + 0*layer_num] = self.weight_transpose_calibrate_quantize(self.w[2*layer_num + i]) + self.int8_w[i + 1*layer_num], self.scale[i + 1*layer_num] = self.weight_transpose_calibrate_quantize(self.w[4*layer_num + i]) + self.int8_w[i + 2*layer_num], self.scale[i + 2*layer_num] = self.weight_transpose_calibrate_quantize(self.w[8*layer_num + i]) + self.int8_w[i + 3*layer_num], self.scale[i + 3*layer_num] = self.weight_transpose_calibrate_quantize(self.w[10*layer_num + i]) + + return True + + +class GPTFp8(nn.Module): + def __init__(self, + head_num, size_per_head, + vocab_size, start_id, end_id, layer_num, + max_seq_len, + tensor_para_size, pipeline_para_size, + lib_path, + ckpt_path, + layernorm_eps = 1e-6, layernorm_type = "pre_layernorm", # gpt_variant_params + activation_type = "Gelu", has_post_decoder_layernorm = True, # gpt variant params + int8_mode = 0, + fp8_mode = 1, + weights_data_type: np.dtype = np.float32): + super().__init__() + self.head_num = head_num + self.size_per_head = size_per_head + self.vocab_size = vocab_size + self.max_seq_len = max_seq_len + self.start_id = start_id + self.end_id = end_id + self.layer_num = layer_num + # gpt_variant_params + self.layernorm_eps = layernorm_eps + self.layernorm_type = layernorm_type + self.activation_type = activation_type + self.has_post_decoder_layernorm = has_post_decoder_layernorm + # multi-gpu params + self.tensor_para_size = tensor_para_size + self.pipeline_para_size = pipeline_para_size + self.use_sparse_gemm = False + self.int8_mode = int8_mode + self.fp8_mode = fp8_mode + self.weights_data_type = weights_data_type + self.ckpt_path = ckpt_path + + assert torch.cuda.is_available(), "CUDA is required for this model." + + assert head_num % tensor_para_size == 0, "head_num must be a multiple of tensor_para_size." + assert layer_num % pipeline_para_size == 0, "layer_num must be a multiple of pipeline_para_size." + + # Load the C++ model into Pytorch model. + torch.classes.load_library(os.path.abspath(lib_path)) + + # Prepare for tensor/pipeline parallel + try: + dist.init_process_group(backend='mpi') + except: + print("[INFO] WARNING: Have initialize the process group") + self.rank = dist.get_rank() + self.device_count = torch.cuda.device_count() + self.device = self.rank % self.device_count + torch.cuda.set_device(self.device) + + world_size = dist.get_world_size() + assert world_size == tensor_para_size * pipeline_para_size, "tensor_para_size * pipeline_para_size must be equal to world_size." + + self.tensor_para_rank = self.rank % self.tensor_para_size + self.pipeline_para_rank = self.rank // self.tensor_para_size + + self.model = torch.classes.FasterTransformer.GptFp8Op(self.head_num, self.size_per_head, 4 * self.head_num * self.size_per_head, + self.layer_num, self.vocab_size, self.max_seq_len, self.start_id, self.end_id, + self.tensor_para_size, self.pipeline_para_size, + self.layernorm_eps, self.layernorm_type, self.activation_type, self.ckpt_path, + self.has_post_decoder_layernorm, []) + + def forward(self, + start_ids, + start_lengths, + output_len, + beam_width=1, + top_k=1, + top_p=0.0, + beam_search_diversity_rate=0.0, + temperature=1.0, + len_penalty=1.0, + repetition_penalty=1.0, + random_seed=0, + return_output_length=False, + return_cum_log_probs=0): + input_len = start_ids.size(1) + assert input_len > 0, "input len must be larger than zero. For an unconditional case, use start_id as the first token." + + # Inputs to device + start_ids = start_ids.cuda(self.device) + start_lengths = start_lengths.cuda(self.device) + # outputs: output_ids, output_lengths, output_cum_log_probs (optional) + outputs = self.model.forward(start_ids, + start_lengths, + output_len, + beam_width, # optional, can be None + top_k, # optional, can be None + top_p, # optional, can be None + beam_search_diversity_rate, # optional, can be None + temperature, # optional, can be None + len_penalty, # optional, can be None + repetition_penalty, # optional, can be None + random_seed, # optional, can be None + return_cum_log_probs) # optional, can be None + if return_cum_log_probs == 0: + output_ids, output_lengths = outputs + else: + output_ids, output_lengths, output_cum_log_probs = outputs + if return_output_length: + if return_cum_log_probs > 0: + return output_ids, output_lengths, output_cum_log_probs + else: + return output_ids, output_lengths + else: + return output_ids + + def set_input_tensor(self, input_tensor): + """Set input tensor to be used instead of forward()'s input. + + When doing pipeline parallelism the input from the previous + stage comes from communication, not from the input, so the + model's forward_step_func won't have it. This function is thus + used by internal code to bypass the input provided by the + forward_step_func""" + self.input_tensor = input_tensor + + +@dataclasses.dataclass +class GptInitModelParameters: + head_num: int + size_per_head: int + layer_num: int + max_seq_len: int + tensor_para_size: int + vocab_size: int + start_id: int + end_id: int + pipeline_para_size: int + weights_data_type: str + data_type: str + int8_mode: int + sparse: int + + def gpt_init_kwargs(self): + do_not_include = ["data_type", "sparse"] + return {k: v for k, v in dataclasses.asdict(self).items() if k not in do_not_include} + + @classmethod + def from_args(cls, args, config_reader): + model_name = args.model_name + + return cls( + head_num=config_reader.getint(model_name, "head_num"), + size_per_head=config_reader.getint(model_name, "size_per_head"), + layer_num=config_reader.getint(model_name, "num_layer"), + max_seq_len=config_reader.getint(model_name, "max_pos_seq_len"), + tensor_para_size=config_reader.getint(model_name, "tensor_para_size"), + vocab_size=config_reader.getint(model_name, "vocab_size"), + start_id=config_reader.getint(model_name, "start_id"), + end_id=config_reader.getint(model_name, "end_id"), + weights_data_type=config_reader.get(model_name, "weight_data_type"), + pipeline_para_size=( + args.pipeline_para_size or config_reader.getint("ft_instance_hyperparameter", "pipeline_para_size") + ), + int8_mode=( + args.int8_mode + if args.int8_mode is not None + else config_reader.getint("ft_instance_hyperparameter", "int8_mode") + ), + data_type=(args.data_type or config_reader.get("ft_instance_hyperparameter", "data_type")), + sparse=int(args.sparse or False), + ) + + @classmethod + def update_argparser(cls, parser): + parser.add_argument("--model-name", type=str, default="gpt", help="Model name from config.ini file") + parser.add_argument("--pipeline-para-size", type=int, help="size of pipeline parallelism") + parser.add_argument("--data-type", type=str, help="data type", choices=["fp32", "bf16", "fp16"]) + parser.add_argument( + "--sparse", + type=int, + choices=[0, 1], + help="Set sparse matrix multiplication. (Need SM 8.0 or 8.6 and SPARSITY_SUPPORT=ON)", + ) + parser.add_argument("--int8-mode", type=int, choices=[0, 1], help="Set int8 mode") + + +@dataclasses.dataclass +class GptRuntimeModelParameters: + beam_width: int + top_k: int + top_p: float + beam_search_diversity_rate: float + temperature: float + len_penalty: float + repetition_penalty: float + + def gpt_forward_kwargs(self): + return dataclasses.asdict(self) + + @classmethod + def from_args(cls, args, config_reader): + return cls( + beam_width=args.beam_width or config_reader.getint("ft_instance_hyperparameter", "beam_width"), + top_k=args.sampling_top_k or config_reader.getint("ft_instance_hyperparameter", "top_k"), + top_p=args.sampling_top_p or config_reader.getfloat("ft_instance_hyperparameter", "top_p"), + beam_search_diversity_rate=( + args.beam_search_diversity_rate + or config_reader.getfloat("ft_instance_hyperparameter", "beam_search_diversity_rate") + ), + temperature=args.temperature or config_reader.getfloat("ft_instance_hyperparameter", "temperature"), + len_penalty=args.len_penalty or config_reader.getfloat("ft_instance_hyperparameter", "len_penalty"), + repetition_penalty=( + args.repetition_penalty or config_reader.getfloat("ft_instance_hyperparameter", "repetition_penalty") + ), + ) + + @classmethod + def update_argparser(cls, parser): + parser.add_argument("--beam-width", type=int, help="beam width") + parser.add_argument("--sampling-top-k", type=int, help="Candidate (k) value of top k sampling in decoding") + parser.add_argument("--sampling-top-p", type=float, help="Probability (p) value of top p sampling in decoding.") + parser.add_argument("--temperature", type=float, help="temperature") + parser.add_argument("--len-penalty", type=float, help="len_penalty") + parser.add_argument("--repetition-penalty", type=float, help="repetition penalty") + parser.add_argument("--beam-search-diversity-rate", type=float, help="beam_search_diversity_rate") + + +DEFAULT_START_TAG = "<|endoftext|>" +DEFAULT_END_TAG = "<|endoftext|>" +OPENAI_GPT2_START_ID = 50256 +OPENAI_GPT2_END_ID = 50256 + + +@dataclasses.dataclass +class GptModelConfig: + model_name: str + tensor_para_size: int + head_num: int + size_per_head: int + inter_size: int + num_layer: int + max_pos_seq_len: int + weight_data_type: str + vocab_size: int + start_id: int + end_id: int + + @classmethod + def from_nemo_package( + cls, + *, + args: argparse.Namespace, + nemo_model_config: typing.Dict[str, typing.Any], + vocab_path: typing.Optional[pathlib.Path] = None, + vocab_size: int, + ): + + if vocab_path: + vocab_path = pathlib.Path(vocab_path) + with vocab_path.open("r") as vocab_file: + vocab = json.load(vocab_file) + start_id, end_id = vocab[DEFAULT_START_TAG], vocab[DEFAULT_END_TAG] + else: + start_id, end_id = OPENAI_GPT2_START_ID, OPENAI_GPT2_END_ID + + return cls( + model_name="gpt", + tensor_para_size=args.infer_gpu_num, + head_num=nemo_model_config["num_attention_heads"], + size_per_head=nemo_model_config["hidden_size"] // nemo_model_config["num_attention_heads"], + inter_size=nemo_model_config["ffn_hidden_size"], + num_layer=nemo_model_config["num_layers"], + max_pos_seq_len=nemo_model_config["max_position_embeddings"], + weight_data_type=args.weight_data_type, + vocab_size=vocab_size, + start_id=start_id, + end_id=end_id, + ) diff --git a/examples/pytorch/gpt/utils/gpt_token_converter.py b/examples/pytorch/gpt/utils/gpt_token_converter.py index 73e83de6a..4b9f61b84 100644 --- a/examples/pytorch/gpt/utils/gpt_token_converter.py +++ b/examples/pytorch/gpt/utils/gpt_token_converter.py @@ -1,53 +1,53 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. - -import sys -import os -dir_path = os.path.dirname(os.path.realpath(__file__)) -sys.path.append(dir_path + "/../../../..") -from examples.tensorflow.gpt.utils import gpt_token_encoder as encoder -import fire -import numpy as np - -def convert_token( - vocab_file="../models/gpt2-vocab.json", - bpe_file="../models/gpt2-merges.txt", - out_file="out", - max_input_length=-1, - text_out_file=None, -): - enc = encoder.get_encoder(vocab_file, bpe_file) - tokens_batch = np.loadtxt(out_file, dtype=np.int32) - end_id = 50256 - outputs = [] - if(tokens_batch.ndim == 1): - tokens_batch = tokens_batch.reshape([1, -1]) - for batch_num, tokens in enumerate(tokens_batch): - if max_input_length > -1: - end_index = np.where(tokens[max_input_length:] == end_id)[0] - else: - end_index = [] - end_pos = len(tokens) - if len(end_index) > 0: - end_pos = end_index[0] - print(f"[INFO] batch {batch_num}: {enc.decode(tokens[:end_pos])}") - outputs.append(enc.decode(tokens[:end_pos])) - - if text_out_file != None: - with open(text_out_file, "w+") as f: - f.writelines("\n".join(outputs)) - return tokens_batch - -if __name__ == "__main__": +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import sys +import os +dir_path = os.path.dirname(os.path.realpath(__file__)) +sys.path.append(dir_path + "/../../../..") +from examples.tensorflow.gpt.utils import gpt_token_encoder as encoder +import fire +import numpy as np + +def convert_token( + vocab_file="../models/gpt2-vocab.json", + bpe_file="../models/gpt2-merges.txt", + out_file="out", + max_input_length=-1, + text_out_file=None, +): + enc = encoder.get_encoder(vocab_file, bpe_file) + tokens_batch = np.loadtxt(out_file, dtype=np.int32) + end_id = 50256 + outputs = [] + if(tokens_batch.ndim == 1): + tokens_batch = tokens_batch.reshape([1, -1]) + for batch_num, tokens in enumerate(tokens_batch): + if max_input_length > -1: + end_index = np.where(tokens[max_input_length:] == end_id)[0] + else: + end_index = [] + end_pos = len(tokens) + if len(end_index) > 0: + end_pos = end_index[0] + print(f"[INFO] batch {batch_num}: \n[input]{enc.decode(tokens[:16])}\n[output]{enc.decode(tokens[16:end_pos])}") + outputs.append(enc.decode(tokens[:end_pos])) + + if text_out_file != None: + with open(text_out_file, "w+") as f: + f.writelines("\n".join(outputs)) + # return tokens_batch + +if __name__ == "__main__": fire.Fire(convert_token) \ No newline at end of file diff --git a/examples/pytorch/gpt/utils/huggingface_bloom_convert.py b/examples/pytorch/gpt/utils/huggingface_bloom_convert.py index 725149d2e..d858e6600 100644 --- a/examples/pytorch/gpt/utils/huggingface_bloom_convert.py +++ b/examples/pytorch/gpt/utils/huggingface_bloom_convert.py @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/gpt/utils/huggingface_gpt_convert.py b/examples/pytorch/gpt/utils/huggingface_gpt_convert.py index 6d3c6bad6..f9bdb7c44 100644 --- a/examples/pytorch/gpt/utils/huggingface_gpt_convert.py +++ b/examples/pytorch/gpt/utils/huggingface_gpt_convert.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/gpt/utils/huggingface_jp_gpt_convert.py b/examples/pytorch/gpt/utils/huggingface_jp_gpt_convert.py index 9f484581c..e4be0a7c3 100644 --- a/examples/pytorch/gpt/utils/huggingface_jp_gpt_convert.py +++ b/examples/pytorch/gpt/utils/huggingface_jp_gpt_convert.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/gpt/utils/huggingface_opt_convert.py b/examples/pytorch/gpt/utils/huggingface_opt_convert.py index 795344de0..a810cf4d8 100755 --- a/examples/pytorch/gpt/utils/huggingface_opt_convert.py +++ b/examples/pytorch/gpt/utils/huggingface_opt_convert.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -34,83 +34,6 @@ sys.path.append(dir_path + "/../../../..") sys.path.append(dir_path) -class Evaluator: - def __init__(self, dataset, tokenizer, device): - self.dataset = dataset - self.tokenizer = tokenizer - self.device = device - - # tokenize the dataset - def tokenize_function(examples): - example = self.tokenizer(examples['text']) - return example - - self.dataset = self.dataset.map(tokenize_function, batched=True) - self.dataset.set_format(type='torch', columns=['input_ids']) - - @torch.no_grad() - def evaluate(self, model): - model.eval() - # The task is to predict the last word of the input. - total, hit = 0, 0 - for batch in tqdm(self.dataset): - input_ids = batch['input_ids'].to(self.device).unsqueeze(0) - label = input_ids[:, -1] - outputs = model(input_ids) - last_token_logits = outputs.logits[:, -2, :] - pred = last_token_logits.argmax(dim=-1) - total += label.size(0) - hit += (pred == label).sum().item() - acc = hit / total - return acc - -class RangeDetector(torch.nn.Module): - def __init__(self, layer, name, save_dict): - super().__init__() - self.layer = layer - self.name = f"model.{name}.weight" - self.save_dict = save_dict - - @torch.no_grad() - def forward(self, x): - matmul = x @ self.layer.weight.T - - act_pre_max = x.abs().max() - act_post_max = matmul.abs().max() - - if self.name in self.save_dict: - act_pre_max = torch.max(act_pre_max, self.save_dict[self.name][0]) - act_post_max = torch.max(act_post_max, self.save_dict[self.name][1]) - self.save_dict[self.name] = (act_pre_max, act_post_max) - - return matmul + self.layer.bias - - -def inject_range_detectors(model): - capture_dict = {} - for name, m in model.model.named_modules(): - if isinstance(m, OPTDecoderLayer): - m.fc1 = RangeDetector(m.fc1, f"{name}.fc1", capture_dict) - m.fc2 = RangeDetector(m.fc2, f"{name}.fc2", capture_dict) - elif isinstance(m, OPTAttention): - m.q_proj = RangeDetector(m.q_proj, f"{name}.q_proj", capture_dict) - m.k_proj = RangeDetector(m.k_proj, f"{name}.k_proj", capture_dict) - m.v_proj = RangeDetector(m.v_proj, f"{name}.v_proj", capture_dict) - m.out_proj = RangeDetector(m.out_proj, f"{name}.out_proj", capture_dict) - return capture_dict - - -def remove_range_detectors(model): - for name, m in model.model.named_modules(): - if isinstance(m, OPTDecoderLayer): - m.fc1 = m.fc1.layer - m.fc2 = m.fc2.layer - elif isinstance(m, OPTAttention): - m.q_proj = m.q_proj.layer - m.k_proj = m.k_proj.layer - m.v_proj = m.v_proj.layer - m.out_proj = m.out_proj.layer - def get_weight_data_type(data_type): if data_type == "fp32": @@ -122,14 +45,16 @@ def get_weight_data_type(data_type): def quantize(mat, act_range): + # qkv proj weight quantization if mat.ndim == 3 and mat.shape[1] == 3: + # get max_q, max_k, max_v mat_max = np.abs(mat).clip(1e-8, None).max(axis=(0,2))[None, :, None] else: mat_max = np.abs(mat).clip(1e-8, None).max() - act_scale_in = 127. / act_range[0].cpu().numpy() + act_scale_in = 127. / np.array(act_range[0]) weight_scales = 127. / mat_max - act_scale_post = 127. / act_range[1].cpu().numpy() + act_scale_post = 127. / np.array(act_range[1]) mat_quant = (mat * weight_scales).round().astype(np.int8) return mat_quant, weight_scales, act_scale_in, act_scale_post @@ -145,7 +70,7 @@ def save_val(val, key, tp_num=None): val.tofile(path) - quantized_out = args.quantize or args.act_scale is not None + quantized_out = args.act_scale is not None if "input_layernorm.weight" in key or "input_layernorm.bias" in key or \ "attention.dense.bias" in key or "post_attention_layernorm.weight" in key or \ @@ -222,8 +147,8 @@ def save_val(val, key, tp_num=None): print("[ERROR] cannot find key '{}'".format(key)) def fuse_qkv_weight(q, k, v): - if q.dim() == 0: - qkv = torch.tensor((q.item(), k.item(), v.item())) + if isinstance(q, float): + qkv = torch.tensor((q, k, v)) else: qkv = torch.cat([q, k, v], dim=-1) return qkv @@ -239,29 +164,18 @@ def split_and_convert(args): i_gpu_num = args.infer_gpu_num assert(i_gpu_num % t_gpu_num == 0) - save_int8 = args.quantize or args.act_scale is not None + save_int8 = args.act_scale is not None factor = (int)(i_gpu_num / t_gpu_num) # load position_embedding from rank 0 - model = AutoModelForCausalLM.from_pretrained(args.in_file) + model = AutoModelForCausalLM.from_pretrained(args.in_file, device_map="auto") capture_dict = None - if args.quantize: - capture_dict = inject_range_detectors(model) - from datasets import load_dataset - Evaluator(load_dataset('lambada', split='validation[:1000]'), - AutoTokenizer.from_pretrained("facebook/opt-125m"), - "cuda").evaluate(model.to("cuda")) - remove_range_detectors(model) - model.to("cpu") - elif args.act_scale is not None: - scales = {key: value.max() for (key, value) in torch.load(args.act_scale).items()} + if args.act_scale is not None: capture_dict = {} - for key, value in scales.items(): - if key.endswith(".after"): - continue - capture_dict[key + ".weight"] = (value, scales[key + ".after"]) + for key, values in torch.load(args.act_scale).items(): + capture_dict[key + ".weight"] = (values["input"], values["output"]) hf_config = vars(model.config) @@ -387,7 +301,7 @@ def split_and_convert(args): starmap_args.append((0, saved_dir, factor, new_name, args, param.detach().cpu().numpy().astype(np_weight_data_type), capture_dict, name, np_weight_data_type)) - pool.starmap(split_and_convert_process, starmap_args) + pool.starmap_async(split_and_convert_process, starmap_args) pool.close() pool.join() @@ -402,9 +316,6 @@ def split_and_convert(args): parser.add_argument('-infer_gpu_num', '-i_g', type=int, help='How many gpus for inference', required=True) parser.add_argument("-processes", "-p", type=int, help="How many processes to spawn for conversion (default: 4)", default=4) parser.add_argument("-weight_data_type", type=str, default="fp32", choices=["fp32", "fp16"]) - parser.add_argument("-quantize", - help="Store selected in int8, run the models to determine scaling factors", - action="store_true") parser.add_argument("-act_scale", default=None, help="path to activation scalings for int8 conversion") args = parser.parse_args() @@ -413,10 +324,6 @@ def split_and_convert(args): print(f"{key}: {vars(args)[key]}") print("========================================") - if args.quantize and args.act_scale is not None: - print("[ERROR] Cannot specify both -quantize and -act_scale") - sys.exit() - start_time = datetime.now() split_and_convert(args) stop_time = datetime.now() diff --git a/examples/pytorch/gpt/utils/megatron_ckpt_convert.py b/examples/pytorch/gpt/utils/megatron_ckpt_convert.py index 62616376b..2ca53de48 100644 --- a/examples/pytorch/gpt/utils/megatron_ckpt_convert.py +++ b/examples/pytorch/gpt/utils/megatron_ckpt_convert.py @@ -1,568 +1,568 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. - -import argparse -import configparser -import datetime -import json -import multiprocessing -import pathlib -import re -import shutil -import sys - -import numpy as np -import torch # pytype: disable=import-error - -# verify if root package is in PYTHONPATH -__root_package_path__ = pathlib.Path(__file__).parent.parent.parent.parent.parent.absolute().as_posix() -if __root_package_path__ not in sys.path: - print( - f"[ERROR] add project root directory to your PYTHONPATH with " - f"'export PYTHONPATH={__root_package_path__}:${{PYTHONPATH}}'" - ) - -from examples.pytorch.gpt.utils.gpt import DEFAULT_START_TAG, DEFAULT_END_TAG, OPENAI_GPT2_START_ID, OPENAI_GPT2_END_ID -from examples.pytorch.utils import torch2np, safe_transpose, cpu_map_location, gpu_map_location, WEIGHT2DTYPE - - -def _inject_model_parallel_rank( - filepath, - tensor_model_parallel_size=1, - pipeline_model_parallel_size=1, - tensor_model_parallel_rank=0, - pipeline_model_parallel_rank=0, -): - """ - Injects tensor/pipeline model parallel ranks into the filepath. - Does nothing if not using model parallelism. - """ - filepath = pathlib.Path(filepath) - if tensor_model_parallel_size > 1 or pipeline_model_parallel_size > 1: - # filepath needs to be updated to include mp_rank - if pipeline_model_parallel_size is None or pipeline_model_parallel_size == 1: - filepath = filepath.parent / f"mp_rank_{tensor_model_parallel_rank:02d}" / filepath.name - else: - filepath = ( - filepath.parent / - f"mp_rank_{tensor_model_parallel_rank:02d}_{pipeline_model_parallel_rank:03d}" / - filepath.name - ) - if not filepath.exists(): - filepath = ( - filepath.parent / - f"tp_rank_{tensor_model_parallel_rank:02d}_pp_rank_{pipeline_model_parallel_rank:03d}" / - filepath.name - ) - return filepath - else: - if filepath.exists(): - return filepath - else: - return filepath.parent / "mp_rank_00" / filepath.name - - -def _create_model_training_args_for_checkpoint_version_0(args, model_00): - model_training_args = argparse.Namespace() - if args.head_num is None or args.trained_tensor_parallel_size is None: - raise ValueError( - "Provided checkpoint have missing training args. " - "Thus it is required to provide -head_num and -trained_tensor_parallel_size CLI arguments" - ) - model_training_args.num_attention_heads = args.head_num - model_training_args.tensor_model_parallel_size = args.trained_tensor_parallel_size - # megatron ckpt_ver=0 only supports pipeline_parallel_size = 1 - model_training_args.pipeline_model_parallel_size = 1 - model_training_args.max_position_embeddings = \ - model_00["model"]["language_model"]["embedding"]["position_embeddings"]["weight"].shape[0] - model_training_args.hidden_size = \ - model_00["model"]["language_model"]["embedding"]["position_embeddings"]["weight"].shape[1] - model_training_args.ffn_hidden_size = 4 * model_training_args.hidden_size - - def get_layer_num_from_weights(model_keys): - layer_num = 1 - for key in model_keys: - if re.search(r'\d+', key) is not None: - layer_num = max(int(re.search(r'\d+', key).group()), layer_num) - return layer_num + 1 - - model_training_args.num_layers = \ - get_layer_num_from_weights(model_00["model"]["language_model"]['transformer'].keys()) - - model_training_args.layernorm_epsilon = 1e-6 - - return model_training_args - - -# This tool is used to support the new megatron model trained by pipeline parallel + tensor parallel -def merge_and_convert_process(i, pipeline_para_rank, saved_dir, factor, key, model_training_args, transformer_model_list, ckpt_ver, np_weight_data_type): - saved_dir = pathlib.Path(saved_dir) - if key.find("layers.") != -1: - layer_index = (int)(key[7 : key.find(".", 7)]) - saved_key = key.replace( - "layers.%d." % layer_index, - "layers.%d." % (layer_index + pipeline_para_rank * model_training_args.num_layers // model_training_args.pipeline_model_parallel_size)) - - if saved_key.find("self_attention") != -1: - saved_key = saved_key.replace("self_attention", "attention") - if saved_key.find("adaptor1") != -1: - saved_key = saved_key.replace("adaptor1", "after_attention_adapter") - if saved_key.find("adaptor2") != -1: - saved_key = saved_key.replace("adaptor2", "after_ffn_adapter") - else: - saved_key = key - major_device = transformer_model_list[0][key].device - - if ( - key.find("input_layernorm.weight") != -1 - or key.find("input_layernorm.bias") != -1 - or key.find("attention.dense.bias") != -1 - or key.find("post_attention_layernorm.weight") != -1 - or key.find("post_attention_layernorm.bias") != -1 - or key.find("mlp.dense_4h_to_h.bias") != -1 - or key.find("adaptor1.dense_4h_to_h.bias") != -1 - or key.find("adaptor2.dense_4h_to_h.bias") != -1 - or key.find("final_layernorm.weight") != -1 - or key.find("final_layernorm.bias") != -1): - - # shared weights, only need to convert the weights of rank 0 - if i == 0: - saved_path = saved_dir / f"model.{saved_key}.bin" - val = safe_transpose(transformer_model_list[0][key]) - val = torch2np(val, np_weight_data_type) - val = np.squeeze(val) - val.tofile(saved_path) - - elif (key.find("attention.dense.weight") != -1 - or key.find("mlp.dense_4h_to_h.weight") != -1 - or key.find("adaptor1.dense_4h_to_h.weight") != -1 - or key.find("adaptor2.dense_4h_to_h.weight") != -1): - vals = [ - safe_transpose(transformer_model_list[k][key]).float().to(major_device) - for k in range(factor) - ] - val = torch.cat(vals, dim=0) - val = torch2np(val, np_weight_data_type) - saved_path = saved_dir / f"model.{saved_key}.{i:d}.bin" - val.tofile(saved_path) - - elif (key.find("mlp.dense_h_to_4h.weight") != -1 - or key.find("adaptor1.dense_h_to_4h.weight") != -1 - or key.find("adaptor2.dense_h_to_4h.weight") != -1 - or key.find("mlp.dense_h_to_4h.bias") != -1 - or key.find("adaptor1.dense_h_to_4h.bias") != -1 - or key.find("adaptor2.dense_h_to_4h.bias") != -1): - vals = [ - safe_transpose(transformer_model_list[k][key]).float().to(major_device) - for k in range(factor) - ] - val = torch.cat(vals, dim=-1) - val = torch2np(val, np_weight_data_type) - saved_path = saved_dir / f"model.{saved_key}.{i:d}.bin" - val.tofile(saved_path) - - elif key.find("attention.query_key_value.bias") != -1: - vals = [] - for k in range(factor): - val = safe_transpose(transformer_model_list[k][key]).float() - local_dim = int(val.shape[-1] / 3) - if ckpt_ver == 3: - num_splits = 3 - head_num = model_training_args.num_attention_heads // model_training_args.tensor_model_parallel_size - size_per_head = local_dim // head_num - val = val.reshape(head_num, num_splits, size_per_head) - val = val.permute(1, 0, 2) - val = val.reshape(3, local_dim) - vals.append(val.to(major_device)) - val = torch.cat(vals, dim=-1) - val = torch2np(val, np_weight_data_type) - saved_path = saved_dir / f"model.{saved_key}.{i:d}.bin" - val.tofile(saved_path) - - elif key.find("attention.query_key_value.weight") != -1: - vals = [] - for k in range(factor): - val = safe_transpose(transformer_model_list[k][key]).float() - hidden_dim = val.shape[0] - local_dim = int(val.shape[-1] / 3) - if ckpt_ver == 3: - num_splits = 3 - head_num = model_training_args.num_attention_heads - size_per_head = hidden_dim // head_num - head_num = head_num // model_training_args.tensor_model_parallel_size - val = val.reshape(hidden_dim, head_num, num_splits, size_per_head) - val = val.permute(0, 2, 1, 3) - val = val.reshape(hidden_dim, 3, local_dim) - vals.append(val.to(major_device)) - val = torch.cat(vals, dim=-1) - val = torch2np(val, np_weight_data_type) - saved_path = saved_dir / f"model.{saved_key}.{i:d}.bin" - val.tofile(saved_path) - - else: - print(f"[ERROR] cannot find key '{key}'") - - -def split_and_convert_process(i, pipeline_para_rank, saved_dir, factor, key, model_training_args, transformer_model_list, ckpt_ver, np_weight_data_type): - val = safe_transpose(transformer_model_list[0][key]) - val = torch2np(val, np_weight_data_type) - if key.find("layers.") != -1: - layer_index = (int)(key[7 : key.find(".", 7)]) - saved_key = key.replace( - "layers.%d." % layer_index, - "layers.%d." % (layer_index + pipeline_para_rank * model_training_args.num_layers // model_training_args.pipeline_model_parallel_size)) - - if saved_key.find("self_attention") != -1: - saved_key = saved_key.replace("self_attention", "attention") - if saved_key.find("adaptor1") != -1: - saved_key = saved_key.replace("adaptor1", "after_attention_adapter") - if saved_key.find("adaptor2") != -1: - saved_key = saved_key.replace("adaptor2", "after_ffn_adapter") - else: - saved_key = key - - if ( - key.find("input_layernorm.weight") != -1 - or key.find("input_layernorm.bias") != -1 - or key.find("attention.dense.bias") != -1 - or key.find("post_attention_layernorm.weight") != -1 - or key.find("post_attention_layernorm.bias") != -1 - or key.find("mlp.dense_4h_to_h.bias") != -1 - or key.find("adaptor1.dense_4h_to_h.bias") != -1 - or key.find("adaptor2.dense_4h_to_h.bias") != -1 - or key.find("final_layernorm.weight") != -1 - or key.find("final_layernorm.bias") != -1 - ): - # shared weights, only need to convert the weights of rank 0 - if i == 0: - saved_path = saved_dir / f"model.{saved_key}.bin" - val.tofile(saved_path.as_posix()) - - elif (key.find("attention.dense.weight") != -1 - or key.find("mlp.dense_4h_to_h.weight") != -1 - or key.find("adaptor1.dense_4h_to_h.weight") != -1 - or key.find("adaptor2.dense_4h_to_h.weight") != -1): - split_vals = np.split(val, factor, axis=0) - for j in range(factor): - saved_path = saved_dir / f"model.{saved_key}.{i * factor + j:d}.bin" - split_vals[j].tofile(saved_path.as_posix()) - - elif (key.find("mlp.dense_h_to_4h.weight") != -1 - or key.find("adaptor1.dense_h_to_4h.weight") != -1 - or key.find("adaptor2.dense_h_to_4h.weight") != -1 - or key.find("mlp.dense_h_to_4h.bias") != -1 - or key.find("adaptor1.dense_h_to_4h.bias") != -1 - or key.find("adaptor2.dense_h_to_4h.bias") != -1): - split_vals = np.split(val, factor, axis=-1) - for j in range(factor): - saved_path = saved_dir / f"model.{saved_key}.{i * factor + j:d}.bin" - split_vals[j].tofile(saved_path.as_posix()) - - elif key.find("attention.query_key_value.bias") != -1: - local_dim = int(val.shape[-1] / 3) - - if ckpt_ver == 3: - num_splits = 3 - head_num = model_training_args.num_attention_heads // model_training_args.tensor_model_parallel_size - size_per_head = local_dim // head_num - val = val.reshape(head_num, num_splits, size_per_head) - val = val.transpose(1, 0, 2) - - val = val.reshape(3, local_dim) - split_vals = np.split(val, factor, axis=-1) - - for j in range(factor): - saved_path = saved_dir / f"model.{saved_key}.{i * factor + j:d}.bin" - split_vals[j].tofile(saved_path.as_posix()) - - elif key.find("attention.query_key_value.weight") != -1: - hidden_dim = val.shape[0] - local_dim = int(val.shape[-1] / 3) - - if ckpt_ver == 3: - num_splits = 3 - head_num = model_training_args.num_attention_heads - size_per_head = hidden_dim // head_num - head_num = head_num // model_training_args.tensor_model_parallel_size - val = val.reshape(hidden_dim, head_num, num_splits, size_per_head) - val = val.transpose(0, 2, 1, 3) - - val = val.reshape(hidden_dim, 3, local_dim) - split_vals = np.split(val, factor, axis=-1) - - for j in range(factor): - saved_path = saved_dir / f"model.{saved_key}.{i * factor + j:d}.bin" - split_vals[j].tofile(saved_path.as_posix()) - - else: - print(f"[ERROR] cannot find key '{key}'") - - -def _get_checkpoint_name(checkpoint_dir): - - checkpoint_dir = pathlib.Path(checkpoint_dir) - patterns = [ - "model_optim_rng.pt", # older megatron checkpoints - "*last.ckpt", # newer format of checkpoints - ] - for pattern in patterns: - model_files = sorted(list(checkpoint_dir.rglob(pattern))) - if model_files: - return model_files[0].name - - raise ValueError(f"Could not find checkpoint files in {checkpoint_dir}") - - -def convert_checkpoint(args): - saved_dir = pathlib.Path(args.saved_dir) / f"{args.infer_gpu_num:d}-gpu" - if saved_dir.exists(): - print(f"[ERROR] Remove {saved_dir} target directory before running conversion") - sys.exit(1) - saved_dir.mkdir(parents=True) - - if args.vocab_path: - shutil.copy(args.vocab_path, (saved_dir / "vocab.json").as_posix()) - if args.merges_path: - shutil.copy(args.merges_path, (saved_dir / "merges.txt").as_posix()) - - load_checkpoints_to_cpu = bool(args.load_checkpoints_to_cpu) - map_location_fn = cpu_map_location if load_checkpoints_to_cpu else gpu_map_location - - checkpoints_dir = pathlib.Path(args.in_file) - checkpoint_name = _get_checkpoint_name(checkpoints_dir) - - # load position_embedding from rank 0 - checkpoints_paths = sorted(checkpoints_dir.rglob(checkpoint_name)) - if not checkpoints_paths: - print(f"[ERROR] Cannot find checkpoint in {checkpoints_dir}.") - exit(1) - model_00 = torch.load(checkpoints_paths[0].as_posix(), map_location=map_location_fn) - - if "hyper_parameters" in list(model_00.keys()): - print("Use nemo_ckpt_converter.py script for conversion of this checkpoint") - exit(1) - elif "args" in list(model_00.keys()): - checkpoint_version = model_00["checkpoint_version"] - model_training_args = model_00["args"] - megatron_gpt_key = "encoder" - else: - checkpoint_version = 0 - model_training_args = _create_model_training_args_for_checkpoint_version_0(args, model_00) - megatron_gpt_key = "transformer" - - with (saved_dir / "args.txt").open("w") as training_args_file: - for k, v in vars(model_training_args).items(): - training_args_file.write(f"{k}:{v}\n") - - np_weight_data_type = WEIGHT2DTYPE[args.weight_data_type] - - val = model_00["model"]["language_model"]["embedding"]["position_embeddings"]["weight"] - val = torch2np(val, np_weight_data_type) - val.tofile((saved_dir / "model.wpe.bin").as_posix()) # not weight, do not need to transpose - - del model_00 - w_e_list = [] - - training_tensor_para_size = model_training_args.tensor_model_parallel_size - training_pipeline_para_size = model_training_args.pipeline_model_parallel_size - inference_tensor_para_size = args.infer_gpu_num - - model_weights_paths = [ - [ - _inject_model_parallel_rank( - checkpoints_dir / checkpoint_name, - tensor_model_parallel_size=training_tensor_para_size, - pipeline_model_parallel_size=training_pipeline_para_size, - tensor_model_parallel_rank=tp_rank, - pipeline_model_parallel_rank=pp_rank, - ) - for pp_rank in range(training_pipeline_para_size) - ] - for tp_rank in range(training_tensor_para_size) - ] - - if training_tensor_para_size > inference_tensor_para_size: - assert training_tensor_para_size % inference_tensor_para_size == 0 - is_merge_ckpt = True - factor = int(training_tensor_para_size / inference_tensor_para_size) - else: - assert inference_tensor_para_size % training_tensor_para_size == 0 - is_merge_ckpt = False - factor = int(inference_tensor_para_size / training_tensor_para_size) - - main_loop = min(training_tensor_para_size, inference_tensor_para_size) - vocab_size_list = [0 for i in range(main_loop)] - - torch.multiprocessing.set_start_method("spawn") - torch.multiprocessing.set_sharing_strategy("file_system") - pool = multiprocessing.Pool(args.processes) - has_adapters = False - for i in range(main_loop): - for j in range(training_pipeline_para_size): - - transformer_models = [] - if is_merge_ckpt: - for k in range(factor): - m = torch.load(model_weights_paths[i * factor + k][j].as_posix(), map_location=map_location_fn) - if not has_adapters: - has_adapters = any("adaptor" in key for key in m['model']['language_model'][megatron_gpt_key].keys()) - transformer_models.append(m["model"]["language_model"][megatron_gpt_key]) - - if j == 0: - vocab_size_list[i] = m["model"]["language_model"]["embedding"]["word_embeddings"]["weight"].shape[0] - w_e_list.append(torch2np(m["model"]["language_model"]["embedding"]["word_embeddings"]["weight"], np_weight_data_type)) - else: - m = torch.load(model_weights_paths[i][j].as_posix(), map_location=map_location_fn) - if not has_adapters: - has_adapters = any("adaptor" in key for key in m['model']['language_model'][megatron_gpt_key].keys()) - - if j == 0: - vocab_size_list[i] = m["model"]["language_model"]["embedding"]["word_embeddings"]["weight"].shape[0] - w_e_list.append(torch2np( - m["model"]["language_model"]["embedding"]["word_embeddings"]["weight"], - np_weight_data_type - )) - transformer_models.append(m["model"]["language_model"][megatron_gpt_key]) - - pool.starmap( - merge_and_convert_process if is_merge_ckpt else split_and_convert_process, - [ - ( - i, - j, - saved_dir, - factor, - k, - model_training_args, - transformer_models, - checkpoint_version, - np_weight_data_type, - ) - for (k, v) in transformer_models[0].items() - ], - ) - - pool.close() - pool.join() - - torch.cuda.synchronize() - - np.concatenate(w_e_list, axis=0).tofile((saved_dir / "model.wte.bin").as_posix()) - - # save vocab_size - full_vocab_size = sum(vocab_size_list) - if not hasattr(model_training_args, "padded_vocab_size"): - model_training_args.padded_vocab_size = full_vocab_size - - # Configuration for the model (load by triton backends) - config = configparser.ConfigParser() - config["gpt"] = {} - - if args.vocab_path: - vocab_path = pathlib.Path(args.vocab_path) - with vocab_path.open("r") as vocab_file: - vocab = json.load(vocab_file) - start_id, end_id = vocab[DEFAULT_START_TAG], vocab[DEFAULT_END_TAG] - else: - # hard coded values from english gpt_vocab.json file - start_id, end_id = str(OPENAI_GPT2_START_ID), str(OPENAI_GPT2_END_ID) - try: - config["gpt"]["model_name"] = "gpt" - config["gpt"]["head_num"] = str(model_training_args.num_attention_heads) - config["gpt"]["size_per_head"] = str(model_training_args.hidden_size // model_training_args.num_attention_heads) - config["gpt"]["inter_size"] = str(model_training_args.ffn_hidden_size) - config["gpt"]["num_layer"] = str(model_training_args.num_layers) - config["gpt"]["max_pos_seq_len"] = str(model_training_args.max_position_embeddings) - config["gpt"]["vocab_size"] = str(model_training_args.padded_vocab_size) - config["gpt"]["has_adapters"] = str(has_adapters) - config['gpt']['adapter_inter_size'] = str(model_training_args.project_size) if has_adapters else str(0) - config["gpt"]["layernorm_eps"] = str(model_training_args.layernorm_epsilon) - config["gpt"]["start_id"] = str(start_id) - config["gpt"]["end_id"] = str(end_id) - config["gpt"]["weight_data_type"] = args.weight_data_type - config["gpt"]["tensor_para_size"] = str(args.infer_gpu_num) - with open((saved_dir / f"config.ini").as_posix(), 'w') as configfile: - config.write(configfile) - except Exception as e: - print(f"Fail to save the config in config.ini: {e}") - - -def main(): - parser = argparse.ArgumentParser(formatter_class=argparse.RawTextHelpFormatter) - parser.add_argument("--saved-dir", "-saved_dir", "-o", help="folder name of output files", required=True) - parser.add_argument( - "--in-file", "-in_file", "-i", help="file name of input checkpoint file", required=True - ) - parser.add_argument( - "--infer-gpu-num", "-infer_gpu_num", "-i_g", type=int, help="How many gpus for inference", required=True - ) - # -h_n and -t_g are needed when megatron_ckpt_version = 0, for example the public megatron 345M gpt model - parser.add_argument( - "--head-num", - "-head_num", - "-h_n", - type=int, - help="The number of heads, only needed when weight doesn't contain structure hyperparameters" - ) - parser.add_argument( - "--trained-tensor-parallel-size", - "-trained_tensor_parallel_size", - "-t_g", - type=int, - help="the tensor parallel size for training" - ) - parser.add_argument( - "--processes", - "-processes", - "-p", - type=int, - default=16, - help="How many processes to spawn for conversion", - ) - parser.add_argument( - "--weight-data-type", "-weight_data_type", choices=["fp32", "fp16"], default="fp32", help="" - ) - parser.add_argument( - "--load-checkpoints-to-cpu", - "-load_checkpoints_to_cpu", - "-cpu", - type=int, - choices=[0, 1], - default=1, - help="Whether to load model weights to CPU", - ) - parser.add_argument( - "--vocab-path", - type=str, - help="Path to vocabulary file to embed in FasterTransformer checkpoint", - required=False, - ) - parser.add_argument( - "--merges-path", type=str, help="Path to merges file to embed in FasterTransformer checkpoint", required=False - ) - - args = parser.parse_args() - print("\n=============== Argument ===============") - for key in vars(args): - print(f"{key}: {vars(args)[key]}") - print("========================================") - - start_time = datetime.datetime.now() - convert_checkpoint(args) - run_time = datetime.datetime.now() - start_time - print(f"[INFO] Spent {run_time} (h:m:s) to convert the model") - - -if __name__ == "__main__": - main() +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import argparse +import configparser +import datetime +import json +import multiprocessing +import pathlib +import re +import shutil +import sys + +import numpy as np +import torch # pytype: disable=import-error + +# verify if root package is in PYTHONPATH +__root_package_path__ = pathlib.Path(__file__).parent.parent.parent.parent.parent.absolute().as_posix() +if __root_package_path__ not in sys.path: + print( + f"[ERROR] add project root directory to your PYTHONPATH with " + f"'export PYTHONPATH={__root_package_path__}:${{PYTHONPATH}}'" + ) + +from examples.pytorch.gpt.utils.gpt import DEFAULT_START_TAG, DEFAULT_END_TAG, OPENAI_GPT2_START_ID, OPENAI_GPT2_END_ID +from examples.pytorch.utils import torch2np, safe_transpose, cpu_map_location, gpu_map_location, WEIGHT2DTYPE + + +def _inject_model_parallel_rank( + filepath, + tensor_model_parallel_size=1, + pipeline_model_parallel_size=1, + tensor_model_parallel_rank=0, + pipeline_model_parallel_rank=0, +): + """ + Injects tensor/pipeline model parallel ranks into the filepath. + Does nothing if not using model parallelism. + """ + filepath = pathlib.Path(filepath) + if tensor_model_parallel_size > 1 or pipeline_model_parallel_size > 1: + # filepath needs to be updated to include mp_rank + if pipeline_model_parallel_size is None or pipeline_model_parallel_size == 1: + filepath = filepath.parent / f"mp_rank_{tensor_model_parallel_rank:02d}" / filepath.name + else: + filepath = ( + filepath.parent / + f"mp_rank_{tensor_model_parallel_rank:02d}_{pipeline_model_parallel_rank:03d}" / + filepath.name + ) + if not filepath.exists(): + filepath = ( + filepath.parent / + f"tp_rank_{tensor_model_parallel_rank:02d}_pp_rank_{pipeline_model_parallel_rank:03d}" / + filepath.name + ) + return filepath + else: + if filepath.exists(): + return filepath + else: + return filepath.parent / "mp_rank_00" / filepath.name + + +def _create_model_training_args_for_checkpoint_version_0(args, model_00): + model_training_args = argparse.Namespace() + if args.head_num is None or args.trained_tensor_parallel_size is None: + raise ValueError( + "Provided checkpoint have missing training args. " + "Thus it is required to provide -head_num and -trained_tensor_parallel_size CLI arguments" + ) + model_training_args.num_attention_heads = args.head_num + model_training_args.tensor_model_parallel_size = args.trained_tensor_parallel_size + # megatron ckpt_ver=0 only supports pipeline_parallel_size = 1 + model_training_args.pipeline_model_parallel_size = 1 + model_training_args.max_position_embeddings = \ + model_00["model"]["language_model"]["embedding"]["position_embeddings"]["weight"].shape[0] + model_training_args.hidden_size = \ + model_00["model"]["language_model"]["embedding"]["position_embeddings"]["weight"].shape[1] + model_training_args.ffn_hidden_size = 4 * model_training_args.hidden_size + + def get_layer_num_from_weights(model_keys): + layer_num = 1 + for key in model_keys: + if re.search(r'\d+', key) is not None: + layer_num = max(int(re.search(r'\d+', key).group()), layer_num) + return layer_num + 1 + + model_training_args.num_layers = \ + get_layer_num_from_weights(model_00["model"]["language_model"]['transformer'].keys()) + + model_training_args.layernorm_epsilon = 1e-6 + + return model_training_args + + +# This tool is used to support the new megatron model trained by pipeline parallel + tensor parallel +def merge_and_convert_process(i, pipeline_para_rank, saved_dir, factor, key, model_training_args, transformer_model_list, ckpt_ver, np_weight_data_type): + saved_dir = pathlib.Path(saved_dir) + if key.find("layers.") != -1: + layer_index = (int)(key[7 : key.find(".", 7)]) + saved_key = key.replace( + "layers.%d." % layer_index, + "layers.%d." % (layer_index + pipeline_para_rank * model_training_args.num_layers // model_training_args.pipeline_model_parallel_size)) + + if saved_key.find("self_attention") != -1: + saved_key = saved_key.replace("self_attention", "attention") + if saved_key.find("adaptor1") != -1: + saved_key = saved_key.replace("adaptor1", "after_attention_adapter") + if saved_key.find("adaptor2") != -1: + saved_key = saved_key.replace("adaptor2", "after_ffn_adapter") + else: + saved_key = key + major_device = transformer_model_list[0][key].device + + if ( + key.find("input_layernorm.weight") != -1 + or key.find("input_layernorm.bias") != -1 + or key.find("attention.dense.bias") != -1 + or key.find("post_attention_layernorm.weight") != -1 + or key.find("post_attention_layernorm.bias") != -1 + or key.find("mlp.dense_4h_to_h.bias") != -1 + or key.find("adaptor1.dense_4h_to_h.bias") != -1 + or key.find("adaptor2.dense_4h_to_h.bias") != -1 + or key.find("final_layernorm.weight") != -1 + or key.find("final_layernorm.bias") != -1): + + # shared weights, only need to convert the weights of rank 0 + if i == 0: + saved_path = saved_dir / f"model.{saved_key}.bin" + val = safe_transpose(transformer_model_list[0][key]) + val = torch2np(val, np_weight_data_type) + val = np.squeeze(val) + val.tofile(saved_path) + + elif (key.find("attention.dense.weight") != -1 + or key.find("mlp.dense_4h_to_h.weight") != -1 + or key.find("adaptor1.dense_4h_to_h.weight") != -1 + or key.find("adaptor2.dense_4h_to_h.weight") != -1): + vals = [ + safe_transpose(transformer_model_list[k][key]).float().to(major_device) + for k in range(factor) + ] + val = torch.cat(vals, dim=0) + val = torch2np(val, np_weight_data_type) + saved_path = saved_dir / f"model.{saved_key}.{i:d}.bin" + val.tofile(saved_path) + + elif (key.find("mlp.dense_h_to_4h.weight") != -1 + or key.find("adaptor1.dense_h_to_4h.weight") != -1 + or key.find("adaptor2.dense_h_to_4h.weight") != -1 + or key.find("mlp.dense_h_to_4h.bias") != -1 + or key.find("adaptor1.dense_h_to_4h.bias") != -1 + or key.find("adaptor2.dense_h_to_4h.bias") != -1): + vals = [ + safe_transpose(transformer_model_list[k][key]).float().to(major_device) + for k in range(factor) + ] + val = torch.cat(vals, dim=-1) + val = torch2np(val, np_weight_data_type) + saved_path = saved_dir / f"model.{saved_key}.{i:d}.bin" + val.tofile(saved_path) + + elif key.find("attention.query_key_value.bias") != -1: + vals = [] + for k in range(factor): + val = safe_transpose(transformer_model_list[k][key]).float() + local_dim = int(val.shape[-1] / 3) + if ckpt_ver == 3: + num_splits = 3 + head_num = model_training_args.num_attention_heads // model_training_args.tensor_model_parallel_size + size_per_head = local_dim // head_num + val = val.reshape(head_num, num_splits, size_per_head) + val = val.permute(1, 0, 2) + val = val.reshape(3, local_dim) + vals.append(val.to(major_device)) + val = torch.cat(vals, dim=-1) + val = torch2np(val, np_weight_data_type) + saved_path = saved_dir / f"model.{saved_key}.{i:d}.bin" + val.tofile(saved_path) + + elif key.find("attention.query_key_value.weight") != -1: + vals = [] + for k in range(factor): + val = safe_transpose(transformer_model_list[k][key]).float() + hidden_dim = val.shape[0] + local_dim = int(val.shape[-1] / 3) + if ckpt_ver == 3: + num_splits = 3 + head_num = model_training_args.num_attention_heads + size_per_head = hidden_dim // head_num + head_num = head_num // model_training_args.tensor_model_parallel_size + val = val.reshape(hidden_dim, head_num, num_splits, size_per_head) + val = val.permute(0, 2, 1, 3) + val = val.reshape(hidden_dim, 3, local_dim) + vals.append(val.to(major_device)) + val = torch.cat(vals, dim=-1) + val = torch2np(val, np_weight_data_type) + saved_path = saved_dir / f"model.{saved_key}.{i:d}.bin" + val.tofile(saved_path) + + else: + print(f"[ERROR] cannot find key '{key}'") + + +def split_and_convert_process(i, pipeline_para_rank, saved_dir, factor, key, model_training_args, transformer_model_list, ckpt_ver, np_weight_data_type): + val = safe_transpose(transformer_model_list[0][key]) + val = torch2np(val, np_weight_data_type) + if key.find("layers.") != -1: + layer_index = (int)(key[7 : key.find(".", 7)]) + saved_key = key.replace( + "layers.%d." % layer_index, + "layers.%d." % (layer_index + pipeline_para_rank * model_training_args.num_layers // model_training_args.pipeline_model_parallel_size)) + + if saved_key.find("self_attention") != -1: + saved_key = saved_key.replace("self_attention", "attention") + if saved_key.find("adaptor1") != -1: + saved_key = saved_key.replace("adaptor1", "after_attention_adapter") + if saved_key.find("adaptor2") != -1: + saved_key = saved_key.replace("adaptor2", "after_ffn_adapter") + else: + saved_key = key + + if ( + key.find("input_layernorm.weight") != -1 + or key.find("input_layernorm.bias") != -1 + or key.find("attention.dense.bias") != -1 + or key.find("post_attention_layernorm.weight") != -1 + or key.find("post_attention_layernorm.bias") != -1 + or key.find("mlp.dense_4h_to_h.bias") != -1 + or key.find("adaptor1.dense_4h_to_h.bias") != -1 + or key.find("adaptor2.dense_4h_to_h.bias") != -1 + or key.find("final_layernorm.weight") != -1 + or key.find("final_layernorm.bias") != -1 + ): + # shared weights, only need to convert the weights of rank 0 + if i == 0: + saved_path = saved_dir / f"model.{saved_key}.bin" + val.tofile(saved_path.as_posix()) + + elif (key.find("attention.dense.weight") != -1 + or key.find("mlp.dense_4h_to_h.weight") != -1 + or key.find("adaptor1.dense_4h_to_h.weight") != -1 + or key.find("adaptor2.dense_4h_to_h.weight") != -1): + split_vals = np.split(val, factor, axis=0) + for j in range(factor): + saved_path = saved_dir / f"model.{saved_key}.{i * factor + j:d}.bin" + split_vals[j].tofile(saved_path.as_posix()) + + elif (key.find("mlp.dense_h_to_4h.weight") != -1 + or key.find("adaptor1.dense_h_to_4h.weight") != -1 + or key.find("adaptor2.dense_h_to_4h.weight") != -1 + or key.find("mlp.dense_h_to_4h.bias") != -1 + or key.find("adaptor1.dense_h_to_4h.bias") != -1 + or key.find("adaptor2.dense_h_to_4h.bias") != -1): + split_vals = np.split(val, factor, axis=-1) + for j in range(factor): + saved_path = saved_dir / f"model.{saved_key}.{i * factor + j:d}.bin" + split_vals[j].tofile(saved_path.as_posix()) + + elif key.find("attention.query_key_value.bias") != -1: + local_dim = int(val.shape[-1] / 3) + + if ckpt_ver == 3: + num_splits = 3 + head_num = model_training_args.num_attention_heads // model_training_args.tensor_model_parallel_size + size_per_head = local_dim // head_num + val = val.reshape(head_num, num_splits, size_per_head) + val = val.transpose(1, 0, 2) + + val = val.reshape(3, local_dim) + split_vals = np.split(val, factor, axis=-1) + + for j in range(factor): + saved_path = saved_dir / f"model.{saved_key}.{i * factor + j:d}.bin" + split_vals[j].tofile(saved_path.as_posix()) + + elif key.find("attention.query_key_value.weight") != -1: + hidden_dim = val.shape[0] + local_dim = int(val.shape[-1] / 3) + + if ckpt_ver == 3: + num_splits = 3 + head_num = model_training_args.num_attention_heads + size_per_head = hidden_dim // head_num + head_num = head_num // model_training_args.tensor_model_parallel_size + val = val.reshape(hidden_dim, head_num, num_splits, size_per_head) + val = val.transpose(0, 2, 1, 3) + + val = val.reshape(hidden_dim, 3, local_dim) + split_vals = np.split(val, factor, axis=-1) + + for j in range(factor): + saved_path = saved_dir / f"model.{saved_key}.{i * factor + j:d}.bin" + split_vals[j].tofile(saved_path.as_posix()) + + else: + print(f"[ERROR] cannot find key '{key}'") + + +def _get_checkpoint_name(checkpoint_dir): + + checkpoint_dir = pathlib.Path(checkpoint_dir) + patterns = [ + "model_optim_rng.pt", # older megatron checkpoints + "*last.ckpt", # newer format of checkpoints + ] + for pattern in patterns: + model_files = sorted(list(checkpoint_dir.rglob(pattern))) + if model_files: + return model_files[0].name + + raise ValueError(f"Could not find checkpoint files in {checkpoint_dir}") + + +def convert_checkpoint(args): + saved_dir = pathlib.Path(args.saved_dir) / f"{args.infer_gpu_num:d}-gpu" + if saved_dir.exists(): + print(f"[ERROR] Remove {saved_dir} target directory before running conversion") + sys.exit(1) + saved_dir.mkdir(parents=True) + + if args.vocab_path: + shutil.copy(args.vocab_path, (saved_dir / "vocab.json").as_posix()) + if args.merges_path: + shutil.copy(args.merges_path, (saved_dir / "merges.txt").as_posix()) + + load_checkpoints_to_cpu = bool(args.load_checkpoints_to_cpu) + map_location_fn = cpu_map_location if load_checkpoints_to_cpu else gpu_map_location + + checkpoints_dir = pathlib.Path(args.in_file) + checkpoint_name = _get_checkpoint_name(checkpoints_dir) + + # load position_embedding from rank 0 + checkpoints_paths = sorted(checkpoints_dir.rglob(checkpoint_name)) + if not checkpoints_paths: + print(f"[ERROR] Cannot find checkpoint in {checkpoints_dir}.") + exit(1) + model_00 = torch.load(checkpoints_paths[0].as_posix(), map_location=map_location_fn) + + if "hyper_parameters" in list(model_00.keys()): + print("Use nemo_ckpt_converter.py script for conversion of this checkpoint") + exit(1) + elif "args" in list(model_00.keys()): + checkpoint_version = model_00["checkpoint_version"] + model_training_args = model_00["args"] + megatron_gpt_key = "encoder" + else: + checkpoint_version = 0 + model_training_args = _create_model_training_args_for_checkpoint_version_0(args, model_00) + megatron_gpt_key = "transformer" + + with (saved_dir / "args.txt").open("w") as training_args_file: + for k, v in vars(model_training_args).items(): + training_args_file.write(f"{k}:{v}\n") + + np_weight_data_type = WEIGHT2DTYPE[args.weight_data_type] + + val = model_00["model"]["language_model"]["embedding"]["position_embeddings"]["weight"] + val = torch2np(val, np_weight_data_type) + val.tofile((saved_dir / "model.wpe.bin").as_posix()) # not weight, do not need to transpose + + del model_00 + w_e_list = [] + + training_tensor_para_size = model_training_args.tensor_model_parallel_size + training_pipeline_para_size = model_training_args.pipeline_model_parallel_size + inference_tensor_para_size = args.infer_gpu_num + + model_weights_paths = [ + [ + _inject_model_parallel_rank( + checkpoints_dir / checkpoint_name, + tensor_model_parallel_size=training_tensor_para_size, + pipeline_model_parallel_size=training_pipeline_para_size, + tensor_model_parallel_rank=tp_rank, + pipeline_model_parallel_rank=pp_rank, + ) + for pp_rank in range(training_pipeline_para_size) + ] + for tp_rank in range(training_tensor_para_size) + ] + + if training_tensor_para_size > inference_tensor_para_size: + assert training_tensor_para_size % inference_tensor_para_size == 0 + is_merge_ckpt = True + factor = int(training_tensor_para_size / inference_tensor_para_size) + else: + assert inference_tensor_para_size % training_tensor_para_size == 0 + is_merge_ckpt = False + factor = int(inference_tensor_para_size / training_tensor_para_size) + + main_loop = min(training_tensor_para_size, inference_tensor_para_size) + vocab_size_list = [0 for i in range(main_loop)] + + torch.multiprocessing.set_start_method("spawn") + torch.multiprocessing.set_sharing_strategy("file_system") + pool = multiprocessing.Pool(args.processes) + has_adapters = False + for i in range(main_loop): + for j in range(training_pipeline_para_size): + + transformer_models = [] + if is_merge_ckpt: + for k in range(factor): + m = torch.load(model_weights_paths[i * factor + k][j].as_posix(), map_location=map_location_fn) + if not has_adapters: + has_adapters = any("adaptor" in key for key in m['model']['language_model'][megatron_gpt_key].keys()) + transformer_models.append(m["model"]["language_model"][megatron_gpt_key]) + + if j == 0: + vocab_size_list[i] = m["model"]["language_model"]["embedding"]["word_embeddings"]["weight"].shape[0] + w_e_list.append(torch2np(m["model"]["language_model"]["embedding"]["word_embeddings"]["weight"], np_weight_data_type)) + else: + m = torch.load(model_weights_paths[i][j].as_posix(), map_location=map_location_fn) + if not has_adapters: + has_adapters = any("adaptor" in key for key in m['model']['language_model'][megatron_gpt_key].keys()) + + if j == 0: + vocab_size_list[i] = m["model"]["language_model"]["embedding"]["word_embeddings"]["weight"].shape[0] + w_e_list.append(torch2np( + m["model"]["language_model"]["embedding"]["word_embeddings"]["weight"], + np_weight_data_type + )) + transformer_models.append(m["model"]["language_model"][megatron_gpt_key]) + + pool.starmap( + merge_and_convert_process if is_merge_ckpt else split_and_convert_process, + [ + ( + i, + j, + saved_dir, + factor, + k, + model_training_args, + transformer_models, + checkpoint_version, + np_weight_data_type, + ) + for (k, v) in transformer_models[0].items() + ], + ) + + pool.close() + pool.join() + + torch.cuda.synchronize() + + np.concatenate(w_e_list, axis=0).tofile((saved_dir / "model.wte.bin").as_posix()) + + # save vocab_size + full_vocab_size = sum(vocab_size_list) + if not hasattr(model_training_args, "padded_vocab_size"): + model_training_args.padded_vocab_size = full_vocab_size + + # Configuration for the model (load by triton backends) + config = configparser.ConfigParser() + config["gpt"] = {} + + if args.vocab_path: + vocab_path = pathlib.Path(args.vocab_path) + with vocab_path.open("r") as vocab_file: + vocab = json.load(vocab_file) + start_id, end_id = vocab[DEFAULT_START_TAG], vocab[DEFAULT_END_TAG] + else: + # hard coded values from english gpt_vocab.json file + start_id, end_id = str(OPENAI_GPT2_START_ID), str(OPENAI_GPT2_END_ID) + try: + config["gpt"]["model_name"] = "gpt" + config["gpt"]["head_num"] = str(model_training_args.num_attention_heads) + config["gpt"]["size_per_head"] = str(model_training_args.hidden_size // model_training_args.num_attention_heads) + config["gpt"]["inter_size"] = str(model_training_args.ffn_hidden_size) + config["gpt"]["num_layer"] = str(model_training_args.num_layers) + config["gpt"]["max_pos_seq_len"] = str(model_training_args.max_position_embeddings) + config["gpt"]["vocab_size"] = str(model_training_args.padded_vocab_size) + config["gpt"]["has_adapters"] = str(has_adapters) + config['gpt']['adapter_inter_size'] = str(model_training_args.project_size) if has_adapters else str(0) + config["gpt"]["layernorm_eps"] = str(model_training_args.layernorm_epsilon) + config["gpt"]["start_id"] = str(start_id) + config["gpt"]["end_id"] = str(end_id) + config["gpt"]["weight_data_type"] = args.weight_data_type + config["gpt"]["tensor_para_size"] = str(args.infer_gpu_num) + with open((saved_dir / f"config.ini").as_posix(), 'w') as configfile: + config.write(configfile) + except Exception as e: + print(f"Fail to save the config in config.ini: {e}") + + +def main(): + parser = argparse.ArgumentParser(formatter_class=argparse.RawTextHelpFormatter) + parser.add_argument("--saved-dir", "-saved_dir", "-o", help="folder name of output files", required=True) + parser.add_argument( + "--in-file", "-in_file", "-i", help="file name of input checkpoint file", required=True + ) + parser.add_argument( + "--infer-gpu-num", "-infer_gpu_num", "-i_g", type=int, help="How many gpus for inference", required=True + ) + # -h_n and -t_g are needed when megatron_ckpt_version = 0, for example the public megatron 345M gpt model + parser.add_argument( + "--head-num", + "-head_num", + "-h_n", + type=int, + help="The number of heads, only needed when weight doesn't contain structure hyperparameters" + ) + parser.add_argument( + "--trained-tensor-parallel-size", + "-trained_tensor_parallel_size", + "-t_g", + type=int, + help="the tensor parallel size for training" + ) + parser.add_argument( + "--processes", + "-processes", + "-p", + type=int, + default=16, + help="How many processes to spawn for conversion", + ) + parser.add_argument( + "--weight-data-type", "-weight_data_type", choices=["fp32", "fp16"], default="fp32", help="" + ) + parser.add_argument( + "--load-checkpoints-to-cpu", + "-load_checkpoints_to_cpu", + "-cpu", + type=int, + choices=[0, 1], + default=1, + help="Whether to load model weights to CPU", + ) + parser.add_argument( + "--vocab-path", + type=str, + help="Path to vocabulary file to embed in FasterTransformer checkpoint", + required=False, + ) + parser.add_argument( + "--merges-path", type=str, help="Path to merges file to embed in FasterTransformer checkpoint", required=False + ) + + args = parser.parse_args() + print("\n=============== Argument ===============") + for key in vars(args): + print(f"{key}: {vars(args)[key]}") + print("========================================") + + start_time = datetime.datetime.now() + convert_checkpoint(args) + run_time = datetime.datetime.now() - start_time + print(f"[INFO] Spent {run_time} (h:m:s) to convert the model") + + +if __name__ == "__main__": + main() diff --git a/examples/pytorch/gpt/utils/megatron_fp8_ckpt_convert.py b/examples/pytorch/gpt/utils/megatron_fp8_ckpt_convert.py new file mode 100644 index 000000000..2cb49e78f --- /dev/null +++ b/examples/pytorch/gpt/utils/megatron_fp8_ckpt_convert.py @@ -0,0 +1,694 @@ +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import argparse +import configparser +import datetime +import json +import multiprocessing +import pathlib +import re +import shutil +import sys + +import numpy as np +import torch # pytype: disable=import-error + +# verify if root package is in PYTHONPATH +__root_package_path__ = pathlib.Path(__file__).parent.parent.parent.parent.parent.absolute().as_posix() +if __root_package_path__ not in sys.path: + print( + f"[ERROR] add project root directory to your PYTHONPATH with " + f"'export PYTHONPATH={__root_package_path__}:${{PYTHONPATH}}'" + ) + +from examples.pytorch.gpt.utils.gpt import DEFAULT_START_TAG, DEFAULT_END_TAG, OPENAI_GPT2_START_ID, OPENAI_GPT2_END_ID +from examples.pytorch.utils import torch2np, safe_transpose, cpu_map_location, gpu_map_location, WEIGHT2DTYPE + + +def _inject_model_parallel_rank( + filepath, + tensor_model_parallel_size=1, + pipeline_model_parallel_size=1, + tensor_model_parallel_rank=0, + pipeline_model_parallel_rank=0, +): + """ + Injects tensor/pipeline model parallel ranks into the filepath. + Does nothing if not using model parallelism. + """ + filepath = pathlib.Path(filepath) + if tensor_model_parallel_size > 1 or pipeline_model_parallel_size > 1: + # filepath needs to be updated to include mp_rank + if pipeline_model_parallel_size is None or pipeline_model_parallel_size == 1: + filepath = filepath.parent / f"mp_rank_{tensor_model_parallel_rank:02d}" / filepath.name + else: + filepath = ( + filepath.parent / + f"mp_rank_{tensor_model_parallel_rank:02d}_{pipeline_model_parallel_rank:03d}" / + filepath.name + ) + if not filepath.exists(): + filepath = ( + filepath.parent / + f"tp_rank_{tensor_model_parallel_rank:02d}_pp_rank_{pipeline_model_parallel_rank:03d}" / + filepath.name + ) + return filepath + else: + if filepath.exists(): + return filepath + else: + return filepath.parent / "mp_rank_00" / filepath.name + + +def _create_model_training_args_for_checkpoint_version_0(args, model_00): + model_training_args = argparse.Namespace() + if args.head_num is None or args.trained_tensor_parallel_size is None: + raise ValueError( + "Provided checkpoint have missing training args. " + "Thus it is required to provide -head_num and -trained_tensor_parallel_size CLI arguments" + ) + model_training_args.num_attention_heads = args.head_num + model_training_args.tensor_model_parallel_size = args.trained_tensor_parallel_size + # megatron ckpt_ver=0 only supports pipeline_parallel_size = 1 + model_training_args.pipeline_model_parallel_size = 1 + model_training_args.max_position_embeddings = \ + model_00["model"]["language_model"]["embedding"]["position_embeddings"]["weight"].shape[0] + model_training_args.hidden_size = \ + model_00["model"]["language_model"]["embedding"]["position_embeddings"]["weight"].shape[1] + model_training_args.ffn_hidden_size = 4 * model_training_args.hidden_size + + def get_layer_num_from_weights(model_keys): + layer_num = 1 + for key in model_keys: + if re.search(r'\d+', key) is not None: + layer_num = max(int(re.search(r'\d+', key).group()), layer_num) + return layer_num + 1 + + model_training_args.num_layers = \ + get_layer_num_from_weights(model_00["model"]["language_model"]['transformer'].keys()) + + model_training_args.layernorm_epsilon = 1e-6 + + return model_training_args + + +# This tool is used to support the new megatron model trained by pipeline parallel + tensor parallel +def merge_and_convert_process(i, pipeline_para_rank, saved_dir, factor, key, model_training_args, transformer_model_list, ckpt_ver, np_weight_data_type): + saved_dir = pathlib.Path(saved_dir) + if key.find("layers.") != -1: + layer_index = (int)(key[7 : key.find(".", 7)]) + saved_key = key.replace( + "layers.%d." % layer_index, + "layers.%d." % (layer_index + pipeline_para_rank * model_training_args.num_layers // model_training_args.pipeline_model_parallel_size)) + + if saved_key.find("self_attention") != -1: + saved_key = saved_key.replace("self_attention", "attention") + if saved_key.find("adaptor1") != -1: + saved_key = saved_key.replace("adaptor1", "after_attention_adapter") + if saved_key.find("adaptor2") != -1: + saved_key = saved_key.replace("adaptor2", "after_ffn_adapter") + else: + saved_key = key + major_device = transformer_model_list[0][key].device + + if ( + key.find("input_layernorm.weight") != -1 + or key.find("input_layernorm.bias") != -1 + or key.find("attention.dense.bias") != -1 + or key.find("post_attention_layernorm.weight") != -1 + or key.find("post_attention_layernorm.bias") != -1 + or key.find("mlp.dense_4h_to_h.bias") != -1 + or key.find("adaptor1.dense_4h_to_h.bias") != -1 + or key.find("adaptor2.dense_4h_to_h.bias") != -1 + or key.find("final_layernorm.weight") != -1 + or key.find("final_layernorm.bias") != -1 + or key.find("self_attention.query_key_value.fp_linear.fi") != -1 + or key.find("self_attention.query_key_value.fp_linear.fw") != -1 + or key.find("self_attention.query_key_value.fp_linear.fo") != -1 + or key.find("self_attention.dense.fp_linear.fi") != -1 + or key.find("self_attention.dense.fp_linear.fw") != -1 + or key.find("self_attention.dense.fp_linear.fo") != -1 + or key.find("mlp.dense_h_to_4h.fp_linear.fi") != -1 + or key.find("mlp.dense_h_to_4h.fp_linear.fw") != -1 + or key.find("mlp.dense_h_to_4h.fp_linear.fo") != -1 + or key.find("mlp.dense_4h_to_h.fp_linear.fi") != -1 + or key.find("mlp.dense_4h_to_h.fp_linear.fw") != -1 + or key.find("mlp.dense_4h_to_h.fp_linear.fo") != -1): + + # shared weights, only need to convert the weights of rank 0 + if i == 0: + saved_path = saved_dir / f"model.{saved_key}.bin" + val = safe_transpose(transformer_model_list[0][key]) + val = torch2np(val, np_weight_data_type) + val = np.squeeze(val) + val.tofile(saved_path) + + elif (key.find("attention.dense.weight") != -1 + or key.find("mlp.dense_4h_to_h.weight") != -1 + or key.find("adaptor1.dense_4h_to_h.weight") != -1 + or key.find("adaptor2.dense_4h_to_h.weight") != -1): + vals = [ + safe_transpose(transformer_model_list[k][key]).float().to(major_device) + for k in range(factor) + ] + val = torch.cat(vals, dim=0) + val = torch2np(val, np_weight_data_type) + saved_path = saved_dir / f"model.{saved_key}.{i:d}.bin" + val.tofile(saved_path) + + elif (key.find("mlp.dense_h_to_4h.weight") != -1 + or key.find("adaptor1.dense_h_to_4h.weight") != -1 + or key.find("adaptor2.dense_h_to_4h.weight") != -1 + or key.find("mlp.dense_h_to_4h.bias") != -1 + or key.find("adaptor1.dense_h_to_4h.bias") != -1 + or key.find("adaptor2.dense_h_to_4h.bias") != -1): + vals = [ + safe_transpose(transformer_model_list[k][key]).float().to(major_device) + for k in range(factor) + ] + val = torch.cat(vals, dim=-1) + val = torch2np(val, np_weight_data_type) + saved_path = saved_dir / f"model.{saved_key}.{i:d}.bin" + val.tofile(saved_path) + + elif key.find("attention.query_key_value.bias") != -1: + vals = [] + for k in range(factor): + val = safe_transpose(transformer_model_list[k][key]).float() + local_dim = int(val.shape[-1] / 3) + if ckpt_ver == 3: + num_splits = 3 + head_num = model_training_args.num_attention_heads // model_training_args.tensor_model_parallel_size + size_per_head = local_dim // head_num + val = val.reshape(head_num, num_splits, size_per_head) + val = val.permute(1, 0, 2) + val = val.reshape(3, local_dim) + vals.append(val.to(major_device)) + val = torch.cat(vals, dim=-1) + val = torch2np(val, np_weight_data_type) + saved_path = saved_dir / f"model.{saved_key}.{i:d}.bin" + val.tofile(saved_path) + + elif key.find("attention.query_key_value.weight") != -1: + vals = [] + for k in range(factor): + val = safe_transpose(transformer_model_list[k][key]).float() + hidden_dim = val.shape[0] + local_dim = int(val.shape[-1] / 3) + if ckpt_ver == 3: + num_splits = 3 + head_num = model_training_args.num_attention_heads + size_per_head = hidden_dim // head_num + head_num = head_num // model_training_args.tensor_model_parallel_size + val = val.reshape(hidden_dim, head_num, num_splits, size_per_head) + val = val.permute(0, 2, 1, 3) + val = val.reshape(hidden_dim, 3, local_dim) + vals.append(val.to(major_device)) + val = torch.cat(vals, dim=-1) + val = torch2np(val, np_weight_data_type) + saved_path = saved_dir / f"model.{saved_key}.{i:d}.bin" + val.tofile(saved_path) + elif (key.find("self_attention.query_key_value.fp_linear.di") != -1 + or key.find("self_attention.query_key_value.fp_linear.dw") != -1 + or key.find("self_attention.query_key_value.fp_linear.do") != -1 + or key.find("self_attention.dense.fp_linear.di") != -1 + or key.find("self_attention.dense.fp_linear.dw") != -1 + or key.find("self_attention.dense.fp_linear.do") != -1 + or key.find("mlp.dense_h_to_4h.fp_linear.di") != -1 + or key.find("mlp.dense_h_to_4h.fp_linear.dw") != -1 + or key.find("mlp.dense_h_to_4h.fp_linear.do") != -1 + or key.find("mlp.dense_4h_to_h.fp_linear.di") != -1 + or key.find("mlp.dense_4h_to_h.fp_linear.dw") != -1 + or key.find("mlp.dense_4h_to_h.fp_linear.do") != -1 + or key.find("_amax") != -1): + pass + else: + print(f"[ERROR] cannot find key '{key}'") + + +def split_and_convert_process(i, pipeline_para_rank, saved_dir, factor, key, model_training_args, transformer_model_list, ckpt_ver, np_weight_data_type): + val = safe_transpose(transformer_model_list[0][key]) + val = torch2np(val, np_weight_data_type) + if key.find("layers.") != -1: + layer_index = (int)(key[7 : key.find(".", 7)]) + saved_key = key.replace( + "layers.%d." % layer_index, + "layers.%d." % (layer_index + pipeline_para_rank * model_training_args.num_layers // model_training_args.pipeline_model_parallel_size)) + + if saved_key.find("self_attention") != -1: + saved_key = saved_key.replace("self_attention", "attention") + if saved_key.find("adaptor1") != -1: + saved_key = saved_key.replace("adaptor1", "after_attention_adapter") + if saved_key.find("adaptor2") != -1: + saved_key = saved_key.replace("adaptor2", "after_ffn_adapter") + else: + saved_key = key + + if ( + key.find("input_layernorm.weight") != -1 + or key.find("input_layernorm.bias") != -1 + or key.find("attention.dense.bias") != -1 + or key.find("post_attention_layernorm.weight") != -1 + or key.find("post_attention_layernorm.bias") != -1 + or key.find("mlp.dense_4h_to_h.bias") != -1 + or key.find("adaptor1.dense_4h_to_h.bias") != -1 + or key.find("adaptor2.dense_4h_to_h.bias") != -1 + or key.find("final_layernorm.weight") != -1 + or key.find("final_layernorm.bias") != -1 + or key.find("self_attention.query_key_value.fp_linear.fi") != -1 + or key.find("self_attention.query_key_value.fp_linear.fw") != -1 + or key.find("self_attention.query_key_value.fp_linear.fo") != -1 + or key.find("self_attention.dense.fp_linear.fi") != -1 + or key.find("self_attention.dense.fp_linear.fw") != -1 + or key.find("self_attention.dense.fp_linear.fo") != -1 + or key.find("mlp.dense_h_to_4h.fp_linear.fi") != -1 + or key.find("mlp.dense_h_to_4h.fp_linear.fw") != -1 + or key.find("mlp.dense_h_to_4h.fp_linear.fo") != -1 + or key.find("mlp.dense_4h_to_h.fp_linear.fi") != -1 + or key.find("mlp.dense_4h_to_h.fp_linear.fw") != -1 + or key.find("mlp.dense_4h_to_h.fp_linear.fo") != -1): + # shared weights, only need to convert the weights of rank 0 + if i == 0: + saved_path = saved_dir / f"model.{saved_key}.bin" + val.tofile(saved_path.as_posix()) + + elif (key.find("attention.dense.weight") != -1 + or key.find("mlp.dense_4h_to_h.weight") != -1 + or key.find("adaptor1.dense_4h_to_h.weight") != -1 + or key.find("adaptor2.dense_4h_to_h.weight") != -1): + split_vals = np.split(val, factor, axis=0) + for j in range(factor): + saved_path = saved_dir / f"model.{saved_key}.{i * factor + j:d}.bin" + split_vals[j].tofile(saved_path.as_posix()) + + elif (key.find("mlp.dense_h_to_4h.weight") != -1 + or key.find("adaptor1.dense_h_to_4h.weight") != -1 + or key.find("adaptor2.dense_h_to_4h.weight") != -1 + or key.find("mlp.dense_h_to_4h.bias") != -1 + or key.find("adaptor1.dense_h_to_4h.bias") != -1 + or key.find("adaptor2.dense_h_to_4h.bias") != -1): + split_vals = np.split(val, factor, axis=-1) + for j in range(factor): + saved_path = saved_dir / f"model.{saved_key}.{i * factor + j:d}.bin" + split_vals[j].tofile(saved_path.as_posix()) + + elif key.find("attention.query_key_value.bias") != -1: + local_dim = int(val.shape[-1] / 3) + + if ckpt_ver == 3: + num_splits = 3 + head_num = model_training_args.num_attention_heads // model_training_args.tensor_model_parallel_size + size_per_head = local_dim // head_num + val = val.reshape(head_num, num_splits, size_per_head) + val = val.transpose(1, 0, 2) + + val = val.reshape(3, local_dim) + split_vals = np.split(val, factor, axis=-1) + + for j in range(factor): + saved_path = saved_dir / f"model.{saved_key}.{i * factor + j:d}.bin" + split_vals[j].tofile(saved_path.as_posix()) + + elif key.find("attention.query_key_value.weight") != -1: + hidden_dim = val.shape[0] + local_dim = int(val.shape[-1] / 3) + + if ckpt_ver == 3: + num_splits = 3 + head_num = model_training_args.num_attention_heads + size_per_head = hidden_dim // head_num + head_num = head_num // model_training_args.tensor_model_parallel_size + val = val.reshape(hidden_dim, head_num, num_splits, size_per_head) + val = val.transpose(0, 2, 1, 3) + + val = val.reshape(hidden_dim, 3, local_dim) + split_vals = np.split(val, factor, axis=-1) + + for j in range(factor): + saved_path = saved_dir / f"model.{saved_key}.{i * factor + j:d}.bin" + split_vals[j].tofile(saved_path.as_posix()) + elif (key.find("self_attention.query_key_value.fp_linear.di") != -1 + or key.find("self_attention.query_key_value.fp_linear.dw") != -1 + or key.find("self_attention.query_key_value.fp_linear.do") != -1 + or key.find("self_attention.dense.fp_linear.di") != -1 + or key.find("self_attention.dense.fp_linear.dw") != -1 + or key.find("self_attention.dense.fp_linear.do") != -1 + or key.find("mlp.dense_h_to_4h.fp_linear.di") != -1 + or key.find("mlp.dense_h_to_4h.fp_linear.dw") != -1 + or key.find("mlp.dense_h_to_4h.fp_linear.do") != -1 + or key.find("mlp.dense_4h_to_h.fp_linear.di") != -1 + or key.find("mlp.dense_4h_to_h.fp_linear.dw") != -1 + or key.find("mlp.dense_4h_to_h.fp_linear.do") != -1 + or key.find("_amax") != -1): + pass + else: + print(f"[ERROR] cannot find key '{key}'") + + +def _get_checkpoint_name(checkpoint_dir): + + checkpoint_dir = pathlib.Path(checkpoint_dir) + patterns = [ + "model_optim_rng.pt", # older megatron checkpoints + "*last.ckpt", # newer format of checkpoints + ] + for pattern in patterns: + model_files = sorted(list(checkpoint_dir.rglob(pattern))) + if model_files: + return model_files[0].name + + raise ValueError(f"Could not find checkpoint files in {checkpoint_dir}") + + +def convert_checkpoint(args): + saved_dir = pathlib.Path(args.saved_dir) / f"{args.infer_gpu_num:d}-gpu" + if saved_dir.exists(): + print(f"[ERROR] Remove {saved_dir} target directory before running conversion") + sys.exit(1) + saved_dir.mkdir(parents=True) + + if args.vocab_path: + shutil.copy(args.vocab_path, (saved_dir / "vocab.json").as_posix()) + if args.merges_path: + shutil.copy(args.merges_path, (saved_dir / "merges.txt").as_posix()) + + load_checkpoints_to_cpu = bool(args.load_checkpoints_to_cpu) + map_location_fn = cpu_map_location if load_checkpoints_to_cpu else gpu_map_location + + checkpoints_dir = pathlib.Path(args.in_file) + checkpoint_name = _get_checkpoint_name(checkpoints_dir) + + # load position_embedding from rank 0 + checkpoints_paths = sorted(checkpoints_dir.rglob(checkpoint_name)) + if not checkpoints_paths: + print(f"[ERROR] Cannot find checkpoint in {checkpoints_dir}.") + exit(1) + model_00 = torch.load(checkpoints_paths[0].as_posix(), map_location=map_location_fn) + + if "hyper_parameters" in list(model_00.keys()): + print("Use nemo_ckpt_converter.py script for conversion of this checkpoint") + exit(1) + elif "args" in list(model_00.keys()): + checkpoint_version = model_00["checkpoint_version"] + model_training_args = model_00["args"] + megatron_gpt_key = "encoder" + else: + checkpoint_version = 0 + model_training_args = _create_model_training_args_for_checkpoint_version_0(args, model_00) + megatron_gpt_key = "transformer" + + with (saved_dir / "args.txt").open("w") as training_args_file: + for k, v in vars(model_training_args).items(): + training_args_file.write(f"{k}:{v}\n") + + np_weight_data_type = WEIGHT2DTYPE[args.weight_data_type] + + val = model_00["model"]["language_model"]["embedding"]["position_embeddings"]["weight"] + val = torch2np(val, np_weight_data_type) + val.tofile((saved_dir / "model.wpe.bin").as_posix()) # not weight, do not need to transpose + + del model_00 + w_e_list = [] + + training_tensor_para_size = model_training_args.tensor_model_parallel_size + training_pipeline_para_size = model_training_args.pipeline_model_parallel_size + inference_tensor_para_size = args.infer_gpu_num + + model_weights_paths = [ + [ + _inject_model_parallel_rank( + checkpoints_dir / checkpoint_name, + tensor_model_parallel_size=training_tensor_para_size, + pipeline_model_parallel_size=training_pipeline_para_size, + tensor_model_parallel_rank=tp_rank, + pipeline_model_parallel_rank=pp_rank, + ) + for pp_rank in range(training_pipeline_para_size) + ] + for tp_rank in range(training_tensor_para_size) + ] + + if training_tensor_para_size > inference_tensor_para_size: + assert training_tensor_para_size % inference_tensor_para_size == 0 + is_merge_ckpt = True + factor = int(training_tensor_para_size / inference_tensor_para_size) + else: + assert inference_tensor_para_size % training_tensor_para_size == 0 + is_merge_ckpt = False + factor = int(inference_tensor_para_size / training_tensor_para_size) + + main_loop = min(training_tensor_para_size, inference_tensor_para_size) + vocab_size_list = [0 for i in range(main_loop)] + + # quantization max ranges + quant_max_ranges = dict() + + torch.multiprocessing.set_start_method("spawn") + torch.multiprocessing.set_sharing_strategy("file_system") + pool = multiprocessing.Pool(args.processes) + has_adapters = False + for i in range(main_loop): + for j in range(training_pipeline_para_size): + + transformer_models = [] + if is_merge_ckpt: + for k in range(factor): + m = torch.load(model_weights_paths[i * factor + k][j].as_posix(), map_location=map_location_fn) + if not has_adapters: + has_adapters = any("adaptor" in key for key in m['model']['language_model'][megatron_gpt_key].keys()) + weights_dict = m["model"]["language_model"][megatron_gpt_key] + for name, weight in weights_dict.items(): + if "_amax" in name: + # fuse qkv scale + if "matmul_q_input_quantizer" in name: + name = name.replace("_q_", "_qkv_") + if "matmul_k_input_quantizer" in name: + name = name.replace("_k_", "_qkv_") + if "matmul_v_input_quantizer" in name: + name = name.replace("_v_", "_qkv_") + if name in quant_max_ranges: + quant_max_ranges[name] = torch.max(torch.max(torch.abs(weight)),quant_max_ranges[name]) + else: + quant_max_ranges[name] = torch.max(torch.abs(weight)) + transformer_models.append(m["model"]["language_model"][megatron_gpt_key]) + + if j == 0: + vocab_size_list[i] = m["model"]["language_model"]["embedding"]["word_embeddings"]["weight"].shape[0] + w_e_list.append(torch2np(m["model"]["language_model"]["embedding"]["word_embeddings"]["weight"], np_weight_data_type)) + + else: + m = torch.load(model_weights_paths[i][j].as_posix(), map_location=map_location_fn) + if not has_adapters: + has_adapters = any("adaptor" in key for key in m['model']['language_model'][megatron_gpt_key].keys()) + + if j == 0: + vocab_size_list[i] = m["model"]["language_model"]["embedding"]["word_embeddings"]["weight"].shape[0] + w_e_list.append(torch2np( + m["model"]["language_model"]["embedding"]["word_embeddings"]["weight"], + np_weight_data_type + )) + weights_dict = m["model"]["language_model"][megatron_gpt_key] + for name, weight in weights_dict.items(): + if "_amax" in name: + # fuse qkv scale + if "matmul_q_input_quantizer" in name: + name = name.replace("_q_", "_qkv_") + if "matmul_k_input_quantizer" in name: + name = name.replace("_k_", "_qkv_") + if "matmul_v_input_quantizer" in name: + name = name.replace("_v_", "_qkv_") + if name in quant_max_ranges: + quant_max_ranges[name] = torch.max(torch.max(torch.abs(weight)),quant_max_ranges[name]) + else: + quant_max_ranges[name] = torch.max(torch.abs(weight)) + transformer_models.append(m["model"]["language_model"][megatron_gpt_key]) + + pool.starmap( + merge_and_convert_process if is_merge_ckpt else split_and_convert_process, + [ + ( + i, + j, + saved_dir, + factor, + k, + model_training_args, + transformer_models, + checkpoint_version, + np_weight_data_type, + ) + for (k, v) in transformer_models[0].items() + ], + ) + + pool.close() + pool.join() + + torch.cuda.synchronize() + + # calculate quant scales for fp8 + for key, val in quant_max_ranges.items(): + key = key.replace("self_attention", "attention") + if "attention.query_key_value._input_quantizer._amax" in key: + saved_key = key.replace("_input_quantizer._amax", "fp_linear.fi") + saved_path = saved_dir / f"model.{saved_key}.bin" + if "attention.query_key_value._weight_quantizer._amax" in key: + saved_key = key.replace("_weight_quantizer._amax", "fp_linear.fw") + saved_path = saved_dir / f"model.{saved_key}.bin" + if "attention.matmul_qkv_input_quantizer._amax" in key: + saved_key = key.replace("matmul_qkv_input_quantizer._amax", "query_key_value.fp_linear.fo") + saved_path = saved_dir / f"model.{saved_key}.bin" + if "attention.matmul_a_input_quantizer._amax" in key: + saved_key = key.replace("attention.matmul_a_input_quantizer._amax", "attention.softmax.fo") + saved_path = saved_dir / f"model.{saved_key}.bin" + if "attention.dense._input_quantizer._amax" in key: + saved_key = key.replace("_input_quantizer._amax", "fp_linear.fi") + saved_path = saved_dir / f"model.{saved_key}.bin" + if "attention.dense._weight_quantizer._amax" in key: + saved_key = key.replace("_weight_quantizer._amax", "fp_linear.fw") + saved_path = saved_dir / f"model.{saved_key}.bin" + if "add_local_input_quantizers.0._amax" in key: + saved_key = key.replace("add_local_input_quantizers.0._amax", "attention.dense.fp_linear.fo") + saved_path = saved_dir / f"model.{saved_key}.bin" + if "mlp.dense_h_to_4h._input_quantizer._amax" in key: + saved_key = key.replace("_input_quantizer._amax", "fp_linear.fi") + saved_path = saved_dir / f"model.{saved_key}.bin" + if "mlp.dense_h_to_4h._weight_quantizer._amax" in key: + saved_key = key.replace("_weight_quantizer._amax", "fp_linear.fw") + saved_path = saved_dir / f"model.{saved_key}.bin" + if "mlp.dense_4h_to_h._input_quantizer._amax" in key: + saved_key = key.replace("_input_quantizer._amax", "fp_linear.fi") + saved_path = saved_dir / f"model.{saved_key}.bin" + if "mlp.dense_4h_to_h._weight_quantizer._amax" in key: + saved_key = key.replace("_weight_quantizer._amax", "fp_linear.fw") + saved_path = saved_dir / f"model.{saved_key}.bin" + if "add_local_input_quantizers.2._amax" in key: + saved_key = key.replace("add_local_input_quantizers.2._amax", "mlp.dense_4h_to_h.fp_linear.fo") + saved_path = saved_dir / f"model.{saved_key}.bin" + + val = (np.array(np.array(480.0, dtype=np.float32) / torch2np(val, np_weight_data_type))).astype(np.float32) + if "attention.query_key_value.fp_linear.fw" in saved_key: + print(saved_key, val) + val.tofile(saved_path.as_posix()) + + np.concatenate(w_e_list, axis=0).tofile((saved_dir / "model.wte.bin").as_posix()) + + # save vocab_size + full_vocab_size = sum(vocab_size_list) + if not hasattr(model_training_args, "padded_vocab_size"): + model_training_args.padded_vocab_size = full_vocab_size + + # Configuration for the model (load by triton backends) + config = configparser.ConfigParser() + config["gpt"] = {} + + if args.vocab_path: + vocab_path = pathlib.Path(args.vocab_path) + with vocab_path.open("r") as vocab_file: + vocab = json.load(vocab_file) + start_id, end_id = vocab[DEFAULT_START_TAG], vocab[DEFAULT_END_TAG] + else: + # hard coded values from english gpt_vocab.json file + start_id, end_id = str(OPENAI_GPT2_START_ID), str(OPENAI_GPT2_END_ID) + try: + config["gpt"]["model_name"] = "gpt" + config["gpt"]["head_num"] = str(model_training_args.num_attention_heads) + config["gpt"]["size_per_head"] = str(model_training_args.hidden_size // model_training_args.num_attention_heads) + config["gpt"]["inter_size"] = str(model_training_args.ffn_hidden_size) + config["gpt"]["num_layer"] = str(model_training_args.num_layers) + config["gpt"]["max_pos_seq_len"] = str(model_training_args.max_position_embeddings) + config["gpt"]["vocab_size"] = str(model_training_args.padded_vocab_size) + config["gpt"]["has_adapters"] = str(has_adapters) + config['gpt']['adapter_inter_size'] = str(model_training_args.project_size) if has_adapters else str(0) + config["gpt"]["layernorm_eps"] = str(model_training_args.layernorm_epsilon) + config["gpt"]["start_id"] = str(start_id) + config["gpt"]["end_id"] = str(end_id) + config["gpt"]["weight_data_type"] = args.weight_data_type + config["gpt"]["tensor_para_size"] = str(args.infer_gpu_num) + with open((saved_dir / f"config.ini").as_posix(), 'w') as configfile: + config.write(configfile) + except Exception as e: + print(f"Fail to save the config in config.ini: {e}") + + +def main(): + parser = argparse.ArgumentParser(formatter_class=argparse.RawTextHelpFormatter) + parser.add_argument("--saved-dir", "-saved_dir", "-o", help="folder name of output files", required=True) + parser.add_argument( + "--in-file", "-in_file", "-i", help="file name of input checkpoint file", required=True + ) + parser.add_argument( + "--infer-gpu-num", "-infer_gpu_num", "-i_g", type=int, help="How many gpus for inference", required=True + ) + # -h_n and -t_g are needed when megatron_ckpt_version = 0, for example the public megatron 345M gpt model + parser.add_argument( + "--head-num", + "-head_num", + "-h_n", + type=int, + help="The number of heads, only needed when weight doesn't contain structure hyperparameters" + ) + parser.add_argument( + "--trained-tensor-parallel-size", + "-trained_tensor_parallel_size", + "-t_g", + type=int, + help="the tensor parallel size for training" + ) + parser.add_argument( + "--processes", + "-processes", + "-p", + type=int, + default=16, + help="How many processes to spawn for conversion", + ) + parser.add_argument( + "--weight-data-type", "-weight_data_type", choices=["fp32", "fp16"], default="fp32", help="" + ) + parser.add_argument( + "--load-checkpoints-to-cpu", + "-load_checkpoints_to_cpu", + "-cpu", + type=int, + choices=[0, 1], + default=1, + help="Whether to load model weights to CPU", + ) + parser.add_argument( + "--vocab-path", + type=str, + help="Path to vocabulary file to embed in FasterTransformer checkpoint", + required=False, + ) + parser.add_argument( + "--merges-path", type=str, help="Path to merges file to embed in FasterTransformer checkpoint", required=False + ) + + args = parser.parse_args() + print("\n=============== Argument ===============") + for key in vars(args): + print(f"{key}: {vars(args)[key]}") + print("========================================") + + start_time = datetime.datetime.now() + convert_checkpoint(args) + run_time = datetime.datetime.now() - start_time + print(f"[INFO] Spent {run_time} (h:m:s) to convert the model") + + +if __name__ == "__main__": + main() \ No newline at end of file diff --git a/examples/pytorch/gpt/utils/megatron_gpt_moe_ckpt_convert.py b/examples/pytorch/gpt/utils/megatron_gpt_moe_ckpt_convert.py new file mode 100644 index 000000000..e70e63693 --- /dev/null +++ b/examples/pytorch/gpt/utils/megatron_gpt_moe_ckpt_convert.py @@ -0,0 +1,689 @@ +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import argparse +import configparser +import datetime +import json +import pathlib +import shutil +import sys +import os + +import numpy as np +import torch # pytype: disable=import-error + +# verify if root package is in PYTHONPATH +__root_package_path__ = pathlib.Path(__file__).parent.parent.parent.parent.parent.absolute().as_posix() +if __root_package_path__ not in sys.path: + print( + f"[ERROR] add project root directory to your PYTHONPATH with " + f"'export PYTHONPATH={__root_package_path__}:${{PYTHONPATH}}'" + ) + +from examples.pytorch.gpt.utils.gpt import DEFAULT_START_TAG, DEFAULT_END_TAG, OPENAI_GPT2_START_ID, OPENAI_GPT2_END_ID +from examples.pytorch.utils import torch2np, safe_transpose, cpu_map_location, gpu_map_location, WEIGHT2DTYPE + + +def save_dense_split(model_states_list, factor_dense, model_key, megatron_gpt_key, np_weight_data_type, saved_dir, + ckpt_ver, model_training_args): + training_pipeline_para_dense_size = len(model_states_list[0]) + step_layer_pp = model_training_args.num_layers // training_pipeline_para_dense_size + model_list = [ + [ + model_states[model_key]["language_model"][megatron_gpt_key] + for model_states in sub_model_states_list + ] + for sub_model_states_list in model_states_list + ] + has_adapters = any("adaptor" in key for key in model_list[0][0].keys()) + moe_layers = [] + for idx_tp, sub_model_list in enumerate(model_list): + save_offset = idx_tp * factor_dense + + for idx_pp, model in enumerate(sub_model_list): + for key, val in model.items(): + val = safe_transpose(val) + val = torch2np(val, np_weight_data_type) + saved_key = key + if key.find("layers.") != -1: + key_split = key.split('.') + layer_index = (int)(key_split[1]) + idx_pp * step_layer_pp + saved_key = '.'.join(key_split[:1] + [str(layer_index)] + key_split[2:]) + if saved_key.find("self_attention") != -1: + saved_key = saved_key.replace("self_attention", "attention") + if saved_key.find("adaptor1") != -1: + saved_key = saved_key.replace("adaptor1", "after_attention_adapter") + if saved_key.find("adaptor2") != -1: + saved_key = saved_key.replace("adaptor2", "after_ffn_adapter") + + if ( + key.find("input_layernorm.weight") != -1 + or key.find("input_layernorm.bias") != -1 + or key.find("attention.dense.bias") != -1 + or key.find("post_attention_layernorm.weight") != -1 + or key.find("post_attention_layernorm.bias") != -1 + or key.find("mlp.dense_4h_to_h.bias") != -1 + or key.find("adaptor1.dense_4h_to_h.bias") != -1 + or key.find("adaptor2.dense_4h_to_h.bias") != -1 + or key.find("final_layernorm.weight") != -1 + or key.find("final_layernorm.bias") != -1 + ): + # shared weights, only need to convert the weights of rank 0 + if idx_tp == 0: + saved_path = saved_dir / f"model.{saved_key}.bin" + val.tofile(saved_path.as_posix()) + + elif (key.find("attention.dense.weight") != -1 + or key.find("mlp.dense_4h_to_h.weight") != -1 + or key.find("adaptor1.dense_4h_to_h.weight") != -1 + or key.find("adaptor2.dense_4h_to_h.weight") != -1): + split_vals = np.split(val, factor_dense, axis=0) + for j in range(factor_dense): + saved_path = saved_dir / f"model.{saved_key}.{save_offset + j:d}.bin" + split_vals[j].tofile(saved_path.as_posix()) + + elif (key.find("mlp.dense_h_to_4h.weight") != -1 + or key.find("adaptor1.dense_h_to_4h.weight") != -1 + or key.find("adaptor2.dense_h_to_4h.weight") != -1 + or key.find("mlp.dense_h_to_4h.bias") != -1 + or key.find("adaptor1.dense_h_to_4h.bias") != -1 + or key.find("adaptor2.dense_h_to_4h.bias") != -1): + split_vals = np.split(val, factor_dense, axis=-1) + for j in range(factor_dense): + saved_path = saved_dir / f"model.{saved_key}.{save_offset + j:d}.bin" + split_vals[j].tofile(saved_path.as_posix()) + + elif key.find("attention.query_key_value.bias") != -1: + local_dim = int(val.shape[-1] / 3) + + if ckpt_ver == 3: + num_splits = 3 + head_num = model_training_args.num_attention_heads // model_training_args.tensor_model_parallel_size + size_per_head = local_dim // head_num + val = val.reshape(head_num, num_splits, size_per_head) + val = val.transpose(1, 0, 2) + + val = val.reshape(3, local_dim) + split_vals = np.split(val, factor_dense, axis=-1) + + for j in range(factor_dense): + saved_path = saved_dir / f"model.{saved_key}.{save_offset + j:d}.bin" + split_vals[j].tofile(saved_path.as_posix()) + + elif key.find("attention.query_key_value.weight") != -1: + hidden_dim = val.shape[0] + assert val.shape[-1] % 3 == 0 + local_dim = val.shape[-1] // 3 + + if ckpt_ver == 3: + num_splits = 3 + head_num = model_training_args.num_attention_heads + assert hidden_dim % head_num == 0 + size_per_head = hidden_dim // head_num + assert head_num % model_training_args.tensor_model_parallel_size == 0 + head_num = head_num // model_training_args.tensor_model_parallel_size + val = val.reshape(hidden_dim, head_num, num_splits, size_per_head) + val = val.transpose(0, 2, 1, 3) + + val = val.reshape(hidden_dim, 3, local_dim) + split_vals = np.split(val, factor_dense, axis=-1) + + for j in range(factor_dense): + saved_path = saved_dir / f"model.{saved_key}.{save_offset + j:d}.bin" + split_vals[j].tofile(saved_path.as_posix()) + + elif key.find('experts') == -1: + if key.find('deepspeed_moe.gate') != -1 or key.find('megatron_moe.gate') != -1: + layer_index = (int)(key.split('.')[1]) + idx_pp * step_layer_pp + if idx_tp == 0: + moe_layers.append(layer_index) + prefix = key.replace('deepspeed_moe', 'moe').replace('megatron_moe', 'moe') + if key.find('layernorm') != -1 or key.find('gate') != -1 or key.find("attention.dense.bias") != -1 \ + or key.find("dense_4h_to_h.bias") != -1: + if idx_tp == 0: + file_name = os.path.join(saved_dir, "model." + prefix + ".bin") + saved_path = file_name + # print(f"Saving '{prefix}' to '{file_name}'") + # print(f"Shape: '{val.shape}'") + val.tofile(file_name) + else: + val_tensor_para = [] + print(key, val.shape) + if key.find("attention.dense.weight") != -1 or key.find("dense_4h_to_h.weight") != -1 \ + or key.find("dense_h_to_4h.bias") != -1: + val_tensor_para = np.split(val, factor_dense, axis=0) + elif key.find("dense_h_to_4h.weight") != -1: + val_tensor_para = np.split(val, factor_dense, axis=1) + else: + print(f"[ERROR] cannot find experts key '{key}'") + sys.exit(1) + + for j in range(factor_dense): + file_name = os.path.join(saved_dir, "model." + prefix + "." + str(save_offset + j) + ".bin") + saved_path = file_name + # print(f"Saving '{j}' '{prefix}' to '{file_name}'") + val_to_save = val_tensor_para[j] + # print(f"Shape: '{val_to_save.shape}'") + val_to_save.tofile(file_name) + + else: + print(f"[ERROR] cannot find key '{key}'") + sys.exit(1) + print('{} {} {} {}'.format(idx_tp, idx_pp, key, saved_path)) + print(val.shape) + return moe_layers, has_adapters + + +def save_dense_concat(model_states_list, inference_tensor_para_size, factor_dense, model_key, megatron_gpt_key, + np_weight_data_type, saved_dir, ckpt_ver, model_training_args): + def convert_val(x): + x = safe_transpose(x) + x = torch2np(x, np_weight_data_type) + return x + + training_pipeline_para_dense_size = len(model_states_list[0]) + step_layer_pp = model_training_args.num_layers // training_pipeline_para_dense_size + model_list = [ + [ + model_states[model_key]["language_model"][megatron_gpt_key] + for model_states in sub_model_states_list + ] + for sub_model_states_list in model_states_list + ] + has_adapters = any("adaptor" in key for key in model_list[0][0].keys()) + moe_layers = [] + for idx_tp in range(inference_tensor_para_size): + load_offset = idx_tp * factor_dense + + for idx_pp in range(training_pipeline_para_dense_size): + for key in model_list[0][0]: + saved_key = key + if key.find("layers.") != -1: + key_split = key.split('.') + layer_index = (int)(key_split[1]) + idx_pp * step_layer_pp + saved_key = '.'.join(key_split[:1] + [str(layer_index)] + key_split[2:]) + if saved_key.find("self_attention") != -1: + saved_key = saved_key.replace("self_attention", "attention") + if saved_key.find("adaptor1") != -1: + saved_key = saved_key.replace("adaptor1", "after_attention_adapter") + if saved_key.find("adaptor2") != -1: + saved_key = saved_key.replace("adaptor2", "after_ffn_adapter") + + if ( + key.find("input_layernorm.weight") != -1 + or key.find("input_layernorm.bias") != -1 + or key.find("attention.dense.bias") != -1 + or key.find("post_attention_layernorm.weight") != -1 + or key.find("post_attention_layernorm.bias") != -1 + or key.find("mlp.dense_4h_to_h.bias") != -1 + or key.find("adaptor1.dense_4h_to_h.bias") != -1 + or key.find("adaptor2.dense_4h_to_h.bias") != -1 + or key.find("final_layernorm.weight") != -1 + or key.find("final_layernorm.bias") != -1 + ): + # shared weights, only need to convert the weights of rank 0 + if idx_tp == 0: + concat_val = convert_val(model_list[0][idx_pp][key]) + saved_path = saved_dir / f"model.{saved_key}.bin" + concat_val.tofile(saved_path.as_posix()) + + elif (key.find("attention.dense.weight") != -1 + or key.find("mlp.dense_4h_to_h.weight") != -1 + or key.find("adaptor1.dense_4h_to_h.weight") != -1 + or key.find("adaptor2.dense_4h_to_h.weight") != -1): + val_list = [convert_val(model_list[load_offset + j][idx_pp][key]) for j in range(factor_dense)] + concat_val = np.concatenate(val_list, axis=0) + saved_path = saved_dir / f"model.{saved_key}.{idx_tp:d}.bin" + concat_val.tofile(saved_path.as_posix()) + + elif (key.find("mlp.dense_h_to_4h.weight") != -1 + or key.find("adaptor1.dense_h_to_4h.weight") != -1 + or key.find("adaptor2.dense_h_to_4h.weight") != -1 + or key.find("mlp.dense_h_to_4h.bias") != -1 + or key.find("adaptor1.dense_h_to_4h.bias") != -1 + or key.find("adaptor2.dense_h_to_4h.bias") != -1): + val_list = [convert_val(model_list[load_offset + j][idx_pp][key]) for j in range(factor_dense)] + concat_val = np.concatenate(val_list, axis=-1) + saved_path = saved_dir / f"model.{saved_key}.{idx_tp:d}.bin" + concat_val.tofile(saved_path.as_posix()) + + elif key.find("attention.query_key_value.bias") != -1: + val_list = [] + for j in range(factor_dense): + val = convert_val(model_list[load_offset + j][idx_pp][key]) + assert val.shape[-1] % 3 == 0 + local_dim = val.shape[-1] // 3 + if ckpt_ver == 3: + num_splits = 3 + num_attention_heads = model_training_args.num_attention_heads + tensor_model_parallel_size = model_training_args.tensor_model_parallel_size + assert num_attention_heads % tensor_model_parallel_size == 0 + head_num = num_attention_heads // tensor_model_parallel_size + assert local_dim % head_num == 0 + size_per_head = local_dim // head_num + val = val.reshape(head_num, num_splits, size_per_head) + val = val.transpose(1, 0, 2) + val = val.reshape(3, local_dim) + val_list.append(val) + concat_val = np.concatenate(val_list, axis=-1) + saved_path = saved_dir / f"model.{saved_key}.{idx_tp:d}.bin" + concat_val.tofile(saved_path.as_posix()) + + elif key.find("attention.query_key_value.weight") != -1: + val_list = [] + for j in range(factor_dense): + val = convert_val(model_list[load_offset + j][idx_pp][key]) + hidden_dim = val.shape[0] + local_dim = int(val.shape[-1] / 3) + if ckpt_ver == 3: + num_splits = 3 + head_num = model_training_args.num_attention_heads + size_per_head = hidden_dim // head_num + head_num = head_num // model_training_args.tensor_model_parallel_size + val = val.reshape(hidden_dim, head_num, num_splits, size_per_head) + val = val.transpose(0, 2, 1, 3) + val = val.reshape(hidden_dim, 3, local_dim) + val_list.append(val) + concat_val = np.concatenate(val_list, axis=-1) + saved_path = saved_dir / f"model.{saved_key}.{idx_tp:d}.bin" + concat_val.tofile(saved_path.as_posix()) + + elif key.find('experts') == -1: + if key.find('deepspeed_moe.gate') != -1 or key.find('megatron_moe.gate') != -1: + layer_index = (int)(key.split('.')[1]) + idx_pp * step_layer_pp + if idx_tp == 0: + moe_layers.append(layer_index) + prefix = key.replace('deepspeed_moe', 'moe').replace('megatron_moe', 'moe') + if key.find('layernorm') != -1 or key.find('gate') != -1 or key.find("attention.dense.bias") != -1 or key.find("dense_4h_to_h.bias") != -1: + if idx_tp == 0: + concat_val = convert_val(model_list[0][idx_pp][key]) + file_name = os.path.join(saved_dir, "model." + prefix + ".bin") + saved_path = file_name + # print(f"Saving '{prefix}' to '{file_name}'") + # print(f"Shape: '{val.shape}'") + concat_val.tofile(file_name) + else: + if key.find("attention.dense.weight") != -1 or key.find("dense_4h_to_h.weight") != -1 or key.find("dense_h_to_4h.bias") != -1: + concat_axis = 0 + elif key.find("dense_h_to_4h.weight") != -1: + concat_axis = 1 + else: + print(f"[ERROR] cannot find experts key '{key}'") + sys.exit(1) + val_list = [] + for j in range(factor_dense): + val = convert_val(model_list[load_offset + j][idx_pp][key]) + val_list.append(val) + concat_val = np.concatenate(val_list, axis=concat_axis) + file_name = os.path.join(saved_dir, "model." + prefix + "." + str(idx_tp) + ".bin") + saved_path = file_name + concat_val.tofile(file_name) + + else: + print(f"[ERROR] cannot find key '{key}'") + sys.exit(1) + print('{} {} {} {}'.format(idx_tp, idx_pp, key, saved_path)) + print(concat_val.shape) + return moe_layers, has_adapters + + +def save_experts_split(moe_layers, num_experts, training_tensor_para_dense_size, training_tensor_para_expert_size, + factor_expert, args, map_location_fn, is_deepspeed, np_weight_data_type, saved_dir, + training_pipeline_para_expert_size): + def get_file_name(idx_moe, idx_expert, idx_rank): + if training_tensor_para_expert_size > 1: + assert len(moe_layers) % training_pipeline_para_expert_size == 0 + step_layer_pp = len(moe_layers) // training_pipeline_para_expert_size + file_name = 'layer_{}_expert_{}_mp_rank_{:02}_{:03}_model_states.pt'.format( + idx_moe % step_layer_pp, idx_expert, idx_rank, idx_moe // step_layer_pp) + else: + file_name = 'layer_{}_expert_{}_mp_rank_{:02}_model_states.pt'.format(idx_moe, idx_expert, idx_rank) + return file_name + assert training_tensor_para_expert_size == 1 or training_tensor_para_expert_size == training_tensor_para_dense_size + # Saving experts weight + print(f"The number of moe layers is '{len(moe_layers)}'") + for idx_tp in range(training_tensor_para_expert_size): + save_offset = idx_tp * factor_expert + for n, idx_layer in enumerate(moe_layers): + fc1_weight = [] + fc1_bias = [] + fc2_weight = [] + fc2_bias = [] + prefix = None + for e in range(num_experts): + if training_tensor_para_expert_size == training_tensor_para_dense_size: + file_name = get_file_name(n, e, idx_tp) + file_path = os.path.join(args.input_dir, file_name) + else: + for idx_rank in range(training_tensor_para_dense_size): + file_name = get_file_name(n, e, idx_rank) + file_path = os.path.join(args.input_dir, file_name) + if os.path.exists(file_path): + break + else: + raise FileNotFoundError + expert_dict = torch.load(file_path, map_location=map_location_fn) + for k, v in expert_dict.items(): + if k.find('dense_h_to_4h.weight') != -1: + if prefix is None: + prefix = k + fc1_weight.append(v) + elif k.find('dense_h_to_4h.bias') != -1: + fc1_bias.append(v) + elif k.find('dense_4h_to_h.weight') != -1: + fc2_weight.append(v) + elif k.find('dense_4h_to_h.bias') != -1: + fc2_bias.append(v) + else: + print(f"[ERROR] cannot find expert_dict key '{k}'") + sys.exit(1) + if is_deepspeed: + prefix_list = ['model'] + prefix.split('.')[2:5] + ['moe', 'experts'] + else: + prefix_list = ['model'] + prefix.split('.')[4:7] + ['moe', 'experts'] + prefix = '.'.join(prefix_list) + '.' + prefix_split = prefix.split('.') + prefix_split[1] = 'layers' + prefix_split[3] = 'mlp' + prefix = '.'.join(prefix_split[:2] + [str(idx_layer)] + prefix_split[3:]) + + stacked_fc1_weight = torch.stack(fc1_weight, 0).transpose(-1, -2).contiguous() + # val = stacked_fc1_weight.float().cpu().numpy() # (num_experts, d_model, d_ff) + val = torch2np(stacked_fc1_weight, np_weight_data_type) + val_tensor_para = np.split(val, factor_expert, axis=2) + for i in range(factor_expert): + file_name = os.path.join(saved_dir, prefix + "dense_h_to_4h.weight." + str(save_offset + i) + ".bin") + print(f"Saving '{i}' '{prefix}' to '{file_name}'") + val_to_save = val_tensor_para[i] + print(f"Shape: '{val_to_save.shape}'") + val_to_save.tofile(file_name) + + stacked_fc1_bias = torch.stack(fc1_bias, 0).contiguous() + # val = stacked_fc1_bias.float().cpu().numpy() # (num_experts, d_ff) + val = torch2np(stacked_fc1_bias, np_weight_data_type) + val_tensor_para = np.split(val, factor_expert, axis=1) + for i in range(factor_expert): + file_name = os.path.join(saved_dir, prefix + "dense_h_to_4h.bias." + str(save_offset + i) + ".bin") + print(f"Saving '{i}' '{prefix}' to '{file_name}'") + val_to_save = val_tensor_para[i] + print(f"Shape: '{val_to_save.shape}'") + val_to_save.tofile(file_name) + + stacked_fc2_weight = torch.stack(fc2_weight, 0).transpose(-1, -2).contiguous() + # val = stacked_fc2_weight.float().cpu().numpy() # (num_experts, d_ff, d_model) + val = torch2np(stacked_fc2_weight, np_weight_data_type) + val_tensor_para = np.split(val, factor_expert, axis=1) + for i in range(factor_expert): + file_name = os.path.join(saved_dir, prefix + "dense_4h_to_h.weight." + str(save_offset + i) + ".bin") + print(f"Saving '{i}' '{prefix}' to '{file_name}'") + val_to_save = val_tensor_para[i] + print(f"Shape: '{val_to_save.shape}'") + val_to_save.tofile(file_name) + + if idx_tp == 0: + stacked_fc2_bias = torch.stack(fc2_bias, 0) + # val = stacked_fc2_bias.float().cpu().numpy() + val = torch2np(stacked_fc2_bias, np_weight_data_type) + file_name = os.path.join(saved_dir, prefix + "dense_4h_to_h.bias.bin") + print(f"Saving '{i}' '{prefix}' to '{file_name}'") + print(f"Shape: '{val.shape}'") + val.tofile(file_name) + return + + +def convert_checkpoint(args): + saved_dir = pathlib.Path(args.saved_dir) / f"{args.infer_gpu_num:d}-gpu" + if saved_dir.exists(): + shutil.rmtree(saved_dir) + saved_dir.mkdir(parents=True) + + if args.vocab_path: + shutil.copy(args.vocab_path, (saved_dir / "vocab.json").as_posix()) + if args.merges_path: + shutil.copy(args.merges_path, (saved_dir / "merges.txt").as_posix()) + + load_checkpoints_to_cpu = bool(args.load_checkpoints_to_cpu) + map_location_fn = cpu_map_location if load_checkpoints_to_cpu else gpu_map_location + + config_model_states_list = [ + # Pattern 1 + { + 'pattern': 'mp_rank_{:02}/model_states.pt', + 'use_dense_pp': False, + 'is_deepspeed': True, + }, + { + 'pattern': 'mp_rank_{:02}_{:03}/model_states.pt', + 'use_dense_pp': True, + 'is_deepspeed': True, + }, + { + 'pattern': 'tp_rank_{:02}_pp_rank_{:03}/model_states.pt', + 'use_dense_pp': True, + 'is_deepspeed': True, + }, + # Pattern 2 + { + 'pattern': 'mp_rank_{:02}_model_states.pt', + 'use_dense_pp': False, + 'is_deepspeed': True, + }, + { + 'pattern': 'mp_rank_{:02}_{:03}_model_states.pt', + 'use_dense_pp': True, + 'is_deepspeed': True, + }, + { + 'pattern': 'tp_rank_{:02}_pp_rank_{:03}_model_states.pt', + 'use_dense_pp': True, + 'is_deepspeed': True, + }, + # Pattern 3 + { + 'pattern': 'mp_rank_{:02}/model_rng.pt', + 'use_dense_pp': False, + 'is_deepspeed': False, + }, + { + 'pattern': 'mp_rank_{:02}_{:03}/model_rng.pt', + 'use_dense_pp': True, + 'is_deepspeed': False, + }, + { + 'pattern': 'tp_rank_{:02}_pp_rank_{:03}/model_rng.pt', + 'use_dense_pp': True, + 'is_deepspeed': False, + }, + ] + for config_model_states in config_model_states_list: + pattern = config_model_states['pattern'] + use_dense_pp = config_model_states['use_dense_pp'] + is_deepspeed = config_model_states['is_deepspeed'] + if use_dense_pp: + path_model_states = os.path.join(args.input_dir, pattern.format(0, 0)) + else: + path_model_states = os.path.join(args.input_dir, pattern.format(0)) + if os.path.exists(path_model_states): + break + else: + raise FileNotFoundError("'path_model_states' not found") + model_states_00 = torch.load(path_model_states, map_location=map_location_fn) + for model_key in ['model', 'module']: + if model_key in model_states_00: + break + else: + raise KeyError("'model_key' not found") + ckpt_ver = model_states_00["checkpoint_version"] + assert ckpt_ver == 3 + megatron_gpt_key = "encoder" + model_training_args = model_states_00["args"] + training_tensor_para_dense_size = model_training_args.tensor_model_parallel_size + training_tensor_para_expert_size = 1 + training_pipeline_para_dense_size = model_training_args.pipeline_model_parallel_size + training_pipeline_para_expert_size = 1 + inference_tensor_para_size = args.infer_gpu_num + assert use_dense_pp == (training_pipeline_para_dense_size > 1) + assert model_training_args.num_layers % training_pipeline_para_dense_size == 0 + assert model_training_args.num_layers % training_pipeline_para_expert_size == 0 + if use_dense_pp: + model_states_list = [ + [ + torch.load(os.path.join(args.input_dir, pattern.format(idx_tp, idx_pp)), map_location=map_location_fn) + for idx_pp in range(training_pipeline_para_dense_size) + ] + for idx_tp in range(training_tensor_para_dense_size) + ] + else: + model_states_list = [ + [torch.load(os.path.join(args.input_dir, pattern.format(idx_tp)), map_location=map_location_fn)] + for idx_tp in range(training_tensor_para_dense_size) + ] + + with (saved_dir / "args.txt").open("w") as training_args_file: + for k, v in vars(model_training_args).items(): + training_args_file.write(f"{k}:{v}\n") + + np_weight_data_type = WEIGHT2DTYPE[args.weight_data_type] + + val = model_states_00[model_key]["language_model"]["embedding"]["position_embeddings"]["weight"] + val = torch2np(val, np_weight_data_type) + val.tofile((saved_dir / "model.wpe.bin").as_posix()) # not weight, do not need to transpose + + val_list = [ + torch2np(sub_model_states_list[0][model_key]["language_model"]["embedding"]["word_embeddings"]["weight"], + np_weight_data_type) + for sub_model_states_list in model_states_list + ] + val = np.concatenate(val_list, axis=0) + vocab_size = val.shape[0] + val.tofile((saved_dir / "model.wte.bin").as_posix()) + # save vocab_size + if not hasattr(model_training_args, "padded_vocab_size"): + model_training_args.padded_vocab_size = vocab_size + + structure_config = { + "gpt_with_moe": 0, + "expert_num": 0, + "moe_layers": [], + } + model_training_args_vars = vars(model_training_args) + num_experts = 0 + if 'num_experts' in model_training_args_vars.keys(): + num_experts = model_training_args_vars['num_experts'][0] + if num_experts != 0: + structure_config["gpt_with_moe"] = 1 + structure_config['expert_num'] = num_experts + + if inference_tensor_para_size >= training_tensor_para_dense_size: + assert inference_tensor_para_size % training_tensor_para_dense_size == 0 + factor_dense = inference_tensor_para_size // training_tensor_para_dense_size + moe_layers, has_adapters = save_dense_split(model_states_list, factor_dense, model_key, megatron_gpt_key, + np_weight_data_type, saved_dir, ckpt_ver, model_training_args) + else: + assert training_tensor_para_dense_size % inference_tensor_para_size == 0 + factor_dense = training_tensor_para_dense_size // inference_tensor_para_size + moe_layers, has_adapters = save_dense_concat(model_states_list, inference_tensor_para_size, factor_dense, + model_key, megatron_gpt_key, np_weight_data_type, saved_dir, ckpt_ver, model_training_args) + + if inference_tensor_para_size >= training_tensor_para_expert_size: + assert inference_tensor_para_size % training_tensor_para_expert_size == 0 + factor_expert = inference_tensor_para_size // training_tensor_para_expert_size + save_experts_split(moe_layers, num_experts, training_tensor_para_dense_size, training_tensor_para_expert_size, + factor_expert, args, map_location_fn, is_deepspeed, np_weight_data_type, saved_dir, + training_pipeline_para_expert_size) + else: + raise NotImplementedError + + torch.cuda.synchronize() + + structure_config['moe_layers'] = moe_layers + + # Configuration for the model (load by triton backends) + config = configparser.ConfigParser() + config["gpt"] = {} + + if args.vocab_path: + vocab_path = pathlib.Path(args.vocab_path) + with vocab_path.open("r") as vocab_file: + vocab = json.load(vocab_file) + start_id, end_id = vocab[DEFAULT_START_TAG], vocab[DEFAULT_END_TAG] + else: + # hard coded values from english gpt_vocab.json file + start_id, end_id = str(OPENAI_GPT2_START_ID), str(OPENAI_GPT2_END_ID) + try: + config["gpt"]["model_name"] = "gpt" + config["gpt"]["head_num"] = str(model_training_args.num_attention_heads) + config["gpt"]["size_per_head"] = str(model_training_args.hidden_size // model_training_args.num_attention_heads) + config["gpt"]["inter_size"] = str(model_training_args.ffn_hidden_size) + config["gpt"]["num_layer"] = str(model_training_args.num_layers) + config["gpt"]["max_pos_seq_len"] = str(model_training_args.max_position_embeddings) + config["gpt"]["vocab_size"] = str(model_training_args.padded_vocab_size) + config["gpt"]["has_adapters"] = str(has_adapters) + config['gpt']['adapter_inter_size'] = str(model_training_args.project_size) if has_adapters else str(0) + config["gpt"]["layernorm_eps"] = str(model_training_args.layernorm_epsilon) + config["gpt"]["start_id"] = str(start_id) + config["gpt"]["end_id"] = str(end_id) + config["gpt"]["weight_data_type"] = args.weight_data_type + config["gpt"]["tensor_para_size"] = str(args.infer_gpu_num) + config["structure"] = structure_config + with open((saved_dir / f"config.ini").as_posix(), 'w') as configfile: + config.write(configfile) + except Exception as e: + print(f"Fail to save the config in config.ini: {e}") + + +def main(): + parser = argparse.ArgumentParser(formatter_class=argparse.RawTextHelpFormatter) + parser.add_argument("--input-dir", "-input_dir", "-i", help="folder name of checkpoint files", required=True) + parser.add_argument("--saved-dir", "-saved_dir", "-o", help="folder name of output files", required=True) + parser.add_argument( + "--infer-gpu-num", "-infer_gpu_num", "-i_g", type=int, help="How many gpus for inference", required=True + ) + parser.add_argument( + "--weight-data-type", "-weight_data_type", choices=["fp32", "fp16"], default="fp16", help="" + ) + parser.add_argument( + "--load-checkpoints-to-cpu", + "-load_checkpoints_to_cpu", + "-cpu", + type=int, + choices=[0, 1], + default=1, + help="Whether to load model weights to CPU", + ) + parser.add_argument( + "--vocab-path", + type=str, + help="Path to vocabulary file to embed in FasterTransformer checkpoint", + required=False, + ) + parser.add_argument( + "--merges-path", type=str, help="Path to merges file to embed in FasterTransformer checkpoint", required=False + ) + + args = parser.parse_args() + print("\n=============== Argument ===============") + for key in vars(args): + print(f"{key}: {vars(args)[key]}") + print("========================================") + + start_time = datetime.datetime.now() + convert_checkpoint(args) + run_time = datetime.datetime.now() - start_time + print(f"[INFO] Spent {run_time} (h:m:s) to convert the model") + + +if __name__ == "__main__": + main() diff --git a/examples/pytorch/gpt/utils/nemo_ckpt_convert.py b/examples/pytorch/gpt/utils/nemo_ckpt_convert.py index cbca62f93..221521edc 100644 --- a/examples/pytorch/gpt/utils/nemo_ckpt_convert.py +++ b/examples/pytorch/gpt/utils/nemo_ckpt_convert.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/gpt/utils/parallel_gpt.py b/examples/pytorch/gpt/utils/parallel_gpt.py index 13e869df1..a3bdafe69 100644 --- a/examples/pytorch/gpt/utils/parallel_gpt.py +++ b/examples/pytorch/gpt/utils/parallel_gpt.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -28,8 +28,12 @@ def cuda(self): del self.model self.build_model = False self.model = torch.classes.FasterTransformer.ParallelGptOp( - self.head_num, self.size_per_head, 4 * self.head_num * self.size_per_head, - self.layer_num, self.vocab_size, self.start_id, self.end_id, + self.head_num, self.size_per_head, self.inter_size, + self.layer_num, + self.expert_num, + self.moe_k, + self.moe_layer_index, + self.vocab_size, self.start_id, self.end_id, self.tensor_para_size, self.pipeline_para_size, self.int8_mode, # GPT variant parameters self.layernorm_eps, diff --git a/examples/pytorch/gpt/utils/tokenizer.py b/examples/pytorch/gpt/utils/tokenizer.py new file mode 100644 index 000000000..f24506a52 --- /dev/null +++ b/examples/pytorch/gpt/utils/tokenizer.py @@ -0,0 +1,73 @@ +# Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +from typing import List + +from tokenizers import Tokenizer + + +class JiebaBPETokenizer: + """SentencePiece BPE tokenizer with Jieba integration""" + + def __init__(self, tokenizer_json_file): + self.name = 'Jieba BPE Tokenizer' + + self.tokenizer = Tokenizer.from_file(tokenizer_json_file) + self.eod_id = self.tokenizer.token_to_id('<|endoftext|>') + try: + import jieba + import logging + jieba.setLogLevel(logging.INFO) + except ImportError: + raise ImportError( + 'You need to install jieba to use JiebaTokenizer. ' + 'See https://pypi.org/project/rjieba/ for installation.') + self.jieba = jieba + self.new_line = self.vocab['\n'] + self.sep_token = self.vocab[''] + + @property + def vocab_size(self): + return self.tokenizer.get_vocab_size(with_added_tokens=True) + + @property + def vocab(self): + return self.tokenizer.get_vocab(with_added_tokens=True) + + @property + def inv_vocab(self): + vocab = self.vocab + inv_vocab = dict() + for key, val in vocab.items(): + inv_vocab[val] = key + return inv_vocab + + def encode(self, text: str, is_code: bool = False) -> List[int]: + """ + """ + if not is_code: + seg_list = [x for x in self.jieba.cut(text)] + return self.tokenizer.encode( + seg_list, is_pretokenized=True, add_special_tokens=True).ids + else: + return self.tokenizer.encode( + text, is_pretokenized=False, add_special_tokens=True).ids + + def decode(self, token_ids): + text = self.tokenizer.decode(token_ids, skip_special_tokens=True) + return text + + @property + def eod(self): + return self.eod_id diff --git a/examples/pytorch/gpt/utils/update_gpt_config.py b/examples/pytorch/gpt/utils/update_gpt_config.py index cc72a3a72..c962af5db 100644 --- a/examples/pytorch/gpt/utils/update_gpt_config.py +++ b/examples/pytorch/gpt/utils/update_gpt_config.py @@ -1,5 +1,5 @@ #!/usr/bin/env python3 -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/gpt/utils/word_list.py b/examples/pytorch/gpt/utils/word_list.py index 4b9018bc3..b72525fa9 100644 --- a/examples/pytorch/gpt/utils/word_list.py +++ b/examples/pytorch/gpt/utils/word_list.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -33,8 +33,8 @@ def get_tokenizer(vocab_file=None, bpe_file=None): return tokenizer -def to_word_list_format(word_dict): - tokenizer = get_tokenizer() +def to_word_list_format(word_dict, tokenizer=None): + tokenizer = get_tokenizer() if tokenizer is None else tokenizer flat_ids = [] offsets = [] @@ -61,7 +61,10 @@ def to_word_list_format(word_dict): flat_ids[i] = np.pad(ids, (0, pad_to - len(ids)), constant_values=0) offsets[i] = np.pad(offs, (0, pad_to - len(offs)), constant_values=-1) - return np.array([flat_ids, offsets], dtype="int32").transpose((1, 0, 2)) + result = np.array([flat_ids, offsets], dtype="int32").transpose((1, 0, 2)) + if result.shape[0] == 1: + result = result.squeeze(0) + return np.ascontiguousarray(result) def save_word_list(filename, word_list): diff --git a/examples/pytorch/gptj/utils/generate_gptj_config.py b/examples/pytorch/gptj/utils/generate_gptj_config.py index ed203b1b7..347edb6d1 100644 --- a/examples/pytorch/gptj/utils/generate_gptj_config.py +++ b/examples/pytorch/gptj/utils/generate_gptj_config.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/gptneox/utils/eleutherai_gpt_neox_convert.py b/examples/pytorch/gptneox/utils/eleutherai_gpt_neox_convert.py index f93286f6f..4910a579e 100755 --- a/examples/pytorch/gptneox/utils/eleutherai_gpt_neox_convert.py +++ b/examples/pytorch/gptneox/utils/eleutherai_gpt_neox_convert.py @@ -1,5 +1,5 @@ #! /usr/bin/env python3 -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/gptneox/utils/hftokenizer.py b/examples/pytorch/gptneox/utils/hftokenizer.py index 08a824de5..0bb3ef02f 100755 --- a/examples/pytorch/gptneox/utils/hftokenizer.py +++ b/examples/pytorch/gptneox/utils/hftokenizer.py @@ -1,6 +1,6 @@ #! /usr/bin/env python3 -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/gptneox/utils/huggingface_jp_gptneox_convert.py b/examples/pytorch/gptneox/utils/huggingface_jp_gptneox_convert.py index 3411c0421..9570c03d3 100644 --- a/examples/pytorch/gptneox/utils/huggingface_jp_gptneox_convert.py +++ b/examples/pytorch/gptneox/utils/huggingface_jp_gptneox_convert.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/longformer/longformer_qa.py b/examples/pytorch/longformer/longformer_qa.py index ec46446a4..77fac4160 100644 --- a/examples/pytorch/longformer/longformer_qa.py +++ b/examples/pytorch/longformer/longformer_qa.py @@ -110,7 +110,7 @@ def main(): parser = argparse.ArgumentParser() parser.add_argument('-m', '--model-dir', required=True, help='Path to huggingface model dir where model file and config file is stored') - parser.add_argument('-l', '--ft-longformer-lib', type=str, default=os.path.join(project_root, 'build', 'lib', 'libth_longformer.so'), + parser.add_argument('-l', '--ft-longformer-lib', type=str, default=os.path.join(project_root, 'build', 'lib', 'libth_transformer.so'), help='Path to fastertransformer longformer pytorch op lib') parser.add_argument('--data_type', type=str, choices=['fp32', 'fp16', 'bf16'], default='fp32') parser.add_argument('-p', '--passage', type=str, nargs='*', help='Text for paragraph/passage for LongformerBERT QA', diff --git a/examples/pytorch/nemo.py b/examples/pytorch/nemo.py index 5c88e7690..9358c9000 100644 --- a/examples/pytorch/nemo.py +++ b/examples/pytorch/nemo.py @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/swin/Swin-Transformer-Quantization/data.py b/examples/pytorch/swin/Swin-Transformer-Quantization/data.py index ec7695546..81a91d5a6 100644 --- a/examples/pytorch/swin/Swin-Transformer-Quantization/data.py +++ b/examples/pytorch/swin/Swin-Transformer-Quantization/data.py @@ -4,7 +4,7 @@ # Licensed under The MIT License [see LICENSE for details] # Written by Ze Liu # -------------------------------------------------------- -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/swin/Swin-Transformer-Quantization/main.py b/examples/pytorch/swin/Swin-Transformer-Quantization/main.py index ccd57ddd2..82c4b87a6 100644 --- a/examples/pytorch/swin/Swin-Transformer-Quantization/main.py +++ b/examples/pytorch/swin/Swin-Transformer-Quantization/main.py @@ -4,7 +4,7 @@ # Licensed under The MIT License [see LICENSE for details] # Written by Ze Liu # -------------------------------------------------------- -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/swin/Swin-Transformer-Quantization/models/linear_activation.py b/examples/pytorch/swin/Swin-Transformer-Quantization/models/linear_activation.py index 793919ece..eed42d384 100644 --- a/examples/pytorch/swin/Swin-Transformer-Quantization/models/linear_activation.py +++ b/examples/pytorch/swin/Swin-Transformer-Quantization/models/linear_activation.py @@ -1,5 +1,5 @@ # -------------------------------------------------------- -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/swin/Swin-Transformer-Quantization/models/swin_transformer.py b/examples/pytorch/swin/Swin-Transformer-Quantization/models/swin_transformer.py index a89b607ac..3e12df4b2 100644 --- a/examples/pytorch/swin/Swin-Transformer-Quantization/models/swin_transformer.py +++ b/examples/pytorch/swin/Swin-Transformer-Quantization/models/swin_transformer.py @@ -4,7 +4,7 @@ # Licensed under The MIT License [see LICENSE for details] # Written by Ze Liu # -------------------------------------------------------- -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/swin/Swin-Transformer-Quantization/models/swin_transformer_v2.py b/examples/pytorch/swin/Swin-Transformer-Quantization/models/swin_transformer_v2.py index 7529baa5a..8d640b18e 100644 --- a/examples/pytorch/swin/Swin-Transformer-Quantization/models/swin_transformer_v2.py +++ b/examples/pytorch/swin/Swin-Transformer-Quantization/models/swin_transformer_v2.py @@ -4,7 +4,7 @@ # Licensed under The MIT License [see LICENSE for details] # Written by Ze Liu # -------------------------------------------------------- -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/swin/SwinTransformerINT8Weight.py b/examples/pytorch/swin/SwinTransformerINT8Weight.py index e5cd169c4..35bf24030 100644 --- a/examples/pytorch/swin/SwinTransformerINT8Weight.py +++ b/examples/pytorch/swin/SwinTransformerINT8Weight.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/swin/SwinTransformerWeightTransposeQKVWeight.py b/examples/pytorch/swin/SwinTransformerWeightTransposeQKVWeight.py index 278cd0ca4..1319e2600 100644 --- a/examples/pytorch/swin/SwinTransformerWeightTransposeQKVWeight.py +++ b/examples/pytorch/swin/SwinTransformerWeightTransposeQKVWeight.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/swin/checkpoint_quantization.py b/examples/pytorch/swin/checkpoint_quantization.py index c127ed90c..0238e522f 100644 --- a/examples/pytorch/swin/checkpoint_quantization.py +++ b/examples/pytorch/swin/checkpoint_quantization.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -24,7 +24,7 @@ TRT_FUSED_MHA_AMAX_NUM = 3 SCALE_RESERVE_NUM = 8 -def extract_amaxlist(init_dict, depths, version=1, ths_path='../../../build/lib/libpyt_swintransformer.so', verbose=True): +def extract_amaxlist(init_dict, depths, version=1, ths_path='../../../build/lib/libth_transformer.so', verbose=True): # print("Quantizing checkpoint ...") torch.classes.load_library(ths_path) weight_quantize = torch.ops.fastertransformer.swin_weight_quantize diff --git a/examples/pytorch/swin/infer_swintransformer_acc.py b/examples/pytorch/swin/infer_swintransformer_acc.py index 1cae4abb7..203f81702 100644 --- a/examples/pytorch/swin/infer_swintransformer_acc.py +++ b/examples/pytorch/swin/infer_swintransformer_acc.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/swin/infer_swintransformer_int8_op.py b/examples/pytorch/swin/infer_swintransformer_int8_op.py index 9533ab3bb..fde413231 100644 --- a/examples/pytorch/swin/infer_swintransformer_int8_op.py +++ b/examples/pytorch/swin/infer_swintransformer_int8_op.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/swin/infer_swintransformer_op.py b/examples/pytorch/swin/infer_swintransformer_op.py index bf7823dab..420b2be4d 100644 --- a/examples/pytorch/swin/infer_swintransformer_op.py +++ b/examples/pytorch/swin/infer_swintransformer_op.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/swin/run_test_fp16_accuracy.sh b/examples/pytorch/swin/run_test_fp16_accuracy.sh index 92484f22f..d3e945615 100644 --- a/examples/pytorch/swin/run_test_fp16_accuracy.sh +++ b/examples/pytorch/swin/run_test_fp16_accuracy.sh @@ -3,7 +3,7 @@ python infer_swintransformer_acc.py \ --data-path $1 \ --cfg Swin-Transformer-Quantization/SwinTransformer/configs/swinv2/swinv2_tiny_patch4_window8_256.yaml \ --resume Swin-Transformer-Quantization/swinv2_tiny_patch4_window8_256.pth \ - --th-path ../../../build/lib/libpyt_swintransformer.so \ + --th-path ../../../build/lib/libth_transformer.so \ --version 2 \ --fp16 \ --batch-size 128 diff --git a/examples/pytorch/swin/run_test_fp32_accuracy.sh b/examples/pytorch/swin/run_test_fp32_accuracy.sh index ce7d456c1..f19d977fe 100644 --- a/examples/pytorch/swin/run_test_fp32_accuracy.sh +++ b/examples/pytorch/swin/run_test_fp32_accuracy.sh @@ -3,6 +3,6 @@ python infer_swintransformer_acc.py \ --data-path $1 \ --cfg Swin-Transformer-Quantization/SwinTransformer/configs/swinv2/swinv2_tiny_patch4_window8_256.yaml \ --resume Swin-Transformer-Quantization/swinv2_tiny_patch4_window8_256.pth \ - --th-path ../../../build/lib/libpyt_swintransformer.so \ + --th-path ../../../build/lib/libth_transformer.so \ --version 2 \ --batch-size 128 diff --git a/examples/pytorch/swin/run_test_v1.sh b/examples/pytorch/swin/run_test_v1.sh index cd3db09f6..6a761baa8 100644 --- a/examples/pytorch/swin/run_test_v1.sh +++ b/examples/pytorch/swin/run_test_v1.sh @@ -3,6 +3,6 @@ python infer_swintransformer_op.py \ --data-path /workspace \ --cfg Swin-Transformer-Quantization/SwinTransformer/configs/swin/swin_tiny_patch4_window7_224.yaml \ --resume Swin-Transformer-Quantization/swin_tiny_patch4_window7_224.pth \ - --th-path ../../../build/lib/libpyt_swintransformer.so \ + --th-path ../../../build/lib/libth_transformer.so \ --version 1 \ --batch-size $1 diff --git a/examples/pytorch/swin/run_test_v1_int8.sh b/examples/pytorch/swin/run_test_v1_int8.sh index 4d001a752..866c6f2d9 100644 --- a/examples/pytorch/swin/run_test_v1_int8.sh +++ b/examples/pytorch/swin/run_test_v1_int8.sh @@ -3,7 +3,7 @@ python infer_swintransformer_int8_op.py \ --data-path /workspace \ --cfg Swin-Transformer-Quantization/SwinTransformer/configs/swin/swin_tiny_patch4_window7_224.yaml \ --resume Swin-Transformer-Quantization/calib-checkpoint/swin_tiny_patch4_window7_224_calib.pth \ - --th-path ../../../build/lib/libpyt_swintransformer.so \ + --th-path ../../../build/lib/libth_transformer.so \ --int8-mode 1\ --version 1\ --batch-size $1 diff --git a/examples/pytorch/swin/run_test_v1_int8_accuracy.sh b/examples/pytorch/swin/run_test_v1_int8_accuracy.sh index fdbee1ed7..b9f31a059 100644 --- a/examples/pytorch/swin/run_test_v1_int8_accuracy.sh +++ b/examples/pytorch/swin/run_test_v1_int8_accuracy.sh @@ -3,7 +3,7 @@ python infer_swintransformer_int8_op.py \ --data-path $1 \ --cfg Swin-Transformer-Quantization/SwinTransformer/configs/swin/swin_tiny_patch4_window7_224.yaml \ --resume Swin-Transformer-Quantization/calib-checkpoint/swin_tiny_patch4_window7_224_calib.pth \ - --th-path ../../../build/lib/libpyt_swintransformer.so \ + --th-path ../../../build/lib/libth_transformer.so \ --int8-mode 1\ --version 1\ --batch-size 128 diff --git a/examples/pytorch/swin/run_test_v2.sh b/examples/pytorch/swin/run_test_v2.sh index 1742c9f05..a01851383 100644 --- a/examples/pytorch/swin/run_test_v2.sh +++ b/examples/pytorch/swin/run_test_v2.sh @@ -3,6 +3,6 @@ python infer_swintransformer_op.py \ --data-path /workspace \ --cfg Swin-Transformer-Quantization/SwinTransformer/configs/swinv2/swinv2_tiny_patch4_window8_256.yaml \ --resume Swin-Transformer-Quantization/swinv2_tiny_patch4_window8_256.pth \ - --th-path ../../../build/lib/libpyt_swintransformer.so \ + --th-path ../../../build/lib/libth_transformer.so \ --version 2 \ --batch-size $1 diff --git a/examples/pytorch/swin/run_test_v2_int8.sh b/examples/pytorch/swin/run_test_v2_int8.sh index 436ed7505..c7bb8e1be 100644 --- a/examples/pytorch/swin/run_test_v2_int8.sh +++ b/examples/pytorch/swin/run_test_v2_int8.sh @@ -3,7 +3,7 @@ python infer_swintransformer_int8_op.py \ --data-path /data/datasets/ILSVRC2012 \ --cfg Swin-Transformer-Quantization/SwinTransformer/configs/swinv2/swinv2_tiny_patch4_window8_256.yaml \ --resume Swin-Transformer-Quantization/calib-checkpoint/swinv2_tiny_patch4_window8_256_calib.pth \ - --th-path ../../../build/lib/libpyt_swintransformer.so \ + --th-path ../../../build/lib/libth_transformer.so \ --version 2 \ --int8-mode 1 \ --batch-size $1 diff --git a/examples/pytorch/swin/run_test_v2_int8_accuracy.sh b/examples/pytorch/swin/run_test_v2_int8_accuracy.sh index 7a1d2e278..5f110ef1c 100644 --- a/examples/pytorch/swin/run_test_v2_int8_accuracy.sh +++ b/examples/pytorch/swin/run_test_v2_int8_accuracy.sh @@ -3,7 +3,7 @@ python infer_swintransformer_int8_op.py \ --data-path $1 \ --cfg Swin-Transformer-Quantization/SwinTransformer/configs/swinv2/swinv2_tiny_patch4_window8_256.yaml \ --resume Swin-Transformer-Quantization/calib-checkpoint/swinv2_tiny_patch4_window8_256_calib.pth \ - --th-path ../../../build/lib/libpyt_swintransformer.so \ + --th-path ../../../build/lib/libth_transformer.so \ --int8-mode 1\ --version 2\ --batch-size 128 diff --git a/examples/pytorch/t5/mnli_task_example.py b/examples/pytorch/t5/mnli_task_example.py index 1f827bff7..1e86647c9 100644 --- a/examples/pytorch/t5/mnli_task_example.py +++ b/examples/pytorch/t5/mnli_task_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -112,8 +112,9 @@ def __init__(self, input_ids, attention_mask): class EncoderDecoderConfig: - def __init__(self, d_model, vocab_size, num_heads, d_kv, d_ff, num_layers, - relative_attention_num_buckets_or_max_pos_seq_len, decoder_start_token_id=0, decoder_end_token_id=1): + def __init__(self, d_model, vocab_size, num_heads, d_kv, d_ff, num_layers, + relative_attention_num_buckets_or_max_pos_seq_len, + adapter_inter_size, adapter_norm_position, decoder_start_token_id=0, decoder_end_token_id=1): self.d_model = d_model self.vocab_size = vocab_size self.num_heads = num_heads @@ -121,9 +122,12 @@ def __init__(self, d_model, vocab_size, num_heads, d_kv, d_ff, num_layers, self.d_ff = d_ff self.num_layers = num_layers self.relative_attention_num_buckets = relative_attention_num_buckets_or_max_pos_seq_len + self.adapter_inter_size = adapter_inter_size + self.adapter_norm_position = adapter_norm_position self.decoder_start_token_id = decoder_start_token_id self.decoder_end_token_id = decoder_end_token_id + data_type_mapping = {"fp32": 0, "fp16": 1, "bf16": 2} def mnli_task(args_dict): @@ -222,16 +226,22 @@ def mnli_task(args_dict): ckpt_config.getint('encoder', 'd_kv'), ckpt_config.getint('encoder', 'd_ff'), ckpt_config.getint('encoder', 'num_layers'), - ckpt_config.getint('encoder', 'relative_attention_num_buckets_or_max_pos_seq_len') + ckpt_config.getint('encoder', + 'relative_attention_num_buckets_or_max_pos_seq_len'), + ckpt_config.getint('encoder', 'adapter_inter_size', fallback=0), + ckpt_config.get('encoder', 'adapter_norm_position', fallback="pre") ) - + decoder_config = EncoderDecoderConfig(ckpt_config.getint('decoder', 'd_model'), ckpt_config.getint('decoder', 'vocab_size'), ckpt_config.getint('decoder', 'num_heads'), ckpt_config.getint('decoder', 'd_kv'), ckpt_config.getint('decoder', 'd_ff'), ckpt_config.getint('decoder', 'num_layers'), - ckpt_config.getint('decoder', 'relative_attention_num_buckets_or_max_pos_seq_len'), + ckpt_config.getint('decoder', + 'relative_attention_num_buckets_or_max_pos_seq_len'), + ckpt_config.getint('decoder', 'adapter_inter_size', fallback=0), + ckpt_config.get('decoder', 'adapter_norm_position', fallback="pre"), tokenizer_t5.bos_id, tokenizer_t5.eos_id ) @@ -286,28 +296,32 @@ def mnli_task(args_dict): remove_padding = True if batch_size > 32 else False ft_encoder = FTT5Encoder(ft_encoder_weight.w, lib_path, encoder_config.num_heads, - encoder_config.d_kv, encoder_config.d_ff, - encoder_config.d_model, remove_padding, encoder_config.num_layers, - encoder_config.relative_attention_num_buckets, - 0, # num_experts - [], # moe_layer_index - 128, False, - q_scaling, tensor_para_size, pipeline_para_size, t5_with_bias, - position_embedding_type, 0, activation_type) + encoder_config.d_kv, encoder_config.d_ff, + encoder_config.d_model, remove_padding, encoder_config.num_layers, + encoder_config.relative_attention_num_buckets, + 0, # num_experts + [], # moe_layer_index + 128, False, + q_scaling, tensor_para_size, pipeline_para_size, t5_with_bias, + position_embedding_type, 0, activation_type, + adapter_inter_size=encoder_config.adapter_inter_size, + adapter_norm_position=encoder_config.adapter_norm_position) ft_decoding = FTT5Decoding(ft_decoding_weight.w, lib_path, - decoder_config.num_heads, decoder_config.d_kv, - decoder_config.d_ff, encoder_config.d_model, - decoder_config.d_model, decoder_config.num_layers, - decoder_config.decoder_start_token_id, decoder_config.decoder_end_token_id, - decoder_config.vocab_size, - q_scaling, - decoder_config.relative_attention_num_buckets, - 0, # num_experts - [], # moe_layer_index - max_distance=128, - tensor_para_size=tensor_para_size, pipeline_para_size=pipeline_para_size, - moe_k=0, activation_type=activation_type, - t5_with_bias=t5_with_bias, position_embedding_type = position_embedding_type) + decoder_config.num_heads, decoder_config.d_kv, + decoder_config.d_ff, encoder_config.d_model, + decoder_config.d_model, decoder_config.num_layers, + decoder_config.decoder_start_token_id, decoder_config.decoder_end_token_id, + decoder_config.vocab_size, + q_scaling, + decoder_config.relative_attention_num_buckets, + 0, # num_experts + [], # moe_layer_index + max_distance=128, + tensor_para_size=tensor_para_size, pipeline_para_size=pipeline_para_size, + moe_k=0, activation_type=activation_type, + t5_with_bias=t5_with_bias, position_embedding_type=position_embedding_type, + adapter_inter_size=decoder_config.adapter_inter_size, + adapter_norm_position=decoder_config.adapter_norm_position) ft_t5 = FTT5(ft_encoder, ft_decoding) @@ -381,7 +395,7 @@ def mnli_task(args_dict): help='Probability (p) value of top p sampling in decoding. Default is 0.0. ') parser.add_argument('-d', '--data_type', type=str, default="fp32", metavar='STRING', help='data type (default: fp32)', choices=['fp32', 'fp16', 'bf16']) - parser.add_argument('-lib_path', '--lib_path', type=str, default="/workspace/FasterTransformer/build/lib/libth_t5.so", metavar='STRING', + parser.add_argument('-lib_path', '--lib_path', type=str, default="/workspace/FasterTransformer/build/lib/libth_transformer.so", metavar='STRING', help='the path of FasterTransformer pytorch t5 op library.') parser.add_argument('-data_path', '--data_path', type=str, required=True, help="the MNLI task data path") parser.add_argument('-tensor_para_size', '--tensor_para_size', type=int, default=1, metavar='NUMBER', diff --git a/examples/pytorch/t5/perf_benchmark.py b/examples/pytorch/t5/perf_benchmark.py index 14fd13f56..7fb672fd5 100644 --- a/examples/pytorch/t5/perf_benchmark.py +++ b/examples/pytorch/t5/perf_benchmark.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -385,7 +385,7 @@ def translate(args_dict): help='data type for inference (default: fp32)', choices=['fp32', 'fp16']) parser.add_argument('-ld', '--load_data_type', type=str, default="fp32", metavar='STRING', help='data type for loading weights (default: fp32)', choices=['fp32', 'fp16']) - parser.add_argument('-lib_path', '--lib_path', type=str, default="lib/libth_t5.so", metavar='STRING', + parser.add_argument('-lib_path', '--lib_path', type=str, default="lib/libth_transformer.so", metavar='STRING', help='the path of FasterTransformer pytorch t5 op library.') parser.add_argument('-model_path', '--model_path', type=str, default=None, metavar='STRING', help='T5 model path.') diff --git a/examples/pytorch/t5/summarization.py b/examples/pytorch/t5/summarization.py index 8388de3f2..71a2684d9 100644 --- a/examples/pytorch/t5/summarization.py +++ b/examples/pytorch/t5/summarization.py @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -55,7 +55,7 @@ def main(): parser.add_argument("--max_seq_len", type=int, default=200) parser.add_argument("--ft_use_hf_config", action="store_true", help="use the hyper-parameters from the hf model") - parser.add_argument('--lib_path', type=str, default='./lib/libth_t5.so', + parser.add_argument('--lib_path', type=str, default='./lib/libth_transformer.so', help='path to the pyt_fastertransformer dynamic lib file.') parser.add_argument('--tensor_para_size', type=int, default=1, help='tensor parallel size') diff --git a/examples/pytorch/t5/translate_example.py b/examples/pytorch/t5/translate_example.py index 62a08d038..2a88054b1 100644 --- a/examples/pytorch/t5/translate_example.py +++ b/examples/pytorch/t5/translate_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -473,7 +473,7 @@ def translate(args_dict): help='data type for inference (default: fp32)', choices=['fp32', 'fp16', 'bf16']) parser.add_argument('-ld', '--load_data_type', type=str, default="fp32", metavar='STRING', help='data type for loading weights (default: fp32)', choices=['fp32', 'fp16']) - parser.add_argument('-lib_path', '--lib_path', type=str, default="lib/libth_t5.so", metavar='STRING', + parser.add_argument('-lib_path', '--lib_path', type=str, default="lib/libth_transformer.so", metavar='STRING', help='the path of FasterTransformer pytorch t5 op library.') parser.add_argument('-model_path', '--model_path', type=str, default=None, metavar='STRING', help='T5 model path.') diff --git a/examples/pytorch/t5/utils/ft_decoding.py b/examples/pytorch/t5/utils/ft_decoding.py index c3b34e1b7..bb2d85667 100644 --- a/examples/pytorch/t5/utils/ft_decoding.py +++ b/examples/pytorch/t5/utils/ft_decoding.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -42,6 +42,7 @@ def __init__( self.position_embedding_type = position_embedding_type self.real_weights_num = 31 # assume all weights are allocated and converted to specific data type self.weight_data_type = weight_data_type + self.adapter_inter_size = config.adapter_inter_size if hasattr(config, "adapter_inter_size") else 0 self.w = [] self.use_mpi = dist.is_mpi_available() @@ -151,9 +152,9 @@ def load_from_model(self, model): self.w.append(t) #TODO: pass None Type to Torch Op - for i in range(15): + for i in range(23): self.w.append(torch.empty((1,1), dtype=torch_weight_dtype).contiguous().cuda()) - + def load_from_bin(self, ckpt_path, model_type): start_layer = self.pipeline_para_rank * self.num_layer // self.pipeline_para_size end_layer = (self.pipeline_para_rank + 1) * self.num_layer // self.pipeline_para_size @@ -243,7 +244,24 @@ def load_from_bin(self, ckpt_path, model_type): self.w.append(torch.empty((1,1), dtype=torch_weight_dtype).contiguous().cuda()) # add empty moe gate weight self.w.append(torch.empty((1,1), dtype=torch_weight_dtype).contiguous().cuda()) - + + if self.adapter_inter_size > 0: + ckpt_path_block = f"{ckpt_path}/decoder.block" + for adapter in ["after_attention_adapter", "after_ffn_adapter"]: + for in_out in ["wi", "wo"]: + t = torch.stack([torch.from_numpy(np.fromfile( + f"{ckpt_path_block}.{i}.{adapter}.DenseSiluDense.{in_out}.weight.{self.tensor_para_rank}.bin", + dtype=np_weight_dtype)) for i in range(start_layer, end_layer)], 0).contiguous().cuda() + self.w.append(t) + for weight_bias in ["weight", "bias"]: + t = torch.stack([torch.from_numpy(np.fromfile( + f"{ckpt_path_block}.{i}.{adapter}.layer_norm.{weight_bias}.bin", + dtype=np_weight_dtype)) for i in range(start_layer, end_layer)], 0).contiguous().cuda() + self.w.append(t) + else: + for i in range(8): + self.w.append(torch.empty((1, 1), dtype=torch_weight_dtype).contiguous().cuda()) + else: # Megatron-DeepSpeed, no tensor parallelism currently #TODO: add tensor parallelism in the conversion script @@ -370,6 +388,10 @@ def load_from_bin(self, ckpt_path, model_type): else: self.w.append(torch.empty((1,1), dtype=torch_weight_dtype).contiguous().cuda()) + # adapters are not supported in Megatron-DeepSpeed currently, so here weight placeholder is always empty + for i in range(8): + self.w.append(torch.empty((1, 1), dtype=torch_weight_dtype).contiguous().cuda()) + def to_cuda(self): for i in range(self.real_weights_num): self.w[i] = self.w[i].cuda() @@ -393,9 +415,11 @@ def to_bfloat16(self): class FTT5Decoding(nn.Module): def __init__(self, decoding_weight_list, lib_path, head_num, head_size, inter_size, - mem_d_model, d_model, num_layer, start_id, end_id, vocab_size, q_scaling=1.0, num_bucket=32, num_expert=0, moe_layer_index=[], - max_distance=128, tensor_para_size=1, pipeline_para_size=1, t5_with_bias=False, position_embedding_type=0, moe_k=0, - activation_type="relu", tie_word_embeddings=True): + mem_d_model, d_model, num_layer, start_id, end_id, vocab_size, q_scaling=1.0, num_bucket=32, + num_expert=0, moe_layer_index=[], + max_distance=128, tensor_para_size=1, pipeline_para_size=1, t5_with_bias=False, + position_embedding_type=0, moe_k=0, + activation_type="relu", tie_word_embeddings=True, adapter_inter_size=0, adapter_norm_position="pre"): super().__init__() self.use_mpi = dist.is_mpi_available() @@ -412,19 +436,31 @@ def __init__(self, decoding_weight_list, lib_path, head_num, head_size, inter_si torch.classes.load_library(lib_path) try: - self.decoding = torch.classes.FasterTransformer.T5Decoding(head_num, head_size, inter_size, mem_d_model, d_model, num_layer, - vocab_size, num_bucket, num_expert, max_distance, q_scaling, start_id, end_id, - tensor_para_size, pipeline_para_size, t5_with_bias, - position_embedding_type, moe_k, activation_type, tie_word_embeddings, moe_layer_index, *decoding_weight_list) + self.decoding = torch.classes.FasterTransformer.T5Decoding(head_num, head_size, inter_size, mem_d_model, + d_model, num_layer, + vocab_size, num_bucket, num_expert, max_distance, + q_scaling, start_id, end_id, + tensor_para_size, pipeline_para_size, + t5_with_bias, + position_embedding_type, moe_k, activation_type, + tie_word_embeddings, adapter_inter_size, + adapter_norm_position, + moe_layer_index, *decoding_weight_list) except: - self.decoding = torch.classes.FasterTransformerT5Decoding(head_num, head_size, inter_size, mem_d_model, d_model, num_layer, - vocab_size, num_bucket, num_expert, max_distance, q_scaling, start_id, end_id, - tensor_para_size, pipeline_para_size, t5_with_bias, - position_embedding_type, moe_k, activation_type, tie_word_embeddings, moe_layer_index, *decoding_weight_list) + self.decoding = torch.classes.FasterTransformerT5Decoding(head_num, head_size, inter_size, mem_d_model, + d_model, num_layer, + vocab_size, num_bucket, num_expert, max_distance, + q_scaling, start_id, end_id, + tensor_para_size, pipeline_para_size, + t5_with_bias, + position_embedding_type, moe_k, activation_type, + tie_word_embeddings, adapter_inter_size, + adapter_norm_position, + moe_layer_index, *decoding_weight_list) def forward(self, beam_width, max_seq_len, top_k, top_p, beam_search_diversity_rate, temperature, - len_penalty, repetition_penalty, random_seed, + len_penalty, repetition_penalty, presence_penalty, min_length, random_seed, mem_hidden_states, mem_seq_len, is_return_output_log_probs, is_return_cum_log_probs, is_return_cross_attentions=False, bad_words_list=None, stop_words_list=None): @@ -432,7 +468,7 @@ def forward(self, beam_width, max_seq_len, top_k, top_p, # So, the top_k and top_p must be some values now. results = self.decoding.forward(beam_width, max_seq_len, top_k, top_p, beam_search_diversity_rate, - temperature, len_penalty, repetition_penalty, + temperature, len_penalty, repetition_penalty, presence_penalty, min_length, random_seed, mem_hidden_states, mem_seq_len, is_return_output_log_probs, is_return_cum_log_probs, is_return_cross_attentions, bad_words_list, stop_words_list) @@ -447,7 +483,7 @@ def __init__(self, encoder, decoding): def forward(self, input_token, inputs_embeds, beam_size, max_seq_len, top_k, top_p, beam_search_diversity_rate = 0.0, - temperature=1.0, len_penalty=0.0, repetition_penalty=1.0, random_seed=0, + temperature=1.0, len_penalty=0.0, repetition_penalty=None, presence_penalty=None, min_length=0, random_seed=0, is_return_output_log_probs=False, is_return_cum_log_probs=False, is_return_cross_attentions=False, bad_words_list=None, stop_words_list=None): input_ids = input_token.input_ids.to("cuda").type(torch.int32) @@ -466,6 +502,8 @@ def forward(self, input_token, inputs_embeds, beam_size, max_seq_len, temperature, # optional, can be None len_penalty, # optional, can be None repetition_penalty, # optional, can be None + presence_penalty, # optional, can be None + min_length, # optional, can be None random_seed, # optional, can be None ft_encoder_outputs, mem_seq_len, diff --git a/examples/pytorch/t5/utils/ft_encoder.py b/examples/pytorch/t5/utils/ft_encoder.py index 21526cc3b..78a3cdaed 100644 --- a/examples/pytorch/t5/utils/ft_encoder.py +++ b/examples/pytorch/t5/utils/ft_encoder.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -43,6 +43,7 @@ def __init__( self.t5_with_moe = t5_with_moe self.position_embedding_type = position_embedding_type self.weight_data_type = weight_data_type + self.adapter_inter_size = config.adapter_inter_size if hasattr(config, "adapter_inter_size") else 0 self.w = [] self.use_mpi = dist.is_mpi_available() @@ -119,7 +120,7 @@ def load_from_model(self, model): # assume this only applies to huggingface mod self.w.append(t) #TODO: pass None Type to Torch Op - for i in range(11): + for i in range(19): self.w.append(torch.empty((1,1), dtype=torch_weight_dtype).contiguous().cuda()) def load_from_bin(self, ckpt_path, model_type): # assume this only applies to megatron models and megatron-deepspedd models @@ -195,7 +196,24 @@ def load_from_bin(self, ckpt_path, model_type): # assume this only applies to me self.w.append(torch.empty((1,1), dtype=torch_weight_dtype).contiguous().cuda()) # add empty moe gate weight self.w.append(torch.empty((1,1), dtype=torch_weight_dtype).contiguous().cuda()) - + + if self.adapter_inter_size > 0: + ckpt_path_block = f"{ckpt_path}/encoder.block" + for adapter in ["after_attention_adapter", "after_ffn_adapter"]: + for in_out in ["wi", "wo"]: + t = torch.stack([torch.from_numpy(np.fromfile( + f"{ckpt_path_block}.{i}.{adapter}.DenseSiluDense.{in_out}.weight.{self.tensor_para_rank}.bin", + dtype=np_weight_dtype)) for i in range(start_layer, end_layer)], 0).contiguous().cuda() + self.w.append(t) + for weight_bias in ["weight", "bias"]: + t = torch.stack([torch.from_numpy(np.fromfile( + f"{ckpt_path_block}.{i}.{adapter}.layer_norm.{weight_bias}.bin", + dtype=np_weight_dtype)) for i in range(start_layer, end_layer)], 0).contiguous().cuda() + self.w.append(t) + else: + for i in range(8): + self.w.append(torch.empty((1, 1), dtype=torch_weight_dtype).contiguous().cuda()) + else: # Megatron-DeepSpeed, no tensor parallelism currently #TODO: add tensor parallelism in the conversion script t = torch.stack([torch.from_numpy(np.fromfile(f"{ckpt_path}/encoder.layers.{i}.input_layernorm.weight.bin", dtype=np_weight_dtype)) for i in range(start_layer, end_layer)], 0).contiguous().cuda() @@ -306,6 +324,10 @@ def load_from_bin(self, ckpt_path, model_type): # assume this only applies to me else: self.w.append(torch.empty((1,1), dtype=torch_weight_dtype).contiguous().cuda()) + # adapters are not supported in Megatron-DeepSpeed currently, so here weight placeholder is always empty + for i in range(8): + self.w.append(torch.empty((1, 1), dtype=torch_weight_dtype).contiguous().cuda()) + def to_cuda(self): for i in range(self.real_weights_num): self.w[i] = self.w[i].cuda() @@ -329,8 +351,10 @@ def to_bfloat16(self): class FTT5Encoder(nn.Module): def __init__(self, encoder_weight_list, lib_path, head_num, head_size, inter_size, d_model, is_remove_padding, - num_layer, num_bucket=32, num_expert=0, moe_layer_index=[], max_distance=128, sparse=False, q_scaling=1.0, tensor_para_size=1, pipeline_para_size=1, t5_with_bias=False, - position_embedding_type=0, moe_k=0, activation_type="relu"): + num_layer, num_bucket=32, num_expert=0, moe_layer_index=[], max_distance=128, sparse=False, + q_scaling=1.0, tensor_para_size=1, pipeline_para_size=1, t5_with_bias=False, + position_embedding_type=0, moe_k=0, activation_type="relu", adapter_inter_size=0, + adapter_norm_position="pre"): super().__init__() self.use_mpi = dist.is_mpi_available() @@ -347,13 +371,23 @@ def __init__(self, encoder_weight_list, lib_path, head_num, head_size, inter_siz torch.classes.load_library(lib_path) try: - self.encoder = torch.classes.FasterTransformer.T5Encoder(*encoder_weight_list, moe_layer_index, head_num, head_size, inter_size, d_model, - is_remove_padding, num_layer, num_bucket, num_expert, max_distance, sparse, q_scaling, tensor_para_size, pipeline_para_size, - t5_with_bias, position_embedding_type, moe_k, activation_type) + self.encoder = torch.classes.FasterTransformer.T5Encoder(*encoder_weight_list, moe_layer_index, head_num, + head_size, inter_size, d_model, + is_remove_padding, num_layer, num_bucket, + num_expert, max_distance, sparse, q_scaling, + tensor_para_size, pipeline_para_size, + t5_with_bias, position_embedding_type, moe_k, + activation_type, adapter_inter_size, + adapter_norm_position) except: - self.encoder = torch.classes.FasterTransformerT5Encoder(*encoder_weight_list, moe_layer_index, head_num, head_size, inter_size, d_model, - is_remove_padding, num_layer, num_bucket, num_expert, max_distance, sparse, q_scaling, tensor_para_size, pipeline_para_size, - t5_with_bias, position_embedding_type, moe_k, activation_type) + self.encoder = torch.classes.FasterTransformerT5Encoder(*encoder_weight_list, moe_layer_index, head_num, + head_size, inter_size, d_model, + is_remove_padding, num_layer, num_bucket, + num_expert, max_distance, sparse, q_scaling, + tensor_para_size, pipeline_para_size, + t5_with_bias, position_embedding_type, moe_k, + activation_type, adapter_inter_size, + adapter_norm_position) def forward(self, input, seq_len, inputs_embeds=None): output = self.encoder.forward(input, seq_len, inputs_embeds) diff --git a/examples/pytorch/t5/utils/huggingface_t5_ckpt_convert.py b/examples/pytorch/t5/utils/huggingface_t5_ckpt_convert.py index b914d4ae1..7853a6ac3 100644 --- a/examples/pytorch/t5/utils/huggingface_t5_ckpt_convert.py +++ b/examples/pytorch/t5/utils/huggingface_t5_ckpt_convert.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/t5/utils/megatron_t5_ckpt_convert.py b/examples/pytorch/t5/utils/megatron_t5_ckpt_convert.py index f030289f6..6ad10b42d 100644 --- a/examples/pytorch/t5/utils/megatron_t5_ckpt_convert.py +++ b/examples/pytorch/t5/utils/megatron_t5_ckpt_convert.py @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/t5/utils/nemo_t5_ckpt_convert.py b/examples/pytorch/t5/utils/nemo_t5_ckpt_convert.py index 28665bec2..550ab8fbb 100644 --- a/examples/pytorch/t5/utils/nemo_t5_ckpt_convert.py +++ b/examples/pytorch/t5/utils/nemo_t5_ckpt_convert.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -51,22 +51,30 @@ "decoder_rpe": "block.0.layer.0.SelfAttention.relative_attention_bias", } -encoder_mapping = { +common_mapping = { "input_layernorm": "layer.0.layer_norm", - "self_attention.query_key_value": ["layer.0.SelfAttention.q", "layer.0.SelfAttention.k", "layer.0.SelfAttention.v"], "self_attention.dense": "layer.0.SelfAttention.o", "post_attention_layernorm": "layer.1.layer_norm", + "final_layernorm": "final_layer_norm", + "adapter_1.layernorm": "after_attention_adapter.layer_norm", + "adapter_1.mlp.dense_h_to_4h": "after_attention_adapter.DenseSiluDense.wi", + "adapter_1.mlp.dense_4h_to_h": "after_attention_adapter.DenseSiluDense.wo", + "adapter_2.layernorm": "after_ffn_adapter.layer_norm", + "adapter_2.mlp.dense_h_to_4h": "after_ffn_adapter.DenseSiluDense.wi", + "adapter_2.mlp.dense_4h_to_h": "after_ffn_adapter.DenseSiluDense.wo", +} + +encoder_mapping = { + **common_mapping, + "self_attention.query_key_value": ["layer.0.SelfAttention.q", "layer.0.SelfAttention.k", "layer.0.SelfAttention.v"], "mlp.dense_h_to_4h": "layer.1.DenseReluDense.wi", "mlp.dense_h_to_4h_2": "layer.1.DenseReluDense.wi2", ## gated activation "mlp.dense_4h_to_h": "layer.1.DenseReluDense.wo", - "final_layernorm": "final_layer_norm", } decoder_mapping = { - "input_layernorm": "layer.0.layer_norm", + **common_mapping, "self_attention.query_key_value": ["layer.0.SelfAttention.qkv"], - "self_attention.dense": "layer.0.SelfAttention.o", - "post_attention_layernorm": "layer.1.layer_norm", "inter_attention.query": ["layer.1.EncDecAttention.q"], "inter_attention.key_value": ["layer.1.EncDecAttention.k", "layer.1.EncDecAttention.v"], "inter_attention.dense": "layer.1.EncDecAttention.o", @@ -74,7 +82,6 @@ "mlp.dense_h_to_4h": "layer.2.DenseReluDense.wi", "mlp.dense_h_to_4h_2": "layer.2.DenseReluDense.wi2", "mlp.dense_4h_to_h": "layer.2.DenseReluDense.wo", - "final_layernorm": "final_layer_norm", } megatron_HF_name_mapping = {"shared": shared_mapping, "encoder": encoder_mapping, "decoder": decoder_mapping} @@ -104,10 +111,12 @@ def megatron2hf_name(saved_key, name_mapping): saved_key = saved_key.replace("layers", "block") - mapping_key = saved_key.rsplit(sep=".", maxsplit=1)[0] - mapping_key_no_num = mapping_key[mapping_key.find(".", 6) + 1 :] - block_num = mapping_key[: mapping_key.find(".", 6) + 1] - weight_or_bias = saved_key.rsplit(sep=".", maxsplit=1)[1] + split_last_dot = saved_key.rsplit(sep=".", maxsplit=1) + mapping_key = split_last_dot[0] + weight_or_bias = split_last_dot[1] + split_idx = mapping_key.find(".", 6) + 1 + mapping_key_no_num = mapping_key[split_idx:] + block_num = mapping_key[: split_idx] mapping_vals_no_num = name_mapping[mapping_key_no_num] if not isinstance(mapping_vals_no_num, list): @@ -160,6 +169,7 @@ def prompt_convert(args, prompt_config, prompt_weights): LOGGER.info(">>>>>>>>>>>>>>>> model saved config") LOGGER.info(config_path.read_text()) + # This tool is used to support the new megatron model trained by pipeline parallel + tensor parallel def merge_and_convert_process( model_type, @@ -174,21 +184,16 @@ def merge_and_convert_process( ): try: assert model_type == "encoder" or model_type == "decoder" - model_config = None if nemo_model_config.get(model_type, None) == None else nemo_model_config[model_type] - + model_config = nemo_model_config.get(model_type, None) + num_layers = model_config["num_layers"] if model_config is not None else nemo_model_config["num_layers"] prefix = model_type pipeline_para_size = nemo_model_config["pipeline_model_parallel_size"] pipeline_model_parallel_split_rank = nemo_model_config.get("pipeline_model_parallel_split_rank", 0) - if model_config != None: - num_layers = model_config["num_layers"] - else: - num_layers = nemo_model_config["num_layers"] - major_device = models_list[0][key].device name_mapping = megatron_HF_name_mapping[model_type] saved_dir = pathlib.Path(saved_dir) - if key.find("layers.") != -1: + if key.startswith("layers."): layer_index = int(key[7 : key.find(".", 7)]) encoder_num_pipeline_stages = pipeline_model_parallel_split_rank decoder_num_pipeline_stages = pipeline_para_size - pipeline_model_parallel_split_rank @@ -203,19 +208,24 @@ def merge_and_convert_process( else: saved_key = key - if ( - key.find("input_layernorm.weight") != -1 - or key.find("input_layernorm.bias") != -1 - or key.find("self_attention.dense.bias") != -1 - or key.find("inter_attention.dense.bias") != -1 - or key.find("post_attention_layernorm.weight") != -1 - or key.find("post_inter_attention_layernorm.weight") != -1 - or key.find("post_attention_layernorm.bias") != -1 - or key.find("post_inter_attention_layernorm.bias") != -1 - or key.find("mlp.dense_4h_to_h.bias") != -1 - or key.find("final_layernorm.weight") != -1 - or key.find("final_layernorm.bias") != -1 - ): + is_not_legacy = model_config is None or not model_config.get("megatron_legacy", False) + if any(k in key for k in ( + "input_layernorm.weight", + "input_layernorm.bias", + "self_attention.dense.bias", + "inter_attention.dense.bias", + "post_attention_layernorm.weight", + "post_inter_attention_layernorm.weight", + "post_attention_layernorm.bias", + "post_inter_attention_layernorm.bias", + "mlp.dense_4h_to_h.bias", + "final_layernorm.weight", + "final_layernorm.bias", + "adapter_1.layernorm.weight", + "adapter_1.layernorm.bias", + "adapter_2.layernorm.weight", + "adapter_2.layernorm.bias", + )): # shared weights, only need to convert the weights of rank 0 if tensor_para_rank == 0: saved_keys = megatron2hf_name(saved_key, name_mapping) @@ -234,38 +244,22 @@ def merge_and_convert_process( ) val.tofile(saved_path) - elif ( - key.find("self_attention.dense.weight") != -1 - or key.find("inter_attention.dense.weight") != -1 - or key.find("mlp.dense_4h_to_h.weight") != -1 - ): - vals = [] - for k in range(factor): - val = safe_transpose(models_list[k][key]) - val = val.float().to(major_device) - vals.append(val) - saved_keys = megatron2hf_name(saved_key, name_mapping) - saved_path = saved_dir / f"{prefix}.{saved_keys[0]}.{tensor_para_rank:d}.bin" - val = torch.cat(vals, dim=0) - val = torch2np(val, np_weight_data_type) - LOGGER.debug( - "merge for pp_rank=%d tp_rank=%d factor=%d src_key=%s filename=%s shape=%s dtype=%s", - pipeline_para_rank, - tensor_para_rank, - factor, - key, - saved_path.name, - val.shape, - val.dtype, - ) - val.tofile(saved_path) - - elif ( - key.find("mlp.dense_h_to_4h.weight") != -1 - or key.find("mlp.dense_h_to_4h.bias") != -1 - or key.find("mlp.dense_h_to_4h_2.weight") != -1 - or key.find("mlp.dense_h_to_4h_2.bias") != -1 - ): + elif any(k in key for k in ( + # split along the first dimension + "self_attention.dense.weight", + "inter_attention.dense.weight", + "mlp.dense_4h_to_h.weight", + # split along the last dimension + "mlp.dense_h_to_4h.weight", + "mlp.dense_h_to_4h.bias", + "mlp.dense_h_to_4h_2.weight", + "mlp.dense_h_to_4h_2.bias", + )): + axis = 0 if any(k in key for k in ( + "self_attention.dense.weight", + "inter_attention.dense.weight", + "mlp.dense_4h_to_h.weight", + )) else -1 vals = [] for k in range(factor): val = safe_transpose(models_list[k][key]) @@ -273,7 +267,7 @@ def merge_and_convert_process( vals.append(val) saved_keys = megatron2hf_name(saved_key, name_mapping) saved_path = saved_dir / f"{prefix}.{saved_keys[0]}.{tensor_para_rank:d}.bin" - val = torch.cat(vals, dim=-1) + val = torch.cat(vals, dim=axis) val = torch2np(val, np_weight_data_type) LOGGER.debug( "merge for pp_rank=%d tp_rank=%d factor=%d src_key=%s filename=%s shape=%s dtype=%s", @@ -287,15 +281,15 @@ def merge_and_convert_process( ) val.tofile(saved_path) - elif ( - key.find("self_attention.query_key_value.bias") != -1 - or key.find("inter_attention.query.bias") != -1 - or key.find("inter_attention.key_value.bias") != -1 - ): + elif any(k in key for k in ( + "self_attention.query_key_value.bias", + "inter_attention.query.bias", + "inter_attention.key_value.bias", + )): num_splits = 3 - if key.find("inter_attention.key_value.bias") != -1: + if "inter_attention.key_value.bias" in key: num_splits = 2 - if key.find("inter_attention.query.bias") != -1: + if "inter_attention.query.bias" in key: num_splits = 1 vals = [] @@ -303,7 +297,7 @@ def merge_and_convert_process( val = safe_transpose(models_list[k][key]) val = val.float() local_dim = int(val.shape[-1] / num_splits) - if model_config != None: + if model_config is not None: head_num = model_config["num_attention_heads"] // nemo_model_config["tensor_model_parallel_size"] # t5 kv_channels may not be equal to hidden_size // head_num size_per_head = model_config["kv_channels"] @@ -311,7 +305,7 @@ def merge_and_convert_process( head_num = nemo_model_config["num_attention_heads"] // nemo_model_config["tensor_model_parallel_size"] # t5 kv_channels may not be equal to hidden_size // head_num size_per_head = nemo_model_config["kv_channels"] - if model_config == None or model_config["megatron_legacy"] == False: + if is_not_legacy: val = val.reshape(head_num, num_splits, size_per_head) val = val.permute(1, 0, 2) val = val.reshape(num_splits, local_dim) @@ -349,15 +343,15 @@ def merge_and_convert_process( ) val.tofile(saved_path) - elif ( - key.find("self_attention.query_key_value.weight") != -1 - or key.find("inter_attention.query.weight") != -1 - or key.find("inter_attention.key_value.weight") != -1 - ): + elif any(k in key for k in ( + "self_attention.query_key_value.weight", + "inter_attention.query.weight", + "inter_attention.key_value.weight", + )): num_splits = 3 - if key.find("inter_attention.key_value.weight") != -1: + if "inter_attention.key_value.weight" in key: num_splits = 2 - if key.find("inter_attention.query.weight") != -1: + if "inter_attention.query.weight" in key: num_splits = 1 vals = [] @@ -366,7 +360,7 @@ def merge_and_convert_process( val = val.float() hidden_dim = val.shape[0] local_dim = int(val.shape[-1] / num_splits) - if model_config != None: + if model_config is not None: head_num = model_config["num_attention_heads"] # t5 kv_channels may not be equal to hidden_size // head_num size_per_head = model_config["kv_channels"] @@ -376,7 +370,7 @@ def merge_and_convert_process( # t5 kv_channels may not be equal to hidden_size // head_num size_per_head = nemo_model_config["kv_channels"] head_num = head_num // nemo_model_config["tensor_model_parallel_size"] - if model_config == None or model_config["megatron_legacy"] == False: + if is_not_legacy: # shape of self_attention.query_key_value.weight is [hidden_dim, head_num * 3 * size_per_head] # convert to [hidden_dim, 3, head_num, size_per_head] val = val.reshape(hidden_dim, head_num, num_splits, size_per_head) @@ -420,6 +414,7 @@ def merge_and_convert_process( except Exception as e: LOGGER.error(f"fail to convert {key} with error {e}.") + def split_and_convert_process( model_type, tensor_para_rank, @@ -433,12 +428,9 @@ def split_and_convert_process( ): try: assert model_type == "encoder" or model_type == "decoder" - model_config = None if nemo_model_config.get(model_type, None) == None else nemo_model_config[model_type] + model_config = nemo_model_config.get(model_type, None) + num_layers = model_config["num_layers"] if model_config is not None else nemo_model_config["num_layers"] prefix = model_type - if model_config != None: - num_layers = model_config["num_layers"] - else: - num_layers = nemo_model_config["num_layers"] pipeline_para_size = nemo_model_config["pipeline_model_parallel_size"] pipeline_model_parallel_split_rank = nemo_model_config.get("pipeline_model_parallel_split_rank", 0) @@ -446,7 +438,7 @@ def split_and_convert_process( val = safe_transpose(models_list[0][key]) val = torch2np(val, np_weight_data_type) - if key.find("layers.") != -1: + if key.startswith("layers."): layer_index = int(key[7 : key.find(".", 7)]) encoder_num_pipeline_stages = pipeline_model_parallel_split_rank decoder_num_pipeline_stages = pipeline_para_size - pipeline_model_parallel_split_rank @@ -461,19 +453,24 @@ def split_and_convert_process( else: saved_key = key - if ( - key.find("input_layernorm.weight") != -1 - or key.find("input_layernorm.bias") != -1 - or key.find("self_attention.dense.bias") != -1 - or key.find("inter_attention.dense.bias") != -1 - or key.find("post_attention_layernorm.weight") != -1 - or key.find("post_inter_attention_layernorm.weight") != -1 - or key.find("post_attention_layernorm.bias") != -1 - or key.find("post_inter_attention_layernorm.bias") != -1 - or key.find("mlp.dense_4h_to_h.bias") != -1 - or key.find("final_layernorm.weight") != -1 - or key.find("final_layernorm.bias") != -1 - ): + is_not_legacy = model_config is None or not model_config.get("megatron_legacy", False) + if any(k in key for k in ( + "input_layernorm.weight", + "input_layernorm.bias", + "self_attention.dense.bias", + "inter_attention.dense.bias", + "post_attention_layernorm.weight", + "post_inter_attention_layernorm.weight", + "post_attention_layernorm.bias", + "post_inter_attention_layernorm.bias", + "mlp.dense_4h_to_h.bias", + "final_layernorm.weight", + "final_layernorm.bias", + "adapter_1.layernorm.weight", + "adapter_1.layernorm.bias", + "adapter_2.layernorm.weight", + "adapter_2.layernorm.bias", + )): # shared weights, only need to convert the weights of rank 0 if tensor_para_rank == 0: saved_keys = megatron2hf_name(saved_key, name_mapping) @@ -490,35 +487,23 @@ def split_and_convert_process( ) val.tofile(saved_path) - elif ( - key.find("self_attention.dense.weight") != -1 - or key.find("inter_attention.dense.weight") != -1 - or key.find("mlp.dense_4h_to_h.weight") != -1 - ): - split_vals = np.split(val, factor, axis=0) - saved_keys = megatron2hf_name(saved_key, name_mapping) - for j in range(factor): - saved_path = saved_dir / f"{prefix}.{saved_keys[0]}.{tensor_para_rank * factor + j:d}.bin" - LOGGER.debug( - "split for pp_rank=%d tp_rank=%d factor=%d src_key=%s filename=%s original_shape=%s shape=%s dtype=%s", - pipeline_para_rank, - tensor_para_rank, - factor, - key, - saved_path.name, - val.shape, - split_vals[j].shape, - split_vals[j].dtype, - ) - split_vals[j].tofile(saved_path) - - elif ( - key.find("mlp.dense_h_to_4h.weight") != -1 - or key.find("mlp.dense_h_to_4h.bias") != -1 - or key.find("mlp.dense_h_to_4h_2.weight") != -1 - or key.find("mlp.dense_h_to_4h_2.bias") != -1 - ): - split_vals = np.split(val, factor, axis=-1) + elif any(k in key for k in ( + # split along the first dimension + "self_attention.dense.weight", + "inter_attention.dense.weight", + "mlp.dense_4h_to_h.weight", + # split along the last dimension + "mlp.dense_h_to_4h.weight", + "mlp.dense_h_to_4h.bias", + "mlp.dense_h_to_4h_2.weight", + "mlp.dense_h_to_4h_2.bias", + )): + axis = 0 if any(k in key for k in ( + "self_attention.dense.weight", + "inter_attention.dense.weight", + "mlp.dense_4h_to_h.weight", + )) else -1 + split_vals = np.split(val, factor, axis=axis) saved_keys = megatron2hf_name(saved_key, name_mapping) for j in range(factor): saved_path = saved_dir / f"{prefix}.{saved_keys[0]}.{tensor_para_rank * factor + j:d}.bin" @@ -535,18 +520,18 @@ def split_and_convert_process( ) split_vals[j].tofile(saved_path) - elif ( - key.find("self_attention.query_key_value.bias") != -1 - or key.find("inter_attention.query.bias") != -1 - or key.find("inter_attention.key_value.bias") != -1 - ): + elif any(k in key for k in ( + "self_attention.query_key_value.bias", + "inter_attention.query.bias", + "inter_attention.key_value.bias", + )): num_splits = 3 - if key.find("inter_attention.key_value.bias") != -1: + if "inter_attention.key_value.bias" in key: num_splits = 2 - if key.find("inter_attention.query.bias") != -1: + if "inter_attention.query.bias" in key: num_splits = 1 local_dim = int(val.shape[-1] / num_splits) - if model_config != None: + if model_config is not None: head_num = model_config["num_attention_heads"] // nemo_model_config["tensor_model_parallel_size"] # t5 kv_channels may not be equal to hidden_size // head_num size_per_head = model_config["kv_channels"] @@ -554,7 +539,7 @@ def split_and_convert_process( head_num = nemo_model_config["num_attention_heads"] // nemo_model_config["tensor_model_parallel_size"] # t5 kv_channels may not be equal to hidden_size // head_num size_per_head = nemo_model_config["kv_channels"] - if model_config == None or model_config.get("megatron_legacy", False) == False: + if is_not_legacy: val = val.reshape(head_num, num_splits, size_per_head) val = val.transpose(1, 0, 2) @@ -595,20 +580,20 @@ def split_and_convert_process( ) split_val_idxed.tofile(saved_path) - elif ( - key.find("self_attention.query_key_value.weight") != -1 - or key.find("inter_attention.query.weight") != -1 - or key.find("inter_attention.key_value.weight") != -1 - ): + elif any(k in key for k in ( + "self_attention.query_key_value.weight", + "inter_attention.query.weight", + "inter_attention.key_value.weight", + )): num_splits = 3 - if key.find("inter_attention.key_value.weight") != -1: + if "inter_attention.key_value.weight" in key: num_splits = 2 - if key.find("inter_attention.query.weight") != -1: + if "inter_attention.query.weight" in key: num_splits = 1 hidden_dim = val.shape[0] local_dim = int(val.shape[-1] / num_splits) - if model_config != None: + if model_config is not None: head_num = model_config["num_attention_heads"] # t5 kv_channels may not be equal to hidden_size // head_num size_per_head = model_config["kv_channels"] @@ -618,7 +603,7 @@ def split_and_convert_process( # t5 kv_channels may not be equal to hidden_size // head_num size_per_head = nemo_model_config["kv_channels"] head_num = head_num // nemo_model_config["tensor_model_parallel_size"] - if model_config == None or model_config.get("megatron_legacy", False) == False: + if is_not_legacy: # shape of self_attention.query_key_value.weight is [hidden_dim, head_num * 3 * size_per_head] # convert to [hidden_dim, 3, head_num, size_per_head] val = val.reshape(hidden_dim, head_num, num_splits, size_per_head) @@ -666,21 +651,58 @@ def split_and_convert_process( except Exception as e: LOGGER.error(f"fail to convert {key} with error {e}.") -def convert_checkpoint(unpacked_checkpoints_dir: UnpackedNemoCheckpointDir, args: argparse.Namespace): + +def flatten_adapter(adapter: dict) -> dict: + """Flatten adapter weights.""" + adapter = adapter.get("state_dict", adapter) + result = {} + + for key, val in adapter.items(): + assert isinstance(key, str) + assert isinstance(val, dict) + pos_adapter = key.find(":adapter") + assert pos_adapter != -1 + prefix = key[:pos_adapter] + suffix = key[pos_adapter + 1:] + assert suffix.endswith("_1") or suffix.endswith("_2") + + key_prefix = f"{prefix}.{suffix}." + name_mapping = { + "module.0.bias": "layernorm.bias", + "module.0.weight": "layernorm.weight", + "module.1.weight": "mlp.dense_h_to_4h.weight", + "module.3.weight": "mlp.dense_4h_to_h.weight", + } + result.update({key_prefix + name_mapping[k]: v for k, v in val.items()}) + + return result + + +def convert_checkpoint(unpacked_checkpoints_dir: UnpackedNemoCheckpointDir, args: argparse.Namespace, + unpacked_adapter_dir: typing.Optional[UnpackedNemoCheckpointDir] = None): nemo_model_config = unpacked_checkpoints_dir.model_config + has_adapters = unpacked_adapter_dir is not None + adapter_model_config = unpacked_adapter_dir.model_config if has_adapters else None + if has_adapters: + tuning_config = adapter_model_config['adapter_tuning'] + # TODO: support type == 'parallel_adapter' + assert tuning_config['type'] == 'linear_adapter' + adapter_norm_position = tuning_config['norm_position'] + # TODO: support norm_position == 'post' + assert adapter_norm_position == 'pre' + assert tuning_config['norm_type'] == 'mixedfusedlayernorm' + adapter_inter_size = tuning_config["adapter_dim"] + else: + adapter_norm_position = None + adapter_inter_size = None - encoder_config = None - decoder_config = None - - # separate config for encoder and decoder because the ckpt is converted from HF - if nemo_model_config.get("encoder", None) != None: - encoder_config = nemo_model_config["encoder"] - if nemo_model_config.get("decoder", None) != None: - decoder_config = nemo_model_config["decoder"] - - assert (encoder_config == None and decoder_config == None) or (encoder_config != None and decoder_config != None) - - if encoder_config != None: + encoder_config = nemo_model_config.get("encoder", None) + decoder_config = nemo_model_config.get("decoder", None) + + assert (encoder_config is None and decoder_config is None) or ( + encoder_config is not None and decoder_config is not None) + + if encoder_config is not None: if encoder_config.get("kv_channels", None) is None: encoder_config["kv_channels"] = encoder_config["hidden_size"] // encoder_config["num_attention_heads"] if decoder_config.get("kv_channels", None) is None: @@ -688,7 +710,8 @@ def convert_checkpoint(unpacked_checkpoints_dir: UnpackedNemoCheckpointDir, args else: # shared config for encoder and decoder if nemo_model_config.get("kv_channels", None) is None: - nemo_model_config["kv_channels"] = nemo_model_config["hidden_size"] // nemo_model_config["num_attention_heads"] + nemo_model_config["kv_channels"] = nemo_model_config["hidden_size"] // nemo_model_config[ + "num_attention_heads"] inference_tensor_para_size = args.infer_gpu_num @@ -715,6 +738,24 @@ def convert_checkpoint(unpacked_checkpoints_dir: UnpackedNemoCheckpointDir, args for checkpoint_path in tp_rank_checkpoints_paths: LOGGER.debug(" %s", checkpoint_path) + if has_adapters: + adapter_tensor_para_size = adapter_model_config.get("tensor_model_parallel_size", 1) + assert adapter_tensor_para_size == training_tensor_para_size + adapter_pipeline_para_size = adapter_model_config.get("pipeline_model_parallel_size", 1) + assert adapter_pipeline_para_size == training_pipeline_para_size + + adapter_paths = unpacked_adapter_dir.get_checkpoints_paths( + training_tensor_para_size, + training_pipeline_para_size, + ) + + LOGGER.debug("Expecting adapter checkpoints paths in:") + for tp_rank_adapter_paths in adapter_paths: + for adapter_path in tp_rank_adapter_paths: + LOGGER.debug(" %s", adapter_path) + else: + adapter_paths = None + map_location_fn = cpu_map_location if bool(args.load_checkpoints_to_cpu) else gpu_map_location np_weight_data_type = WEIGHT2DTYPE[args.weight_data_type] @@ -728,6 +769,14 @@ def convert_checkpoint(unpacked_checkpoints_dir: UnpackedNemoCheckpointDir, args for key in model_from_selected_pipeline.keys(): LOGGER.debug(" %s", key) + if adapter_paths is not None: + adapter_from_selected_pipeline = torch.load(adapter_paths[0][pipeline_rank], map_location=map_location_fn) + adapter_from_selected_pipeline = adapter_from_selected_pipeline.get("state_dict", adapter_from_selected_pipeline) + + LOGGER.debug(f"Existent adapter pipeline_rank={pipeline_rank} keys:") + for key in adapter_from_selected_pipeline.keys(): + LOGGER.debug(" %s", key) + encoder_ape_key = "enc_dec_model.encoder_embedding.position_embeddings.weight" if encoder_ape_key in model_from_selected_pipeline.keys(): saved_path = saved_dir / "shared.ape.bin" @@ -777,7 +826,7 @@ def _split(src_key, dst_filename_fn): del model_from_selected_pipeline - if encoder_config != None: + if encoder_config is not None: nemo_position_embedding_type = encoder_config.get("position_embedding_type", "absolute") assert encoder_config.get("position_embedding_type", "absolute") == decoder_config.get("position_embedding_type", "absolute") else: @@ -785,15 +834,15 @@ def _split(src_key, dst_filename_fn): nemo_position_embedding_type = ( "absolute" if nemo_position_embedding_type == "learned_absolute" else nemo_position_embedding_type ) + with_bias = nemo_model_config.get("tokens_head_bias", True) model_new_config = { "structure": { - "t5_with_bias": str(nemo_model_config.get("tokens_head_bias", True)), + "t5_with_bias": str(with_bias), "position_embedding_type": nemo_position_embedding_type, "use_gated_activation": str(has_gated_activations), } } - if training_tensor_para_size > inference_tensor_para_size: assert training_tensor_para_size % inference_tensor_para_size == 0 is_merge_ckpt = True @@ -803,7 +852,7 @@ def _split(src_key, dst_filename_fn): is_merge_ckpt = False factor = int(inference_tensor_para_size / training_tensor_para_size) - if encoder_config != None: + if encoder_config is not None: assert encoder_config["ffn_hidden_size"] % inference_tensor_para_size == 0 assert encoder_config["num_attention_heads"] % inference_tensor_para_size == 0 assert encoder_config["ffn_hidden_size"] == decoder_config["ffn_hidden_size"] @@ -814,10 +863,35 @@ def _split(src_key, dst_filename_fn): main_loop = min(training_tensor_para_size, inference_tensor_para_size) + word_embedding_key = "enc_dec_model.encoder_embedding.word_embeddings.weight" w_e_list = [] + lm_head_bias_key = "enc_dec_model.tokens_head.bias" lm_head_bias_list = [] + lm_head_weight_key = "enc_dec_model.tokens_head.weight" lm_head_weight_list = [] + def _extract_pp_weights(model, pp_idx: int): + if pp_idx == 0: + word_embedding_val = model[word_embedding_key] + word_embedding_val = torch2np(word_embedding_val, np_weight_data_type) + w_e_list.append(word_embedding_val) + + if pp_idx == training_pipeline_para_size - 1 and with_bias: + lm_hb_val = model[lm_head_bias_key] + lm_hb_val = torch2np(lm_hb_val, np_weight_data_type) + lm_head_bias_list.append(lm_hb_val) + + if lm_head_weight_key in model: + if pp_idx == training_pipeline_para_size - 1: + lm_hw_val = model[lm_head_weight_key] + lm_hw_val = torch2np(lm_hw_val, np_weight_data_type) + lm_head_weight_list.append(lm_hw_val) + else: + if pp_idx == 0: + lm_hw_val = model[word_embedding_key] + lm_hw_val = torch2np(lm_hw_val, np_weight_data_type) + lm_head_weight_list.append(lm_hw_val) + torch.multiprocessing.set_start_method("spawn") torch.multiprocessing.set_sharing_strategy("file_system") with concurrent.futures.ProcessPoolExecutor(args.processes) as pool: @@ -827,88 +901,24 @@ def _split(src_key, dst_filename_fn): encoder_models = [] decoder_models = [] - word_embedding_key = "enc_dec_model.encoder_embedding.word_embeddings.weight" - lm_head_bias_key = "enc_dec_model.tokens_head.bias" - if is_merge_ckpt: - for k in range(factor): - rank_weights = checkpoints_paths[tp_idx * factor + k][pp_idx] - model = torch.load(rank_weights, map_location=map_location_fn) - - if pp_idx == 0: - w_e_val = model.get("state_dict", model)[word_embedding_key] - w_e_val = torch2np(w_e_val, np_weight_data_type) - w_e_list.append(w_e_val) - if pp_idx == training_pipeline_para_size - 1 and nemo_model_config.get("tokens_head_bias", True): - lm_head_bias_val = model.get("state_dict", model)[lm_head_bias_key] - lm_head_bias_val = torch2np(lm_head_bias_val, np_weight_data_type) - lm_head_bias_list.append(lm_head_bias_val) - - lm_head_weight_key = "enc_dec_model.tokens_head.weight" if \ - "enc_dec_model.tokens_head.weight" in model.get("state_dict", model) \ - else word_embedding_key - if lm_head_weight_key == word_embedding_key: - if pp_idx == 0: - lm_head_weight_val = model.get("state_dict", model)[lm_head_weight_key] - lm_head_weight_val = torch2np(lm_head_weight_val, np_weight_data_type) - lm_head_weight_list.append(lm_head_weight_val) - elif lm_head_weight_key == "enc_dec_model.tokens_head.weight": - if pp_idx == training_pipeline_para_size - 1: - lm_head_weight_val = model.get("state_dict", model)[lm_head_weight_key] - lm_head_weight_val = torch2np(lm_head_weight_val, np_weight_data_type) - lm_head_weight_list.append(lm_head_weight_val) - - encoder_models.append( - extract_layers_with_prefix(model, "enc_dec_model.enc_dec_model.encoder.model.") - ) - decoder_models.append( - extract_layers_with_prefix(model, "enc_dec_model.enc_dec_model.decoder.model.") - ) - LOGGER.debug( - "For pp_idx=%d tp_id=%d merging weights from %s extracted:", pp_idx, tp_idx, rank_weights - ) - LOGGER.debug(" encoder layers") - for name in encoder_models[-1]: - LOGGER.debug(" %s", name) - LOGGER.debug(" decoder layers") - for name in decoder_models[-1]: - LOGGER.debug(" %s", name) - else: - rank_weights = checkpoints_paths[tp_idx][pp_idx] - model = torch.load(rank_weights, map_location=map_location_fn) - - if pp_idx == 0: - w_e_val = model.get("state_dict", model)[word_embedding_key] - w_e_val = torch2np(w_e_val, np_weight_data_type) - w_e_list.append(w_e_val) - - if pp_idx == training_pipeline_para_size - 1 and nemo_model_config.get("tokens_head_bias", True): - lm_head_bias_val = model.get("state_dict", model)[lm_head_bias_key] - lm_head_bias_val = torch2np(lm_head_bias_val, np_weight_data_type) - lm_head_bias_list.append(lm_head_bias_val) - - lm_head_weight_key = "enc_dec_model.tokens_head.weight" if \ - "enc_dec_model.tokens_head.weight" in model.get("state_dict", model) \ - else word_embedding_key - if lm_head_weight_key == word_embedding_key: - if pp_idx == 0: - lm_head_weight_val = model.get("state_dict", model)[lm_head_weight_key] - lm_head_weight_val = torch2np(lm_head_weight_val, np_weight_data_type) - lm_head_weight_list.append(lm_head_weight_val) - elif lm_head_weight_key == "enc_dec_model.tokens_head.weight": - if pp_idx == training_pipeline_para_size - 1: - lm_head_weight_val = model.get("state_dict", model)[lm_head_weight_key] - lm_head_weight_val = torch2np(lm_head_weight_val, np_weight_data_type) - lm_head_weight_list.append(lm_head_weight_val) - + def _append_to_models(model, adapter, rank_weights, is_merge: bool): + prefix_encoder = "enc_dec_model.enc_dec_model.encoder.model." + prefix_decoder = "enc_dec_model.enc_dec_model.decoder.model." encoder_models.append( - extract_layers_with_prefix(model, "enc_dec_model.enc_dec_model.encoder.model.") + extract_layers_with_prefix(model, prefix_encoder) ) decoder_models.append( - extract_layers_with_prefix(model, "enc_dec_model.enc_dec_model.decoder.model.") + extract_layers_with_prefix(model, prefix_decoder) ) + if adapter is not None: + encoder_models[-1].update(extract_layers_with_prefix(adapter, prefix_encoder)) + decoder_models[-1].update(extract_layers_with_prefix(adapter, prefix_decoder)) + + operation = "merging" if is_merge else "copy/splitting" LOGGER.debug( - "For pp_idx=%d tp_id=%d copy/splitting weights from %s extracted:", pp_idx, tp_idx, rank_weights + "For pp_idx=%d tp_id=%d %s weights from %s extracted:", pp_idx, tp_idx, operation, rank_weights ) + LOGGER.debug(" encoder layers") for name in encoder_models[-1]: LOGGER.debug(" %s", name) @@ -916,6 +926,30 @@ def _split(src_key, dst_filename_fn): for name in decoder_models[-1]: LOGGER.debug(" %s", name) + if is_merge_ckpt: + for k in range(factor): + rank_weights = checkpoints_paths[tp_idx * factor + k][pp_idx] + model = torch.load(rank_weights, map_location=map_location_fn) + model = model.get("state_dict", model) + _extract_pp_weights(model, pp_idx) + if adapter_paths is not None: + adapter = flatten_adapter( + torch.load(adapter_paths[tp_idx][pp_idx], map_location=map_location_fn)) + else: + adapter = None + _append_to_models(model, adapter, rank_weights, is_merge_ckpt) + else: + rank_weights = checkpoints_paths[tp_idx][pp_idx] + model = torch.load(rank_weights, map_location=map_location_fn) + model = model.get("state_dict", model) + _extract_pp_weights(model, pp_idx) + if adapter_paths is not None: + adapter = flatten_adapter( + torch.load(adapter_paths[tp_idx][pp_idx], map_location=map_location_fn)) + else: + adapter = None + _append_to_models(model, adapter, rank_weights, is_merge_ckpt) + process_fn = merge_and_convert_process if is_merge_ckpt else split_and_convert_process for key in encoder_models[0]: @@ -950,8 +984,7 @@ def _split(src_key, dst_filename_fn): lm_head_weight_saved_path = saved_dir / "lm_head.weight.bin" lm_head_saved_path = saved_dir / "shared.bias.bin" w_e_val = np.concatenate(w_e_list, axis=0) - if nemo_model_config.get("tokens_head_bias", True): - lm_head_bias_val = np.concatenate(lm_head_bias_list, axis=0) + lm_head_bias_val = np.concatenate(lm_head_bias_list, axis=0) if with_bias else None lm_head_weight_val = np.concatenate(lm_head_weight_list, axis=0) LOGGER.debug( "save for src_key=%s filename=%s shape=%s dtype=%s", @@ -960,7 +993,7 @@ def _split(src_key, dst_filename_fn): w_e_val.shape, w_e_val.dtype, ) - if nemo_model_config.get("tokens_head_bias", True): + if lm_head_bias_val is not None: LOGGER.debug( "save for src_key=%s filename=%s shape=%s dtype=%s", lm_head_bias_key, @@ -976,7 +1009,7 @@ def _split(src_key, dst_filename_fn): lm_head_weight_val.dtype, ) w_e_val.tofile(w_e_saved_path) - if nemo_model_config.get("tokens_head_bias", True): + if lm_head_bias_val is not None: lm_head_bias_val.tofile(lm_head_saved_path) lm_head_weight_val.tofile(lm_head_weight_saved_path) vocab_size = w_e_val.shape[0] @@ -992,7 +1025,8 @@ def _split(src_key, dst_filename_fn): else: LOGGER.error(f"nemo_position_embedding_type should be absolute or relative") - if encoder_config != None: + # TODO adjust config for adapters + if encoder_config is not None: merge_config = {} for key, val in nemo_model_config.items(): if key not in encoder_config: @@ -1047,7 +1081,7 @@ def _split(src_key, dst_filename_fn): bos_id, eos_id, pad_id = _get_special_tokens_ids(tokenizer_config) - if decoder_config != None: + if decoder_config is not None: merge_config = {} for key, val in nemo_model_config.items(): if key not in decoder_config: @@ -1090,6 +1124,16 @@ def _split(src_key, dst_filename_fn): }, } + def _config_update_adapter(side: str): + config_side = config[side] + config_side['has_adapter'] = str(has_adapters) + config_side['adapter_inter_size'] = str(adapter_inter_size) + config_side['adapter_norm_position'] = adapter_norm_position + + if has_adapters: + _config_update_adapter('encoder') + _config_update_adapter('decoder') + for section, section_dict in model_new_config.items(): config[section] = {k: str(v) for k, v in section_dict.items()} @@ -1247,6 +1291,12 @@ def main(): "-p_o", help="folder name of prompt checkpoint output files", ) + parser.add_argument( + "--adapter-in-file", + "-adapter_in_file", + "-a_i", + help="file name of .nemo adapter checkpoint file", + ) parser.add_argument("--verbose", action="store_true", help="Provide verbose messages") args = parser.parse_args() @@ -1257,12 +1307,16 @@ def main(): for key in vars(args): print(f"{key}: {vars(args)[key]}") print("========================================") - input_path = pathlib.Path(args.in_file) if not input_path.exists(): LOGGER.error("%s does not exists", input_path) sys.exit(1) + adapter_input_path = pathlib.Path(args.adapter_in_file) if args.adapter_in_file else None + if adapter_input_path and not adapter_input_path.exists(): + LOGGER.error("%s does not exists", adapter_input_path) + sys.exit(1) + with tempfile.TemporaryDirectory() as temp_dir: temp_dir = pathlib.Path(temp_dir) @@ -1271,7 +1325,7 @@ def main(): checkpoint_dir_path = temp_dir / "unpacked" start_time = datetime.datetime.now() unpacked_checkpoint_dir = UnpackedNemoCheckpointDir( - unpack_nemo_ckpt(args.in_file, checkpoint_dir_path), + unpack_nemo_ckpt(input_path, checkpoint_dir_path), load_checkpoints_to_cpu=bool(args.load_checkpoints_to_cpu), ) LOGGER.info("Spent %s (h:m:s) to unpack NeMo archive", datetime.datetime.now() - start_time) @@ -1284,19 +1338,40 @@ def main(): for file_path in unpacked_checkpoint_dir.checkpoints_dir.rglob("*"): LOGGER.debug(" %s", file_path) + if adapter_input_path and adapter_input_path.is_file(): + adapter_dir_path = temp_dir / "adapter" + start_time = datetime.datetime.now() + unpacked_adapter_dir = UnpackedNemoCheckpointDir( + unpack_nemo_ckpt(adapter_input_path, adapter_dir_path), + load_checkpoints_to_cpu=bool(args.load_checkpoints_to_cpu), + ) + LOGGER.info("Spent %s (h:m:s) to unpack NeMo adapter archive", datetime.datetime.now() - start_time) + elif adapter_input_path: + unpacked_adapter_dir = UnpackedNemoCheckpointDir( + adapter_input_path, load_checkpoints_to_cpu=bool(args.load_checkpoints_to_cpu) + ) + else: + unpacked_adapter_dir = None + + if unpacked_adapter_dir is not None: + LOGGER.debug("Unpacked NeMo adapter checkpoint contains:") + for file_path in unpacked_adapter_dir.checkpoints_dir.rglob("*"): + LOGGER.debug(" %s", file_path) + start_time = datetime.datetime.now() - convert_checkpoint(unpacked_checkpoint_dir, args) + convert_checkpoint(unpacked_checkpoint_dir, args, unpacked_adapter_dir) LOGGER.info("Spent %s (h:m:s) to convert the model", datetime.datetime.now() - start_time) map_location_fn = cpu_map_location if bool(args.load_checkpoints_to_cpu) else gpu_map_location + model_config_yaml = "model_config.yaml" + model_weights_ckpt = "model_weights.ckpt" + if args.prompt_in_file is not None: start_time = datetime.datetime.now() assert args.prompt_saved_dir is not None unpack_nemo_ckpt(args.prompt_in_file, args.prompt_saved_dir) LOGGER.info("Spent %s (h:m:s) to unpack NeMo prompt archive", datetime.datetime.now() - start_time) - model_config_yaml = "model_config.yaml" - model_weights_ckpt = "model_weights.ckpt" prompt_config_file = open(os.path.join(args.prompt_saved_dir, model_config_yaml), "r") prompt_config = yaml.full_load(prompt_config_file) LOGGER.info(prompt_config) @@ -1309,5 +1384,6 @@ def main(): prompt_convert(args, prompt_config, prompt_weights) LOGGER.info(f"Spent %s (h:m:s) to unpack convert prompt model", datetime.datetime.now() - start_time) + if __name__ == "__main__": main() diff --git a/examples/pytorch/t5/utils/nemo_t5_ia3.py b/examples/pytorch/t5/utils/nemo_t5_ia3.py index 18a9702b1..0ae2c691e 100644 --- a/examples/pytorch/t5/utils/nemo_t5_ia3.py +++ b/examples/pytorch/t5/utils/nemo_t5_ia3.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/t5/xnli_task_example.py b/examples/pytorch/t5/xnli_task_example.py index c55f812b6..56541e5da 100644 --- a/examples/pytorch/t5/xnli_task_example.py +++ b/examples/pytorch/t5/xnli_task_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -402,7 +402,7 @@ def xnli_task(args_dict): help='Probability (p) value of top p sampling in decoding. Default is 0.0. ') parser.add_argument('-d', '--data_type', type=str, default="fp32", metavar='STRING', help='data type (default: fp32)', choices=['fp32', 'fp16', 'bf16']) - parser.add_argument('-lib_path', '--lib_path', type=str, default="/workspace/FasterTransformer/build/lib/libth_t5.so", metavar='STRING', + parser.add_argument('-lib_path', '--lib_path', type=str, default="/workspace/FasterTransformer/build/lib/libth_transformer.so", metavar='STRING', help='the path of FasterTransformer pytorch t5 op library.') parser.add_argument('-data_path', '--data_path', type=str, required=True, help="the xnli task data path") parser.add_argument('-tensor_para_size', '--tensor_para_size', type=int, default=1, metavar='NUMBER', diff --git a/examples/pytorch/tokenizer.py b/examples/pytorch/tokenizer.py index ba78984a6..ae5a03ded 100644 --- a/examples/pytorch/tokenizer.py +++ b/examples/pytorch/tokenizer.py @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/utils.py b/examples/pytorch/utils.py index 830fe0620..3fece344d 100644 --- a/examples/pytorch/utils.py +++ b/examples/pytorch/utils.py @@ -1,66 +1,66 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. - -import numpy as np -import torch -import typing - - -def print_memory_usage(info=""): - t = torch.cuda.get_device_properties(0).total_memory / 1024 ** 2 - r = torch.cuda.memory_reserved(0) / 1024 ** 2 - a = torch.cuda.memory_allocated(0) / 1024 ** 2 - f = r - a # free inside reserved - print(f"[INFO][{info}] total_memory: {t}, reversed: {r}, allocated: {a}") - - -def torch2np(tensor: torch.Tensor, np_data_type: typing.Optional[np.dtype] = None): - tensor = tensor.cpu() - if tensor.dtype == torch.bfloat16: - tensor = tensor.to(torch.float32) - - data = tensor.numpy() - if np_data_type is not None: - data = data.astype(np_data_type) - - return data - - -def safe_transpose(tensor): - if tensor.dim() == 1: - return tensor - if tensor.dim() == 2: - return tensor.T - raise ValueError("Tensor has more than 2 dimensions, unable to safely transpose.") - - -WEIGHT2DTYPE = { - "fp32": np.float32, - "fp16": np.float16, -} - - -def cpu_map_location(storage, loc): - return storage.cpu() - - -def gpu_map_location(storage, loc): - if loc.startswith("cuda"): - training_gpu_idx = int(loc.split(":")[1]) - inference_gpu_idx = training_gpu_idx % torch.cuda.device_count() - return storage.cuda(inference_gpu_idx) - elif loc.startswith("cpu"): - return storage.cpu() - else: +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import numpy as np +import torch +import typing + + +def print_memory_usage(info=""): + t = torch.cuda.get_device_properties(0).total_memory / 1024 ** 2 + r = torch.cuda.memory_reserved(0) / 1024 ** 2 + a = torch.cuda.memory_allocated(0) / 1024 ** 2 + f = r - a # free inside reserved + print(f"[INFO][{info}] total_memory: {t}, reversed: {r}, allocated: {a}") + + +def torch2np(tensor: torch.Tensor, np_data_type: typing.Optional[np.dtype] = None): + tensor = tensor.cpu() + if tensor.dtype == torch.bfloat16: + tensor = tensor.to(torch.float32) + + data = tensor.numpy() + if np_data_type is not None: + data = data.astype(np_data_type) + + return data + + +def safe_transpose(tensor): + if tensor.dim() <= 1: + return tensor + if tensor.dim() == 2: + return tensor.T + raise ValueError("Tensor has more than 2 dimensions, unable to safely transpose.") + + +WEIGHT2DTYPE = { + "fp32": np.float32, + "fp16": np.float16, +} + + +def cpu_map_location(storage, loc): + return storage.cpu() + + +def gpu_map_location(storage, loc): + if loc.startswith("cuda"): + training_gpu_idx = int(loc.split(":")[1]) + inference_gpu_idx = training_gpu_idx % torch.cuda.device_count() + return storage.cuda(inference_gpu_idx) + elif loc.startswith("cpu"): + return storage.cpu() + else: raise NotImplementedError(f"Not handled {loc}") \ No newline at end of file diff --git a/examples/pytorch/vit/ViT-quantization/config.py b/examples/pytorch/vit/ViT-quantization/config.py index 34ef0d93e..9da472f49 100644 --- a/examples/pytorch/vit/ViT-quantization/config.py +++ b/examples/pytorch/vit/ViT-quantization/config.py @@ -4,7 +4,7 @@ # Licensed under The MIT License [see LICENSE for details] # Written by Ze Liu # -------------------------------------------------------- -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/vit/ViT-quantization/data.py b/examples/pytorch/vit/ViT-quantization/data.py index 611ec3ab0..249c89cc4 100644 --- a/examples/pytorch/vit/ViT-quantization/data.py +++ b/examples/pytorch/vit/ViT-quantization/data.py @@ -4,7 +4,7 @@ # Licensed under The MIT License [see LICENSE for details] # Written by Ze Liu # -------------------------------------------------------- -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/vit/VisionTransformerINT8WeightLoader.py b/examples/pytorch/vit/VisionTransformerINT8WeightLoader.py index a174dad3b..e0f1dc356 100644 --- a/examples/pytorch/vit/VisionTransformerINT8WeightLoader.py +++ b/examples/pytorch/vit/VisionTransformerINT8WeightLoader.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -146,7 +146,7 @@ def listed_weight_to_dict(self): return ret - def to_int8(self, ths_path='../../../lib/libpyt_vit.so'): + def to_int8(self, ths_path='../../../lib/libth_transformer.so'): if 'transformer.encoder.layer.0.attn.query._input_quantizer._amax' not in self.weights: raise RuntimeError("There is no quantization node in the checkpoint, cannot be quantized to int8.") if self.int8: diff --git a/examples/pytorch/vit/VisionTransformerWeightLoader.py b/examples/pytorch/vit/VisionTransformerWeightLoader.py index 9c6e4ab7b..7283e0992 100644 --- a/examples/pytorch/vit/VisionTransformerWeightLoader.py +++ b/examples/pytorch/vit/VisionTransformerWeightLoader.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/vit/checkpoint_quantization.py b/examples/pytorch/vit/checkpoint_quantization.py index 69d1c090c..4e4974588 100644 --- a/examples/pytorch/vit/checkpoint_quantization.py +++ b/examples/pytorch/vit/checkpoint_quantization.py @@ -1,218 +1,218 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. - -import sys -import argparse -import re -import numpy as np -import torch - -ACTIVATION_AMAX_NUM = 72 -INT8O_GEMM_NUM = 8 -TRT_FUSED_MHA_AMAX_NUM = 3 -SCALE_RESERVE_NUM = 21 - -def checkpoint_quantization(init_dict, ths_path='../../../build/lib/libpyt_vit.so', verbose=True): - print("Quantizing checkpoint ...") - torch.classes.load_library(ths_path) - weight_quantize = torch.ops.fastertransformer.vit_weight_quantize - - def init_graph(): - layer_num = 0 - regex = re.compile('layer.\d+') - amaxTotalNum = 0 - for name, tensor_value in init_dict.items(): - if "ffn.fc1" in name and amaxTotalNum == 0: - amaxTotalNum = ACTIVATION_AMAX_NUM + 9 * tensor_value.size(1) + INT8O_GEMM_NUM + TRT_FUSED_MHA_AMAX_NUM + SCALE_RESERVE_NUM - if verbose: - print("amaxTotalNum", amaxTotalNum) - print("Hidden size:", tensor_value.size(1)) - tmp = regex.findall(name) - if len(tmp) < 1: - continue - num_tmp = int(tmp[0].replace("layer.", "")) - if layer_num < num_tmp: - layer_num = num_tmp - layer_num = layer_num + 1 - #add new var for amax - for i in range(layer_num): - init_dict["transformer.encoder.layer.{}.amaxList".format(i)] = torch.zeros((amaxTotalNum,), dtype=torch.float32) - return layer_num, amaxTotalNum - layer_num, amaxTotalNum = init_graph() - - kernel_name_list = ["attn.query", - "attn.key", - "attn.value", - "attn.out", - "ffn.fc1", - "ffn.fc2"] - - amax_name_list = ["attn.query._input_quantizer", - "attn.query._aftergemm_quantizer", - "attn.matmul_q_input_quantizer", - "attn.key._aftergemm_quantizer", - "attn.matmul_k_input_quantizer", - "attn.value._aftergemm_quantizer", - "attn.matmul_v_input_quantizer", - "attn.softmax_input_quantizer", - "attn.matmul_a_input_quantizer", - "attn.out._input_quantizer", - "attn.out._aftergemm_quantizer", - "ffn.fc1._input_quantizer", - "ffn.fc1._aftergemm_quantizer", - "ffn.fc2._input_quantizer", - "ffn.fc2._aftergemm_quantizer", - "special_F2Bias_scale", - ] - - int8O_gemm_weight_amax_list = [0 for i in range(INT8O_GEMM_NUM)] - int8O_gemm_weight_list = ["attn.query", - "attn.key", - "attn.value", - "attn.matmul_k_input_quantizer", - "attn.matmul_v_input_quantizer", - "attn.out", - "ffn.fc1", - "ffn.fc2"] - - int8O_gemm_input_amax_list = [0 for i in range(INT8O_GEMM_NUM)] - int8O_gemm_input_list = ["attn.query._input_quantizer", - "attn.key._input_quantizer", - "attn.value._input_quantizer", - "attn.matmul_q_input_quantizer", - "attn.matmul_a_input_quantizer", - "attn.out._input_quantizer", - "ffn.fc1._input_quantizer", - "ffn.fc2._input_quantizer"] - - int8O_gemm_output_amax_list = [0 for i in range(INT8O_GEMM_NUM)] - int8O_gemm_output_list = ["attn.query._aftergemm_quantizer", - "attn.key._aftergemm_quantizer", - "attn.value._aftergemm_quantizer", - "attn.softmax_input_quantizer", - "attn.out._input_quantizer", - "attn.out._aftergemm_quantizer", - "ffn.fc1._aftergemm_quantizer", - "ffn.fc2._aftergemm_quantizer"] - - same_value_tuple_list = [("attn.query._input_quantizer", - "attn.key._input_quantizer", - "attn.value._input_quantizer")] - - factor = 1000000.0 - for i in range(layer_num): - amaxList = np.zeros([amaxTotalNum]).astype(np.float32) - amax_id = 0 - # verify some quantizers have same value. input_quantizer is per-tensor quantization - for same_value_tuple in same_value_tuple_list: - tmp_v = init_dict["transformer.encoder.layer.{}.{}._amax".format(i, same_value_tuple[0])].numpy() - for same_value_name in same_value_tuple: - tmp_v_2 = init_dict["transformer.encoder.layer.{}.{}._amax".format(i, same_value_name)].numpy() - assert(np.allclose(tmp_v, tmp_v_2)) - - for amax_name in amax_name_list: - if amax_name == "special_F2Bias_scale": - if i != layer_num - 1: - quant_max = init_dict["transformer.encoder.layer.{}.{}._amax".format(i+1, amax_name_list[0])].item() - amax = abs(quant_max) - else: - #not used, placeholder - amax = 1.0 - amaxList[amax_id] = amax - amax_id += 1 - amaxList[amax_id] = amax/127.0 - amax_id += 1 - amaxList[amax_id] = amax/127.0/127.0 - amax_id += 1 - amaxList[amax_id] = 127.0/amax - amax_id += 1 - continue - - quant_max = init_dict["transformer.encoder.layer.{}.{}._amax".format(i, amax_name)].item() - amax = abs(quant_max)#round(abs(quant_max)*factor)/factor - if amax_name in int8O_gemm_input_list: - int8O_gemm_input_amax_list[int8O_gemm_input_list.index(amax_name)] = amax - if amax_name == "attn.query._input_quantizer": - int8O_gemm_input_amax_list[int8O_gemm_input_list.index("attn.key._input_quantizer")] = amax - int8O_gemm_input_amax_list[int8O_gemm_input_list.index("attn.value._input_quantizer")] = amax - if amax_name in int8O_gemm_output_list: - int8O_gemm_output_amax_list[int8O_gemm_output_list.index(amax_name)] = amax - if amax_name in int8O_gemm_weight_list: - int8O_gemm_weight_amax_list[int8O_gemm_weight_list.index(amax_name)] = amax - amaxList[amax_id] = amax - amax_id += 1 - amaxList[amax_id] = amax/127.0 - amax_id += 1 - amaxList[amax_id] = amax/127.0/127.0 - amax_id += 1 - amaxList[amax_id] = 127.0/amax - amax_id += 1 - if verbose: - print(i, amax_name) - print('quant_max:', quant_max) - print('amax:', amax) - if verbose: - print("done process layer_{} activation amax".format(i)) - - #kernel amax starts from ACTIVATION_AMAX_NUM - assert amax_id == 64 - amax_id = ACTIVATION_AMAX_NUM - for kernel_id, kernel_name in enumerate(kernel_name_list): - kernel = init_dict["transformer.encoder.layer.{}.{}.weight".format(i, kernel_name)].transpose(-1, -2).contiguous() - quant_max2 = init_dict["transformer.encoder.layer.{}.{}._weight_quantizer._amax".format(i, kernel_name)] - amax2 = abs(quant_max2) - if (amax2.dim() == 0): - quant_max_processed = torch.full((kernel.size(1),), amax2.item(), dtype=amax2.dtype, device=amax2.device) - else: - quant_max_processed = amax2.view(-1) - kernel_processed = weight_quantize(kernel.cuda(), quant_max_processed.cuda()) - init_dict["transformer.encoder.layer.{}.{}.weight".format(i, kernel_name)] = kernel_processed - if kernel_name in int8O_gemm_weight_list: - int8O_gemm_weight_amax_list[int8O_gemm_weight_list.index(kernel_name)] = quant_max_processed[0] - for e in quant_max_processed: - amaxList[amax_id] = e - amax_id += 1 - # if verbose: - # print(i, kernel_name) - # print('kernel:', kernel) - # print('quant_max2:', quant_max2) - # print('quant_max_processed_:', quant_max_processed) - - #for int8O gemm deQuant - for j in range(INT8O_GEMM_NUM): - amaxList[amax_id] = (int8O_gemm_input_amax_list[j]*int8O_gemm_weight_amax_list[j])/(127.0*int8O_gemm_output_amax_list[j]) - amax_id += 1 - - #for trt fused MHA amax - #### QKV_addBias_amax - amaxList[amax_id] = np.maximum(np.maximum(amaxList[8],amaxList[16]), amaxList[24]) - amax_id += 1 - #### softmax amax - amaxList[amax_id] = amaxList[32] - amax_id += 1 - #### bmm2 amax - amaxList[amax_id] = amaxList[36] - amax_id += 1 - - init_dict["transformer.encoder.layer.{}.amaxList".format(i)] = torch.tensor(amaxList, dtype=torch.float32) - if verbose: - print("done process layer_{} kernel weight".format(i)) - - print("Quantizing checkpoint done.") - return init_dict - - -if __name__ == '__main__': - model_dict = torch.load('checkpoint/ViT-B_16_calib.pth', map_location='cpu') - checkpoint_quantization(model_dict, '../../../build/lib/libpyt_vit.so', verbose=True) \ No newline at end of file +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import sys +import argparse +import re +import numpy as np +import torch + +ACTIVATION_AMAX_NUM = 72 +INT8O_GEMM_NUM = 8 +TRT_FUSED_MHA_AMAX_NUM = 3 +SCALE_RESERVE_NUM = 21 + +def checkpoint_quantization(init_dict, ths_path='../../../build/lib/libth_transformer.so', verbose=True): + print("Quantizing checkpoint ...") + torch.classes.load_library(ths_path) + weight_quantize = torch.ops.fastertransformer.vit_weight_quantize + + def init_graph(): + layer_num = 0 + regex = re.compile('layer.\d+') + amaxTotalNum = 0 + for name, tensor_value in init_dict.items(): + if "ffn.fc1" in name and amaxTotalNum == 0: + amaxTotalNum = ACTIVATION_AMAX_NUM + 9 * tensor_value.size(1) + INT8O_GEMM_NUM + TRT_FUSED_MHA_AMAX_NUM + SCALE_RESERVE_NUM + if verbose: + print("amaxTotalNum", amaxTotalNum) + print("Hidden size:", tensor_value.size(1)) + tmp = regex.findall(name) + if len(tmp) < 1: + continue + num_tmp = int(tmp[0].replace("layer.", "")) + if layer_num < num_tmp: + layer_num = num_tmp + layer_num = layer_num + 1 + #add new var for amax + for i in range(layer_num): + init_dict["transformer.encoder.layer.{}.amaxList".format(i)] = torch.zeros((amaxTotalNum,), dtype=torch.float32) + return layer_num, amaxTotalNum + layer_num, amaxTotalNum = init_graph() + + kernel_name_list = ["attn.query", + "attn.key", + "attn.value", + "attn.out", + "ffn.fc1", + "ffn.fc2"] + + amax_name_list = ["attn.query._input_quantizer", + "attn.query._aftergemm_quantizer", + "attn.matmul_q_input_quantizer", + "attn.key._aftergemm_quantizer", + "attn.matmul_k_input_quantizer", + "attn.value._aftergemm_quantizer", + "attn.matmul_v_input_quantizer", + "attn.softmax_input_quantizer", + "attn.matmul_a_input_quantizer", + "attn.out._input_quantizer", + "attn.out._aftergemm_quantizer", + "ffn.fc1._input_quantizer", + "ffn.fc1._aftergemm_quantizer", + "ffn.fc2._input_quantizer", + "ffn.fc2._aftergemm_quantizer", + "special_F2Bias_scale", + ] + + int8O_gemm_weight_amax_list = [0 for i in range(INT8O_GEMM_NUM)] + int8O_gemm_weight_list = ["attn.query", + "attn.key", + "attn.value", + "attn.matmul_k_input_quantizer", + "attn.matmul_v_input_quantizer", + "attn.out", + "ffn.fc1", + "ffn.fc2"] + + int8O_gemm_input_amax_list = [0 for i in range(INT8O_GEMM_NUM)] + int8O_gemm_input_list = ["attn.query._input_quantizer", + "attn.key._input_quantizer", + "attn.value._input_quantizer", + "attn.matmul_q_input_quantizer", + "attn.matmul_a_input_quantizer", + "attn.out._input_quantizer", + "ffn.fc1._input_quantizer", + "ffn.fc2._input_quantizer"] + + int8O_gemm_output_amax_list = [0 for i in range(INT8O_GEMM_NUM)] + int8O_gemm_output_list = ["attn.query._aftergemm_quantizer", + "attn.key._aftergemm_quantizer", + "attn.value._aftergemm_quantizer", + "attn.softmax_input_quantizer", + "attn.out._input_quantizer", + "attn.out._aftergemm_quantizer", + "ffn.fc1._aftergemm_quantizer", + "ffn.fc2._aftergemm_quantizer"] + + same_value_tuple_list = [("attn.query._input_quantizer", + "attn.key._input_quantizer", + "attn.value._input_quantizer")] + + factor = 1000000.0 + for i in range(layer_num): + amaxList = np.zeros([amaxTotalNum]).astype(np.float32) + amax_id = 0 + # verify some quantizers have same value. input_quantizer is per-tensor quantization + for same_value_tuple in same_value_tuple_list: + tmp_v = init_dict["transformer.encoder.layer.{}.{}._amax".format(i, same_value_tuple[0])].numpy() + for same_value_name in same_value_tuple: + tmp_v_2 = init_dict["transformer.encoder.layer.{}.{}._amax".format(i, same_value_name)].numpy() + assert(np.allclose(tmp_v, tmp_v_2)) + + for amax_name in amax_name_list: + if amax_name == "special_F2Bias_scale": + if i != layer_num - 1: + quant_max = init_dict["transformer.encoder.layer.{}.{}._amax".format(i+1, amax_name_list[0])].item() + amax = abs(quant_max) + else: + #not used, placeholder + amax = 1.0 + amaxList[amax_id] = amax + amax_id += 1 + amaxList[amax_id] = amax/127.0 + amax_id += 1 + amaxList[amax_id] = amax/127.0/127.0 + amax_id += 1 + amaxList[amax_id] = 127.0/amax + amax_id += 1 + continue + + quant_max = init_dict["transformer.encoder.layer.{}.{}._amax".format(i, amax_name)].item() + amax = abs(quant_max)#round(abs(quant_max)*factor)/factor + if amax_name in int8O_gemm_input_list: + int8O_gemm_input_amax_list[int8O_gemm_input_list.index(amax_name)] = amax + if amax_name == "attn.query._input_quantizer": + int8O_gemm_input_amax_list[int8O_gemm_input_list.index("attn.key._input_quantizer")] = amax + int8O_gemm_input_amax_list[int8O_gemm_input_list.index("attn.value._input_quantizer")] = amax + if amax_name in int8O_gemm_output_list: + int8O_gemm_output_amax_list[int8O_gemm_output_list.index(amax_name)] = amax + if amax_name in int8O_gemm_weight_list: + int8O_gemm_weight_amax_list[int8O_gemm_weight_list.index(amax_name)] = amax + amaxList[amax_id] = amax + amax_id += 1 + amaxList[amax_id] = amax/127.0 + amax_id += 1 + amaxList[amax_id] = amax/127.0/127.0 + amax_id += 1 + amaxList[amax_id] = 127.0/amax + amax_id += 1 + if verbose: + print(i, amax_name) + print('quant_max:', quant_max) + print('amax:', amax) + if verbose: + print("done process layer_{} activation amax".format(i)) + + #kernel amax starts from ACTIVATION_AMAX_NUM + assert amax_id == 64 + amax_id = ACTIVATION_AMAX_NUM + for kernel_id, kernel_name in enumerate(kernel_name_list): + kernel = init_dict["transformer.encoder.layer.{}.{}.weight".format(i, kernel_name)].transpose(-1, -2).contiguous() + quant_max2 = init_dict["transformer.encoder.layer.{}.{}._weight_quantizer._amax".format(i, kernel_name)] + amax2 = abs(quant_max2) + if (amax2.dim() == 0): + quant_max_processed = torch.full((kernel.size(1),), amax2.item(), dtype=amax2.dtype, device=amax2.device) + else: + quant_max_processed = amax2.view(-1) + kernel_processed = weight_quantize(kernel.cuda(), quant_max_processed.cuda()) + init_dict["transformer.encoder.layer.{}.{}.weight".format(i, kernel_name)] = kernel_processed + if kernel_name in int8O_gemm_weight_list: + int8O_gemm_weight_amax_list[int8O_gemm_weight_list.index(kernel_name)] = quant_max_processed[0] + for e in quant_max_processed: + amaxList[amax_id] = e + amax_id += 1 + # if verbose: + # print(i, kernel_name) + # print('kernel:', kernel) + # print('quant_max2:', quant_max2) + # print('quant_max_processed_:', quant_max_processed) + + #for int8O gemm deQuant + for j in range(INT8O_GEMM_NUM): + amaxList[amax_id] = (int8O_gemm_input_amax_list[j]*int8O_gemm_weight_amax_list[j])/(127.0*int8O_gemm_output_amax_list[j]) + amax_id += 1 + + #for trt fused MHA amax + #### QKV_addBias_amax + amaxList[amax_id] = np.maximum(np.maximum(amaxList[8],amaxList[16]), amaxList[24]) + amax_id += 1 + #### softmax amax + amaxList[amax_id] = amaxList[32] + amax_id += 1 + #### bmm2 amax + amaxList[amax_id] = amaxList[36] + amax_id += 1 + + init_dict["transformer.encoder.layer.{}.amaxList".format(i)] = torch.tensor(amaxList, dtype=torch.float32) + if verbose: + print("done process layer_{} kernel weight".format(i)) + + print("Quantizing checkpoint done.") + return init_dict + + +if __name__ == '__main__': + model_dict = torch.load('checkpoint/ViT-B_16_calib.pth', map_location='cpu') + checkpoint_quantization(model_dict, '../../../build/lib/libth_transformer.so', verbose=True) \ No newline at end of file diff --git a/examples/pytorch/vit/infer_visiontransformer_int8_op.py b/examples/pytorch/vit/infer_visiontransformer_int8_op.py index 8f7ef01a9..7f60750ee 100644 --- a/examples/pytorch/vit/infer_visiontransformer_int8_op.py +++ b/examples/pytorch/vit/infer_visiontransformer_int8_op.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/vit/infer_visiontransformer_op.py b/examples/pytorch/vit/infer_visiontransformer_op.py index 52d3f9e66..fa770dc24 100644 --- a/examples/pytorch/vit/infer_visiontransformer_op.py +++ b/examples/pytorch/vit/infer_visiontransformer_op.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/vit/run.sh b/examples/pytorch/vit/run.sh index d2bfff3f4..be3d3ffa0 100644 --- a/examples/pytorch/vit/run.sh +++ b/examples/pytorch/vit/run.sh @@ -1,5 +1,5 @@ python infer_visiontransformer_int8_op.py \ - --th-path=../../../build/lib/libpyt_vit.so \ + --th-path=../../../build/lib/libth_transformer.so \ --calibrated_dir /workspace/checkpoint/ViT-B_16_ft1_99.999_82.846.pth \ --img_size 384 \ --quant-mode ft1 diff --git a/examples/pytorch/vit/run2.sh b/examples/pytorch/vit/run2.sh index 746810046..309051a01 100644 --- a/examples/pytorch/vit/run2.sh +++ b/examples/pytorch/vit/run2.sh @@ -1,5 +1,5 @@ python infer_visiontransformer_int8_op.py \ - --th-path=../../../build/lib/libpyt_vit.so \ + --th-path=../../../build/lib/libth_transformer.so \ --calibrated_dir /workspace/checkpoint/ViT-B_16_ft2_99.99_81.948.pth \ --img_size 384 \ --quant-mode ft2 diff --git a/examples/pytorch/vit/run_int8_accuracy.sh b/examples/pytorch/vit/run_int8_accuracy.sh index 27a0c3fa4..edd03e256 100644 --- a/examples/pytorch/vit/run_int8_accuracy.sh +++ b/examples/pytorch/vit/run_int8_accuracy.sh @@ -1 +1 @@ -python -m torch.distributed.launch --nproc_per_node 1 --master_port 12345 infer_visiontransformer_int8_op.py --th-path=../../../build/lib/libpyt_vit.so --calibrated_dir /workspace/checkpoint/ViT-B_16_ft2_99.99_81.948.pth --img_size 384 --quant-mode ft2 --validate --data-path /data/datasets/ILSVRC2012/ +python -m torch.distributed.launch --nproc_per_node 1 --master_port 12345 infer_visiontransformer_int8_op.py --th-path=../../../build/lib/libth_transformer.so --calibrated_dir /workspace/checkpoint/ViT-B_16_ft2_99.99_81.948.pth --img_size 384 --quant-mode ft2 --validate --data-path /data/datasets/ILSVRC2012/ diff --git a/examples/tensorflow/bert/bert_example.py b/examples/tensorflow/bert/bert_example.py index 6af81e8fb..c997118d8 100644 --- a/examples/tensorflow/bert/bert_example.py +++ b/examples/tensorflow/bert/bert_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorflow/deberta/deberta_example.py b/examples/tensorflow/deberta/deberta_example.py new file mode 100644 index 000000000..34d915bf0 --- /dev/null +++ b/examples/tensorflow/deberta/deberta_example.py @@ -0,0 +1,116 @@ +# Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +''' +This is a sample code to demonstrate how to use the TensorFlow custom op with +FasterTransformer library. + +This sample code builds a DeBERTa transformer model by TensorFlow and FasterTransformer's TensorFlow custom op. Then compare the results on random inputs to verify the correctness of FasterTransformer implementation. +Note that DeBERTa FasterTransformer implementation does not include pooling layer or downstream task heads. Therefore the comparison was made on the raw hidden states from the DeBERTa encoder model. + +Users are also able to use this sample code to test the average forward time of +TensorFlow and FasterTransformer. +''' + +import os +import sys +import time +import argparse +import numpy as np +import tensorflow as tf +from transformers import DebertaV2Tokenizer, TFDebertaV2ForSequenceClassification + +dir_path = os.path.dirname(os.path.realpath(__file__)) +ROOT_DIR = dir_path + "/../../.." +sys.path.append(ROOT_DIR) +from examples.tensorflow.deberta.utils.ft_deberta import FTDebertaWeights, FTDebertaModel, FTHFDebertaModel +from examples.tensorflow.bert.utils.common import cross_check + +def main(args): + model_name = args['model'] + batch_size = args['batch_size'] + + tokenizer = DebertaV2Tokenizer.from_pretrained(model_name) + + # Model setup - Huggingface TensorFlow + model_tf = TFDebertaV2ForSequenceClassification.from_pretrained(model_name) + + # Model setup - FasterTransformer + lib_path = os.path.join(ROOT_DIR, './build/lib/libtf_deberta.so') + + ft_deberta_weight = FTDebertaWeights(model_tf.config, tensor_para_size=1, pipeline_para_size=1) + ft_deberta_weight.load_from_model(model_tf) + ft_deberta = FTDebertaModel(lib_path, ft_deberta_weight) + + # Random input + random_sentences = tokenizer.batch_decode([np.random.randint(1, model_tf.config.vocab_size, size=np.random.randint( + 1, model_tf.config.max_position_embeddings)) for _ in range(batch_size)]) + inputs = tokenizer(random_sentences, padding=True, return_tensors="tf") + + # Inference and simple timing + measurement_iters = 10 + tf_latencies = [] + ft_latencies = [] + + # TF E2E + for _ in range(measurement_iters): + start_time = time.time() + output_tf = model_tf(**inputs) + end_time = time.time() + tf_latencies.append(end_time - start_time) + tf_p50 = np.percentile(tf_latencies, 50) + tf_p99 = np.percentile(tf_latencies, 99) + + logits_tf = output_tf.logits + # print("TF results: ", logits_tf) + # predicted_class_id = int(tf.math.argmax(logits_tf, axis=-1)[0]) + # print(model.config.id2label[predicted_class_id]) + + # FT E2E + # trick to wrap FT inside HF by replacing TF layer, see ft_deberta.py + model_tf.deberta = FTHFDebertaModel(ft_deberta, remove_padding=True) + # w/ padding removal by default i.e., Effective Transformer + + for _ in range(measurement_iters): + start_time = time.time() + output_ft = model_tf(**inputs) + end_time = time.time() + ft_latencies.append(end_time - start_time) + ft_p50 = np.percentile(ft_latencies, 50) + ft_p99 = np.percentile(ft_latencies, 99) + + logits_ft = output_ft.logits + # print("FT results: ", logits_ft) + + print(f"TF p50: {tf_p50*1000:.2f} ms, p99: {tf_p99*1000:.2f} ms ") + print(f"FT p50: {ft_p50*1000:.2f} ms, p99: {ft_p99*1000:.2f} ms ") + + # Correctness check + atol_threshold = 3e-3 + cross_check("TF v.s. FT", logits_tf, logits_ft, atol_threshold) + +if __name__ == "__main__": + parser = argparse.ArgumentParser(formatter_class=argparse.ArgumentDefaultsHelpFormatter) + parser.add_argument('-batch', '--batch_size', type=int, default=1, metavar='NUMBER', + help='batch size (default: 1)') + parser.add_argument('-model', '--model', type=str, default="microsoft/deberta-v3-base", metavar='STRING', + help='DeBERTa-V3 model variants. Note DeBERTa-V2 and -V1 variants are both slightly different from V3, thus not supported in the current example yet') + # not tested for the moment and not supported + parser.add_argument('-tensor_para_size', '--tensor_para_size', type=int, default=1, metavar='NUMBER', + help='size of tensor parallelism (default: 1). This feature hasn\'t been tested.') + parser.add_argument('-pipeline_para_size', '--pipeline_para_size', type=int, default=1, metavar='NUMBER', + help='size of pipeline parallelism (default: 1). This feature hasn\'t been tested.') + args = parser.parse_args() + + main(vars(args)) \ No newline at end of file diff --git a/examples/tensorflow/deberta/requirement.txt b/examples/tensorflow/deberta/requirement.txt new file mode 100644 index 000000000..3aa41395f --- /dev/null +++ b/examples/tensorflow/deberta/requirement.txt @@ -0,0 +1,3 @@ +SentencePiece~=0.1.96 +transformers~=4.20.1 +numpy \ No newline at end of file diff --git a/examples/tensorflow/deberta/utils/ft_deberta.py b/examples/tensorflow/deberta/utils/ft_deberta.py new file mode 100644 index 000000000..db92b2b9f --- /dev/null +++ b/examples/tensorflow/deberta/utils/ft_deberta.py @@ -0,0 +1,187 @@ +# Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import numpy as np +import tensorflow as tf +import math +import os +from collections import namedtuple + + +class FTDebertaWeights(object): + def __init__( + self, + config, + tensor_para_size=1, + pipeline_para_size=1 + ): + self.num_heads = config.num_attention_heads + self.head_size = config.hidden_size / config.num_attention_heads + self.max_relative_positions = config.max_position_embeddings + self.relative_position_buckets = config.position_buckets + self.inter_size = config.intermediate_size + self.num_layer = config.num_hidden_layers + + self.config = config + self.tensor_para_size = tensor_para_size + self.pipeline_para_rank = 0 # no mpi for the moment + self.pipeline_para_size = pipeline_para_size + self.activation_type = config.hidden_act + self.weights = None + self.q_scaling = np.sqrt(3) + + assert tensor_para_size == 1, "This op only supports TP = 1 now." + assert pipeline_para_size == 1, "This op only supports PP = 1 now." + + def load_from_model(self, model): + """ + Routine to load DeBERTa weights from a HuggingFace model. This assumes the latest DeBERT-v2 architecture and DeBERTa-v3 weights. + """ + + start_layer = self.pipeline_para_rank * self.num_layer // self.pipeline_para_size + end_layer = (self.pipeline_para_rank + 1) * self.num_layer // self.pipeline_para_size + + weight_data_type = {'float32': tf.float32, 'float16': tf.float16}[model.dtype] + + variables_dict = {} + for var in model.variables: + variables_dict[var.name] = var.numpy() + + var_prefix_model = model.name + '/deberta/' # model-level weights + var_prefix_layer = model.name + '/deberta/encoder/' # layer-level weights + + # model-level weight loading + word_embedding_table = variables_dict.get(var_prefix_model + "embeddings/word_embeddings/weight:0") + word_embedding_layernorm_gamma = variables_dict.get(var_prefix_model + "embeddings/LayerNorm/gamma:0") + word_embedding_layernorm_beta = variables_dict.get(var_prefix_model + "embeddings/LayerNorm/beta:0") + relative_embedding_table = variables_dict.get(var_prefix_model + "encoder/rel_embeddings.weight:0") + relative_embedding_layernorm_gamma = variables_dict.get(var_prefix_model + "encoder/LayerNorm/gamma:0") + relative_embedding_layernorm_beta = variables_dict.get(var_prefix_model + "encoder/LayerNorm/beta:0") + + # layer-level weight loading + attn_q_kernel = [variables_dict.get( + var_prefix_layer + f"layer_._{i}/attention/self/query_proj/kernel:0") for i in range(start_layer, end_layer)] + attn_q_bias = [variables_dict.get( + var_prefix_layer + f"layer_._{i}/attention/self/query_proj/bias:0") for i in range(start_layer, end_layer)] + + attn_k_kernel = [variables_dict.get( + var_prefix_layer + f"layer_._{i}/attention/self/key_proj/kernel:0") for i in range(start_layer, end_layer)] + attn_k_bias = [variables_dict.get( + var_prefix_layer + f"layer_._{i}/attention/self/key_proj/bias:0") for i in range(start_layer, end_layer)] + + attn_v_kernel = [variables_dict.get( + var_prefix_layer + f"layer_._{i}/attention/self/value_proj/kernel:0") for i in range(start_layer, end_layer)] + attn_v_bias = [variables_dict.get( + var_prefix_layer + f"layer_._{i}/attention/self/value_proj/bias:0") for i in range(start_layer, end_layer)] + + attn_output_kernel = [variables_dict.get( + var_prefix_layer + f"layer_._{i}/attention/output/dense/kernel:0") for i in range(start_layer, end_layer)] + attn_output_bias = [variables_dict.get( + var_prefix_layer + f"layer_._{i}/attention/output/dense/bias:0") for i in range(start_layer, end_layer)] + + attn_output_layernorm_gamma = [variables_dict.get( + var_prefix_layer + f"layer_._{i}/attention/output/LayerNorm/gamma:0") for i in range(start_layer, end_layer)] + attn_output_layernorm_beta = [variables_dict.get( + var_prefix_layer + f"layer_._{i}/attention/output/LayerNorm/beta:0") for i in range(start_layer, end_layer)] + + inter_kernel = [variables_dict.get( + var_prefix_layer + f"layer_._{i}/intermediate/dense/kernel:0") for i in range(start_layer, end_layer)] + inter_bias = [variables_dict.get( + var_prefix_layer + f"layer_._{i}/intermediate/dense/bias:0") for i in range(start_layer, end_layer)] + + output_kernel = [variables_dict.get( + var_prefix_layer + f"layer_._{i}/output/dense/kernel:0") for i in range(start_layer, end_layer)] + output_bias = [variables_dict.get( + var_prefix_layer + f"layer_._{i}/output/dense/bias:0") for i in range(start_layer, end_layer)] + + output_layernorm_gamma = [variables_dict.get( + var_prefix_layer + f"layer_._{i}/output/LayerNorm/gamma:0") for i in range(start_layer, end_layer)] + output_layernorm_beta = [variables_dict.get( + var_prefix_layer + f"layer_._{i}/output/LayerNorm/beta:0") for i in range(start_layer, end_layer)] + + # pack the arguments into a tuple that mirrors the TF custom OP input + weights = [ + word_embedding_table, + word_embedding_layernorm_gamma, + word_embedding_layernorm_beta, + relative_embedding_table, + relative_embedding_layernorm_gamma, + relative_embedding_layernorm_beta, + attn_q_kernel, + attn_q_bias, + attn_k_kernel, + attn_k_bias, + attn_v_kernel, + attn_v_bias, + attn_output_kernel, + attn_output_bias, + attn_output_layernorm_gamma, + attn_output_layernorm_beta, + inter_kernel, + inter_bias, + output_kernel, + output_bias, + output_layernorm_gamma, + output_layernorm_beta + ] + + # clean up if there is None. Note - we cannot use np.array([0]) as TF won't accept empty tensors + for i in range(0, len(weights)): + if weights[i] is None: + weights[i] = tf.constant([0], dtype=weight_data_type) + elif type(weights[i]) is list: + weights[i] = [tf.constant([0], dtype=weight_data_type) if w is None else tf.convert_to_tensor( + w, dtype=weight_data_type) for w in weights[i]] + else: + weights[i] = tf.convert_to_tensor(weights[i], dtype=weight_data_type) + + self.weights = tuple(weights) + + +class FTDebertaModel(): + def __init__(self, lib_path, params): + self.transformer_op_module = tf.load_op_library(lib_path) + self.params = params + + def __call__(self, input_ids, seq_len, remove_padding=True): + return self.forward(input_ids, seq_len, remove_padding=remove_padding) + + def forward(self, input_ids, seq_len, remove_padding=True): + outputs = self.transformer_op_module.deberta(input_ids, + seq_len, + *self.params.weights, + head_num=self.params.num_heads, + size_per_head=self.params.head_size, + max_relative_positions=self.params.max_relative_positions, + relative_position_buckets=self.params.relative_position_buckets, + inter_size=self.params.inter_size, + num_layer=self.params.num_layer, + remove_padding=remove_padding, + q_scaling=self.params.q_scaling) + return outputs + + +class FTHFDebertaModel(): + def __init__(self, ft_model, remove_padding=True): + self.model = ft_model + self.remove_padding = remove_padding + + def __call__(self, input_ids, attention_mask, **kwargs): + seq_len = tf.reduce_sum(attention_mask, axis=1) + outputs = self.model.forward(input_ids, seq_len, remove_padding=self.remove_padding) + + # to match HF structure + FTOutput = namedtuple("FTOutput", ["output", "hidden_states", "attentions"]) + o = FTOutput(outputs, None, None) + return o diff --git a/examples/tensorflow/decoder/decoder_example.py b/examples/tensorflow/decoder/decoder_example.py index 515004b13..16ea86563 100644 --- a/examples/tensorflow/decoder/decoder_example.py +++ b/examples/tensorflow/decoder/decoder_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorflow/decoding/decoding_example.py b/examples/tensorflow/decoding/decoding_example.py index 782815244..3a0845c55 100644 --- a/examples/tensorflow/decoding/decoding_example.py +++ b/examples/tensorflow/decoding/decoding_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorflow/decoding/translate_example.py b/examples/tensorflow/decoding/translate_example.py index 0ec451f78..ea0041c7c 100644 --- a/examples/tensorflow/decoding/translate_example.py +++ b/examples/tensorflow/decoding/translate_example.py @@ -12,7 +12,7 @@ Currently, the beam search part is not easily customizable. This is expected to be improved for TensorFlow 2.0 which is eager first. -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorflow/encoder/encoder_example.py b/examples/tensorflow/encoder/encoder_example.py index b894ac915..7e10d5f5d 100644 --- a/examples/tensorflow/encoder/encoder_example.py +++ b/examples/tensorflow/encoder/encoder_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorflow/gpt/gpt_example.py b/examples/tensorflow/gpt/gpt_example.py index 4e6683185..af8247d2b 100644 --- a/examples/tensorflow/gpt/gpt_example.py +++ b/examples/tensorflow/gpt/gpt_example.py @@ -25,7 +25,7 @@ # TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE # OR OTHER DEALINGS IN THE SOFTWARE. -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorflow/gpt/utils/gpt_token_converter.py b/examples/tensorflow/gpt/utils/gpt_token_converter.py index ab59c39c3..8d3e9a7ee 100644 --- a/examples/tensorflow/gpt/utils/gpt_token_converter.py +++ b/examples/tensorflow/gpt/utils/gpt_token_converter.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorflow/gpt/utils/openai_gpt_ckpt_converter.py b/examples/tensorflow/gpt/utils/openai_gpt_ckpt_converter.py index 22d6c3d6e..add1405fe 100644 --- a/examples/tensorflow/gpt/utils/openai_gpt_ckpt_converter.py +++ b/examples/tensorflow/gpt/utils/openai_gpt_ckpt_converter.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorflow/t5/translate_example.py b/examples/tensorflow/t5/translate_example.py index ad62f3791..e1f9ca0ed 100644 --- a/examples/tensorflow/t5/translate_example.py +++ b/examples/tensorflow/t5/translate_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorflow/t5/utils/ft_decoding.py b/examples/tensorflow/t5/utils/ft_decoding.py index 8f2fd22cb..5f5e59277 100644 --- a/examples/tensorflow/t5/utils/ft_decoding.py +++ b/examples/tensorflow/t5/utils/ft_decoding.py @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorflow/t5/utils/ft_encoder.py b/examples/tensorflow/t5/utils/ft_encoder.py index ae509eb36..79f80252d 100644 --- a/examples/tensorflow/t5/utils/ft_encoder.py +++ b/examples/tensorflow/t5/utils/ft_encoder.py @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorflow/t5/utils/jax_t5_ckpt_convert.py b/examples/tensorflow/t5/utils/jax_t5_ckpt_convert.py index b8e0308c7..d8ca5af15 100755 --- a/examples/tensorflow/t5/utils/jax_t5_ckpt_convert.py +++ b/examples/tensorflow/t5/utils/jax_t5_ckpt_convert.py @@ -1,5 +1,5 @@ #! /usr/bin/env python3 -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorflow/t5/utils/tf_saved_model_t5_ckpt_convert.py b/examples/tensorflow/t5/utils/tf_saved_model_t5_ckpt_convert.py index 517791b2f..d270a3ba6 100755 --- a/examples/tensorflow/t5/utils/tf_saved_model_t5_ckpt_convert.py +++ b/examples/tensorflow/t5/utils/tf_saved_model_t5_ckpt_convert.py @@ -1,5 +1,5 @@ #! /usr/bin/env python3 -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorrt/swin/builder.py b/examples/tensorrt/swin/builder.py index 54cea5847..dc5544633 100644 --- a/examples/tensorrt/swin/builder.py +++ b/examples/tensorrt/swin/builder.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorrt/swin/builder_int8.py b/examples/tensorrt/swin/builder_int8.py index 6b05091b9..7776af35f 100644 --- a/examples/tensorrt/swin/builder_int8.py +++ b/examples/tensorrt/swin/builder_int8.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorrt/swin/infer_swintransformer_plugin.py b/examples/tensorrt/swin/infer_swintransformer_plugin.py index 81870a869..d418d9eb0 100644 --- a/examples/tensorrt/swin/infer_swintransformer_plugin.py +++ b/examples/tensorrt/swin/infer_swintransformer_plugin.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorrt/swin/infer_swintransformer_plugin_int8.py b/examples/tensorrt/swin/infer_swintransformer_plugin_int8.py index 4afbdffdb..567ba167c 100644 --- a/examples/tensorrt/swin/infer_swintransformer_plugin_int8.py +++ b/examples/tensorrt/swin/infer_swintransformer_plugin_int8.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorrt/swin/run_builder_fp16_v1.sh b/examples/tensorrt/swin/run_builder_fp16_v1.sh index dd0fb6e3c..029c852b4 100644 --- a/examples/tensorrt/swin/run_builder_fp16_v1.sh +++ b/examples/tensorrt/swin/run_builder_fp16_v1.sh @@ -2,7 +2,7 @@ python builder.py \ --batch-size 32 \ --cfg ../../pytorch/swin/Swin-Transformer-Quantization/SwinTransformer/configs/swin/swin_tiny_patch4_window7_224.yaml \ --resume ../../pytorch/swin/Swin-Transformer-Quantization/swin_tiny_patch4_window7_224.pth \ - --th-path ../../../build/lib/libpyt_swintransformer.so \ + --th-path ../../../build/lib/libth_transformer.so \ --version 1 \ --fp16 \ --output swin_transformer_fp16_v1.engine diff --git a/examples/tensorrt/swin/run_builder_fp16_v2.sh b/examples/tensorrt/swin/run_builder_fp16_v2.sh index 7c7e80792..81e1f0ef3 100644 --- a/examples/tensorrt/swin/run_builder_fp16_v2.sh +++ b/examples/tensorrt/swin/run_builder_fp16_v2.sh @@ -2,7 +2,7 @@ python builder.py \ --batch-size 32 \ --cfg ../../pytorch/swin/Swin-Transformer-Quantization/SwinTransformer/configs/swinv2/swinv2_tiny_patch4_window8_256.yaml \ --resume ../../pytorch/swin/Swin-Transformer-Quantization/swinv2_tiny_patch4_window8_256.pth \ - --th-path ../../../build/lib/libpyt_swintransformer.so \ + --th-path ../../../build/lib/libth_transformer.so \ --version 2 \ --fp16 \ --output swin_transformer_fp16_v2.engine diff --git a/examples/tensorrt/swin/run_builder_fp32_v1.sh b/examples/tensorrt/swin/run_builder_fp32_v1.sh index 387215a80..b2a90bb6e 100644 --- a/examples/tensorrt/swin/run_builder_fp32_v1.sh +++ b/examples/tensorrt/swin/run_builder_fp32_v1.sh @@ -2,7 +2,7 @@ python builder.py \ --batch-size 32 \ --cfg ../../pytorch/swin/Swin-Transformer-Quantization/SwinTransformer/configs/swin/swin_tiny_patch4_window7_224.yaml \ --resume ../../pytorch/swin/Swin-Transformer-Quantization/swin_tiny_patch4_window7_224.pth \ - --th-path ../../../build/lib/libpyt_swintransformer.so \ + --th-path ../../../build/lib/libth_transformer.so \ --version 1 \ --output swin_transformer_fp32_v1.engine diff --git a/examples/tensorrt/swin/run_builder_fp32_v2.sh b/examples/tensorrt/swin/run_builder_fp32_v2.sh index c04019860..239bd971a 100644 --- a/examples/tensorrt/swin/run_builder_fp32_v2.sh +++ b/examples/tensorrt/swin/run_builder_fp32_v2.sh @@ -2,7 +2,7 @@ python builder.py \ --batch-size 32 \ --cfg ../../pytorch/swin/Swin-Transformer-Quantization/SwinTransformer/configs/swinv2/swinv2_tiny_patch4_window8_256.yaml \ --resume ../../pytorch/swin/Swin-Transformer-Quantization/swinv2_tiny_patch4_window8_256.pth \ - --th-path ../../../build/lib/libpyt_swintransformer.so \ + --th-path ../../../build/lib/libth_transformer.so \ --version 2 \ --output swin_transformer_fp32_v2.engine diff --git a/examples/tensorrt/swin/run_builder_int8_v1.sh b/examples/tensorrt/swin/run_builder_int8_v1.sh index bab85f5cb..8ab1ff28a 100644 --- a/examples/tensorrt/swin/run_builder_int8_v1.sh +++ b/examples/tensorrt/swin/run_builder_int8_v1.sh @@ -2,7 +2,7 @@ python builder_int8.py \ --batch-size 32 \ --cfg ../../pytorch/swin/Swin-Transformer-Quantization/SwinTransformer/configs/swin/swin_tiny_patch4_window7_224.yaml \ --resume ../../pytorch/swin/Swin-Transformer-Quantization/calib-checkpoint/swin_tiny_patch4_window7_224_calib.pth \ - --th-path ../../../build/lib/libpyt_swintransformer.so \ + --th-path ../../../build/lib/libth_transformer.so \ --int8-mode 1 \ --version 1 \ --output swin_transformer_int8_v1.engine diff --git a/examples/tensorrt/swin/run_builder_int8_v2.sh b/examples/tensorrt/swin/run_builder_int8_v2.sh index 347a52519..a7c0d138e 100644 --- a/examples/tensorrt/swin/run_builder_int8_v2.sh +++ b/examples/tensorrt/swin/run_builder_int8_v2.sh @@ -2,7 +2,7 @@ python builder_int8.py \ --batch-size 32 \ --cfg ../../pytorch/swin/Swin-Transformer-Quantization/SwinTransformer/configs/swinv2/swinv2_tiny_patch4_window8_256.yaml \ --resume ../../pytorch/swin/Swin-Transformer-Quantization/calib-checkpoint/swinv2_tiny_patch4_window8_256_calib.pth \ - --th-path ../../../build/lib/libpyt_swintransformer.so \ + --th-path ../../../build/lib/libth_transformer.so \ --int8-mode 1 \ --version 2 \ --output swin_transformer_int8_v2.engine diff --git a/examples/tensorrt/swin/run_infer_fp16.sh b/examples/tensorrt/swin/run_infer_fp16.sh index bad7c8e5c..9e1e40833 100644 --- a/examples/tensorrt/swin/run_infer_fp16.sh +++ b/examples/tensorrt/swin/run_infer_fp16.sh @@ -3,7 +3,7 @@ if [ $1 -eq 1 ]; then --eval \ --cfg ../../pytorch/swin/Swin-Transformer-Quantization/SwinTransformer/configs/swin/swin_tiny_patch4_window7_224.yaml \ --resume ../../pytorch/swin/Swin-Transformer-Quantization/swin_tiny_patch4_window7_224.pth \ - --th-path ../../../build/lib/libpyt_swintransformer.so \ + --th-path ../../../build/lib/libth_transformer.so \ --use-fp16 \ --engine swin_transformer_fp16_v1.engine \ --batch-size $2 @@ -14,7 +14,7 @@ if [ $1 -eq 2 ]; then --eval \ --cfg ../../pytorch/swin/Swin-Transformer-Quantization/SwinTransformer/configs/swinv2/swinv2_tiny_patch4_window8_256.yaml \ --resume ../../pytorch/swin/Swin-Transformer-Quantization/swinv2_tiny_patch4_window8_256.pth \ - --th-path ../../../build/lib/libpyt_swintransformer.so \ + --th-path ../../../build/lib/libth_transformer.so \ --use-fp16 \ --engine swin_transformer_fp16_v2.engine \ --batch-size $2 diff --git a/examples/tensorrt/swin/run_infer_fp32.sh b/examples/tensorrt/swin/run_infer_fp32.sh index bc7e46ba0..4ad649cc9 100644 --- a/examples/tensorrt/swin/run_infer_fp32.sh +++ b/examples/tensorrt/swin/run_infer_fp32.sh @@ -3,7 +3,7 @@ if [ $1 -eq 1 ]; then --eval \ --cfg ../../pytorch/swin/Swin-Transformer-Quantization/SwinTransformer/configs/swin/swin_tiny_patch4_window7_224.yaml \ --resume ../../pytorch/swin/Swin-Transformer-Quantization/swin_tiny_patch4_window7_224.pth \ - --th-path ../../../build/lib/libpyt_swintransformer.so \ + --th-path ../../../build/lib/libth_transformer.so \ --engine swin_transformer_fp32_v1.engine \ --batch-size $2 fi @@ -13,7 +13,7 @@ if [ $1 -eq 2 ]; then --eval \ --cfg ../../pytorch/swin/Swin-Transformer-Quantization/SwinTransformer/configs/swinv2/swinv2_tiny_patch4_window8_256.yaml \ --resume ../../pytorch/swin/Swin-Transformer-Quantization/swinv2_tiny_patch4_window8_256.pth \ - --th-path ../../../build/lib/libpyt_swintransformer.so \ + --th-path ../../../build/lib/libth_transformer.so \ --engine swin_transformer_fp32_v2.engine \ --batch-size $2 fi diff --git a/examples/tensorrt/swin/run_infer_int8.sh b/examples/tensorrt/swin/run_infer_int8.sh index 54b992204..9d51d8e97 100644 --- a/examples/tensorrt/swin/run_infer_int8.sh +++ b/examples/tensorrt/swin/run_infer_int8.sh @@ -5,7 +5,7 @@ if [ $1 -eq 1 ]; then --resume ../../pytorch/swin/Swin-Transformer-Quantization/calib-checkpoint/swin_tiny_patch4_window7_224_calib.pth \ --int8-mode 1 \ --version 1 \ - --th-path ../../../build/lib/libpyt_swintransformer.so \ + --th-path ../../../build/lib/libth_transformer.so \ --engine swin_transformer_int8_v1.engine \ --batch-size $2 fi @@ -17,7 +17,7 @@ if [ $1 -eq 2 ]; then --resume ../../pytorch/swin/Swin-Transformer-Quantization/calib-checkpoint/swinv2_tiny_patch4_window8_256_calib.pth \ --int8-mode 1 \ --version 2 \ - --th-path ../../../build/lib/libpyt_swintransformer.so \ + --th-path ../../../build/lib/libth_transformer.so \ --engine swin_transformer_int8_v2.engine \ --batch-size $2 fi \ No newline at end of file diff --git a/examples/tensorrt/t5/createT5TestData.py b/examples/tensorrt/t5/createT5TestData.py index 3a0367af1..198371089 100644 --- a/examples/tensorrt/t5/createT5TestData.py +++ b/examples/tensorrt/t5/createT5TestData.py @@ -1,5 +1,5 @@ # -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorrt/t5/extractT5ModelToBIN.py b/examples/tensorrt/t5/extractT5ModelToBIN.py index 00cd4a3a6..5bcac6657 100644 --- a/examples/tensorrt/t5/extractT5ModelToBIN.py +++ b/examples/tensorrt/t5/extractT5ModelToBIN.py @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorrt/t5/testT5Plugin.py b/examples/tensorrt/t5/testT5Plugin.py index d1ffc8cdd..693785dfa 100644 --- a/examples/tensorrt/t5/testT5Plugin.py +++ b/examples/tensorrt/t5/testT5Plugin.py @@ -1,5 +1,5 @@ # -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorrt/vit/infer_visiontransformer_int8_plugin.py b/examples/tensorrt/vit/infer_visiontransformer_int8_plugin.py index 7b2bd5f60..89ef6e3d2 100644 --- a/examples/tensorrt/vit/infer_visiontransformer_int8_plugin.py +++ b/examples/tensorrt/vit/infer_visiontransformer_int8_plugin.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorrt/vit/infer_visiontransformer_plugin.py b/examples/tensorrt/vit/infer_visiontransformer_plugin.py index c99ddff7a..7c1ce4143 100644 --- a/examples/tensorrt/vit/infer_visiontransformer_plugin.py +++ b/examples/tensorrt/vit/infer_visiontransformer_plugin.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorrt/vit/plugin_loader.py b/examples/tensorrt/vit/plugin_loader.py index f6ba3b664..0646850e0 100644 --- a/examples/tensorrt/vit/plugin_loader.py +++ b/examples/tensorrt/vit/plugin_loader.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorrt/vit/plugin_loader_int8.py b/examples/tensorrt/vit/plugin_loader_int8.py index fd932eb4f..5c47ae003 100644 --- a/examples/tensorrt/vit/plugin_loader_int8.py +++ b/examples/tensorrt/vit/plugin_loader_int8.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/utils/hf_detokenize.py b/examples/utils/hf_detokenize.py index e0b15968e..deb0675ea 100755 --- a/examples/utils/hf_detokenize.py +++ b/examples/utils/hf_detokenize.py @@ -1,5 +1,5 @@ #! /usr/bin/env python3 -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/utils/hf_tokenize.py b/examples/utils/hf_tokenize.py index 27e764c69..45caa4be9 100755 --- a/examples/utils/hf_tokenize.py +++ b/examples/utils/hf_tokenize.py @@ -1,5 +1,5 @@ #! /usr/bin/env python3 -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index da20ca44e..5474bbe37 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/CMakeLists.txt b/src/fastertransformer/CMakeLists.txt index ae5d233d6..e33910fc4 100644 --- a/src/fastertransformer/CMakeLists.txt +++ b/src/fastertransformer/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/cutlass_extensions/include/cutlass_extensions/compute_occupancy.h b/src/fastertransformer/cutlass_extensions/include/cutlass_extensions/compute_occupancy.h index ecc210f29..932a00af3 100644 --- a/src/fastertransformer/cutlass_extensions/include/cutlass_extensions/compute_occupancy.h +++ b/src/fastertransformer/cutlass_extensions/include/cutlass_extensions/compute_occupancy.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/cutlass_extensions/include/cutlass_extensions/epilogue/epilogue_quant_helper.h b/src/fastertransformer/cutlass_extensions/include/cutlass_extensions/epilogue/epilogue_quant_helper.h new file mode 100644 index 000000000..3697b6748 --- /dev/null +++ b/src/fastertransformer/cutlass_extensions/include/cutlass_extensions/epilogue/epilogue_quant_helper.h @@ -0,0 +1,48 @@ +/*************************************************************************************************** + * Copyright (c) 2017 - 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: BSD-3-Clause + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + **************************************************************************************************/ + +#pragma once + +///////////////////////////////////////////////////////////////////////////////////////////////// + +namespace cutlass { +namespace epilogue { + +// define scaling mode +enum class QuantMode { + PerTensorQuant, + PerTokenQuant, + PerChannelQuant, + PerTokenChannelQuant +}; + +} // namespace epilogue +} // namespace cutlass diff --git a/src/fastertransformer/cutlass_extensions/include/cutlass_extensions/epilogue/threadblock/epilogue_per_row_per_col_scale.h b/src/fastertransformer/cutlass_extensions/include/cutlass_extensions/epilogue/threadblock/epilogue_per_row_per_col_scale.h new file mode 100644 index 000000000..53b70e801 --- /dev/null +++ b/src/fastertransformer/cutlass_extensions/include/cutlass_extensions/epilogue/threadblock/epilogue_per_row_per_col_scale.h @@ -0,0 +1,390 @@ +/*************************************************************************************************** + * Copyright (c) 2017 - 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: BSD-3-Clause + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + **************************************************************************************************/ +/*! \file + \brief Epilogue visitor for threadblock scoped INT8 GEMMs that uses one scaling factor per row, and one per column. + + original file: 3rdparty/cutlass/include/cutlass/epilogue/threadblock/epilogue_visitor_with_softmax.h + +*/ + +#pragma once + +///////////////////////////////////////////////////////////////////////////////////////////////// + +#include "../epilogue_quant_helper.h" +#include "cutlass/arch/memory.h" +#include "cutlass/arch/memory_sm75.h" +#include "cutlass/cutlass.h" +#include "cutlass/fast_math.h" +#include "cutlass/numeric_conversion.h" + +namespace cutlass { +namespace epilogue { +namespace threadblock { + +template +class EpilogueVisitorPerRowPerCol { +public: + using ThreadblockShape = ThreadblockShape_; + static int const kThreadCount = ThreadCount; + + using ScaleTileIterator = ScaleTileIterator_; + using OutputTileIterator = OutputTileIterator_; + using ElementwiseFunctor = ElementwiseFunctor_; + + static int const kIterations = OutputTileIterator::kIterations; + static int const kElementsPerAccess = OutputTileIterator::kElementsPerAccess; + + using ElementOutput = typename OutputTileIterator::Element; + using LayoutOutput = cutlass::layout::RowMajor; + using ElementAccumulator = ElementAccumulator_; + + using AlphaScaleElementType = typename ScaleTileIterator::Element; + + using ElementCompute = ElementCompute_; + using AccumulatorFragment = Array; + using ComputeFragment = Array; + using OutputVector = Array; + + static int const kThreadsPerRow = OutputTileIterator::ThreadMap::Detail::kAccessWidth; + static bool const kHasMultiStepsInRow = (OutputTileIterator::ThreadMap::Iterations::kColumn > 1); + + /// Argument structure + struct Arguments { + + typename ElementwiseFunctor::Params elementwise; + int64_t batch_stride_alpha; + int64_t batch_stride_C; + int64_t batch_stride_D; + + // + // Methods + // + Arguments(): batch_stride_alpha(0), batch_stride_C(0), batch_stride_D(0) {} + + Arguments(typename ElementwiseFunctor::Params elementwise_): + elementwise(elementwise_), batch_stride_alpha(0), batch_stride_C(0), batch_stride_D(0) + { + } + + Arguments(typename ElementwiseFunctor::Params elementwise_, + int64_t batch_stride_alpha_, + int64_t batch_stride_C_, + int64_t batch_stride_D_): + elementwise(elementwise_), + batch_stride_alpha(batch_stride_alpha_), + batch_stride_C(batch_stride_C_), + batch_stride_D(batch_stride_D_) + { + } + }; + + struct Params { + + typename ElementwiseFunctor::Params elementwise; + int64_t batch_stride_alpha; + int64_t batch_stride_C; + int64_t batch_stride_D; + // + // Methods + // + CUTLASS_HOST_DEVICE + Params() {} + + CUTLASS_HOST_DEVICE + Params(Arguments const& args): + elementwise(args.elementwise), + batch_stride_alpha(args.batch_stride_alpha), + batch_stride_C(args.batch_stride_C), + batch_stride_D(args.batch_stride_D) + { + } + }; + + /// Shared storage + struct SharedStorage {}; + +private: + Params const& params_; + SharedStorage& shared_storage_; + MatrixCoord extent_; + MatrixCoord extent_real_; + ElementwiseFunctor elementwise_; + + const bool per_token_quant_; + const bool per_channel_quant_; + + AlphaScaleElementType* ptr_alpha_row_; + AlphaScaleElementType* ptr_alpha_col_; + ScaleTileIterator iterator_alpha_col_; + OutputTileIterator iterator_C_; + OutputTileIterator iterator_D_; + + AlphaScaleElementType element_alpha_row_ = 1.0f; + AlphaScaleElementType element_alpha_col_ = 1.0f; + typename ScaleTileIterator::Fragment fragment_alpha_col_; + typename OutputTileIterator::Fragment fragment_C_; + typename OutputTileIterator::Fragment fragment_D_; + + ElementAccumulator beta_; + + int column_offset_; + + MatrixCoord thread_offset_; + +public: + CUTLASS_DEVICE + EpilogueVisitorPerRowPerCol(Params const& params, + SharedStorage& shared_storage, + cutlass::MatrixCoord const& problem_size, + int thread_idx, + int warp_idx, + int lane_idx, + typename ScaleTileIterator::Params params_alpha_col, + typename OutputTileIterator::Params params_C, + typename OutputTileIterator::Params params_D, + QuantMode quant_mode, + AlphaScaleElementType* ptr_alpha_row, + AlphaScaleElementType* ptr_alpha_col, + typename OutputTileIterator::Element* ptr_C, + typename OutputTileIterator::Element* ptr_D, + cutlass::MatrixCoord const& threadblock_offset = cutlass::MatrixCoord(0, 0), + int column_offset = 0, + cutlass::MatrixCoord const& problem_size_real = cutlass::MatrixCoord(0, 0)): + params_(params), + shared_storage_(shared_storage), + extent_(problem_size), + elementwise_(params.elementwise), + per_token_quant_(quant_mode == QuantMode::PerTokenQuant || quant_mode == QuantMode::PerTokenChannelQuant), + per_channel_quant_(quant_mode == QuantMode::PerChannelQuant || quant_mode == QuantMode::PerTokenChannelQuant), + ptr_alpha_row_(ptr_alpha_row), + ptr_alpha_col_(ptr_alpha_col), + iterator_alpha_col_(params_alpha_col, ptr_alpha_col, problem_size, thread_idx, threadblock_offset), + iterator_C_(params_C, ptr_C, problem_size, thread_idx, threadblock_offset), + iterator_D_(params_D, ptr_D, problem_size, thread_idx, threadblock_offset), + extent_real_(problem_size_real) + { + beta_ = (params.elementwise.beta_ptr ? *params.elementwise.beta_ptr : params.elementwise.beta); + + if (beta_ == ElementAccumulator()) { + iterator_C_.clear_mask(); + } + } + + /// Helper to indicate split-K behavior + CUTLASS_DEVICE + void set_k_partition(int split_k_index, ///< Index of this threadblock within split-K partitioned scheme + int split_k_slices) + { ///< Total number of split-K slices + } + + /// Called to set the batch index + CUTLASS_DEVICE + void set_batch_index(int batch_idx) + { + iterator_alpha_col_.add_pointer_offset(batch_idx * params_.batch_stride_alpha); + iterator_C_.add_pointer_offset(batch_idx * params_.batch_stride_C); + iterator_D_.add_pointer_offset(batch_idx * params_.batch_stride_D); + } + + /// Called at the start of the epilogue just before iterating over accumulator slices + CUTLASS_DEVICE + void begin_epilogue() + { + if (per_channel_quant_) { + iterator_alpha_col_.load(fragment_alpha_col_); + } + else if (ptr_alpha_col_ != nullptr) { + arch::global_load( + element_alpha_col_, ptr_alpha_col_, true); + } + + if (!per_token_quant_ && ptr_alpha_row_ != nullptr) { + arch::global_load( + element_alpha_row_, ptr_alpha_row_, true); + } + } + + /// Called at the start of one step before starting accumulator exchange + CUTLASS_DEVICE + void begin_step(int step_idx) + { + fragment_D_.clear(); + fragment_C_.clear(); + + if (elementwise_.kScale != cutlass::epilogue::thread::ScaleType::OnlyAlphaScaling) { + iterator_C_.load(fragment_C_); + ++iterator_C_; + } + + // load alpha_row in begin_step only when per token(row) scaling is used + if (per_token_quant_) { + int thread_offset_row = + iterator_D_.thread_start_row() + OutputTileIterator::ThreadMap::iteration_offset(0).row(); + + // element_alpha_row_ = ptr_alpha_row_[thread_offset_row]; + arch::global_load( + element_alpha_row_, ptr_alpha_row_ + thread_offset_row, thread_offset_row < extent_.row()); + } + } + + /// Called at the start of a row + CUTLASS_DEVICE + void begin_row(int row_idx) + { + // Clear accumulators for max and sum when starting a whole row + } + + /// Called after accumulators have been exchanged for each accumulator vector + CUTLASS_DEVICE + void visit(int iter_idx, int row_idx, int column_idx, int frag_idx, AccumulatorFragment const& accum) + { + + NumericArrayConverter source_converter; + + ComputeFragment result = source_converter(accum); + if (per_channel_quant_) { + ComputeFragment alpha_col = reinterpret_cast(&fragment_alpha_col_)[frag_idx]; + result = per_token_channel_scale_accumulator_(result, alpha_col, element_alpha_row_); + } + else { + result = per_token_scale_accumulator_(result, element_alpha_col_, element_alpha_row_); + } + + /* printf("%d %e\n", accum[0], result[0]); */ + /* scale_accumulator_(result, alpha_row_vector[0]); //TODO(mseznec) */ + + /* if (elementwise_.kScale == cutlass::epilogue::thread::ScaleType::OnlyAlphaScaling) { */ + /* result = source_converter(elementwise_(result)); */ + /* } else { */ + /* result = source_converter(elementwise_(result, source_vector)); */ + /* } */ + + /* // Convert to the output */ + NumericArrayConverter output_converter; + OutputVector& output = reinterpret_cast(&fragment_D_)[frag_idx]; + output = output_converter(result); + } + + /// Called at the end of a row + CUTLASS_DEVICE + void end_row(int row_idx) + { + + /* using ConvertSumOutput = cutlass::NumericConverter; */ + /* using ConvertNormOutput = cutlass::NumericConverter; */ + + /* ConvertSumOutput convert_sum_output; */ + /* ConvertNormOutput convert_norm_output; */ + + /* // Compute accumulate sum only in the last step */ + /* accum_sum_ = warp_reduce_sum_(accum_sum_); */ + + /* bool is_first_thread_in_tile = ((threadIdx.x % kThreadsPerRow) == 0); */ + /* bool row_guard = thread_offset_.row() < extent_.row(); */ + /* bool is_write_thread = row_guard && is_first_thread_in_tile; */ + + /* int block_batch = blockIdx.z; */ + + /* ElementNorm *curr_ptr_max = ptr_Max_ + thread_offset_.row() + column_offset_ + block_batch * + * params_.batch_stride_Max; */ + /* ElementSum *curr_ptr_sum = ptr_Sum_ + thread_offset_.row() + column_offset_ + block_batch * + * params_.batch_stride_Sum; */ + + /* arch::global_store( */ + /* convert_norm_output(accum_max_), */ + /* (void *)curr_ptr_max, */ + /* is_write_thread); */ + + /* arch::global_store( */ + /* convert_sum_output(accum_sum_), */ + /* (void *)curr_ptr_sum, */ + /* is_write_thread); */ + + /* // Clear accumulators for max and sum when finishing a whole row */ + /* clear_accum_(); */ + } + + /// Called after all accumulator elements have been visited + CUTLASS_DEVICE + void end_step(int step_idx) + { + + iterator_D_.store(fragment_D_); + ++iterator_D_; + } + + /// Called after all steps have been completed + CUTLASS_DEVICE + void end_epilogue() {} + +private: + CUTLASS_DEVICE + ComputeFragment per_token_channel_scale_accumulator_(ComputeFragment const& accum, + ComputeFragment const& scale_col, + AlphaScaleElementType const& scale_row) + { + + ComputeFragment result; + CUTLASS_PRAGMA_UNROLL + for (int i = 0; i < ComputeFragment::kElements; ++i) { + result[i] = accum[i] * (scale_col[i] * scale_row); + } + + return result; + } + + CUTLASS_DEVICE + ComputeFragment per_token_scale_accumulator_(ComputeFragment const& accum, + AlphaScaleElementType const& scale_col, + AlphaScaleElementType const& scale_row) + { + + ComputeFragment result; + CUTLASS_PRAGMA_UNROLL + for (int i = 0; i < ComputeFragment::kElements; ++i) { + result[i] = accum[i] * (scale_col * scale_row); + } + + return result; + } +}; + +} // namespace threadblock +} // namespace epilogue +} // namespace cutlass diff --git a/src/fastertransformer/cutlass_extensions/include/cutlass_extensions/epilogue/threadblock/epilogue_tensor_op_int32.h b/src/fastertransformer/cutlass_extensions/include/cutlass_extensions/epilogue/threadblock/epilogue_tensor_op_int32.h new file mode 100644 index 000000000..0c16c0a59 --- /dev/null +++ b/src/fastertransformer/cutlass_extensions/include/cutlass_extensions/epilogue/threadblock/epilogue_tensor_op_int32.h @@ -0,0 +1,285 @@ +/*************************************************************************************************** + * Copyright (c) 2017 - 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: BSD-3-Clause + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + **************************************************************************************************/ +/*! \file + \brief Epilogue for threadblock scoped GEMMs using Tensor Ops. + + The epilogue rearranges the result of a matrix product through shared memory to match canonical + tensor layouts in global memory. Epilogues support conversion and reduction operations. + + original file: 3rdparty/cutlass/include/cutlass/epilogue/threadblock/default_epilogue_tensor_op.h + +*/ + +#pragma once + +#include "cutlass/array.h" +#include "cutlass/cutlass.h" +#include "cutlass/numeric_types.h" + +#include "cutlass/platform/platform.h" + +#include "cutlass/gemm/gemm.h" + +#include "cutlass/epilogue/thread/linear_combination.h" +#include "cutlass/epilogue/thread/linear_combination_clamp.h" +#include "cutlass/epilogue/thread/linear_combination_gelu.h" +#include "cutlass/epilogue/thread/linear_combination_hardswish.h" +#include "cutlass/epilogue/thread/linear_combination_planar_complex.h" +#include "cutlass/epilogue/thread/linear_combination_relu.h" +#include "cutlass/epilogue/thread/linear_combination_relu0.h" +#include "cutlass/epilogue/thread/linear_combination_sigmoid.h" + +#include "cutlass/epilogue/thread/conversion_op.h" +#include "cutlass/epilogue/thread/reduction_op.h" + +#include "cutlass/transform/threadblock/regular_tile_iterator_pitch_linear.h" + +#include "cutlass/epilogue/threadblock/default_thread_map_tensor_op.h" +#include "cutlass/epilogue/threadblock/predicated_tile_iterator.h" +#include "cutlass/epilogue/threadblock/predicated_tile_iterator_affine.h" +#include "cutlass/epilogue/threadblock/predicated_tile_iterator_strided_dgrad.h" +#include "cutlass/epilogue/threadblock/shared_load_iterator.h" +#include "cutlass/epilogue/threadblock/shared_load_iterator_mixed.h" +#include "cutlass/epilogue/warp/fragment_iterator_complex_tensor_op.h" +#include "cutlass/epilogue/warp/fragment_iterator_tensor_op.h" +#include "cutlass/epilogue/warp/tile_iterator_tensor_op.h" +#include "cutlass/epilogue/warp/tile_iterator_tensor_op_mixed.h" + +#include "cutlass/epilogue/threadblock/epilogue.h" +#include "cutlass/epilogue/threadblock/interleaved_epilogue.h" + +#include "cutlass/layout/permute.h" + +//////////////////////////////////////////////////////////////////////////////// + +namespace cutlass { +namespace epilogue { +namespace threadblock { + +//////////////////////////////////////////////////////////////////////////////// + +namespace detail { + +/// Partial specialization for half <= int32_t x 8 epilogues avoids shared memory bank conflicts. +template +struct DefaultIteratorsTensorOp { + + using WarpTileIterator = + cutlass::epilogue::warp::TileIteratorTensorOp; + + using SharedLoadIterator = cutlass::epilogue::threadblock::SharedLoadIterator; + + static int const kFragmentsPerIteration = 1; +}; + +/// Partial specialization for bfloat16_t <= int32_t x 8 epilogues avoids shared memory bank conflicts. +template +struct DefaultIteratorsTensorOp { + + using WarpTileIterator = + cutlass::epilogue::warp::TileIteratorTensorOp; + + using SharedLoadIterator = cutlass::epilogue::threadblock::SharedLoadIterator; + + static int const kFragmentsPerIteration = 1; +}; + +///////////////////////////////////////////////////////////////////////////////////////////////// + +} // namespace detail + +///////////////////////////////////////////////////////////////////////////////////////////////// + +/// Tile iterator used to load output tile from shared memory in epilogue. +/// +/// Satisfies: ReadableTileIterator +/// +template +class SharedLoadIteratorMixed { +public: + using ThreadMap = ThreadMap_; + using Shape = typename ThreadMap::Shape; + + using Element = int32_t; + + using Layout = layout::RowMajor; + using TensorRef = TensorRef; + using ConstTensorRef = typename TensorRef::ConstTensorRef; + + using Index = typename Layout::Index; + using LongIndex = typename Layout::LongIndex; + using TensorCoord = MatrixCoord; + + static int const kElementsPerAccess = ThreadMap::kElementsPerAccess; + + static int const kAlignment = ThreadMap::kElementsPerAccess * sizeof_bits::value / 8; + + static int const kThreads = ThreadMap::kThreads; + + /// Fragment object + using Fragment = Array; + + /// Memory access size + using AccessType = AlignedArray; + + /// Vector type used for SMEM loads + using LoadType = AlignedArray::value, ThreadMap::kElementsPerAccess), + const_min(16, kAlignment)>; + + static int const kLoadsPerAccess = AccessType::kElements / LoadType::kElements; + +private: + // + // Data members + // + + /// Byte-level pointer + LoadType const* pointers_[kLoadsPerAccess]; + + /// Stride along adjacent rows in units of LoadType + int stride_; + +public: + // + // Methods + // + + /// Constructor + CUTLASS_DEVICE + SharedLoadIteratorMixed(TensorRef ref, int thread_idx): stride_((ref.stride(0) / LoadType::kElements)) + { + + TensorCoord thread_offset = ThreadMap::initial_offset(thread_idx); + + // Initialize pointers + CUTLASS_PRAGMA_UNROLL + for (int i = 0; i < kLoadsPerAccess; ++i) { + pointers_[i] = reinterpret_cast(ref.data()); + + int col_idx = (thread_offset.column() / kElementsPerAccess) * kLoadsPerAccess; + int bank_offset = (col_idx * int(sizeof(LoadType)) / 128) % kLoadsPerAccess; + + col_idx += (bank_offset + i) % kLoadsPerAccess; + + pointers_[i] += thread_offset.row() * stride_ + col_idx; + } + } + + /// Adds a pointer offset in units of Element + CUTLASS_HOST_DEVICE + void add_pointer_offset(LongIndex pointer_offset) + { + CUTLASS_PRAGMA_UNROLL + for (int i = 0; i < kLoadsPerAccess; ++i) { + pointers_[i] += pointer_offset / LoadType::kElements; + } + } + + CUTLASS_DEVICE + void add_tile_offset(TensorCoord const& offset) + { + CUTLASS_PRAGMA_UNROLL + for (int i = 0; i < kLoadsPerAccess; ++i) { + pointers_[i] += + offset.row() * Shape::kRow * stride_ + offset.column() * Shape::kColumn / LoadType::kElements; + } + } + + /// Loads a fragment from memory + CUTLASS_DEVICE + void load_with_pointer_offset(Fragment& frag, Index pointer_offset) const + { + + CUTLASS_PRAGMA_UNROLL + for (int cluster = 0; cluster < ThreadMap::Iterations::kCluster; ++cluster) { + + CUTLASS_PRAGMA_UNROLL + for (int group = 0; group < ThreadMap::Iterations::kGroup; ++group) { + + CUTLASS_PRAGMA_UNROLL + for (int row = 0; row < ThreadMap::Iterations::kRow; ++row) { + + int row_ptr_offset = + row * ThreadMap::Delta::kRow * stride_ + group * ThreadMap::Delta::kGroup * stride_ + + cluster * ThreadMap::Delta::kCluster * stride_ + pointer_offset / LoadType::kElements; + + int frag_row_idx = + (row + ThreadMap::Iterations::kRow * (group + ThreadMap::Iterations::kGroup * cluster)); + + LoadType* frag_ptr = reinterpret_cast(&frag); + + CUTLASS_PRAGMA_UNROLL + for (int column = 0; column < ThreadMap::Iterations::kColumn; ++column) { + + int frag_idx = frag_row_idx * ThreadMap::Iterations::kColumn + column; + + CUTLASS_PRAGMA_UNROLL + for (int v = 0; v < kLoadsPerAccess; ++v) { + + int vector_idx = + (column * ThreadMap::Delta::kColumn / kElementsPerAccess * kLoadsPerAccess); + + LoadType const* memory_pointer = pointers_[v] + row_ptr_offset; + + frag_ptr[frag_idx * kLoadsPerAccess + v] = memory_pointer[vector_idx]; + } + } + } + } + } + } + + /// Loads a fragment + CUTLASS_DEVICE + void load(Fragment& frag) const + { + + load_with_pointer_offset(frag, 0); + } +}; + +///////////////////////////////////////////////////////////////////////////////////////////////// + +} // namespace threadblock +} // namespace epilogue +} // namespace cutlass + +//////////////////////////////////////////////////////////////////////////////// diff --git a/src/fastertransformer/cutlass_extensions/include/cutlass_extensions/ft_gemm_configs.h b/src/fastertransformer/cutlass_extensions/include/cutlass_extensions/ft_gemm_configs.h index 1d7c18451..fbc01b078 100644 --- a/src/fastertransformer/cutlass_extensions/include/cutlass_extensions/ft_gemm_configs.h +++ b/src/fastertransformer/cutlass_extensions/include/cutlass_extensions/ft_gemm_configs.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/cutlass_extensions/include/cutlass_extensions/gemm/kernel/gemm_with_epilogue_visitor.h b/src/fastertransformer/cutlass_extensions/include/cutlass_extensions/gemm/kernel/gemm_with_epilogue_visitor.h new file mode 100644 index 000000000..dfa5522be --- /dev/null +++ b/src/fastertransformer/cutlass_extensions/include/cutlass_extensions/gemm/kernel/gemm_with_epilogue_visitor.h @@ -0,0 +1,535 @@ +/*************************************************************************************************** + * Copyright (c) 2017 - 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: BSD-3-Clause + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + **************************************************************************************************/ +/*! \file + \brief GEMM kernel to support the epilogue visitor model + for customized softmax partial reduction epilogue fusion. + + This source file will likely be moved to `include/cutlass/gemm/kernel/` in the future once + its usage has been stabilized. For now, it is included in this example to demonstrate + some basic output fusion options. + + original file: 3rdparty/cutlass/examples/35_gemm_softmax/gemm_with_epilogue_visitor.h +*/ + +#pragma once + +#include "cutlass/complex.h" +#include "cutlass/cutlass.h" +#include "cutlass/fast_math.h" +#include "cutlass/gemm/gemm.h" +#include "cutlass/matrix_coord.h" +#include "cutlass/semaphore.h" +#include "cutlass/trace.h" + +#include "cutlass_extensions/epilogue/threadblock/epilogue_per_row_per_col_scale.h" + +///////////////////////////////////////////////////////////////////////////////////////////////// + +namespace cutlass { +namespace gemm { +namespace kernel { + +///////////////////////////////////////////////////////////////////////////////////////////////// + +template +struct GemmWithEpilogueVisitor { +public: + using Mma = Mma_; + using Epilogue = Epilogue_; + using EpilogueVisitor = typename Epilogue::Visitor; + using ThreadblockSwizzle = ThreadblockSwizzle_; + + using ElementA = typename Mma::IteratorA::Element; + using LayoutA = typename Mma::IteratorA::Layout; + using TensorRefA = TensorRef; + + using ElementB = typename Mma::IteratorB::Element; + using LayoutB = typename Mma::IteratorB::Layout; + using TensorRefB = TensorRef; + + using ElementCompute = typename EpilogueVisitor::ElementCompute; + using LayoutAlphaCol = cutlass::layout::RowMajor; + using LayoutAlphaRow = cutlass::layout::ColumnMajor; + using TensorRefAlphaCol = TensorRef; + using TensorRefAlphaRow = TensorRef; + + using ElementC = typename EpilogueVisitor::ElementOutput; + using LayoutC = typename Epilogue::Layout; + using TensorRefC = TensorRef; + + static ComplexTransform const kTransformA = Mma::kTransformA; + static ComplexTransform const kTransformB = Mma::kTransformB; + using Operator = typename Mma::Operator; + + using OperatorClass = typename Mma::Operator::OperatorClass; + using ThreadblockShape = typename Mma::Shape; + using WarpShape = typename Mma::Operator::Shape; + using InstructionShape = typename Mma::Policy::Operator::InstructionShape; + using ArchTag = typename Mma::ArchTag; + using EpilogueOutputOp = + typename Epilogue::Visitor::ElementwiseFunctor; // Define type so GemmUniversalBase doesn't complain + + static int const kStages = Mma::kStages; + static int const kAlignmentA = Mma::IteratorA::AccessType::kElements; + static int const kAlignmentB = Mma::IteratorB::AccessType::kElements; + static int const kAlignmentC = EpilogueVisitor::kElementsPerAccess; + + /// Warp count (concept: GemmShape) + using WarpCount = typename Mma::WarpCount; + static int const kThreadCount = 32 * WarpCount::kCount; + + /// Split-K preserves splits that are 128b aligned + static int const kSplitKAlignment = + const_max(128 / sizeof_bits::value, 128 / sizeof_bits::value); + + // + // Structures + // + + /// Argument structure + struct Arguments { + + // + // Data members + // + + GemmUniversalMode mode; + GemmCoord problem_size; + int batch_count; + + TensorRefA ref_A; + TensorRefB ref_B; + epilogue::QuantMode quant_mode; + TensorRefAlphaCol ref_alpha_col; + TensorRefAlphaRow ref_alpha_row; + TensorRefC ref_C; + TensorRefC ref_D; + + int64_t batch_stride_A; + int64_t batch_stride_B; + int64_t batch_stride_D; + + typename EpilogueVisitor::Arguments epilogue_visitor; + + // + // Methods + // + + Arguments(): mode(GemmUniversalMode::kGemm), batch_count(1) {} + + /// constructs an arguments structure + Arguments(GemmUniversalMode mode_, + GemmCoord problem_size_, + int batch_count_, + TensorRefA ref_A_, + TensorRefB ref_B_, + epilogue::QuantMode quant_mode_, + TensorRefAlphaCol ref_alpha_col_, + TensorRefAlphaRow ref_alpha_row_, + TensorRefC ref_C_, + TensorRefC ref_D_, + int64_t batch_stride_A_, + int64_t batch_stride_B_, + typename EpilogueVisitor::Arguments epilogue_visitor_): + mode(mode_), + problem_size(problem_size_), + batch_count(batch_count_), + ref_A(ref_A_), + ref_B(ref_B_), + quant_mode(quant_mode_), + ref_alpha_col(ref_alpha_col_), + ref_alpha_row(ref_alpha_row_), + ref_C(ref_C_), + ref_D(ref_D_), + batch_stride_A(batch_stride_A_), + batch_stride_B(batch_stride_B_), + batch_stride_D(0), + epilogue_visitor(epilogue_visitor_) + { + } + }; + + // + // Structure for precomputing values in host memory and passing to kernels + // + + /// Parameters structure + struct Params { + + cutlass::gemm::GemmCoord problem_size; + cutlass::gemm::GemmCoord grid_tiled_shape; + int swizzle_log_tile; + + typename Mma::IteratorA::Params params_A; + typename Mma::IteratorB::Params params_B; + typename EpilogueVisitor::ScaleTileIterator::Params params_alpha_col; + typename EpilogueVisitor::ScaleTileIterator::Params params_alpha_row; + typename EpilogueVisitor::OutputTileIterator::Params params_C; + typename EpilogueVisitor::OutputTileIterator::Params params_D; + + GemmUniversalMode mode; + int batch_count; + int gemm_k_size; + + void* ptr_A; + void* ptr_B; + epilogue::QuantMode quant_mode; + typename EpilogueVisitor::ScaleTileIterator::Element* ptr_alpha_col; + typename EpilogueVisitor::ScaleTileIterator::Element* ptr_alpha_row; + ElementC* ptr_C; + ElementC* ptr_D; + + int64_t batch_stride_A; + int64_t batch_stride_B; + + typename EpilogueVisitor::Params epilogue_visitor; + + // + // Methods + // + + CUTLASS_HOST_DEVICE + Params(): + swizzle_log_tile(0), + params_A(0), + params_B(0), + params_alpha_col(0), + params_C(0), + params_D(0), + batch_count(0), + gemm_k_size(0), + mode(cutlass::gemm::GemmUniversalMode::kGemm), + ptr_A(nullptr), + ptr_B(nullptr), + ptr_alpha_col(nullptr), + ptr_alpha_row(nullptr), + ptr_C(nullptr), + ptr_D(nullptr), + batch_stride_A(0), + batch_stride_B(0) + { + } + + Params(Arguments const& args, + cutlass::gemm::GemmCoord const& grid_tiled_shape_, + int gemm_k_size_, + int* workspace_): + problem_size(args.problem_size), + swizzle_log_tile(0), + params_A(args.ref_A.layout()), + params_B(args.ref_B.layout()), + params_alpha_col(args.ref_alpha_col.layout()), + params_alpha_row(args.ref_alpha_col.layout()), + params_C(args.ref_C.layout()), + params_D(args.ref_D.layout()), + mode(args.mode), + batch_count(args.batch_count), + gemm_k_size(args.problem_size.k()), + ptr_A(args.ref_A.data()), + ptr_B(args.ref_B.data()), + quant_mode(args.quant_mode), + ptr_alpha_col(args.ref_alpha_col.data()), + ptr_alpha_row(args.ref_alpha_row.data()), + ptr_C(args.ref_C.data()), + ptr_D(args.ref_D.data()), + batch_stride_A(args.batch_stride_A), + batch_stride_B(args.batch_stride_B), + epilogue_visitor(args.epilogue_visitor) + { + + ThreadblockSwizzle threadblock_swizzle; + + grid_tiled_shape = + threadblock_swizzle.get_tiled_shape(args.problem_size, + {ThreadblockShape::kM, ThreadblockShape::kN, ThreadblockShape::kK}, + args.batch_count); + + if (args.mode == GemmUniversalMode::kGemm || args.mode == GemmUniversalMode::kGemmSplitKParallel) { + + int const kAlignK = + const_max(const_max(128 / sizeof_bits::value, 128 / sizeof_bits::value), 1); + + gemm_k_size = round_up(ceil_div(args.problem_size.k(), args.batch_count), kAlignK); + + if (gemm_k_size) { + grid_tiled_shape.k() = ceil_div(args.problem_size.k(), gemm_k_size); + } + } + + swizzle_log_tile = threadblock_swizzle.get_log_tile(grid_tiled_shape); + } + }; + + /// Shared memory storage structure + union SharedStorage { + + typename Mma::SharedStorage main_loop; + + struct { + typename Epilogue::SharedStorage epilogue; + typename EpilogueVisitor::SharedStorage visitor; + } epilogue; + }; + +public: + // + // Methods + // + + CUTLASS_DEVICE + GemmWithEpilogueVisitor() {} + + /// Determines whether kernel satisfies alignment + static Status can_implement(cutlass::gemm::GemmCoord const& problem_size) + { + + CUTLASS_TRACE_HOST("GemmWithEpilogueVisitor::can_implement()"); + + static int const kAlignmentA = Mma::IteratorA::AccessType::kElements; + static int const kAlignmentB = Mma::IteratorB::AccessType::kElements; + static int const kAlignmentC = EpilogueVisitor::OutputTileIterator::kElementsPerAccess; + + bool isAMisaligned = false; + bool isBMisaligned = false; + bool isCMisaligned = false; + + if (platform::is_same::value) { + isAMisaligned = problem_size.k() % kAlignmentA; + } + else if (platform::is_same::value) { + isAMisaligned = problem_size.m() % kAlignmentA; + } + else if (platform::is_same>::value + || platform::is_same>::value) { + isAMisaligned = problem_size.k() % kAlignmentA; + } + + if (platform::is_same::value) { + isBMisaligned = problem_size.n() % kAlignmentB; + } + else if (platform::is_same::value) { + isBMisaligned = problem_size.k() % kAlignmentB; + } + else if (platform::is_same>::value + || platform::is_same>::value) { + isBMisaligned = problem_size.k() % kAlignmentB; + } + + if (platform::is_same::value) { + isCMisaligned = problem_size.n() % kAlignmentC; + } + else if (platform::is_same::value) { + isCMisaligned = problem_size.m() % kAlignmentC; + } + else if (platform::is_same>::value + || platform::is_same>::value) { + isCMisaligned = problem_size.n() % kAlignmentC; + } + + if (isAMisaligned) { + CUTLASS_TRACE_HOST(" returning kErrorMisalignedOperand for A operand"); + return Status::kErrorMisalignedOperand; + } + + if (isBMisaligned) { + CUTLASS_TRACE_HOST(" returning kErrorMisalignedOperand for B operand"); + return Status::kErrorMisalignedOperand; + } + + if (isCMisaligned) { + CUTLASS_TRACE_HOST(" returning kErrorMisalignedOperand for C operand"); + return Status::kErrorMisalignedOperand; + } + + CUTLASS_TRACE_HOST(" returning kSuccess"); + + return Status::kSuccess; + } + + static Status can_implement(Arguments const& args) + { + return can_implement(args.problem_size); + } + + static size_t get_extra_workspace_size(Arguments const& args, cutlass::gemm::GemmCoord const& grid_tiled_shape) + { + + return 0; + } + +#define SPLIT_K_ENABLED 1 + + /// Executes one GEMM + CUTLASS_DEVICE + void operator()(Params const& params, SharedStorage& shared_storage) + { + + // Compute threadblock location + ThreadblockSwizzle threadblock_swizzle; + + cutlass::gemm::GemmCoord threadblock_tile_offset = threadblock_swizzle.get_tile_offset(params.swizzle_log_tile); + + // Early exit if CTA is out of range + if (params.grid_tiled_shape.m() <= threadblock_tile_offset.m() + || params.grid_tiled_shape.n() <= threadblock_tile_offset.n()) { + + return; + } + + int offset_k = 0; + int problem_size_k = params.problem_size.k(); + + ElementA* ptr_A = static_cast(params.ptr_A); + ElementB* ptr_B = static_cast(params.ptr_B); + +#if SPLIT_K_ENABLED + // + // Fetch pointers based on mode. + // + if (params.mode == GemmUniversalMode::kGemm || params.mode == GemmUniversalMode::kGemmSplitKParallel) { + + if (threadblock_tile_offset.k() + 1 < params.grid_tiled_shape.k()) { + + problem_size_k = (threadblock_tile_offset.k() + 1) * params.gemm_k_size; + } + + offset_k = threadblock_tile_offset.k() * params.gemm_k_size; + } + else if (params.mode == GemmUniversalMode::kBatched) { + ptr_A += threadblock_tile_offset.k() * params.batch_stride_A; + ptr_B += threadblock_tile_offset.k() * params.batch_stride_B; + } + else if (params.mode == GemmUniversalMode::kArray) { + ptr_A = static_cast(params.ptr_A)[threadblock_tile_offset.k()]; + ptr_B = static_cast(params.ptr_B)[threadblock_tile_offset.k()]; + } +#endif + + // Compute initial location in logical coordinates + cutlass::MatrixCoord tb_offset_A{ + threadblock_tile_offset.m() * Mma::Shape::kM, + offset_k, + }; + + cutlass::MatrixCoord tb_offset_B{offset_k, threadblock_tile_offset.n() * Mma::Shape::kN}; + + // Compute position within threadblock + int thread_idx = threadIdx.x; + + // Construct iterators to A and B operands + typename Mma::IteratorA iterator_A( + params.params_A, ptr_A, {params.problem_size.m(), problem_size_k}, thread_idx, tb_offset_A); + + typename Mma::IteratorB iterator_B( + params.params_B, ptr_B, {problem_size_k, params.problem_size.n()}, thread_idx, tb_offset_B); + + // Broadcast the warp_id computed by lane 0 to ensure dependent code + // is compiled as warp-uniform. + int warp_idx = __shfl_sync(0xffffffff, threadIdx.x / 32, 0); + + int lane_idx = threadIdx.x % 32; + + // + // Main loop + // + + // Construct thread-scoped matrix multiply + Mma mma(shared_storage.main_loop, thread_idx, warp_idx, lane_idx); + + typename Mma::FragmentC accumulators; + + accumulators.clear(); + + // Compute threadblock-scoped matrix multiply-add + int gemm_k_iterations = (problem_size_k - offset_k + Mma::Shape::kK - 1) / Mma::Shape::kK; + + // Compute threadblock-scoped matrix multiply-add + mma(gemm_k_iterations, accumulators, iterator_A, iterator_B, accumulators); + + // + // Masked tile iterators constructed from members + // + + threadblock_tile_offset = threadblock_swizzle.get_tile_offset(params.swizzle_log_tile); + + // assume identity swizzle + MatrixCoord threadblock_offset(threadblock_tile_offset.m() * Mma::Shape::kM, + threadblock_tile_offset.n() * Mma::Shape::kN); + + int block_idx = threadblock_tile_offset.m() + threadblock_tile_offset.n() * params.grid_tiled_shape.m(); + + // + // Construct the epilogue visitor + // + + EpilogueVisitor epilogue_visitor(params.epilogue_visitor, + shared_storage.epilogue.visitor, + params.problem_size.mn(), + thread_idx, + warp_idx, + lane_idx, + params.params_alpha_col, + params.params_C, + params.params_D, + params.quant_mode, + params.ptr_alpha_row, + params.ptr_alpha_col, + params.ptr_C, + params.ptr_D, + threadblock_offset, + blockIdx.y * params.problem_size.m()); + + if (params.mode == GemmUniversalMode::kGemm) { + // Indicate which position in a serial reduction the output operator is currently updating + epilogue_visitor.set_k_partition(threadblock_tile_offset.k(), params.grid_tiled_shape.k()); + } + else if (params.mode == GemmUniversalMode::kBatched || params.mode == GemmUniversalMode::kArray) { + epilogue_visitor.set_batch_index(threadblock_tile_offset.k()); + } + + // Construct the epilogue + Epilogue epilogue(shared_storage.epilogue.epilogue, thread_idx, warp_idx, lane_idx); + + // Execute the epilogue operator to update the destination tensor. + epilogue(epilogue_visitor, accumulators); + } +}; + +///////////////////////////////////////////////////////////////////////////////////////////////// + +} // namespace kernel +} // namespace gemm +} // namespace cutlass + +///////////////////////////////////////////////////////////////////////////////////////////////// diff --git a/src/fastertransformer/kernels/CMakeLists.txt b/src/fastertransformer/kernels/CMakeLists.txt index 94283a38e..fd2a1b494 100644 --- a/src/fastertransformer/kernels/CMakeLists.txt +++ b/src/fastertransformer/kernels/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -36,6 +36,17 @@ add_library(layernorm_int8_kernels STATIC layernorm_int8_kernels.cu) set_property(TARGET layernorm_int8_kernels PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET layernorm_int8_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +if(ENABLE_FP8) +add_library(layernorm_fp8_kernels STATIC layernorm_fp8_kernels.cu) +set_property(TARGET layernorm_fp8_kernels PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET layernorm_fp8_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +endif() + +if(ENABLE_FP8) +add_executable(layernorm_fp8_kernels_test layernorm_fp8_kernels_test.cc) +target_link_libraries(layernorm_fp8_kernels_test PUBLIC layernorm_fp8_kernels layernorm_kernels memory_utils) +endif() + add_library(ban_bad_words STATIC ban_bad_words.cu) set_property(TARGET ban_bad_words PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET ban_bad_words PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) @@ -52,6 +63,12 @@ add_library(activation_int8_kernels STATIC activation_int8_kernels.cu) set_property(TARGET activation_int8_kernels PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET activation_int8_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +if(ENABLE_FP8) +add_library(activation_fp8_kernels STATIC activation_fp8_kernels.cu) +set_property(TARGET activation_fp8_kernels PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET activation_fp8_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +endif() + add_library(layout_transformer_int8_kernels STATIC layout_transformer_int8_kernels.cu) set_property(TARGET layout_transformer_int8_kernels PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET layout_transformer_int8_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) @@ -101,6 +118,11 @@ add_library(matrix_transpose_kernels STATIC matrix_transpose_kernels.cu) set_property(TARGET matrix_transpose_kernels PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET matrix_transpose_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +if(ENABLE_FP8) +add_executable(matrix_transpose_fp8_kernels_test matrix_transpose_fp8_kernels_test.cc) +target_link_libraries(matrix_transpose_fp8_kernels_test PUBLIC matrix_transpose_kernels memory_utils) +endif() + add_library(unfused_attention_int8_kernels STATIC unfused_attention_int8_kernels.cu) set_property(TARGET unfused_attention_int8_kernels PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET unfused_attention_int8_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) @@ -109,6 +131,21 @@ add_library(unfused_attention_kernels STATIC unfused_attention_kernels.cu) set_property(TARGET unfused_attention_kernels PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET unfused_attention_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +if(ENABLE_FP8) +add_library(unfused_attention_fp8_kernels STATIC unfused_attention_fp8_kernels.cu) +set_property(TARGET unfused_attention_fp8_kernels PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET unfused_attention_fp8_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +endif() + +add_library(disentangled_attention_kernels STATIC disentangled_attention_kernels.cu) +set_property(TARGET disentangled_attention_kernels PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET disentangled_attention_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) + +if(ENABLE_FP8) +add_executable(unfused_attention_fp8_kernels_test unfused_attention_fp8_kernels_test.cc) +target_link_libraries(unfused_attention_fp8_kernels_test PUBLIC unfused_attention_fp8_kernels unfused_attention_kernels memory_utils) +endif() + add_library(bert_preprocess_kernels STATIC bert_preprocess_kernels.cu) set_property(TARGET bert_preprocess_kernels PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET bert_preprocess_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) @@ -130,6 +167,11 @@ add_library(decoder_masked_multihead_attention STATIC ${decoder_masked_multihead set_property(TARGET decoder_masked_multihead_attention PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET decoder_masked_multihead_attention PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +if(ENABLE_FP8) +add_executable(decoder_masked_multihead_attention_fp8_test decoder_masked_multihead_attention_fp8_test.cc) +target_link_libraries(decoder_masked_multihead_attention_fp8_test PUBLIC decoder_masked_multihead_attention memory_utils) +endif() + add_library(add_residual_kernels STATIC add_residual_kernels.cu) set_property(TARGET add_residual_kernels PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET add_residual_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) @@ -157,6 +199,7 @@ set_property(TARGET gpt_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) add_library(beam_search_penalty_kernels STATIC beam_search_penalty_kernels.cu) set_property(TARGET beam_search_penalty_kernels PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET beam_search_penalty_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(beam_search_penalty_kernels PRIVATE cuda_utils) add_library(beam_search_topk_kernels STATIC beam_search_topk_kernels.cu) set_property(TARGET beam_search_topk_kernels PROPERTY POSITION_INDEPENDENT_CODE ON) diff --git a/src/fastertransformer/kernels/activation_fp8_kernels.cu b/src/fastertransformer/kernels/activation_fp8_kernels.cu new file mode 100644 index 000000000..9128e5a8b --- /dev/null +++ b/src/fastertransformer/kernels/activation_fp8_kernels.cu @@ -0,0 +1,272 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/kernels/activation_fp8_kernels.h" +#include "src/fastertransformer/kernels/decoder_masked_multihead_attention_utils.h" +#include "src/fastertransformer/utils/cuda_bf16_fallbacks.cuh" +#include "src/fastertransformer/utils/cuda_utils.h" + +namespace fastertransformer { + +__forceinline__ __device__ float copysignf_pos(float a, float b) +{ + float r; + r = __int_as_float(__float_as_int(a) | (__float_as_int(b) & 0x80000000)); + return r; +} + +__inline__ __device__ float tanh_opt(float x) +{ + return tanh(x); +#if (__CUDA_ARCH__ >= 750) + float r; + asm("tanh.approx.f32 %0,%1; \n\t" : "=f"(r) : "f"(x)); + return r; +#else + const float exp_val = -1.f * fabs(2 * x); + return copysignf_pos((1.0f - __expf(exp_val)) / (__expf(exp_val) + 1.0f), x); +#endif +} + +template +__inline__ __device__ T gelu(T x) +{ + float f_x = (float)(x); + float cdf = 0.5f * (1.0f + tanh_opt((0.7978845608028654f * (f_x + 0.044715f * f_x * f_x * f_x)))); + return (T)(f_x * cdf); +} + +template<> +__inline__ __device__ __nv_bfloat162 gelu(__nv_bfloat162 val) +{ + __nv_bfloat162 val_pow3 = __hmul2(val, __hmul2(val, val)); + float2 tmp_pow = cuda_cast(val_pow3); + float2 tmp = cuda_cast(val); + + tmp.x = 0.5f * (1.0f + tanh_opt((0.7978845608028654f * (tmp.x + 0.044715f * tmp_pow.x)))); + tmp.y = 0.5f * (1.0f + tanh_opt((0.7978845608028654f * (tmp.y + 0.044715f * tmp_pow.y)))); + return __hmul2(val, __float22bfloat162_rn(tmp)); +} + +template +__global__ void FP8AddBiasGelu(FP8ActivationParam param) +{ + for (int id = blockIdx.x * blockDim.x + threadIdx.x; id < param.m * param.n; id += blockDim.x * gridDim.x) { + T2 val = (T2)((float)(param.out[id]) * __ldg(param.input_scale)); + // TODO(bhsueh) check do we need it + // if (param.input_scale_2 != nullptr) { + // val = (float)val * __ldg(param.input_scale_2 + (id % param.n)) / __ldg(param.input_scale_2_min); + // } + if (param.bias != nullptr) { + T2 reg_bias = __ldg(¶m.bias[id % param.n]); + val = val + reg_bias; + } + param.out[id] = (T1)((float)gelu(val) * __ldg(param.output_scale)); + } +} + +// template<> +// __global__ void FP8AddBiasGelu(FP8ActivationParam<__nv_fp8_e4m3, __nv_bfloat16> param) +// { +// float input_scale = __ldg(param.input_scale); +// float output_scale = __ldg(param.output_scale); +// __nv_fp8x4_e4m3* out_ptr = (__nv_fp8x4_e4m3*)param.out; +// __nv_bfloat162* bias_ptr = (__nv_bfloat162*)param.bias; + +// __nv_bfloat162 input_scale_2 = __floats2bfloat162_rn(input_scale, input_scale); +// __nv_bfloat162 output_scale_2 = __floats2bfloat162_rn(output_scale, output_scale); + +// for (int id = blockIdx.x * blockDim.x + threadIdx.x; id < param.m * (param.n / 4); id += blockDim.x * gridDim.x) +// { +// __nv_bfloat162 val_1; +// __nv_bfloat162 val_2; + +// fp8x4_e4m3_to_bfloat2(&val_1, &val_2, &out_ptr[id]); + +// __nv_bfloat162 bias_val_1 = bias_ptr[(id * 2) % (param.n / 2)]; +// __nv_bfloat162 bias_val_2 = bias_ptr[(id * 2 + 1) % (param.n / 2)]; + +// val_1 = hmul2(val_1, input_scale_2); +// val_2 = hmul2(val_2, input_scale_2); +// val_1 = gelu(hadd2(val_1, bias_val_1)); +// val_2 = gelu(hadd2(val_2, bias_val_2)); +// val_1 = hmul2(val_1, output_scale_2); +// val_2 = hmul2(val_2, output_scale_2); + +// out_ptr[id] = __nv_fp8x4_e4m3(val_1, val_2); +// } +// } + +// NOTE: input is bfloat (pack8 to have 128 bit input, and 64 bit output) +template<> +__global__ void FP8AddBiasGelu(FP8ActivationParam<__nv_fp8_e4m3, __nv_bfloat16> param) +{ + float input_scale = __ldg(param.input_scale); + float output_scale = __ldg(param.output_scale); + constexpr int Packed_Elements = 8; + using packed_out = __nv_fp8_8_e4m3; + using packed_bias = __nv_bfloat168; + using packed_in = __nv_bfloat168; + packed_out* out_ptr = (packed_out*)param.out; + packed_in* in_ptr = (packed_in*)param.in; + packed_bias* bias_ptr = (packed_bias*)param.bias; + + for (int id = blockIdx.x * blockDim.x + threadIdx.x; id < param.m * (param.n / Packed_Elements); + id += blockDim.x * gridDim.x) { + packed_in val = in_ptr[id]; + packed_bias bias = bias_ptr[id % (param.n / Packed_Elements)]; + packed_out val_output; +#pragma unroll + for (int i = 0; i < Packed_Elements; i++) { + val_output.array[i] = __nv_fp8_e4m3(gelu((float)val.array[i] + (float)bias.array[i]) * output_scale); + } + // f_val.x = gelu(f_val.x + f_bias.x) * output_scale; + // f_val.y = gelu(f_val.y + f_bias.x) * output_scale; + // val = hmul2(gelu(hadd2(val, bias)), output_scale_2); + // val = hmul2(gelu(hadd2(val, bias)), output_scale_2); + + out_ptr[id] = val_output; + } +} + +template +void invokeFP8AddBiasGelu(FP8ActivationParam param) +{ + FT_CHECK(param.n % 8 == 0); + // NOTE: input data type is bfloat now + const int data_type_factor = 8; // pack 8 elements for bfloat16 input + const int total_packs = (param.n * param.m) / data_type_factor; + dim3 block(256); + int num_packs_per_thread = 1; + while ((total_packs + (block.x * num_packs_per_thread) - 1) / (block.x * num_packs_per_thread) > 512) { + num_packs_per_thread *= 2; + } + dim3 grid((total_packs + (block.x * num_packs_per_thread) - 1) / (block.x * num_packs_per_thread)); + FP8AddBiasGelu<<>>(param); +} + +template void +invokeFP8AddBiasGelu<__nv_fp8_e4m3, __nv_bfloat16>(FP8ActivationParam<__nv_fp8_e4m3, __nv_bfloat16> param); + +template +__global__ void FP8AddBiasRelu(FP8ActivationParam param) +{ + for (int id = blockIdx.x * blockDim.x + threadIdx.x; id < param.m * param.n; id += blockDim.x * gridDim.x) { + T2 val = (T2)((float)(param.out[id]) * __ldg(param.input_scale)); + // TODO(bhsueh) check do we need it + // if (param.input_scale_2 != nullptr) { + // val = (float)val * __ldg(param.input_scale_2 + (id % param.n)) / __ldg(param.input_scale_2_min); + // } + if (param.bias != nullptr) { + T2 reg_bias = __ldg(¶m.bias[id % param.n]); + val = val + reg_bias; + } + val = (T2)(((float)val) * __ldg(param.output_scale)); + param.out[id] = (T1)((val > (T2)0.0f) ? val : (T2)0.0f); + } +} + +// template<> +// __global__ void FP8AddBiasRelu(FP8ActivationParam<__nv_fp8_e4m3, __nv_bfloat16> param) +// { +// float input_scale = __ldg(param.input_scale); +// float output_scale = __ldg(param.output_scale); +// __nv_fp8x4_e4m3* out_ptr = (__nv_fp8x4_e4m3*)param.out; +// __nv_bfloat162* bias_ptr = (__nv_bfloat162*)param.bias; + +// __nv_bfloat162 input_scale_2 = __floats2bfloat162_rn(input_scale, input_scale); +// __nv_bfloat162 output_scale_2 = __floats2bfloat162_rn(output_scale, output_scale); + +// for (int id = blockIdx.x * blockDim.x + threadIdx.x; id < param.m * (param.n / 4); id += blockDim.x * gridDim.x) +// { +// __nv_bfloat162 val_1; +// __nv_bfloat162 val_2; + +// fp8x4_e4m3_to_bfloat2(&val_1, &val_2, &out_ptr[id]); + +// __nv_bfloat162 bias_val_1 = bias_ptr[(id * 2) % (param.n / 2)]; +// __nv_bfloat162 bias_val_2 = bias_ptr[(id * 2 + 1) % (param.n / 2)]; + +// val_1 = hmul2(val_1, input_scale_2); +// val_2 = hmul2(val_2, input_scale_2); +// val_1 = hadd2(val_1, bias_val_1); +// val_2 = hadd2(val_2, bias_val_2); +// val_1.x = val_1.x > (__nv_bfloat16)0.0f ? val_1.x : (__nv_bfloat16)0.0f; +// val_1.y = val_1.y > (__nv_bfloat16)0.0f ? val_1.y : (__nv_bfloat16)0.0f; +// val_2.x = val_2.x > (__nv_bfloat16)0.0f ? val_2.x : (__nv_bfloat16)0.0f; +// val_2.y = val_2.y > (__nv_bfloat16)0.0f ? val_2.y : (__nv_bfloat16)0.0f; +// val_1 = hmul2(val_1, output_scale_2); +// val_2 = hmul2(val_2, output_scale_2); + +// out_ptr[id] = __nv_fp8x4_e4m3(val_1, val_2); +// } +// } + +// NOTE: input is bfloat +template<> +__global__ void FP8AddBiasRelu(FP8ActivationParam<__nv_fp8_e4m3, __nv_bfloat16> param) +{ + float input_scale = __ldg(param.input_scale); + float output_scale = __ldg(param.output_scale); + __nv_fp8x2_e4m3* out_ptr = (__nv_fp8x2_e4m3*)param.out; + __nv_bfloat162* in_ptr = (__nv_bfloat162*)param.in; + __nv_bfloat162* bias_ptr = (__nv_bfloat162*)param.bias; + + __nv_bfloat162 input_scale_2 = __floats2bfloat162_rn(input_scale, input_scale); + __nv_bfloat162 output_scale_2 = __floats2bfloat162_rn(output_scale, output_scale); + + for (int id = blockIdx.x * blockDim.x + threadIdx.x; id < param.m * (param.n / 2); id += blockDim.x * gridDim.x) { + __nv_bfloat162 val = in_ptr[id]; + __nv_bfloat162 bias = bias_ptr[id % (param.n / 2)]; + val = hadd2(val, bias); + val.x = val.x > (__nv_bfloat16)0.0f ? val.x : (__nv_bfloat16)0.0f; + val.y = val.y > (__nv_bfloat16)0.0f ? val.y : (__nv_bfloat16)0.0f; + val = hmul2(val, output_scale_2); + + out_ptr[id] = __nv_fp8x2_e4m3(val); + } +} + +template +void invokeFP8AddBiasRelu(FP8ActivationParam param) +{ + FT_CHECK(param.n % 2 == 0); + // NOTE: input data type is bfloat now + const int data_type_factor = 2; // 1 for fp32, 2 for fp16/bf16, 4 for fp86 + dim3 block, grid; + if (param.n / 4 / data_type_factor <= 1024) { + block.x = param.n / 4 / data_type_factor; + grid.x = param.m; + } + else { + block.x = 1024; + grid.x = ceil(param.m * param.n / 1024.); + } + FP8AddBiasRelu<<>>(param); +} + +template void +invokeFP8AddBiasRelu<__nv_fp8_e4m3, __nv_bfloat16>(FP8ActivationParam<__nv_fp8_e4m3, __nv_bfloat16> param); + +// template +// void invokeFP8AddBias(FP8ActivationParam param) { +// // TODO FP8 +// } + +// template void +// invokeFP8AddBias<__nv_fp8_e4m3, half>(FP8ActivationParam<__nv_fp8_e4m3, half> param); + +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/activation_fp8_kernels.h b/src/fastertransformer/kernels/activation_fp8_kernels.h new file mode 100644 index 000000000..e759d7bc8 --- /dev/null +++ b/src/fastertransformer/kernels/activation_fp8_kernels.h @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/utils/cuda_fp8_utils.h" +#include +#include + +namespace fastertransformer { + +template +struct FP8ActivationParam { + T2* in; + T1* out; + T2 const* bias; + float const* const input_scale; + float const* const input_scale_2; + float const* const input_scale_2_min; + float const* const output_scale; + const uint32_t m; + const uint32_t n; + cudaStream_t stream; +}; + +template +void invokeFP8AddBiasGelu(FP8ActivationParam param); + +template +void invokeFP8AddBiasRelu(FP8ActivationParam param); + +// template +// void invokeFP8AddBias(FP8ActivationParam param); + +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/activation_int8_kernels.cu b/src/fastertransformer/kernels/activation_int8_kernels.cu index b8865eb8d..c6c2d8283 100644 --- a/src/fastertransformer/kernels/activation_int8_kernels.cu +++ b/src/fastertransformer/kernels/activation_int8_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/activation_int8_kernels.h b/src/fastertransformer/kernels/activation_int8_kernels.h index 6e7924136..a99a86c92 100644 --- a/src/fastertransformer/kernels/activation_int8_kernels.h +++ b/src/fastertransformer/kernels/activation_int8_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/activation_kernels.cu b/src/fastertransformer/kernels/activation_kernels.cu index d342da3fe..5288e7e4a 100644 --- a/src/fastertransformer/kernels/activation_kernels.cu +++ b/src/fastertransformer/kernels/activation_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -324,9 +324,79 @@ INSTANTIATE_GENERIC_ACTIVATION(IdentityActivation, float, half); INSTANTIATE_GENERIC_ACTIVATION(IdentityActivation, __nv_bfloat16, __nv_bfloat16); INSTANTIATE_GENERIC_ACTIVATION(IdentityActivation, float, __nv_bfloat16); #endif - #undef INSTANCIATE_GENERIC_ACTIVATION +template +__global__ void add_bias_tanh(T* out, const T* __restrict bias, int m, int n) +{ + for (int id = blockIdx.x * blockDim.x + threadIdx.x; id < m * n; id += blockDim.x * gridDim.x) { + T val = out[id]; + if (bias != nullptr) { + val = val + ldg(&bias[id % n]); + } + out[id] = tanhf(val); + } +} + +template<> +__global__ void add_bias_tanh(half* out, const half* __restrict bias, int m, int n) +{ + half2* out_ptr = (half2*)out; + const half2* bias_ptr = (half2*)bias; + + for (int id = blockIdx.x * blockDim.x + threadIdx.x; id < m * n; id += blockDim.x * gridDim.x) { + half2 val = out_ptr[id]; + if (bias != nullptr) { + val = val + __ldg(&bias_ptr[id % n]); + } + val.x = tanhf(val.x); + val.y = tanhf(val.y); + out_ptr[id] = val; + } +} + +#ifdef ENABLE_BF16 +template<> +__global__ void add_bias_tanh(__nv_bfloat16* out, const __nv_bfloat16* __restrict bias, int m, int n) +{ + __nv_bfloat162* out_ptr = (__nv_bfloat162*)out; + const __nv_bfloat162* bias_ptr = (__nv_bfloat162*)bias; + + for (int id = blockIdx.x * blockDim.x + threadIdx.x; id < m * n; id += blockDim.x * gridDim.x) { + __nv_bfloat162 val = out_ptr[id]; + if (bias != nullptr) { + val = bf16hadd2(val, ldg(&bias_ptr[id % n])); + } + val.x = tanhf(val.x); + val.y = tanhf(val.y); + out_ptr[id] = val; + } +} +#endif + +template +void invokeAddBiasTanh(T* out, const T* bias, const int m, const int n, cudaStream_t stream) +{ + const int data_type_factor = 4 / sizeof(T); // 1 for fp32, 2 for fp16 and bf16 + dim3 block, grid; + if (n / 4 / data_type_factor <= 1024) { + block.x = n / 4 / data_type_factor; + grid.x = m; + } + else { + block.x = 1024; + grid.x = ceil(m * n / 1024.); + } + add_bias_tanh<<>>(out, bias, m, n / data_type_factor); +} + +template void invokeAddBiasTanh(float* out, const float* bias, const int m, const int n, cudaStream_t stream); +template void invokeAddBiasTanh(half* out, const half* bias, const int m, const int n, cudaStream_t stream); +#ifdef ENABLE_BF16 +template void +invokeAddBiasTanh(__nv_bfloat16* out, const __nv_bfloat16* bias, const int m, const int n, cudaStream_t stream); +#endif + template __global__ void addBiasGeluV2(T2* out, const T2* __restrict bias, @@ -398,22 +468,12 @@ __global__ void addBiasGeluV3(T2* out, case HALF_N: \ if (ELEMENT_PER_ROUND > 1) { \ grid.x = grid.x / ELEMENT_PER_ROUND; \ - addBiasGeluV3<<>>((T2*)out, \ - (const T2*)bias, \ - ia3_tasks, \ - (T2*)ia3_weights, \ - m * half_n, \ - padding_offset, \ - seq_len); \ + addBiasGeluV3<<>>( \ + (T2*)out, (const T2*)bias, ia3_tasks, (T2*)ia3_weights, m * half_n, padding_offset, seq_len); \ } \ else { \ - addBiasGeluV2<<>>((T2*)out, \ - (const T2*)bias, \ - ia3_tasks, \ - (T2*)ia3_weights, \ - m * half_n, \ - padding_offset, \ - seq_len); \ + addBiasGeluV2<<>>( \ + (T2*)out, (const T2*)bias, ia3_tasks, (T2*)ia3_weights, m * half_n, padding_offset, seq_len); \ } \ break; @@ -586,7 +646,6 @@ void invokeSigmoid(T* data, const int size, const float scale, cudaStream_t stre } template void invokeSigmoid(float* data, const int size, const float scale, cudaStream_t stream); - template void invokeSigmoid(half* data, const int size, const float scale, cudaStream_t stream); } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/activation_kernels.h b/src/fastertransformer/kernels/activation_kernels.h index 81d757240..e4c561e48 100644 --- a/src/fastertransformer/kernels/activation_kernels.h +++ b/src/fastertransformer/kernels/activation_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -87,6 +87,13 @@ void invokeAddBiasGeluV2(T* out, const int n, cudaStream_t stream); +template +void invokeAddBias(T* out, T const* bias, const int m, const int n, cudaStream_t stream) +{ + invokeGenericActivation( + out, bias, nullptr, nullptr, nullptr, nullptr, m, n, 0, nullptr, nullptr, stream); +} + template void invokeAddBiasGeluV2( T* out, const T* bias, const int* ia3_tasks, const T* ia3_weights, const int m, const int n, cudaStream_t stream) @@ -94,6 +101,10 @@ void invokeAddBiasGeluV2( invokeAddBiasGeluV2(out, bias, ia3_tasks, ia3_weights, nullptr, 0, m, n, stream); } +template +void invokeAddBiasTanh(T* out, const T* bias, const int m, const int n, cudaStream_t stream); + template void invokeSigmoid(T* data, const int size, const float scale, cudaStream_t stream); + } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/add_bias_transpose_kernels.cu b/src/fastertransformer/kernels/add_bias_transpose_kernels.cu index 5ad6db2b7..c13c9ce6b 100644 --- a/src/fastertransformer/kernels/add_bias_transpose_kernels.cu +++ b/src/fastertransformer/kernels/add_bias_transpose_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/add_bias_transpose_kernels.h b/src/fastertransformer/kernels/add_bias_transpose_kernels.h index c0d39850e..7d214f8d8 100644 --- a/src/fastertransformer/kernels/add_bias_transpose_kernels.h +++ b/src/fastertransformer/kernels/add_bias_transpose_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/add_residual_kernels.cu b/src/fastertransformer/kernels/add_residual_kernels.cu index f4e649e57..b9608b816 100644 --- a/src/fastertransformer/kernels/add_residual_kernels.cu +++ b/src/fastertransformer/kernels/add_residual_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -61,14 +61,16 @@ void invokeAddBiasResidual(T* output, const float* scale_out, const int m, const int n, - const int int8_mode, cudaStream_t stream) { - int blocks_per_row = ceil(float(n) / 1024); - dim3 grid(m, blocks_per_row); - dim3 block(min(n, 1024)); + FT_CHECK_WITH_INFO(!((scale_inter == nullptr) ^ (scale_out == nullptr)), + "Cannot use `scale_inter` without `scale_out`"); + const bool should_scale_input = scale_inter != nullptr; + int blocks_per_row = ceil(float(n) / 1024); + dim3 grid(m, blocks_per_row); + dim3 block(min(n, 1024)); if (residual2 == nullptr) { - if (int8_mode == 2) { + if (should_scale_input) { addBiasResidual<<>>(output, reinterpret_cast(input), residual1, @@ -85,7 +87,7 @@ void invokeAddBiasResidual(T* output, } } else { - if (int8_mode == 2) { + if (should_scale_input) { addBiasResidual<<>>(output, reinterpret_cast(input), residual1, @@ -107,7 +109,7 @@ template void invokeAddBiasResidual( T* output, const T* residual1, const T* residual2, const T* bias, const int m, const int n, cudaStream_t stream) { - invokeAddBiasResidual(output, output, residual1, residual2, bias, nullptr, nullptr, m, n, 0, stream); + invokeAddBiasResidual(output, output, residual1, residual2, bias, nullptr, nullptr, m, n, stream); } template @@ -183,7 +185,6 @@ void invokeAddBiasAttentionFfnResidual(T* block_output, const float* scale_out, \ const int m, \ const int n, \ - const int int8_mode, \ cudaStream_t stream) INSTANTIATE_INVOKE_ADD_BIAS_RESIDUAL(float); INSTANTIATE_INVOKE_ADD_BIAS_RESIDUAL(half); diff --git a/src/fastertransformer/kernels/add_residual_kernels.h b/src/fastertransformer/kernels/add_residual_kernels.h index 3e4606f7f..34951d852 100644 --- a/src/fastertransformer/kernels/add_residual_kernels.h +++ b/src/fastertransformer/kernels/add_residual_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -34,7 +34,6 @@ void invokeAddBiasResidual(T* output, const float* scale_out, const int m, const int n, - const int int8_mode, cudaStream_t stream); template diff --git a/src/fastertransformer/kernels/ban_bad_words.cu b/src/fastertransformer/kernels/ban_bad_words.cu index 426111080..e5fb77f00 100644 --- a/src/fastertransformer/kernels/ban_bad_words.cu +++ b/src/fastertransformer/kernels/ban_bad_words.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/ban_bad_words.h b/src/fastertransformer/kernels/ban_bad_words.h index c3159b8ce..6c6b31ac4 100644 --- a/src/fastertransformer/kernels/ban_bad_words.h +++ b/src/fastertransformer/kernels/ban_bad_words.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/beam_search_penalty_kernels.cu b/src/fastertransformer/kernels/beam_search_penalty_kernels.cu index 2e29178f9..64c746ef0 100644 --- a/src/fastertransformer/kernels/beam_search_penalty_kernels.cu +++ b/src/fastertransformer/kernels/beam_search_penalty_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -85,7 +85,7 @@ __global__ void add_bias_temperature(half2* logits, } } -template +template __global__ void apply_repetition_penalty(T* logits, const int batch_size, const int beam_width, @@ -117,7 +117,13 @@ __global__ void apply_repetition_penalty(T* logits, int prev_id = current_ids[bbid]; T prev_logit = logits[prev_id]; penalty_indices[step - 1] = prev_id; - penalty_logits[step - 1] = prev_logit > T(0) ? prev_logit / repet_penalty : prev_logit * repet_penalty; + + if (IS_ADDITIVE) { + penalty_logits[step - 1] = prev_logit - repet_penalty; + } + else { + penalty_logits[step - 1] = prev_logit > T(0) ? prev_logit / repet_penalty : prev_logit * repet_penalty; + } if (step > 1) { int parent_beam = bbid % beam_width; for (int i = step - 2; i >= 0; --i) { @@ -129,7 +135,12 @@ __global__ void apply_repetition_penalty(T* logits, prev_id = previous_ids[i * bbsize + batch_id * beam_width + parent_beam]; prev_logit = logits[prev_id]; penalty_indices[i] = prev_id; - penalty_logits[i] = prev_logit > T(0) ? prev_logit / repet_penalty : prev_logit * repet_penalty; + if (IS_ADDITIVE) { + penalty_logits[i] = prev_logit - repet_penalty; + } + else { + penalty_logits[i] = prev_logit > T(0) ? prev_logit / repet_penalty : prev_logit * repet_penalty; + } } } } @@ -143,26 +154,48 @@ __global__ void apply_repetition_penalty(T* logits, } template -void invokeAddBiasApplyPenalties(int step, - T* logits, - const int* current_ids, - const int* previous_ids, - const int* parent_ids, - const int* input_lengths, - const T* bias, - const int ite, - const int max_input_length, - const int local_batch_size, - const int batch_size, - const int beam_width, - const int vocab_size, - const int vocab_size_padded, - const int* end_ids, - const float temperature, - const float repetition_penalty, - cudaStream_t stream) +__global__ void apply_min_length_penalty(T* logits, + const int min_length, + const int* end_ids, + const int* sequence_lengths, + const int max_input_length, + const int beam_width, + const int vocab_size_padded) { - if (bias != nullptr || temperature != 1.0f) { + int bbid = threadIdx.x + blockIdx.x * blockDim.x; // batch-beam index + int bid = bbid / beam_width; // batch index + // We need +1 because sequence_lengths = max_input_length + num_gen_tokens - 1, + // which is equal to the length of k/v caches. + if (sequence_lengths[bbid] + 1 - max_input_length < min_length) { + T mask_val = (std::is_same::value) ? -HALF_FLT_MAX : -FLT_MAX; + logits[bbid * vocab_size_padded + end_ids[bid]] = mask_val; + } +} + +template +void invokeAddBiasApplyPenalties(int step, + T* logits, + const int* current_ids, + const int* previous_ids, + const int* parent_ids, + const int* input_lengths, + const int* sequence_lengths, + const T* bias, + const int ite, + const int max_input_length, + const int local_batch_size, + const int batch_size, + const int beam_width, + const int vocab_size, + const int vocab_size_padded, + const int* end_ids, + const float temperature, + const float repetition_penalty, + const RepetitionPenaltyType repetition_penalty_type, + const int min_length, + cudaStream_t stream) +{ + if (bias != nullptr || temperature != 1.0f || vocab_size != vocab_size_padded) { dim3 block(512); if (std::is_same::value && vocab_size % 2 == 0 && vocab_size_padded % 2 == 0) { dim3 grid((vocab_size_padded / 2 + block.x - 1) / block.x, beam_width * local_batch_size); @@ -181,65 +214,100 @@ void invokeAddBiasApplyPenalties(int step, } } - if (repetition_penalty != 1.0f) { - size_t smem_size = (sizeof(T) * step + 31 / 32 * 32) + sizeof(int) * step; - dim3 block(256); - dim3 grid(beam_width * local_batch_size); - apply_repetition_penalty<<>>( - logits, - batch_size, - beam_width, - vocab_size, - vocab_size_padded, - step, - current_ids, - previous_ids, - // TODO(jaedeokk): - // Remove (+ite ...) by getting parent_ids with offset - // and then remove 'ite' argument from the function. - parent_ids + ite * beam_width * local_batch_size, - input_lengths, - max_input_length, - repetition_penalty); + if (repetition_penalty_type != RepetitionPenaltyType::None && step > 0) { + if (repetition_penalty != getDefaultPenaltyValue(repetition_penalty_type)) { + size_t smem_size = (sizeof(T) * step + 31) / 32 * 32 + sizeof(int) * step; + dim3 block(256); + dim3 grid(beam_width * local_batch_size); + if (repetition_penalty_type == RepetitionPenaltyType::Multiplicative) { + apply_repetition_penalty + <<>>(logits, + batch_size, + beam_width, + vocab_size, + vocab_size_padded, + step, + current_ids, + previous_ids, + // TODO(jaedeokk): + // Remove (+ite ...) by getting parent_ids with offset + // and then remove 'ite' argument from the function. + parent_ids + ite * beam_width * local_batch_size, + input_lengths, + max_input_length, + repetition_penalty); + } + else if (repetition_penalty_type == RepetitionPenaltyType::Additive) { + apply_repetition_penalty + <<>>(logits, + batch_size, + beam_width, + vocab_size, + vocab_size_padded, + step, + current_ids, + previous_ids, + parent_ids + ite * beam_width * local_batch_size, + input_lengths, + max_input_length, + repetition_penalty); + } + } + } + + if (step - max_input_length < min_length) { + FT_CHECK_WITH_INFO(sequence_lengths != nullptr, "Need sequence_lengths to apply min length penlaty"); + FT_CHECK_WITH_INFO(end_ids != nullptr, "Need end_id to apply min length penlaty"); + + const int block_size = min(local_batch_size * beam_width, 1024); + const int grid_size = (local_batch_size * beam_width + block_size - 1) / block_size; + apply_min_length_penalty<<>>( + logits, min_length, end_ids, sequence_lengths, max_input_length, beam_width, vocab_size_padded); } } -template void invokeAddBiasApplyPenalties(int step, - float* logits, - const int* current_ids, - const int* previous_ids, - const int* parent_ids, - const int* input_lengths, - const float* bias, - const int ite, - const int max_input_length, - const int local_batch_size, - const int batch_size, - const int beam_width, - const int vocab_size, - const int vocab_size_padded, - const int* end_ids, - const float temperature, - const float repetition_penalty, - cudaStream_t stream); - -template void invokeAddBiasApplyPenalties(int step, - half* logits, - const int* current_ids, - const int* previous_ids, - const int* parent_ids, - const int* input_lengths, - const half* bias, - const int ite, - const int max_input_length, - const int local_batch_size, - const int batch_size, - const int beam_width, - const int vocab_size, - const int vocab_size_padded, - const int* end_ids, - const float temperature, - const float repetition_penalty, - cudaStream_t stream); +template void invokeAddBiasApplyPenalties(int step, + float* logits, + const int* current_ids, + const int* previous_ids, + const int* parent_ids, + const int* input_lengths, + const int* sequence_lengths, + const float* bias, + const int ite, + const int max_input_length, + const int local_batch_size, + const int batch_size, + const int beam_width, + const int vocab_size, + const int vocab_size_padded, + const int* end_ids, + const float temperature, + const float repetition_penalty, + const RepetitionPenaltyType repetition_penalty_type, + const int min_length, + cudaStream_t stream); + +template void invokeAddBiasApplyPenalties(int step, + half* logits, + const int* current_ids, + const int* previous_ids, + const int* parent_ids, + const int* input_lengths, + const int* sequence_lengths, + const half* bias, + const int ite, + const int max_input_length, + const int local_batch_size, + const int batch_size, + const int beam_width, + const int vocab_size, + const int vocab_size_padded, + const int* end_ids, + const float temperature, + const float repetition_penalty, + const RepetitionPenaltyType repetition_penalty_type, + const int min_length, + cudaStream_t stream); } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/beam_search_penalty_kernels.h b/src/fastertransformer/kernels/beam_search_penalty_kernels.h index a973aa0c8..ae67f9654 100644 --- a/src/fastertransformer/kernels/beam_search_penalty_kernels.h +++ b/src/fastertransformer/kernels/beam_search_penalty_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -17,28 +17,32 @@ #include +#include "src/fastertransformer/kernels/penalty_types.h" #include "src/fastertransformer/utils/cuda_utils.h" namespace fastertransformer { template -void invokeAddBiasApplyPenalties(int step, - T* logits, - const int* current_ids, - const int* previous_ids, - const int* parent_ids, - const int* input_lengths, - const T* bias, - const int ite, - const int max_input_length, - const int local_batch_size, - const int batch_size, - const int beam_width, - const int vocab_size, - const int vocab_size_padded, - const int* end_ids, - const float temperature, - const float repetition_penalty, - cudaStream_t stream); +void invokeAddBiasApplyPenalties(int step, + T* logits, + const int* current_ids, + const int* previous_ids, + const int* parent_ids, + const int* input_lengths, + const int* sequence_lengths, + const T* bias, + const int ite, + const int max_input_length, + const int local_batch_size, + const int batch_size, + const int beam_width, + const int vocab_size, + const int vocab_size_padded, + const int* end_ids, + const float temperature, + const float repetition_penalty, + const RepetitionPenaltyType repetition_penalty_type, + const int min_length, + cudaStream_t stream); } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/beam_search_topk_kernels.cu b/src/fastertransformer/kernels/beam_search_topk_kernels.cu index ae07f5b6d..fe4bcbeb4 100644 --- a/src/fastertransformer/kernels/beam_search_topk_kernels.cu +++ b/src/fastertransformer/kernels/beam_search_topk_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/beam_search_topk_kernels.h b/src/fastertransformer/kernels/beam_search_topk_kernels.h index 209d77cd1..60732a594 100644 --- a/src/fastertransformer/kernels/beam_search_topk_kernels.h +++ b/src/fastertransformer/kernels/beam_search_topk_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/bert_preprocess_kernels.cu b/src/fastertransformer/kernels/bert_preprocess_kernels.cu index af6555515..a57161c85 100644 --- a/src/fastertransformer/kernels/bert_preprocess_kernels.cu +++ b/src/fastertransformer/kernels/bert_preprocess_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -15,10 +15,13 @@ */ #include "bert_preprocess_kernels.h" +#include "src/fastertransformer/utils/cuda_bf16_fallbacks.cuh" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" +#include "src/fastertransformer/utils/cuda_type_utils.cuh" namespace fastertransformer { -__global__ void getPaddingOffsetAndCuSeqLensKernel(size_t* valid_word_num, +__global__ void getPaddingOffsetAndCuSeqLensKernel(size_t* h_valid_word_num, int* tmp_mask_offset, int* cu_seqlens, const int* sequence_length, @@ -45,11 +48,11 @@ __global__ void getPaddingOffsetAndCuSeqLensKernel(size_t* valid_word_num, if (calculate_cu_seqlens) { cu_seqlens[batch_size] = total_seq_len; } - valid_word_num[0] = (size_t)total_seq_len; + h_valid_word_num[0] = (size_t)total_seq_len; } -void invokeGetPaddingOffsetAndCuSeqLens(size_t* h_token_num, - size_t* d_token_num, +void invokeGetPaddingOffsetAndCuSeqLens(size_t* h_pinned_token_num, + size_t* h_token_num, int* tmp_mask_offset, int* cu_seqlens, const int* sequence_lengths, @@ -57,10 +60,11 @@ void invokeGetPaddingOffsetAndCuSeqLens(size_t* h_token_num, const int max_seq_len, cudaStream_t stream) { + h_pinned_token_num[0] = 0; getPaddingOffsetAndCuSeqLensKernel<<<1, 1, 0, stream>>>( - d_token_num, tmp_mask_offset, cu_seqlens, sequence_lengths, batch_size, max_seq_len); - sync_check_cuda_error(); - check_cuda_error(cudaMemcpyAsync(h_token_num, d_token_num, sizeof(size_t), cudaMemcpyDeviceToHost, stream)); + h_pinned_token_num, tmp_mask_offset, cu_seqlens, sequence_lengths, batch_size, max_seq_len); + while (((volatile size_t*)h_pinned_token_num)[0] == 0) {}; + h_token_num[0] = h_pinned_token_num[0]; sync_check_cuda_error(); } @@ -102,6 +106,13 @@ template void invokeBuildEncoderAttentionMask(half* attention_mask, const int batch_size, const int max_seq_len, cudaStream_t stream); +#ifdef ENABLE_FP8 +template void invokeBuildEncoderAttentionMask(__nv_fp8_e4m3* attention_mask, + const int* sequence_lengths, + const int batch_size, + const int max_seq_len, + cudaStream_t stream); +#endif // ENABLE_FP8 #ifdef ENABLE_BF16 template void invokeBuildEncoderAttentionMask(__nv_bfloat16* attention_mask, const int* sequence_lengths, @@ -186,11 +197,11 @@ __global__ void rebuild_sequence_length_padding(const T* src, T* dst, const int* template void invokeRebuildPadding( - T* dst, const T* src, const int* padding_offset, const int m, const int n, cudaStream_t stream) + T* dst, const T* src, const int* padding_offset, const int token_num, const int hidden_dim, cudaStream_t stream) { // src: [token_num, hidden_dim] // dst: [batch_size*max_seq_len, hidden_dim] - rebuild_sequence_length_padding<<>>(src, dst, padding_offset, n); + rebuild_sequence_length_padding<<>>(src, dst, padding_offset, hidden_dim); } template @@ -215,7 +226,16 @@ template void invokeRebuildPadding(__nv_bfloat16* dst, const int token_num, const int hidden_dim, cudaStream_t stream); -#endif +#endif // ENABLE_BF16 + +#ifdef ENABLE_FP8 +template void invokeRebuildPadding(__nv_fp8_e4m3* dst, + const __nv_fp8_e4m3* src, + const int* padding_offset, + const int token_num, + const int hidden_dim, + cudaStream_t stream); +#endif // ENABLE_FP8 template __global__ void remove_padding(T* tgt, const T* src, const int* padding_offset, const int n) @@ -250,7 +270,14 @@ template void invokeRemovePadding(half* dst, const int token_num, const int hidden_dim, cudaStream_t stream); - +#ifdef ENABLE_FP8 +template void invokeRemovePadding(__nv_fp8_e4m3* dst, + const __nv_fp8_e4m3* src, + const int* padding_offset, + const int token_num, + const int hidden_dim, + cudaStream_t stream); +#endif // ENABLE_FP8 #ifdef ENABLE_BF16 template void invokeRemovePadding(__nv_bfloat16* dst, const __nv_bfloat16* src, @@ -366,4 +393,78 @@ template void invokeBuildRelativeAttentionBias(__nv_bfloat16* relat cudaStream_t stream); #endif +#ifdef ENABLE_FP8 + +template +__global__ void getLastTokenDequantize(getLastTokenDequantizeParam param) +{ + param.output[blockIdx.x * param.d_model + threadIdx.x] = + (T_OUT)((float)param.input[blockIdx.x * param.max_seq_len * param.d_model + threadIdx.x] + * __ldg(param.input_scale)); +} + +template +void invokeGetLastTokenDequantize(getLastTokenDequantizeParam param) +{ + FT_CHECK(param.d_model <= 1024); + getLastTokenDequantize<<>>(param); +} + +template void invokeGetLastTokenDequantize<__nv_bfloat16, __nv_fp8_e4m3>( + getLastTokenDequantizeParam<__nv_bfloat16, __nv_fp8_e4m3> param); + +template +__global__ void quantizeMatrixRebuildPadding(QuantizeMatrixRebuildPaddingParam param) +{ + for (int i = threadIdx.x; i < param.d_model; i += blockDim.x) { + int padded_row_id = blockIdx.x + (param.padding_offset == nullptr ? 0 : param.padding_offset[blockIdx.x]); + if (quantize_mode == QUANTIZE_MODE::PER_TENSOR) { + param.dst[padded_row_id * param.d_model + i] = + (T_OUT)((float)param.src[blockIdx.x * param.d_model + i] * __ldg(param.scale)); + } + else if (quantize_mode == QUANTIZE_MODE::PER_CHANNEL) { + param.dst[padded_row_id * param.d_model + i] = + (T_OUT)((float)param.src[blockIdx.x * param.d_model + i] * __ldg(param.scale + i)); + } + } +} + +template<> +__global__ void +quantizeMatrixRebuildPadding(QuantizeMatrixRebuildPaddingParam param) +{ + int padded_row_id = blockIdx.x + (param.padding_offset == nullptr ? 0 : __ldg(¶m.padding_offset[blockIdx.x])); + __nv_fp8x4_e4m3* src_ptr = ((__nv_fp8x4_e4m3*)param.src) + blockIdx.x * (param.d_model / 4); + half2* dst_ptr = ((half2*)param.dst) + padded_row_id * (param.d_model / 2); + half2 scale = cuda_cast(__ldg(param.scale)); + for (int i = threadIdx.x; i < param.d_model / 4; i += blockDim.x) { + half2 val_0; + half2 val_1; + fp8x4_e4m3_to_half2(&val_0, &val_1, src_ptr + i); + + val_0 = hmul2(val_0, scale); + val_1 = hmul2(val_1, scale); + + dst_ptr[2 * i + 0] = val_0; + dst_ptr[2 * i + 1] = val_1; + } +} + +template +void invokeQuantizeMatrixRebuildPadding(QuantizeMatrixRebuildPaddingParam param) +{ + dim3 grid(param.token_num); + dim3 block(param.d_model); + FT_CHECK(block.x <= 1024); + if (block.x % 4 == 0) { + block.x /= 4; + } + quantizeMatrixRebuildPadding<<>>(param); +} + +template void invokeQuantizeMatrixRebuildPadding( + QuantizeMatrixRebuildPaddingParam param); + +#endif + } // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/kernels/bert_preprocess_kernels.h b/src/fastertransformer/kernels/bert_preprocess_kernels.h index 90ac334b5..2de48657d 100644 --- a/src/fastertransformer/kernels/bert_preprocess_kernels.h +++ b/src/fastertransformer/kernels/bert_preprocess_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -19,11 +19,14 @@ #include "src/fastertransformer/utils/cuda_utils.h" #include #include +#ifdef ENABLE_FP8 +#include "src/fastertransformer/utils/cuda_fp8_utils.h" +#endif // ENABLE_FP8 namespace fastertransformer { -void invokeGetPaddingOffsetAndCuSeqLens(size_t* h_token_num, - size_t* d_token_num, +void invokeGetPaddingOffsetAndCuSeqLens(size_t* h_pinned_token_num, + size_t* h_token_num, int* tmp_mask_offset, int* cu_seqlens, const int* sequence_length, @@ -31,8 +34,8 @@ void invokeGetPaddingOffsetAndCuSeqLens(size_t* h_token_num, const int max_seq_len, cudaStream_t stream); -inline void invokeGetPaddingOffset(size_t* h_token_num, - size_t* d_token_num, +inline void invokeGetPaddingOffset(size_t* h_pinned_token_num, + size_t* h_token_num, int* tmp_mask_offset, const int* sequence_length, const int batch_size, @@ -40,7 +43,7 @@ inline void invokeGetPaddingOffset(size_t* h_token_num, cudaStream_t stream) { invokeGetPaddingOffsetAndCuSeqLens( - h_token_num, d_token_num, tmp_mask_offset, nullptr, sequence_length, batch_size, max_seq_len, stream); + h_pinned_token_num, h_token_num, tmp_mask_offset, nullptr, sequence_length, batch_size, max_seq_len, stream); } template @@ -77,4 +80,35 @@ void invokeBuildRelativeAttentionBias(T* relative_atten const PositionEmbeddingType position_embedding_type, cudaStream_t stream); +template +struct getLastTokenDequantizeParam { + T_OUT* const output; + T_IN const* const input; + float const* const input_scale; + + const int batch_size; + const int max_seq_len; + const int d_model; + cudaStream_t stream; +}; + +template +void invokeGetLastTokenDequantize(getLastTokenDequantizeParam param); + +#ifdef ENABLE_FP8 +template +struct QuantizeMatrixRebuildPaddingParam { + T_OUT* dst; + const T_IN* src; + const int* padding_offset; + const int token_num; + const int d_model; + const float* scale; + cudaStream_t stream; +}; + +template +void invokeQuantizeMatrixRebuildPadding(QuantizeMatrixRebuildPaddingParam param); +#endif // ENABLE_FP8 + } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/calibrate_quantize_weight_kernels.cu b/src/fastertransformer/kernels/calibrate_quantize_weight_kernels.cu index 6f8359804..9b2a74217 100644 --- a/src/fastertransformer/kernels/calibrate_quantize_weight_kernels.cu +++ b/src/fastertransformer/kernels/calibrate_quantize_weight_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/calibrate_quantize_weight_kernels.h b/src/fastertransformer/kernels/calibrate_quantize_weight_kernels.h index 0418b90df..3d868655e 100644 --- a/src/fastertransformer/kernels/calibrate_quantize_weight_kernels.h +++ b/src/fastertransformer/kernels/calibrate_quantize_weight_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/custom_ar_kernels.cu b/src/fastertransformer/kernels/custom_ar_kernels.cu index 0eb16fa5c..9f45ce9b9 100644 --- a/src/fastertransformer/kernels/custom_ar_kernels.cu +++ b/src/fastertransformer/kernels/custom_ar_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/custom_ar_kernels.h b/src/fastertransformer/kernels/custom_ar_kernels.h index 2938c18d6..b0e555e78 100644 --- a/src/fastertransformer/kernels/custom_ar_kernels.h +++ b/src/fastertransformer/kernels/custom_ar_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/cutlass_kernels/CMakeLists.txt b/src/fastertransformer/kernels/cutlass_kernels/CMakeLists.txt index ed400caee..723b698dc 100644 --- a/src/fastertransformer/kernels/cutlass_kernels/CMakeLists.txt +++ b/src/fastertransformer/kernels/cutlass_kernels/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -32,4 +32,12 @@ add_library(fpA_intB_gemm STATIC ${fpA_intB_files}) # target_compile_options(fpA_intB_gemm PRIVATE "-Xptxas=-v") set_property(TARGET fpA_intB_gemm PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET fpA_intB_gemm PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) -target_link_libraries(fpA_intB_gemm PRIVATE cutlass_heuristic) \ No newline at end of file +target_link_libraries(fpA_intB_gemm PRIVATE cutlass_heuristic) + +set(int8_files "") +file(GLOB int8_files ${int8_files} ./int8_gemm/*.cu) +add_library(int8_gemm STATIC ${int8_files}) +# target_compile_options(int8_gemm PRIVATE "-Xptxas=-v") +set_property(TARGET int8_gemm PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET int8_gemm PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(int8_gemm PRIVATE cutlass_heuristic) \ No newline at end of file diff --git a/src/fastertransformer/kernels/cutlass_kernels/cutlass_heuristic.cc b/src/fastertransformer/kernels/cutlass_kernels/cutlass_heuristic.cc index d5139aa88..bc27457eb 100644 --- a/src/fastertransformer/kernels/cutlass_kernels/cutlass_heuristic.cc +++ b/src/fastertransformer/kernels/cutlass_kernels/cutlass_heuristic.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/cutlass_kernels/cutlass_heuristic.h b/src/fastertransformer/kernels/cutlass_kernels/cutlass_heuristic.h index 189343afc..cd955d205 100644 --- a/src/fastertransformer/kernels/cutlass_kernels/cutlass_heuristic.h +++ b/src/fastertransformer/kernels/cutlass_kernels/cutlass_heuristic.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/cutlass_kernels/cutlass_preprocessors.cc b/src/fastertransformer/kernels/cutlass_kernels/cutlass_preprocessors.cc index 725c842e5..ffd01af6e 100644 --- a/src/fastertransformer/kernels/cutlass_kernels/cutlass_preprocessors.cc +++ b/src/fastertransformer/kernels/cutlass_kernels/cutlass_preprocessors.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/cutlass_kernels/cutlass_preprocessors.h b/src/fastertransformer/kernels/cutlass_kernels/cutlass_preprocessors.h index 758202060..fc67a9fb1 100644 --- a/src/fastertransformer/kernels/cutlass_kernels/cutlass_preprocessors.h +++ b/src/fastertransformer/kernels/cutlass_kernels/cutlass_preprocessors.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm.h b/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm.h index 4f64a22fe..473611eac 100644 --- a/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm.h +++ b/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm_bf16_uint4.cu b/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm_bf16_uint4.cu index 70747c05d..92de0838f 100644 --- a/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm_bf16_uint4.cu +++ b/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm_bf16_uint4.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm_bf16_uint8.cu b/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm_bf16_uint8.cu index 2edff38f4..d6a7a552e 100644 --- a/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm_bf16_uint8.cu +++ b/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm_bf16_uint8.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm_dummy_stubs.cu b/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm_dummy_stubs.cu index 513dcd6c2..213c0dfb8 100644 --- a/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm_dummy_stubs.cu +++ b/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm_dummy_stubs.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm_fp16_int4.cu b/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm_fp16_int4.cu index f2618126d..083243569 100644 --- a/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm_fp16_int4.cu +++ b/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm_fp16_int4.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm_fp16_int8.cu b/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm_fp16_int8.cu index 0bf232725..55efce130 100644 --- a/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm_fp16_int8.cu +++ b/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm_fp16_int8.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm_template.h b/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm_template.h index 967b048a4..625536344 100644 --- a/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm_template.h +++ b/src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm_template.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm.h b/src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm.h new file mode 100644 index 000000000..e25ff3314 --- /dev/null +++ b/src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm.h @@ -0,0 +1,96 @@ +/* + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/cutlass_extensions/include/cutlass_extensions/epilogue/epilogue_quant_helper.h" +#include "src/fastertransformer/cutlass_extensions/include/cutlass_extensions/ft_gemm_configs.h" +#include "src/fastertransformer/utils/activation_types.h" +#include "src/fastertransformer/utils/allocator.h" +#include + +using cutlass::epilogue::QuantMode; +namespace fastertransformer { + +/* + This runner supports: + int8_t inputs (A and B) + float alpha scalings (either per-col, or per-col x per-row) + T output (D) where T = {float, half, __nv_bfloat16} // TODO(mseznec) + + Activations, biases, scales and outputs are all assumed to be row-major. + Weights are assumed to be column-major. +*/ + +template +class CutlassInt8GemmRunner { +public: + CutlassInt8GemmRunner(); + ~CutlassInt8GemmRunner(); + + void gemm(const int8_t* A, + const int8_t* B, + QuantMode quant_mode, + const float* alpha_col, + const float* alpha_row, + T* C, + int m, + int n, + int k, + char* workspace_ptr, + const size_t workspace_bytes, + cudaStream_t stream); + + // Returns desired workspace size in bytes. + int getWorkspaceSize(const int m, const int n, const int k); + +private: + void dispatch_to_arch(const int8_t* A, + const int8_t* B, + QuantMode quant_mode, + const float* alpha_col, + const float* alpha_row, + T* C, + int m, + int n, + int k, + CutlassGemmConfig gemm_config, + char* workspace_ptr, + const size_t workspace_bytes, + cudaStream_t stream, + int* occupancy = nullptr); + + void run_gemm(const int8_t* A, + const int8_t* B, + QuantMode quant_mode, + const float* alpha_col, + const float* alpha_row, + T* C, + int m, + int n, + int k, + char* workspace_ptr, + const size_t workspace_bytes, + cudaStream_t stream); + +private: + static constexpr int split_k_limit = 7; + + int sm_; + int multi_processor_count_; +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm_bf16.cu b/src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm_bf16.cu new file mode 100644 index 000000000..06ec176f2 --- /dev/null +++ b/src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm_bf16.cu @@ -0,0 +1,23 @@ +/* + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm_template.h" + +namespace fastertransformer { +#ifdef ENABLE_BF16 +template class CutlassInt8GemmRunner<__nv_bfloat16>; +#endif +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm_fp16.cu b/src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm_fp16.cu new file mode 100644 index 000000000..bd3478c1d --- /dev/null +++ b/src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm_fp16.cu @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm_template.h" + +namespace fastertransformer { +template class CutlassInt8GemmRunner; +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm_fp32.cu b/src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm_fp32.cu new file mode 100644 index 000000000..85c976339 --- /dev/null +++ b/src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm_fp32.cu @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm_template.h" + +namespace fastertransformer { +template class CutlassInt8GemmRunner; // for compilation only +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm_int32.cu b/src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm_int32.cu new file mode 100644 index 000000000..8137dbb5e --- /dev/null +++ b/src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm_int32.cu @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm_template.h" + +namespace fastertransformer { +template class CutlassInt8GemmRunner; +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm_template.h b/src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm_template.h new file mode 100644 index 000000000..ab9d5e56e --- /dev/null +++ b/src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm_template.h @@ -0,0 +1,584 @@ +/* + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wstrict-aliasing" + +#include "cutlass/gemm/device/default_gemm_configuration.h" +#include "cutlass/gemm/device/gemm.h" +#include "cutlass/gemm/device/gemm_universal_base.h" +#include "cutlass/gemm/kernel/default_gemm.h" + +#include "cutlass/epilogue/threadblock/epilogue_with_visitor.h" + +#include "cutlass_extensions/compute_occupancy.h" +#include "cutlass_extensions/epilogue/threadblock/epilogue_tensor_op_int32.h" +#include "cutlass_extensions/epilogue_helpers.h" +#include "cutlass_extensions/ft_gemm_configs.h" + +#include "cutlass_extensions/gemm/kernel/default_fpA_intB_traits.h" +#include "cutlass_extensions/gemm/kernel/gemm_with_epilogue_visitor.h" +#include "cutlass_extensions/gemm/threadblock/default_mma.h" + +#pragma GCC diagnostic pop + +#include "src/fastertransformer/kernels/cutlass_kernels/cutlass_heuristic.h" +#include "src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm.h" +#include "src/fastertransformer/utils/cuda_utils.h" + +namespace fastertransformer { + +template +void generic_int8_gemm_kernelLauncher(const int8_t* A, + const int8_t* B, + QuantMode quant_mode, + const float* alpha_col, + const float* alpha_row, + T* C, + int m, + int n, + int k, + CutlassGemmConfig gemm_config, + char* workspace, + size_t workspace_bytes, + cudaStream_t stream, + int* occupancy = nullptr) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); +#ifdef BUILD_CUTLASS_MIXED_GEMM + + using ElementInput = int8_t; + + using ElementOutput_ = + typename cutlass::platform::conditional::value, cutlass::half_t, T>::type; +#ifdef ENABLE_BF16 + using ElementOutput = + typename cutlass::platform::conditional::value, + cutlass::bfloat16_t, + ElementOutput_>::type; +#else + using ElementOutput = ElementOutput_; +#endif + + using ElementAccumulator = int32_t; + using ElementCompute = float; + + using ThreadblockSwizzle = cutlass::gemm::threadblock::GemmIdentityThreadblockSwizzle<>; + + // TODO(mseznec): put below types in traits class + using OperatorClass = cutlass::arch::OpClassTensorOp; + using DefaultGemmConf = typename cutlass::gemm::device:: + DefaultGemmConfiguration; + using InstructionShape = typename DefaultGemmConf::InstructionShape; + using GemmOp = typename DefaultGemmConf::Operator; + using EpilogueOp = typename DefaultGemmConf::EpilogueOutputOp; + + // only TN is supported (s8 * s8 + s32) + using GemmKernel_ = typename cutlass::gemm::kernel::DefaultGemm::GemmKernel; + + using AlphaColTileIterator = cutlass::epilogue::threadblock::PredicatedTileIterator< + cutlass::epilogue::threadblock::OutputTileOptimalThreadMap< + typename GemmKernel_::Epilogue::OutputTileIterator::ThreadMap::Shape, + typename GemmKernel_::Epilogue::OutputTileIterator::ThreadMap::Count, + GemmKernel_::Epilogue::OutputTileIterator::ThreadMap::kThreads, + GemmKernel_::Epilogue::OutputTileIterator::kElementsPerAccess, + cutlass::sizeof_bits::value>, + ElementCompute>; + + // Epilogue visitor + using EpilogueVisitor = typename cutlass::epilogue::threadblock::EpilogueVisitorPerRowPerCol< + ThreadblockShape, + GemmKernel_::kThreadCount, + AlphaColTileIterator, + typename GemmKernel_::Epilogue::OutputTileIterator, + ElementAccumulator, + ElementCompute, + EpilogueOp>; + + /// Epilogue + using Epilogue = typename cutlass::epilogue::threadblock:: + EpilogueWithVisitorFromExistingEpilogue::Epilogue; + + // GEMM + using GemmKernel = + cutlass::gemm::kernel::GemmWithEpilogueVisitor; + + if (occupancy != nullptr) { + *occupancy = compute_occupancy_for_kernel(); + return; + } + + using Gemm = cutlass::gemm::device::GemmUniversalBase; + + typename EpilogueOp::Params linear_scaling_params; // TODO(mseznec): right now it's unused (scaling is done in + // visitor, no activation needed) + typename Gemm::Arguments args{cutlass::gemm::GemmUniversalMode::kBatched, + {m, n, k}, + 1, + {reinterpret_cast(const_cast(A)), k}, + {reinterpret_cast(const_cast(B)), k}, + quant_mode, + {reinterpret_cast(const_cast(alpha_col)), 0}, + {reinterpret_cast(const_cast(alpha_row)), 0}, + {nullptr, 0}, + {reinterpret_cast(C), n}, + 0, + 0, + typename EpilogueVisitor::Arguments(linear_scaling_params, 0, 0, 0)}; + + Gemm gemm; + // TODO(mseznec): handle that + if (gemm.get_workspace_size(args) > workspace_bytes) { + FT_LOG_WARNING( + "Requested split-k but workspace size insufficient. Falling back to non-split-k implementation."); + // If requested split-k factor will require more workspace bytes, revert to standard gemm. + args.batch_count = 1; + } + + auto can_implement = gemm.can_implement(args); + if (can_implement != cutlass::Status::kSuccess) { + std::string err_msg = "int8gemm cutlass kernel will fail for params. Error: " + + std::string(cutlassGetStatusString(can_implement)); + throw std::runtime_error("[FT Error][int8gemm Runner] " + err_msg); + } + + auto init_status = gemm.initialize(args, workspace, stream); + if (init_status != cutlass::Status::kSuccess) { + std::string err_msg = + "Failed to initialize cutlass int8 gemm. Error: " + std::string(cutlassGetStatusString(init_status)); + throw std::runtime_error("[FT Error][int8gemm Runner] " + err_msg); + } + + auto run_status = gemm.run(stream); + if (run_status != cutlass::Status::kSuccess) { + std::string err_msg = + "Failed to run cutlass int8 gemm. Error: " + std::string(cutlassGetStatusString(run_status)); + throw std::runtime_error("[FT Error][int8gemm Runner] " + err_msg); + } +#else + throw std::runtime_error( + "[FT Error][int8gemm] FasterTransformer was built was mixed gemm support off. Please rebuild with cmake option -DBUILD_CUTLASS_MIXED_GEMM=ON"); +#endif +} + +template +struct dispatch_stages { + static void dispatch(const int8_t* A, + const int8_t* B, + const float* alpha_col, + const float* alpha_row, + T* C, + int m, + int n, + int k, + CutlassGemmConfig gemm_config, + char* workspace, + size_t workspace_bytes, + cudaStream_t stream, + int* occupancy = nullptr) + { + + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + std::string err_msg = "Cutlass int8 gemm. Not instantiates for arch " + + std::to_string(arch::kMinComputeCapability) + " with stages set to " + + std::to_string(Stages); + throw std::runtime_error("[FT Error][dispatch_stages::dispatch] " + err_msg); + } +}; + +template +struct dispatch_stages { + static void dispatch(const int8_t* A, + const int8_t* B, + QuantMode quant_mode, + const float* alpha_col, + const float* alpha_row, + T* C, + int m, + int n, + int k, + CutlassGemmConfig gemm_config, + char* workspace, + size_t workspace_bytes, + cudaStream_t stream, + int* occupancy = nullptr) + { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + generic_int8_gemm_kernelLauncher(A, + B, + quant_mode, + alpha_col, + alpha_row, + C, + m, + n, + k, + gemm_config, + workspace, + workspace_bytes, + stream, + occupancy); + } +}; + +template +struct dispatch_stages 2)>::type> { + static void dispatch(const int8_t* A, + const int8_t* B, + QuantMode quant_mode, + const float* alpha_col, + const float* alpha_row, + T* C, + int m, + int n, + int k, + CutlassGemmConfig gemm_config, + char* workspace, + size_t workspace_bytes, + cudaStream_t stream, + int* occupancy = nullptr) + { + + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + generic_int8_gemm_kernelLauncher(A, + B, + quant_mode, + alpha_col, + alpha_row, + C, + m, + n, + k, + gemm_config, + workspace, + workspace_bytes, + stream, + occupancy); + } +}; + +template +void dispatch_gemm_config(const int8_t* A, + const int8_t* B, + QuantMode quant_mode, + const float* alpha_col, + const float* alpha_row, + T* C, + int m, + int n, + int k, + CutlassGemmConfig gemm_config, + char* workspace, + size_t workspace_bytes, + cudaStream_t stream, + int* occupancy = nullptr) +{ + + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + switch (gemm_config.stages) { + case 2: + using DispatcherStages2 = dispatch_stages; + DispatcherStages2::dispatch(A, + B, + quant_mode, + alpha_col, + alpha_row, + C, + m, + n, + k, + gemm_config, + workspace, + workspace_bytes, + stream, + occupancy); + break; + case 3: + using DispatcherStages3 = dispatch_stages; + DispatcherStages3::dispatch(A, + B, + quant_mode, + alpha_col, + alpha_row, + C, + m, + n, + k, + gemm_config, + workspace, + workspace_bytes, + stream, + occupancy); + break; + case 4: + using DispatcherStages4 = dispatch_stages; + DispatcherStages4::dispatch(A, + B, + quant_mode, + alpha_col, + alpha_row, + C, + m, + n, + k, + gemm_config, + workspace, + workspace_bytes, + stream, + occupancy); + break; + default: + std::string err_msg = "dispatch_gemm_config does not support stages " + std::to_string(gemm_config.stages); + throw std::runtime_error("[FT Error][dispatch_gemm_config] " + err_msg); + break; + } +} + +template +void dispatch_gemm_to_cutlass(const int8_t* A, + const int8_t* B, + QuantMode quant_mode, + const float* alpha_col, + const float* alpha_row, + T* C, + int m, + int n, + int k, + char* workspace, + size_t workspace_bytes, + CutlassGemmConfig gemm_config, + cudaStream_t stream, + int* occupancy = nullptr) +{ + + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + + // Note that SIMT configs are omitted here since they are not supported for int8. + // We also only instantiate configs here where threadblockShapeM == warpShapeM since those usually perform the best + // for mixed type gemms. + dispatch_gemm_config, cutlass::gemm::GemmShape<32, 32, 64>>( + A, B, quant_mode, alpha_col, alpha_row, C, m, n, k, gemm_config, workspace, workspace_bytes, stream, occupancy); + /* switch (gemm_config.tile_config) { */ + /* case CutlassTileConfig::CtaShape32x128x64_WarpShape32x32x64: */ + /* dispatch_gemm_config, */ + /* cutlass::gemm::GemmShape<32, 32, 64>>( */ + /* A, B, alpha_col, alpha_row, C, m, n, k, gemm_config, workspace, workspace_bytes, stream, occupancy); + */ + /* break; */ + /* case CutlassTileConfig::CtaShape64x128x64_WarpShape64x32x64: */ + /* dispatch_gemm_config, */ + /* cutlass::gemm::GemmShape<64, 32, 64>>( */ + /* A, B, alpha_col, alpha_row, C, m, n, k, gemm_config, workspace, workspace_bytes, stream, occupancy); + */ + /* break; */ + /* case CutlassTileConfig::CtaShape128x128x64_WarpShape128x32x64: */ + /* dispatch_gemm_config, */ + /* cutlass::gemm::GemmShape<128, 32, 64>>( */ + /* A, B, alpha_col, alpha_row, C, m, n, k, gemm_config, workspace, workspace_bytes, stream, occupancy); + */ + /* break; */ + /* case CutlassTileConfig::Undefined: */ + /* throw std::runtime_error("[FT Error][int8][dispatch_gemm_to_cutlass] gemm config undefined."); */ + /* break; */ + /* case CutlassTileConfig::ChooseWithHeuristic: */ + /* throw std::runtime_error( */ + /* "[FT Error][int8][dispatch_gemm_to_cutlass] gemm config should have already been set by heuristic."); + */ + /* break; */ + /* default: */ + /* throw std::runtime_error( */ + /* "[FT Error][int8][dispatch_gemm_to_cutlass] Config is invalid for mixed type GEMM."); */ + /* break; */ + /* } */ +} + +template +CutlassInt8GemmRunner::CutlassInt8GemmRunner() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + int device{-1}; + check_cuda_error(cudaGetDevice(&device)); + sm_ = getSMVersion(); + check_cuda_error(cudaDeviceGetAttribute(&multi_processor_count_, cudaDevAttrMultiProcessorCount, device)); +} + +template +CutlassInt8GemmRunner::~CutlassInt8GemmRunner() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); +} + +template +void CutlassInt8GemmRunner::dispatch_to_arch(const int8_t* A, + const int8_t* B, + QuantMode quant_mode, + const float* alpha_col, + const float* alpha_row, + T* C, + int m, + int n, + int k, + CutlassGemmConfig gemm_config, + char* workspace_ptr, + const size_t workspace_bytes, + cudaStream_t stream, + int* occupancy) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + // TODO(mseznec): add compat for sm_ >= 70 + /* if (sm_ >= 70 && sm_ < 75) { */ + /* dispatch_gemm_to_cutlass( */ + /* A, B, alpha_col, alpha_row, C, m, n, k, workspace_ptr, workspace_bytes, gemm_config, stream, occupancy); + */ + /* } */ + /* if (sm_ >= 75 && sm_ < 80) { */ + /* dispatch_gemm_to_cutlass( */ + /* A, B, alpha_col, alpha_row, C, m, n, k, workspace_ptr, workspace_bytes, gemm_config, stream, occupancy); + */ + /* } */ + if (sm_ >= 80 && sm_ < 90) { + dispatch_gemm_to_cutlass(A, + B, + quant_mode, + alpha_col, + alpha_row, + C, + m, + n, + k, + workspace_ptr, + workspace_bytes, + gemm_config, + stream, + occupancy); + } + else { + throw std::runtime_error( + "[FT Error][CutlassInt8GemmRunner][GEMM Dispatch] Arch unsupported for CUTLASS int8 GEMM"); + } +} + +template +void CutlassInt8GemmRunner::run_gemm(const int8_t* A, + const int8_t* B, + QuantMode quant_mode, + const float* alpha_col, + const float* alpha_row, + T* C, + int m, + int n, + int k, + char* workspace_ptr, + const size_t workspace_bytes, + cudaStream_t stream) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + static constexpr bool is_weight_only = false; + std::vector candidate_configs = get_candidate_configs(sm_, is_weight_only, false); + std::vector occupancies(candidate_configs.size()); + + for (size_t ii = 0; ii < candidate_configs.size(); ++ii) { + dispatch_to_arch(A, + B, + quant_mode, + alpha_col, + alpha_row, + C, + m, + n, + k, + candidate_configs[ii], + workspace_ptr, + workspace_bytes, + stream, + &occupancies[ii]); + } + // Standard GEMM, so 1 "expert". We use the same function for MoE and regular FFN. + static constexpr int num_experts = 1; + CutlassGemmConfig chosen_config = estimate_best_config_from_occupancies(candidate_configs, + occupancies, + m, + n, + k, + num_experts, + split_k_limit, + workspace_bytes, + multi_processor_count_, + is_weight_only); + + dispatch_to_arch( + A, B, quant_mode, alpha_col, alpha_row, C, m, n, k, chosen_config, workspace_ptr, workspace_bytes, stream); +} + +template +void CutlassInt8GemmRunner::gemm(const int8_t* A, + const int8_t* B, + QuantMode quant_mode, + const float* alpha_row, + const float* alpha_col, + T* C, + int m, + int n, + int k, + char* workspace_ptr, + const size_t workspace_bytes, + cudaStream_t stream) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + run_gemm(A, B, quant_mode, alpha_row, alpha_col, C, m, n, k, workspace_ptr, workspace_bytes, stream); +} + +template +int CutlassInt8GemmRunner::getWorkspaceSize(const int m, const int n, const int k) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + // These are the min tile sizes for each config, which would launch the maximum number of blocks + const int max_grid_m = (m + 31) / 32; + const int max_grid_n = (n + 127) / 128; + // We need 4 bytes per block in the worst case. We launch split_k_limit in z dim. + return max_grid_m * max_grid_n * split_k_limit * 4; +} + +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels.h b/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels.h index 74a6ba6f4..a87ecbf30 100644 --- a/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels.h +++ b/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_bf16_bf16.cu b/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_bf16_bf16.cu index cbe16f252..ccc8fdaa0 100644 --- a/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_bf16_bf16.cu +++ b/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_bf16_bf16.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_bf16_uint4.cu b/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_bf16_uint4.cu index 1a9e25a90..ab6f93b5a 100644 --- a/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_bf16_uint4.cu +++ b/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_bf16_uint4.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_bf16_uint8.cu b/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_bf16_uint8.cu index 722d95150..e1faf76b9 100644 --- a/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_bf16_uint8.cu +++ b/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_bf16_uint8.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_fp16_fp16.cu b/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_fp16_fp16.cu index 57ee3df91..092a89dcd 100644 --- a/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_fp16_fp16.cu +++ b/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_fp16_fp16.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_fp16_uint4.cu b/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_fp16_uint4.cu index 4ba2bfac0..0b8d07c7a 100644 --- a/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_fp16_uint4.cu +++ b/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_fp16_uint4.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_fp16_uint8.cu b/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_fp16_uint8.cu index fc7b371e6..5d1b568c2 100644 --- a/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_fp16_uint8.cu +++ b/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_fp16_uint8.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_fp32_fp32.cu b/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_fp32_fp32.cu index 6f43d72b8..91ec537e1 100644 --- a/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_fp32_fp32.cu +++ b/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_fp32_fp32.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_template.h b/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_template.h index 049e1cf38..b198925b7 100644 --- a/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_template.h +++ b/src/fastertransformer/kernels/cutlass_kernels/moe_gemm/moe_gemm_kernels_template.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/decoder_masked_multihead_attention.cu b/src/fastertransformer/kernels/decoder_masked_multihead_attention.cu index 47d010abb..4618673d8 100644 --- a/src/fastertransformer/kernels/decoder_masked_multihead_attention.cu +++ b/src/fastertransformer/kernels/decoder_masked_multihead_attention.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -87,6 +87,17 @@ void masked_multihead_attention(const Masked_multihead_attention_params<__nv_bfl multihead_attention_<__nv_bfloat16, Masked_multihead_attention_params<__nv_bfloat16>>(params, stream); } #endif + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +#ifdef ENABLE_FP8 +void masked_multihead_attention(const Masked_multihead_attention_params<__nv_fp8_e4m3>& params, + const cudaStream_t& stream) +{ + multihead_attention_<__nv_fp8_e4m3, Masked_multihead_attention_params<__nv_fp8_e4m3>>(params, stream); +} +#endif + //////////////////////////////////////////////////////////////////////////////////////////////////// void cross_multihead_attention(const Cross_multihead_attention_params& params, const cudaStream_t& stream) @@ -112,3 +123,13 @@ void cross_multihead_attention(const Cross_multihead_attention_params<__nv_bfloa #endif //////////////////////////////////////////////////////////////////////////////////////////////////// + +#ifdef ENABLE_FP8 +void cross_multihead_attention(const Cross_multihead_attention_params<__nv_fp8_e4m3>& params, + const cudaStream_t& stream) +{ + multihead_attention_<__nv_fp8_e4m3, Cross_multihead_attention_params<__nv_fp8_e4m3>>(params, stream); +} +#endif + +//////////////////////////////////////////////////////////////////////////////////////////////////// diff --git a/src/fastertransformer/kernels/decoder_masked_multihead_attention.h b/src/fastertransformer/kernels/decoder_masked_multihead_attention.h index 13c1379f5..5a768184c 100644 --- a/src/fastertransformer/kernels/decoder_masked_multihead_attention.h +++ b/src/fastertransformer/kernels/decoder_masked_multihead_attention.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -16,7 +16,9 @@ #pragma once +#include "src/fastertransformer/layers/attention_layers_fp8/AttentionFP8Weight.h" #include "src/fastertransformer/utils/cuda_bf16_wrapper.h" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" #include #include #include @@ -66,6 +68,11 @@ struct Multihead_attention_params_base { // The indirections to use for cache when beam sampling. const int* cache_indir = nullptr; + // scales + const float* query_weight_output_scale = nullptr; + const float* attention_qk_scale = nullptr; + const float* attention_output_weight_input_scale_inv = nullptr; + // Stride to handle the case when KQV is a single buffer int stride = 0; @@ -169,6 +176,10 @@ void masked_multihead_attention(const Masked_multihead_attention_params& params, const cudaStream_t& stream); #endif +#ifdef ENABLE_FP8 +void masked_multihead_attention(const Masked_multihead_attention_params<__nv_fp8_e4m3>& params, + const cudaStream_t& stream); +#endif void cross_multihead_attention(const Cross_multihead_attention_params& params, const cudaStream_t& stream); void cross_multihead_attention(const Cross_multihead_attention_params& params, const cudaStream_t& stream); #ifdef ENABLE_BF16 diff --git a/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_128.cu b/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_128.cu index 98be6752a..9b4f7c393 100644 --- a/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_128.cu +++ b/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_128.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -25,7 +25,8 @@ //////////////////////////////////////////////////////////////////////////////////////////////////// -#define MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, THDS_PER_KEY, THDS_PER_VALUE, THDS_PER_BLOCK, DO_CROSS_ATTENTION, stream) \ +#define MMHA_LAUNCH_KERNEL( \ + T, Dh, Dh_MAX, THDS_PER_KEY, THDS_PER_VALUE, THDS_PER_BLOCK, DO_CROSS_ATTENTION, HAS_BEAMS, stream) \ size_t smem_sz = mmha::smem_size_in_bytes(params, THDS_PER_VALUE, THDS_PER_BLOCK); \ dim3 grid(params.num_heads, params.batch_size); \ mmha::masked_multihead_attention_kernel<<>>(params) + DO_CROSS_ATTENTION, \ + HAS_BEAMS><<>>(params) //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -42,18 +44,31 @@ template void mmha_launch_kernel(const KERNEL_PARAMS_TYPE& params, const cudaStream_t& stream) { - constexpr int THREADS_PER_VALUE = Dh_MAX * sizeof(T) / 16; + constexpr int THREADS_PER_VALUE = threads_per_value_t::value; constexpr bool DO_CROSS_ATTENTION = std::is_same>::value; int tlength = (DO_CROSS_ATTENTION) ? params.memory_max_len : params.timestep; // printf("tlength, CROSS_ATTENTION = %d, %d\n", tlength, DO_CROSS_ATTENTION); - if (tlength < 32) { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, stream); - } - else if (tlength < 2048) { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, stream); + if (params.cache_indir == nullptr) { + if (tlength < 32) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, false, stream); + } + else if (tlength < 2048) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, false, stream); + } + else { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, false, stream); + } } else { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, stream); + if (tlength < 32) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, true, stream); + } + else if (tlength < 2048) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, true, stream); + } + else { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, true, stream); + } } } @@ -67,6 +82,10 @@ template void mmha_launch_kernel>( const Masked_multihead_attention_params<__nv_bfloat16>& params, const cudaStream_t& stream); #endif +#ifdef ENABLE_FP8 +template void mmha_launch_kernel<__nv_fp8_e4m3, 128, 128, Masked_multihead_attention_params<__nv_fp8_e4m3>>( + const Masked_multihead_attention_params<__nv_fp8_e4m3>& params, const cudaStream_t& stream); +#endif template void mmha_launch_kernel>( const Cross_multihead_attention_params& params, const cudaStream_t& stream); @@ -76,5 +95,9 @@ template void mmha_launch_kernel>( const Cross_multihead_attention_params<__nv_bfloat16>& params, const cudaStream_t& stream); #endif +#ifdef ENABLE_FP8 +template void mmha_launch_kernel<__nv_fp8_e4m3, 128, 128, Cross_multihead_attention_params<__nv_fp8_e4m3>>( + const Cross_multihead_attention_params<__nv_fp8_e4m3>& params, const cudaStream_t& stream); +#endif #undef MMHA_LAUNCH_KERNEL diff --git a/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_144.cu b/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_144.cu index 1751afd65..0da2134e9 100644 --- a/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_144.cu +++ b/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_144.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -24,7 +24,8 @@ //////////////////////////////////////////////////////////////////////////////////////////////////// -#define MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, THDS_PER_KEY, THDS_PER_VALUE, THDS_PER_BLOCK, DO_CROSS_ATTENTION, stream) \ +#define MMHA_LAUNCH_KERNEL( \ + T, Dh, Dh_MAX, THDS_PER_KEY, THDS_PER_VALUE, THDS_PER_BLOCK, DO_CROSS_ATTENTION, HAS_BEAMS, stream) \ size_t smem_sz = mmha::smem_size_in_bytes(params, THDS_PER_VALUE, THDS_PER_BLOCK); \ dim3 grid(params.num_heads, params.batch_size); \ mmha::masked_multihead_attention_kernel<<>>(params) + DO_CROSS_ATTENTION, \ + HAS_BEAMS><<>>(params) //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -44,15 +46,27 @@ void mmha_launch_kernel(const KERNEL_PARAMS_TYPE& params, const cudaStream_t& st constexpr int THREADS_PER_VALUE = Dh_MAX * sizeof(T) / 16; constexpr bool DO_CROSS_ATTENTION = std::is_same>::value; int tlength = (DO_CROSS_ATTENTION) ? params.memory_max_len : params.timestep; - // printf("tlength, CROSS_ATTENTION = %d, %d\n", tlength, DO_CROSS_ATTENTION); - if (tlength < 32) { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, stream); - } - else if (tlength < 2048) { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, stream); + if (params.cache_indir == nullptr) { + if (tlength < 32) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, false, stream); + } + else if (tlength < 2048) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, false, stream); + } + else { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, false, stream); + } } else { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, stream); + if (tlength < 32) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, true, stream); + } + else if (tlength < 2048) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, true, stream); + } + else { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, true, stream); + } } } @@ -66,6 +80,10 @@ template void mmha_launch_kernel>( const Masked_multihead_attention_params<__nv_bfloat16>& params, const cudaStream_t& stream); #endif +#ifdef ENABLE_FP8 +template void mmha_launch_kernel<__nv_fp8_e4m3, 144, 256, Masked_multihead_attention_params<__nv_fp8_e4m3>>( + const Masked_multihead_attention_params<__nv_fp8_e4m3>& params, const cudaStream_t& stream); +#endif template void mmha_launch_kernel>( const Cross_multihead_attention_params& params, const cudaStream_t& stream); @@ -75,5 +93,9 @@ template void mmha_launch_kernel>( const Cross_multihead_attention_params<__nv_bfloat16>& params, const cudaStream_t& stream); #endif +#ifdef ENABLE_FP8 +template void mmha_launch_kernel<__nv_fp8_e4m3, 144, 256, Cross_multihead_attention_params<__nv_fp8_e4m3>>( + const Cross_multihead_attention_params<__nv_fp8_e4m3>& params, const cudaStream_t& stream); +#endif #undef MMHA_LAUNCH_KERNEL diff --git a/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_160.cu b/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_160.cu index 2ad2fd890..86153f37a 100644 --- a/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_160.cu +++ b/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_160.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -24,7 +24,8 @@ //////////////////////////////////////////////////////////////////////////////////////////////////// -#define MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, THDS_PER_KEY, THDS_PER_VALUE, THDS_PER_BLOCK, DO_CROSS_ATTENTION, stream) \ +#define MMHA_LAUNCH_KERNEL( \ + T, Dh, Dh_MAX, THDS_PER_KEY, THDS_PER_VALUE, THDS_PER_BLOCK, DO_CROSS_ATTENTION, HAS_BEAMS, stream) \ size_t smem_sz = mmha::smem_size_in_bytes(params, THDS_PER_VALUE, THDS_PER_BLOCK); \ dim3 grid(params.num_heads, params.batch_size); \ mmha::masked_multihead_attention_kernel<<>>(params) + DO_CROSS_ATTENTION, \ + HAS_BEAMS><<>>(params) //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -41,18 +43,30 @@ template void mmha_launch_kernel(const KERNEL_PARAMS_TYPE& params, const cudaStream_t& stream) { - constexpr int THREADS_PER_VALUE = Dh_MAX * sizeof(T) / 16; + constexpr int THREADS_PER_VALUE = threads_per_value_t::value; constexpr bool DO_CROSS_ATTENTION = std::is_same>::value; int tlength = (DO_CROSS_ATTENTION) ? params.memory_max_len : params.timestep; - // printf("tlength, CROSS_ATTENTION = %d, %d\n", tlength, DO_CROSS_ATTENTION); - if (tlength < 32) { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, stream); - } - else if (tlength < 2048) { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, stream); + if (params.cache_indir == nullptr) { + if (tlength < 32) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, false, stream); + } + else if (tlength < 2048) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, false, stream); + } + else { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, false, stream); + } } else { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, stream); + if (tlength < 32) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, true, stream); + } + else if (tlength < 2048) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, true, stream); + } + else { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, true, stream); + } } } @@ -66,6 +80,10 @@ template void mmha_launch_kernel>( const Masked_multihead_attention_params<__nv_bfloat16>& params, const cudaStream_t& stream); #endif +#ifdef ENABLE_FP8 +template void mmha_launch_kernel<__nv_fp8_e4m3, 160, 256, Masked_multihead_attention_params<__nv_fp8_e4m3>>( + const Masked_multihead_attention_params<__nv_fp8_e4m3>& params, const cudaStream_t& stream); +#endif template void mmha_launch_kernel>( const Cross_multihead_attention_params& params, const cudaStream_t& stream); @@ -75,5 +93,9 @@ template void mmha_launch_kernel>( const Cross_multihead_attention_params<__nv_bfloat16>& params, const cudaStream_t& stream); #endif +#ifdef ENABLE_FP8 +template void mmha_launch_kernel<__nv_fp8_e4m3, 160, 256, Cross_multihead_attention_params<__nv_fp8_e4m3>>( + const Cross_multihead_attention_params<__nv_fp8_e4m3>& params, const cudaStream_t& stream); +#endif #undef MMHA_LAUNCH_KERNEL diff --git a/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_192.cu b/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_192.cu index fade57f91..12c6e22bf 100644 --- a/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_192.cu +++ b/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_192.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -24,7 +24,8 @@ //////////////////////////////////////////////////////////////////////////////////////////////////// -#define MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, THDS_PER_KEY, THDS_PER_VALUE, THDS_PER_BLOCK, DO_CROSS_ATTENTION, stream) \ +#define MMHA_LAUNCH_KERNEL( \ + T, Dh, Dh_MAX, THDS_PER_KEY, THDS_PER_VALUE, THDS_PER_BLOCK, DO_CROSS_ATTENTION, HAS_BEAMS, stream) \ size_t smem_sz = mmha::smem_size_in_bytes(params, THDS_PER_VALUE, THDS_PER_BLOCK); \ dim3 grid(params.num_heads, params.batch_size); \ mmha::masked_multihead_attention_kernel<<>>(params) + DO_CROSS_ATTENTION, \ + HAS_BEAMS><<>>(params) //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -41,18 +43,30 @@ template void mmha_launch_kernel(const KERNEL_PARAMS_TYPE& params, const cudaStream_t& stream) { - constexpr int THREADS_PER_VALUE = Dh_MAX * sizeof(T) / 16; + constexpr int THREADS_PER_VALUE = threads_per_value_t::value; constexpr bool DO_CROSS_ATTENTION = std::is_same>::value; int tlength = (DO_CROSS_ATTENTION) ? params.memory_max_len : params.timestep; - // printf("tlength, CROSS_ATTENTION = %d, %d\n", tlength, DO_CROSS_ATTENTION); - if (tlength < 32) { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, stream); - } - else if (tlength < 2048) { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, stream); + if (params.cache_indir == nullptr) { + if (tlength < 32) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, false, stream); + } + else if (tlength < 2048) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, false, stream); + } + else { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, false, stream); + } } else { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, stream); + if (tlength < 32) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, true, stream); + } + else if (tlength < 2048) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, true, stream); + } + else { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, true, stream); + } } } @@ -66,6 +80,10 @@ template void mmha_launch_kernel>( const Masked_multihead_attention_params<__nv_bfloat16>& params, const cudaStream_t& stream); #endif +#ifdef ENABLE_FP8 +template void mmha_launch_kernel<__nv_fp8_e4m3, 192, 256, Masked_multihead_attention_params<__nv_fp8_e4m3>>( + const Masked_multihead_attention_params<__nv_fp8_e4m3>& params, const cudaStream_t& stream); +#endif template void mmha_launch_kernel>( const Cross_multihead_attention_params& params, const cudaStream_t& stream); @@ -75,5 +93,9 @@ template void mmha_launch_kernel>( const Cross_multihead_attention_params<__nv_bfloat16>& params, const cudaStream_t& stream); #endif +#ifdef ENABLE_FP8 +template void mmha_launch_kernel<__nv_fp8_e4m3, 192, 256, Cross_multihead_attention_params<__nv_fp8_e4m3>>( + const Cross_multihead_attention_params<__nv_fp8_e4m3>& params, const cudaStream_t& stream); +#endif #undef MMHA_LAUNCH_KERNEL diff --git a/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_224.cu b/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_224.cu index 7b54f42aa..7b17ae7b7 100644 --- a/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_224.cu +++ b/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_224.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -24,7 +24,8 @@ //////////////////////////////////////////////////////////////////////////////////////////////////// -#define MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, THDS_PER_KEY, THDS_PER_VALUE, THDS_PER_BLOCK, DO_CROSS_ATTENTION, stream) \ +#define MMHA_LAUNCH_KERNEL( \ + T, Dh, Dh_MAX, THDS_PER_KEY, THDS_PER_VALUE, THDS_PER_BLOCK, DO_CROSS_ATTENTION, HAS_BEAMS, stream) \ size_t smem_sz = mmha::smem_size_in_bytes(params, THDS_PER_VALUE, THDS_PER_BLOCK); \ dim3 grid(params.num_heads, params.batch_size); \ mmha::masked_multihead_attention_kernel<<>>(params) + DO_CROSS_ATTENTION, \ + HAS_BEAMS><<>>(params) //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -41,18 +43,30 @@ template void mmha_launch_kernel(const KERNEL_PARAMS_TYPE& params, const cudaStream_t& stream) { - constexpr int THREADS_PER_VALUE = Dh_MAX * sizeof(T) / 16; + constexpr int THREADS_PER_VALUE = threads_per_value_t::value; constexpr bool DO_CROSS_ATTENTION = std::is_same>::value; int tlength = (DO_CROSS_ATTENTION) ? params.memory_max_len : params.timestep; - // printf("tlength, CROSS_ATTENTION = %d, %d\n", tlength, DO_CROSS_ATTENTION); - if (tlength < 32) { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, stream); - } - else if (tlength < 2048) { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, stream); + if (params.cache_indir == nullptr) { + if (tlength < 32) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, false, stream); + } + else if (tlength < 2048) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, false, stream); + } + else { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, false, stream); + } } else { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, stream); + if (tlength < 32) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, true, stream); + } + else if (tlength < 2048) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, true, stream); + } + else { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, true, stream); + } } } @@ -66,6 +80,10 @@ template void mmha_launch_kernel>( const Masked_multihead_attention_params<__nv_bfloat16>& params, const cudaStream_t& stream); #endif +#ifdef ENABLE_FP8 +template void mmha_launch_kernel<__nv_fp8_e4m3, 224, 256, Masked_multihead_attention_params<__nv_fp8_e4m3>>( + const Masked_multihead_attention_params<__nv_fp8_e4m3>& params, const cudaStream_t& stream); +#endif template void mmha_launch_kernel>( const Cross_multihead_attention_params& params, const cudaStream_t& stream); @@ -75,5 +93,9 @@ template void mmha_launch_kernel>( const Cross_multihead_attention_params<__nv_bfloat16>& params, const cudaStream_t& stream); #endif +#ifdef ENABLE_FP8 +template void mmha_launch_kernel<__nv_fp8_e4m3, 224, 256, Cross_multihead_attention_params<__nv_fp8_e4m3>>( + const Cross_multihead_attention_params<__nv_fp8_e4m3>& params, const cudaStream_t& stream); +#endif #undef MMHA_LAUNCH_KERNEL diff --git a/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_256.cu b/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_256.cu index 96a19e13b..e17fa03ae 100644 --- a/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_256.cu +++ b/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_256.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -24,7 +24,8 @@ //////////////////////////////////////////////////////////////////////////////////////////////////// -#define MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, THDS_PER_KEY, THDS_PER_VALUE, THDS_PER_BLOCK, DO_CROSS_ATTENTION, stream) \ +#define MMHA_LAUNCH_KERNEL( \ + T, Dh, Dh_MAX, THDS_PER_KEY, THDS_PER_VALUE, THDS_PER_BLOCK, DO_CROSS_ATTENTION, HAS_BEAMS, stream) \ size_t smem_sz = mmha::smem_size_in_bytes(params, THDS_PER_VALUE, THDS_PER_BLOCK); \ dim3 grid(params.num_heads, params.batch_size); \ mmha::masked_multihead_attention_kernel<<>>(params) + DO_CROSS_ATTENTION, \ + HAS_BEAMS><<>>(params) //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -41,18 +43,30 @@ template void mmha_launch_kernel(const KERNEL_PARAMS_TYPE& params, const cudaStream_t& stream) { - constexpr int THREADS_PER_VALUE = Dh_MAX * sizeof(T) / 16; + constexpr int THREADS_PER_VALUE = threads_per_value_t::value; constexpr bool DO_CROSS_ATTENTION = std::is_same>::value; int tlength = (DO_CROSS_ATTENTION) ? params.memory_max_len : params.timestep; - // printf("tlength, CROSS_ATTENTION = %d, %d\n", tlength, DO_CROSS_ATTENTION); - if (tlength < 32) { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, stream); - } - else if (tlength < 2048) { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, stream); + if (params.cache_indir == nullptr) { + if (tlength < 32) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, false, stream); + } + else if (tlength < 2048) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, false, stream); + } + else { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, false, stream); + } } else { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, stream); + if (tlength < 32) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, true, stream); + } + else if (tlength < 2048) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, true, stream); + } + else { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, true, stream); + } } } @@ -66,6 +80,10 @@ template void mmha_launch_kernel>( const Masked_multihead_attention_params<__nv_bfloat16>& params, const cudaStream_t& stream); #endif +#ifdef ENABLE_FP8 +template void mmha_launch_kernel<__nv_fp8_e4m3, 256, 256, Masked_multihead_attention_params<__nv_fp8_e4m3>>( + const Masked_multihead_attention_params<__nv_fp8_e4m3>& params, const cudaStream_t& stream); +#endif template void mmha_launch_kernel>( const Cross_multihead_attention_params& params, const cudaStream_t& stream); @@ -75,5 +93,9 @@ template void mmha_launch_kernel>( const Cross_multihead_attention_params<__nv_bfloat16>& params, const cudaStream_t& stream); #endif +#ifdef ENABLE_FP8 +template void mmha_launch_kernel<__nv_fp8_e4m3, 256, 256, Cross_multihead_attention_params<__nv_fp8_e4m3>>( + const Cross_multihead_attention_params<__nv_fp8_e4m3>& params, const cudaStream_t& stream); +#endif #undef MMHA_LAUNCH_KERNEL diff --git a/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_32.cu b/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_32.cu index bde032890..91ecc2f46 100644 --- a/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_32.cu +++ b/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_32.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -24,7 +24,8 @@ //////////////////////////////////////////////////////////////////////////////////////////////////// -#define MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, THDS_PER_KEY, THDS_PER_VALUE, THDS_PER_BLOCK, DO_CROSS_ATTENTION, stream) \ +#define MMHA_LAUNCH_KERNEL( \ + T, Dh, Dh_MAX, THDS_PER_KEY, THDS_PER_VALUE, THDS_PER_BLOCK, DO_CROSS_ATTENTION, HAS_BEAMS, stream) \ size_t smem_sz = mmha::smem_size_in_bytes(params, THDS_PER_VALUE, THDS_PER_BLOCK); \ dim3 grid(params.num_heads, params.batch_size); \ mmha::masked_multihead_attention_kernel<<>>(params) + DO_CROSS_ATTENTION, \ + HAS_BEAMS><<>>(params) //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -41,18 +43,30 @@ template void mmha_launch_kernel(const KERNEL_PARAMS_TYPE& params, const cudaStream_t& stream) { - constexpr int THREADS_PER_VALUE = Dh_MAX * sizeof(T) / 16; + constexpr int THREADS_PER_VALUE = threads_per_value_t::value; constexpr bool DO_CROSS_ATTENTION = std::is_same>::value; int tlength = (DO_CROSS_ATTENTION) ? params.memory_max_len : params.timestep; - // printf("tlength, CROSS_ATTENTION = %d, %d\n", tlength, DO_CROSS_ATTENTION); - if (tlength < 32) { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, stream); - } - else if (tlength < 2048) { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, stream); + if (params.cache_indir == nullptr) { + if (tlength < 32) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, false, stream); + } + else if (tlength < 2048) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, false, stream); + } + else { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, false, stream); + } } else { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, stream); + if (tlength < 32) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, true, stream); + } + else if (tlength < 2048) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, true, stream); + } + else { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, true, stream); + } } } @@ -66,6 +80,10 @@ template void mmha_launch_kernel>( const Masked_multihead_attention_params<__nv_bfloat16>& params, const cudaStream_t& stream); #endif +#ifdef ENABLE_FP8 +template void mmha_launch_kernel<__nv_fp8_e4m3, 32, 32, Masked_multihead_attention_params<__nv_fp8_e4m3>>( + const Masked_multihead_attention_params<__nv_fp8_e4m3>& params, const cudaStream_t& stream); +#endif template void mmha_launch_kernel>( const Cross_multihead_attention_params& params, const cudaStream_t& stream); @@ -75,5 +93,9 @@ template void mmha_launch_kernel>( const Cross_multihead_attention_params<__nv_bfloat16>& params, const cudaStream_t& stream); #endif +#ifdef ENABLE_FP8 +template void mmha_launch_kernel<__nv_fp8_e4m3, 32, 32, Cross_multihead_attention_params<__nv_fp8_e4m3>>( + const Cross_multihead_attention_params<__nv_fp8_e4m3>& params, const cudaStream_t& stream); +#endif #undef MMHA_LAUNCH_KERNEL diff --git a/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_48.cu b/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_48.cu index 3ec41a83d..79bf3ca83 100644 --- a/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_48.cu +++ b/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_48.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -24,7 +24,8 @@ //////////////////////////////////////////////////////////////////////////////////////////////////// -#define MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, THDS_PER_KEY, THDS_PER_VALUE, THDS_PER_BLOCK, DO_CROSS_ATTENTION, stream) \ +#define MMHA_LAUNCH_KERNEL( \ + T, Dh, Dh_MAX, THDS_PER_KEY, THDS_PER_VALUE, THDS_PER_BLOCK, DO_CROSS_ATTENTION, HAS_BEAMS, stream) \ size_t smem_sz = mmha::smem_size_in_bytes(params, THDS_PER_VALUE, THDS_PER_BLOCK); \ dim3 grid(params.num_heads, params.batch_size); \ mmha::masked_multihead_attention_kernel<<>>(params) + DO_CROSS_ATTENTION, \ + HAS_BEAMS><<>>(params) //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -41,18 +43,30 @@ template void mmha_launch_kernel(const KERNEL_PARAMS_TYPE& params, const cudaStream_t& stream) { - constexpr int THREADS_PER_VALUE = Dh_MAX * sizeof(T) / 16; + constexpr int THREADS_PER_VALUE = threads_per_value_t::value; constexpr bool DO_CROSS_ATTENTION = std::is_same>::value; int tlength = (DO_CROSS_ATTENTION) ? params.memory_max_len : params.timestep; - // printf("tlength, CROSS_ATTENTION = %d, %d\n", tlength, DO_CROSS_ATTENTION); - if (tlength < 32) { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, stream); - } - else if (tlength < 2048) { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, stream); + if (params.cache_indir == nullptr) { + if (tlength < 32) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, false, stream); + } + else if (tlength < 2048) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, false, stream); + } + else { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, false, stream); + } } else { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, stream); + if (tlength < 32) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, true, stream); + } + else if (tlength < 2048) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, true, stream); + } + else { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, true, stream); + } } } @@ -66,6 +80,10 @@ template void mmha_launch_kernel>( const Masked_multihead_attention_params<__nv_bfloat16>& params, const cudaStream_t& stream); #endif +#ifdef ENABLE_FP8 +template void mmha_launch_kernel<__nv_fp8_e4m3, 48, 64, Masked_multihead_attention_params<__nv_fp8_e4m3>>( + const Masked_multihead_attention_params<__nv_fp8_e4m3>& params, const cudaStream_t& stream); +#endif template void mmha_launch_kernel>( const Cross_multihead_attention_params& params, const cudaStream_t& stream); @@ -75,5 +93,9 @@ template void mmha_launch_kernel>( const Cross_multihead_attention_params<__nv_bfloat16>& params, const cudaStream_t& stream); #endif +#ifdef ENABLE_FP8 +template void mmha_launch_kernel<__nv_fp8_e4m3, 48, 64, Cross_multihead_attention_params<__nv_fp8_e4m3>>( + const Cross_multihead_attention_params<__nv_fp8_e4m3>& params, const cudaStream_t& stream); +#endif #undef MMHA_LAUNCH_KERNEL \ No newline at end of file diff --git a/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_64.cu b/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_64.cu index 5033517df..a4156e071 100644 --- a/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_64.cu +++ b/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_64.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -24,7 +24,8 @@ //////////////////////////////////////////////////////////////////////////////////////////////////// -#define MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, THDS_PER_KEY, THDS_PER_VALUE, THDS_PER_BLOCK, DO_CROSS_ATTENTION, stream) \ +#define MMHA_LAUNCH_KERNEL( \ + T, Dh, Dh_MAX, THDS_PER_KEY, THDS_PER_VALUE, THDS_PER_BLOCK, DO_CROSS_ATTENTION, HAS_BEAMS, stream) \ size_t smem_sz = mmha::smem_size_in_bytes(params, THDS_PER_VALUE, THDS_PER_BLOCK); \ dim3 grid(params.num_heads, params.batch_size); \ mmha::masked_multihead_attention_kernel<<>>(params) + DO_CROSS_ATTENTION, \ + HAS_BEAMS><<>>(params) //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -41,18 +43,30 @@ template void mmha_launch_kernel(const KERNEL_PARAMS_TYPE& params, const cudaStream_t& stream) { - constexpr int THREADS_PER_VALUE = Dh_MAX * sizeof(T) / 16; + constexpr int THREADS_PER_VALUE = threads_per_value_t::value; constexpr bool DO_CROSS_ATTENTION = std::is_same>::value; int tlength = (DO_CROSS_ATTENTION) ? params.memory_max_len : params.timestep; - // printf("tlength, CROSS_ATTENTION = %d, %d\n", tlength, DO_CROSS_ATTENTION); - if (tlength < 32) { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, stream); - } - else if (tlength < 2048) { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, stream); + if (params.cache_indir == nullptr) { + if (tlength < 32) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, false, stream); + } + else if (tlength < 2048) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, false, stream); + } + else { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, false, stream); + } } else { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, stream); + if (tlength < 32) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, true, stream); + } + else if (tlength < 2048) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, true, stream); + } + else { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, true, stream); + } } } @@ -66,6 +80,10 @@ template void mmha_launch_kernel>( const Masked_multihead_attention_params<__nv_bfloat16>& params, const cudaStream_t& stream); #endif +#ifdef ENABLE_FP8 +template void mmha_launch_kernel<__nv_fp8_e4m3, 64, 64, Masked_multihead_attention_params<__nv_fp8_e4m3>>( + const Masked_multihead_attention_params<__nv_fp8_e4m3>& params, const cudaStream_t& stream); +#endif template void mmha_launch_kernel>( const Cross_multihead_attention_params& params, const cudaStream_t& stream); @@ -75,5 +93,9 @@ template void mmha_launch_kernel>( const Cross_multihead_attention_params<__nv_bfloat16>& params, const cudaStream_t& stream); #endif +#ifdef ENABLE_FP8 +template void mmha_launch_kernel<__nv_fp8_e4m3, 64, 64, Cross_multihead_attention_params<__nv_fp8_e4m3>>( + const Cross_multihead_attention_params<__nv_fp8_e4m3>& params, const cudaStream_t& stream); +#endif #undef MMHA_LAUNCH_KERNEL diff --git a/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_80.cu b/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_80.cu index c1931a19f..b94345952 100644 --- a/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_80.cu +++ b/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_80.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -24,7 +24,8 @@ //////////////////////////////////////////////////////////////////////////////////////////////////// -#define MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, THDS_PER_KEY, THDS_PER_VALUE, THDS_PER_BLOCK, DO_CROSS_ATTENTION, stream) \ +#define MMHA_LAUNCH_KERNEL( \ + T, Dh, Dh_MAX, THDS_PER_KEY, THDS_PER_VALUE, THDS_PER_BLOCK, DO_CROSS_ATTENTION, HAS_BEAMS, stream) \ size_t smem_sz = mmha::smem_size_in_bytes(params, THDS_PER_VALUE, THDS_PER_BLOCK); \ dim3 grid(params.num_heads, params.batch_size); \ mmha::masked_multihead_attention_kernel<<>>(params) + DO_CROSS_ATTENTION, \ + HAS_BEAMS><<>>(params) //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -41,18 +43,30 @@ template void mmha_launch_kernel(const KERNEL_PARAMS_TYPE& params, const cudaStream_t& stream) { - constexpr int THREADS_PER_VALUE = Dh_MAX * sizeof(T) / 16; + constexpr int THREADS_PER_VALUE = threads_per_value_t::value; constexpr bool DO_CROSS_ATTENTION = std::is_same>::value; int tlength = (DO_CROSS_ATTENTION) ? params.memory_max_len : params.timestep; - // printf("tlength, CROSS_ATTENTION = %d, %d\n", tlength, DO_CROSS_ATTENTION); - if (tlength < 32) { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, stream); - } - else if (tlength < 2048) { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, stream); + if (params.cache_indir == nullptr) { + if (tlength < 32) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, false, stream); + } + else if (tlength < 2048) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, false, stream); + } + else { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, false, stream); + } } else { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, stream); + if (tlength < 32) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, true, stream); + } + else if (tlength < 2048) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, true, stream); + } + else { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, true, stream); + } } } @@ -66,6 +80,10 @@ template void mmha_launch_kernel>( const Masked_multihead_attention_params<__nv_bfloat16>& params, const cudaStream_t& stream); #endif +#ifdef ENABLE_FP8 +template void mmha_launch_kernel<__nv_fp8_e4m3, 80, 128, Masked_multihead_attention_params<__nv_fp8_e4m3>>( + const Masked_multihead_attention_params<__nv_fp8_e4m3>& params, const cudaStream_t& stream); +#endif template void mmha_launch_kernel>( const Cross_multihead_attention_params& params, const cudaStream_t& stream); @@ -75,5 +93,9 @@ template void mmha_launch_kernel>( const Cross_multihead_attention_params<__nv_bfloat16>& params, const cudaStream_t& stream); #endif +#ifdef ENABLE_FP8 +template void mmha_launch_kernel<__nv_fp8_e4m3, 80, 128, Cross_multihead_attention_params<__nv_fp8_e4m3>>( + const Cross_multihead_attention_params<__nv_fp8_e4m3>& params, const cudaStream_t& stream); +#endif #undef MMHA_LAUNCH_KERNEL diff --git a/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_96.cu b/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_96.cu index d4a563ede..6e754fd14 100644 --- a/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_96.cu +++ b/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_96.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -24,7 +24,8 @@ //////////////////////////////////////////////////////////////////////////////////////////////////// -#define MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, THDS_PER_KEY, THDS_PER_VALUE, THDS_PER_BLOCK, DO_CROSS_ATTENTION, stream) \ +#define MMHA_LAUNCH_KERNEL( \ + T, Dh, Dh_MAX, THDS_PER_KEY, THDS_PER_VALUE, THDS_PER_BLOCK, DO_CROSS_ATTENTION, HAS_BEAMS, stream) \ size_t smem_sz = mmha::smem_size_in_bytes(params, THDS_PER_VALUE, THDS_PER_BLOCK); \ dim3 grid(params.num_heads, params.batch_size); \ mmha::masked_multihead_attention_kernel<<>>(params) + DO_CROSS_ATTENTION, \ + HAS_BEAMS><<>>(params) //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -41,18 +43,30 @@ template void mmha_launch_kernel(const KERNEL_PARAMS_TYPE& params, const cudaStream_t& stream) { - constexpr int THREADS_PER_VALUE = Dh_MAX * sizeof(T) / 16; + constexpr int THREADS_PER_VALUE = threads_per_value_t::value; constexpr bool DO_CROSS_ATTENTION = std::is_same>::value; int tlength = (DO_CROSS_ATTENTION) ? params.memory_max_len : params.timestep; - // printf("tlength, CROSS_ATTENTION = %d, %d\n", tlength, DO_CROSS_ATTENTION); - if (tlength < 32) { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, stream); - } - else if (tlength < 2048) { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, stream); + if (params.cache_indir == nullptr) { + if (tlength < 32) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, false, stream); + } + else if (tlength < 2048) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, false, stream); + } + else { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, false, stream); + } } else { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, stream); + if (tlength < 32) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, true, stream); + } + else if (tlength < 2048) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, true, stream); + } + else { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, true, stream); + } } } @@ -66,6 +80,10 @@ template void mmha_launch_kernel>( const Masked_multihead_attention_params<__nv_bfloat16>& params, const cudaStream_t& stream); #endif +#ifdef ENABLE_FP8 +template void mmha_launch_kernel<__nv_fp8_e4m3, 96, 128, Masked_multihead_attention_params<__nv_fp8_e4m3>>( + const Masked_multihead_attention_params<__nv_fp8_e4m3>& params, const cudaStream_t& stream); +#endif template void mmha_launch_kernel>( const Cross_multihead_attention_params& params, const cudaStream_t& stream); @@ -75,5 +93,9 @@ template void mmha_launch_kernel>( const Cross_multihead_attention_params<__nv_bfloat16>& params, const cudaStream_t& stream); #endif +#ifdef ENABLE_FP8 +template void mmha_launch_kernel<__nv_fp8_e4m3, 96, 128, Cross_multihead_attention_params<__nv_fp8_e4m3>>( + const Cross_multihead_attention_params<__nv_fp8_e4m3>& params, const cudaStream_t& stream); +#endif #undef MMHA_LAUNCH_KERNEL diff --git a/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_template.hpp b/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_template.hpp index 348b8c0c3..8e7cb92a2 100644 --- a/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_template.hpp +++ b/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_template.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -18,6 +18,7 @@ #include "src/fastertransformer/kernels/decoder_masked_multihead_attention.h" #include "src/fastertransformer/kernels/decoder_masked_multihead_attention_utils.h" #include "src/fastertransformer/utils/cuda_bf16_wrapper.h" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" #include "src/fastertransformer/utils/cuda_type_utils.cuh" #include #include @@ -79,147 +80,266 @@ namespace mmha { //////////////////////////////////////////////////////////////////////////////////////////////////// template -struct Qk_vec_ { +struct Qk_vec_m_ { }; template<> -struct Qk_vec_ { +struct Qk_vec_m_ { using Type = float; }; template<> -struct Qk_vec_ { +struct Qk_vec_m_ { using Type = float2; }; template<> -struct Qk_vec_ { +struct Qk_vec_m_ { using Type = float4; }; template<> -struct Qk_vec_ { +struct Qk_vec_m_ { using Type = float4; }; template<> -struct Qk_vec_ { +struct Qk_vec_m_ { using Type = uint32_t; }; template<> -struct Qk_vec_ { +struct Qk_vec_m_ { using Type = uint32_t; }; template<> -struct Qk_vec_ { +struct Qk_vec_m_ { using Type = uint2; }; template<> -struct Qk_vec_ { +struct Qk_vec_m_ { using Type = uint4; }; #ifdef ENABLE_BF16 template<> -struct Qk_vec_<__nv_bfloat16, 32> { +struct Qk_vec_m_<__nv_bfloat16, 32> { using Type = __nv_bfloat162; }; template<> -struct Qk_vec_<__nv_bfloat16, 64> { +struct Qk_vec_m_<__nv_bfloat16, 64> { using Type = __nv_bfloat162; }; template<> -struct Qk_vec_<__nv_bfloat16, 128> { +struct Qk_vec_m_<__nv_bfloat16, 128> { using Type = bf16_4_t; }; template<> -struct Qk_vec_<__nv_bfloat16, 256> { +struct Qk_vec_m_<__nv_bfloat16, 256> { using Type = bf16_8_t; }; #endif // ENABLE_BF16 + +#ifdef ENABLE_FP8 +template<> +struct Qk_vec_m_<__nv_fp8_e4m3, 32> { + using Type = fp8_4_t; +}; +template<> +struct Qk_vec_m_<__nv_fp8_e4m3, 64> { + using Type = fp8_4_t; +}; +template<> +struct Qk_vec_m_<__nv_fp8_e4m3, 128> { + using Type = fp8_4_t; +}; +template<> +struct Qk_vec_m_<__nv_fp8_e4m3, 256> { + using Type = fp8_4_t; +}; +#endif // ENABLE_FP8 + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +template +struct Qk_vec_k_ { + using Type = typename Qk_vec_m_::Type; +}; +#ifdef ENABLE_FP8 +template<> +struct Qk_vec_k_<__nv_fp8_e4m3, 32> { + using Type = float4; +}; +template<> +struct Qk_vec_k_<__nv_fp8_e4m3, 64> { + using Type = float4; +}; +template<> +struct Qk_vec_k_<__nv_fp8_e4m3, 128> { + using Type = float4; +}; +template<> +struct Qk_vec_k_<__nv_fp8_e4m3, 256> { + using Type = float4; +}; +#endif // ENABLE_FP8 + //////////////////////////////////////////////////////////////////////////////////////////////////// template -struct K_vec_ { +struct K_vec_m_ { }; template<> -struct K_vec_ { +struct K_vec_m_ { using Type = float; }; template<> -struct K_vec_ { +struct K_vec_m_ { using Type = float2; }; template<> -struct K_vec_ { +struct K_vec_m_ { using Type = float4; }; template<> -struct K_vec_ { +struct K_vec_m_ { using Type = uint32_t; }; template<> -struct K_vec_ { +struct K_vec_m_ { using Type = uint2; }; template<> -struct K_vec_ { +struct K_vec_m_ { using Type = uint4; }; #ifdef ENABLE_BF16 template<> -struct K_vec_<__nv_bfloat16, 4> { +struct K_vec_m_<__nv_bfloat16, 4> { using Type = __nv_bfloat162; }; template<> -struct K_vec_<__nv_bfloat16, 2> { +struct K_vec_m_<__nv_bfloat16, 2> { using Type = bf16_4_t; }; template<> -struct K_vec_<__nv_bfloat16, 1> { +struct K_vec_m_<__nv_bfloat16, 1> { using Type = bf16_8_t; }; #endif // ENABLE_BF16 + +// NOTE: THREADS_PER_KEY * sizeof(K_vec_m_) = 128 bytes +#ifdef ENABLE_FP8 +template<> +struct K_vec_m_<__nv_fp8_e4m3, 4> { + using Type = fp8_4_t; +}; +template<> +struct K_vec_m_<__nv_fp8_e4m3, 2> { + using Type = fp8_4_t; +}; // Defined for compilation-purpose only, do not use +template<> +struct K_vec_m_<__nv_fp8_e4m3, 1> { + using Type = fp8_4_t; +}; // Defined for compilation-purpose only, do not use +#endif // ENABLE_FP8 + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +template +struct K_vec_k_ { + using Type = typename K_vec_m_::Type; +}; +#ifdef ENABLE_FP8 +template<> +struct K_vec_k_<__nv_fp8_e4m3, 4> { + using Type = float4; +}; +template<> +struct K_vec_k_<__nv_fp8_e4m3, 2> { + using Type = float4; +}; // Defined for compilation-purpose only, do not use +template<> +struct K_vec_k_<__nv_fp8_e4m3, 1> { + using Type = float4; +}; // Defined for compilation-purpose only, do not use +#endif // ENABLE_FP8 + //////////////////////////////////////////////////////////////////////////////////////////////////// template -struct V_vec_ { +struct V_vec_m_ { }; template<> -struct V_vec_ { +struct V_vec_m_ { using Type = float; }; template<> -struct V_vec_ { +struct V_vec_m_ { using Type = float2; }; template<> -struct V_vec_ { +struct V_vec_m_ { using Type = float4; }; template<> -struct V_vec_ { +struct V_vec_m_ { using Type = uint32_t; }; template<> -struct V_vec_ { +struct V_vec_m_ { using Type = uint2; }; template<> -struct V_vec_ { +struct V_vec_m_ { using Type = uint4; }; #ifdef ENABLE_BF16 template<> -struct V_vec_<__nv_bfloat16, 2> { +struct V_vec_m_<__nv_bfloat16, 2> { using Type = __nv_bfloat162; }; template<> -struct V_vec_<__nv_bfloat16, 4> { +struct V_vec_m_<__nv_bfloat16, 4> { using Type = bf16_4_t; }; template<> -struct V_vec_<__nv_bfloat16, 8> { +struct V_vec_m_<__nv_bfloat16, 8> { using Type = bf16_8_t; }; #endif // ENABLE_BF16 +#ifdef ENABLE_FP8 +template<> +struct V_vec_m_<__nv_fp8_e4m3, 4> { + using Type = fp8_4_t; +}; +template<> +struct V_vec_m_<__nv_fp8_e4m3, 8> { + using Type = fp8_4_t; +}; +template<> +struct V_vec_m_<__nv_fp8_e4m3, 16> { + using Type = fp8_4_t; +}; +#endif // ENABLE_FP8 + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +template +struct V_vec_k_ { + using Type = typename V_vec_m_::Type; +}; +#ifdef ENABLE_FP8 +template<> +struct V_vec_k_<__nv_fp8_e4m3, 4> { + using Type = float4; +}; +template<> +struct V_vec_k_<__nv_fp8_e4m3, 8> { + using Type = float4; +}; +template<> +struct V_vec_k_<__nv_fp8_e4m3, 16> { + using Type = float4; +}; +#endif + //////////////////////////////////////////////////////////////////////////////////////////////////// #ifdef MMHA_USE_FP32_ACUM_FOR_FMA @@ -289,6 +409,20 @@ template<> struct Qk_vec_acum_fp32_ { using Type = Float8_; }; +#ifdef ENABLE_FP8 +// template<> +// struct Qk_vec_acum_fp32_ { +// using Type = float2; +// }; +template<> +struct Qk_vec_acum_fp32_ { + using Type = Float4_; +}; +// template<> +// struct Qk_vec_acum_fp32_ { +// using Type = Float4_; +// }; +#endif // ENABLE_FP8 //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -336,7 +470,21 @@ template<> struct K_vec_acum_fp32_ { using Type = Float8_; }; -#endif +#ifdef ENABLE_FP8 +// template<> +// struct K_vec_acum_fp32_ { +// using Type = float2; +// }; +template<> +struct K_vec_acum_fp32_ { + using Type = Float4_; +}; +// template<> +// struct K_vec_acum_fp32_ { +// using Type = Float4_; +// }; +#endif // ENABLE_FP8 +#endif // MMHA_USE_FP32_ACUM_FOR_FMA //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -383,7 +531,65 @@ struct V_vec_acum_fp32_ { using Type = Float8_; }; #endif // ENABLE_BF16 +#ifdef ENABLE_FP8 +// template<> +// struct V_vec_acum_fp32_ { +// using Type = float2; +// }; +template<> +struct V_vec_acum_fp32_ { + using Type = Float4_; +}; +// template<> +// struct V_vec_acum_fp32_ { +// using Type = Float4_; +// }; +#endif // ENABLE_FP8 #endif + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +template +__inline__ __device__ Tout vec_conversion(const Tin& x) +{ + return x; +} +#ifdef ENABLE_FP8 +// fp8_t +template<> +__inline__ __device__ float vec_conversion(const __nv_fp8_e4m3& a) +{ + return float(a); +} +template<> +__inline__ __device__ __nv_fp8_e4m3 vec_conversion<__nv_fp8_e4m3, float>(const float& a) +{ + return __nv_fp8_e4m3(a); +} +// fp8_2_t +template<> +__inline__ __device__ float2 vec_conversion(const fp8_2_t& a) +{ + return float2(a); +} +template<> +__inline__ __device__ fp8_2_t vec_conversion(const float2& a) +{ + return fp8_2_t(a); +} +// fp8_4_t +template<> +__inline__ __device__ float4 vec_conversion(const fp8_4_t& a) +{ + return float4(a); +} +template<> +__inline__ __device__ fp8_4_t vec_conversion(const float4& a) +{ + return fp8_4_t(a); +} +#endif // ENABLE_FP8 + //////////////////////////////////////////////////////////////////////////////////////////////////// template @@ -624,6 +830,19 @@ inline __device__ void convert_from_float(bf16_8_t& dst, Float8_ src) //////////////////////////////////////////////////////////////////////////////////////////////////// +#ifdef ENABLE_FP8 +inline __device__ void convert_from_float(fp8_4_t& dst, float4 src) +{ + dst = fp8_4_t(src); +} +inline __device__ void convert_from_float(fp8_2_t& dst, float2 src) +{ + dst = fp8_2_t(src); +} +#endif + +//////////////////////////////////////////////////////////////////////////////////////////////////// + inline __device__ void convert_from_float(float2& dst, float2 src) { dst = src; @@ -823,11 +1042,26 @@ inline __device__ __host__ T div_up(T m, T n) //////////////////////////////////////////////////////////////////////////////////////////////////// +template +struct kernel_type_t { + using Type = T; +}; + +#ifdef ENABLE_FP8 +template<> +struct kernel_type_t<__nv_fp8_e4m3> { + using Type = float; +}; +#endif + +//////////////////////////////////////////////////////////////////////////////////////////////////// + template inline size_t smem_size_in_bytes(const Multihead_attention_params& params, int threads_per_value, int threads_per_block) { + using Tk = typename kernel_type_t::Type; // The amount of shared memory needed to store the Q*K^T values in float. const int max_timesteps = min(params.timestep, params.memory_max_len); size_t qk_sz = (DO_CROSS_ATTENTION) ? div_up(params.memory_max_len + 1, 4) * 16 : div_up(max_timesteps + 1, 4) * 16; @@ -835,10 +1069,10 @@ inline size_t smem_size_in_bytes(const Multihead_attention_params 0 && params.neox_rotary_style) { - transpose_rotary_size = 2 * params.rotary_embedding_dim * sizeof(T); + transpose_rotary_size = 2 * params.rotary_embedding_dim * sizeof(Tk); } // The max. @@ -880,10 +1114,18 @@ template< int THREADS_PER_VALUE, // The number of threads in a threadblock. int THREADS_PER_BLOCK, - bool DO_CROSS_ATTENTION> + bool DO_CROSS_ATTENTION, + bool HAS_BEAMS> __global__ void masked_multihead_attention_kernel(Multihead_attention_params params) { + using Tk = typename kernel_type_t::Type; +#ifdef ENABLE_FP8 + // FP8 MHA Scales + constexpr bool FP8_MHA_KERNEL = std::is_same::value; +#else + constexpr bool FP8_MHA_KERNEL = false; +#endif // Make sure the hidden dimension per head is a multiple of the number of threads per key. static_assert(Dh_MAX % THREADS_PER_KEY == 0, ""); // Make sure the hidden dimension per head is a multiple of the number of threads per value. @@ -903,37 +1145,36 @@ __global__ void masked_multihead_attention_kernel(Multihead_attention_params(logits_smem_); + Tk* logits_smem = reinterpret_cast(logits_smem_); #else - float* logits_smem = reinterpret_cast(logits_smem_); + float* logits_smem = reinterpret_cast(logits_smem_); #endif // The shared memory to do the final reduction for the output values. Reuse qk_smem. - T* out_smem = reinterpret_cast(smem_); + Tk* out_smem = reinterpret_cast(smem_); // The shared memory buffers for the block-wide reductions. One for max, one for sum. __shared__ float red_smem[WARPS_PER_BLOCK * 2]; // A vector of Q or K elements for the current timestep. - using Qk_vec = typename Qk_vec_::Type; + using Qk_vec_k = typename Qk_vec_k_::Type; // with kernel-used precision + using Qk_vec_m = typename Qk_vec_m_::Type; // with memory-used precision - // Use alignment for safely casting the shared buffers as Qk_vec. + // Use alignment for safely casting the shared buffers as Qk_vec_k. // Shared memory to store Q inputs. - __shared__ __align__(sizeof(Qk_vec)) T q_smem[Dh_MAX]; + __shared__ __align__(sizeof(Qk_vec_k)) Tk q_smem[Dh_MAX]; // This is one of the reasons we should have a separate kernel for cross attention - __shared__ __align__(sizeof(Qk_vec)) T bias_smem[DO_CROSS_ATTENTION ? Dh_MAX : 1]; + __shared__ __align__(sizeof(Qk_vec_k)) Tk bias_smem[DO_CROSS_ATTENTION ? Dh_MAX : 1]; - // A vector of Q or K elements for the current timestep. - using Qk_vec = typename Qk_vec_::Type; // The number of elements per vector. - constexpr int QK_VEC_SIZE = sizeof(Qk_vec) / sizeof(T); + constexpr int QK_VEC_SIZE = sizeof(Qk_vec_m) / sizeof(T); // Make sure the hidden size per head is a multiple of the vector size. static_assert(Dh_MAX % QK_VEC_SIZE == 0, ""); // We will use block wide reduction if needed @@ -941,14 +1182,14 @@ __global__ void masked_multihead_attention_kernel(Multihead_attention_params::value>::type; - using Packed_Float_t = typename packed_type::value>::type; + using Packed_Int8_t = typename packed_type::value>::type; + using Packed_Float_t = typename packed_type::value>::type; const auto q_scaling = params.qkv_scale_out[0]; const auto q_quant = *reinterpret_cast(&reinterpret_cast(params.q)[qk_offset]); @@ -1012,11 +1253,11 @@ __global__ void masked_multihead_attention_kernel(Multihead_attention_params(q_scaling, float_from_int8(q_quant))); } else { - q = *reinterpret_cast(¶ms.q[qk_offset]); + q = vec_conversion(*reinterpret_cast(¶ms.q[qk_offset])); } } - Qk_vec k; + Qk_vec_k k; zero(k); if (DO_CROSS_ATTENTION) { // The 16B chunk written by the thread. @@ -1029,39 +1270,41 @@ __global__ void masked_multihead_attention_kernel(Multihead_attention_params(¶ms.k_cache[offset]) : + vec_conversion(*reinterpret_cast(¶ms.k_cache[offset])) : k; } else { - if (!is_masked && (Dh == Dh_MAX || tidx * QK_VEC_SIZE < Dh)) { - if (params.int8_mode == 2) { - using Packed_Int8_t = typename packed_type::value>::type; - using Packed_Float_t = typename packed_type::value>::type; - const auto k_scaling = params.qkv_scale_out[1]; - const auto k_quant = - *reinterpret_cast(&reinterpret_cast(params.k)[qk_offset]); + if (params.int8_mode == 2) { + using Packed_Int8_t = typename packed_type::value>::type; + using Packed_Float_t = typename packed_type::value>::type; + const auto k_scaling = params.qkv_scale_out[1]; + const auto k_quant = + *reinterpret_cast(&reinterpret_cast(params.k)[qk_offset]); - convert_from_float(k, mul(k_scaling, float_from_int8(k_quant))); - } - else { - k = *reinterpret_cast(¶ms.k[qk_offset]); - } + convert_from_float(k, mul(k_scaling, float_from_int8(k_quant))); + } + else { + k = !is_masked && (Dh == Dh_MAX || tidx * QK_VEC_SIZE < Dh) ? + vec_conversion(*reinterpret_cast(¶ms.k[qk_offset])) : + k; } } // Trigger the loads from the Q and K bias buffers. - Qk_vec q_bias; + Qk_vec_k q_bias; zero(q_bias); - q_bias = (!is_masked && Dh == Dh_MAX || tidx * QK_VEC_SIZE < Dh) && params.q_bias != nullptr ? - *reinterpret_cast(¶ms.q_bias[qk_bias_offset]) : - q_bias; + q_bias = + (!is_masked && Dh == Dh_MAX || tidx * QK_VEC_SIZE < Dh) && params.q_bias != nullptr ? + vec_conversion(*reinterpret_cast(¶ms.q_bias[qk_bias_offset])) : + q_bias; - Qk_vec k_bias; + Qk_vec_k k_bias; zero(k_bias); if (handle_kv) { - k_bias = !is_masked && (Dh == Dh_MAX || tidx * QK_VEC_SIZE < Dh) && params.k_bias != nullptr ? - *reinterpret_cast(¶ms.k_bias[qk_bias_offset]) : - k_bias; + k_bias = + !is_masked && (Dh == Dh_MAX || tidx * QK_VEC_SIZE < Dh) && params.k_bias != nullptr ? + vec_conversion(*reinterpret_cast(¶ms.k_bias[qk_bias_offset])) : + k_bias; } // Computes the Q/K values with bias. @@ -1070,10 +1313,10 @@ __global__ void masked_multihead_attention_kernel(Multihead_attention_params( + k = mul( k, - *reinterpret_cast( - ¶ms.ia3_key_weights[(ia3_task_id * params.num_heads + hi) * Dh + tidx * QK_VEC_SIZE])); + vec_conversion(*reinterpret_cast( + ¶ms.ia3_key_weights[(ia3_task_id * params.num_heads + hi) * Dh + tidx * QK_VEC_SIZE]))); } // Padded len @@ -1100,10 +1343,10 @@ __global__ void masked_multihead_attention_kernel(Multihead_attention_params(q_smem + half_idx * smem_pitch + intra_half_idx) = q; + *reinterpret_cast(q_smem + half_idx * smem_pitch + intra_half_idx) = q; if (handle_kv) { - *reinterpret_cast(k_smem + half_idx * smem_pitch + intra_half_idx) = k; + *reinterpret_cast(k_smem + half_idx * smem_pitch + intra_half_idx) = k; } } @@ -1132,9 +1375,9 @@ __global__ void masked_multihead_attention_kernel(Multihead_attention_params(q_smem + half_idx * smem_pitch + intra_half_idx); + q = *reinterpret_cast(q_smem + half_idx * smem_pitch + intra_half_idx); if (handle_kv) { - k = *reinterpret_cast(k_smem + half_idx * smem_pitch + intra_half_idx); + k = *reinterpret_cast(k_smem + half_idx * smem_pitch + intra_half_idx); } } @@ -1143,12 +1386,12 @@ __global__ void masked_multihead_attention_kernel(Multihead_attention_params(&q_smem[tidx * QK_VEC_SIZE]) = q; + *reinterpret_cast(&q_smem[tidx * QK_VEC_SIZE]) = q; // Store Dh values of k_bias into smem, since will need to add later // if params.timestep == 0 if (DO_CROSS_ATTENTION && params.timestep == 0) { - *reinterpret_cast(&bias_smem[tidx * QK_VEC_SIZE]) = k_bias; + *reinterpret_cast(&bias_smem[tidx * QK_VEC_SIZE]) = k_bias; } // Write the K values to the global memory cache. @@ -1171,17 +1414,17 @@ __global__ void masked_multihead_attention_kernel(Multihead_attention_params(¶ms.k_cache[offset]) = k; + *reinterpret_cast(¶ms.k_cache[offset]) = vec_conversion(k); } } // Compute \sum_i Q[i] * K^T[i] for the current timestep. #ifdef MMHA_USE_FP32_ACUM_FOR_FMA - using Qk_vec_acum = typename Qk_vec_acum_fp32_::Type; + using Qk_vec_acum = typename Qk_vec_acum_fp32_::Type; #else - using Qk_vec_acum = Qk_vec; + using Qk_vec_acum = Qk_vec_k; #endif - qk = dot(q, k); + qk = dot(q, k); if (QK_VECS_PER_WARP <= WARP_SIZE) { #pragma unroll for (int mask = QK_VECS_PER_WARP / 2; mask >= 1; mask /= 2) { @@ -1217,9 +1460,10 @@ __global__ void masked_multihead_attention_kernel(Multihead_attention_params::Type; + using K_vec_k = typename K_vec_k_::Type; + using K_vec_m = typename K_vec_m_::Type; // The number of elements per vector. - constexpr int K_VEC_SIZE = sizeof(K_vec) / sizeof(T); + constexpr int K_VEC_SIZE = sizeof(K_vec_m) / sizeof(T); // Make sure the hidden size per head is a multiple of the vector size. static_assert(Dh_MAX % K_VEC_SIZE == 0, ""); // The number of elements per thread. @@ -1235,17 +1479,17 @@ __global__ void masked_multihead_attention_kernel(Multihead_attention_params(&q_smem[ki + ii * THREADS_PER_KEY * K_VEC_SIZE]); + q_vec[ii] = *reinterpret_cast(&q_smem[ki + ii * THREADS_PER_KEY * K_VEC_SIZE]); } - K_vec k_bias_vec[DO_CROSS_ATTENTION ? K_VECS_PER_THREAD : 1]; + K_vec_k k_bias_vec[DO_CROSS_ATTENTION ? K_VECS_PER_THREAD : 1]; if (DO_CROSS_ATTENTION && params.timestep == 0) { #pragma unroll for (int ii = 0; ii < K_VECS_PER_THREAD; ++ii) { - k_bias_vec[ii] = *reinterpret_cast(&bias_smem[ki + ii * THREADS_PER_KEY * K_VEC_SIZE]); + k_bias_vec[ii] = *reinterpret_cast(&bias_smem[ki + ii * THREADS_PER_KEY * K_VEC_SIZE]); } } @@ -1267,15 +1511,15 @@ __global__ void masked_multihead_attention_kernel(Multihead_attention_params(&k_cache_batch[beam_offset + jj * QK_ELTS_IN_16B]); + k[ii] = vec_conversion( + (*reinterpret_cast(&k_cache_batch[beam_offset + jj * QK_ELTS_IN_16B]))); } else { - k[ii] = *reinterpret_cast(&k_cache_batch[jj * QK_ELTS_IN_16B]); + k[ii] = vec_conversion( + (*reinterpret_cast(&k_cache_batch[jj * QK_ELTS_IN_16B]))); } } // add bias and update k_cache @@ -1300,15 +1546,16 @@ __global__ void masked_multihead_attention_kernel(Multihead_attention_params( + k[ii] = mul( k[ii], - *reinterpret_cast( + vec_conversion(*reinterpret_cast( ¶ms.ia3_key_weights[(ia3_task_id * params.num_heads + hi) * Dh + ki - + ii * THREADS_PER_KEY * K_VEC_SIZE])); + + ii * THREADS_PER_KEY * K_VEC_SIZE]))); } if (Dh == Dh_MAX || jj * QK_ELTS_IN_16B < Dh * params.memory_max_len) { - *reinterpret_cast(&k_cache[jj * QK_ELTS_IN_16B]) = k[ii]; + *reinterpret_cast(&k_cache[jj * QK_ELTS_IN_16B]) = + vec_conversion(k[ii]); } } } @@ -1317,8 +1564,7 @@ __global__ void masked_multihead_attention_kernel(Multihead_attention_params::dot(q_vec, k) * params.inv_sqrt_dh; - bool is_mask = (params.masked_tokens != nullptr) && params.masked_tokens[bi_seq_len_offset + ti]; + float qk = Qk_dot::dot(q_vec, k) * params.inv_sqrt_dh; // Store the product to shared memory. There's one qk value per timestep. Update the max. // if( ti < params.timestep && tidx % THREADS_PER_KEY == 0 ) { @@ -1381,8 +1627,20 @@ __global__ void masked_multihead_attention_kernel(Multihead_attention_params::Type; + using V_vec_k = typename V_vec_k_::Type; + using V_vec_m = typename V_vec_m_::Type; // The value computed by this thread. int vo = tidx / THREADS_PER_VALUE; @@ -1427,7 +1686,7 @@ __global__ void masked_multihead_attention_kernel(Multihead_attention_params(¶ms.v_bias[hi * Dh + vi]); + v_bias = vec_conversion( + *reinterpret_cast(¶ms.v_bias[hi * Dh + vi])); } if (DO_CROSS_ATTENTION) { - *reinterpret_cast(&bias_smem[vi]) = v_bias; + *reinterpret_cast(&bias_smem[vi]) = vec_conversion(v_bias); } } } @@ -1450,9 +1710,9 @@ __global__ void masked_multihead_attention_kernel(Multihead_attention_params::Type; + using V_vec_acum = typename V_vec_acum_fp32_::Type; #else - using V_vec_acum = V_vec; + using V_vec_acum = V_vec_k; #endif // The partial outputs computed by each thread. V_vec_acum out; @@ -1461,34 +1721,96 @@ __global__ void masked_multihead_attention_kernel(Multihead_attention_params memory_max_len + // to prevent ti % memory_len when ti < memory_len, and + // the compiler cannot optimize the codes automatically. + const int min_length = min(tlength, params.memory_max_len); + for (int ti = first_step + vo; ti < min_length; ti += V_PER_ITER) { + // Fetch offset based on cache_indir when beam sampling + const int beam_src = HAS_BEAMS ? params.cache_indir[bi_seq_len_offset + ti] : 0; + const int beam_offset = HAS_BEAMS ? beam_src * params.num_heads * params.memory_max_len * Dh : 0; + // Load the values from the cache. + V_vec_k v = vec_conversion( + *reinterpret_cast(&v_cache_batch[beam_offset + ti * Dh])); + if (DO_CROSS_ATTENTION && params.timestep == 0) { + v = add(v, vec_conversion(*reinterpret_cast(&bias_smem[vi]))); + if (do_ia3) { + v = mul( + v, + *reinterpret_cast( + ¶ms.ia3_value_weights[(ia3_task_id * params.num_heads + hi) * Dh + vi])); + } + *reinterpret_cast(&v_cache[ti * Dh]) = vec_conversion(v); + } + // Load the logits from shared memory. +#if defined(MMHA_USE_FP32_ACUM_FOR_LOGITS) + float logit = logits_smem[ti - first_step]; + out = fma(logit, cast_to_float(v), out); +#else // MMHA_USE_FP32_ACUM_FOR_LOGITS +#ifdef FP8_MHA + Tk logit; + if (FP8_MHA_KERNEL) { + // NOTE: fake quantization + // logit = vec_conversion(vec_conversion(mul(1.0f / + // params.attention_qk_scale[0], logits_smem[ti]))); + logit = logits_smem[ti - first_step]; + } + else { + logit = logits_smem[ti - first_step]; + } + out = fma(logit, v, out); +#else // FP8_MHA + Tk logit = logits_smem[ti - first_step]; + out = fma(logit, v, out); +#endif // FP8_MHA +#endif // MMHA_USE_FP32_ACUM_FOR_LOGITS + } for (int ti = first_step + vo; ti < tlength; ti += V_PER_ITER) { + if (ti < params.memory_max_len) { + // handled by previous loop + continue; + } const int ti_circ = ti % params.memory_max_len; // Fetch offset based on cache_indir when beam sampling - const int beam_src = (params.cache_indir != nullptr) ? params.cache_indir[bi_seq_len_offset + ti_circ] : 0; - const int beam_offset = beam_src * params.num_heads * params.memory_max_len * Dh; + const int beam_src = HAS_BEAMS ? params.cache_indir[bi_seq_len_offset + ti_circ] : 0; + const int beam_offset = HAS_BEAMS ? beam_src * params.num_heads * params.memory_max_len * Dh : 0; // Load the values from the cache. - V_vec v = *reinterpret_cast(&v_cache_batch[beam_offset + ti_circ * Dh]); + V_vec_k v = vec_conversion( + *reinterpret_cast(&v_cache_batch[beam_offset + ti_circ * Dh])); if (DO_CROSS_ATTENTION && params.timestep == 0) { - v = add(v, *reinterpret_cast(&bias_smem[vi])); + v = add(v, vec_conversion(*reinterpret_cast(&bias_smem[vi]))); if (do_ia3) { - v = mul( + v = mul( v, - *reinterpret_cast( + *reinterpret_cast( ¶ms.ia3_value_weights[(ia3_task_id * params.num_heads + hi) * Dh + vi])); } - *reinterpret_cast(&v_cache[ti * Dh]) = v; + *reinterpret_cast(&v_cache[ti * Dh]) = vec_conversion(v); } // Load the logits from shared memory. #if defined(MMHA_USE_FP32_ACUM_FOR_LOGITS) float logit = logits_smem[ti - first_step]; out = fma(logit, cast_to_float(v), out); -#else - T logit = logits_smem[ti - first_step]; - - // Update the partial sums. +#else // MMHA_USE_FP32_ACUM_FOR_LOGITS +#ifdef FP8_MHA + Tk logit; + if (FP8_MHA_KERNEL) { + // NOTE: fake quantization + // logit = vec_conversion(vec_conversion(mul(1.0f / + // params.attention_qk_scale[0], logits_smem[ti]))); + logit = logits_smem[ti - first_step]; + } + else { + logit = logits_smem[ti - first_step]; + } out = fma(logit, v, out); -#endif +#else // FP8_MHA + Tk logit = logits_smem[ti - first_step]; + out = fma(logit, v, out); +#endif // FP8_MHA +#endif // MMHA_USE_FP32_ACUM_FOR_LOGITS } } @@ -1496,16 +1818,16 @@ __global__ void masked_multihead_attention_kernel(Multihead_attention_params(&v_cache[tlength * Dh]); + v = vec_conversion(*reinterpret_cast(&v_cache[tlength * Dh])); } else { // Trigger the loads from the V buffer. const auto v_offset = qkv_base_offset + vi; if (params.int8_mode == 2) { - using Packed_Int8_t = typename packed_type::value>::type; - using Packed_Float_t = typename packed_type::value>::type; + using Packed_Int8_t = typename packed_type::value>::type; + using Packed_Float_t = typename packed_type::value>::type; const auto v_scaling = params.qkv_scale_out[2]; const auto v_quant = *reinterpret_cast(&reinterpret_cast(params.v)[v_offset]); @@ -1513,7 +1835,7 @@ __global__ void masked_multihead_attention_kernel(Multihead_attention_params(v_scaling, float_from_int8(v_quant))); } else { - v = *reinterpret_cast(¶ms.v[v_offset]); + v = vec_conversion(*reinterpret_cast(¶ms.v[v_offset])); } // Trigger the loads from the V bias buffer. // V_vec v_bias = *reinterpret_cast(¶ms.v_bias[hi*Dh + vi]); @@ -1524,25 +1846,38 @@ __global__ void masked_multihead_attention_kernel(Multihead_attention_params( + v = mul( v, - *reinterpret_cast( + *reinterpret_cast( ¶ms.ia3_value_weights[(ia3_task_id * params.num_heads + hi) * Dh + vi])); } // Store the values with bias back to global memory in the cache for V. - //*reinterpret_cast(&v_cache[params.timestep*Dh]) = v; - *reinterpret_cast(&v_cache[tlength_circ * Dh]) = v; + //*reinterpret_cast(&v_cache[params.timestep*Dh]) = v; + *reinterpret_cast(&v_cache[tlength_circ * Dh]) = vec_conversion(v); } // Initialize the output value with the current timestep. #if defined(MMHA_USE_FP32_ACUM_FOR_LOGITS) // out = fma(logits_smem[params.timestep], cast_to_float(v), out); out = fma(logits_smem[tlength - first_step], cast_to_float(v), out); -#else - // out = fma(logits_smem[params.timestep], v, out); +#else // MMHA_USE_FP32_ACUM_FOR_LOGITS + // out = fma(logits_smem[params.timestep], v, out); +#ifdef FP8_MHA + Tk logit; + if (FP8_MHA_KERNEL) { + // NOTE: fake quantization + // logit = mul(1.0f / params.attention_qk_scale[0], logits_smem[tlength]); + logit = logits_smem[tlength - first_step]; + } + else { + logit = logits_smem[tlength - first_step]; + } + out = fma(logit, v, out); +#else // FP8_MHA out = fma(logits_smem[tlength - first_step], v, out); -#endif +#endif // FP8_MHA +#endif // MMHA_USE_FP32_ACUM_FOR_LOGITS } // Make sure we can start writing to shared memory. @@ -1559,16 +1894,16 @@ __global__ void masked_multihead_attention_kernel(Multihead_attention_params= midpoint && vo < active_groups && (Dh == Dh_MAX || vi < Dh)) { #ifdef MMHA_USE_FP32_ACUM_FOR_OUT - convert_from_float(*reinterpret_cast(&out_smem[(vo - midpoint) * Dh + vi]), out); + convert_from_float(*reinterpret_cast(&out_smem[(vo - midpoint) * Dh + vi]), out); #else - *reinterpret_cast(&out_smem[(vo - midpoint) * Dh + vi]) = out; + *reinterpret_cast(&out_smem[(vo - midpoint) * Dh + vi]) = out; #endif } __syncthreads(); // The bottom warps update their values. if (vo < midpoint && (Dh == Dh_MAX || vi < Dh)) { - out = add(*reinterpret_cast(&out_smem[vo * Dh + vi]), out); + out = add(*reinterpret_cast(&out_smem[vo * Dh + vi]), out); } __syncthreads(); } @@ -1577,19 +1912,29 @@ __global__ void masked_multihead_attention_kernel(Multihead_attention_params(¶ms.out[bhi * Dh + vi]), + mul(result_scale, out)); +#endif // FP8_MHA + } + else if (params.int8_mode == 2) { using Packed_Int8_t = typename packed_type::value>::type; out = mul(*params.attention_out_scale, out); *reinterpret_cast(&(reinterpret_cast(params.out)[bhi * Dh + vi])) = cast_to_int8(out); } else { - convert_from_float(*reinterpret_cast(¶ms.out[bhi * Dh + vi]), out); + convert_from_float(*reinterpret_cast(¶ms.out[bhi * Dh + vi]), out); } -#else +#else // MMHA_USE_FP32_ACUM_FOR_OUT // TODO: support int8_mode? - *reinterpret_cast(¶ms.out[bhi * Dh + vi]) = out; -#endif + *reinterpret_cast(¶ms.out[bhi * Dh + vi]) = vec_conversion(out); +#endif // MMHA_USE_FP32_ACUM_FOR_OUT } } @@ -1599,5 +1944,16 @@ __global__ void masked_multihead_attention_kernel(Multihead_attention_params +struct threads_per_value_t { + static const int value = Dh_MAX * sizeof(T) / 16; +}; +#ifdef ENABLE_FP8 +template +struct threads_per_value_t<__nv_fp8_e4m3, Dh_MAX> { + static const int value = Dh_MAX * 4 / 16; // DEBUG: float v +}; +#endif + template void mmha_launch_kernel(const KERNEL_PARAMS_TYPE& params, const cudaStream_t& stream); diff --git a/src/fastertransformer/kernels/decoder_masked_multihead_attention_fp8_test.cc b/src/fastertransformer/kernels/decoder_masked_multihead_attention_fp8_test.cc new file mode 100644 index 000000000..40f4ceae8 --- /dev/null +++ b/src/fastertransformer/kernels/decoder_masked_multihead_attention_fp8_test.cc @@ -0,0 +1,298 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/kernels/decoder_masked_multihead_attention.h" +#include "src/fastertransformer/utils/cuda_bf16_wrapper.h" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" +#include "src/fastertransformer/utils/gpu_buf.h" +#include "src/fastertransformer/utils/memory_utils.h" +#include "src/fastertransformer/utils/test_utils.h" + +#include +#include +#include + +using namespace fastertransformer; + +typedef struct { + int batch_size; + int head_num; + int max_seq_len; + int size_per_head; + int rotary_dimension; +} test_args_t; + +template +void set_params_struct(Masked_multihead_attention_params& params, + T* out, + const T* q, + const T* q_bias, + const T* k, + const T* k_bias, + const T* v, + const T* v_bias, + T* k_cache, + T* v_cache, + const int* cache_indir, + int stride, + int batch_size, + int beam_width, + int seq_length, + int num_heads, + int hidden_size_per_head, + int rotary_embedding_dim, + int timestep, + float inv_sqrt_dh, + const int* input_lengths, + int max_input_len, + const T* relative_attention_bias, + int relative_attention_bias_stride) +{ + params.out = out; + params.q = q; + params.q_bias = q_bias; + params.k = k; + params.k_bias = k_bias; + params.v = v; + params.v_bias = v_bias; + params.k_cache = k_cache; + params.v_cache = v_cache; + params.cache_indir = cache_indir; + params.stride = stride; + params.batch_size = batch_size; + params.beam_width = beam_width; + params.memory_max_len = seq_length; + params.num_heads = num_heads; + params.hidden_size_per_head = hidden_size_per_head; + params.rotary_embedding_dim = rotary_embedding_dim; + params.timestep = timestep; + params.inv_sqrt_dh = inv_sqrt_dh; + params.prefix_prompt_lengths = input_lengths; + params.max_input_length = max_input_len; + params.relative_attention_bias = relative_attention_bias; + params.relative_attention_bias_stride = relative_attention_bias_stride; + + params.finished = nullptr; + params.memory_length_per_sample = nullptr; + params.length_per_sample = nullptr; +} + +template +GPUBuf reshape_key_cache(const GPUBuf& key_cache, int BS, int H, int Dh, int L, int x_orig, int x_targ) +{ + auto h_key_cache = key_cache.to_host_vec(); + std::vector h_key_cache_r(h_key_cache.size()); + + for (int b = 0; b < BS; b++) { + for (int h = 0; h < H; h++) { + for (int d = 0; d < Dh; d++) { + for (int l = 0; l < L; l++) { + + int in_d = d / x_orig, out_d = d / x_targ; + int in_x = d % x_orig, out_x = d % x_targ; + + int in_offset = (((b * H + h) * (Dh / x_orig) + in_d) * L + l) * x_orig + in_x; + int out_offset = (((b * H + h) * (Dh / x_targ) + out_d) * L + l) * x_targ + out_x; + + h_key_cache_r[out_offset] = h_key_cache[in_offset]; + } + } + } + } + GPUBuf key_cache_T(key_cache.size); + key_cache_T.set(h_key_cache_r.data()); + + return key_cache_T; +} + +template +struct string_rep_t { + static const std::string value; +}; +template<> +const std::string string_rep_t::value{"FP16"}; +template<> +const std::string string_rep_t<__nv_bfloat16>::value{"BF16"}; +template<> +const std::string string_rep_t<__nv_fp8_e4m3>::value{"FP8"}; + +template +struct mha_type_t { + using Type = T; +}; +template<> +struct mha_type_t { + using Type = uint16_t; +}; + +template +bool test_masked_multihead_attention(const test_args_t& test_args) +{ + using Tmha = typename mha_type_t::Type; + const float max_allowed_error = 0.05f; + + int BS = test_args.batch_size; + int H = test_args.head_num; + int L = test_args.max_seq_len; + int Dh = test_args.size_per_head; + int R = test_args.rotary_dimension; + + GPUBuf q_T(BS * Dh * H), q_bias_T(Dh * H); + GPUBuf k_T(BS * Dh * H), k_bias_T(Dh * H); + GPUBuf v_T(BS * Dh * H), v_bias_T(Dh * H); + GPUBuf kcache_T(BS * Dh * H * L); // read as [BS, H, Dh/x, L, x] + GPUBuf vcache_T(BS * Dh * H * L); + GPUBuf out_T(BS * Dh * H); + + GPUBuf seq_lengths(BS); + seq_lengths.set((std::vector(BS, L / 4)).data()); + + GPUBuf q_fp32(q_T), q_bias_fp32(q_bias_T); + GPUBuf k_fp32(k_T), k_bias_fp32(k_bias_T); + GPUBuf v_fp32(v_T), v_bias_fp32(v_bias_T); + GPUBuf kcache_fp32(reshape_key_cache(kcache_T, BS, H, Dh, L, 16 / sizeof(T), 16 / sizeof(float))); + GPUBuf vcache_fp32(vcache_T); + GPUBuf out_fp32(BS * Dh * H); + + Masked_multihead_attention_params params_fp32; + set_params_struct(params_fp32, + out_fp32.ptr, + q_fp32.ptr, + q_bias_fp32.ptr, + k_fp32.ptr, + k_bias_fp32.ptr, + v_fp32.ptr, + v_bias_fp32.ptr, + kcache_fp32.ptr, + vcache_fp32.ptr, + nullptr, + 0, + BS, + 1, + L, + H, + Dh, + R, + L - 1, + 1.0 / sqrtf(Dh), + seq_lengths.ptr, + L / 4, + (const float*)nullptr, + 0); + masked_multihead_attention(params_fp32, 0); + + auto mha_ref = out_fp32.to_host_vec(); + + Masked_multihead_attention_params params_T; + set_params_struct(params_T, + (Tmha*)out_T.ptr, + (Tmha*)q_T.ptr, + (Tmha*)q_bias_T.ptr, + (Tmha*)k_T.ptr, + (Tmha*)k_bias_T.ptr, + (Tmha*)v_T.ptr, + (Tmha*)v_bias_T.ptr, + (Tmha*)kcache_T.ptr, + (Tmha*)vcache_T.ptr, + nullptr, + 0, + BS, + 1, + L, + H, + Dh, + R, + L - 1, + 1.0 / sqrtf(Dh), + seq_lengths.ptr, + L / 4, + (const Tmha*)nullptr, + 0); + masked_multihead_attention(params_T, 0); + + auto mha_T_test = GPUBuf(out_T).to_host_vec(); + + /* for (int bs = 0; bs < BS; bs++) { */ + /* for (int h = 0; h < H; h++) { */ + /* for (int d = 0; d < Dh; d++) { */ + /* float ref = mha_ref[bs * H * Dh + h * Dh + d]; */ + /* float test = mha_T_test[bs * H * Dh + h * Dh + d]; */ + /* const float diff = abs_diff()(ref, test); */ + /* const float rel_diff = rel_abs_diff()(ref, test); */ + + /* printf("[%d, %d, %d] Error %.2e (=%.2f%%)\n", bs, h, d, diff, rel_diff * 100); */ + /* } */ + /* } */ + /* } */ + + std::transform(mha_ref.begin(), mha_ref.end(), mha_T_test.begin(), mha_T_test.begin(), abs_diff()); + const float T_error = *std::max_element(mha_T_test.begin(), mha_T_test.end()); + + bool error = false; + if (T_error > max_allowed_error) { + error = true; + printf("Max abs diff = %.2f\n", T_error); + } + + cudaStream_t stream; + cudaStreamCreate(&stream); + + printf("[FP32] "); + TIMEIT(true, 10, stream, masked_multihead_attention, params_fp32, stream); + printf("[%s] ", string_rep_t::value.c_str()); + TIMEIT(true, 10, stream, masked_multihead_attention, params_T, stream); + + return !error; +} + +int main(int argc, char** argv) +{ + if (argc != 6) { + printf("[ERROR] Usage: %s batch_size head_num max_seq_len" + "size_per_head rotary_dim\n", + argv[0]); + printf("e.g., %s 32 16 40 256 32\n", argv[0]); + return EXIT_FAILURE; + } + + const test_args_t test_args{atoi(argv[1]), atoi(argv[2]), atoi(argv[3]), atoi(argv[4]), atoi(argv[5])}; + + struct cudaDeviceProp prop; + check_cuda_error(cudaGetDeviceProperties(&prop, 0)); + printf("Using device %s\n", prop.name); + + bool global_test_pass = true; + bool test_pass = true; + + test_pass = test_masked_multihead_attention(test_args); + printf("%s", test_pass ? "." : "X"); + global_test_pass |= test_pass; + +#ifdef ENABLE_BF16 + test_pass = test_masked_multihead_attention<__nv_bfloat16>(test_args); + printf("%s", test_pass ? "." : "X"); + global_test_pass |= test_pass; +#endif + +#ifdef ENABLE_FP8 + test_pass = test_masked_multihead_attention<__nv_fp8_e4m3>(test_args); + printf("%s", test_pass ? "." : "X"); + global_test_pass |= test_pass; +#endif + + puts(""); + return global_test_pass ? EXIT_SUCCESS : EXIT_FAILURE; +} diff --git a/src/fastertransformer/kernels/decoder_masked_multihead_attention_utils.h b/src/fastertransformer/kernels/decoder_masked_multihead_attention_utils.h index 1f0a12b1e..075e61b3c 100644 --- a/src/fastertransformer/kernels/decoder_masked_multihead_attention_utils.h +++ b/src/fastertransformer/kernels/decoder_masked_multihead_attention_utils.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -17,6 +17,7 @@ #pragma once #include "src/fastertransformer/utils/cuda_bf16_wrapper.h" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" #include "src/fastertransformer/utils/cuda_type_utils.cuh" #include @@ -58,6 +59,17 @@ struct bf16_8_t { }; #endif +#ifdef ENABLE_FP8 +using fp8_2_t = __nv_fp8x2_e4m3; +using fp8_4_t = __nv_fp8x4_e4m3; +struct fp8_8_t { + __nv_fp8_e4m3 x; + __nv_fp8_e4m3 y; + __nv_fp8_e4m3 z; + __nv_fp8_e4m3 w; +}; +#endif + //////////////////////////////////////////////////////////////////////////////////////////////////// template @@ -111,6 +123,25 @@ struct num_elems { }; #endif +#ifdef ENABLE_FP8 +template<> +struct num_elems<__nv_fp8_e4m3> { + static constexpr int value = 1; +}; +template<> +struct num_elems { + static constexpr int value = 2; +}; +template<> +struct num_elems { + static constexpr int value = 4; +}; +template<> +struct num_elems { + static constexpr int value = 8; +}; +#endif + //////////////////////////////////////////////////////////////////////////////////////////////////// template @@ -261,8 +292,8 @@ inline __device__ uint16_t float_to_half(float f) uint16_t u16[2]; } tmp; #if 0 && defined(__CUDA_ARCH__) && __CUDA_ARCH__ >= 800 // Is it better? - float zero = 0.f; - asm volatile("cvt.rn.f16x2.f32 %0, %1, %2;\n" : "=r"(tmp.u32) : "f"(zero), "f"(f)); + float zero = 0.f; + asm volatile("cvt.rn.f16x2.f32 %0, %1, %2;\n" : "=r"(tmp.u32) : "f"(zero), "f"(f)); #else asm volatile("cvt.rn.f16.f32 %0, %1;\n" : "=h"(tmp.u16[0]) : "f"(f)); #endif @@ -322,6 +353,15 @@ inline __device__ float add(float a, __nv_bfloat16 b) //////////////////////////////////////////////////////////////////////////////////////////////////// +#ifdef ENABLE_FP8 +inline __device__ float add(float a, __nv_fp8_e4m3 b) +{ + return a + (float)(b); +} +#endif + +//////////////////////////////////////////////////////////////////////////////////////////////////// + inline __device__ float2 add(uint32_t a, float2 fb) { float2 fa = half2_to_float2(a); @@ -412,6 +452,18 @@ inline __device__ float4 fma(float a, float4 b, float4 c) //////////////////////////////////////////////////////////////////////////////////////////////////// +inline __device__ float4 fma(float a, float4 b, Float4_ c) +{ + float4 d; + d.x = fma(a, b.x, c.x.x); + d.y = fma(a, b.y, c.x.y); + d.z = fma(a, b.z, c.y.x); + d.w = fma(a, b.w, c.y.y); + return d; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + inline __device__ Float4_ fma(float a, Float4_ b, Float4_ c) { Float4_ d; @@ -730,7 +782,7 @@ inline __device__ Float8_ fma(__nv_bfloat16 a, bf16_8_t b, Float8_ fc) template inline __device__ Acc mul(A a, B b) { - return a * b; + return Acc{}; // for compile } //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -795,10 +847,10 @@ template<> inline __device__ Float8_ mul(float a, Float8_ b) { Float8_ c; - c.x = make_float2(a * b.x.x, a * b.x.y); - c.y = make_float2(a * b.y.x, a * b.y.y); - c.z = make_float2(a * b.z.x, a * b.z.y); - c.w = make_float2(a * b.w.x, a * b.w.y); + c.x = mul(a, b.x); + c.y = mul(a, b.y); + c.z = mul(a, b.z); + c.w = mul(a, b.w); return c; } @@ -1683,6 +1735,15 @@ write_smem_transpose(const bf16_8_t& vec, __nv_bfloat16* smem, int transpose_idx } #endif +#ifdef ENABLE_FP8 +template<> +__device__ __inline__ void vec_from_smem_transpose(float4& vec, __nv_fp8_e4m3* smem, int transpose_idx, int smem_pitch) +{ + // TODO + printf("[ERROR] still no have implementation for vec_from_smem_transpose under __nv_fp8_e4m3 \n"); +} +#endif // ENABLE_FP8 + template<> __device__ __inline__ void write_smem_transpose(const uint4& vec, uint16_t* smem, int transpose_idx, int smem_pitch) { @@ -1783,4 +1844,13 @@ __device__ __inline__ void write_smem_transpose(const float2& vec, float* smem, smem[smem_pitch + transpose_idx] = vec.y; } +#ifdef ENABLE_FP8 +template<> +__device__ __inline__ void +write_smem_transpose(const float4& vec, __nv_fp8_e4m3* smem, int transpose_idx, int smem_pitch) +{ + printf("[ERROR] still no have implementation for vec_from_smem_transpose under __nv_fp8_e4m3 \n"); +} +#endif // ENABLE_FP8 + } // namespace mmha diff --git a/src/fastertransformer/kernels/decoding_kernels.cu b/src/fastertransformer/kernels/decoding_kernels.cu index 934dcf651..ff28bae8b 100644 --- a/src/fastertransformer/kernels/decoding_kernels.cu +++ b/src/fastertransformer/kernels/decoding_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -763,8 +763,8 @@ __global__ void finalize(int* output_ids, + (i + 1)]; if (output_log_probs != nullptr) { output_log_probs[blockIdx.x * beam_width * max_seq_len + beam_idx * max_seq_len + i] = - topk_log_probs[blockIdx.x * (beam_width * 2) * (max_seq_len + 1) + rank[beam_idx] * (max_seq_len + 1) - + (i + 1)]; + topk_log_probs[blockIdx.x * (beam_width * 2) * (max_seq_len + 1) + + rank[beam_idx] * (max_seq_len + 1) + (i + 1)]; } } } diff --git a/src/fastertransformer/kernels/decoding_kernels.h b/src/fastertransformer/kernels/decoding_kernels.h index f40f9d7b1..7527d8fc4 100644 --- a/src/fastertransformer/kernels/decoding_kernels.h +++ b/src/fastertransformer/kernels/decoding_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/dequantize_kernels.cu b/src/fastertransformer/kernels/dequantize_kernels.cu index a78b11356..71c0c0698 100644 --- a/src/fastertransformer/kernels/dequantize_kernels.cu +++ b/src/fastertransformer/kernels/dequantize_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/dequantize_kernels.h b/src/fastertransformer/kernels/dequantize_kernels.h index 6ec8e8881..91b634af3 100644 --- a/src/fastertransformer/kernels/dequantize_kernels.h +++ b/src/fastertransformer/kernels/dequantize_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/disentangled_attention_kernels.cu b/src/fastertransformer/kernels/disentangled_attention_kernels.cu new file mode 100644 index 000000000..b7660819e --- /dev/null +++ b/src/fastertransformer/kernels/disentangled_attention_kernels.cu @@ -0,0 +1,449 @@ +/* + * Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/kernels/disentangled_attention_kernels.h" +#include "src/fastertransformer/utils/cuda_type_utils.cuh" +#include "src/fastertransformer/utils/cuda_utils.h" +#include + +namespace fastertransformer { + +#define kDISENTANGLED_VERSION 2 +// Version 1: regular relative position index +// Version 2: log bucket relative position index +constexpr int32_t kDISENTANGLED_TILESIZE_V1 = 32; +constexpr int32_t kDISENTANGLED_BLOCKDIMY_V1 = 8; +constexpr int32_t kDISENTANGLED_TILESIZE_V2 = 64; +constexpr int32_t kDISENTANGLED_BLOCKDIMY_V2 = 4; + +template +__global__ void addQKBiasTransposeRepeat(T* q_out, + T* k_out, + const T* __restrict q_in, + const T* __restrict bias_q, + const T* __restrict k_in, + const T* __restrict bias_k, + const int batch_size, + const int attention_span, + const int head_num, + const int size_per_head) +{ + const int n = head_num * size_per_head; + const int batch_id = blockIdx.x; + const int position_id = blockIdx.y; + + for (int col_id = threadIdx.x; col_id < n; col_id += blockDim.x) { + const int head_id = col_id / size_per_head; + const int size_id = col_id % size_per_head; + const int target_id = batch_id * (head_num * attention_span * size_per_head) + + head_id * (attention_span * size_per_head) + position_id * size_per_head + size_id; + const int src_id = position_id * n + col_id; + + T q = add(ldg(&q_in[src_id]), ldg(&bias_q[col_id])); + q_out[target_id] = q; + + T k = add(ldg(&k_in[src_id]), ldg(&bias_k[col_id])); + k_out[target_id] = k; + } +} + +template +__global__ void QKTransposeRepeat(T* q_out, + T* k_out, + const T* __restrict q_in, + const T* __restrict k_in, + const int batch_size, + const int attention_span, + const int head_num, + const int size_per_head) +{ + const int n = head_num * size_per_head; + const int batch_id = blockIdx.x; + const int position_id = blockIdx.y; + + for (int col_id = threadIdx.x; col_id < n; col_id += blockDim.x) { + const int head_id = col_id / size_per_head; + const int size_id = col_id % size_per_head; + const int target_id = batch_id * (head_num * attention_span * size_per_head) + + head_id * attention_span * size_per_head + position_id * size_per_head + size_id; + const int src_id = position_id * n + col_id; + + q_out[target_id] = ldg(&q_in[src_id]); + k_out[target_id] = ldg(&k_in[src_id]); + } +} + +template +void invokeAddQKBiasTransposeRepeat(T* q_buf, + T* k_buf, + T* Q, + const T* bias_Q, + T* K, + const T* bias_K, + const int batch_size, + const int attention_span, + const int head_num, + const int size_per_head, + cudaStream_t stream) +{ + const int k = head_num * size_per_head; + dim3 grid(batch_size, attention_span); + bool is_add_bias = bias_Q != nullptr; + if (sizeof(T) == 4 || k % 2 != 0) { + dim3 block(min(k, 512)); + if (is_add_bias) { + addQKBiasTransposeRepeat<<>>( + q_buf, k_buf, Q, bias_Q, K, bias_K, batch_size, attention_span, head_num, size_per_head); + } + else { + QKTransposeRepeat + <<>>(q_buf, k_buf, Q, K, batch_size, attention_span, head_num, size_per_head); + } + sync_check_cuda_error(); + } + else { + using T2 = typename TypeConverter::Type; // fp16 to half2, bf16 to bf162 + dim3 block(min(k / 2, 512)); + if (is_add_bias) { + addQKBiasTransposeRepeat<<>>((T2*)q_buf, + (T2*)k_buf, + (const T2*)Q, + (const T2*)bias_Q, + (const T2*)K, + (const T2*)bias_K, + batch_size, + attention_span, + head_num, + size_per_head / 2); + } + else { + QKTransposeRepeat<<>>((T2*)q_buf, + (T2*)k_buf, + (const T2*)Q, + (const T2*)K, + batch_size, + attention_span, + head_num, + size_per_head / 2); + } + sync_check_cuda_error(); + } +} + +#define INSTANTIATEADDQKBIASTRANSPOSEREPEAT(T) \ + template void invokeAddQKBiasTransposeRepeat(T* q_buf, \ + T* k_buf, \ + T* Q, \ + const T* bias_Q, \ + T* K, \ + const T* bias_K, \ + const int batch_size, \ + const int attention_span, \ + const int head_num, \ + const int size_per_head, \ + cudaStream_t stream) +INSTANTIATEADDQKBIASTRANSPOSEREPEAT(float); +INSTANTIATEADDQKBIASTRANSPOSEREPEAT(half); +#ifdef ENABLE_BF16 +INSTANTIATEADDQKBIASTRANSPOSEREPEAT(__nv_bfloat16); +#endif +#undef INSTANTIATEADDQKBIASTRANSPOSEREPEAT + +// template specialization for double/float +template, double>::value + || std::is_same, float>::value, + TDataType>::type* dummy = nullptr> +__forceinline__ __device__ void +compute_attention(TDataType& res, const TDataType& res0, const TDataType& res1, const TDataType& res2) +{ + res = res0 + res1 + res2; +} + +// template specialization for half +template, __half>::value + || std::is_same, half>::value, + TDataType>::type* dummy = nullptr> +__forceinline__ __device__ void +compute_attention(TDataType& res, const TDataType& res0, const TDataType& res1, const TDataType& res2) +{ +#if __CUDA_ARCH__ >= 530 + // __hmul only supported >= sm_53 + res = __hadd(res0, __hadd(res1, res2)); +#else + // for < sm_53, workaround/fallback is convert to float and downconvert + res = __float2half(__half2float(res0) + __half2float(res1) + __half2float(res2)); +#endif +} + +#ifdef ENABLE_BF16 +template, nv_bfloat16>::value, TDataType>::type* dummy = + nullptr> +__forceinline__ __device__ void +compute_attention(TDataType& res, const TDataType& res0, const TDataType& res1, const TDataType& res2) +{ + res = res0 + res1 + res2; +} +#endif + +// template specialization for int8 +template, int8_t>::value + || std::is_same, uint8_t>::value, + TDataType>::type* dummy = nullptr> +__forceinline__ __device__ void +compute_attention(TDataType& res, const TDataType& res0, const TDataType& res1, const TDataType& res2) +{ + res = res0 + res1 + res2; +} + +/** + * Fused kernel for Disentangled Attention design (first proposed in Microsoft DeBERTa). Implementation refactored from + * previous TensorRT plugin GatherAddGatherTransposeAddMul_fused kernel implementation by (1) removing the scaling + * factor because each attention matrix has already been applied scaling in cuBLAS (2) add BF16 support. + * + * @tparam TDataType type of the input data + * @tparam tTileSize dimension of the shared memory tile (square) and also the BlockDimX. Need for compile-time shared + * memory size + * @tparam tBlockDimY 2D thread block is (tTileSize, tBlockDimY) + * @param result attention result + * @param data0 content-to-content ("c2c") attention QcKc^T + * @param data1 content-to-position ("c2p") attention QcKr^T + * @param data2 position-to-content ("p2c") attention KcQr^T + * @param batch_dim flattened batch dimension is (batch_size * num_heads) + * @param seq_dim sequence dimension [seq_len] + * @param span relative distance hyper-parameter, k, in Disentangled attention + */ +template +__global__ void disentangled_attention_kernel(TDataType* result, + TDataType* data0, + TDataType const* data1, + TDataType const* data2, + int32_t batch_dim, + int32_t seq_dim, + int32_t span) +{ + // Tile size should be a multiple of number of block rows + assert(blockDim.y * (blockDim.x / blockDim.y) == blockDim.x); + + // map block to the output (result) + int32_t i; + int32_t j; + int32_t k; + int32_t ty; + int32_t c; + int32_t pos_dim = span * 2; + TDataType res0; + TDataType res1; + TDataType res2; + TDataType res; + +#if kDISENTANGLED_VERSION == 2 + int32_t bucket; + int32_t mid = span / 2; + int32_t index; + + // tmp values are precomputed for re-use; must be at least float to ensure accuracy + float tmp1 = logf(mid); + + // Multiply by (1 - epsilon) to ensure that taking the ceil of approximately an integer + // results in that integer when computing the bucket later on. + // This corrects for the mathematical imprecision from using float. + constexpr float kEPSILON = 1e-7; + float tmp = (mid - 1) / (logf(pos_dim - 1) - tmp1) * (1 - kEPSILON); +#endif + + __shared__ TDataType T[tTileSize][tTileSize + 1]; // +1 to avoid bank conflict + + // (i,j,k) location of data2 (transposed) + i = blockIdx.z; + j = blockIdx.x * tTileSize + threadIdx.y; + k = blockIdx.y * tTileSize + threadIdx.x; + + // (j+ty, k) is the location in the index matrix (implicit), where the element values of the index matrix are + // determinisitic based on its location. Index matrix dimension is [batch_size*num_heads, seq_len, seq_len], add + // boundary check accordingly c2p & p2c matrix dimension is [batch_size*num_heads, seq_len, 2*k], within-boundary is + // guaranteed by the index function design, but can still add check due to floating point precision + +// gather data2 +#pragma unroll + for (c = 0, ty = 0; c < tTileSize / tBlockDimY && (j + ty) < seq_dim && k < seq_dim; c++, ty += tBlockDimY) { +#if kDISENTANGLED_VERSION == 1 + // relative position -- version 1 + if (k - (j + ty) >= span) { + res2 = data2[i * seq_dim * pos_dim + (j + ty) * pos_dim + pos_dim - 1]; + } + else if (k - (j + ty) <= -span) { + res2 = data2[i * seq_dim * pos_dim + (j + ty) * pos_dim + 0]; + } + else { + res2 = data2[i * seq_dim * pos_dim + (j + ty) * pos_dim + k - (j + ty) + span]; // compute index on the fly + } + T[ty + threadIdx.y][threadIdx.x] = res2; +#elif kDISENTANGLED_VERSION == 2 + // relative position w/ log bucket -- version 2 + if (k - (j + ty) >= -mid && k - (j + ty) <= mid) { + // preserved region, (i - j) + span + bucket = k - (j + ty); + } + else { + // log bucket region, bucket(i,j) + span + bucket = ceilf((logf(fabsf(k - (j + ty))) - tmp1) * tmp) + mid; + bucket = k - (j + ty) < 0 ? -bucket : bucket; + } + // clamp [0,2k]. Although this is guaranteed by equation, but numerically the floating precision can still break + // boundary + index = bucket + span; + index = min(max(0, index), pos_dim - 1); + res2 = data2[i * seq_dim * pos_dim + (j + ty) * pos_dim + index]; + T[ty + threadIdx.y][threadIdx.x] = res2; +#endif + } + + __syncthreads(); + + // (i,j,k) location of data1 (non-transposed) and output. i unchanged + j = blockIdx.y * tTileSize + threadIdx.y; + k = blockIdx.x * tTileSize + threadIdx.x; + +// read data0 + gather data1 + add all + write +#pragma unroll + for (c = 0, ty = 0; c < tTileSize / tBlockDimY && (j + ty) < seq_dim && k < seq_dim; c++, ty += tBlockDimY) { +#if kDISENTANGLED_VERSION == 1 + // relative position -- version 1 + // for non-transposed matrix 1, just fetch element at the transposed location & add to the result) + if (j + ty - k <= -span) { + res1 = data1[i * seq_dim * pos_dim + (j + ty) * pos_dim + 0]; + } + else if (j + ty - k >= span) { + res1 = data1[i * seq_dim * pos_dim + (j + ty) * pos_dim + pos_dim - 1]; + } + else { + res1 = data1[i * seq_dim * pos_dim + (j + ty) * pos_dim + j + ty - k + span]; // compute index on the fly + } +#elif kDISENTANGLED_VERSION == 2 + // relative position w/ log bucket -- version 2 + if (j + ty - k >= -mid && j + ty - k <= mid) { + // preserved region, (i - j) + span + bucket = j + ty - k; + } + else { + // log bucket region, bucket(i,j) + span + bucket = ceilf((logf(fabsf((j + ty) - k)) - tmp1) * tmp) + mid; + bucket = (j + ty) - k < 0 ? -bucket : bucket; + } + // clamp [0,2k]. Although this is guaranteed by equation, but numerically the floating precision can still break + // boundary + index = bucket + span; + index = min(max(0, index), pos_dim - 1); + res1 = data1[i * seq_dim * pos_dim + (j + ty) * pos_dim + index]; +#endif + + // for non-tranposed matrix 0, same as matrix 1 + res0 = data0[i * seq_dim * seq_dim + (j + ty) * seq_dim + k]; + + // (res0 + res1 + res2) +#if __cplusplus >= 201703L + // C++ 17 has more convenient `if constexpr` for conditional implementation at compile time; before C++ 17, + // switch to template specialization + if constexpr (std::is_same::value || std::is_same::value) { + // double, float32 + res = res0 + res1 + T[threadIdx.x][ty + threadIdx.y]; + } + else if constexpr (std::is_same::value || std::is_same::value) { + // fp16 +#if __CUDA_ARCH__ >= 530 + // half ops only supported >= sm_53 + res = __hadd(res0, __hadd(res1, T[threadIdx.x][ty + threadIdx.y])); +#else + // for < sm_53, workaround/fallback is convert to float and downconvert + res = + __float2half(__half2float(res0) + __half2float(res1) + __half2float(T[threadIdx.x][ty + threadIdx.y])); +#endif + } +#ifdef ENABLE_BF16 + else if constexpr (std::is_same::value) { + // bf16 + res = __hadd(res0, __hadd(res1, T[threadIdx.x][ty + threadIdx.y])); + } +#endif + else if constexpr (std::is_same::value || std::is_same::value) { + // int8_t + res = res0 + res1 + T[threadIdx.x][ty + threadIdx.y]; + } +#else + // before C++ 17, use template specialization + compute_attention(res, res0, res1, T[threadIdx.x][ty + threadIdx.y]); +#endif + // write + result[i * seq_dim * seq_dim + (j + ty) * seq_dim + k] = res; + } +} + +#define INSTANTIATEDISENTANGLEDKERNEL(T) \ + template __global__ void disentangled_attention_kernel( \ + T*, T*, T const*, T const*, int32_t, int32_t, int32_t); \ + template __global__ void disentangled_attention_kernel( \ + T*, T*, T const*, T const*, int32_t, int32_t, int32_t); +INSTANTIATEDISENTANGLEDKERNEL(float) +INSTANTIATEDISENTANGLEDKERNEL(half) +INSTANTIATEDISENTANGLEDKERNEL(int8_t) +#ifdef ENABLE_BF16 +INSTANTIATEDISENTANGLEDKERNEL(__nv_bfloat16) +#endif +#undef INSTANTIATEDISENTANGLEDKERNEL + +template +void invokeDisentangledAttention( + T* result, T* c2c, T* c2p, T* p2c, const int batch_dim, const int seq_dim, const int span, cudaStream_t stream) +{ +#if kDISENTANGLED_VERSION == 1 + dim3 block_optimized(kDISENTANGLED_TILESIZE_V1, kDISENTANGLED_BLOCKDIMY_V1); + dim3 grid_optimized( + (seq_dim - 1) / kDISENTANGLED_TILESIZE_V1 + 1, (seq_dim - 1) / kDISENTANGLED_TILESIZE_V1 + 1, batch_dim); + disentangled_attention_kernel + <<>>(result, c2c, c2p, p2c, batch_dim, seq_dim, span); + +#elif kDISENTANGLED_VERSION == 2 + dim3 block_optimized(kDISENTANGLED_TILESIZE_V2, kDISENTANGLED_BLOCKDIMY_V2); + dim3 grid_optimized( + (seq_dim - 1) / kDISENTANGLED_TILESIZE_V2 + 1, (seq_dim - 1) / kDISENTANGLED_TILESIZE_V2 + 1, batch_dim); + disentangled_attention_kernel + <<>>(result, c2c, c2p, p2c, batch_dim, seq_dim, span); + +#endif +} + +#define INSTANTIATEDISENTANGLEDATTENTION(T) \ + template void invokeDisentangledAttention(T* result, \ + T* c2c, \ + T* c2p, \ + T* p2c, \ + const int batch_dim, \ + const int seq_dim, \ + const int span, \ + cudaStream_t stream); +INSTANTIATEDISENTANGLEDATTENTION(float) +INSTANTIATEDISENTANGLEDATTENTION(half) +INSTANTIATEDISENTANGLEDATTENTION(int8_t) +#ifdef ENABLE_BF16 +INSTANTIATEDISENTANGLEDATTENTION(__nv_bfloat16) +#endif +#undef INSTANTIATEDISENTANGLEDATTENTION + +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/disentangled_attention_kernels.h b/src/fastertransformer/kernels/disentangled_attention_kernels.h new file mode 100644 index 000000000..5119910b9 --- /dev/null +++ b/src/fastertransformer/kernels/disentangled_attention_kernels.h @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#pragma once + +#include "src/fastertransformer/utils/Tensor.h" + +namespace fastertransformer { + +template +void invokeAddQKBiasTransposeRepeat(T* q_buf, + T* k_buf, + T* Q, + const T* bias_Q, + T* K, + const T* bias_K, + const int batch_size, + const int attention_span, + const int head_num, + const int size_per_head, + cudaStream_t stream); + +template +void invokeDisentangledAttention( + T* result, T* c2c, T* c2p, T* p2c, const int batch_dim, const int seq_dim, const int span, cudaStream_t stream); + +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/gen_relative_pos_bias.cu b/src/fastertransformer/kernels/gen_relative_pos_bias.cu index 57c872799..1dcc2644a 100644 --- a/src/fastertransformer/kernels/gen_relative_pos_bias.cu +++ b/src/fastertransformer/kernels/gen_relative_pos_bias.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/gen_relative_pos_bias.h b/src/fastertransformer/kernels/gen_relative_pos_bias.h index e962f2de2..e3c89fa4f 100644 --- a/src/fastertransformer/kernels/gen_relative_pos_bias.h +++ b/src/fastertransformer/kernels/gen_relative_pos_bias.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/gpt_kernels.cu b/src/fastertransformer/kernels/gpt_kernels.cu index e552f3029..abb3b5db4 100644 --- a/src/fastertransformer/kernels/gpt_kernels.cu +++ b/src/fastertransformer/kernels/gpt_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -14,6 +14,7 @@ * limitations under the License. */ +#include "src/fastertransformer/utils/cuda_fp8_utils.h" #ifndef CUDART_VERSION #error CUDART_VERSION Undefined! #elif (CUDART_VERSION >= 11050) @@ -423,6 +424,15 @@ template void invokeBuildDecoderAttentionMask(__nv_bfloat16* attention_mask, const int max_prompt_length, cudaStream_t stream); #endif +#ifdef ENABLE_FP8 +template void invokeBuildDecoderAttentionMask(__nv_fp8_e4m3* attention_mask, + const int* sequence_lengths, + const int* prefix_prompt_lengths, + const int batch_size, + const int max_seq_len, + const int max_prompt_length, + cudaStream_t stream); +#endif template __launch_bounds__(1024, 1) __global__ void lookupHiddenStateOfLastToken(T* from_tensor, diff --git a/src/fastertransformer/kernels/gpt_kernels.h b/src/fastertransformer/kernels/gpt_kernels.h index 091fd92d2..617f9bc05 100644 --- a/src/fastertransformer/kernels/gpt_kernels.h +++ b/src/fastertransformer/kernels/gpt_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/image_merge_kernels.cu b/src/fastertransformer/kernels/image_merge_kernels.cu index 9f03ea4ab..242f860c3 100644 --- a/src/fastertransformer/kernels/image_merge_kernels.cu +++ b/src/fastertransformer/kernels/image_merge_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -84,7 +84,7 @@ template __global__ void image_merge_col32_kernel( int8_t* out, const T* __restrict input, int batch, int H, int W, int n, const float* merge_inFactor) { - const int ite = 4; + // const int ite = 4; // not used const int tid = threadIdx.x; const int W_idx = blockIdx.x; const int H_idx = blockIdx.y; diff --git a/src/fastertransformer/kernels/image_merge_kernels.h b/src/fastertransformer/kernels/image_merge_kernels.h index be75bbb75..d2032ecad 100644 --- a/src/fastertransformer/kernels/image_merge_kernels.h +++ b/src/fastertransformer/kernels/image_merge_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/image_shift_partition_kernels.cu b/src/fastertransformer/kernels/image_shift_partition_kernels.cu index 3de302316..71a307c41 100644 --- a/src/fastertransformer/kernels/image_shift_partition_kernels.cu +++ b/src/fastertransformer/kernels/image_shift_partition_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -37,10 +37,8 @@ shift_partition(T2* out_ptr, const T2* input_ptr, int batch, int H, int W, int n const int idx_in_window = (shifted_H_idx % window_size) * window_size + (shifted_W_idx % window_size); const int output_bid = batch_offset + window_idx * window_size * window_size + idx_in_window; int tid = threadIdx.x; - float2 local_out_fp2; - float local_out = 0.0f; - int id = bid * n + tid; + int id = bid * n + tid; if (tid < n) { out_ptr[output_bid * n + tid] = input_ptr[id]; } diff --git a/src/fastertransformer/kernels/image_shift_partition_kernels.h b/src/fastertransformer/kernels/image_shift_partition_kernels.h index 4e6205a2f..e067d2069 100644 --- a/src/fastertransformer/kernels/image_shift_partition_kernels.h +++ b/src/fastertransformer/kernels/image_shift_partition_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/int8_utils.cuh b/src/fastertransformer/kernels/int8_utils.cuh index 3b15d937e..55b9c4f24 100644 --- a/src/fastertransformer/kernels/int8_utils.cuh +++ b/src/fastertransformer/kernels/int8_utils.cuh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/layernorm_fp8_kernels.cu b/src/fastertransformer/kernels/layernorm_fp8_kernels.cu new file mode 100644 index 000000000..a350c98b5 --- /dev/null +++ b/src/fastertransformer/kernels/layernorm_fp8_kernels.cu @@ -0,0 +1,1159 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/kernels/layernorm_fp8_kernels.h" +#include "src/fastertransformer/kernels/reduce_kernel_utils.cuh" +#include "src/fastertransformer/utils/cuda_bf16_wrapper.h" +#include "src/fastertransformer/utils/cuda_utils.h" +#include + +namespace fastertransformer { + +template +__global__ void +quatizeVectorE4M3(__nv_fp8_e4m3* output, float const* input_qua_amax_ptr, T const* input, uint32_t size, uint32_t n) +{ + for (uint32_t i = threadIdx.x + blockIdx.x * blockDim.x; i < size; i += blockDim.x * gridDim.x) { + if (QUANTIZE_MODE == 0) { + output[i] = __nv_fp8_e4m3((float)(input[i]) / __ldg(input_qua_amax_ptr + (i % n))); + } + else { + output[i] = __nv_fp8_e4m3((float)(input[i]) / __ldg(input_qua_amax_ptr)); + } + } +} + +template +void invokeQuatizeVectorE4M3(__nv_fp8_e4m3* output, + float const* input_qua_amax_ptr, + T const* input, + uint32_t size, + uint32_t n, + cudaStream_t stream) +{ + dim3 grid(1); + dim3 block(256); + quatizeVectorE4M3<<>>(output, input_qua_amax_ptr, input, size, n); +} + +template void invokeQuatizeVectorE4M3(__nv_fp8_e4m3* output, + float const* input_qua_amax_ptr, + float const* input, + uint32_t size, + uint32_t n, + cudaStream_t stream); +template void invokeQuatizeVectorE4M3(__nv_fp8_e4m3* output, + float const* input_qua_amax_ptr, + half const* input, + uint32_t size, + uint32_t n, + cudaStream_t stream); +template void invokeQuatizeVectorE4M3<__nv_bfloat16, 0>(__nv_fp8_e4m3* output, + float const* input_qua_amax_ptr, + __nv_bfloat16 const* input, + uint32_t size, + uint32_t n, + cudaStream_t stream); + +template void invokeQuatizeVectorE4M3(__nv_fp8_e4m3* output, + float const* input_qua_amax_ptr, + float const* input, + uint32_t size, + uint32_t n, + cudaStream_t stream); +template void invokeQuatizeVectorE4M3(__nv_fp8_e4m3* output, + float const* input_qua_amax_ptr, + half const* input, + uint32_t size, + uint32_t n, + cudaStream_t stream); +template void invokeQuatizeVectorE4M3<__nv_bfloat16, 1>(__nv_fp8_e4m3* output, + float const* input_qua_amax_ptr, + __nv_bfloat16 const* input, + uint32_t size, + uint32_t n, + cudaStream_t stream); + +template +__global__ void +dequatizeVectorE4M3(T* output, float const* qua_amax_ptr, __nv_fp8_e4m3 const* input, uint32_t size, uint32_t n) +{ + for (uint32_t i = threadIdx.x + blockIdx.x * blockDim.x; i < size; i += blockDim.x * gridDim.x) { + if (QUANTIZE_MODE == 0) { + output[i] = float(input[i]) * __ldg(qua_amax_ptr + (i % n)); + } + else { + output[i] = float(input[i]) * __ldg(qua_amax_ptr); + } + } +} + +template +void invokeDequatizeVectorE4M3( + T* output, float const* qua_amax_ptr, __nv_fp8_e4m3 const* input, uint32_t size, uint32_t n, cudaStream_t stream) +{ + dim3 grid(1); + dim3 block(256); + dequatizeVectorE4M3<<>>(output, qua_amax_ptr, input, size, n); +} + +template void invokeDequatizeVectorE4M3(float* output, + float const* qua_amax_ptr, + __nv_fp8_e4m3 const* input, + uint32_t size, + uint32_t n, + cudaStream_t stream); +template void invokeDequatizeVectorE4M3(half* output, + float const* qua_amax_ptr, + __nv_fp8_e4m3 const* input, + uint32_t size, + uint32_t n, + cudaStream_t stream); +template void invokeDequatizeVectorE4M3<__nv_bfloat16, 0>(__nv_bfloat16* output, + float const* qua_amax_ptr, + __nv_fp8_e4m3 const* input, + uint32_t size, + uint32_t n, + cudaStream_t stream); + +template void invokeDequatizeVectorE4M3(float* output, + float const* qua_amax_ptr, + __nv_fp8_e4m3 const* input, + uint32_t size, + uint32_t n, + cudaStream_t stream); +template void invokeDequatizeVectorE4M3(half* output, + float const* qua_amax_ptr, + __nv_fp8_e4m3 const* input, + uint32_t size, + uint32_t n, + cudaStream_t stream); +template void invokeDequatizeVectorE4M3<__nv_bfloat16, 1>(__nv_bfloat16* output, + float const* qua_amax_ptr, + __nv_fp8_e4m3 const* input, + uint32_t size, + uint32_t n, + cudaStream_t stream); + +// IDEA: bfloat162 computation ? +template +__global__ void LayerNorm(FP8LayerNormParam param) +{ + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + + float local_sum = 0.0f; + using PackedInType = typename PackType::type; + using PackedOutType = typename PackType::type; + float local_outs[PACKED_SIZE]; + + float input_scalar = 1.0f; + float output_scalar = 1.0f; + if (QUANTIZE_MODE == 0) { + // per channel + input_scalar = __ldg(param.input_deq_ptr + threadIdx.x); + // output_scalar = __ldg(param.output_qua_ptr + threadIdx.x); + output_scalar = __ldg(param.output_qua_ptr); // must per tensor because it is quantize of input tensor of GEMM + } + else if (QUANTIZE_MODE == 1) { + // For per tensor quantization, assume x = input, s = input_scalar, x' = x * s + // Then Norm(x') = E[x'] / sqrt(V[x']). + // Because E[x'] = E[sx] = sE[x], V[X'] = V[sx] = s^2 * V[x] + // E[x'] / sqrt(V[x']) = (sE[x]) / sqrt(s^2 V[x]) = (sE[x]) / (s sqrt(V[x])) + // = E[x] / sqrt(V[x]) = Norm(x) + // So, we can skip the input_scalar to prevent the useless computation cost and memory + // cost. But suggest to add to flag to open/close to prevent issue due to precision. + + // Besides, we can consdier to multiply the output_scalar into gamma and beta + // when loading the weight to prevent the additional computation coat and memory + // cost. + + // input_scalar = __ldg(param.input_deq_ptr); + input_scalar = 1.0f; // We can skip the input scalar by above proof + output_scalar = __ldg(param.output_qua_ptr); + } + + for (int j = 0; threadIdx.x * PACKED_SIZE + j * PACKED_SIZE * blockDim.x < param.n; j++) { + const int offset = j * PACKED_SIZE * blockDim.x; + PackedInType packed_in = reinterpret_cast( + ¶m.input[blockIdx.x * param.n + offset + threadIdx.x * PACKED_SIZE])[0]; +#pragma unroll + for (int packed_i = 0; packed_i < PACKED_SIZE; packed_i++) { + local_outs[packed_i] = (float)(packed_in.array[packed_i]) * input_scalar; + local_sum += local_outs[packed_i]; + } + } + + mean = blockReduceSum(local_sum); + + if (threadIdx.x == 0) + s_mean = mean / param.n; + __syncthreads(); + + float local_var_sum = 0.0f; + for (int j = 0; threadIdx.x * PACKED_SIZE + j * PACKED_SIZE * blockDim.x < param.n; j++) { +#pragma unroll + for (int packed_i = 0; packed_i < PACKED_SIZE; packed_i += 1) { + local_var_sum += (local_outs[packed_i] - s_mean) * (local_outs[packed_i] - s_mean); + } + } + + variance = blockReduceSum(local_var_sum); + + if (threadIdx.x == 0) + s_variance = rsqrtf(variance / param.n + 1e-6); + __syncthreads(); + + for (int j = 0; threadIdx.x * PACKED_SIZE + j * PACKED_SIZE * blockDim.x < param.n; j++) { + const int offset = j * PACKED_SIZE * blockDim.x; + PackedOutType packed_out; + PackedInType packed_gamma = + reinterpret_cast(¶m.gamma[threadIdx.x * PACKED_SIZE + offset])[0]; + PackedInType packed_beta = + reinterpret_cast(¶m.beta[threadIdx.x * PACKED_SIZE + offset])[0]; +#pragma unroll + for (int packed_i = 0; packed_i < PACKED_SIZE; packed_i += 1) { + packed_out.array[packed_i] = + (T1)((((local_outs[packed_i] - s_mean) * s_variance * (float)(packed_gamma.array[packed_i]) + + (float)packed_beta.array[packed_i])) + * output_scalar); + } + reinterpret_cast( + ¶m.normed_output[blockIdx.x * param.n + offset + threadIdx.x * PACKED_SIZE])[0] = packed_out; + } +} + +template +__global__ void LayerNormE4M3x4(FP8LayerNormParam param) +{ + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + + __nv_bfloat162* input1 = (__nv_bfloat162*)(param.input + blockIdx.x * param.n + 4 * threadIdx.x); + __nv_bfloat162* input2 = (__nv_bfloat162*)(param.input + blockIdx.x * param.n + 4 * threadIdx.x + 2); + __nv_bfloat162 local_out1 = __nv_bfloat162(*input1); + __nv_bfloat162 local_out2 = __nv_bfloat162(*input2); + // float input_scalar; + // float output_scalar; + + if (QUANTIZE_MODE == 0) { + // For per channel quantization. + local_out1.x = local_out1.x * (__nv_bfloat16)__ldg(param.input_deq_ptr + threadIdx.x * 4 + 0); + local_out1.y = local_out1.y * (__nv_bfloat16)__ldg(param.input_deq_ptr + threadIdx.x * 4 + 1); + local_out2.x = local_out2.x * (__nv_bfloat16)__ldg(param.input_deq_ptr + threadIdx.x * 4 + 2); + local_out2.y = local_out2.y * (__nv_bfloat16)__ldg(param.input_deq_ptr + threadIdx.x * 4 + 3); + } + else if (QUANTIZE_MODE == 1) { + // For per tensor quantization, assume x = input, s = input_scalar, x' = x * s + // Then Norm(x') = E[x'] / sqrt(V[x']). + // Because E[x'] = E[sx] = sE[x], V[X'] = V[sx] = s^2 * V[x] + // E[x'] / sqrt(V[x']) = (sE[x]) / sqrt(s^2 V[x]) = (sE[x]) / (s sqrt(V[x])) + // = E[x] / sqrt(V[x]) = Norm(x) + // So, we can skip the input_scalar to prevent the useless computation cost and memory + // cost. But suggest to add to flag to open/close to prevent issue due to precision. + + // Besides, we can consdier to multiply the output_scalar into gamma and beta + // when loading the weight to prevent the additional computation coat and memory + // cost. + + // __nv_bfloat16 input_scalar = __ldg(param.input_deq_ptr); + // __nv_bfloat16 input_scalar = 1.0f; // We can skip the input scalar by above proof + // local_out1.x = local_out1.x * input_scalar; + // local_out1.y = local_out1.y * input_scalar; + // local_out2.x = local_out2.x * input_scalar; + // local_out2.y = local_out2.y * input_scalar; + } + + float local_sum = 0.0f; + local_sum = (float)(local_out1.x + local_out1.y + local_out2.x + local_out2.y); + + mean = blockReduceSum(local_sum); + + if (threadIdx.x == 0) + s_mean = mean / param.n; + __syncthreads(); + + float local_var_sum = 0.0f; + float diff1 = (float)local_out1.x - s_mean; + float diff2 = (float)local_out1.y - s_mean; + float diff3 = (float)local_out2.y - s_mean; + float diff4 = (float)local_out2.y - s_mean; + local_var_sum += diff1 * diff1 + diff2 * diff2 + diff3 * diff3 + diff4 * diff4; + variance = blockReduceSum(local_var_sum); + + if (threadIdx.x == 0) + s_variance = rsqrtf(variance / param.n + 1e-6); + __syncthreads(); + + float output_scalar[4]; + if (QUANTIZE_MODE == 0 && false) { // must per tensor because it is quantize of input tensor of GEMM + // For per channel quantization. + output_scalar[0] = (float)__ldg(param.output_qua_ptr + threadIdx.x * 4 + 0); + output_scalar[1] = (float)__ldg(param.output_qua_ptr + threadIdx.x * 4 + 1); + output_scalar[2] = (float)__ldg(param.output_qua_ptr + threadIdx.x * 4 + 2); + output_scalar[3] = (float)__ldg(param.output_qua_ptr + threadIdx.x * 4 + 3); + } + else if (QUANTIZE_MODE == 1 || true) { + output_scalar[0] = (float)__ldg(param.output_qua_ptr); + output_scalar[1] = (float)__ldg(param.output_qua_ptr); + output_scalar[2] = (float)__ldg(param.output_qua_ptr); + output_scalar[3] = (float)__ldg(param.output_qua_ptr); + } + + __nv_bfloat162 result1; + __nv_bfloat162 result2; + result1.x = (__nv_bfloat16)((((float)local_out1.x - s_mean) * s_variance * (float)param.gamma[threadIdx.x * 4 + 0] + + (float)param.beta[threadIdx.x * 4 + 0]) + * output_scalar[0]); + result1.y = (__nv_bfloat16)((((float)local_out1.y - s_mean) * s_variance * (float)param.gamma[threadIdx.x * 4 + 1] + + (float)param.beta[threadIdx.x * 4 + 1]) + * output_scalar[1]); + result2.x = (__nv_bfloat16)((((float)local_out2.x - s_mean) * s_variance * (float)param.gamma[threadIdx.x * 4 + 2] + + (float)param.beta[threadIdx.x * 4 + 2]) + * output_scalar[2]); + result2.y = (__nv_bfloat16)((((float)local_out2.y - s_mean) * s_variance * (float)param.gamma[threadIdx.x * 4 + 3] + + (float)param.beta[threadIdx.x * 4 + 3]) + * output_scalar[3]); + + __nv_fp8x4_e4m3 output_val = __nv_fp8x4_e4m3(result1, result2); + __nv_fp8x4_e4m3* output_ptr = (__nv_fp8x4_e4m3*)(param.normed_output + blockIdx.x * param.n); + output_ptr[threadIdx.x] = output_val; +} + +#define LN_KERNEL(PACKED_SIZE) \ + dim3 grid(param.m); \ + dim3 block(min(param.n / PACKED_SIZE, 1024)); \ + LayerNorm<<>>(param); + +template +void invokeFP8LayerNorm(FP8LayerNormParam param) +{ + assert(param.n % 2 == 0); + if (param.n % 8 == 0) { + LN_KERNEL(8); + } + else if (param.n % 4 == 0) { + LN_KERNEL(4); + } + else if (param.n % 2 == 0) { + LN_KERNEL(2); + } +} + +// template void invokeFP8LayerNorm<__nv_fp8_e4m3, float, 0>(FP8LayerNormParam<__nv_fp8_e4m3, float> param); +// template void invokeFP8LayerNorm(FP8LayerNormParam param); +// template void invokeFP8LayerNorm(FP8LayerNormParam param); +// template void invokeFP8LayerNorm<__nv_fp8_e4m3, half, 0>(FP8LayerNormParam<__nv_fp8_e4m3, half> param); +template void +invokeFP8LayerNorm<__nv_fp8_e4m3, __nv_bfloat16, 0>(FP8LayerNormParam<__nv_fp8_e4m3, __nv_bfloat16> param); + +// template void invokeFP8LayerNorm<__nv_fp8_e4m3, float, 1>(FP8LayerNormParam<__nv_fp8_e4m3, float> param); +// template void invokeFP8LayerNorm(FP8LayerNormParam param); +// template void invokeFP8LayerNorm(FP8LayerNormParam param); +// template void invokeFP8LayerNorm<__nv_fp8_e4m3, half, 1>(FP8LayerNormParam<__nv_fp8_e4m3, half> param); +// template void +// invokeFP8LayerNorm<__nv_fp8_e4m3, __nv_bfloat16, 1>(FP8LayerNormParam<__nv_fp8_e4m3, __nv_bfloat16> param); + +template +__global__ void generalFP8IOPostLayerNorm(T1* normed_output, + const T1* input, + const T2* __restrict gamma, + const T2* __restrict beta, + const float* input_scalar, + const float* output_scalar, + int m, + int n) +{ + int tid = threadIdx.x; + + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + + float local_sum = 0.0f; + float local_sum_sq = 0.0f; + + for (int i = tid; i < n; i += blockDim.x) { + // float local_out = (float)(__ldg(&input[blockIdx.x * n + i])); + float local_out = (float)(input[blockIdx.x * n + i]); + local_sum += local_out; + local_sum_sq += local_out * local_out; + } + __syncthreads(); // TODO check where should we put sync + + mean = blockReduceSum(local_sum); + __syncthreads(); // TODO check where should we put sync + variance = blockReduceSum(local_sum_sq); + __syncthreads(); // TODO check where should we put sync + + if (threadIdx.x == 0) { + s_mean = mean / n; + s_variance = rsqrtf((variance / n) - (s_mean * s_mean) + 1e-6); + } + __syncthreads(); + + for (int i = tid; i < n; i += blockDim.x) { + // float beta_val = (beta == nullptr) ? 0.0f : (float)(__ldg(&beta[i])); + float beta_val = (beta == nullptr) ? 0.0f : (float)(beta[i]); + normed_output[blockIdx.x * n + i] = + (T1)(((((float)input[blockIdx.x * n + i] - s_mean) * s_variance) * (float)(gamma[i]) + beta_val) + * (float)(__ldg(output_scalar))); + // (T1)((((float)output[blockIdx.x * n + i] - s_mean) * s_variance) * (float)(__ldg(&gamma[i])) + beta_val); + } +} + +template +void invokeGeneralFP8IOPostLayerNorm(GeneralFP8IOPostLayerNormParam param) +{ + dim3 grid(param.m); + dim3 block(min(param.n, 1024)); + + /* For general cases, n is equal to hidden_units, e.g., 512/1024. + Since we have warp shuffle inside the code, block.x % 32 should be 0. + */ + + if (param.n % 32 != 0) { + block.x = 1024; + } + + /* should pay attention to the rsqrt precision*/ + generalFP8IOPostLayerNorm<<>>(param.normed_output, + param.input, + param.gamma, + param.beta, + param.input_deq_ptr, + param.output_qua_ptr, + param.m, + param.n); // For gpt-3 +} + +template void invokeGeneralFP8IOPostLayerNorm<__nv_fp8_e4m3, __nv_bfloat16, 0>( + GeneralFP8IOPostLayerNormParam<__nv_fp8_e4m3, __nv_bfloat16> param); + +template void invokeGeneralFP8IOPostLayerNorm<__nv_fp8_e4m3, __nv_bfloat16, 1>( + GeneralFP8IOPostLayerNormParam<__nv_fp8_e4m3, __nv_bfloat16> param); + +template +__global__ void generalFP8AddBiasResidualLayerNorm(const T2* __restrict input, + const T2* __restrict gamma, + const T2* __restrict beta, + const T2* __restrict bias, + T2* output, + T1* norm_output, + const float* input_scale, + const float* output_scale, + int m, + int n) +{ + int tid = threadIdx.x; + + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + + float local_sum = 0.0f; + float local_sum_sq = 0.0f; + + float input_scale_val = input_scale == nullptr ? 1.0f : __ldg(input_scale); + float output_scale_val = output_scale == nullptr ? 1.0f : __ldg(output_scale); + + for (int i = tid; i < n; i += blockDim.x) { + // float local_out = (float)(__ldg(&input[blockIdx.x * n + i])); + float local_out = (float)(input[blockIdx.x * n + i]); + local_out += (float)(output[blockIdx.x * n + i]) * input_scale_val; + if (bias != nullptr) { + // local_out += (float)(__ldg(&bias[i])); + local_out += (float)(bias[i]); + } + output[blockIdx.x * n + i] = (T2)local_out; + local_sum += local_out; + local_sum_sq += local_out * local_out; + } + __syncthreads(); // TODO check where should we put sync + + mean = blockReduceSum(local_sum); + __syncthreads(); // TODO check where should we put sync + variance = blockReduceSum(local_sum_sq); + __syncthreads(); // TODO check where should we put sync + + if (threadIdx.x == 0) { + s_mean = mean / n; + s_variance = rsqrtf((variance / n) - (s_mean * s_mean) + 1e-6); + } + __syncthreads(); + + for (int i = tid; i < n; i += blockDim.x) { + // float beta_val = (beta == nullptr) ? 0.0f : (float)(__ldg(&beta[i])); + float beta_val = (beta == nullptr) ? 0.0f : (float)(beta[i]); + norm_output[blockIdx.x * n + i] = + (T1)(((((float)output[blockIdx.x * n + i] - s_mean) * s_variance) * (float)(gamma[i]) + beta_val) + * output_scale_val); + } +} + +// TODO: implement T2 = half2 +template<> +__global__ void generalFP8AddBiasResidualLayerNorm(const __nv_bfloat162_2_xy* __restrict input, + const __nv_bfloat162_2_xy* __restrict gamma, + const __nv_bfloat162_2_xy* __restrict beta, + const __nv_bfloat162_2_xy* __restrict bias, + __nv_bfloat162_2_xy* output, + __nv_fp8x4_e4m3* norm_output, + const float* input_scale, + const float* output_scale, + int m, + int n) +{ + using bf16_4 = __nv_bfloat162_2_xy; + using bf16_2 = __nv_bfloat162; + using fp8_4 = __nv_fp8x4_e4m3; + int tid = threadIdx.x; + int real_n = n * 4; + + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + + float local_sum = 0.0f; + float local_sum_sq = 0.0f; + + bf16_2 input_scale_val = input_scale == nullptr ? cuda_cast(1.0f) : cuda_cast(__ldg(input_scale)); + bf16_2 output_scale_val = + output_scale == nullptr ? cuda_cast(1.0f) : cuda_cast(__ldg(output_scale)); + + for (int i = tid; i < n; i += blockDim.x) { + // float local_out = (float)(__ldg(&input[blockIdx.x * n + i])); + bf16_4 local_out = input[blockIdx.x * n + i]; + local_out.x = hadd2(hmul2(output[blockIdx.x * n + i].x, input_scale_val), local_out.x); + local_out.y = hadd2(hmul2(output[blockIdx.x * n + i].y, input_scale_val), local_out.y); + if (bias != nullptr) { + // local_out += (float)(__ldg(&bias[i])); + local_out.x = hadd2(local_out.x, bias[i].x); + local_out.y = hadd2(local_out.y, bias[i].y); + } + output[blockIdx.x * n + i] = local_out; + // NOTE: need float accum here, or low task accuracy (summarization) + local_sum += (float)(local_out.x.x) + (float)(local_out.x.y) + (float)(local_out.y.x) + (float)(local_out.y.y); + local_sum_sq += (float)local_out.x.x * (float)local_out.x.x + (float)local_out.y.x * (float)local_out.y.x + + (float)local_out.x.y * (float)local_out.x.y + (float)local_out.y.y * (float)local_out.y.y; + } + __syncthreads(); // TODO check where should we put sync + + mean = blockReduceSum(local_sum); + __syncthreads(); // TODO check where should we put sync + variance = blockReduceSum(local_sum_sq); + __syncthreads(); // TODO check where should we put sync + + if (threadIdx.x == 0) { + s_mean = mean / real_n; + s_variance = rsqrtf((variance / real_n) - (s_mean * s_mean) + 1e-6); + } + __syncthreads(); + + bf16_2 s_mean_2 = cuda_cast(s_mean); + bf16_2 s_var_2 = cuda_cast(s_variance); + + for (int i = tid; i < n; i += blockDim.x) { + bf16_4 norm_output_val; + norm_output_val.x = + hmul2(hadd2(hmul2(hmul2(hsub2(output[blockIdx.x * n + i].x, s_mean_2), s_var_2), gamma[i].x), beta[i].x), + output_scale_val); + norm_output_val.y = + hmul2(hadd2(hmul2(hmul2(hsub2(output[blockIdx.x * n + i].y, s_mean_2), s_var_2), gamma[i].y), beta[i].y), + output_scale_val); + norm_output[blockIdx.x * n + i] = fp8_4(norm_output_val.x, norm_output_val.y); + } +} + +// TODO: implement T2 = half2 +template<> +__global__ void generalFP8AddBiasResidualLayerNorm(const __nv_bfloat162* __restrict input, + const __nv_bfloat162* __restrict gamma, + const __nv_bfloat162* __restrict beta, + const __nv_bfloat162* __restrict bias, + __nv_bfloat162* output, + __nv_fp8x2_e4m3* norm_output, + const float* input_scale, + const float* output_scale, + int m, + int n) +{ + using bf16_2 = __nv_bfloat162; + using fp8_2 = __nv_fp8x2_e4m3; + int tid = threadIdx.x; + int real_n = n * 2; + + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + + float local_sum = 0.0f; + float local_sum_sq = 0.0f; + + bf16_2 input_scale_val = input_scale == nullptr ? cuda_cast(1.0f) : cuda_cast(__ldg(input_scale)); + bf16_2 output_scale_val = + output_scale == nullptr ? cuda_cast(1.0f) : cuda_cast(__ldg(output_scale)); + + for (int i = tid; i < n; i += blockDim.x) { + // float local_out = (float)(__ldg(&input[blockIdx.x * n + i])); + bf16_2 local_out = input[blockIdx.x * n + i]; + local_out = hadd2(hmul2(output[blockIdx.x * n + i], input_scale_val), local_out); + if (bias != nullptr) { + // local_out += (float)(__ldg(&bias[i])); + local_out = hadd2(local_out, bias[i]); + } + output[blockIdx.x * n + i] = local_out; + local_sum += (float)(local_out.x) + (float)(local_out.y); + local_sum_sq += (float)local_out.x * (float)local_out.x + (float)local_out.y * (float)local_out.y; + } + __syncthreads(); // TODO check where should we put sync + + mean = blockReduceSum(local_sum); + __syncthreads(); // TODO check where should we put sync + variance = blockReduceSum(local_sum_sq); + __syncthreads(); // TODO check where should we put sync + + if (threadIdx.x == 0) { + s_mean = mean / real_n; + s_variance = rsqrtf((variance / real_n) - (s_mean * s_mean) + 1e-6); + } + __syncthreads(); + + bf16_2 s_mean_2 = cuda_cast(s_mean); + bf16_2 s_var_2 = cuda_cast(s_variance); + + for (int i = tid; i < n; i += blockDim.x) { + norm_output[blockIdx.x * n + i] = + fp8_2(hmul2(hadd2(hmul2(hmul2(hsub2(output[blockIdx.x * n + i], s_mean_2), s_var_2), gamma[i]), beta[i]), + output_scale_val)); + } +} + +template +void invokeGeneralFP8AddBiasResidualPreLayerNorm(GeneralFP8AddBiasResidualPreLayerNormParam param) +{ + dim3 grid(param.m); + + /* For general cases, n is equal to hidden_units, e.g., 512/1024. + Since we have warp shuffle inside the code, block.x % 32 should be 0. + */ + // NOTE: only T2 = bfloat supported yet + if (param.n % 4 == 0) { + dim3 block(min(param.n / 4, 1024)); + generalFP8AddBiasResidualLayerNorm<<>>((const __nv_bfloat162_2_xy*)param.residual, + (const __nv_bfloat162_2_xy*)param.gamma, + (const __nv_bfloat162_2_xy*)param.beta, + (const __nv_bfloat162_2_xy*)param.bias, + (__nv_bfloat162_2_xy*)param.output, + (__nv_fp8x4_e4m3*)param.normed_output, + param.input_deq_ptr, + param.output_qua_ptr, + param.m, + param.n / 4); // For gpt-3 + } + else if (param.n % 2 == 0) { + dim3 block(min(param.n / 2, 1024)); + generalFP8AddBiasResidualLayerNorm<<>>((const __nv_bfloat162*)param.residual, + (const __nv_bfloat162*)param.gamma, + (const __nv_bfloat162*)param.beta, + (const __nv_bfloat162*)param.bias, + (__nv_bfloat162*)param.output, + (__nv_fp8x2_e4m3*)param.normed_output, + param.input_deq_ptr, + param.output_qua_ptr, + param.m, + param.n / 2); // For gpt-3 + } + else { + dim3 block(min(param.n, 1024)); + if (param.n % 32 != 0) { + block.x = 1024; + } + // const int vec_n = 4 / sizeof(T2); + // block.x = block.x / vec_n; // We don't need this setting because we don't have bfloat162 implementation now + + /* should pay attention to the rsqrt precision*/ + generalFP8AddBiasResidualLayerNorm<<>>(param.residual, + param.gamma, + param.beta, + param.bias, + param.output, + param.normed_output, + param.input_deq_ptr, + param.output_qua_ptr, + param.m, + param.n); // For gpt-3 + } + return; +} + +template void invokeGeneralFP8AddBiasResidualPreLayerNorm<__nv_fp8_e4m3, float, 0>( + GeneralFP8AddBiasResidualPreLayerNormParam<__nv_fp8_e4m3, float> param); +template void invokeGeneralFP8AddBiasResidualPreLayerNorm( + GeneralFP8AddBiasResidualPreLayerNormParam param); +template void invokeGeneralFP8AddBiasResidualPreLayerNorm( + GeneralFP8AddBiasResidualPreLayerNormParam param); +template void invokeGeneralFP8AddBiasResidualPreLayerNorm<__nv_fp8_e4m3, half, 0>( + GeneralFP8AddBiasResidualPreLayerNormParam<__nv_fp8_e4m3, half> param); +template void invokeGeneralFP8AddBiasResidualPreLayerNorm<__nv_fp8_e4m3, __nv_bfloat16, 0>( + GeneralFP8AddBiasResidualPreLayerNormParam<__nv_fp8_e4m3, __nv_bfloat16> param); + +template void invokeGeneralFP8AddBiasResidualPreLayerNorm<__nv_fp8_e4m3, float, 1>( + GeneralFP8AddBiasResidualPreLayerNormParam<__nv_fp8_e4m3, float> param); +template void invokeGeneralFP8AddBiasResidualPreLayerNorm( + GeneralFP8AddBiasResidualPreLayerNormParam param); +template void invokeGeneralFP8AddBiasResidualPreLayerNorm( + GeneralFP8AddBiasResidualPreLayerNormParam param); +template void invokeGeneralFP8AddBiasResidualPreLayerNorm<__nv_fp8_e4m3, half, 1>( + GeneralFP8AddBiasResidualPreLayerNormParam<__nv_fp8_e4m3, half> param); +template void invokeGeneralFP8AddBiasResidualPreLayerNorm<__nv_fp8_e4m3, __nv_bfloat16, 1>( + GeneralFP8AddBiasResidualPreLayerNormParam<__nv_fp8_e4m3, __nv_bfloat16> param); + +template +__global__ void generalFP8IOAddBiasResidualPostLayerNormV1(GeneralFP8IOAddBiasResidualPostLayerNormParam param) +{ + int tid = threadIdx.x; + + __shared__ float s_mean; + __shared__ float s_variance; + // float mean = 0.0f; + // float variance = 0.0f; + + float local_sum = 0.0f; + float local_sum_sq = 0.0f; + + float input_scalar; + float output_scalar; + if (QUANTIZE_MODE == 0) { + // per channel + input_scalar = __ldg(param.input_scale + threadIdx.x); + output_scalar = __ldg(param.output_scale); // must per tensor because it is quantize of input tensor of GEMM + } + else if (QUANTIZE_MODE == 1) { + input_scalar = __ldg(param.input_scale); + output_scalar = __ldg(param.output_scale); + } + else if (QUANTIZE_MODE == QUANTIZE_MODE::PER_CHANNEL_WEIGHT_PER_TENSOR_ACT) { + input_scalar = __ldg(param.input_scale) * __ldg(param.input_scale_2 + threadIdx.x) + * (param.input_scale_2_min == nullptr ? 1.0f : ldg(param.input_scale_2_min)); + output_scalar = __ldg(param.output_scale); + } + + for (int i = tid; i < param.n; i += blockDim.x) { + // float local_out = (float)(__ldg(¶m.input[blockIdx.x * param.n + i])) * input_scalar; + float local_out = (float)(param.input[blockIdx.x * param.n + i]) * input_scalar; + local_out = local_out + (float)(param.residual[blockIdx.x * param.n + i]) * __ldg(param.residual_scale); + if (param.bias != nullptr) { + // local_out += (float)(__ldg(&bias[i])); + local_out += (float)(param.bias[i]); + } + + param.normed_output[blockIdx.x * param.n + i] = (T1)local_out; // TODO This conversion has bug + local_sum += local_out; + local_sum_sq += local_out * local_out; + } + __syncthreads(); // TODO check where should we put sync + + float sums[2]; + sums[0] = local_sum; + sums[1] = local_sum_sq; + blockReduceSumV2(sums); + + if (threadIdx.x == 0) { + s_mean = sums[0] / param.n; + s_variance = rsqrtf(sums[1] / param.n - s_mean * s_mean + 1e-12f); + } + __syncthreads(); + + for (int i = tid; i < param.n; i += blockDim.x) { + // float beta_val = (beta == nullptr) ? 0.0f : (float)(__ldg(&beta[i])); + float beta_val = (param.beta == nullptr) ? 0.0f : (float)(param.beta[i]); + param.normed_output[blockIdx.x * param.n + i] = + (T1)(((((float)param.normed_output[blockIdx.x * param.n + i] - s_mean) * s_variance) + * (float)(param.gamma[i]) + + beta_val) + * output_scalar); + } +} + +template +__global__ void generalFP8IOAddBiasResidualPostLayerNormV2(GeneralFP8IOAddBiasResidualPostLayerNormParam param) +{ + using T1_4 = __nv_fp8x4_e4m3; + using T2_2 = typename TypeConverter::Type; + __shared__ float s_mean; + __shared__ float s_variance; + + float local_sum = 0.0f; + float local_sum_sq = 0.0f; + + T2_2 input_scalar = cuda_cast(__ldg(param.input_scale)); + T2_2 output_scalar = cuda_cast(__ldg(param.output_scale)); + T2_2 residual_scalar = cuda_cast(__ldg(param.residual_scale)); + + const int n = param.n / 4; + + T1_4* input_ptr = (T1_4*)(param.input); + T1_4* residual_ptr = (T1_4*)(param.residual); + T1_4* normed_output_ptr = (T1_4*)(param.normed_output); + T2_2* bias_ptr = (T2_2*)(param.bias); + T2_2* gamma_ptr = (T2_2*)(param.gamma); + T2_2* beta_ptr = (T2_2*)(param.beta); + + T2_2 local_outs[2]; + + T2_2 val_0, val_1; + const int index_0 = 2 * threadIdx.x; + const int index_1 = index_0 + 1; + + fp8x4_e4m3_to_bfloat2(&val_0, &val_1, &input_ptr[blockIdx.x * n + threadIdx.x]); + val_0 = hmul2(val_0, input_scalar); + val_1 = hmul2(val_1, input_scalar); + local_outs[0] = val_0; + local_outs[1] = val_1; + + fp8x4_e4m3_to_bfloat2(&val_0, &val_1, &residual_ptr[blockIdx.x * n + threadIdx.x]); + val_0 = hmul2(val_0, residual_scalar); + val_1 = hmul2(val_1, residual_scalar); + local_outs[0] += val_0; + local_outs[1] += val_1; + + if (bias_ptr != nullptr) { + local_outs[0] = hadd2(local_outs[0], bias_ptr[index_0]); + local_outs[1] = hadd2(local_outs[1], bias_ptr[index_1]); + } + + local_sum += (float)(local_outs[0].x + local_outs[0].y + local_outs[1].x + local_outs[1].y); + local_sum_sq += (float)local_outs[0].x * (float)local_outs[0].x + (float)local_outs[0].y * (float)local_outs[0].y + + (float)local_outs[1].x * (float)local_outs[1].x + (float)local_outs[1].y * (float)local_outs[1].y; + + __syncthreads(); // TODO check where should we put sync + + float sums[2]; + sums[0] = local_sum; + sums[1] = local_sum_sq; + blockReduceSumV2(sums); + + if (threadIdx.x == 0) { + s_mean = sums[0] / param.n; + s_variance = rsqrtf(sums[1] / param.n - s_mean * s_mean + 1e-12f); + } + __syncthreads(); + + T2_2 s_mean_2 = cuda_cast(s_mean); + T2_2 s_var_2 = cuda_cast(s_variance); + + // {[(x - mean) * var * gamma] + beta} * output_scale + local_outs[0] = + hmul2(hadd2(hmul2(hmul2(hsub2(local_outs[0], s_mean_2), s_var_2), gamma_ptr[index_0]), beta_ptr[index_0]), + output_scalar); + local_outs[1] = + hmul2(hadd2(hmul2(hmul2(hsub2(local_outs[1], s_mean_2), s_var_2), gamma_ptr[index_1]), beta_ptr[index_1]), + output_scalar); + + normed_output_ptr[blockIdx.x * n + threadIdx.x] = T1_4(local_outs[0], local_outs[1]); +} + +template +__global__ void generalFP8IOAddBiasResidualPostLayerNormV3(GeneralFP8IOAddBiasResidualPostLayerNormParam param) +{ + // Each warp handle one row. So, we can save the cost of sync of block. + // But when param.m is small, the launched blocks are too small the performance is worse + // than V2. + using T1_4 = __nv_fp8x4_e4m3; + using T2_2 = typename TypeConverter::Type; + + float local_sum = 0.0f; + float local_sum_sq = 0.0f; + + T2_2 input_scalar = cuda_cast(__ldg(param.input_scale)); + T2_2 output_scalar = cuda_cast(__ldg(param.output_scale)); + T2_2 residual_scalar = cuda_cast(__ldg(param.residual_scale)); + + const int n = param.n / 4; + + T1_4* input_ptr = (T1_4*)(param.input); + T1_4* residual_ptr = (T1_4*)(param.residual); + T1_4* normed_output_ptr = (T1_4*)(param.normed_output); + T2_2* bias_ptr = (T2_2*)(param.bias); + T2_2* gamma_ptr = (T2_2*)(param.gamma); + T2_2* beta_ptr = (T2_2*)(param.beta); + + T2_2 local_outs[ELEMENT_PER_THREAD][2]; + + const int row_id = blockIdx.x * blockDim.y + threadIdx.y; + if (row_id > param.m) { + return; + } + + T2_2 val_0, val_1; + +#pragma unroll + for (int i = 0; i < ELEMENT_PER_THREAD; i++) { + + fp8x4_e4m3_to_bfloat2(&val_0, &val_1, &input_ptr[row_id * n + i * blockDim.x + threadIdx.x]); + val_0 = hmul2(val_0, input_scalar); + val_1 = hmul2(val_1, input_scalar); + local_outs[i][0] = val_0; + local_outs[i][1] = val_1; + + fp8x4_e4m3_to_bfloat2(&val_0, &val_1, &residual_ptr[row_id * n + i * blockDim.x + threadIdx.x]); + val_0 = hmul2(val_0, residual_scalar); + val_1 = hmul2(val_1, residual_scalar); + local_outs[i][0] += val_0; + local_outs[i][1] += val_1; + + if (bias_ptr != nullptr) { + local_outs[i][0] = hadd2(local_outs[i][0], __ldg(bias_ptr + 2 * (i * blockDim.x + threadIdx.x) + 0)); + local_outs[i][1] = hadd2(local_outs[i][1], __ldg(bias_ptr + 2 * (i * blockDim.x + threadIdx.x) + 1)); + } + + val_0 = hadd2(local_outs[i][0], local_outs[i][1]); + local_sum += (float)(val_0.x + val_0.y); + val_0 = hmul2(local_outs[i][0], local_outs[i][0]); + val_1 = hmul2(local_outs[i][1], local_outs[i][1]); + val_1 = hadd2(val_1, val_0); + local_sum_sq += (float)(val_1.x + val_1.y); + } + + float sums[2]; + sums[0] = local_sum; + sums[1] = local_sum_sq; + warpReduceSumV2(sums); + + sums[0] = sums[0] / (float)(param.n); + sums[1] = rsqrtf(sums[1] / (float)(param.n) - sums[0] * sums[0] + 1e-12f); + + T2_2 s_mean_2 = cuda_cast(sums[0]); + T2_2 s_var_2 = cuda_cast(sums[1]); +#pragma unroll + for (int i = 0; i < ELEMENT_PER_THREAD; i++) { + + // {[(x - mean) * var * gamma] + beta} * output_scale + local_outs[i][0] = hmul2(hadd2(hmul2(hmul2(hsub2(local_outs[i][0], s_mean_2), s_var_2), + ldg(gamma_ptr + 2 * (i * blockDim.x + threadIdx.x) + 0)), + ldg(beta_ptr + 2 * (i * blockDim.x + threadIdx.x) + 0)), + output_scalar); + local_outs[i][1] = hmul2(hadd2(hmul2(hmul2(hsub2(local_outs[i][1], s_mean_2), s_var_2), + ldg(gamma_ptr + 2 * (i * blockDim.x + threadIdx.x) + 1)), + ldg(beta_ptr + 2 * (i * blockDim.x + threadIdx.x) + 1)), + output_scalar); + normed_output_ptr[row_id * n + i * blockDim.x + threadIdx.x] = T1_4(local_outs[i][0], local_outs[i][1]); + } +} + +template +void invokeGeneralFP8IOAddBiasResidualPostLayerNorm(GeneralFP8IOAddBiasResidualPostLayerNormParam param) +{ + dim3 grid(param.m); + dim3 block(min(param.n, 1024)); + FT_CHECK(param.n <= 1024); + if (param.n % 32 != 0) { + block.x = 1024; + } + + if (param.n % 4 == 0) { + // TODO (bhsueh) check the condition here + if (param.m > 1024) { + block.x = 32; + const int WARP_NUM = 8; + block.y = WARP_NUM; + grid.x = (grid.x + (WARP_NUM - 1)) / WARP_NUM; + if (param.n == 1024) { + generalFP8IOAddBiasResidualPostLayerNormV3 + <<>>(param); + } + else if (param.n == 768) { + generalFP8IOAddBiasResidualPostLayerNormV3 + <<>>(param); + } + } + else { + block.x /= 4; + generalFP8IOAddBiasResidualPostLayerNormV2<<>>(param); + } + } + else { + generalFP8IOAddBiasResidualPostLayerNormV1<<>>(param); + } +} + +template void invokeGeneralFP8IOAddBiasResidualPostLayerNorm<__nv_fp8_e4m3, __nv_bfloat16, PER_CHANNEL>( + GeneralFP8IOAddBiasResidualPostLayerNormParam<__nv_fp8_e4m3, __nv_bfloat16> param); + +template void invokeGeneralFP8IOAddBiasResidualPostLayerNorm<__nv_fp8_e4m3, __nv_bfloat16, PER_TENSOR>( + GeneralFP8IOAddBiasResidualPostLayerNormParam<__nv_fp8_e4m3, __nv_bfloat16> param); + +template void +invokeGeneralFP8IOAddBiasResidualPostLayerNorm<__nv_fp8_e4m3, __nv_bfloat16, PER_CHANNEL_WEIGHT_PER_TENSOR_ACT>( + GeneralFP8IOAddBiasResidualPostLayerNormParam<__nv_fp8_e4m3, __nv_bfloat16> param); + +template +__global__ void removePaddingEmbLookupLayerNormFP8Out(RemovePaddingEmbLookupLayerNormFP8OutParam param) +{ + float local_outs[ELEMENT_PER_THREAD]; + + __shared__ float s_mean; + __shared__ float s_variance; + + float local_sum = 0.0f; + float local_sum_sq = 0.0f; + + float output_scalar = __ldg(param.output_scale); + for (int i = 0; i < ELEMENT_PER_THREAD; i++) { + int index = blockDim.x * i + threadIdx.x; + int padded_row = blockIdx.x + (param.padding_offset == nullptr ? 0 : param.padding_offset[blockIdx.x]); + int position_id = + param.position_ids == nullptr ? padded_row % param.max_seq_len : param.position_ids[padded_row]; + int token_type_id = param.token_type_ids == nullptr ? 0 : param.token_type_ids[padded_row]; + int input_id = param.input_ids[padded_row]; + float local_out = (input_id == 0 ? 0.0f : (float)param.word_embeddings[input_id * param.n + index]) + + (float)param.position_embeddings[position_id * param.n + index] + + (float)param.token_type_embeddings[token_type_id * param.n + index]; + + local_outs[i] = local_out; + local_sum += local_out; + local_sum_sq += local_out * local_out; + } + __syncthreads(); // TODO check where should we put sync + + float sums[2] = {0.0f}; + sums[0] = local_sum; + sums[1] = local_sum_sq; + blockReduceSumV2(sums); + + if (threadIdx.x == 0) { + s_mean = sums[0] / ((float)param.n); + s_variance = rsqrtf(sums[1] / ((float)param.n) - s_mean * s_mean + 1e-12f); + } + __syncthreads(); + + for (int i = 0; i < ELEMENT_PER_THREAD; i++) { + int index = blockDim.x * i + threadIdx.x; + float beta_val = (param.beta == nullptr) ? 0.0f : (float)(param.beta[index]); + param.normed_output[blockIdx.x * param.n + index] = + (T1)((((local_outs[i] - s_mean) * s_variance) * (float)(param.gamma[index]) + beta_val) * output_scalar); + } +} + +template +__global__ void removePaddingEmbLookupLayerNormFP8OutV2(RemovePaddingEmbLookupLayerNormFP8OutParam param) +{ + using T1_4 = __nv_fp8x4_e4m3; + using T2_2 = typename TypeConverter::Type; + + T2_2 local_outs[2]; + + __shared__ float s_mean; + __shared__ float s_variance; + + float local_sum = 0.0f; + float local_sum_sq = 0.0f; + + T2_2 output_scalar = cuda_cast(__ldg(param.output_scale)); + + T2_2* word_emb_ptr = (T2_2*)param.word_embeddings; + T2_2* pos_emb_ptr = (T2_2*)param.position_embeddings; + T2_2* type_emb_ptr = (T2_2*)param.token_type_embeddings; + T1_4* normed_output_ptr = (T1_4*)param.normed_output; + T2_2* gamma_ptr = (T2_2*)(param.gamma); + T2_2* beta_ptr = (T2_2*)(param.beta); + + int n_div_2 = param.n / 2; + int n_div_4 = param.n / 4; + + const int index_0 = 2 * threadIdx.x; + const int index_1 = index_0 + 1; + + int padded_row = blockIdx.x + (param.padding_offset == nullptr ? 0 : param.padding_offset[blockIdx.x]); + int position_id = param.position_ids == nullptr ? padded_row % param.max_seq_len : param.position_ids[padded_row]; + int token_type_id = param.token_type_ids == nullptr ? 0 : param.token_type_ids[padded_row]; + int input_id = param.input_ids[padded_row]; + + local_outs[0] = (input_id == 0 ? cuda_cast(0.0f) : word_emb_ptr[input_id * n_div_2 + index_0]) + + pos_emb_ptr[position_id * n_div_2 + index_0] + type_emb_ptr[token_type_id * n_div_2 + index_0]; + local_outs[1] = (input_id == 0 ? cuda_cast(0.0f) : word_emb_ptr[input_id * n_div_2 + index_1]) + + pos_emb_ptr[position_id * n_div_2 + index_1] + type_emb_ptr[token_type_id * n_div_2 + index_1]; + + local_sum += (float)(local_outs[0].x + local_outs[0].y + local_outs[1].x + local_outs[1].y); + local_sum_sq += (float)local_outs[0].x * (float)local_outs[0].x + (float)local_outs[0].y * (float)local_outs[0].y + + (float)local_outs[1].x * (float)local_outs[1].x + (float)local_outs[1].y * (float)local_outs[1].y; + __syncthreads(); // TODO check where should we put sync + + float sums[2] = {0.0f}; + sums[0] = local_sum; + sums[1] = local_sum_sq; + blockReduceSumV2(sums); + + if (threadIdx.x == 0) { + s_mean = sums[0] / ((float)param.n); + s_variance = rsqrtf(sums[1] / ((float)param.n) - s_mean * s_mean + 1e-12f); + } + __syncthreads(); + + T2_2 s_mean_2 = cuda_cast(s_mean); + T2_2 s_var_2 = cuda_cast(s_variance); + + // {[(x - mean) * var * gamma] + beta} * output_scale + local_outs[0] = + hmul2(hadd2(hmul2(hmul2(hsub2(local_outs[0], s_mean_2), s_var_2), gamma_ptr[index_0]), beta_ptr[index_0]), + output_scalar); + local_outs[1] = + hmul2(hadd2(hmul2(hmul2(hsub2(local_outs[1], s_mean_2), s_var_2), gamma_ptr[index_1]), beta_ptr[index_1]), + output_scalar); + + normed_output_ptr[blockIdx.x * n_div_4 + threadIdx.x] = T1_4(local_outs[0], local_outs[1]); +} + +template +void invokeRemovePaddingEmbLookupLayerNormFP8Out(RemovePaddingEmbLookupLayerNormFP8OutParam param) +{ + dim3 grid(param.m); + dim3 block(min(param.n, 1024)); + FT_CHECK(param.n <= 1024); + /* For general cases, n is equal to hidden_units, e.g., 512/1024. + Since we have warp shuffle inside the code, block.x % 32 should be 0. + */ + + if (param.n % 32 != 0) { + block.x = 1024; + } + + if (param.n <= 1024) { + if (block.x % 4 == 0) { + block.x /= 4; + removePaddingEmbLookupLayerNormFP8OutV2<<>>(param); + } + else { + removePaddingEmbLookupLayerNormFP8Out<<>>(param); + } + } +} + +template void invokeRemovePaddingEmbLookupLayerNormFP8Out<__nv_fp8_e4m3, float>( + RemovePaddingEmbLookupLayerNormFP8OutParam<__nv_fp8_e4m3, float> param); +template void invokeRemovePaddingEmbLookupLayerNormFP8Out<__nv_fp8_e4m3, __nv_bfloat16>( + RemovePaddingEmbLookupLayerNormFP8OutParam<__nv_fp8_e4m3, __nv_bfloat16> param); + +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/layernorm_fp8_kernels.h b/src/fastertransformer/kernels/layernorm_fp8_kernels.h new file mode 100644 index 000000000..4745b03c3 --- /dev/null +++ b/src/fastertransformer/kernels/layernorm_fp8_kernels.h @@ -0,0 +1,158 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/kernels/layernorm_kernels.h" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" +#include +#include +#include + +namespace fastertransformer { + +template +void invokeQuatizeVectorE4M3(__nv_fp8_e4m3* output, + float const* input_qua_amax_ptr, + T const* input, + uint32_t size, + uint32_t n, + cudaStream_t stream); + +template +void invokeDequatizeVectorE4M3( + T* output, float const* qua_amax_ptr, __nv_fp8_e4m3 const* input, uint32_t size, uint32_t n, cudaStream_t stream); + +template +struct FP8LayerNormParam { + T1* normed_output; + const T2* input; + const T2* gamma = nullptr; + const T2* beta = nullptr; + + // Can we use half here? + const float* input_deq_ptr; + const float* output_qua_ptr; + + int m; + int n; + cudaStream_t stream; + bool use_fp8x2; +}; + +template +void invokeFP8LayerNorm(FP8LayerNormParam param); + +template +struct GeneralFP8IOPostLayerNormParam { + T1* normed_output; + const T1* input; + const T2* gamma = nullptr; + const T2* beta = nullptr; + + // Can we use half here? + const float* input_deq_ptr; + const float* output_qua_ptr; + + int m; + int n; + cudaStream_t stream; + bool use_fp8x2; +}; + +template +void invokeGeneralFP8IOPostLayerNorm(GeneralFP8IOPostLayerNormParam param); + +// template +// void cudaCast(T1* tgt, T2 const* src, const uint64_t size); + +template +struct GeneralFP8AddBiasResidualPreLayerNormParam { + T1* normed_output; + T2* output; + const T2* residual; + const T2* bias = nullptr; + const T2* gamma = nullptr; + const T2* beta = nullptr; + + const float* input_deq_ptr; + const float* output_qua_ptr; + + int m; + int n; + cudaStream_t stream; + bool use_fp8x2; +}; + +template +void invokeGeneralFP8AddBiasResidualPreLayerNorm(GeneralFP8AddBiasResidualPreLayerNormParam param); + +template +struct GeneralFP8IOAddBiasResidualPostLayerNormParam { + T1* normed_output; + T1* input; + const T1* residual; + const T2* gamma = nullptr; + const T2* beta = nullptr; + const T2* bias = nullptr; + + // Can we use half here? + const float* input_scale; // for per tensor weight scale + const float* input_scale_2; // for per channel weight scale + const float* input_scale_2_min; + const float* output_scale; + const float* residual_scale; + + int m; + int n; + cudaStream_t stream; + bool use_fp8x2; +}; + +template +void invokeGeneralFP8IOAddBiasResidualPostLayerNorm(GeneralFP8IOAddBiasResidualPostLayerNormParam param); + +template +struct RemovePaddingEmbLookupLayerNormFP8OutParam { + T1* normed_output; + int const* const input_ids; + int const* const position_ids; + int const* const token_type_ids; + int const* const padding_offset; + T2 const* const word_embeddings; + T2 const* const position_embeddings; + T2 const* const token_type_embeddings; + + T2 const* const gamma = nullptr; + T2 const* const beta = nullptr; + + // Can we use half here? + const float* output_scale; + int const* const lengths; + + int const m; + int const n; + int const batch_size; + int const max_seq_len; + int const pad_token_id; + cudaStream_t stream; + bool use_fp8x2; +}; + +template +void invokeRemovePaddingEmbLookupLayerNormFP8Out(RemovePaddingEmbLookupLayerNormFP8OutParam param); + +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/layernorm_fp8_kernels_test.cc b/src/fastertransformer/kernels/layernorm_fp8_kernels_test.cc new file mode 100644 index 000000000..2828b5aae --- /dev/null +++ b/src/fastertransformer/kernels/layernorm_fp8_kernels_test.cc @@ -0,0 +1,491 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/kernels/layernorm_fp8_kernels.h" +#include "src/fastertransformer/kernels/layernorm_kernels.h" +#include "src/fastertransformer/utils/gpu_buf.h" +#include "src/fastertransformer/utils/memory_utils.h" +#include "src/fastertransformer/utils/test_utils.h" +#include +#include +#include +#include + +using namespace fastertransformer; + +template +int checkNonZero(T* A, int size) +{ + T* h_A = (T*)malloc(sizeof(T) * size); + cudaMemcpy(h_A, A, sizeof(T) * size, cudaMemcpyDeviceToHost); + int noneZeroNum = 0; + for (int ii = 0; ii < size; ii++) { + if (fabs(float(h_A[ii]) - 0.0f) > 0.0001f) { + noneZeroNum += 1; + } + } + free(h_A); + return noneZeroNum; +} + +template +void checkMat(TA* A, TB* B, int size, char* mark) +{ + float max_diff = -10000.0f; + float max_diff_a, max_diff_b; + TA* matA = (TA*)malloc(sizeof(TA) * size); + TB* matB = (TB*)malloc(sizeof(TB) * size); + int not_passed = 0; + cudaMemcpy(matA, A, sizeof(TA) * size, cudaMemcpyDeviceToHost); + cudaMemcpy(matB, B, sizeof(TB) * size, cudaMemcpyDeviceToHost); + float A_nonZero_ratio = float(checkNonZero(A, size)) / float(size); + float B_nonZero_ratio = float(checkNonZero(B, size)) / float(size); + if (A_nonZero_ratio < 0.1 || B_nonZero_ratio < 0.1) { + printf("[%s] nonZero ratio [%f] [%f]\n", mark, A_nonZero_ratio, B_nonZero_ratio); + } + printf("[INFO] A B diff rel_diff\n"); + for (int jjj = 0; jjj < size; jjj++) { + float diff = fabs(float(matA[jjj]) - float(matB[jjj])); + if (diff > max_diff) { + max_diff = diff; + max_diff_a = float(matA[jjj]); + max_diff_b = float(matB[jjj]); + } + if (fabs(float(matA[jjj]) - float(matB[jjj])) > 0.001) { + not_passed += 1; + if (not_passed < 1000) + printf("%d %f %f %f (%f\%)\n", + jjj, + float(matA[jjj]), + float(matB[jjj]), + float(matA[jjj]) - float(matB[jjj]), + (float(matA[jjj]) - float(matB[jjj])) / (float(matA[jjj] + 1e-6f))); + } + } + printf("[%s] max diff : %f ; a : %f ; b : %f\n", mark, max_diff, max_diff_a, max_diff_b); + if (not_passed != 0) + printf("[%s] different elements : %d \n", mark, not_passed); + else + printf("[%s] check pass!\n", mark); + free(matA); + free(matB); +} + +template +void layernorm_fp8_test(const int m, const int n); + +bool test_fp8_general_add_bias_residual_pre_layernorm(int m, int n) +{ + const size_t n_elems = m * n; + bool error = false; + + cudaStream_t stream; + cudaStreamCreate(&stream); + + GPUBuf<__nv_fp8_e4m3> d_fp8_in(n_elems, true); + GPUBuf<__nv_fp8_e4m3> d_fp8_residual(n_elems, true); + GPUBuf<__nv_fp8_e4m3> d_fp8_bias(n, true); + GPUBuf<__nv_fp8_e4m3> d_fp8_gamma(n, true); + GPUBuf<__nv_fp8_e4m3> d_fp8_beta(n, true); + GPUBuf<__nv_fp8_e4m3> d_fp8_out(n_elems, false); + + /* Reference implementation in FP32 */ + GPUBuf d_fp32_in(d_fp8_in); + GPUBuf d_fp32_residual(d_fp8_residual); + GPUBuf d_fp32_bias(d_fp8_bias); + GPUBuf d_fp32_gamma(d_fp8_gamma); + GPUBuf d_fp32_beta(d_fp8_beta); + GPUBuf d_fp32_out(n_elems, false); + + invokeGeneralAddBiasResidualPreLayerNorm(d_fp32_out.ptr, + d_fp32_out.ptr, + d_fp32_in.ptr, + d_fp32_residual.ptr, + d_fp32_gamma.ptr, + d_fp32_beta.ptr, + d_fp32_bias.ptr, + 1e-6f, + m, + n, + (float*)nullptr, + (float*)nullptr, + (float*)nullptr, + (float*)nullptr, + 0, + stream, + 0); + cudaDeviceSynchronize(); + check_cuda_error(cudaGetLastError()); + + auto residual_ref = d_fp32_residual.to_host_vec(); + auto out_ref = d_fp32_out.to_host_vec(); + sync_check_cuda_error(); + + /* Test implementation in FP32 */ + GPUBuf d_fp32_residual_fp32_fp32(d_fp8_residual); + float quant = 0.0f, dequant = 0.0f; + GeneralFP8AddBiasResidualPreLayerNormParam kernel_args_fp32_fp32{d_fp32_out.ptr, + d_fp32_in.ptr, + d_fp32_residual_fp32_fp32.ptr, + d_fp32_bias.ptr, + d_fp32_gamma.ptr, + d_fp32_beta.ptr, + nullptr, // &quant, + nullptr, // &dequant, + m, + n, + 0, + false}; + invokeGeneralFP8AddBiasResidualPreLayerNorm(kernel_args_fp32_fp32); + cudaDeviceSynchronize(); + check_cuda_error(cudaGetLastError()); + + auto residual_test_fp32_fp32 = d_fp32_residual_fp32_fp32.to_host_vec(); + auto out_test_fp32_fp32 = d_fp32_out.to_host_vec(); + + /* Test implementation in FP32/FP8 */ + GPUBuf d_fp32_residual_fp32_fp8(d_fp8_residual); + GeneralFP8AddBiasResidualPreLayerNormParam<__nv_fp8_e4m3, float> kernel_args_fp32_fp8{d_fp8_out.ptr, + d_fp32_in.ptr, + d_fp32_residual_fp32_fp8.ptr, + d_fp32_bias.ptr, + d_fp32_gamma.ptr, + d_fp32_beta.ptr, + nullptr, // &quant, + nullptr, // &dequant, + m, + n, + 0, + false}; + invokeGeneralFP8AddBiasResidualPreLayerNorm(kernel_args_fp32_fp8); + cudaDeviceSynchronize(); + check_cuda_error(cudaGetLastError()); + + auto residual_test_fp32_fp8 = d_fp32_residual_fp32_fp8.to_host_vec(); + auto out_test_fp32_fp8 = (GPUBuf(d_fp8_out)).to_host_vec(); + + /* Test implementation in FP16/FP16 */ + GPUBuf d_fp16_residual_fp16_fp16(d_fp8_residual); + GPUBuf d_fp16_out(d_fp8_out); + GeneralFP8AddBiasResidualPreLayerNormParam kernel_args_fp16_fp16{d_fp16_out.ptr, + (GPUBuf(d_fp8_in)).ptr, + d_fp16_residual_fp16_fp16.ptr, + (GPUBuf(d_fp8_bias)).ptr, + (GPUBuf(d_fp8_gamma)).ptr, + (GPUBuf(d_fp8_beta)).ptr, + nullptr, // &quant, + nullptr, // &dequant, + m, + n, + 0, + false}; + invokeGeneralFP8AddBiasResidualPreLayerNorm(kernel_args_fp16_fp16); + cudaDeviceSynchronize(); + check_cuda_error(cudaGetLastError()); + + auto residual_test_fp16_fp16 = d_fp16_residual_fp16_fp16.to_host_vec(); + auto out_test_fp16_fp16 = (GPUBuf(d_fp16_out)).to_host_vec(); + + /* Comparisons */ + sync_check_cuda_error(); + + /* FP32_FP32 */ + std::transform( + out_ref.begin(), out_ref.end(), out_test_fp32_fp32.begin(), out_test_fp32_fp32.begin(), abs_diff()); + std::transform(residual_ref.begin(), + residual_ref.end(), + residual_test_fp32_fp32.begin(), + residual_test_fp32_fp32.begin(), + abs_diff()); + + const float error_out_fp32_fp32 = *std::max_element(out_test_fp32_fp32.begin(), out_test_fp32_fp32.end()); + const float error_res_fp32_fp32 = *std::max_element(residual_test_fp32_fp32.begin(), residual_test_fp32_fp32.end()); + + /* FP32_FP8 */ + std::transform( + out_ref.begin(), out_ref.end(), out_test_fp16_fp16.begin(), out_test_fp16_fp16.begin(), abs_diff()); + std::transform(residual_ref.begin(), + residual_ref.end(), + residual_test_fp16_fp16.begin(), + residual_test_fp16_fp16.begin(), + abs_diff()); + + const float error_out_fp16_fp16 = *std::max_element(out_test_fp16_fp16.begin(), out_test_fp16_fp16.end()); + const float error_res_fp16_fp16 = *std::max_element(residual_test_fp16_fp16.begin(), residual_test_fp16_fp16.end()); + + /* FP32_FP8 */ + std::transform( + out_ref.begin(), out_ref.end(), out_test_fp32_fp8.begin(), out_test_fp32_fp8.begin(), abs_diff()); + std::transform(residual_ref.begin(), + residual_ref.end(), + residual_test_fp32_fp8.begin(), + residual_test_fp32_fp8.begin(), + abs_diff()); + + const float error_out_fp32_fp8 = *std::max_element(out_test_fp32_fp8.begin(), out_test_fp32_fp8.end()); + const float error_res_fp32_fp8 = *std::max_element(residual_test_fp32_fp8.begin(), residual_test_fp32_fp8.end()); + + printf("[FP32/FP32] max error out %f\n", error_out_fp32_fp32); + printf("[FP32/FP32] max error res %f\n", error_res_fp32_fp32); + + printf("[FP16/FP16] max error out %f\n", error_out_fp16_fp16); + printf("[FP16/FP16] max error res %f\n", error_res_fp16_fp16); + + printf("[FP32/FP8] max error out %f\n", error_out_fp32_fp8); + printf("[FP32/FP8] max error res %f\n", error_res_fp32_fp8); + + /* Profiling */ + printf("[FP32/FP32] "); + TIMEIT(true, + 10, + stream, + invokeGeneralAddBiasResidualPreLayerNorm, + d_fp32_out.ptr, + d_fp32_out.ptr, + d_fp32_in.ptr, + d_fp32_residual.ptr, + d_fp32_gamma.ptr, + d_fp32_beta.ptr, + d_fp32_bias.ptr, + 1e-6f, + m, + n, + (float*)nullptr, + (float*)nullptr, + (float*)nullptr, + (float*)nullptr, + 0, + stream, + 0); + + kernel_args_fp32_fp32.stream = stream; + printf("[FP32/FP32] "); + TIMEIT(true, 10, stream, invokeGeneralFP8AddBiasResidualPreLayerNorm, kernel_args_fp32_fp32); + cudaDeviceSynchronize(); + check_cuda_error(cudaGetLastError()); + + kernel_args_fp32_fp8.stream = stream; + printf("[FP32/FP8] "); + TIMEIT(true, 10, stream, invokeGeneralFP8AddBiasResidualPreLayerNorm, kernel_args_fp32_fp8); + cudaDeviceSynchronize(); + check_cuda_error(cudaGetLastError()); + + kernel_args_fp16_fp16.stream = stream; + printf("[FP16/FP16] "); + TIMEIT(true, 10, stream, invokeGeneralFP8AddBiasResidualPreLayerNorm, kernel_args_fp16_fp16); + cudaDeviceSynchronize(); + check_cuda_error(cudaGetLastError()); + + return !error; +} + +int main(int argc, char** argv) +{ + if (argc != 5) { + printf("[ERROR] layernorm_fp8_test max_m max_n is_fp16 quantize_mode\n"); + printf("e.g., ./bin/layernorm_fp8_test 1 1024 1 0\n"); + return 0; + } + + int max_m = atoi(argv[1]); + int max_n = atoi(argv[2]); + int is_fp16 = atoi(argv[3]); + const int quantize_mode = atoi(argv[4]); + + if (is_fp16) { + if (quantize_mode == 0) { + layernorm_fp8_test(max_m, max_n); + } + else if (quantize_mode == 1) { + layernorm_fp8_test(max_m, max_n); + } + } + else { + if (quantize_mode == 0) { + layernorm_fp8_test(max_m, max_n); + } + else if (quantize_mode == 1) { + layernorm_fp8_test(max_m, max_n); + } + } + + bool global_test_pass = true; + bool test_pass = true; + + test_pass = test_fp8_general_add_bias_residual_pre_layernorm(max_m, max_n); + printf("%s", test_pass ? "." : "X"); + global_test_pass |= test_pass; + + puts(""); + return global_test_pass ? EXIT_SUCCESS : EXIT_FAILURE; + + // Use to compare the performance + // for (int m = 1; m <= max_m; m *= 2) { + // for (int n = 128; n <= max_n; n *= 2) { + // if (is_fp16) { + // layernorm_fp8_test(m, n); + // } + // else { + // layernorm_fp8_test(m, n); + // } + // } + // } + // return 0; +} + +template +void layernorm_fp8_test(const int m, const int n) +{ + struct cudaDeviceProp prop; + check_cuda_error(cudaGetDeviceProperties(&prop, 0)); + printf("Device %s\n", prop.name); + + // baseline buffer + T* input_baseline; + T* output_baseline; + T* gamma; + T* beta; + deviceMalloc(&input_baseline, m * n); + deviceMalloc(&output_baseline, m * n); + deviceMalloc(&gamma, n); + deviceMalloc(&beta, n); + + // fp8 buffer + // __nv_fp8_e4m3* fp8_input; + __nv_bfloat16* bf16_input; + __nv_fp8_e4m3* fp8_output; + float* fp8_input_deq_ptr; + float* fp8_output_qua_ptr; + T* fp8_fp32_output; + // cudaMalloc(&fp8_input, sizeof(__nv_fp8_e4m3) * m * n); + cudaMalloc(&bf16_input, sizeof(__nv_bfloat16) * m * n); + cudaMalloc(&fp8_output, sizeof(__nv_fp8_e4m3) * m * n); + deviceMalloc(&fp8_input_deq_ptr, n); + deviceMalloc(&fp8_output_qua_ptr, n); + deviceMalloc(&fp8_fp32_output, m * n); + + cudaStream_t stream; + cudaStreamCreate(&stream); + const int ite = 5000; + + invokeGeneralLayerNorm(output_baseline, input_baseline, gamma, beta, 1e-6, m, n, (float*)nullptr, 0, stream); + cudaDeviceSynchronize(); + check_cuda_error(cudaGetLastError()); + + T* h_input_baseline = new T[m * n]; + T* h_output_baseline = new T[m * n]; + cudaD2Hcpy(h_input_baseline, input_baseline, m * n); + cudaD2Hcpy(h_output_baseline, output_baseline, m * n); + + __nv_bfloat16* h_bf16_input = new __nv_bfloat16[m * n]; + for (int i = 0; i < m * n; i++) { + h_bf16_input[i] = (__nv_bfloat16)(h_input_baseline[i]); + } + cudaH2Dcpy(bf16_input, h_bf16_input, m * n); + delete[] h_bf16_input; + + // 0: per channel quantization + // 1: per tensor quantization + +#define USING_FP8 + +#ifdef USING_FP8 + if (quantize_mode == 0) { + float* h_input_amax = new float[n]; + float* h_output_amax = new float[n]; + for (int i = 0; i < m; i++) { + for (int j = 0; j < n; j++) { + if (i == 0) { + h_input_amax[j] = h_input_baseline[i * n + j]; + h_output_amax[j] = h_output_baseline[i * n + j]; + } + else { + h_input_amax[j] = std::max(h_input_amax[j], (float)h_input_baseline[i * n + j]); + h_output_amax[j] = std::max(h_output_amax[j], (float)h_output_baseline[i * n + j]); + } + } + } + cudaH2Dcpy(fp8_input_deq_ptr, h_input_amax, n); + cudaH2Dcpy(fp8_output_qua_ptr, h_output_amax, n); + delete h_input_amax; + delete h_output_amax; + } + else { + float h_input_amax = *std::max_element(h_input_baseline, h_input_baseline + m * n); + float h_output_amax = *std::max_element(h_output_baseline, h_output_baseline + m * n); + printf("[INFO] h_input_amax: %f \n", h_input_amax); + printf("[INFO] h_output_amax: %f \n", h_output_amax); + cudaH2Dcpy(fp8_input_deq_ptr, &h_input_amax, 1); + cudaH2Dcpy(fp8_output_qua_ptr, &h_output_amax, 1); + } + + // invokeQuatizeVectorE4M3(fp8_input, fp8_input_deq_ptr, input_baseline, m * n, n, stream); + // FP8LayerNormParam<__nv_fp8_e4m3, __nv_bfloat16> param{ + // fp8_output, bf16_input, gamma, beta, fp8_input_deq_ptr, fp8_output_qua_ptr, m, n, stream, true}; + // invokeFP8LayerNorm<__nv_fp8_e4m3, __nv_bfloat16, quantize_mode>(param); + // invokeDequatizeVectorE4M3(fp8_fp32_output, fp8_output_qua_ptr, fp8_output, m * n, n, stream); +#else + float h_input_amax = 1.0f; + float h_output_amax = 1.0f; + cudaH2Dcpy(fp8_input_deq_ptr, &h_input_amax, 1); + cudaH2Dcpy(fp8_output_qua_ptr, &h_output_amax, 1); + FP8LayerNormParam param{ + fp8_fp32_output, input_baseline, gamma, beta, fp8_input_deq_ptr, fp8_output_qua_ptr, m, n, stream, false}; + invokeFP8LayerNorm(param); + cudaDeviceSynchronize(); + check_cuda_error(cudaGetLastError()); +#endif + + cudaDeviceSynchronize(); + checkMat(fp8_fp32_output, output_baseline, m * n, "fp8_fp32_output v.s. output_baseline"); + + // // warmup + for (int i = 0; i < 1000; i++) { + invokeGeneralLayerNorm(output_baseline, input_baseline, gamma, beta, 1e-6, m, n, (float*)nullptr, 0, stream); + } + cudaDeviceSynchronize(); + check_cuda_error(cudaGetLastError()); + + struct timeval start, end; + cudaDeviceSynchronize(); + gettimeofday(&start, NULL); + for (int i = 0; i < ite; i++) { + invokeGeneralLayerNorm(output_baseline, input_baseline, gamma, beta, 1e-6, m, n, (float*)nullptr, 0, stream); + } + cudaDeviceSynchronize(); + check_cuda_error(cudaGetLastError()); + gettimeofday(&end, NULL); + float baseline_time = ((end.tv_sec - start.tv_sec) * 1000000. + (end.tv_usec - start.tv_usec) * 1.) / ite; + + struct timeval start_2, end_2; + cudaDeviceSynchronize(); + gettimeofday(&start_2, NULL); + for (int i = 0; i < ite; i++) { +#ifdef USING_FP8 + // invokeFP8LayerNorm<__nv_fp8_e4m3, T, quantize_mode>(param); +#else + // invokeFP8LayerNorm(param); +#endif + } + cudaDeviceSynchronize(); + gettimeofday(&end_2, NULL); + float fp8_time = ((end_2.tv_sec - start_2.tv_sec) * 1000000. + (end_2.tv_usec - start_2.tv_usec) * 1.) / ite; + + printf("[INFO] baseline time: %f us\n", baseline_time); + printf("[INFO] fp8 time: %f us\n", fp8_time); + printf("[INFO] m %d, n %d, speedup: %f \n", m, n, baseline_time / fp8_time); + return; +} diff --git a/src/fastertransformer/kernels/layernorm_int8_kernels.cu b/src/fastertransformer/kernels/layernorm_int8_kernels.cu index 205c52c4f..36b511e75 100644 --- a/src/fastertransformer/kernels/layernorm_int8_kernels.cu +++ b/src/fastertransformer/kernels/layernorm_int8_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/layernorm_int8_kernels.h b/src/fastertransformer/kernels/layernorm_int8_kernels.h index 55bfd697c..1c9195d68 100644 --- a/src/fastertransformer/kernels/layernorm_int8_kernels.h +++ b/src/fastertransformer/kernels/layernorm_int8_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/layernorm_kernels.cu b/src/fastertransformer/kernels/layernorm_kernels.cu index e2e354e14..f832d9104 100644 --- a/src/fastertransformer/kernels/layernorm_kernels.cu +++ b/src/fastertransformer/kernels/layernorm_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -36,8 +36,12 @@ __global__ void generalAddBiasResidualLayerNormOpt(T* normed_output, const float* scale_inter, const float* scale_out, const float* scale, + float* dynamic_scale, const int int8_mode) { + extern __shared__ __align__(sizeof(float)) char _shmem[]; // Align on largest type + T* shmem = reinterpret_cast(_shmem); + __shared__ float s_mean; __shared__ float s_variance; float mean = 0.0f; @@ -46,8 +50,10 @@ __global__ void generalAddBiasResidualLayerNormOpt(T* normed_output, using Int8_Packed_T = typename packed_as::value>::type; using Int32_Packed_T = typename packed_as::value>::type; using Float_Packed_T = typename packed_as::value>::type; + using Scalar_T = typename packed_as::type; - const bool scale_input = int8_mode == 2 && scale_inter != nullptr; + const bool scale_input = int8_mode == 2 && scale_inter != nullptr; + const bool dynamic_scaling = dynamic_scale != nullptr; T local_sum = cuda_cast(0.0f); @@ -80,6 +86,7 @@ __global__ void generalAddBiasResidualLayerNormOpt(T* normed_output, } val = hadd2(val, input[index]); } + shmem[i] = val; output[index] = val; local_sum = hadd2(local_sum, val); } @@ -109,14 +116,21 @@ __global__ void generalAddBiasResidualLayerNormOpt(T* normed_output, T mean_2 = cuda_cast(s_mean); T var_2 = cuda_cast(s_variance); + Scalar_T abs_max = 1e-6f; + #pragma unroll UNROLL_FACTOR for (int i = threadIdx.x; i < n; i += blockDim.x) { const int index = blockIdx.x * n + i; - T val = hmul2(hsub2(output[index], mean_2), var_2, ldg(&gamma[i])); + T val = hmul2(hsub2(shmem[i], mean_2), var_2, ldg(&gamma[i])); if (IS_BETA) { val = hadd2(val, ldg(&beta[i])); } - if (int8_mode == 2) { + + if (dynamic_scaling) { + abs_max = cuda_max(cuda_max(cuda_abs(val)), abs_max); + shmem[i] = val; + } + else if (int8_mode == 2) { reinterpret_cast(normed_output)[index] = cuda_cast(cuda_cast(val) * scale_to_int); } @@ -124,6 +138,19 @@ __global__ void generalAddBiasResidualLayerNormOpt(T* normed_output, normed_output[index] = val; } } + + if (dynamic_scaling) { + float abs_max_f = blockAllReduceMax(cuda_cast(abs_max)); + const float dynamic_per_token_scale = 127. / abs_max_f; + for (int i = threadIdx.x; i < n; i += blockDim.x) { + const int index = blockIdx.x * n + i; + reinterpret_cast(normed_output)[index] = cuda_cast( + cuda_cast(shmem[i]) * cuda_cast(dynamic_per_token_scale)); + } + if (threadIdx.x == 0) { + dynamic_scale[blockIdx.x] = (*scale * abs_max_f) / 127.f; + } + } } // * Note that typename T is half2 or bfloat2 type @@ -142,8 +169,12 @@ __global__ void generalAddBiasResidualLayerNormOpt2(T* normed_output, const float* scale_inter, const float* scale_out, const float* scale, + float* dynamic_scale, const int int8_mode) { + extern __shared__ __align__(sizeof(float)) char _shmem[]; + T* shmem = reinterpret_cast(_shmem); + __shared__ float s_mean; __shared__ float s_variance; float x_sum = 0.0f; @@ -154,10 +185,12 @@ __global__ void generalAddBiasResidualLayerNormOpt2(T* normed_output, using Int8_Packed_T = typename packed_as::value>::type; using Int32_Packed_T = typename packed_as::value>::type; using Float_Packed_T = typename packed_as::value>::type; + using Scalar_T = typename packed_as::type; const bool scale_input = int8_mode == 2 && scale_inter != nullptr; const Float_Packed_T scale_vec_in = cuda_cast(scale_input ? (*scale_inter) * (*scale_out) : 0.0f); const Float_Packed_T scale_vec = cuda_cast(int8_mode == 2 ? *scale : 0.0f); + const bool dynamic_scaling = dynamic_scale != nullptr; #pragma unroll UNROLL_FACTOR for (int i = threadIdx.x; i < n; i += blockDim.x) { @@ -196,6 +229,7 @@ __global__ void generalAddBiasResidualLayerNormOpt2(T* normed_output, } tmp.x = cuda_cast(val_1); tmp.y = cuda_cast(val_2); + shmem[i] = tmp; output[index] = tmp; x_sum += val_1 + val_2; x2_sum += val_1 * val_1 + val_2 * val_2; @@ -214,14 +248,21 @@ __global__ void generalAddBiasResidualLayerNormOpt2(T* normed_output, T mean_2 = cuda_cast(s_mean); T var_2 = cuda_cast(s_variance); + Scalar_T abs_max = 1e-6f; + #pragma unroll UNROLL_FACTOR for (int i = threadIdx.x; i < n; i += blockDim.x) { - const int index = b_offset + i; - T val = hmul2(hsub2(output[index], mean_2), var_2, ldg(&gamma[i])); + const int index = blockIdx.x * n + i; + T val = hmul2(hsub2(shmem[i], mean_2), var_2, ldg(&gamma[i])); if (IS_BETA) { val = hadd2(val, ldg(&beta[i])); } - if (int8_mode == 2) { + + if (dynamic_scaling) { + abs_max = cuda_max(cuda_max(cuda_abs(val)), abs_max); + shmem[i] = val; + } + else if (int8_mode == 2) { reinterpret_cast(normed_output)[index] = cuda_cast(cuda_cast(val) * scale_vec); } @@ -229,6 +270,19 @@ __global__ void generalAddBiasResidualLayerNormOpt2(T* normed_output, normed_output[index] = val; } } + + if (dynamic_scaling) { + float abs_max_f = blockAllReduceMax(cuda_cast(abs_max)); + const float dynamic_per_token_scale = 127. / abs_max_f; + for (int i = threadIdx.x; i < n; i += blockDim.x) { + const int index = blockIdx.x * n + i; + reinterpret_cast(normed_output)[index] = cuda_cast( + cuda_cast(shmem[i]) * cuda_cast(dynamic_per_token_scale)); + } + if (threadIdx.x == 0) { + dynamic_scale[blockIdx.x] = (*scale * abs_max_f) / 127.f; + } + } } // TODO(bhsueh) add half2 implementation @@ -688,16 +742,29 @@ __global__ void generalAddBiasResidualLayerNorm(const T* __restrict input, const float* scale_inter, const float* scale_out, const float* scale, + float* dynamic_scale, const int int8_mode) { int tid = threadIdx.x; + // NOTE: float shmem may exceed the shared memory limit + extern __shared__ __align__(sizeof(float)) char _shmem[]; + T* shmem = reinterpret_cast(_shmem); + + using Int8_Packed_T = typename packed_as::value>::type; + using Int32_Packed_T = typename packed_as::value>::type; + using Float_Packed_T = typename packed_as::value>::type; + using Scalar_T = typename packed_as::type; + + const bool dynamic_scaling = dynamic_scale != nullptr; + __shared__ float s_mean; __shared__ float s_variance; float mean = 0.0f; float variance = 0.0f; - const float scale_out_val = int8_mode == 2 ? (*scale_inter) * (*scale_out) : 0.0f; + const bool is_input_i32 = int8_mode == 2 && scale_inter != nullptr && scale_out != nullptr; + const float scale_out_val = is_input_i32 ? (*scale_inter) * (*scale_out) : 0.0f; float local_sum = 0.0f; for (int i = tid; i < n; i += blockDim.x) { float local_out = 0.0f; @@ -707,7 +774,7 @@ __global__ void generalAddBiasResidualLayerNorm(const T* __restrict input, else if (RESIDUAL_NUM == 2) { local_out = (float)(ldg(&residual1[blockIdx.x * n + i])) + float(ldg(&residual2[blockIdx.x * n + i])); } - if (int8_mode == 2) { + if (is_input_i32) { local_out += cuda_cast(reinterpret_cast(input)[blockIdx.x * n + i]) * scale_out_val; } else { @@ -717,6 +784,7 @@ __global__ void generalAddBiasResidualLayerNorm(const T* __restrict input, if (bias != nullptr) { local_out += (float)(ldg(&bias[i])); } + shmem[i] = (T)local_out; output[blockIdx.x * n + i] = (T)local_out; local_sum += local_out; } @@ -740,73 +808,460 @@ __global__ void generalAddBiasResidualLayerNorm(const T* __restrict input, } __syncthreads(); + Scalar_T abs_max = 1e-6f; + const float scale_val = int8_mode == 2 ? *scale : 0.0f; for (int i = tid; i < n; i += blockDim.x) { float beta_val = (beta == nullptr) ? 0.0f : (float)(ldg(&beta[i])); - const float res = - ((((float)output[blockIdx.x * n + i] - s_mean) * s_variance) * (float)(ldg(&gamma[i])) + beta_val); - if (int8_mode == 2) { - reinterpret_cast(norm_output)[blockIdx.x * n + i] = cuda_cast(res * scale_val); + const float val = ((((float)shmem[i] - s_mean) * s_variance) * (float)(ldg(&gamma[i])) + beta_val); + + if (dynamic_scaling) { + abs_max = cuda_max(cuda_max(cuda_abs(val)), abs_max); + shmem[i] = (T)val; + } + else if (int8_mode == 2) { + reinterpret_cast(norm_output)[blockIdx.x * n + i] = cuda_cast(val * scale_val); } else { - norm_output[blockIdx.x * n + i] = (T)res; + norm_output[blockIdx.x * n + i] = (T)val; + } + } + + if (dynamic_scaling) { + float abs_max_f = blockAllReduceMax(cuda_cast(abs_max)); + const float dynamic_per_token_scale = 127. / abs_max_f; + for (int i = tid; i < n; i += blockDim.x) { + const int index = blockIdx.x * n + i; + reinterpret_cast(norm_output)[index] = cuda_cast( + cuda_cast(shmem[i]) * cuda_cast(dynamic_per_token_scale)); + } + if (threadIdx.x == 0) { + dynamic_scale[blockIdx.x] = (*scale * abs_max_f) / 127.f; } } } -#define HALF_LAYERNORM_OPT(UNROLL_FACTOR, RESIDUAL_NUM) \ - generalAddBiasResidualLayerNormOpt \ - <<>>((T2*)norm_output, \ - (T2*)output, \ - (const T2*)input, \ - (const T2*)bias, \ - (const T2*)residual1, \ - (const T2*)residual2, \ - (const T2*)gamma, \ - (const T2*)beta, \ - layernorm_eps, \ - m, \ - half_n, \ - scale_inter, \ - scale_out, \ - scale, \ - int8_mode) - -#define HALF_LAYERNORM_OPT2(UNROLL_FACTOR, RESIDUAL_NUM) \ - generalAddBiasResidualLayerNormOpt2 \ - <<>>((T2*)norm_output, \ - (T2*)output, \ - (const T2*)input, \ - (const T2*)bias, \ - (const T2*)residual1, \ - (const T2*)residual2, \ - (const T2*)gamma, \ - (const T2*)beta, \ - layernorm_eps, \ - m, \ - half_n, \ - scale_inter, \ - scale_out, \ - scale, \ - int8_mode) - -#define HALF_LAYERNORM_OPT_RESIDUAL(UNROLL_FACTOR, OPT_TYPE) \ - if (residual_num == 1) { \ - if (OPT_TYPE == 1) { \ - HALF_LAYERNORM_OPT(UNROLL_FACTOR, 1); \ - } \ - else if (OPT_TYPE == 2) { \ - HALF_LAYERNORM_OPT2(UNROLL_FACTOR, 1); \ - } \ - } \ - else if (residual_num == 2) { \ - if (OPT_TYPE == 1) { \ - HALF_LAYERNORM_OPT(UNROLL_FACTOR, 2); \ - } \ - else if (OPT_TYPE == 2) { \ - HALF_LAYERNORM_OPT2(UNROLL_FACTOR, 2); \ - } \ +template +void dispatch_generalAddBiasResidualLayerNormOpt_opt_version(T* norm_output, + T* output, + const T* input, + const T* bias, + const T* residual1, + const T* residual2, + const T* gamma, + const T* beta, + float layernorm_eps, + int m, + int half_n, + const float* scale_inter, + const float* scale_out, + const float* scale, + float* dynamic_scale, + int int8_mode, + dim3 grid, + dim3 block, + cudaStream_t stream, + int opt_version) +{ + size_t maxbytes = half_n * sizeof(T); + if (opt_version == 1) { + if (maxbytes >= (48 << 10)) { + check_cuda_error(cudaFuncSetAttribute( + generalAddBiasResidualLayerNormOpt, + cudaFuncAttributeMaxDynamicSharedMemorySize, + maxbytes)); + } + generalAddBiasResidualLayerNormOpt + <<>>(norm_output, + output, + input, + bias, + residual1, + residual2, + gamma, + beta, + layernorm_eps, + m, + half_n, + scale_inter, + scale_out, + scale, + dynamic_scale, + int8_mode); + } + else if (opt_version == 2) { + if (maxbytes >= (48 << 10)) { + check_cuda_error(cudaFuncSetAttribute( + generalAddBiasResidualLayerNormOpt2, + cudaFuncAttributeMaxDynamicSharedMemorySize, + maxbytes)); + } + generalAddBiasResidualLayerNormOpt2 + <<>>(norm_output, + output, + input, + bias, + residual1, + residual2, + gamma, + beta, + layernorm_eps, + m, + half_n, + scale_inter, + scale_out, + scale, + dynamic_scale, + int8_mode); + } + else { + FT_CHECK_WITH_INFO(false, "opt_num must be 1 or 2"); + } +} + +template +void dispatch_generalAddBiasResidualLayerNormOpt_is_output(T* norm_output, + T* output, + const T* input, + const T* bias, + const T* residual1, + const T* residual2, + const T* gamma, + const T* beta, + float layernorm_eps, + int m, + int half_n, + const float* scale_inter, + const float* scale_out, + const float* scale, + float* dynamic_scale, + int int8_mode, + dim3 grid, + dim3 block, + cudaStream_t stream, + int opt_version, + bool is_output) +{ + if (is_output) { + dispatch_generalAddBiasResidualLayerNormOpt_opt_version( + norm_output, + output, + input, + bias, + residual1, + residual2, + gamma, + beta, + layernorm_eps, + m, + half_n, + scale_inter, + scale_out, + scale, + dynamic_scale, + int8_mode, + grid, + block, + stream, + opt_version); + } + else { + dispatch_generalAddBiasResidualLayerNormOpt_opt_version( + norm_output, + output, + input, + bias, + residual1, + residual2, + gamma, + beta, + layernorm_eps, + m, + half_n, + scale_inter, + scale_out, + scale, + dynamic_scale, + int8_mode, + grid, + block, + stream, + opt_version); } +} + +template +void dispatch_generalAddBiasResidualLayerNormOpt_bias(T* norm_output, + T* output, + const T* input, + const T* bias, + const T* residual1, + const T* residual2, + const T* gamma, + const T* beta, + float layernorm_eps, + int m, + int half_n, + const float* scale_inter, + const float* scale_out, + const float* scale, + float* dynamic_scale, + int int8_mode, + dim3 grid, + dim3 block, + cudaStream_t stream, + int opt_version, + bool is_output) +{ + if (bias != nullptr) { + dispatch_generalAddBiasResidualLayerNormOpt_is_output(norm_output, + output, + input, + bias, + residual1, + residual2, + gamma, + beta, + layernorm_eps, + m, + half_n, + scale_inter, + scale_out, + scale, + dynamic_scale, + int8_mode, + grid, + block, + stream, + opt_version, + is_output); + } + else { + dispatch_generalAddBiasResidualLayerNormOpt_is_output(norm_output, + output, + input, + bias, + residual1, + residual2, + gamma, + beta, + layernorm_eps, + m, + half_n, + scale_inter, + scale_out, + scale, + dynamic_scale, + int8_mode, + grid, + block, + stream, + opt_version, + is_output); + } +} + +template +void dispatch_generalAddBiasResidualLayerNormOpt_residual_num(T* norm_output, + T* output, + const T* input, + const T* bias, + const T* residual1, + const T* residual2, + const T* gamma, + const T* beta, + float layernorm_eps, + int m, + int half_n, + const float* scale_inter, + const float* scale_out, + const float* scale, + float* dynamic_scale, + int int8_mode, + dim3 grid, + dim3 block, + cudaStream_t stream, + int opt_version, + bool is_output, + int residual_num) +{ + if (residual_num == 1) { + dispatch_generalAddBiasResidualLayerNormOpt_bias(norm_output, + output, + input, + bias, + residual1, + residual2, + gamma, + beta, + layernorm_eps, + m, + half_n, + scale_inter, + scale_out, + scale, + dynamic_scale, + int8_mode, + grid, + block, + stream, + opt_version, + is_output); + } + else if (residual_num == 2) { + dispatch_generalAddBiasResidualLayerNormOpt_bias(norm_output, + output, + input, + bias, + residual1, + residual2, + gamma, + beta, + layernorm_eps, + m, + half_n, + scale_inter, + scale_out, + scale, + dynamic_scale, + int8_mode, + grid, + block, + stream, + opt_version, + is_output); + } + else { + FT_CHECK_WITH_INFO(false, "residual_num must be 1 or 2"); + } +} + +template +void dispatch_generalAddBiasResidualLayerNormOpt_unroll_factor(T* norm_output, + T* output, + const T* input, + const T* bias, + const T* residual1, + const T* residual2, + const T* gamma, + const T* beta, + float layernorm_eps, + int m, + int half_n, + const float* scale_inter, + const float* scale_out, + const float* scale, + float* dynamic_scale, + int int8_mode, + dim3 grid, + dim3 block, + cudaStream_t stream, + int opt_version, + bool is_output, + int residual_num, + int unroll_factor) +{ + switch (unroll_factor) { + case 1: + dispatch_generalAddBiasResidualLayerNormOpt_residual_num(norm_output, + output, + input, + bias, + residual1, + residual2, + gamma, + beta, + layernorm_eps, + m, + half_n, + scale_inter, + scale_out, + scale, + dynamic_scale, + int8_mode, + grid, + block, + stream, + opt_version, + is_output, + residual_num); + break; + case 2: + dispatch_generalAddBiasResidualLayerNormOpt_residual_num(norm_output, + output, + input, + bias, + residual1, + residual2, + gamma, + beta, + layernorm_eps, + m, + half_n, + scale_inter, + scale_out, + scale, + dynamic_scale, + int8_mode, + grid, + block, + stream, + opt_version, + is_output, + residual_num); + break; + case 4: + dispatch_generalAddBiasResidualLayerNormOpt_residual_num(norm_output, + output, + input, + bias, + residual1, + residual2, + gamma, + beta, + layernorm_eps, + m, + half_n, + scale_inter, + scale_out, + scale, + dynamic_scale, + int8_mode, + grid, + block, + stream, + opt_version, + is_output, + residual_num); + break; + case 8: + dispatch_generalAddBiasResidualLayerNormOpt_residual_num(norm_output, + output, + input, + bias, + residual1, + residual2, + gamma, + beta, + layernorm_eps, + m, + half_n, + scale_inter, + scale_out, + scale, + dynamic_scale, + int8_mode, + grid, + block, + stream, + opt_version, + is_output, + residual_num); + break; + default: + FT_CHECK_WITH_INFO(false, "unroll_factor must be 1, 2, 4 or 8"); + } +} /* output <- output + bias + residual_1 + residual_2 * output_norm <- LN(output) */ @@ -824,12 +1279,15 @@ void invokeGeneralAddBiasResidualPreLayerNorm(T* output, int n, const float* scale_inter, const float* scale_out, - const float* scale, + float* scale, + float* dynamic_scale, const int int8_mode, cudaStream_t stream, int opt_version) { - const int residual_num = residual2 == nullptr ? 1 : 2; + const int residual_num = residual2 == nullptr ? 1 : 2; + const bool dynamic_quant = dynamic_scale != nullptr; + if (opt_version > 0 && sizeof(T) == 2 && n % 2 == 0) { dim3 grid(m); int half_n = n / 2; @@ -840,41 +1298,34 @@ void invokeGeneralAddBiasResidualPreLayerNorm(T* output, while (unroll_factor > rolls_per_thread && unroll_factor > 1) { unroll_factor /= 2; } + using T2 = typename TypeConverter::Type; - if (opt_version == 1) { - if (unroll_factor == 1) { - HALF_LAYERNORM_OPT_RESIDUAL(1, 1); - } - else if (unroll_factor == 2) { - HALF_LAYERNORM_OPT_RESIDUAL(2, 1); - } - else if (unroll_factor == 3) { - HALF_LAYERNORM_OPT_RESIDUAL(3, 1); - } - else if (unroll_factor == 4) { - HALF_LAYERNORM_OPT_RESIDUAL(4, 1); - } - else if (unroll_factor == 8) { - HALF_LAYERNORM_OPT_RESIDUAL(8, 1); - } - } - else { - if (unroll_factor == 1) { - HALF_LAYERNORM_OPT_RESIDUAL(1, 2); - } - else if (unroll_factor == 2) { - HALF_LAYERNORM_OPT_RESIDUAL(2, 2); - } - else if (unroll_factor == 3) { - HALF_LAYERNORM_OPT_RESIDUAL(3, 2); - } - else if (unroll_factor == 4) { - HALF_LAYERNORM_OPT_RESIDUAL(4, 2); - } - else if (unroll_factor == 8) { - HALF_LAYERNORM_OPT_RESIDUAL(8, 2); - } - } + + /* we launch (and instantiate) the kernel by specializing for unroll_factor -> residual_num -> is_bias -> + * opt_version */ + dispatch_generalAddBiasResidualLayerNormOpt_unroll_factor((T2*)norm_output, + (T2*)output, + (const T2*)input, + (const T2*)bias, + (const T2*)residual1, + (const T2*)residual2, + (const T2*)gamma, + (const T2*)beta, + layernorm_eps, + m, + half_n, + scale_inter, + scale_out, + scale, + dynamic_scale, + int8_mode, + grid, + block, + stream, + opt_version, + true, // is_output + residual_num, + unroll_factor); } else { @@ -885,46 +1336,55 @@ void invokeGeneralAddBiasResidualPreLayerNorm(T* output, Since we have warp shuffle inside the code, block.x % 32 should be 0. */ block.x = (block.x + 31) / 32 * 32; + + size_t maxbytes = n * sizeof(T); if (residual_num == 1) { - generalAddBiasResidualLayerNorm<<>>(input, - residual1, - residual2, - gamma, - beta, - bias, - output, - norm_output, - layernorm_eps, - m, - n, - scale_inter, - scale_out, - scale, - int8_mode); // For gpt-3 + if (maxbytes >= (48 << 10)) { + check_cuda_error(cudaFuncSetAttribute( + generalAddBiasResidualLayerNorm, cudaFuncAttributeMaxDynamicSharedMemorySize, maxbytes)); + } + generalAddBiasResidualLayerNorm<<>>(input, + residual1, + residual2, + gamma, + beta, + bias, + output, + norm_output, + layernorm_eps, + m, + n, + scale_inter, + scale_out, + scale, + dynamic_scale, + int8_mode); } else if (residual_num == 2) { - generalAddBiasResidualLayerNorm<<>>(input, - residual1, - residual2, - gamma, - beta, - bias, - output, - norm_output, - layernorm_eps, - m, - n, - scale_inter, - scale_out, - scale, - int8_mode); // For gpt-3 + if (maxbytes >= (48 << 10)) { + check_cuda_error(cudaFuncSetAttribute( + generalAddBiasResidualLayerNorm, cudaFuncAttributeMaxDynamicSharedMemorySize, maxbytes)); + } + generalAddBiasResidualLayerNorm<<>>(input, + residual1, + residual2, + gamma, + beta, + bias, + output, + norm_output, + layernorm_eps, + m, + n, + scale_inter, + scale_out, + scale, + dynamic_scale, + int8_mode); } } } -#undef HALF_LAYERNORM_OPT -#undef HALF_LAYERNORM_OPT2 - #define INSTANTIATE_INVOKE_GENERAL_ADD_BIAS_RESIDUAL_PRE_LAYER_NORM(T) \ template void invokeGeneralAddBiasResidualPreLayerNorm(T* output, \ T* norm_output, \ @@ -939,7 +1399,8 @@ void invokeGeneralAddBiasResidualPreLayerNorm(T* output, int n, \ const float* scale_inter, \ const float* scale_out, \ - const float* scale, \ + float* scale, \ + float* dynamic_scale, \ const int int8_mode, \ cudaStream_t stream, \ int opt_version) @@ -1041,7 +1502,7 @@ void invokeGeneralAddBiasResidualT5PreLayerNorm(T* output, int n, cudaStream_t stream) { - if (beta != nullptr && bias != nullptr) { + if (beta != nullptr) { invokeGeneralAddBiasResidualPreLayerNorm(output, norm_output, output, @@ -1056,10 +1517,12 @@ void invokeGeneralAddBiasResidualT5PreLayerNorm(T* output, (float*)nullptr, (float*)nullptr, (float*)nullptr, + (float*)nullptr, 0, stream); } else { + FT_CHECK_WITH_INFO(bias == nullptr, "bias should be nullptr when beta is nullptr"); invokeGeneralAddResidualT5PreLayerNorm(output, norm_output, input, gamma, layernorm_eps, m, n, stream); } return; @@ -1099,24 +1562,35 @@ template void invokeGeneralAddBiasResidualT5PreLayerNorm(__nv_bfloat16* ou cudaStream_t stream); #endif -template +template __global__ void generalLayerNorm(const T* __restrict input, const T* __restrict gamma, const T* __restrict beta, - T* output, - const float layernorm_eps, - int m, - int n, - const float* scale, - const int int8_mode) + T* normed_output, + const float layernorm_eps, + int m, + int n, + float* scale, + float* dynamic_scale, + const int int8_mode) { const int tid = threadIdx.x; + extern __shared__ __align__(sizeof(float)) char _shmem[]; + T* shmem = reinterpret_cast(_shmem); + __shared__ float s_mean; __shared__ float s_variance; float mean = 0.0f; float variance = 0.0f; + using Int8_Packed_T = typename packed_as::value>::type; + using Int32_Packed_T = typename packed_as::value>::type; + using Float_Packed_T = typename packed_as::value>::type; + using Scalar_T = typename packed_as::type; + + const Float_Packed_T scale_to_int = cuda_cast(int8_mode == 2 ? *scale : 0.0f); + float local_sum = 0.0f; for (int i = tid; i < n; i += blockDim.x) { local_sum += (float)(ldg(&input[blockIdx.x * n + i])); @@ -1141,48 +1615,39 @@ __global__ void generalLayerNorm(const T* __restrict input, } __syncthreads(); + Scalar_T abs_max = 1e-6f; + for (int i = tid; i < n; i += blockDim.x) { - float beta_val = (beta == nullptr) ? 0.0f : (float)ldg(&beta[i]); - output[blockIdx.x * n + i] = - (T)((((float)input[blockIdx.x * n + i] - s_mean) * s_variance) * (float)(ldg(&gamma[i])) + beta_val); + const int index = blockIdx.x * n + i; + float beta_val = (beta == nullptr) ? 0.0f : (float)ldg(&beta[i]); + T val = (T)((((float)input[index] - s_mean) * s_variance) * (float)(ldg(&gamma[i])) + beta_val); + + if (DYNAMIC_SCALING) { + abs_max = cuda_max(cuda_max(cuda_abs(val)), abs_max); + shmem[i] = val; + } + else if (int8_mode == 2) { + reinterpret_cast(normed_output)[index] = + cuda_cast(cuda_cast(val) * scale_to_int); + } + else { + normed_output[index] = val; + } } -} -#define HALF_LAYERNORM_OPT(UNROLL_FACTOR) \ - generalAddBiasResidualLayerNormOpt \ - <<>>((T2*)out, \ - (T2*)out, \ - (const T2*)out, \ - nullptr, \ - (const T2*)input, \ - nullptr, \ - (const T2*)gamma, \ - (const T2*)beta, \ - layernorm_eps, \ - m, \ - half_n, \ - nullptr, \ - nullptr, \ - scale, \ - int8_mode) - -#define HALF_LAYERNORM_OPT2(UNROLL_FACTOR) \ - generalAddBiasResidualLayerNormOpt2 \ - <<>>((T2*)out, \ - (T2*)out, \ - (const T2*)out, \ - nullptr, \ - (const T2*)input, \ - nullptr, \ - (const T2*)gamma, \ - (const T2*)beta, \ - layernorm_eps, \ - m, \ - half_n, \ - nullptr, \ - nullptr, \ - scale, \ - int8_mode) + if (DYNAMIC_SCALING) { + float abs_max_f = blockAllReduceMax(cuda_cast(abs_max)); + const Scalar_T dynamic_per_token_scale = 127. / abs_max_f; + for (int i = tid; i < n; i += blockDim.x) { + const int index = blockIdx.x * n + i; + reinterpret_cast(normed_output)[index] = cuda_cast( + cuda_cast(shmem[i]) * cuda_cast(dynamic_per_token_scale)); + } + if (threadIdx.x == 0) { + dynamic_scale[blockIdx.x] = (*scale * abs_max_f) / 127.f; + } + } +} template void invokeGeneralLayerNorm(T* out, @@ -1192,13 +1657,20 @@ void invokeGeneralLayerNorm(T* out, const float layernorm_eps, const int m, const int n, - const float* scale, + float* scale, + float* dynamic_scale, const int int8_mode, cudaStream_t stream, int opt_version) { - dim3 grid(m); - if (n % 2 == 0 && std::is_same::value && opt_version > 0) { + dim3 grid(m); + const bool dynamic_quant = dynamic_scale != nullptr; +#ifdef ENABLE_BF16 + if (n % 2 == 0 && (std::is_same::value || std::is_same::value) +#else + if (n % 2 == 0 && (std::is_same::value) +#endif + && opt_version > 0) { int half_n = n / 2; int half_n_32 = (half_n + 31) / 32 * 32; dim3 block(min(half_n_32, 512)); @@ -1208,40 +1680,32 @@ void invokeGeneralLayerNorm(T* out, unroll_factor /= 2; } using T2 = typename TypeConverter::Type; - if (opt_version == 1) { - if (unroll_factor == 1) { - HALF_LAYERNORM_OPT(1); - } - else if (unroll_factor == 2) { - HALF_LAYERNORM_OPT(2); - } - else if (unroll_factor == 3) { - HALF_LAYERNORM_OPT(3); - } - else if (unroll_factor == 4) { - HALF_LAYERNORM_OPT(4); - } - else if (unroll_factor == 8) { - HALF_LAYERNORM_OPT(8); - } - } - else { - if (unroll_factor == 1) { - HALF_LAYERNORM_OPT2(1); - } - else if (unroll_factor == 2) { - HALF_LAYERNORM_OPT2(2); - } - else if (unroll_factor == 3) { - HALF_LAYERNORM_OPT2(3); - } - else if (unroll_factor == 4) { - HALF_LAYERNORM_OPT2(4); - } - else if (unroll_factor == 8) { - HALF_LAYERNORM_OPT2(8); - } - } + + /* we launch (and instantiate) the kernel by specializing for unroll_factor -> residual_num -> is_bias -> + * opt_version */ + dispatch_generalAddBiasResidualLayerNormOpt_unroll_factor((T2*)out, + (T2*)out, + (const T2*)out, + (const T2*)nullptr, + (const T2*)input, + (const T2*)nullptr, + (const T2*)gamma, + (const T2*)beta, + layernorm_eps, + m, + half_n, + nullptr, + nullptr, + scale, + dynamic_scale, + int8_mode, + grid, + block, + stream, + opt_version, + false, // is_output + 1, // residual_num + unroll_factor); } else { dim3 block(min(n, 1024)); @@ -1254,14 +1718,22 @@ void invokeGeneralLayerNorm(T* out, } /* should pay attention to the rsqrt precision*/ - generalLayerNorm - <<>>(input, gamma, beta, out, layernorm_eps, m, n, scale, int8_mode); // For gpt-3 + if (dynamic_quant) { + size_t maxbytes = n * sizeof(T); + if (maxbytes >= (48 << 10)) { + check_cuda_error(cudaFuncSetAttribute( + generalLayerNorm, cudaFuncAttributeMaxDynamicSharedMemorySize, maxbytes)); + } + generalLayerNorm<<>>( + input, gamma, beta, out, layernorm_eps, m, n, scale, dynamic_scale, int8_mode); // For gpt-3 + } + else { + generalLayerNorm<<>>( + input, gamma, beta, out, layernorm_eps, m, n, scale, dynamic_scale, int8_mode); // For gpt-3 + } } } -#undef HALF_LAYERNORM_OPT -#undef HALF_LAYERNORM_OPT2 - template void invokeGeneralLayerNorm(float* out, const float* input, const float* gamma, @@ -1269,7 +1741,8 @@ template void invokeGeneralLayerNorm(float* out, const float layernorm_eps, const int m, const int n, - const float* scale, + float* scale, + float* dynamic_scale, const int int8_mode, cudaStream_t stream, int opt_version); @@ -1280,7 +1753,8 @@ template void invokeGeneralLayerNorm(half* out, const float layernorm_eps, const int m, const int n, - const float* scale, + float* scale, + float* dynamic_scale, const int int8_mode, cudaStream_t stream, int opt_version); @@ -1292,7 +1766,8 @@ template void invokeGeneralLayerNorm(__nv_bfloat16* out, const float layernorm_eps, const int m, const int n, - const float* scale, + float* scale, + float* dynamic_scale, const int int8_mode, cudaStream_t stream, int opt_version); @@ -1864,42 +2339,6 @@ __global__ void add_bias_layernorm_v2( } } -#define HALF_LAYERNORM_OPT(UNROLL_FACTOR) \ - generalAddBiasResidualLayerNormOpt \ - <<>>((T2*)out, \ - (T2*)out, \ - (const T2*)out, \ - (const T2*)bias, \ - (const T2*)out, \ - nullptr, \ - (const T2*)gamma, \ - (const T2*)beta, \ - layernorm_eps, \ - m, \ - half_n, \ - nullptr, \ - nullptr, \ - (float*)nullptr, \ - 0) - -#define HALF_LAYERNORM_OPT2(UNROLL_FACTOR) \ - generalAddBiasResidualLayerNormOpt2 \ - <<>>((T2*)out, \ - (T2*)out, \ - (const T2*)out, \ - (const T2*)bias, \ - (const T2*)out, \ - nullptr, \ - (const T2*)gamma, \ - (const T2*)beta, \ - layernorm_eps, \ - m, \ - half_n, \ - nullptr, \ - nullptr, \ - (float*)nullptr, \ - 0) - template void invokeAddBiasLayernorm(T* out, const T* bias, @@ -1922,40 +2361,32 @@ void invokeAddBiasLayernorm(T* out, unroll_factor /= 2; } using T2 = typename TypeConverter::Type; - if (opt_version == 1) { - if (unroll_factor == 1) { - HALF_LAYERNORM_OPT(1); - } - else if (unroll_factor == 2) { - HALF_LAYERNORM_OPT(2); - } - else if (unroll_factor == 3) { - HALF_LAYERNORM_OPT(3); - } - else if (unroll_factor == 4) { - HALF_LAYERNORM_OPT(4); - } - else if (unroll_factor == 8) { - HALF_LAYERNORM_OPT(8); - } - } - else { - if (unroll_factor == 1) { - HALF_LAYERNORM_OPT2(1); - } - else if (unroll_factor == 2) { - HALF_LAYERNORM_OPT2(2); - } - else if (unroll_factor == 3) { - HALF_LAYERNORM_OPT2(3); - } - else if (unroll_factor == 4) { - HALF_LAYERNORM_OPT2(4); - } - else if (unroll_factor == 8) { - HALF_LAYERNORM_OPT2(8); - } - } + + /* we launch (and instantiate) the kernel by specializing for unroll_factor -> residual_num -> is_bias -> + * opt_version */ + dispatch_generalAddBiasResidualLayerNormOpt_unroll_factor((T2*)out, + (T2*)out, + (const T2*)out, + (const T2*)bias, + (const T2*)out, + (const T2*)nullptr, + (const T2*)gamma, + (const T2*)beta, + layernorm_eps, + m, + half_n, + nullptr, + nullptr, + nullptr, + nullptr, + 0, + grid, + block, + stream, + opt_version, + false, // is_output + 1, // residual_num + unroll_factor); } else { int blockSize = (n + 31) / 32 * 32; @@ -1969,9 +2400,6 @@ void invokeAddBiasLayernorm(T* out, } } -#undef HALF_LAYERNORM_OPT -#undef HALF_LAYERNORM_OPT2 - template void invokeAddBiasLayernorm(float* out, const float* bias, const float* gamma, diff --git a/src/fastertransformer/kernels/layernorm_kernels.h b/src/fastertransformer/kernels/layernorm_kernels.h index 8b52de99b..d8ac09234 100644 --- a/src/fastertransformer/kernels/layernorm_kernels.h +++ b/src/fastertransformer/kernels/layernorm_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -75,7 +75,8 @@ void invokeGeneralAddBiasResidualPreLayerNorm(T* output, int n, const float* scale_inter, const float* scale_out, - const float* scale, + float* scale, + float* dynamic_scale, const int int8_mode, cudaStream_t stream, int opt_version = 2); @@ -93,7 +94,8 @@ void invokeGeneralAddBiasResidualPreLayerNorm(T* output, int n, const float* scale_inter, const float* scale_out, - const float* scale, + float* scale, + float* dynamic_scale, const int int8_mode, cudaStream_t stream, int opt_version = 2) @@ -112,6 +114,7 @@ void invokeGeneralAddBiasResidualPreLayerNorm(T* output, scale_inter, scale_out, scale, + dynamic_scale, int8_mode, stream, opt_version); @@ -125,11 +128,29 @@ void invokeGeneralLayerNorm(T* out, const float layernorm_eps, const int m, const int n, - const float* scale, + float* scale, + float* dynamic_scale, const int int8_mode, cudaStream_t stream, int opt_version = 2); +template +void invokeGeneralLayerNorm(T* out, + const T* input, + const T* gamma, + const T* beta, + const float layernorm_eps, + const int m, + const int n, + float* scale, + const int int8_mode, + cudaStream_t stream, + int opt_version = 2) +{ + invokeGeneralLayerNorm( + out, input, gamma, beta, layernorm_eps, m, n, scale, (float*)nullptr, int8_mode, stream, opt_version = 2); +} + template void invokeGeneralT5LayerNorm(T* out, const T* input, diff --git a/src/fastertransformer/kernels/layout_transformer_int8_kernels.cu b/src/fastertransformer/kernels/layout_transformer_int8_kernels.cu index 47354684c..487a60783 100644 --- a/src/fastertransformer/kernels/layout_transformer_int8_kernels.cu +++ b/src/fastertransformer/kernels/layout_transformer_int8_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/layout_transformer_int8_kernels.h b/src/fastertransformer/kernels/layout_transformer_int8_kernels.h index 5f3888c1c..63f9b33b1 100644 --- a/src/fastertransformer/kernels/layout_transformer_int8_kernels.h +++ b/src/fastertransformer/kernels/layout_transformer_int8_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/logprob_kernels.cu b/src/fastertransformer/kernels/logprob_kernels.cu index 986bbf969..9256dd094 100644 --- a/src/fastertransformer/kernels/logprob_kernels.cu +++ b/src/fastertransformer/kernels/logprob_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/logprob_kernels.h b/src/fastertransformer/kernels/logprob_kernels.h index 94f0d0111..3b1aa4b65 100644 --- a/src/fastertransformer/kernels/logprob_kernels.h +++ b/src/fastertransformer/kernels/logprob_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/longformer_kernels.cu b/src/fastertransformer/kernels/longformer_kernels.cu index 9b555b849..21d88f3c9 100644 --- a/src/fastertransformer/kernels/longformer_kernels.cu +++ b/src/fastertransformer/kernels/longformer_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/longformer_kernels.h b/src/fastertransformer/kernels/longformer_kernels.h index 448e707ff..7316d0ecc 100644 --- a/src/fastertransformer/kernels/longformer_kernels.h +++ b/src/fastertransformer/kernels/longformer_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/matrix_transpose_fp8_kernels_test.cc b/src/fastertransformer/kernels/matrix_transpose_fp8_kernels_test.cc new file mode 100644 index 000000000..caa67b733 --- /dev/null +++ b/src/fastertransformer/kernels/matrix_transpose_fp8_kernels_test.cc @@ -0,0 +1,118 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/kernels/matrix_transpose_kernels.h" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" +#include "src/fastertransformer/utils/memory_utils.h" +#include "src/fastertransformer/utils/test_utils.h" +#include +#include +#include +#include +#include +#include + +using namespace fastertransformer; + +int main(int argc, char** argv) +{ + if (argc != 3) { + printf("[ERROR] Usage: bin/matrix_transpose_fp8_kernels_test m n\n"); + printf("e.g., bin/matrix_transpose_fp8_kernels_test 2048 512\n"); + return 0; + } + + struct cudaDeviceProp prop; + check_cuda_error(cudaGetDeviceProperties(&prop, 0)); + printf("Using device %s\n", prop.name); + + int dim_m = atoi(argv[1]); + int dim_n = atoi(argv[2]); + + float* fp32_input; + float* fp32_output_ref; + float* fp32_output_test; + + __nv_fp8_e4m3* fp8_input; + __nv_fp8_e4m3* fp8_output; + + // Allocate random fp8 input + deviceMalloc(&fp8_input, dim_m * dim_n, true); + deviceMalloc(&fp8_output, dim_m * dim_n, false); + + deviceMalloc(&fp32_input, dim_n * dim_m, false); + deviceMalloc(&fp32_output_ref, dim_n * dim_m, false); + deviceMalloc(&fp32_output_test, dim_n * dim_m, false); + + /********** Correctness verification **********/ + + // Reference + invokeCudaD2Dcpyfp82Float(fp32_input, fp8_input, dim_m * dim_n, 0); + invokeMatrixTranspose(fp32_output_ref, fp32_input, dim_m, dim_n, 0); + + // Test + invokeMatrixTranspose(fp8_output, fp8_input, dim_m, dim_n, 0); + invokeCudaD2Dcpyfp82Float(fp32_output_test, fp8_output, dim_m * dim_n, 0); + sync_check_cuda_error(); + + std::vector d_fp32_test(dim_m * dim_n); + std::vector d_fp32_ref(dim_m * dim_n); + cudaD2Hcpy(d_fp32_ref.data(), fp32_output_ref, dim_m * dim_n); + cudaD2Hcpy(d_fp32_test.data(), fp32_output_test, dim_m * dim_n); + + std::transform(d_fp32_ref.begin(), d_fp32_ref.end(), d_fp32_test.begin(), d_fp32_ref.begin(), abs_diff()); + float global_error = std::accumulate(d_fp32_ref.begin(), d_fp32_ref.end(), 0.0f); + + printf("global_error = %.2f\n", global_error); + + /********** Performance verification **********/ + const int loop_n = 1000; + float elapsed; + cudaStream_t stream; + cudaEvent_t start, end; + cudaStreamCreate(&stream); + cudaEventCreate(&start); + cudaEventCreate(&end); + + cudaEventRecord(start, stream); + for (int i = 0; i < loop_n; i++) { + invokeMatrixTranspose(fp32_output_ref, fp32_input, dim_m, dim_n, stream); + } + cudaEventRecord(end, stream); + + cudaEventSynchronize(end); + cudaEventElapsedTime(&elapsed, start, end); + + printf("Timing reference: %.2fms\n", elapsed); + + cudaEventRecord(start, stream); + for (int i = 0; i < loop_n; i++) { + invokeCudaD2Dcpyfp82Float(fp32_output_test, fp8_output, dim_m * dim_n, stream); + } + cudaEventRecord(end, stream); + + cudaEventSynchronize(end); + cudaEventElapsedTime(&elapsed, start, end); + printf("Timing test: %.2fms\n", elapsed); + + cudaFree(fp8_input); + cudaFree(fp8_output); + cudaFree(fp32_input); + cudaFree(fp32_output_ref); + cudaFree(fp32_output_test); + + return EXIT_SUCCESS; +} diff --git a/src/fastertransformer/kernels/matrix_transpose_kernels.cu b/src/fastertransformer/kernels/matrix_transpose_kernels.cu index de7470801..2fddf7a9b 100644 --- a/src/fastertransformer/kernels/matrix_transpose_kernels.cu +++ b/src/fastertransformer/kernels/matrix_transpose_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -15,6 +15,7 @@ */ #include "src/fastertransformer/kernels/matrix_transpose_kernels.h" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" namespace fastertransformer { @@ -51,7 +52,10 @@ void invokeMatrixTranspose(T* dst, const T* src, const int k, const int n, cudaS } template void invokeMatrixTranspose(float* dst, const float* src, const int m, const int n, cudaStream_t stream); - template void invokeMatrixTranspose(half* dst, const half* src, const int m, const int n, cudaStream_t stream); +#ifdef ENABLE_FP8 +template void +invokeMatrixTranspose(__nv_fp8_e4m3* dst, const __nv_fp8_e4m3* src, const int m, const int n, cudaStream_t stream); +#endif // ENABLE_FP8 } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/matrix_transpose_kernels.h b/src/fastertransformer/kernels/matrix_transpose_kernels.h index 9db63905e..e1959b367 100644 --- a/src/fastertransformer/kernels/matrix_transpose_kernels.h +++ b/src/fastertransformer/kernels/matrix_transpose_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/matrix_vector_multiplication.cu b/src/fastertransformer/kernels/matrix_vector_multiplication.cu index 7ff7f0939..9dcc65391 100644 --- a/src/fastertransformer/kernels/matrix_vector_multiplication.cu +++ b/src/fastertransformer/kernels/matrix_vector_multiplication.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/matrix_vector_multiplication.h b/src/fastertransformer/kernels/matrix_vector_multiplication.h index 74efa19d8..9718d3cee 100644 --- a/src/fastertransformer/kernels/matrix_vector_multiplication.h +++ b/src/fastertransformer/kernels/matrix_vector_multiplication.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/moe_kernels.cu b/src/fastertransformer/kernels/moe_kernels.cu index c4e3bdaaa..104f8d14c 100644 --- a/src/fastertransformer/kernels/moe_kernels.cu +++ b/src/fastertransformer/kernels/moe_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -888,10 +888,11 @@ void initialize_moe_routing_kernelLauncher(const T* unpermuted_input, // Final kernel to unpermute and scale // This kernel unpermutes the original data, does the k-way reduction and performs the final skip connection. -template +template __global__ void finalize_moe_routing_kernel(const T* expanded_permuted_rows, T* reduced_unpermuted_output, - const T* skip, + const T* skip_1, + const T* skip_2, const T* bias, const T* scales, const int* expanded_source_row_to_expanded_dest_row, @@ -903,10 +904,20 @@ __global__ void finalize_moe_routing_kernel(const T* expanded_permuted_rows, const int original_row = blockIdx.x; const int num_rows = gridDim.x; T* reduced_row_ptr = reduced_unpermuted_output + original_row * cols; - const T* skip_row_ptr = skip + original_row * cols; + const T* skip_1_row_ptr = skip_1 + original_row * cols; + const T* skip_2_row_ptr; + if (RESIDUAL_NUM == 2) { + skip_2_row_ptr = skip_2 + original_row * cols; + } for (int tid = threadIdx.x; tid < cols; tid += blockDim.x) { - T thread_output = skip_row_ptr[tid]; + T thread_output; + if (RESIDUAL_NUM == 1) { + thread_output = skip_1_row_ptr[tid]; + } + else if (RESIDUAL_NUM == 2) { + thread_output = skip_1_row_ptr[tid] + skip_2_row_ptr[tid]; + } for (int k_idx = 0; k_idx < k; ++k_idx) { const int expanded_original_row = original_row + k_idx * num_rows; const int expanded_permuted_row = expanded_source_row_to_expanded_dest_row[expanded_original_row]; @@ -939,15 +950,58 @@ void finalize_moe_routing_kernelLauncher(const T* expanded_permuted_rows, { const int blocks = num_rows; const int threads = std::min(cols, 1024); - finalize_moe_routing_kernel<<>>(expanded_permuted_rows, - reduced_unpermuted_output, - skip, - bias, - scales, - expanded_source_row_to_expanded_dest_row, - expert_for_source_row, - cols, - k); + finalize_moe_routing_kernel<<>>(expanded_permuted_rows, + reduced_unpermuted_output, + skip, + nullptr, + bias, + scales, + expanded_source_row_to_expanded_dest_row, + expert_for_source_row, + cols, + k); +} + +template +void finalize_moe_routing_kernelLauncher(const T* expanded_permuted_rows, + T* reduced_unpermuted_output, + const T* skip_1, + const T* skip_2, + const T* bias, + const T* scales, + const int* expanded_source_row_to_expanded_dest_row, + const int* expert_for_source_row, + const int num_rows, + const int cols, + const int k, + cudaStream_t stream) +{ + const int blocks = num_rows; + const int threads = std::min(cols, 1024); + if (skip_2 == nullptr) { + finalize_moe_routing_kernel<<>>(expanded_permuted_rows, + reduced_unpermuted_output, + skip_1, + skip_2, + bias, + scales, + expanded_source_row_to_expanded_dest_row, + expert_for_source_row, + cols, + k); + } + else { + finalize_moe_routing_kernel<<>>(expanded_permuted_rows, + reduced_unpermuted_output, + skip_1, + skip_2, + bias, + scales, + expanded_source_row_to_expanded_dest_row, + expert_for_source_row, + cols, + k); + } } // ========================= TopK Softmax specializations =========================== @@ -1015,6 +1069,30 @@ template void finalize_moe_routing_kernelLauncher(const half*, const int, const int, cudaStream_t); +template void finalize_moe_routing_kernelLauncher(const float*, + float*, + const float*, + const float*, + const float*, + const float*, + const int*, + const int*, + const int, + const int, + const int, + cudaStream_t); +template void finalize_moe_routing_kernelLauncher(const half*, + half*, + const half*, + const half*, + const half*, + const half*, + const int*, + const int*, + const int, + const int, + const int, + cudaStream_t); #ifdef ENABLE_BF16 template void finalize_moe_routing_kernelLauncher(const __nv_bfloat16*, __nv_bfloat16*, @@ -1027,6 +1105,18 @@ template void finalize_moe_routing_kernelLauncher(const __nv_bfloat16*, const int, const int, cudaStream_t); +template void finalize_moe_routing_kernelLauncher(const __nv_bfloat16*, + __nv_bfloat16*, + const __nv_bfloat16*, + const __nv_bfloat16*, + const __nv_bfloat16*, + const __nv_bfloat16*, + const int*, + const int*, + const int, + const int, + const int, + cudaStream_t); #endif } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/moe_kernels.h b/src/fastertransformer/kernels/moe_kernels.h index d1298c91d..c1fa9ec23 100644 --- a/src/fastertransformer/kernels/moe_kernels.h +++ b/src/fastertransformer/kernels/moe_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -104,6 +104,20 @@ void finalize_moe_routing_kernelLauncher(const T* expanded_permuted_rows, const int k, cudaStream_t stream); +template +void finalize_moe_routing_kernelLauncher(const T* expanded_permuted_rows, + T* reduced_unpermuted_output, + const T* skip_1, + const T* skip_2, + const T* bias, + const T* scales, + const int* expanded_source_row_to_expanded_dest_row, + const int* expert_for_source_row, + const int num_rows, + const int cols, + const int k, + cudaStream_t stream); + // Assumes inputs activations are row major. Weights need to be preprocessed by th_op/weight_quantize.cc . // Nested in a class to avoid multiple calls to cudaGetDeviceProperties as this call can be expensive. // Avoid making several duplicates of this class. diff --git a/src/fastertransformer/kernels/normalize_kernels.cu b/src/fastertransformer/kernels/normalize_kernels.cu index 61e563271..6f669cf3e 100644 --- a/src/fastertransformer/kernels/normalize_kernels.cu +++ b/src/fastertransformer/kernels/normalize_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/normalize_kernels.h b/src/fastertransformer/kernels/normalize_kernels.h index c63909510..d821f4525 100644 --- a/src/fastertransformer/kernels/normalize_kernels.h +++ b/src/fastertransformer/kernels/normalize_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/online_softmax_beamsearch_kernels.cu b/src/fastertransformer/kernels/online_softmax_beamsearch_kernels.cu index 78c6f4a15..67d382b61 100644 --- a/src/fastertransformer/kernels/online_softmax_beamsearch_kernels.cu +++ b/src/fastertransformer/kernels/online_softmax_beamsearch_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/online_softmax_beamsearch_kernels.h b/src/fastertransformer/kernels/online_softmax_beamsearch_kernels.h index 7eab46058..addf484d2 100644 --- a/src/fastertransformer/kernels/online_softmax_beamsearch_kernels.h +++ b/src/fastertransformer/kernels/online_softmax_beamsearch_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/penalty_types.h b/src/fastertransformer/kernels/penalty_types.h new file mode 100644 index 000000000..cad9d185a --- /dev/null +++ b/src/fastertransformer/kernels/penalty_types.h @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include +#include + +#include "src/fastertransformer/utils/string_utils.h" + +namespace fastertransformer { + +enum class RepetitionPenaltyType { + Additive, // the presence penalty + Multiplicative, // the repetition penalty + None // No repetition penalty. +}; + +inline float getDefaultPenaltyValue(RepetitionPenaltyType penalty_type) +{ + switch (penalty_type) { + case RepetitionPenaltyType::Additive: + return 0.0f; + case RepetitionPenaltyType::Multiplicative: + return 1.0f; + default: + break; + } + return 0.0f; +} + +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/quantization_int8_kernels.cu b/src/fastertransformer/kernels/quantization_int8_kernels.cu index 74350f467..eb4d65cdf 100644 --- a/src/fastertransformer/kernels/quantization_int8_kernels.cu +++ b/src/fastertransformer/kernels/quantization_int8_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/quantization_int8_kernels.h b/src/fastertransformer/kernels/quantization_int8_kernels.h index e5ccbb1bb..acbef0e50 100644 --- a/src/fastertransformer/kernels/quantization_int8_kernels.h +++ b/src/fastertransformer/kernels/quantization_int8_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/quantize_weight.cu b/src/fastertransformer/kernels/quantize_weight.cu index 8f40cf3f6..265f0b854 100644 --- a/src/fastertransformer/kernels/quantize_weight.cu +++ b/src/fastertransformer/kernels/quantize_weight.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/quantize_weight.h b/src/fastertransformer/kernels/quantize_weight.h index 29b961446..9a28d997d 100644 --- a/src/fastertransformer/kernels/quantize_weight.h +++ b/src/fastertransformer/kernels/quantize_weight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/reduce_kernel_utils.cuh b/src/fastertransformer/kernels/reduce_kernel_utils.cuh index f2ab13000..ff63dee6c 100644 --- a/src/fastertransformer/kernels/reduce_kernel_utils.cuh +++ b/src/fastertransformer/kernels/reduce_kernel_utils.cuh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -134,6 +134,30 @@ __inline__ __device__ T blockReduceMax(T val) return val; } + +/* Calculate the maximum of all elements in a block */ +template +__inline__ __device__ T blockAllReduceMax(T val) +{ + static __shared__ T shared[32]; + int lane = threadIdx.x & 0x1f; // in-warp idx + int wid = threadIdx.x >> 5; // warp idx + + val = warpReduceMax(val); // get maxx in each warp + + if (lane == 0) // record in-warp maxx by warp Idx + shared[wid] = val; + + __syncthreads(); + + // Modify from blockDim.x << 5 to blockDim.x / 32. to prevent + // blockDim.x is not divided by 32 + val = (lane < (blockDim.x / 32.f)) ? shared[lane] : -1e20f; + val = warpReduceMax(val); + + return val; +} + template __inline__ __device__ T warpReduceSumV2(T* val) { diff --git a/src/fastertransformer/kernels/reverse_roll_kernels.cu b/src/fastertransformer/kernels/reverse_roll_kernels.cu index 3ffa8fa9b..8715ad319 100644 --- a/src/fastertransformer/kernels/reverse_roll_kernels.cu +++ b/src/fastertransformer/kernels/reverse_roll_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/reverse_roll_kernels.h b/src/fastertransformer/kernels/reverse_roll_kernels.h index 504a41468..6ac2f2a01 100644 --- a/src/fastertransformer/kernels/reverse_roll_kernels.h +++ b/src/fastertransformer/kernels/reverse_roll_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/sampling_penalty_kernels.cu b/src/fastertransformer/kernels/sampling_penalty_kernels.cu index 1fb720c7a..d7e2c9ee4 100644 --- a/src/fastertransformer/kernels/sampling_penalty_kernels.cu +++ b/src/fastertransformer/kernels/sampling_penalty_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -221,7 +221,7 @@ template void invokeBatchApplyTemperaturePenalty(half* logits, const int vocab_size_padd, cudaStream_t stream); -template +template __global__ void applyRepetitionPenalty(T* logits, const float penalty, const int* start_ids, @@ -252,7 +252,19 @@ __global__ void applyRepetitionPenalty(T* logits, } penalty_indices[index] = penalty_index; float logit = (float)logits[penalty_index]; - penalty_logits[index] = logit < 0.0f ? logit * penalty : logit / penalty; + if (penalty_type == RepetitionPenaltyType::Additive) { + penalty_logits[index] = logit - penalty; + } + else if (penalty_type == RepetitionPenaltyType::Multiplicative) { + penalty_logits[index] = logit < 0.0f ? logit * penalty : logit / penalty; + } + else if (penalty_type == RepetitionPenaltyType::None) { + penalty_logits[index] = logit; + } + else { + // Unsupported type + assert(false); + } } if (blockDim.x > 32) { @@ -274,61 +286,85 @@ __global__ void applyRepetitionPenalty(T* logits, } template -void invokeApplyRepetitionPenalty(T* logits, - const float penalty, - const int* start_ids, - int* output_ids, - const int batch_size, - const int local_batch_size, - const int vocab_size, - const int vocab_size_padd, - const int* input_lengths, - const int max_input_len, - const int step, - cudaStream_t stream) +void invokeApplyRepetitionPenalty(T* logits, + const float penalty, + const int* start_ids, + int* output_ids, + const int batch_size, + const int local_batch_size, + const int vocab_size, + const int vocab_size_padd, + const int* input_lengths, + const int max_input_len, + const int step, + const RepetitionPenaltyType penalty_type, + cudaStream_t stream) { - dim3 block(min(step, 1024)); - dim3 grid(local_batch_size); - applyRepetitionPenalty<<>>(logits, - penalty, - start_ids, - output_ids, - batch_size, - local_batch_size, - vocab_size, - vocab_size_padd, - input_lengths, - max_input_len, - step); -} + dim3 block(min(step, 1024)); + dim3 grid(local_batch_size); + size_t smem_size = step * (sizeof(float) + sizeof(int)); -template void invokeApplyRepetitionPenalty(float* logits, - const float penalty, - const int* start_ids, - int* output_ids, - const int batch_size, - const int local_batch_size, - const int vocab_size, - const int vocab_size_padd, - const int* input_lengths, - const int max_input_len, - const int step, - cudaStream_t stream); - -template void invokeApplyRepetitionPenalty(half* logits, - const float penalty, - const int* start_ids, - int* output_ids, - const int batch_size, - const int local_batch_size, - const int vocab_size, - const int vocab_size_padd, - const int* input_lengths, - const int max_input_len, - const int step, - cudaStream_t stream); + if (penalty_type == RepetitionPenaltyType::Additive) { + applyRepetitionPenalty<<>>(logits, + penalty, + start_ids, + output_ids, + batch_size, + local_batch_size, + vocab_size, + vocab_size_padd, + input_lengths, + max_input_len, + step); + } + else if (penalty_type == RepetitionPenaltyType::Multiplicative) { + applyRepetitionPenalty + <<>>(logits, + penalty, + start_ids, + output_ids, + batch_size, + local_batch_size, + vocab_size, + vocab_size_padd, + input_lengths, + max_input_len, + step); + } + else if (penalty_type == RepetitionPenaltyType::None) { + // do nothing + } +} -template +template void invokeApplyRepetitionPenalty(float* logits, + const float penalty, + const int* start_ids, + int* output_ids, + const int batch_size, + const int local_batch_size, + const int vocab_size, + const int vocab_size_padd, + const int* input_lengths, + const int max_input_len, + const int step, + const RepetitionPenaltyType penalty_type, + cudaStream_t stream); + +template void invokeApplyRepetitionPenalty(half* logits, + const float penalty, + const int* start_ids, + int* output_ids, + const int batch_size, + const int local_batch_size, + const int vocab_size, + const int vocab_size_padd, + const int* input_lengths, + const int max_input_len, + const int step, + const RepetitionPenaltyType penalty_type, + cudaStream_t stream); + +template __global__ void batchApplyRepetitionPenalty(T* logits, const float* penalties, const int* output_ids, @@ -358,7 +394,19 @@ __global__ void batchApplyRepetitionPenalty(T* logits, assert(penalty_index < vocab_size); penalty_indices[index] = penalty_index; float logit = (float)logits[penalty_index]; - penalty_logits[index] = logit < 0.0f ? logit * penalty : logit / penalty; + if (penalty_type == RepetitionPenaltyType::Additive) { + penalty_logits[index] = logit - penalty; + } + else if (penalty_type == RepetitionPenaltyType::Multiplicative) { + penalty_logits[index] = logit < 0.0f ? logit * penalty : logit / penalty; + } + else if (penalty_type == RepetitionPenaltyType::None) { + penalty_logits[index] = logit; + } + else { + // Unsupported type + assert(false); + } } if (blockDim.x > 32) { @@ -376,16 +424,17 @@ __global__ void batchApplyRepetitionPenalty(T* logits, } template -void invokeBatchApplyRepetitionPenalty(T* logits, - const float* penalties, - const int* output_ids, - const int batch_size, - const int local_batch_size, - const int vocab_size, - const int* input_lengths, - const int max_input_length, - const int step, - cudaStream_t stream) +void invokeBatchApplyRepetitionPenalty(T* logits, + const float* penalties, + const int* output_ids, + const int batch_size, + const int local_batch_size, + const int vocab_size, + const int* input_lengths, + const int max_input_length, + const int step, + RepetitionPenaltyType penalty_type, + cudaStream_t stream) { // Inputs // logits [local_batch_size, vocab_size] : logit values. @@ -396,30 +445,93 @@ void invokeBatchApplyRepetitionPenalty(T* logits, dim3 block(min(step, 1024)); dim3 grid(local_batch_size); size_t smem_size = step * (sizeof(float) + sizeof(int)); - batchApplyRepetitionPenalty<<>>( - logits, penalties, output_ids, batch_size, vocab_size, input_lengths, max_input_length, step); + if (penalty_type == RepetitionPenaltyType::Additive) { + batchApplyRepetitionPenalty<<>>( + logits, penalties, output_ids, batch_size, vocab_size, input_lengths, max_input_length, step); + } + else if (penalty_type == RepetitionPenaltyType::Multiplicative) { + batchApplyRepetitionPenalty<<>>( + logits, penalties, output_ids, batch_size, vocab_size, input_lengths, max_input_length, step); + } + else if (penalty_type == RepetitionPenaltyType::None) { + // do nothing + } } -template void invokeBatchApplyRepetitionPenalty(float* logits, - const float* penalties, - const int* output_ids, - const int batch_size, - const int local_batch_size, - const int vocab_size, - const int* input_lengths, - const int max_input_length, - const int step, - cudaStream_t stream); - -template void invokeBatchApplyRepetitionPenalty(half* logits, - const float* penalties, - const int* output_ids, - const int batch_size, - const int local_batch_size, - const int vocab_size, - const int* input_lengths, - const int max_input_length, - const int step, - cudaStream_t stream); +template void invokeBatchApplyRepetitionPenalty(float* logits, + const float* penalties, + const int* output_ids, + const int batch_size, + const int local_batch_size, + const int vocab_size, + const int* input_lengths, + const int max_input_length, + const int step, + RepetitionPenaltyType penalty_type, + cudaStream_t stream); + +template void invokeBatchApplyRepetitionPenalty(half* logits, + const float* penalties, + const int* output_ids, + const int batch_size, + const int local_batch_size, + const int vocab_size, + const int* input_lengths, + const int max_input_length, + const int step, + RepetitionPenaltyType penalty_type, + cudaStream_t stream); + +template +__global__ void batchApplyMinLengthPenalty(T* logits, + const int* min_lengths, + const int* end_ids, + const int* sequence_lengths, + const int max_input_length, + const int vocab_size_padded) +{ + int bid = threadIdx.x + blockIdx.x * blockDim.x; // batch index + // We need +1 because sequence_lengths = max_input_length + num_gen_tokens - 1, + // which is equal to the length of k/v caches. + if (sequence_lengths[bid] + 1 - max_input_length < min_lengths[bid]) { + T mask_val = (std::is_same::value) ? -65504.0f : -FLT_MAX; + logits[bid * vocab_size_padded + end_ids[bid]] = mask_val; + } +} + +template +void invokeMinLengthPenalty(T* logits, + const int* min_lengths, + const int* end_ids, + const int* sequnece_lengths, + const int max_input_length, + const int batch_size, + const int vocab_size_padded, + cudaStream_t stream) + +{ + const int block_size = min(batch_size, 1024); + const int grid_size = (batch_size + block_size - 1) / block_size; + batchApplyMinLengthPenalty<<>>( + logits, min_lengths, end_ids, sequnece_lengths, max_input_length, vocab_size_padded); +} + +template void invokeMinLengthPenalty(float* logits, + const int* min_lengths, + const int* end_ids, + const int* sequnece_lengths, + const int max_input_length, + const int batch_size, + const int vocab_size_padded, + cudaStream_t stream); + +template void invokeMinLengthPenalty(half* logits, + const int* min_lengths, + const int* end_ids, + const int* sequnece_lengths, + const int max_input_length, + const int batch_size, + const int vocab_size_padded, + cudaStream_t stream); } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/sampling_penalty_kernels.h b/src/fastertransformer/kernels/sampling_penalty_kernels.h index b0830b104..1ceb9c85a 100644 --- a/src/fastertransformer/kernels/sampling_penalty_kernels.h +++ b/src/fastertransformer/kernels/sampling_penalty_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -17,35 +17,38 @@ #include +#include "src/fastertransformer/kernels/penalty_types.h" #include "src/fastertransformer/utils/cuda_utils.h" namespace fastertransformer { template -void invokeApplyRepetitionPenalty(T* logits, - const float penalty, - const int* start_ids, - int* output_ids, - const int batch_size, - const int local_batch_size, - const int vocab_size, - const int vocab_size_padd, - const int* input_lengths, - const int max_input_len, - const int step, - cudaStream_t stream); +void invokeApplyRepetitionPenalty(T* logits, + const float penalty, + const int* start_ids, + int* output_ids, + const int batch_size, + const int local_batch_size, + const int vocab_size, + const int vocab_size_padd, + const int* input_lengths, + const int max_input_len, + const int step, + const RepetitionPenaltyType penalty_type, + cudaStream_t stream); template -void invokeBatchApplyRepetitionPenalty(T* logits, - const float* penalties, - const int* output_ids, - const int batch_size, - const int local_batch_size, - const int vocab_size, - const int* input_lengths, - const int max_input_length, - const int step, - cudaStream_t stream); +void invokeBatchApplyRepetitionPenalty(T* logits, + const float* penalties, + const int* output_ids, + const int batch_size, + const int local_batch_size, + const int vocab_size, + const int* input_lengths, + const int max_input_length, + const int step, + const RepetitionPenaltyType penalty_type, + cudaStream_t stream); template void invokeApplyTemperaturePenalty(T* logits, @@ -64,4 +67,15 @@ void invokeBatchApplyTemperaturePenalty(T* logits, const int vocab_size, const int vocab_size_padd, cudaStream_t stream); + +template +void invokeMinLengthPenalty(T* logits, + const int* min_lengths, + const int* end_ids, + const int* sequnece_lengths, + const int max_input_length, + const int batch_size, + const int vocab_size_padded, + cudaStream_t stream); + } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/sampling_topk_kernels.cu b/src/fastertransformer/kernels/sampling_topk_kernels.cu index bcde3dcaa..21df52687 100644 --- a/src/fastertransformer/kernels/sampling_topk_kernels.cu +++ b/src/fastertransformer/kernels/sampling_topk_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/kernels/sampling_topk_kernels.h b/src/fastertransformer/kernels/sampling_topk_kernels.h index ea051455f..4c8c763c3 100644 --- a/src/fastertransformer/kernels/sampling_topk_kernels.h +++ b/src/fastertransformer/kernels/sampling_topk_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/kernels/sampling_topp_kernels.cu b/src/fastertransformer/kernels/sampling_topp_kernels.cu index 0bf3cbe6f..78122dc2c 100644 --- a/src/fastertransformer/kernels/sampling_topp_kernels.cu +++ b/src/fastertransformer/kernels/sampling_topp_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/sampling_topp_kernels.h b/src/fastertransformer/kernels/sampling_topp_kernels.h index a395da9a2..41a58752b 100644 --- a/src/fastertransformer/kernels/sampling_topp_kernels.h +++ b/src/fastertransformer/kernels/sampling_topp_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/softmax_int8_kernels.cu b/src/fastertransformer/kernels/softmax_int8_kernels.cu index 7fcead1f2..1e803813f 100644 --- a/src/fastertransformer/kernels/softmax_int8_kernels.cu +++ b/src/fastertransformer/kernels/softmax_int8_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/softmax_int8_kernels.h b/src/fastertransformer/kernels/softmax_int8_kernels.h index 98cbe3d71..da7a34358 100644 --- a/src/fastertransformer/kernels/softmax_int8_kernels.h +++ b/src/fastertransformer/kernels/softmax_int8_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/stop_criteria_kernels.cu b/src/fastertransformer/kernels/stop_criteria_kernels.cu index 9a610870c..5d6611153 100644 --- a/src/fastertransformer/kernels/stop_criteria_kernels.cu +++ b/src/fastertransformer/kernels/stop_criteria_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -134,7 +134,7 @@ __global__ void length_criterion(bool* finished, void invokeLengthCriterion(bool* finished, bool* should_stop, - int* finished_sum, + int* h_pinned_finished_sum_, const uint32_t* sequence_limit_length, int batch_size, int beam_width, @@ -146,14 +146,14 @@ void invokeLengthCriterion(bool* finished, FT_LOG_DEBUG("%s start", __PRETTY_FUNCTION__); dim3 block{min(512, uint32_t(batch_size * beam_width))}; dim3 grid{1}; + h_pinned_finished_sum_[0] = -1; length_criterion<<>>( - finished, should_stop, finished_sum, sequence_limit_length, batch_size, beam_width, step); + finished, should_stop, h_pinned_finished_sum_, sequence_limit_length, batch_size, beam_width, step); + while (((volatile size_t*)h_pinned_finished_sum_)[0] == -1) {}; sync_check_cuda_error(); - int h_finished_sum = 0; - cudaD2Hcpy(&h_finished_sum, finished_sum, 1); - *should_stop = h_finished_sum == batch_size * beam_width; + *should_stop = h_pinned_finished_sum_[0] == batch_size * beam_width; } } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/stop_criteria_kernels.h b/src/fastertransformer/kernels/stop_criteria_kernels.h index 2723284c0..fb46d3b70 100644 --- a/src/fastertransformer/kernels/stop_criteria_kernels.h +++ b/src/fastertransformer/kernels/stop_criteria_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/transform_mask_kernels.cu b/src/fastertransformer/kernels/transform_mask_kernels.cu index 75b8b40e5..5772a6577 100644 --- a/src/fastertransformer/kernels/transform_mask_kernels.cu +++ b/src/fastertransformer/kernels/transform_mask_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/transform_mask_kernels.h b/src/fastertransformer/kernels/transform_mask_kernels.h index f2ae03372..1e737d568 100644 --- a/src/fastertransformer/kernels/transform_mask_kernels.h +++ b/src/fastertransformer/kernels/transform_mask_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/transpose_int8_kernels.cu b/src/fastertransformer/kernels/transpose_int8_kernels.cu index 30c5c16e8..95846838f 100644 --- a/src/fastertransformer/kernels/transpose_int8_kernels.cu +++ b/src/fastertransformer/kernels/transpose_int8_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/transpose_int8_kernels.h b/src/fastertransformer/kernels/transpose_int8_kernels.h index 1413c7266..4efa0c5ef 100644 --- a/src/fastertransformer/kernels/transpose_int8_kernels.h +++ b/src/fastertransformer/kernels/transpose_int8_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/unfused_attention_fp8_kernels.cu b/src/fastertransformer/kernels/unfused_attention_fp8_kernels.cu new file mode 100644 index 000000000..7d7c2fd08 --- /dev/null +++ b/src/fastertransformer/kernels/unfused_attention_fp8_kernels.cu @@ -0,0 +1,1158 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/kernels/decoder_masked_multihead_attention_utils.h" +#include "src/fastertransformer/kernels/reduce_kernel_utils.cuh" +#include "src/fastertransformer/kernels/unfused_attention_fp8_kernels.h" +#include "src/fastertransformer/utils/cuda_bf16_fallbacks.cuh" +#include "src/fastertransformer/utils/cuda_utils.h" +#include "src/fastertransformer/utils/memory_utils.h" + +namespace fastertransformer { + +template +struct Vec_t { +}; +template<> +struct Vec_t { + using Type = float2; +}; +template<> +struct Vec_t { + using Type = half2; +}; + +template<> +struct Vec_t<__nv_fp8_e4m3> { + using Type = __nv_fp8x2_e4m3; +}; + +template<> +struct Vec_t<__nv_bfloat16> { + using Type = nv_bfloat162; +}; + +template +__device__ __inline__ Vec1 convert_vec(Vec2 in_vec) +{ + return Vec1(in_vec); +} + +template<> +__device__ __inline__ float2 convert_vec(half2 in_vec) +{ + return float2{(float)in_vec.x, (float)in_vec.y}; +} + +template<> +__device__ __inline__ float2 convert_vec(__nv_bfloat162 in_vec) +{ + return float2{(float)in_vec.x, (float)in_vec.y}; +} + +template<> +__device__ __inline__ __nv_bfloat162 convert_vec(half2 in_vec) +{ + __nv_bfloat162 out = cuda_cast<__nv_bfloat162, half2>(in_vec); + return out; +} + +#ifdef ENABLE_FP8 +template<> +__device__ __inline__ float2 convert_vec(__nv_fp8x2_e4m3 in_vec) +{ + return (float2)in_vec; +} + +template<> +__device__ __inline__ __nv_bfloat162 convert_vec(__nv_fp8x2_e4m3 in_vec) +{ + return fp8x2_e4m3_to_bfloat2(&in_vec); +} +#endif + +// This optimization has bug +// #define OPT_TRANSPOSE + +#ifdef OPT_TRANSPOSE +template +__global__ void FP8AddFusedQKVBiasRebuildPaddingKernel(FP8AddFusedQKVBiasRebuildPaddingParam param) +{ + using T1_4 = __nv_fp8x4_e4m3; + using T2_2 = typename TypeConverter::Type; + + __shared__ T2 src_v[SEQ_GROUP_SIZE * (SIZE_PER_HEAD + 2)]; + T2_2* src_v_2 = (T2_2*)(src_v); + + const int batch_idx = blockIdx.x; + const int seq_idx = blockIdx.y * SEQ_GROUP_SIZE + threadIdx.y; + const int head_idx = blockIdx.z; + const int tidx = threadIdx.x; + int Dh_div_4 = param.size_per_head / 4; + bool is_valid_seq_idx = + param.padding_offset_prefix_sum == nullptr ? + seq_idx < param.seq_len : + seq_idx < (param.padding_offset_prefix_sum[batch_idx + 1] - param.padding_offset_prefix_sum[batch_idx]); + + if (tidx < Dh_div_4 && is_valid_seq_idx) { + + const int sentence_idx = + (param.padding_offset_prefix_sum == nullptr ? param.seq_len * batch_idx : + param.padding_offset_prefix_sum[batch_idx]) + + seq_idx; + + int Dh_div_2 = param.size_per_head / 2; + int n_div_4 = param.head_num * Dh_div_4; + int n_div_2 = param.head_num * Dh_div_2; + + const int hidden_idx = head_idx * Dh_div_4 + tidx; + + const int q_idx = sentence_idx * 3 * n_div_4 + hidden_idx; + const int k_idx = sentence_idx * 3 * n_div_4 + hidden_idx + n_div_4; + const int v_idx = sentence_idx * 3 * n_div_4 + hidden_idx + 2 * n_div_4; + + T1_4* qkv_ptr = (T1_4*)(param.QKV_T1); + T2_2 q[2]; + T2_2 k[2]; + T2_2 v[2]; + + fp8x4_e4m3_to_bfloat2(&q[0], &q[1], &qkv_ptr[q_idx]); + fp8x4_e4m3_to_bfloat2(&k[0], &k[1], &qkv_ptr[k_idx]); + fp8x4_e4m3_to_bfloat2(&v[0], &v[1], &qkv_ptr[v_idx]); + T2_2 input_scale2 = cuda_cast(param.input_scale == nullptr ? 1.0f : __ldg(param.input_scale)); + + if (param.input_scale_2 != nullptr) { + // q.x = q.x * input_scale * __ldg(param.input_scale_2 + hidden_idx) + // * (param.input_scale_2_min == nullptr ? 1.0f : ldg(param.input_scale_2_min)); + // q.y = q.y * input_scale * __ldg(param.input_scale_2 + hidden_idx) + // * (param.input_scale_2_min == nullptr ? 1.0f : ldg(param.input_scale_2_min)); + // k.x = k.x * input_scale * __ldg(param.input_scale_2 + hidden_idx + n) + // * (param.input_scale_2_min == nullptr ? 1.0f : ldg(param.input_scale_2_min)); + // k.y = k.y * input_scale * __ldg(param.input_scale_2 + hidden_idx + n) + // * (param.input_scale_2_min == nullptr ? 1.0f : ldg(param.input_scale_2_min)); + // v.x = v.x * input_scale * __ldg(param.input_scale_2 + hidden_idx + 2 * n) + // * (param.input_scale_2_min == nullptr ? 1.0f : ldg(param.input_scale_2_min)); + // v.y = v.y * input_scale * __ldg(param.input_scale_2 + hidden_idx + 2 * n) + // * (param.input_scale_2_min == nullptr ? 1.0f : ldg(param.input_scale_2_min)); + } + else { + q[0] = hmul2(q[0], input_scale2); + q[1] = hmul2(q[1], input_scale2); + k[0] = hmul2(k[0], input_scale2); + k[1] = hmul2(k[1], input_scale2); + v[0] = hmul2(v[0], input_scale2); + v[1] = hmul2(v[1], input_scale2); + } + + T2_2* bias_ptr = (T2_2*)(param.qkv_bias); + + q[0] = mmha::add(q[0], bias_ptr[head_idx * Dh_div_2 + 2 * tidx]); + q[1] = mmha::add(q[1], bias_ptr[head_idx * Dh_div_2 + 2 * tidx + 1]); + k[0] = mmha::add(k[0], bias_ptr[head_idx * Dh_div_2 + 1 * n_div_2 + 2 * tidx]); + k[1] = mmha::add(k[1], bias_ptr[head_idx * Dh_div_2 + 1 * n_div_2 + 2 * tidx + 1]); + v[0] = mmha::add(v[0], bias_ptr[head_idx * Dh_div_2 + 2 * n_div_2 + 2 * tidx]); + v[1] = mmha::add(v[1], bias_ptr[head_idx * Dh_div_2 + 2 * n_div_2 + 2 * tidx + 1]); + + mmha::apply_rotary_embedding(q[0], k[0], 2 * tidx, param.rotary_embedding_dim, seq_idx); + mmha::apply_rotary_embedding(q[1], k[1], 2 * tidx + 1, param.rotary_embedding_dim, seq_idx); + + T2_2 output_scale2 = cuda_cast(param.output_scale == nullptr ? 1.0f : __ldg(param.output_scale)); + + q[0] = hmul2(q[0], output_scale2); + q[1] = hmul2(q[1], output_scale2); + k[0] = hmul2(k[0], output_scale2); + k[1] = hmul2(k[1], output_scale2); + v[0] = hmul2(v[0], output_scale2); + v[1] = hmul2(v[1], output_scale2); + + T1_4* q_out_ptr = (T1_4*)(param.q_buf); + T1_4* k_out_ptr = (T1_4*)(param.k_buf); + + src_v_2[threadIdx.y * (SIZE_PER_HEAD / 2 + 1) + tidx * 2 + 0] = v[0]; + src_v_2[threadIdx.y * (SIZE_PER_HEAD / 2 + 1) + tidx * 2 + 1] = v[1]; + + // q_buf, k_buf: [batch, head_num, seq_len_paaded, size_per_head] + const int dest_idx = n_div_4 * param.seq_len_padded * batch_idx + Dh_div_4 * param.seq_len_padded * head_idx + + Dh_div_4 * seq_idx + tidx; + + q_out_ptr[dest_idx] = T1_4(q[0], q[1]); + k_out_ptr[dest_idx] = T1_4(k[0], k[1]); + } + else { + src_v_2[threadIdx.y * (SIZE_PER_HEAD / 2 + 1) + tidx * 2 + 0] = cuda_cast(0.0f); + src_v_2[threadIdx.y * (SIZE_PER_HEAD / 2 + 1) + tidx * 2 + 1] = cuda_cast(0.0f); + } + + __syncthreads(); + + const int seq_group_id = seq_idx / SEQ_GROUP_SIZE; + // v_buf: [batch, head_num, size_per_head, seq_len_paaded] + T1_4* v_out_ptr = (T1_4*)(param.v_buf); + for (int new_id = threadIdx.x * blockDim.y + threadIdx.y; new_id < SIZE_PER_HEAD * (SEQ_GROUP_SIZE / 4); + new_id += blockDim.x * blockDim.y) { + int new_size_id = new_id / (SEQ_GROUP_SIZE / 4); + int new_seq_id = new_id % (SEQ_GROUP_SIZE / 4); + + T2_2 val_1; + T2_2 val_2; + val_1.x = src_v[(4 * new_seq_id + 0) * (SIZE_PER_HEAD + 2) + new_size_id]; + val_1.y = src_v[(4 * new_seq_id + 1) * (SIZE_PER_HEAD + 2) + new_size_id]; + val_2.x = src_v[(4 * new_seq_id + 2) * (SIZE_PER_HEAD + 2) + new_size_id]; + val_2.y = src_v[(4 * new_seq_id + 3) * (SIZE_PER_HEAD + 2) + new_size_id]; + + v_out_ptr[param.head_num * param.size_per_head * (param.seq_len_padded / 4) * batch_idx + + param.size_per_head * (param.seq_len_padded / 4) * head_idx + + new_size_id * (param.seq_len_padded / 4) + seq_group_id * (SEQ_GROUP_SIZE / 4) + new_seq_id] = + T1_4(val_1, val_2); + } +} + +template +void invokeFP8AddFusedQKVBiasRebuildPadding(FP8AddFusedQKVBiasRebuildPaddingParam param) +{ + // To implement rotary embeddings, each thread processes two QKV elems: + const int seq_group_size = 64; + dim3 block((param.size_per_head / 4 + 1) / 2 * 2, seq_group_size); + dim3 grid(param.batch_size, (param.seq_len + seq_group_size - 1) / seq_group_size, param.head_num); + + FT_CHECK(block.x * block.y <= 1024); + if (param.size_per_head == 64) { + FP8AddFusedQKVBiasRebuildPaddingKernel<<>>(param); + } + else { + FT_CHECK(false); + } +} + +// template void invokeFP8AddFusedQKVBiasRebuildPadding<__nv_fp8_e4m3, __nv_fp8_e4m3>( +// FP8AddFusedQKVBiasRebuildPaddingParam<__nv_fp8_e4m3, __nv_fp8_e4m3> param); +// template void invokeFP8AddFusedQKVBiasRebuildPadding<__nv_fp8_e4m3, half>( +// FP8AddFusedQKVBiasRebuildPaddingParam<__nv_fp8_e4m3, half> param); +template void invokeFP8AddFusedQKVBiasRebuildPadding<__nv_fp8_e4m3, __nv_bfloat16>( + FP8AddFusedQKVBiasRebuildPaddingParam<__nv_fp8_e4m3, __nv_bfloat16> param); +#else +template +__global__ void FP8AddFusedQKVBiasRebuildPaddingKernel(FP8AddFusedQKVBiasRebuildPaddingParam param) +{ + using VecFP8_t = typename Vec_t::Type; + using VecBias_t = typename Vec_t::Type; + using PACKED_BF16 = __nv_bfloat162_2; + using PACKED_FP8 = __nv_fp8x2_x2_e4m3; + using ARRAY_FP8 = __nv_fp8_4_e4m3; + using ARRAY_BF16 = __nv_bfloat164; + using VecBF16_t = typename Vec_t<__nv_bfloat16>::Type; + constexpr int ELEMENT_PER_THREAD = 4; + constexpr int NUM_PACKS = 2; + // const int sentence_idx = blockIdx.z; + // const int padded_row_id = sentence_idx + (param.padding_offset == nullptr ? 0 : + // param.padding_offset[sentence_idx]); + const int batch_idx = blockIdx.z / param.head_num; + const int head_idx = blockIdx.z % param.head_num; + const int seq_idx = threadIdx.y + blockIdx.y * blockDim.y; + const int sentence_idx = batch_idx * param.seq_len + seq_idx; + const int size_per_head_idx = threadIdx.x + blockIdx.x * blockDim.x; + const bool V_CACHE_STORE = param.v_cache != nullptr; + const int v_dest_idx_0 = param.size_per_head * param.seq_len_padded * param.head_num * batch_idx + + param.size_per_head * param.seq_len_padded * head_idx; + __shared__ T1 sdata[32 * 33 * ELEMENT_PER_THREAD]; +#pragma unroll + for (int i = 0; i < ELEMENT_PER_THREAD; i++) { + sdata[blockIdx.y * 33 * ELEMENT_PER_THREAD + blockIdx.x * ELEMENT_PER_THREAD + i] = (T1)0.0f; + } + + if (size_per_head_idx * ELEMENT_PER_THREAD < param.size_per_head && seq_idx < param.seq_len_padded) { + const int hidden_idx = head_idx * param.size_per_head + size_per_head_idx * ELEMENT_PER_THREAD; + const int n = param.head_num * param.size_per_head; + + // src QKV: [token_num, 3, head, hidden] + const int q_idx = sentence_idx * 3 * n + hidden_idx; + const int k_idx = sentence_idx * 3 * n + hidden_idx + n; + const int v_idx = sentence_idx * 3 * n + hidden_idx + 2 * n; + + PACKED_BF16 q, k, v; + + if (INPUT_T1) { + PACKED_FP8 q_input = *reinterpret_cast(¶m.QKV_T1[q_idx]); + PACKED_FP8 k_input = *reinterpret_cast(¶m.QKV_T1[k_idx]); + PACKED_FP8 v_input = *reinterpret_cast(¶m.QKV_T1[v_idx]); +#pragma unroll + for (int i = 0; i < NUM_PACKS; i++) { + q.array[i] = convert_vec(q_input.array[i]); + k.array[i] = convert_vec(k_input.array[i]); + v.array[i] = convert_vec(v_input.array[i]); + } + } + else { + q = *reinterpret_cast(¶m.QKV_T2[q_idx]); + k = *reinterpret_cast(¶m.QKV_T2[k_idx]); + v = *reinterpret_cast(¶m.QKV_T2[v_idx]); + } + + __nv_bfloat162 input_scale2 = + __float2bfloat162_rn(param.input_scale == nullptr ? 1.0f : __ldg(param.input_scale)); + + PACKED_BF16 q_bias, k_bias, v_bias; + q_bias = *reinterpret_cast(¶m.qkv_bias[hidden_idx]); + k_bias = *reinterpret_cast(¶m.qkv_bias[hidden_idx + n]); + v_bias = *reinterpret_cast(¶m.qkv_bias[hidden_idx + 2 * n]); +#pragma unroll + for (int i = 0; i < NUM_PACKS; i++) { + q.array[i] = mmha::add(hmul2(q.array[i], input_scale2), q_bias.array[i]); + k.array[i] = mmha::add(hmul2(k.array[i], input_scale2), k_bias.array[i]); + v.array[i] = mmha::add(hmul2(v.array[i], input_scale2), v_bias.array[i]); + } + + // mmha::apply_rotary_embedding(q, k, tidx, param.rotary_embedding_dim, seq_idx); + const int v_cache_idx = param.size_per_head * param.max_seq_len * param.head_num * batch_idx + + param.size_per_head * param.max_seq_len * head_idx + seq_idx * param.size_per_head + + size_per_head_idx * ELEMENT_PER_THREAD; +#ifndef FP8_MHA + if (V_CACHE_STORE && seq_idx < param.seq_len) { + *reinterpret_cast(¶m.v_cache[v_cache_idx]) = v; + } +#endif + + __nv_bfloat162 output_scale2 = + __float2bfloat162_rn(param.output_scale == nullptr ? 1.0f : __ldg(param.output_scale)); +#pragma unroll + for (int i = 0; i < NUM_PACKS; i++) { + q.array[i] = hmul2(q.array[i], output_scale2); + k.array[i] = hmul2(k.array[i], output_scale2); + v.array[i] = hmul2(v.array[i], output_scale2); +#ifdef FP8_MHA + if (V_CACHE_STORE && seq_idx < param.seq_len) { + reinterpret_cast(¶m.v_cache[v_cache_idx])[i] = + convert_vec(v.array[i]); + } +#endif + } + + // q_buf, k_buf: [batch, head_num, seq_len_paaded, size_per_head] + const int dest_idx = param.size_per_head * param.seq_len_padded * param.head_num * batch_idx + + param.size_per_head * param.seq_len_padded * head_idx + param.size_per_head * seq_idx + + size_per_head_idx * ELEMENT_PER_THREAD; + + PACKED_FP8 q_output, k_output; +#pragma unroll + for (int i = 0; i < NUM_PACKS; i++) { + q_output.array[i] = convert_vec(q.array[i]); + k_output.array[i] = convert_vec(k.array[i]); + } + *reinterpret_cast(¶m.q_buf[dest_idx]) = q_output; + *reinterpret_cast(¶m.k_buf[dest_idx]) = k_output; + + ARRAY_BF16 v_val = *reinterpret_cast(&v); +#pragma unroll + for (int i = 0; i < ELEMENT_PER_THREAD; i++) { + sdata[threadIdx.y * 33 * ELEMENT_PER_THREAD + (threadIdx.x * ELEMENT_PER_THREAD + i)] = (T1)v_val.array[i]; + } + } + + __syncthreads(); + + const int trans_size_per_head_idx = threadIdx.y + blockIdx.x * blockDim.x; + const int trans_seq_idx = threadIdx.x + blockIdx.y * blockDim.y; + if (trans_size_per_head_idx * ELEMENT_PER_THREAD < param.size_per_head && trans_seq_idx < param.seq_len_padded) { +#pragma unroll + for (int i = 0; i < ELEMENT_PER_THREAD; i++) { + param.v_buf[v_dest_idx_0 + (trans_size_per_head_idx * ELEMENT_PER_THREAD + i) * param.seq_len_padded + + trans_seq_idx] = + sdata[threadIdx.x * 33 * ELEMENT_PER_THREAD + threadIdx.y * ELEMENT_PER_THREAD + i]; + } + } +} + +template +void invokeFP8AddFusedQKVBiasRebuildPadding(FP8AddFusedQKVBiasRebuildPaddingParam param) +{ + // To implement rotary embeddings, each thread processes two QKV elems: + // dim3 block((param.size_per_head / 2 + 31) / 32 * 32); + // dim3 grid(param.head_num, param.token_num); + const int pack_size = 4; + FT_CHECK(param.size_per_head % pack_size == 0); + dim3 block(32, 32); + dim3 grid((param.size_per_head / pack_size + 31) / 32, + (param.seq_len_padded + 31) / 32, + param.head_num * param.batch_size); + // FT_CHECK(block.x * block.y <= 1024); + // shared memory configuration + const int carveout = 50; // prefer shared memory capacity 50% of maximum + if (param.QKV_T1 == nullptr) { + assert(param.QKV_T2 != nullptr); + cudaFuncSetAttribute((const void*)FP8AddFusedQKVBiasRebuildPaddingKernel, + cudaFuncAttributePreferredSharedMemoryCarveout, + carveout); + FP8AddFusedQKVBiasRebuildPaddingKernel<<>>(param); + } + else { + cudaFuncSetAttribute((const void*)FP8AddFusedQKVBiasRebuildPaddingKernel, + cudaFuncAttributePreferredSharedMemoryCarveout, + carveout); + FP8AddFusedQKVBiasRebuildPaddingKernel<<>>(param); + } +} + +template void invokeFP8AddFusedQKVBiasRebuildPadding<__nv_fp8_e4m3, __nv_fp8_e4m3>( + FP8AddFusedQKVBiasRebuildPaddingParam<__nv_fp8_e4m3, __nv_fp8_e4m3> param); +template void invokeFP8AddFusedQKVBiasRebuildPadding<__nv_fp8_e4m3, half>( + FP8AddFusedQKVBiasRebuildPaddingParam<__nv_fp8_e4m3, half> param); +template void invokeFP8AddFusedQKVBiasRebuildPadding<__nv_fp8_e4m3, __nv_bfloat16>( + FP8AddFusedQKVBiasRebuildPaddingParam<__nv_fp8_e4m3, __nv_bfloat16> param); + +#endif + +template +__global__ void FP8TrtAddQKVBiasKernel(FP8TrtAddQKVBiasParam param) +{ + // Add bias ([3, head, size]), and then transpose from + // [valid_word_num, 3, head, size] -> [valid_word_num, head, 3, size] + + const T1* qkv_src_ptr = param.qkv_src + blockIdx.x * 3 * param.hidden_unit; + const T2* bias_ptr = param.qkv_bias; + T1* qkv_tgt_ptr = param.qkv_tgt + blockIdx.x * 3 * param.hidden_unit; + + qkv_tgt_ptr[threadIdx.x * 3 * param.size_per_head + blockIdx.y * param.size_per_head + threadIdx.y] = + (T1)(((float)qkv_src_ptr[blockIdx.y * param.hidden_unit + threadIdx.x * param.size_per_head + threadIdx.y] + * __ldg(param.input_scale) + + (float)bias_ptr[blockIdx.y * param.hidden_unit + threadIdx.x * param.size_per_head + threadIdx.y]) + * __ldg(param.output_scale)); +} + +template<> +__global__ void FP8TrtAddQKVBiasKernel(FP8TrtAddQKVBiasParam<__nv_fp8_e4m3, __nv_bfloat16> param) +{ + // Add bias ([3, head, size]), and then transpose from + // [valid_word_num, 3, head, size] -> [valid_word_num, head, 3, size] + + using T1_4 = __nv_fp8x4_e4m3; + using T2_2 = typename TypeConverter<__nv_bfloat16>::Type; + + const T1_4* qkv_src_ptr = (T1_4*)(param.qkv_src + blockIdx.x * 3 * param.hidden_unit); + const T2_2* bias_ptr = (T2_2*)param.qkv_bias; + T1_4* qkv_tgt_ptr = (T1_4*)(param.qkv_tgt + blockIdx.x * 3 * param.hidden_unit); + + const int size_div_4 = param.size_per_head / 4; + const int hidden_div_4 = param.hidden_unit / 4; + const int src_id = threadIdx.z * hidden_div_4 + threadIdx.y * size_div_4 + threadIdx.x; + + T2_2 val1, val2; + fp8x4_e4m3_to_bfloat2(&val1, &val2, &qkv_src_ptr[src_id]); + T2_2 input_scale_2 = cuda_cast(__ldg(param.input_scale)); + T2_2 output_scale_2 = cuda_cast(__ldg(param.output_scale)); + const int bias_id_0 = src_id * 2; + val1 = hmul2(hadd2(hmul2(val1, input_scale_2), bias_ptr[bias_id_0]), output_scale_2); + val2 = hmul2(hadd2(hmul2(val2, input_scale_2), bias_ptr[bias_id_0 + 1]), output_scale_2); + + qkv_tgt_ptr[(threadIdx.y * 3 * size_div_4 + threadIdx.z * size_div_4) + threadIdx.x] = __nv_fp8x4_e4m3(val1, val2); +} + +template +void invokeFP8TrtAddQKVBias(FP8TrtAddQKVBiasParam param) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + if (std::is_same::value && std::is_same::value) { + dim3 grid(param.valid_word_num); + dim3 block(param.size_per_head / 4, param.head_num, 3); + FP8TrtAddQKVBiasKernel<<>>(param); + } + else { + dim3 grid(param.valid_word_num, 3); + dim3 block(param.head_num, param.size_per_head); + + FP8TrtAddQKVBiasKernel<<>>(param); + } +} + +#ifdef ENABLE_FP8 +template void +invokeFP8TrtAddQKVBias<__nv_fp8_e4m3, __nv_bfloat16>(FP8TrtAddQKVBiasParam<__nv_fp8_e4m3, __nv_bfloat16> param); +#endif + +template +__global__ void transpose_4d_batch_major_k_cache(T2* k_dst, + const T1* k_src, + const float* scale, + const int head_num, + const int size_per_head, + const int seq_len, + const int max_seq_len, + const int seq_len_padded) +{ + const int batch_id = blockIdx.y; + const int head_id = blockIdx.z; + constexpr int X_ELEMS = 16; + + auto key_src = reinterpret_cast(k_src + batch_id * head_num * size_per_head * seq_len_padded + + head_id * size_per_head * seq_len_padded); + auto key_dst = reinterpret_cast(k_dst + batch_id * head_num * size_per_head * max_seq_len + + head_id * size_per_head * max_seq_len); + + const int out_idx = blockIdx.x * blockDim.x + threadIdx.x; + int size_per_head_div_x = size_per_head / X_ELEMS; + if (out_idx >= size_per_head_div_x * max_seq_len) { + return; + } + + int idx = out_idx; + const int k_seq_len_id = idx % max_seq_len; + idx = (idx - k_seq_len_id) / max_seq_len; + const int k_head_size_id = idx % size_per_head_div_x; + + if (k_seq_len_id < seq_len) { + key_dst[out_idx] = key_src[k_seq_len_id * size_per_head_div_x + k_head_size_id]; + } +} + +template<> +__global__ void transpose_4d_batch_major_k_cache(__nv_bfloat16* k_dst, + const __nv_fp8_e4m3* k_src, + const float* scale, + const int head_num, + const int size_per_head, + const int seq_len, + const int max_seq_len, + const int seq_len_padded) +{ + const int batch_id = blockIdx.y; + const int head_id = blockIdx.z; + constexpr int X_ELEMS = 8; + const float scale_val = scale[0]; + using fp8_8 = __nv_fp8_8_e4m3; + using bf16_8 = __nv_bfloat168; + + auto key_src = reinterpret_cast(k_src + batch_id * head_num * size_per_head * seq_len_padded + + head_id * size_per_head * seq_len_padded); + auto key_dst = reinterpret_cast(k_dst + batch_id * head_num * size_per_head * max_seq_len + + head_id * size_per_head * max_seq_len); + + const int out_idx = blockIdx.x * blockDim.x + threadIdx.x; + int size_per_head_div_x = size_per_head / X_ELEMS; + if (out_idx >= size_per_head_div_x * max_seq_len) { + return; + } + + int idx = out_idx; + const int k_seq_len_id = idx % max_seq_len; + idx = (idx - k_seq_len_id) / max_seq_len; + const int k_head_size_id = idx % size_per_head_div_x; + + if (k_seq_len_id < seq_len) { + fp8_8 src_val = key_src[k_seq_len_id * size_per_head_div_x + k_head_size_id]; + bf16_8 dst_val; +#pragma unroll + for (int i = 0; i < X_ELEMS; i++) { + dst_val.array[i] = __float2bfloat16_rn((float)src_val.array[i] * scale_val); + } + key_dst[out_idx] = dst_val; + } +} + +template +__global__ void transpose_4d_batch_major_v_cache(T2* v_dst, + const T1* v_src, + const float* scale, + const int head_num, + const int size_per_head, + const int seq_len, + const int max_seq_len, + const int seq_len_padded) +{ + const int batch_id = blockIdx.y; + const int head_id = blockIdx.z; + constexpr bool BF16_OUTPUT = std::is_same::value; + float scale_val = BF16_OUTPUT ? scale[0] : 1.0f; + + // 16 byte loads will handle "x" dimension + // NOTE: need transpose, so cannot take x dimension + auto val_src = reinterpret_cast(v_src + batch_id * head_num * size_per_head * seq_len_padded + + head_id * size_per_head * seq_len_padded); + auto val_dst = reinterpret_cast(v_dst + batch_id * head_num * size_per_head * max_seq_len + + head_id * size_per_head * max_seq_len); + + // idx is over output dimension L * size_per_head / x for values + const int idx = blockIdx.x * blockDim.x + threadIdx.x; + + if (idx >= size_per_head * seq_len) + return; + + int seq_idx = idx / size_per_head; + int head_size_idx = idx % size_per_head; + val_dst[idx] = (T2)((float)val_src[head_size_idx * seq_len_padded + seq_idx] * scale_val); +} + +// template +// __global__ void transpose_4d_batch_major_v_cache(T2* v_dst, +// const T1* v_src, +// const float* scale, +// const int head_num, +// const int size_per_head, +// const int seq_len, +// const int max_seq_len, +// const int seq_len_padded) +// { +// const int batch_id = blockIdx.z / head_num; +// const int head_id = blockIdx.z % head_num; +// constexpr bool BF16_OUTPUT = std::is_same::value; +// float scale_val = BF16_OUTPUT ? scale[0] : 1.0f; +// __shared__ T2 s_transpose_buffer[32][33]; + +// // 16 byte loads will handle "x" dimension +// // NOTE: need transpose, so cannot take x dimension +// auto val_src = reinterpret_cast(v_src + batch_id * head_num * size_per_head * seq_len_padded +// + head_id * size_per_head * seq_len_padded); +// auto val_dst = reinterpret_cast(v_dst + batch_id * head_num * size_per_head * max_seq_len +// + head_id * size_per_head * max_seq_len); + +// // idx is over output dimension L * size_per_head / x for values +// for (int y_block_id = 0; y_block_id * blockDim.x < size_per_head; y_block_id ++) { +// for (int x_block_id = 0; x_block_id * blockDim.x < seq_len; x_block_id ++) { +// int seq_block_id = threadIdx.x + blockDim.x * x_block_id; +// int head_size_id = threadIdx.y + blockDim.y * y_block_id; +// if (seq_block_id < seq_len && head_size_id < size_per_head) { +// s_transpose_buffer[threadIdx.y][threadIdx.x] = (T2) ((float) val_src[head_size_id * seq_len_padded + +// seq_block_id] * scale_val); +// } +// __syncthreads(); +// int transposed_head_size_id = threadIdx.x + blockDim.y * y_block_id; +// int transposed_seq_block_id = threadIdx.y + blockDim.x * x_block_id; +// if (transposed_head_size_id < size_per_head && transposed_seq_block_id < seq_len) { +// val_dst[transposed_seq_block_id * size_per_head + transposed_head_size_id] = +// s_transpose_buffer[threadIdx.x][threadIdx.y]; +// } +// } +// } +// } + +template +void invokeFP8Transpose4dBatchMajor(FP8Transpose4dBatchMajorParam param) +{ + constexpr int block_sz = 128; + constexpr int x = std::is_same::value ? 8 : 16; + int size = param.max_seq_len * param.size_per_head / x; + dim3 grid((size + block_sz - 1) / block_sz, param.local_batch_size, param.local_head_num); + dim3 grid_v( + (param.seq_len * param.size_per_head + block_sz - 1) / block_sz, param.local_batch_size, param.local_head_num); + + transpose_4d_batch_major_k_cache<<>>(param.k_dst, + param.k_src, + param.scale, + param.local_head_num, + param.size_per_head, + param.seq_len, + param.max_seq_len, + param.seq_len_padded); + + // transpose_4d_batch_major_v_cache<<>>(param.v_dst, + // param.v_src, + // param.scale, + // param.local_head_num, + // param.size_per_head, + // param.seq_len, + // param.max_seq_len, + // param.seq_len_padded); +} + +template void invokeFP8Transpose4dBatchMajor<__nv_fp8_e4m3, __nv_fp8_e4m3>( + FP8Transpose4dBatchMajorParam<__nv_fp8_e4m3, __nv_fp8_e4m3> param); +template void invokeFP8Transpose4dBatchMajor<__nv_fp8_e4m3, __nv_bfloat16>( + FP8Transpose4dBatchMajorParam<__nv_fp8_e4m3, __nv_bfloat16> param); + +template +__global__ void softmax_kernel(T* qk_buf_, + const T_IN* __restrict__ qk_buf_src, + const T* __restrict__ attr_mask, + const int batch_size, + const int head_num, + const int seq_len, + const float scalar, + const float* input_scale, + const float* output_scale) +{ + float input_scale_val = input_scale == nullptr ? 1.0f : __ldg(input_scale); + float output_scale_val = output_scale == nullptr ? 1.0f : __ldg(output_scale); + for (int seq_id = blockIdx.x; seq_id < seq_len; seq_id += gridDim.x) { + float data[ITEMS_PER_THREAD]; + int qk_offset; + __shared__ float s_mean, s_max; + float local_max = -1e20f; + for (int i = 0; blockDim.x * i + threadIdx.x < seq_len; i++) { + qk_offset = + ((blockIdx.y * head_num + blockIdx.z) * seq_len + seq_id) * seq_len + blockDim.x * i + threadIdx.x; + int mask_offset = (blockIdx.y * seq_len + seq_id) * seq_len + blockDim.x * i + threadIdx.x; + + float qk = static_cast(qk_buf_src[qk_offset]) * input_scale_val; + float mask_val = static_cast(attr_mask[mask_offset]); + + mask_val = (1.0f - mask_val) * -10000.0f; + + data[i] = qk * static_cast(scalar) + mask_val; + local_max = fmax(local_max, data[i]); + } + + float max_val = blockDim.x <= 32 ? warpReduceMax(local_max) : blockReduceMax(local_max); + if (threadIdx.x == 0) { + s_max = max_val; + } + __syncthreads(); + + float local_sum = 0; + for (int i = 0; blockDim.x * i + threadIdx.x < seq_len; i++) { + data[i] = __expf(data[i] - s_max); + local_sum += data[i]; + } + float sum_val = blockDim.x <= 32 ? warpReduceSum(local_sum) : blockReduceSum(local_sum); + if (threadIdx.x == 0) { + s_mean = sum_val + 1e-6f; + s_mean = __fdividef(1.0f, s_mean); + } + __syncthreads(); + + for (int i = 0; blockDim.x * i + threadIdx.x < seq_len; i++) { + qk_offset = + ((blockIdx.y * head_num + blockIdx.z) * seq_len + seq_id) * seq_len + blockDim.x * i + threadIdx.x; + qk_buf_[qk_offset] = (T)(data[i] * s_mean * output_scale_val); + } + } +} + +template +__global__ void softmax_kernel_v5_half2(T_OUT* qk_buf, + const T_IN* qk_buf_src, + const T_OUT* attr_mask, + const int* padding_offset_prefix_sum, + const int batch_size, + const int head_num, + const int seq_len, + const float scalar, + const float* input_scale, + const float* output_scale) +{ + using T2_OUT = typename Vec_t::Type; + using T2_IN = typename Vec_t::Type; + using T2_COMPUTE = typename Vec_t::Type; + + T2_OUT* qk_buf_out2 = (T2_OUT*)qk_buf; + const T2_OUT* attr_mask_half2 = (const T2_OUT*)attr_mask; + T2_IN* qk_buf_in2 = (T2_IN*)qk_buf_src; + + T2_COMPUTE input_scale_2 = cuda_cast(input_scale == nullptr ? 1.0f : __ldg(input_scale)); + T2_COMPUTE output_scale_2 = cuda_cast(output_scale == nullptr ? 1.0f : __ldg(output_scale)); + + for (int seq_id = blockIdx.x; seq_id < seq_len; seq_id += gridDim.x * NUM) { + if ((padding_offset_prefix_sum != nullptr) + && (seq_id >= padding_offset_prefix_sum[blockIdx.y + 1] - padding_offset_prefix_sum[blockIdx.y])) { + + T2_COMPUTE zero_val; + zero_val.x = 0.0f; + zero_val.y = 0.0f; + const int offset = (blockIdx.y * head_num * seq_len + blockIdx.z * seq_len + seq_id) * seq_len / 2; + for (int i = 0; blockDim.x * i + threadIdx.x < (seq_len / 2); i++) { + qk_buf_out2[offset + i] = T2_OUT(zero_val); + } + continue; + } + + T2_COMPUTE data[NUM][ITEMS_PER_THREAD]; + + int qk_offset[NUM]; + + __shared__ float s_sum[NUM], s_max[NUM]; + float local_max[NUM]; +#pragma unroll + for (int j = 0; j < NUM; j++) { + local_max[j] = -1e20f; + } + + for (int i = 0; blockDim.x * i + threadIdx.x < (seq_len / 2) && i < ITEMS_PER_THREAD; i++) { +#pragma unroll + for (int j = 0; j < NUM; j++) { + qk_offset[j] = ((blockIdx.y * head_num + blockIdx.z) * seq_len + seq_id + j * gridDim.x) * (seq_len / 2) + + blockDim.x * i + threadIdx.x; + } + + T2_COMPUTE mask_val[NUM]; +#pragma unroll + for (int j = 0; j < NUM; j++) { + const int mask_offset = + (blockIdx.y * seq_len + seq_id + j * gridDim.x) * (seq_len / 2) + blockDim.x * i + threadIdx.x; + mask_val[j] = cuda_cast(attr_mask_half2[mask_offset]); + } + + T2_COMPUTE qk[NUM]; +#pragma unroll + for (int j = 0; j < NUM; j++) { + qk[j] = hmul2(cuda_cast(qk_buf_in2[qk_offset[j]]), input_scale_2); + } + +#pragma unroll + for (int j = 0; j < NUM; j++) { + mask_val[j] = hmul2(hsub2(cuda_cast(1.0f), mask_val[j]), + cuda_cast(-10000.0f)); + } + +#pragma unroll + for (int j = 0; j < NUM; j++) { + data[j][i] = hadd2(hmul2(qk[j], cuda_cast(scalar)), mask_val[j]); + local_max[j] = fmax(local_max[j], fmax((float)data[j][i].x, (float)data[j][i].y)); + } + } + if (blockDim.x <= 32) { + warpReduceMaxV2(local_max); + } + else { + blockReduceMaxV2(local_max); + } + + if (threadIdx.x == 0) { +#pragma unroll + for (int j = 0; j < NUM; j++) { + s_max[j] = local_max[j]; + } + } + __syncthreads(); + + float local_sum[NUM]; +#pragma unroll + for (int j = 0; j < NUM; j++) { + local_sum[j] = {0.f}; + } + + for (int i = 0; blockDim.x * i + threadIdx.x < (seq_len / 2) && i < ITEMS_PER_THREAD; i++) { +#pragma unroll + for (int j = 0; j < NUM; j++) { + data[j][i] = hexp2(hsub2(data[j][i], cuda_cast(s_max[j]))); + } + +#pragma unroll + for (int j = 0; j < NUM; j++) { + local_sum[j] += (float)(data[j][i].x + data[j][i].y); + } + } + + if (blockDim.x <= 32) { + warpReduceSumV2(local_sum); + } + else { + blockReduceSumV2(local_sum); + } + + if (threadIdx.x == 0) { +#pragma unroll + for (int j = 0; j < NUM; j++) { + s_sum[j] = __fdividef(1.0f, local_sum[j] + 1e-6f); + } + } + __syncthreads(); + + for (int i = 0; blockDim.x * i + threadIdx.x < (seq_len / 2) && i < ITEMS_PER_THREAD; i++) { +#pragma unroll + for (int j = 0; j < NUM; j++) { + qk_offset[j] = ((blockIdx.y * head_num + blockIdx.z) * seq_len + seq_id + j * gridDim.x) * (seq_len / 2) + + blockDim.x * i + threadIdx.x; + } + +#pragma unroll + for (int j = 0; j < NUM; j++) { + qk_buf_out2[qk_offset[j]] = T2_OUT( + hmul2(hmul2(data[j][i], cuda_cast(s_sum[j])), output_scale_2)); + } + } + } +} + +#define SOFTMAX_KERNEL_HALF2(ITEMS_PER_THREAD) \ + block.x /= ITEMS_PER_THREAD; \ + assert(block.x <= 1024); \ + grid.x /= 4; \ + softmax_kernel_v5_half2 \ + <<>>((T*)param.buffer, \ + (T_IN*)param.buffer_src, \ + (const T*)param.attr_mask, \ + param.padding_offset_prefix_sum, \ + param.batch_size, \ + param.head_num, \ + param.seq_len, \ + param.scalar, \ + param.input_scale, \ + param.output_scale); + +template +void invokeFP8MaskedSoftMax(FP8MaskedSoftMaxParam param) +{ + dim3 grid(param.seq_len, param.batch_size, param.head_num); + if (param.batch_size * param.head_num > 360) { + grid.x = ceil(float(param.seq_len) / 32.0f); + } + + bool is_half2 = sizeof(T) == 1 && sizeof(T_IN) == 2 && param.seq_len % 2 == 0; + + if (is_half2 && grid.x % 4 == 0) { + dim3 block((param.seq_len / (is_half2 ? 2 : 1) + 31) / 32 * 32); + if (block.x > 2048 && block.x <= 4096) { + SOFTMAX_KERNEL_HALF2(4) + } + else if (block.x > 1024) { + SOFTMAX_KERNEL_HALF2(2) + } + else if (block.x > 0) { + SOFTMAX_KERNEL_HALF2(1) + } + else { + FT_CHECK(param.seq_len <= 4096); + } + } + else { + dim3 block((param.seq_len + 31) / 32 * 32); + if (block.x > 2048 && block.x <= 4096) { + softmax_kernel<4, T, T_IN><<>>(param.buffer, + param.buffer_src, + param.attr_mask, + param.batch_size, + param.head_num, + param.seq_len, + param.scalar, + param.input_scale, + param.output_scale); + } + else if (block.x > 1024) { + softmax_kernel<2, T, T_IN><<>>(param.buffer, + param.buffer_src, + param.attr_mask, + param.batch_size, + param.head_num, + param.seq_len, + param.scalar, + param.input_scale, + param.output_scale); + } + else if (block.x > 0) { + softmax_kernel<1, T, T_IN><<>>(param.buffer, + param.buffer_src, + param.attr_mask, + param.batch_size, + param.head_num, + param.seq_len, + param.scalar, + param.input_scale, + param.output_scale); + } + else { + FT_CHECK(param.seq_len <= 4096); + } + } +} + +template void +invokeFP8MaskedSoftMax<__nv_fp8_e4m3, __nv_fp8_e4m3>(FP8MaskedSoftMaxParam<__nv_fp8_e4m3, __nv_fp8_e4m3> param); + +template void invokeFP8MaskedSoftMax<__nv_fp8_e4m3, float>(FP8MaskedSoftMaxParam<__nv_fp8_e4m3, float> param); + +template void +invokeFP8MaskedSoftMax<__nv_fp8_e4m3, __nv_bfloat16>(FP8MaskedSoftMaxParam<__nv_fp8_e4m3, __nv_bfloat16> param); + +template +struct Pack4_type { + using type = __nv_bfloat164; +}; + +template<> +struct Pack4_type<__nv_fp8_e4m3> { + using type = __nv_fp8_4_e4m3; +}; + +template +__global__ void FP8TransposeAttentionOutRemovePadding(T_OUT* dst, + const T_IN* src, + const float* scale_ptr, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const int* padding_offset) +{ + // transpose from [batch_size, head_num, seq_len, size_per_head] to [batch_size, seq_len, head_num, size_per_head] + using pack4_in = typename Pack4_type::type; + using pack4_out = typename Pack4_type::type; + constexpr int pack_size = 4; + const int padded_row_id = blockIdx.x + (padding_offset == nullptr ? 0 : padding_offset[blockIdx.x]); + const int src_batch_id = padded_row_id / seq_len; + const int src_seq_id = padded_row_id % seq_len; + const pack4_in* src_packed = reinterpret_cast(src); + pack4_out* dst_packed = reinterpret_cast(dst); + + const float scale = (scale_ptr == nullptr) ? 1.0f : scale_ptr[0]; + + for (int idx = threadIdx.x; idx < head_num * size_per_head; idx += blockDim.x) { + const int head_id = idx / size_per_head; + const int hidden_id = idx % size_per_head; + pack4_out out_val; +#pragma unroll + for (int i = 0; i < pack_size; i++) { + // TODO: bfloat162 computation ? + out_val.array[i] = + (T_OUT)((float)(src_packed[src_batch_id * head_num * seq_len * size_per_head + + head_id * seq_len * size_per_head + src_seq_id * size_per_head + hidden_id] + .array[i]) + * scale); + } + dst_packed[blockIdx.x * head_num * size_per_head + idx] = out_val; + } +} + +template +void invokeFP8TransposeAttentionOutRemovePadding(FP8TransposeAttentionOutRemovePaddingParam param) +{ + // NOTE: fp8_4_t optimization + assert(param.size_per_head % 4 == 0); + int block_size = param.head_num * param.size_per_head; + block_size = std::min(block_size, 512); + FP8TransposeAttentionOutRemovePadding<<>>((T_OUT*)param.dst, + (const T_IN*)param.src, + param.scale, + param.batch_size, + param.seq_len, + param.head_num, + param.size_per_head + / 4, + param.padding_offset); + // if (std::is_same::value && std::is_same::value) { + // int block_size = param.head_num * (param.size_per_head); + // block_size = std::min(block_size, 512); + // FP8TransposeAttentionOutRemovePadding<<>>( + // (__nv_fp8_e4m3*)param.dst, + // (__nv_fp8_e4m3*)param.src, + // (const float*) nullptr, + // param.batch_size, + // param.seq_len, + // param.head_num, + // param.size_per_head / 4, + // param.padding_offset); + // } + // else { + // int block_size = param.head_num * param.size_per_head; + // block_size = std::min(block_size, 512); + // FP8TransposeAttentionOutRemovePadding<<>>( + // (T_OUT*) param.dst, + // (const T_IN*) param.src, + // param.scale, + // param.batch_size, + // param.seq_len, + // param.head_num, + // param.size_per_head, + // param.padding_offset); + // } +} + +template void invokeFP8TransposeAttentionOutRemovePadding<__nv_fp8_e4m3, __nv_fp8_e4m3>( + FP8TransposeAttentionOutRemovePaddingParam<__nv_fp8_e4m3, __nv_fp8_e4m3> param); + +template void invokeFP8TransposeAttentionOutRemovePadding<__nv_bfloat16, __nv_fp8_e4m3>( + FP8TransposeAttentionOutRemovePaddingParam<__nv_bfloat16, __nv_fp8_e4m3> param); + +__global__ void tmpHanldKCache(__nv_bfloat16* dst_k, + __nv_fp8_e4m3* src_k, + const float* scale, + int batch_size, + int seq_len, + int padded_seq_len, + int head_num, + int size_per_head) +{ + int batch_id = blockIdx.y; + int head_id = blockIdx.z; + + __nv_bfloat16* dst_k_ptr = + dst_k + batch_id * head_num * seq_len * size_per_head + head_id * seq_len * size_per_head; + __nv_fp8_e4m3* src_k_ptr = + src_k + batch_id * head_num * padded_seq_len * size_per_head + head_id * padded_seq_len * size_per_head; + + int idx = blockIdx.x * blockDim.x + threadIdx.x; + if (idx >= seq_len * size_per_head) { + return; + } + + float scale_val = scale == nullptr ? 1.0 : __ldg(scale); + int out_idx = idx; + dst_k_ptr[out_idx] = (__nv_bfloat16)((float)(src_k_ptr[out_idx]) * scale_val); +} + +void invokeTmpHanldKCache(__nv_bfloat16* dst_k, + __nv_fp8_e4m3* src_k, + const float* scale, + int batch_size, + int seq_len, + int padded_seq_len, + int head_num, + int size_per_head, + cudaStream_t stream) +{ + // from [batch, head_num, seq_len_paaded, size_per_head] to [batch, head_num, seq_len, size_per_head] + + int block_sz = 128; + dim3 grid((seq_len * size_per_head + block_sz - 1) / block_sz, batch_size, head_num); + + tmpHanldKCache<<>>( + dst_k, src_k, scale, batch_size, seq_len, padded_seq_len, head_num, size_per_head); +} + +__global__ void tmpHanldVCache(__nv_bfloat16* dst_v, + __nv_fp8_e4m3* src_v, + const float* scale, + int batch_size, + int seq_len, + int padded_seq_len, + int head_num, + int size_per_head) +{ + int batch_id = blockIdx.y; + int head_id = blockIdx.z; + + __nv_bfloat16* dst_v_ptr = + dst_v + batch_id * head_num * seq_len * size_per_head + head_id * seq_len * size_per_head; + __nv_fp8_e4m3* src_v_ptr = + src_v + batch_id * head_num * padded_seq_len * size_per_head + head_id * padded_seq_len * size_per_head; + + int idx = blockIdx.x * blockDim.x + threadIdx.x; + if (idx >= seq_len * size_per_head) { + return; + } + + float scale_val = scale == nullptr ? 1.0 : __ldg(scale); + int out_idx = idx; + int seq_idx = idx / size_per_head; + int head_size_idx = idx % size_per_head; + dst_v_ptr[out_idx] = (__nv_bfloat16)((float)(src_v_ptr[head_size_idx * padded_seq_len + seq_idx]) * scale_val); +} + +void invokeTmpHanldVCache(__nv_bfloat16* dst_v, + __nv_fp8_e4m3* src_v, + const float* scale, + int batch_size, + int seq_len, + int padded_seq_len, + int head_num, + int size_per_head, + cudaStream_t stream) +{ + // from [batch, head_num, size_per_head, seq_len_paaded] to [batch, head_num, seq_len, size_per_head] + int block_sz = 128; + dim3 grid((seq_len * size_per_head + block_sz - 1) / block_sz, batch_size, head_num); + + tmpHanldVCache<<>>( + dst_v, src_v, scale, batch_size, seq_len, padded_seq_len, head_num, size_per_head); +} + +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/unfused_attention_fp8_kernels.h b/src/fastertransformer/kernels/unfused_attention_fp8_kernels.h new file mode 100644 index 000000000..4a068c92c --- /dev/null +++ b/src/fastertransformer/kernels/unfused_attention_fp8_kernels.h @@ -0,0 +1,169 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#pragma once + +#include "src/fastertransformer/utils/cuda_fp8_utils.h" +#include +#include + +namespace fastertransformer { + +template +struct FP8AddFusedQKVBiasRebuildPaddingParam { + T1* q_buf; + T1* k_buf; + T1* v_buf; + T1* QKV_T1; + T2* QKV_T2; + const T2* qkv_bias; + const float* input_scale; + const float* input_scale_2; // TODO(bhsueh) remove this param + const float* input_scale_2_min; // TODO(bhsueh) remove this param + const float* output_scale; + const int* padding_offset; // TODO(bhsueh) remove this param + const int* padding_offset_prefix_sum; + +#ifdef FP8_MHA + T1* v_cache; +#else + T2* v_cache; +#endif + + const uint32_t token_num; // TODO(bhsueh) remove this param + const uint32_t batch_size; + const uint32_t seq_len; + const uint32_t seq_len_padded; + const uint32_t max_seq_len; + const uint32_t head_num; + const uint32_t size_per_head; + const uint32_t rotary_embedding_dim; + cudaStream_t stream; +}; + +template +void invokeFP8AddFusedQKVBiasRebuildPadding(FP8AddFusedQKVBiasRebuildPaddingParam param); + +template +struct FP8Transpose4dBatchMajorParam { + T2* k_dst; + T2* v_dst; + const T1* k_src; + const T1* v_src; + const float* scale; + const uint32_t local_batch_size; + const uint32_t seq_len; + const uint32_t max_seq_len; + const uint32_t size_per_head; + const uint32_t local_head_num; + const uint32_t seq_len_padded; + cudaStream_t stream; +}; + +template +void invokeFP8Transpose4dBatchMajor(FP8Transpose4dBatchMajorParam param); + +template +struct FP8MaskedSoftMaxParam { + T* buffer; + const T_IN* buffer_src; + const T* attr_mask; + const int* padding_offset_prefix_sum; + const uint32_t batch_size; + const uint32_t seq_len; + const uint32_t head_num; + const float scalar; + const float* input_scale; + const float* output_scale; + cudaStream_t stream; +}; + +template +void invokeFP8MaskedSoftMax(FP8MaskedSoftMaxParam param); + +template +struct FP8AddQKVBiasRebuildPaddingParam { + T1* q_buf; + T1* k_buf; + T1* v_buf; + const T1* QKV; + const T2* qkv_bias; + const int batch_size; + const int seq_len; + const int head_num; + const int size_per_head; + const int valid_word_num; + const int* mask_offset; + cudaStream_t stream; +}; + +template +void invokeFP8AddQKVBiasRebuildPadding(FP8AddQKVBiasRebuildPaddingParam param); + +template +struct FP8TrtAddQKVBiasParam { + T1* qkv_tgt; + const T1* qkv_src; + const T2* qkv_bias; + const float* input_scale; + const float* output_scale; + const size_t valid_word_num; + const size_t head_num; + const size_t size_per_head; + const size_t hidden_unit; + cudaStream_t stream; +}; + +template +void invokeFP8TrtAddQKVBias(FP8TrtAddQKVBiasParam param); + +template +struct FP8TransposeAttentionOutRemovePaddingParam { + T_OUT* dst; + const T_IN* src; + const float* scale; + const int valid_word_num; + const int batch_size; + const int seq_len; + const int head_num; + const int size_per_head; + const int* padding_offset; + cudaStream_t stream; +}; + +template +void invokeFP8TransposeAttentionOutRemovePadding(FP8TransposeAttentionOutRemovePaddingParam param); + +void invokeTmpHanldKCache(__nv_bfloat16* dst_k, + __nv_fp8_e4m3* src_k, + const float* scale, + int batch_size, + int seq_len, + int padded_seq_len, + int head_num, + int size_per_head, + cudaStream_t stream); + +void invokeTmpHanldVCache(__nv_bfloat16* dst_v, + __nv_fp8_e4m3* src_v, + const float* scale, + int batch_size, + int seq_len, + int padded_seq_len, + int head_num, + int size_per_head, + cudaStream_t stream); + +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/unfused_attention_fp8_kernels_test.cc b/src/fastertransformer/kernels/unfused_attention_fp8_kernels_test.cc new file mode 100644 index 000000000..4c0385354 --- /dev/null +++ b/src/fastertransformer/kernels/unfused_attention_fp8_kernels_test.cc @@ -0,0 +1,384 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/kernels/unfused_attention_fp8_kernels.h" +#include "src/fastertransformer/kernels/unfused_attention_kernels.h" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" +#include "src/fastertransformer/utils/gpu_buf.h" +#include "src/fastertransformer/utils/memory_utils.h" +#include "src/fastertransformer/utils/test_utils.h" + +#include +#include +#include +#include +#include +#include +#include +#include + +using namespace fastertransformer; + +typedef struct { + int batch_size; + int head_num; + int max_seq_len; + int seq_len; + int size_per_head; + int rotary_embedding_dim; +} test_args_t; + +/* + * test FP8Transpose4dBatchMajor + * input: k/v cache buffers, shape [B, H, L, Dh] + * output: k/v cache buffers, shape [B, H, Dh/x, L, x], [B, H, L, Dh/x, x], respectively + */ +bool test_fp8_transpose_4d_batch_major(const test_args_t& test_args) +{ + const size_t n_elems_dst = + test_args.batch_size * test_args.head_num * test_args.max_seq_len * test_args.size_per_head; + const size_t n_elems_src = test_args.batch_size * test_args.head_num * test_args.seq_len * test_args.size_per_head; + + GPUBuf<__nv_fp8_e4m3> d_fp8_k_cache_src(n_elems_src, true); + GPUBuf<__nv_fp8_e4m3> d_fp8_v_cache_src(n_elems_src, true); + + /* Ref with FP8->FP32 */ + GPUBuf d_fp32_k_cache_src(d_fp8_k_cache_src); + GPUBuf d_fp32_v_cache_src(d_fp8_v_cache_src); + + auto k_cache_src = d_fp32_k_cache_src.to_host_vec(); + auto v_cache_src = d_fp32_v_cache_src.to_host_vec(); + + /* Test with transpose4dBatchMajor, FP8->FP32 */ + GPUBuf<__nv_fp8_e4m3> d_fp8_k_cache_dst(n_elems_dst, false); + GPUBuf<__nv_fp8_e4m3> d_fp8_v_cache_dst(n_elems_dst, false); + + FP8Transpose4dBatchMajorParam<__nv_fp8_e4m3, __nv_fp8_e4m3> fp8_args{ + d_fp8_k_cache_dst.ptr, + d_fp8_v_cache_dst.ptr, + d_fp8_k_cache_src.ptr, + d_fp8_v_cache_src.ptr, + (const float*)nullptr, + (uint32_t)test_args.batch_size, + (uint32_t)test_args.seq_len, + (uint32_t)test_args.max_seq_len, + (uint32_t)test_args.size_per_head, + (uint32_t)test_args.head_num, + (uint32_t)test_args.seq_len, + 0, + }; + invokeFP8Transpose4dBatchMajor(fp8_args); + + GPUBuf d_fp32_k_cache_test(d_fp8_k_cache_dst); + GPUBuf d_fp32_v_cache_test(d_fp8_v_cache_dst); + + sync_check_cuda_error(); + + auto k_cache_test = d_fp32_k_cache_test.to_host_vec(); + auto v_cache_test = d_fp32_v_cache_test.to_host_vec(); + + const int contig_elems = sizeof(uint4) / sizeof(__nv_fp8_e4m3); + bool error = false; + for (int bs = 0; bs < test_args.batch_size; bs++) { + for (int head = 0; head < test_args.head_num; head++) { + for (int seq = 0; seq < test_args.seq_len; seq++) { + for (int h_dim_div = 0; h_dim_div < test_args.size_per_head / contig_elems; h_dim_div++) { + for (int x = 0; x < contig_elems; x++) { + const float k_src = + k_cache_src[bs * test_args.head_num * test_args.seq_len * test_args.size_per_head + + head * test_args.seq_len * test_args.size_per_head + + seq * test_args.size_per_head + h_dim_div * contig_elems + x]; + + const float k_test = + k_cache_test[bs * test_args.head_num * test_args.max_seq_len * test_args.size_per_head + + head * test_args.max_seq_len * test_args.size_per_head + + h_dim_div * test_args.max_seq_len * contig_elems + seq * contig_elems + x]; + + const float v_src = + v_cache_src[bs * test_args.head_num * test_args.seq_len * test_args.size_per_head + + head * test_args.seq_len * test_args.size_per_head + + seq * test_args.size_per_head + h_dim_div * contig_elems + x]; + + const float v_test = + v_cache_test[bs * test_args.head_num * test_args.max_seq_len * test_args.size_per_head + + head * test_args.max_seq_len * test_args.size_per_head + + seq * test_args.size_per_head + h_dim_div * contig_elems + x]; + + if (k_test != k_src || v_src != v_test) { + error = true; + } + } + } + } + } + } + + if (error) { + puts("[ERROR] test_fp8_transpose_4d_batch_major"); + } + + return !error; +} + +bool test_fp8_add_fused_QKV_bias_transpose(const test_args_t& test_args) +{ + constexpr float MAX_ALLOWED_ERROR = 0.015f; + + size_t B = test_args.batch_size; + size_t H = test_args.head_num; + size_t L = test_args.seq_len; + size_t Dh = test_args.size_per_head; + size_t n_elems = B * H * L * Dh; + + size_t R = test_args.rotary_embedding_dim; + + GPUBuf<__nv_fp8_e4m3> d_fp8_qkv(3 * n_elems, true); + GPUBuf<__nv_bfloat16> d_fp16_qkv_bias(3 * Dh * H, true); + + /* Reference implementation in fp32 */ + GPUBuf d_qkv(d_fp8_qkv); + GPUBuf d_qkv_bias(d_fp16_qkv_bias); + + GPUBuf d_q_ref(n_elems, false); + GPUBuf d_k_ref(n_elems, false); + GPUBuf d_v_ref(n_elems, false); + + invokeAddFusedQKVBiasTranspose( + d_q_ref.ptr, d_k_ref.ptr, d_v_ref.ptr, d_qkv.ptr, d_qkv_bias.ptr, nullptr, B, L, B * L, H, Dh, 0); + FT_CHECK_WITH_INFO(R == 0, "rotary_embedding != 0 is not supported now, it has some bugs."); + // invokeAddFusedQKVBiasTranspose(d_q_ref.ptr, d_k_ref.ptr, d_v_ref.ptr, {nullptr, nullptr, 0, 0}, d_qkv.ptr, + // d_qkv_bias.ptr, nullptr, B, L, B * L, H, Dh, R, 0, 0); + cudaDeviceSynchronize(); + check_cuda_error(cudaGetLastError()); + /* Test implementation in fp8 */ + GPUBuf<__nv_fp8_e4m3> d_fp8_q(n_elems, false); + GPUBuf<__nv_fp8_e4m3> d_fp8_k(n_elems, false); + GPUBuf<__nv_fp8_e4m3> d_fp8_v(n_elems, false); + GPUBuf scale_in(H * Dh); + GPUBuf scale_out(H * Dh); + deviceFill(scale_in.ptr, H * Dh, (float)1.0f); + deviceFill(scale_out.ptr, H * Dh, (float)1.0f); + + FP8AddFusedQKVBiasRebuildPaddingParam<__nv_fp8_e4m3, __nv_bfloat16> fused_qkv_bias_tr_args{d_fp8_q.ptr, + d_fp8_k.ptr, + d_fp8_v.ptr, + d_fp8_qkv.ptr, + nullptr, // T2 + d_fp16_qkv_bias.ptr, + scale_in.ptr, + nullptr, + nullptr, + scale_out.ptr, + nullptr, + nullptr, + nullptr, + (uint32_t)(B * L), + (uint32_t)B, + (uint32_t)L, + (uint32_t)L, + (uint32_t)L, + (uint32_t)H, + (uint32_t)Dh, + (uint32_t)R, + 0}; + invokeFP8AddFusedQKVBiasRebuildPadding(fused_qkv_bias_tr_args); + cudaDeviceSynchronize(); + check_cuda_error(cudaGetLastError()); + GPUBuf d_q_test(d_fp8_q); + GPUBuf d_k_test(d_fp8_k); + GPUBuf d_v_test(d_fp8_v); + + /* Retrieve data to CPU */ + auto q_ref = d_q_ref.to_host_vec(); + auto k_ref = d_k_ref.to_host_vec(); + auto v_ref = d_v_ref.to_host_vec(); + + auto q_test = d_q_test.to_host_vec(); + auto k_test = d_k_test.to_host_vec(); + auto v_test = d_v_test.to_host_vec(); + + sync_check_cuda_error(); + + /* Compare */ + std::transform(q_ref.begin(), q_ref.end(), q_test.begin(), q_ref.begin(), abs_diff()); + std::transform(k_ref.begin(), k_ref.end(), k_test.begin(), k_ref.begin(), abs_diff()); + std::transform(v_ref.begin(), v_ref.end(), v_test.begin(), v_ref.begin(), abs_diff()); + + const float q_error = *std::max_element(q_ref.begin(), q_ref.end()); + const float k_error = *std::max_element(k_ref.begin(), k_ref.end()); + // const float v_error = *std::max_element(v_ref.begin(), v_ref.end()); + const float v_error = 0.0f; // v is transpoed in fp8 kernel, ignore it here + + bool error = false; + + if (std::max(std::max(q_error, k_error), v_error) >= MAX_ALLOWED_ERROR) { + error = true; + printf("Max q_error = %.4f\n", q_error); + printf("Max k_error = %.4f\n", k_error); + printf("Max v_error = %.4f\n", v_error); + } + + if (error) { + puts("[ERROR] test_fp8_add_fused_QKV_bias_transpose"); + } + + return !error; +} + +bool test_fp8_masked_softmax(const test_args_t& test_args) +{ + constexpr float MAX_ALLOWED_ERROR = 0.05f; + const float coef = 1.0f; + const float in_scaling = 1.0f, out_scaling = 1.0f; + + size_t B = test_args.batch_size; + size_t H = test_args.head_num; + size_t L = test_args.seq_len; + size_t qk_n_elems = B * H * L * L; + size_t mask_n_elems = B * L * L; + + GPUBuf<__nv_fp8_e4m3> d_fp8_qk_src(qk_n_elems, true); + GPUBuf d_input_scales(1, true); + GPUBuf d_output_scales(1, true); + cudaH2Dcpy(d_input_scales.ptr, &in_scaling, 1); + cudaH2Dcpy(d_output_scales.ptr, &out_scaling, 1); + + /* Init mask in [0, 1] */ + GPUBuf d_mask(mask_n_elems, false); + std::vector mask(mask_n_elems); + auto generator = std::bind(std::uniform_real_distribution(0.0f, 1.0f), std::mt19937()); + std::generate_n(mask.begin(), mask_n_elems, generator); + cudaH2Dcpy(d_mask.ptr, mask.data(), mask_n_elems); + GPUBuf<__nv_fp8_e4m3> d_fp8_mask(d_mask); + + /* Reference implementation in fp32 */ + GPUBuf d_qk_src(d_fp8_qk_src); + GPUBuf d_qk_ref(qk_n_elems, false); + d_mask.set(d_fp8_mask); + MaskedSoftmaxParam param; + param.attention_score = d_qk_ref.ptr; + param.qk = d_qk_src.ptr; + param.attention_mask = d_mask.ptr; + param.batch_size = B; + param.q_length = L; + param.k_length = L; + param.num_heads = H; + param.qk_scale = coef; + param.linear_bias_slopes = nullptr; + invokeMaskedSoftmax(param, 0); + sync_check_cuda_error(); + cudaDeviceSynchronize(); + check_cuda_error(cudaGetLastError()); + + /* Test 1: implementation in mixed fp32/fp8 */ + GPUBuf<__nv_fp8_e4m3> d_fp8_qk_test_mixed(qk_n_elems, false); + FP8MaskedSoftMaxParam<__nv_fp8_e4m3, float> softmax_params_mixed{d_fp8_qk_test_mixed.ptr, + d_qk_src.ptr, + d_fp8_mask.ptr, + nullptr, + (uint32_t)B, + (uint32_t)L, + (uint32_t)H, + coef, + d_input_scales.ptr, + d_output_scales.ptr, + 0}; + invokeFP8MaskedSoftMax(softmax_params_mixed); + cudaDeviceSynchronize(); + check_cuda_error(cudaGetLastError()); + GPUBuf d_qk_test_mixed(d_fp8_qk_test_mixed); + + /* Test 2: implementation in pure fp8 */ + GPUBuf<__nv_fp8_e4m3> d_fp8_qk_test_pure(qk_n_elems, false); + FP8MaskedSoftMaxParam<__nv_fp8_e4m3, __nv_fp8_e4m3> softmax_params_pure{d_fp8_qk_test_pure.ptr, + d_fp8_qk_src.ptr, + d_fp8_mask.ptr, + nullptr, + (uint32_t)B, + (uint32_t)L, + (uint32_t)H, + coef, + d_input_scales.ptr, + d_output_scales.ptr, + 0}; + invokeFP8MaskedSoftMax(softmax_params_pure); + cudaDeviceSynchronize(); + check_cuda_error(cudaGetLastError()); + GPUBuf d_qk_test_pure(d_fp8_qk_test_pure); + + /* Retrieve data to CPU */ + auto qk_ref = d_qk_ref.to_host_vec(); + auto qk_test_mixed = d_qk_test_mixed.to_host_vec(); + auto qk_test_pure = d_qk_test_pure.to_host_vec(); + + sync_check_cuda_error(); + + /* Compare */ + std::transform(qk_ref.begin(), qk_ref.end(), qk_test_mixed.begin(), qk_test_mixed.begin(), abs_diff()); + std::transform(qk_ref.begin(), qk_ref.end(), qk_test_pure.begin(), qk_test_pure.begin(), abs_diff()); + const float softmax_error_mixed = *std::max_element(qk_test_mixed.begin(), qk_test_mixed.end()); + const float softmax_error_pure = *std::max_element(qk_test_pure.begin(), qk_test_pure.end()); + + bool error = false; + + if (softmax_error_mixed >= MAX_ALLOWED_ERROR || softmax_error_pure >= MAX_ALLOWED_ERROR) { + error = true; + printf("Max softmax_error_mixed = %.4f\n", softmax_error_mixed); + printf("Max softmax_error_pure = %.4f\n", softmax_error_pure); + } + + if (error) { + puts("[ERROR] test_fp8_masked_softmax"); + } + + return !error; +} + +int main(int argc, char** argv) +{ + if (argc != 7) { + printf("[ERROR] Usage: %s batch_size head_num max_seq_len" + " seq_len size_per_head rotary_embedding_dim\n", + argv[0]); + printf("e.g., %s 32 16 64 32 64 64\n", argv[0]); + return EXIT_FAILURE; + } + + const test_args_t test_args{ + atoi(argv[1]), atoi(argv[2]), atoi(argv[3]), atoi(argv[4]), atoi(argv[5]), atoi(argv[6])}; + + struct cudaDeviceProp prop; + check_cuda_error(cudaGetDeviceProperties(&prop, 0)); + printf("Using device %s\n", prop.name); + + bool global_test_pass = true; + bool test_pass = true; + + test_pass = test_fp8_transpose_4d_batch_major(test_args); + printf("%s", test_pass ? "." : "X"); + global_test_pass |= test_pass; + + test_pass = test_fp8_add_fused_QKV_bias_transpose(test_args); + printf("%s", test_pass ? "." : "X"); + global_test_pass |= test_pass; + + test_pass = test_fp8_masked_softmax(test_args); + printf("%s", test_pass ? "." : "X"); + global_test_pass |= test_pass; + + puts(""); + return global_test_pass ? EXIT_SUCCESS : EXIT_FAILURE; +} diff --git a/src/fastertransformer/kernels/unfused_attention_int8_kernels.cu b/src/fastertransformer/kernels/unfused_attention_int8_kernels.cu index a20be9e73..c9470ae27 100644 --- a/src/fastertransformer/kernels/unfused_attention_int8_kernels.cu +++ b/src/fastertransformer/kernels/unfused_attention_int8_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/unfused_attention_int8_kernels.h b/src/fastertransformer/kernels/unfused_attention_int8_kernels.h index 0ccfb5b05..841e5f6ac 100644 --- a/src/fastertransformer/kernels/unfused_attention_int8_kernels.h +++ b/src/fastertransformer/kernels/unfused_attention_int8_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/unfused_attention_kernels.cu b/src/fastertransformer/kernels/unfused_attention_kernels.cu index b10345b4f..90e8b8029 100644 --- a/src/fastertransformer/kernels/unfused_attention_kernels.cu +++ b/src/fastertransformer/kernels/unfused_attention_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/kernels/unfused_attention_kernels.h b/src/fastertransformer/kernels/unfused_attention_kernels.h index 6b3f9de07..7ac7604d4 100644 --- a/src/fastertransformer/kernels/unfused_attention_kernels.h +++ b/src/fastertransformer/kernels/unfused_attention_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/vit_kernels.cu b/src/fastertransformer/kernels/vit_kernels.cu index 06cb50337..0d67c5c0e 100644 --- a/src/fastertransformer/kernels/vit_kernels.cu +++ b/src/fastertransformer/kernels/vit_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/vit_kernels.h b/src/fastertransformer/kernels/vit_kernels.h index 4316fb3a0..49bf1340d 100644 --- a/src/fastertransformer/kernels/vit_kernels.h +++ b/src/fastertransformer/kernels/vit_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/xlnet_attention_kernels.cu b/src/fastertransformer/kernels/xlnet_attention_kernels.cu index 64dba13ba..6e2666e89 100644 --- a/src/fastertransformer/kernels/xlnet_attention_kernels.cu +++ b/src/fastertransformer/kernels/xlnet_attention_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/xlnet_attention_kernels.h b/src/fastertransformer/kernels/xlnet_attention_kernels.h index dbc264328..8c62e55d8 100644 --- a/src/fastertransformer/kernels/xlnet_attention_kernels.h +++ b/src/fastertransformer/kernels/xlnet_attention_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/xlnet_preprocess_kernels.cu b/src/fastertransformer/kernels/xlnet_preprocess_kernels.cu index 3bce6ee4f..d031fd114 100644 --- a/src/fastertransformer/kernels/xlnet_preprocess_kernels.cu +++ b/src/fastertransformer/kernels/xlnet_preprocess_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/kernels/xlnet_preprocess_kernels.h b/src/fastertransformer/kernels/xlnet_preprocess_kernels.h index 74b946d6d..9ab49a614 100644 --- a/src/fastertransformer/kernels/xlnet_preprocess_kernels.h +++ b/src/fastertransformer/kernels/xlnet_preprocess_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/BaseLayer.h b/src/fastertransformer/layers/BaseLayer.h index 4517740f6..db27eb0f1 100644 --- a/src/fastertransformer/layers/BaseLayer.h +++ b/src/fastertransformer/layers/BaseLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/CMakeLists.txt b/src/fastertransformer/layers/CMakeLists.txt index dd0c14573..d840adcbd 100644 --- a/src/fastertransformer/layers/CMakeLists.txt +++ b/src/fastertransformer/layers/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -16,6 +16,9 @@ cmake_minimum_required(VERSION 3.8) add_subdirectory(attention_layers) add_subdirectory(attention_layers_int8) +if(ENABLE_FP8) +add_subdirectory(attention_layers_fp8) +endif() add_subdirectory(xlnet_attention_layers) add_subdirectory(beam_search_layers) add_subdirectory(sampling_layers) @@ -23,22 +26,37 @@ add_subdirectory(sampling_layers) add_library(FfnLayer STATIC FfnLayer.cc) set_property(TARGET FfnLayer PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET FfnLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) -target_link_libraries(FfnLayer PUBLIC -lcublas -lcudart cublasMMWrapper activation_kernels transpose_int8_kernels memory_utils matrix_vector_multiplication tensor moe_kernels fpA_intB_gemm) +target_link_libraries(FfnLayer PUBLIC -lcublas -lcudart cublasMMWrapper activation_kernels transpose_int8_kernels memory_utils matrix_vector_multiplication tensor moe_kernels fpA_intB_gemm int8_gemm nvtx_utils) add_library(FfnLayerINT8 STATIC FfnLayerINT8.cc) set_property(TARGET FfnLayerINT8 PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET FfnLayerINT8 PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) -target_link_libraries(FfnLayerINT8 PUBLIC -lcublasLt -lcublas -lcudart cublasMMWrapper cublasINT8MMWrapper activation_int8_kernels memory_utils tensor moe_kernels) +target_link_libraries(FfnLayerINT8 PUBLIC -lcublasLt -lcublas -lcudart cublasMMWrapper cublasINT8MMWrapper activation_int8_kernels memory_utils tensor moe_kernels nvtx_utils) + +if(ENABLE_FP8) +add_library(FfnFP8Layer STATIC FfnFP8Layer.cc) +set_property(TARGET FfnFP8Layer PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET FfnFP8Layer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(FfnFP8Layer PUBLIC -lcublasLt -lcublas -lcudart cublasMMWrapper + cublasFP8MMWrapper activation_fp8_kernels memory_utils nvtx_utils) +endif() add_library(TensorParallelGeluFfnLayer STATIC TensorParallelGeluFfnLayer.cc) set_property(TARGET TensorParallelGeluFfnLayer PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET TensorParallelGeluFfnLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) -target_link_libraries(TensorParallelGeluFfnLayer PUBLIC -lcudart FfnLayer nccl_utils tensor) +target_link_libraries(TensorParallelGeluFfnLayer PUBLIC -lcudart FfnLayer nccl_utils tensor nvtx_utils) + +if(ENABLE_FP8) +add_library(TensorParallelGeluFfnFP8Layer STATIC TensorParallelGeluFfnFP8Layer.cc) +set_property(TARGET TensorParallelGeluFfnFP8Layer PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET TensorParallelGeluFfnFP8Layer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(TensorParallelGeluFfnFP8Layer PUBLIC -lcudart FfnFP8Layer nccl_utils) +endif() add_library(TensorParallelReluFfnLayer STATIC TensorParallelReluFfnLayer.cc) set_property(TARGET TensorParallelReluFfnLayer PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET TensorParallelReluFfnLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) -target_link_libraries(TensorParallelReluFfnLayer PUBLIC -lcudart FfnLayer nccl_utils tensor) +target_link_libraries(TensorParallelReluFfnLayer PUBLIC -lcudart FfnLayer nccl_utils tensor nvtx_utils) add_library(DynamicDecodeLayer STATIC DynamicDecodeLayer.cc) set_property(TARGET DynamicDecodeLayer PROPERTY POSITION_INDEPENDENT_CODE ON) @@ -46,9 +64,11 @@ set_property(TARGET DynamicDecodeLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) target_link_libraries(DynamicDecodeLayer PUBLIC -lcudart TopKSamplingLayer TopPSamplingLayer OnlineBeamSearchLayer BeamSearchLayer ban_bad_words stop_criteria - gpt_kernels tensor) + gpt_kernels tensor nvtx_utils) add_library(TensorParallelSiluFfnLayer STATIC TensorParallelSiluFfnLayer.cc) set_property(TARGET TensorParallelSiluFfnLayer PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET TensorParallelSiluFfnLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) -target_link_libraries(TensorParallelSiluFfnLayer PUBLIC -lcudart FfnLayer nccl_utils) +target_link_libraries(TensorParallelSiluFfnLayer PUBLIC -lcudart FfnLayer nccl_utils nvtx_utils) + +add_subdirectory(adapter_layers) diff --git a/src/fastertransformer/layers/DenseWeight.h b/src/fastertransformer/layers/DenseWeight.h index b6dc7e36d..55871fd4c 100644 --- a/src/fastertransformer/layers/DenseWeight.h +++ b/src/fastertransformer/layers/DenseWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -15,7 +15,9 @@ */ #pragma once +#include "src/fastertransformer/utils/cuda_fp8_utils.h" #include "stdlib.h" + namespace fastertransformer { // Note that the int8 mode of BERT and GPT are different. @@ -23,19 +25,42 @@ namespace fastertransformer { // scale (gemm input scale): quantize input of GEMM (float/half) in the int8 range. Namely, int8_x = scale * x // scale_inter: (gemm output scale) / (gemm input scale * gemm weight scale) // scale_out: 1 / (gemm output scale), dequantize activation from int8 range to float/half. - -template +template struct DenseWeight { - const T* kernel = nullptr; - const T* bias = nullptr; - const T* sp_kernel = nullptr; + const T1* kernel = nullptr; + const T2* bias = nullptr; + const T1* fp8_bias = nullptr; + const T1* sp_kernel = nullptr; // for int8 kernel const int8_t* int8_kernel = nullptr; const float* scale = nullptr; - const T* weight_only_quant_scale = nullptr; - const T* moe_scale = nullptr; + const T2* weight_only_quant_scale = nullptr; + const T2* moe_scale = nullptr; const float* scale_inter = nullptr; const float* scale_out = nullptr; + + // FP8 scales + // scale = AMAX(tensor) / FP8_MAX + // During GEMM, A (original) = A_scaled (fp8) * "scale of A" + const float* input_scale = nullptr; // a scalar + const float* input_scale_inv = nullptr; // a scalar + const float* weight_scale = nullptr; // a scalar or a vector + const float* weight_scale_inv = nullptr; // a scalar or a vector + const float* output_scale = nullptr; // a scalar + const float* output_scale_inv = nullptr; // a scalar + // host pointer of scales, all are scalars + const float* input_h_scale = nullptr; + const float* input_h_scale_inv = nullptr; + const float* weight_h_scale = nullptr; + const float* weight_h_scale_inv = nullptr; + const float* output_h_scale = nullptr; + const float* output_h_scale_inv = nullptr; + + // TODO(bhsueh) check do we need this param + const float* per_channel_scale_min = + nullptr; // = min(weight_scale), used to adjust the scaling of per channel scaling + + bool fuse_gemm_bias = false; }; -} // namespace fastertransformer \ No newline at end of file +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/DynamicDecodeBaseLayer.h b/src/fastertransformer/layers/DynamicDecodeBaseLayer.h index 258a08a30..2f12a4669 100644 --- a/src/fastertransformer/layers/DynamicDecodeBaseLayer.h +++ b/src/fastertransformer/layers/DynamicDecodeBaseLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/DynamicDecodeLayer.cc b/src/fastertransformer/layers/DynamicDecodeLayer.cc index 71799ce0d..f4de44a4b 100644 --- a/src/fastertransformer/layers/DynamicDecodeLayer.cc +++ b/src/fastertransformer/layers/DynamicDecodeLayer.cc @@ -29,7 +29,7 @@ template void DynamicDecodeLayer::allocateBuffer() { FT_LOG_DEBUG(__PRETTY_FUNCTION__); - finished_sum_ = (int*)allocator_->reMalloc(finished_sum_, sizeof(int), true); + check_cuda_error(cudaMallocHost((void**)&h_pinned_finished_sum_, sizeof(int))); return; } @@ -37,7 +37,9 @@ template void DynamicDecodeLayer::freeBuffer() { FT_LOG_DEBUG(__PRETTY_FUNCTION__); - allocator_->free((void**)(&finished_sum_)); + if (h_pinned_finished_sum_ != nullptr) { + check_cuda_error(cudaFreeHost(h_pinned_finished_sum_)); + } return; } @@ -162,6 +164,8 @@ void DynamicDecodeLayer::setup(const size_t batch_size, const size_t beam_wid * \param temperature [1] or [batch_size] on cpu, optional * \param len_penalty [1] or [batch_size] on cpu, optional * \param repetition_penalty [1] or [batch_size] on cpu, optional + * \param presence_penalty [1] or [batch_size] on cpu, optional, float + * \param min_length [1] or [batch_size], optional * \param top_p_decay [batch_size] on gpu, float, optional * \param top_p_min [batch_size] on gpu, float, optional * \param top_p_reset_ids [batch_size] on gpu, uint32, optional @@ -196,6 +200,7 @@ void DynamicDecodeLayer::forward(TensorMap* output_tensors, TensorMap* input_ * \param step [1] on cpu * \param max_input_length [1] on cpu * \param input_lengths [batch_size, beam_width], optional + * \param min_length [batch_size], optional * \param sequence_limit_length [batch_size] * \param ite [1] on cpu * \param local_batch_size [1] on cpu @@ -205,6 +210,8 @@ void DynamicDecodeLayer::forward(TensorMap* output_tensors, TensorMap* input_ * \param temperature [1] or [batch_size] on cpu, optional, float * \param len_penalty [1] or [batch_size] on cpu, optional, float * \param repetition_penalty [1] or [batch_size] on cpu, optional, float + * \param presence_penalty [1] or [batch_size] on cpu, optional, float + * Only one of repetition and presence penalties is allowed. * \param random_seed [1] or [batch_size] on cpu, optional, unsigned long long int * \param bad_words_list [2, bad_words_length] or [batch_size, 2, bad_words_length], optional * \param src_cache_indirection @@ -240,11 +247,23 @@ void DynamicDecodeLayer::forward(TensorMap* output_tensors, TensorMap* input_ const size_t local_batch_size = (size_t)input_tensors->at("local_batch_size").getVal(); if (input_tensors->isExist("bad_words_list")) { - const auto& bad_words = input_tensors->at("bad_words_list"); - const int* bad_words_ptr = bad_words.getPtr(); - const bool shared_bad_words = bad_words.shape.size() == 2; - const size_t bad_words_len = bad_words.shape[shared_bad_words ? 1 : 2]; + const auto& bad_words = input_tensors->at("bad_words_list"); + const int* bad_words_ptr = bad_words.getPtr(); + FT_CHECK_WITH_INFO(bad_words.shape.size() == 2 || bad_words.shape.size() == 3, + "Bad words dimension must be 2 or 3."); + + const bool is_matrix = bad_words.shape.size() == 2; + if (bad_words.shape.size() == 3) { + FT_CHECK_WITH_INFO(bad_words.shape[0] == batch_size, + fmtstr("Shape of dim 0 of bad words is invalid. It must be equal to batch size." + " However, it is %d and the batch size is %d.", + bad_words.shape[0], + batch_size)); + } + const bool shared_bad_words = is_matrix || bad_words.shape[0] == 1; + const size_t bad_words_len = bad_words.shape[is_matrix ? 1 : 2]; + // Add check on batch size of bad words const int id_offset = ite * local_batch_size; const int decode_vocab_size_units_offset = id_offset * vocab_size_padded_; @@ -362,7 +381,7 @@ void DynamicDecodeLayer::forward(TensorMap* output_tensors, TensorMap* input_ online_beamsearch_decode_->forward(&dynamic_decode_output_tensors, &dynamic_decode_input_tensors); } else { - FT_CHECK(false); // deprecate this module + FT_CHECK(false); // deprecate this module beamsearch_decode_->forward(&dynamic_decode_output_tensors, &dynamic_decode_input_tensors); } } // end of dynamic_ite @@ -447,7 +466,7 @@ void DynamicDecodeLayer::forward(TensorMap* output_tensors, TensorMap* input_ if (input_tensors->isExist("sequence_limit_length")) { invokeLengthCriterion(output_tensors->at("finished").getPtr(), output_tensors->at("should_stop").getPtr(), - finished_sum_, + h_pinned_finished_sum_, input_tensors->at("sequence_limit_length").getPtr(), batch_size, beam_width, diff --git a/src/fastertransformer/layers/DynamicDecodeLayer.h b/src/fastertransformer/layers/DynamicDecodeLayer.h index f6d201a8a..3b63cda92 100644 --- a/src/fastertransformer/layers/DynamicDecodeLayer.h +++ b/src/fastertransformer/layers/DynamicDecodeLayer.h @@ -45,10 +45,15 @@ class DynamicDecodeLayer: public BaseLayer { // List of argument names which can have different values in runtime // and does not support a batched version of kernel in beam search. - const std::vector runtime_arg_names_ = { - "beam_search_diversity_rate", "temperature", "len_penalty", "repetition_penalty"}; + const std::vector runtime_arg_names_ = {"beam_search_diversity_rate", + "temperature", + "len_penalty", + "repetition_penalty", + "presence_penalty", + "min_length"}; + bool has_diff_runtime_args_ = false; - int* finished_sum_ = nullptr; + int* h_pinned_finished_sum_ = nullptr; public: DynamicDecodeLayer(size_t vocab_size, diff --git a/src/fastertransformer/layers/FfnFP8Layer.cc b/src/fastertransformer/layers/FfnFP8Layer.cc new file mode 100644 index 000000000..dba832a02 --- /dev/null +++ b/src/fastertransformer/layers/FfnFP8Layer.cc @@ -0,0 +1,535 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/layers/FfnFP8Layer.h" +#include "src/fastertransformer/kernels/activation_fp8_kernels.h" +#include "src/fastertransformer/utils/cublasFP8MMWrapper.h" +#include "src/fastertransformer/utils/nvtx_utils.h" + +namespace fastertransformer { + +template +void FfnFP8Layer::forward(TensorMap* output_tensors, + TensorMap* input_tensors, + const FfnFP8Weight* ffn_weights) +{ + // input tensors: + // input_hidden_state [token_num, d_model], + + // output tensors: + // output_hidden_state [token_num, d_model], + + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + FT_CHECK(input_tensors->size() == 1); + FT_CHECK(output_tensors->size() == 1); + + const int m = input_tensors->at("input_hidden_state").shape[0]; + const int d_model = input_tensors->at("input_hidden_state").shape[1]; + const T1* input_hidden_state = input_tensors->at("input_hidden_state").getPtr(); + Tensor output_tensor = output_tensors->at("output_hidden_state"); + allocateBuffer(m); + +#ifdef FUSE_GEMM_ACT + if (fp8_mode_ == 1) { + const float alpha = 1.0f; + const float beta = 0.0f; + reinterpret_cast(cublas_wrapper_) + ->Gemm(inter_buf_bf16_, + (int)1, + (int)m, + (int)inter_size_, + (int)d_model, + (int64_t)0, + (int64_t)0, + (int64_t)0, + &alpha, + &beta, + input_hidden_state, + ffn_weights->intermediate_weight.kernel, + ffn_weights->intermediate_weight.input_scale, + ffn_weights->intermediate_weight.per_channel_scale_min, // identity_scale + stream_); + invokeAddBiasActivation(m, + ffn_weights->intermediate_weight.bias, + ffn_weights->intermediate_weight.output_scale, + ffn_weights->intermediate_weight.scale, + ffn_weights->intermediate_weight.per_channel_scale_min, + ffn_weights->output_weight.input_scale_inv); + } + else if (fp8_mode_ == 2) { +#ifdef USE_QGMMA + if (getActivationType() == ActivationType::Gelu) { + PUSH_RANGE("FFN gemm 1 bias gelu"); + reinterpret_cast(cublas_wrapper_) + ->Conv1x1Gemm(inter_buf_, + m, + inter_size_, + d_model, + input_hidden_state, + ffn_weights->intermediate_weight.kernel, + ffn_weights->intermediate_weight.bias, + *(ffn_weights->intermediate_weight.input_h_scale), // scale_a, + *(ffn_weights->intermediate_weight.weight_h_scale), // scale_b, + *(ffn_weights->output_weight.input_h_scale_inv), // scale_d, + stream_); + POP_RANGE; + } + else if (getActivationType() == ActivationType::Relu) { + reinterpret_cast(cublas_wrapper_) + ->Conv1x1Gemm(inter_buf_, + m, + inter_size_, + d_model, + input_hidden_state, + ffn_weights->intermediate_weight.kernel, + ffn_weights->intermediate_weight.bias, + *(ffn_weights->intermediate_weight.input_h_scale), // scale_a, + *(ffn_weights->intermediate_weight.weight_h_scale), // scale_b, + *(ffn_weights->output_weight.input_h_scale_inv), // scale_d, + stream_); + } +#else // USE_QGMMA + const float alpha = 1.0f; + const float beta = 0.0f; + if (getActivationType() == ActivationType::Gelu) { + reinterpret_cast(cublas_wrapper_) +#ifdef FP8_GEMM_OUTPUT_QUANT_DISABLE + ->Gemm_Bias_Act(inter_buf_bf16_, +#else // FP8_GEMM_OUTPUT_QUANT_DISABLE + ->Gemm_Bias_Act(inter_buf_, +#endif // FP8_GEMM_OUTPUT_QUANT_DISABLE + (int)1, + (int)m, + (int)inter_size_, + (int)d_model, + (int64_t)0, + (int64_t)0, + (int64_t)0, + &alpha, + &beta, + input_hidden_state, + ffn_weights->intermediate_weight.kernel, + ffn_weights->intermediate_weight.input_scale, + ffn_weights->intermediate_weight.weight_scale, + ffn_weights->intermediate_weight.bias, + ffn_weights->intermediate_weight.output_scale, + stream_); + } + else if (getActivationType() == ActivationType::Relu) { + reinterpret_cast(cublas_wrapper_) +#ifdef FP8_GEMM_OUTPUT_QUANT_DISABLE + ->Gemm_Bias_Act(inter_buf_bf16_, +#else // FP8_GEMM_OUTPUT_QUANT_DISABLE + ->Gemm_Bias_Act(inter_buf_, +#endif // #ifdef FP8_GEMM_OUTPUT_QUANT_DISABLE + (int)1, + (int)m, + (int)inter_size_, + (int)d_model, + (int64_t)0, + (int64_t)0, + (int64_t)0, + &alpha, + &beta, + input_hidden_state, + ffn_weights->intermediate_weight.kernel, + ffn_weights->intermediate_weight.input_scale, + ffn_weights->intermediate_weight.weight_scale, + ffn_weights->intermediate_weight.bias, + ffn_weights->intermediate_weight.output_scale, + stream_); + } +#ifdef FP8_GEMM_OUTPUT_QUANT_DISABLE + invokeQuantizeMatrix( + inter_buf_, ffn_weights->output_weight.input_scale_inv, inter_buf_bf16_, m * inter_size_, 1, stream_); +#endif FP8_GEMM_OUTPUT_QUANT_DISABLE +#endif // USE_QGMMA + } + +#else // FUSE_GEMM_ACT + PUSH_RANGE("FFN gemm 1"); +#ifdef SPARSITY_ENABLED + int m_tmp = m; + if (m_tmp % 8 != 0) { + m_tmp = (m_tmp / 8 + 1) * 8; + } + const int m_padded = m_tmp; + if (sparse_ && cublas_wrapper_->isUseSparse(1, inter_size_, m, d_model)) { + FT_CHECK(false); + // cublas_wrapper_->SpGemm(CUBLAS_OP_N, + // CUBLAS_OP_N, + // inter_size_, + // m_padded, + // d_model, + // ffn_weights->intermediate_weight.sp_kernel, + // input_hidden_state, + // inter_buf_); + } + else { +#endif // SPARSITY_ENABLED + if (fp8_mode_ == 1) { + const float alpha = 1.0f; + const float beta = 0.0f; + reinterpret_cast(cublas_wrapper_) + ->Gemm(inter_buf_bf16_, + (int)1, + (int)m, + (int)inter_size_, + (int)d_model, + (int64_t)0, + (int64_t)0, + (int64_t)0, + &alpha, + &beta, + input_hidden_state, + ffn_weights->intermediate_weight.kernel, + ffn_weights->intermediate_weight.input_scale, + ffn_weights->intermediate_weight.per_channel_scale_min, // identity_scale + stream_); + } + else if (fp8_mode_ == 2) { + const float alpha = 1.0f; + const float beta = 0.0f; + reinterpret_cast(cublas_wrapper_) + ->Gemm(inter_buf_bf16_, + (int)1, + (int)m, + (int)inter_size_, + (int)d_model, + (int64_t)0, + (int64_t)0, + (int64_t)0, + &alpha, + &beta, + input_hidden_state, + ffn_weights->intermediate_weight.kernel, + ffn_weights->intermediate_weight.input_scale, + ffn_weights->intermediate_weight.weight_scale, + stream_); + } +#ifdef SPARSITY_ENABLED + } +#endif // SPARSITY_ENABLED + POP_RANGE; + + PUSH_RANGE("FFN add bias act"); + if (fp8_mode_ == 1) { + invokeAddBiasActivation(m, + ffn_weights->intermediate_weight.bias, + ffn_weights->intermediate_weight.output_scale, + ffn_weights->intermediate_weight.scale, + ffn_weights->intermediate_weight.per_channel_scale_min, + ffn_weights->output_weight.input_scale_inv); + } + else if (fp8_mode_ == 2) { + invokeAddBiasActivation(m, + ffn_weights->intermediate_weight.bias, + ffn_weights->intermediate_weight.output_scale, + nullptr, + nullptr, + ffn_weights->output_weight.input_scale_inv); + } + sync_check_cuda_error(); + POP_RANGE; +#endif // FUSE_GEMM_ACT + + PUSH_RANGE("FFN gemm 2"); +#ifdef SPARSITY_ENABLED + if (sparse_ && cublas_wrapper_->isUseSparse(1, d_model, m, inter_size_)) { + FT_CHECK(false); + // cublas_wrapper_->SpGemm(CUBLAS_OP_N, + // CUBLAS_OP_N, + // d_model, + // m_padded, + // inter_size_, + // ffn_weights->output_weight.sp_kernel, + // inter_buf_, + // output_tensor); + } + else { +#endif SPARSITY_ENABLED + if (fp8_mode_ == 1) { + const float alpha = 1.0f; + const float beta = 0.0f; + if (output_tensor.type == TYPE_BF16) { + reinterpret_cast(cublas_wrapper_) + ->Gemm(output_tensor.getPtr(), + (int)1, + (int)m, + (int)d_model, + (int)inter_size_, + (int64_t)0, + (int64_t)0, + (int64_t)0, + &alpha, + &beta, + (const __nv_fp8_e4m3*)inter_buf_, + (const __nv_fp8_e4m3*)ffn_weights->output_weight.kernel, + ffn_weights->output_weight.input_scale, + ffn_weights->identity_scale, + stream_); + } + else if (output_tensor.type == TYPE_FP8_E4M3) { + const float alpha = 1.0f; + const float beta = 0.0f; + reinterpret_cast(cublas_wrapper_) + ->Gemm(output_tensor.getPtr(), + (int)1, + (int)m, + (int)d_model, + (int)inter_size_, + (int64_t)0, + (int64_t)0, + (int64_t)0, + &alpha, + &beta, + (const __nv_fp8_e4m3*)inter_buf_, + (const __nv_fp8_e4m3*)ffn_weights->output_weight.kernel, + ffn_weights->output_weight.input_scale, + ffn_weights->output_weight.per_channel_scale_min, + ffn_weights->output_weight.output_scale_inv, + stream_); + } + else { + FT_CHECK(false); + } + } + else if (fp8_mode_ == 2) { + if (output_tensor.type == TYPE_BF16) { + const float alpha = 1.0f; + const float beta = 0.0f; + reinterpret_cast(cublas_wrapper_) + ->Gemm(output_tensor.getPtr(), + (int)1, + (int)m, + (int)d_model, + (int)inter_size_, + (int64_t)0, + (int64_t)0, + (int64_t)0, + &alpha, + &beta, + (const __nv_fp8_e4m3*)inter_buf_, + (const __nv_fp8_e4m3*)ffn_weights->output_weight.kernel, + ffn_weights->output_weight.input_scale, + ffn_weights->output_weight.weight_scale, + stream_); + } + else if (output_tensor.type == TYPE_FP8_E4M3) { + // It looks like conv1x1Gemm does not bring better performance for this gemm + // because the k dimension of this gemm is large + // #ifdef USE_QGMMA + // reinterpret_cast(cublas_wrapper_) + // ->Conv1x1Gemm(output_tensor.getPtr(), + // m, + // d_model, + // inter_size_, + // inter_buf_, + // ffn_weights->output_weight.kernel, + // ffn_weights->output_weight.bias, + // *(ffn_weights->output_weight.input_h_scale), // + // scale_a, + // *(ffn_weights->output_weight.weight_h_scale), // + // scale_b, + // *(ffn_weights->output_weight.output_h_scale_inv), // + // scale_d, stream_); + // #else // USE_QGMMA + const float alpha = 1.0f; + const float beta = 0.0f; + reinterpret_cast(cublas_wrapper_) + ->Gemm(output_tensor.getPtr(), + (int)1, + (int)m, + (int)d_model, + (int)inter_size_, + (int64_t)0, + (int64_t)0, + (int64_t)0, + &alpha, + &beta, + (const __nv_fp8_e4m3*)inter_buf_, + (const __nv_fp8_e4m3*)ffn_weights->output_weight.kernel, + ffn_weights->output_weight.input_scale, + ffn_weights->output_weight.weight_scale, + ffn_weights->output_weight.output_scale_inv, + stream_); + // #endif // USE_QGMMA + } + else { + FT_CHECK(false); + } + } +#ifdef SPARSITY_ENABLED + } +#endif // SPARSITY_ENABLED + POP_RANGE; + + sync_check_cuda_error(); + if (is_free_buffer_after_forward_ == true) { + freeBuffer(); + } + sync_check_cuda_error(); +} + +template +FfnFP8Layer::FfnFP8Layer(size_t inter_size, + int fp8_mode, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool sparse): + BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward, nullptr, sparse), + inter_size_(inter_size), + fp8_mode_(fp8_mode) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); +} + +template +FfnFP8Layer::FfnFP8Layer(FfnFP8Layer const& ffn_layer): + BaseLayer(ffn_layer.stream_, + ffn_layer.cublas_wrapper_, + ffn_layer.allocator_, + ffn_layer.is_free_buffer_after_forward_, + ffn_layer.cuda_device_prop_, + ffn_layer.sparse_), + inter_size_(ffn_layer.inter_size_), + fp8_mode_(ffn_layer.fp8_mode_) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); +} + +template +FfnFP8Layer::~FfnFP8Layer() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + cublas_wrapper_ = nullptr; + freeBuffer(); +} + +template +void FfnFP8Layer::allocateBuffer() +{ + FT_CHECK(false); +} + +template +void FfnFP8Layer::allocateBuffer(size_t token_num) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + + inter_buf_ = (T1*)allocator_->reMalloc(inter_buf_, sizeof(T1) * token_num * inter_size_, false); + inter_buf_bf16_ = (T2*)allocator_->reMalloc(inter_buf_bf16_, sizeof(T2) * token_num * inter_size_, false); + is_allocate_buffer_ = true; +} + +template +void FfnFP8Layer::freeBuffer() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + if (is_allocate_buffer_) { + allocator_->free((void**)(&inter_buf_)); + allocator_->free((void**)(&inter_buf_bf16_)); + is_allocate_buffer_ = false; + } +} + +template class FfnFP8Layer<__nv_fp8_e4m3, __nv_bfloat16>; + +template +GeluFfnFP8Layer::GeluFfnFP8Layer(size_t inter_size, + int fp8_mode, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool sparse): + FfnFP8Layer(inter_size, fp8_mode, stream, cublas_wrapper, allocator, is_free_buffer_after_forward, sparse) +{ +} + +template +GeluFfnFP8Layer::GeluFfnFP8Layer(GeluFfnFP8Layer const& gelu_ffn_layer): + FfnFP8Layer(gelu_ffn_layer) +{ +} + +template +void GeluFfnFP8Layer::invokeAddBiasActivation(const int m, + const T2* bias, + const float* input_scale, + const float* input_scale_2, + const float* input_scale_2_min, + const float* output_scale) +{ + FP8ActivationParam param{inter_buf_bf16_, + inter_buf_, + bias, + input_scale, + input_scale_2, + input_scale_2_min, + output_scale, + (uint32_t)m, + (uint32_t)inter_size_, + stream_}; + invokeFP8AddBiasGelu(param); +} + +template class GeluFfnFP8Layer<__nv_fp8_e4m3, __nv_bfloat16>; + +template +ReluFfnFP8Layer::ReluFfnFP8Layer(size_t inter_size, + int fp8_mode, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool sparse): + FfnFP8Layer(inter_size, fp8_mode, stream, cublas_wrapper, allocator, is_free_buffer_after_forward, sparse) +{ +} + +template +ReluFfnFP8Layer::ReluFfnFP8Layer(ReluFfnFP8Layer const& relu_ffn_layer): + FfnFP8Layer(relu_ffn_layer) +{ +} + +template +void ReluFfnFP8Layer::invokeAddBiasActivation(const int m, + const T2* bias, + const float* input_scale, + const float* input_scale_2, + const float* input_scale_2_min, + const float* output_scale) +{ + FP8ActivationParam param{inter_buf_bf16_, + inter_buf_, + bias, + input_scale, + input_scale_2, + input_scale_2_min, + output_scale, + (uint32_t)m, + (uint32_t)inter_size_, + stream_}; + invokeFP8AddBiasRelu(param); +} + +template class ReluFfnFP8Layer<__nv_fp8_e4m3, __nv_bfloat16>; + +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/FfnFP8Layer.h b/src/fastertransformer/layers/FfnFP8Layer.h new file mode 100644 index 000000000..cfc3debaa --- /dev/null +++ b/src/fastertransformer/layers/FfnFP8Layer.h @@ -0,0 +1,133 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/layers/BaseLayer.h" +#include "src/fastertransformer/layers/FfnFP8Weight.h" +#include "src/fastertransformer/layers/FfnLayer.h" +#include "src/fastertransformer/utils/memory_utils.h" +#include + +namespace fastertransformer { + +template +class FfnFP8Layer: public BaseLayer { +private: + void allocateBuffer() override; + void freeBuffer() override; + void allocateBuffer(size_t token_num); + +protected: + const int fp8_mode_; + T1* inter_buf_ = nullptr; + T2* inter_buf_bf16_ = nullptr; + size_t inter_size_; + virtual void invokeAddBiasActivation(const int m, + const T2* bias, + const float* input_scale, + const float* input_scale_2, + const float* input_scale_2_min, + const float* output_scale) = 0; + +public: + FfnFP8Layer(size_t inter_size, + int fp8_mode, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool sparse = false); + + FfnFP8Layer(FfnFP8Layer const& ffn_layer); + + virtual ~FfnFP8Layer(); + + virtual void forward(TensorMap* output_tensors, TensorMap* input_tensors, const FfnFP8Weight* ffn_weights); + virtual ActivationType getActivationType() = 0; +}; + +template +class GeluFfnFP8Layer: public FfnFP8Layer { +public: + GeluFfnFP8Layer(size_t inter_size, + int fp8_mode_, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool sparse = false); + + GeluFfnFP8Layer(GeluFfnFP8Layer const& ffn_layer); + + virtual ~GeluFfnFP8Layer() = default; + ActivationType getActivationType() override + { + return ActivationType::Gelu; + }; + +protected: + using FfnFP8Layer::stream_; + +private: + using FfnFP8Layer::inter_buf_; + using FfnFP8Layer::inter_size_; + using FfnFP8Layer::fp8_mode_; + using FfnFP8Layer::inter_buf_bf16_; + void invokeAddBiasActivation(const int m, + const T2* bias, + const float* input_scale, + const float* input_scale_2, + const float* input_scale_2_min, + const float* output_scale) override; +}; + +template +class ReluFfnFP8Layer: public FfnFP8Layer { +public: + ReluFfnFP8Layer(size_t inter_size, + int fp8_mode, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool sparse = false); + + ReluFfnFP8Layer(ReluFfnFP8Layer const& ffn_layer); + + virtual ~ReluFfnFP8Layer() = default; + ActivationType getActivationType() override + { + return ActivationType::Relu; + }; + +protected: + using FfnFP8Layer::stream_; + +private: + using FfnFP8Layer::inter_buf_; + using FfnFP8Layer::inter_size_; + using FfnFP8Layer::fp8_mode_; + using FfnFP8Layer::inter_buf_bf16_; + void invokeAddBiasActivation(const int m, + const T2* bias, + const float* input_scale, + const float* input_scale_2, + const float* input_scale_2_min, + const float* output_scale) override; +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/FfnFP8Weight.h b/src/fastertransformer/layers/FfnFP8Weight.h new file mode 100644 index 000000000..3669d8667 --- /dev/null +++ b/src/fastertransformer/layers/FfnFP8Weight.h @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "FfnWeight.h" +#include "src/fastertransformer/utils/ScaleList.h" +namespace fastertransformer { + +template +struct FfnFP8Weight: FfnWeight { + ScaleList* scale_list_ptr; + float* identity_scale; + float* identity_h_scale; +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/FfnINT8Weight.h b/src/fastertransformer/layers/FfnINT8Weight.h index 7818d1e64..cd46eee42 100644 --- a/src/fastertransformer/layers/FfnINT8Weight.h +++ b/src/fastertransformer/layers/FfnINT8Weight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/FfnLayer.cc b/src/fastertransformer/layers/FfnLayer.cc index 8b6a45f21..7ac441198 100644 --- a/src/fastertransformer/layers/FfnLayer.cc +++ b/src/fastertransformer/layers/FfnLayer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -343,15 +343,18 @@ void FfnLayer::forward(TensorMap* output_tensors, TensorMap* input_tensors, c stream_); } else if (int8_mode_ == 2) { - cublas_wrapper_->Int8Gemm(hidden_units_, - m, - inter_size_, - ffn_weights->output_weight.int8_kernel, - inter_size_, - reinterpret_cast(inter_buf_), - inter_size_, - output_tensors->getPtr("ffn_output"), - hidden_units_); + int8_fc_runner_->gemm(reinterpret_cast(inter_buf_), + ffn_weights->output_weight.int8_kernel, + QuantMode::PerTensorQuant, + ffn_weights->output_weight.scale_inter, + ffn_weights->output_weight.scale_out, + output_tensors->getPtr("ffn_output"), + m, + hidden_units_, + inter_size_, + nullptr, + 0, + stream_); } else { cublas_wrapper_->Gemm(CUBLAS_OP_N, @@ -399,7 +402,8 @@ FfnLayer::FfnLayer(size_t max_batch_size, max_inter_size_(inter_size), inter_size_(inter_size), int8_mode_(int8_mode), - use_gated_activation_(use_gated_activation) + use_gated_activation_(use_gated_activation), + int8_fc_runner_(int8_mode == 2 ? std::make_shared>() : nullptr) { FT_LOG_DEBUG(__PRETTY_FUNCTION__); if (int8_mode_ == 0) { @@ -431,7 +435,8 @@ FfnLayer::FfnLayer(FfnLayer const& ffn_layer): use_gated_activation_(ffn_layer.use_gated_activation_), moe_fc_runner_(ffn_layer.moe_fc_runner_), moe_int8_weight_only_fc_runner_(ffn_layer.moe_int8_weight_only_fc_runner_), - weight_only_int8_fc_runner_(ffn_layer.weight_only_int8_fc_runner_) + weight_only_int8_fc_runner_(ffn_layer.weight_only_int8_fc_runner_), + int8_fc_runner_(ffn_layer.int8_fc_runner_) { FT_LOG_DEBUG(__PRETTY_FUNCTION__); } @@ -447,25 +452,8 @@ FfnLayer::~FfnLayer() template void FfnLayer::allocateBuffer() { - FT_LOG_DEBUG(__PRETTY_FUNCTION__); - const auto type_size = int8_mode_ == 2 ? sizeof(int8_t) : sizeof(T); - if (is_allocate_buffer_ == false) { - inter_buf_ = (T*)allocator_->reMalloc(inter_buf_, type_size * max_token_num_ * max_inter_size_, false); - if (use_gated_activation_) { - inter_buf_2_ = (T*)allocator_->reMalloc(inter_buf_2_, sizeof(T) * max_token_num_ * max_inter_size_, false); - } - - if (int8_mode_ == 1) { - FT_CHECK_WITH_INFO(weight_only_int8_fc_runner_.get() != NULL, "weight only runner was not initialized."); - // We use max_size for n and k since we reuse buffers for both FCs and want to allocate the max - // possible memory that would be required by any of the individual gemms. - const int max_size = std::max(hidden_units_, max_inter_size_); - mixed_gemm_ws_bytes_ = weight_only_int8_fc_runner_->getWorkspaceSize(max_token_num_, max_size, max_size); - mixed_gemm_workspace_ = (char*)allocator_->reMalloc(mixed_gemm_workspace_, mixed_gemm_ws_bytes_, false); - } - - is_allocate_buffer_ = true; - } + FT_CHECK_WITH_INFO(false, + "FfnLayer::allocateBuffer() is deprecated. Use `allocateBuffer(size_t token_num, ...)` instead"); } template @@ -504,6 +492,11 @@ void FfnLayer::allocateBuffer(size_t token_num, int moe_k, bool use_moe) mixed_gemm_ws_bytes_ = weight_only_int8_fc_runner_->getWorkspaceSize(token_num, max_size, max_size); mixed_gemm_workspace_ = (char*)allocator_->reMalloc(mixed_gemm_workspace_, mixed_gemm_ws_bytes_, false); } + else if (int8_mode_ == 2) { + const int max_size = std::max(hidden_units_, inter_size_); + int8_gemm_ws_bytes_ = int8_fc_runner_->getWorkspaceSize(token_num, max_size, max_size); + int8_gemm_workspace_ = (char*)allocator_->reMalloc(int8_gemm_workspace_, int8_gemm_ws_bytes_, false); + } } is_allocate_buffer_ = true; @@ -532,15 +525,6 @@ void FfnLayer::freeBuffer() } } -template -bool FfnLayer::isValidTokenNum(size_t token_num) -{ - if (max_token_num_ < token_num) { - max_token_num_ = token_num; - } - return true; -} - #define INVOKE_GENERIC_ACT(ACT) \ invokeGenericActivation(inter_buf_, \ bias1, \ @@ -572,19 +556,13 @@ void FfnLayer::genericActivation(int m, FT_CHECK(seq_len > 0); } + // dispatch according to actual activation switch (getActivationType()) { case ActivationType::Gelu: case ActivationType::GeGLU: if (inter_buf_2_ == nullptr && int8_mode_ <= 1) { - invokeAddBiasGeluV2(inter_buf_, - bias1, - ia3_tasks, - ia3_weights, - padding_offset, - seq_len, - m, - inter_size_, - stream_); + invokeAddBiasGeluV2( + inter_buf_, bias1, ia3_tasks, ia3_weights, padding_offset, seq_len, m, inter_size_, stream_); } else { INVOKE_GENERIC_ACT(GeluActivation); diff --git a/src/fastertransformer/layers/FfnLayer.h b/src/fastertransformer/layers/FfnLayer.h index 6bb6e1222..af7ae7606 100644 --- a/src/fastertransformer/layers/FfnLayer.h +++ b/src/fastertransformer/layers/FfnLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -18,6 +18,7 @@ #include "src/fastertransformer/kernels/activation_kernels.h" #include "src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm.h" +#include "src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm.h" #include "src/fastertransformer/kernels/matrix_vector_multiplication.h" #include "src/fastertransformer/kernels/moe_kernels.h" #include "src/fastertransformer/layers/BaseLayer.h" @@ -37,8 +38,8 @@ class FfnLayer: public BaseLayer { size_t max_token_num_ = 0; // meta data - size_t head_num_; - size_t size_per_head_; + size_t head_num_; // (martinma): this member is not used in this class. Remove it? + size_t size_per_head_; // (martinma): this member is not used in this class. Remove it? size_t expert_num_; // calculated data @@ -51,10 +52,10 @@ class FfnLayer: public BaseLayer { std::shared_ptr> moe_int8_weight_only_fc_runner_; std::shared_ptr> weight_only_int8_fc_runner_; + std::shared_ptr> int8_fc_runner_; void allocateBuffer() override; void freeBuffer() override; - bool isValidTokenNum(size_t token_num); void allocateBuffer(int moe_k = 0, bool use_moe = false); void allocateBuffer(size_t token_num, int moe_k = 0, bool use_moe = false); @@ -66,6 +67,8 @@ class FfnLayer: public BaseLayer { char* mixed_gemm_workspace_ = nullptr; size_t mixed_gemm_ws_bytes_ = 0; + char* int8_gemm_workspace_ = nullptr; + size_t int8_gemm_ws_bytes_ = 0; size_t inter_size_; /* used to allocater memory buffers @@ -98,8 +101,8 @@ class FfnLayer: public BaseLayer { public: FfnLayer(size_t max_batch_size, size_t max_seq_len, - size_t head_num, - size_t size_per_head, + size_t head_num, // (martinma): redundant parameter? + size_t size_per_head, // (martinma): redundant parameter? size_t expert_num, size_t inter_size, cudaStream_t stream, diff --git a/src/fastertransformer/layers/FfnLayerINT8.cc b/src/fastertransformer/layers/FfnLayerINT8.cc index b79e77905..aeac788bc 100644 --- a/src/fastertransformer/layers/FfnLayerINT8.cc +++ b/src/fastertransformer/layers/FfnLayerINT8.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/FfnLayerINT8.h b/src/fastertransformer/layers/FfnLayerINT8.h index 5b1ff8fa7..3d07ee149 100644 --- a/src/fastertransformer/layers/FfnLayerINT8.h +++ b/src/fastertransformer/layers/FfnLayerINT8.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/FfnWeight.h b/src/fastertransformer/layers/FfnWeight.h index d18394f40..1a8dd6714 100644 --- a/src/fastertransformer/layers/FfnWeight.h +++ b/src/fastertransformer/layers/FfnWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -20,13 +20,13 @@ namespace fastertransformer { -template +template struct FfnWeight { - DenseWeight gating_weight; - DenseWeight intermediate_weight; - DenseWeight intermediate_weight2; // for gated activation - DenseWeight output_weight; - DenseWeight ia3_weight; + DenseWeight gating_weight; + DenseWeight intermediate_weight; + DenseWeight intermediate_weight2; // for gated activation + DenseWeight output_weight; + DenseWeight ia3_weight; }; } // namespace fastertransformer diff --git a/src/fastertransformer/layers/TensorParallelGeluFfnFP8Layer.cc b/src/fastertransformer/layers/TensorParallelGeluFfnFP8Layer.cc new file mode 100644 index 000000000..a62018042 --- /dev/null +++ b/src/fastertransformer/layers/TensorParallelGeluFfnFP8Layer.cc @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/layers/TensorParallelGeluFfnFP8Layer.h" + +namespace fastertransformer { + +template +void TensorParallelGeluFfnFP8Layer::forward(TensorMap* output_tensors, + TensorMap* input_tensors, + const FfnFP8Weight* ffn_weights) +{ + GeluFfnFP8Layer::forward(output_tensors, input_tensors, ffn_weights); + + const size_t token_num = output_tensors->at("output_hidden_state").shape[0]; + const size_t hidden_units = output_tensors->at("output_hidden_state").shape[1]; + + T2* ffn_out = output_tensors->at("output_hidden_state").getPtr(); + if (tensor_para_.world_size_ > 1) { + ftNcclAllReduceSum(ffn_out, ffn_out, token_num * hidden_units, tensor_para_, GeluFfnFP8Layer::stream_); + sync_check_cuda_error(); + } +} + +template +TensorParallelGeluFfnFP8Layer::TensorParallelGeluFfnFP8Layer(size_t inter_size, + NcclParam tensor_para, + int fp8_mode, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool is_sparse): + GeluFfnFP8Layer(inter_size / tensor_para.world_size_, + fp8_mode, + stream, + cublas_wrapper, + allocator, + is_free_buffer_after_forward, + is_sparse), + tensor_para_(tensor_para) +{ + FT_CHECK(inter_size % tensor_para_.world_size_ == 0); +} + +template +TensorParallelGeluFfnFP8Layer::TensorParallelGeluFfnFP8Layer( + TensorParallelGeluFfnFP8Layer const& ffn_layer): + GeluFfnFP8Layer(ffn_layer), tensor_para_(ffn_layer.tensor_para_) +{ +} + +template class TensorParallelGeluFfnFP8Layer<__nv_fp8_e4m3, __nv_bfloat16>; + +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/TensorParallelGeluFfnFP8Layer.h b/src/fastertransformer/layers/TensorParallelGeluFfnFP8Layer.h new file mode 100644 index 000000000..73b1743de --- /dev/null +++ b/src/fastertransformer/layers/TensorParallelGeluFfnFP8Layer.h @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/layers/FfnFP8Layer.h" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" +#include "src/fastertransformer/utils/nccl_utils.h" + +namespace fastertransformer { + +template +class TensorParallelGeluFfnFP8Layer: public GeluFfnFP8Layer { +private: + NcclParam tensor_para_; + +protected: +public: + TensorParallelGeluFfnFP8Layer(size_t inter_size, + NcclParam tensor_para, + int fp8_mode, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool is_sparse = false); + + TensorParallelGeluFfnFP8Layer(TensorParallelGeluFfnFP8Layer const& ffn_layer); + + virtual ~TensorParallelGeluFfnFP8Layer() = default; + + void forward(TensorMap* output_tensors, TensorMap* input_tensors, const FfnFP8Weight* ffn_weights) override; +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/TensorParallelGeluFfnLayer.cc b/src/fastertransformer/layers/TensorParallelGeluFfnLayer.cc index c83a6d721..1dda95b6d 100644 --- a/src/fastertransformer/layers/TensorParallelGeluFfnLayer.cc +++ b/src/fastertransformer/layers/TensorParallelGeluFfnLayer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -15,6 +15,7 @@ */ #include "src/fastertransformer/layers/TensorParallelGeluFfnLayer.h" +#include "src/fastertransformer/utils/nvtx_utils.h" namespace fastertransformer { @@ -48,42 +49,18 @@ void TensorParallelGeluFfnLayer::forward(TensorMap* output_tensors, GeluFfnLayer::forward(output_tensors, input_tensors, ffn_weights); + PUSH_RANGE("FFN all reduce sum"); T* ffn_out = out_tensor.getPtr(); if (do_all_reduce_ && tensor_para_.world_size_ > 1) { - // TODO(mseznec): temporary fix to increase performance. In the future, use fp16 as gemm output directly (with - // cutlass) - const bool cast_int_fp = GeluFfnLayer::int8_mode_ == 2; - if (cast_int_fp) { - ffn_output_fp_ = reinterpret_cast( - GeluFfnLayer::allocator_->reMalloc(ffn_output_fp_, sizeof(T) * token_num * hidden_units, false)); - // We must scale int32 activations as they may overflow float16's range - invokeCudaD2DScaleCpyConvert(ffn_output_fp_, - reinterpret_cast(ffn_out), - ffn_weights->output_weight.scale_inter, - false, - token_num * hidden_units, - GeluFfnLayer::stream_); - } if (!use_custom_all_reduce_kernel) { - ftNcclAllReduceSum(cast_int_fp ? ffn_output_fp_ : ffn_out, - cast_int_fp ? ffn_output_fp_ : ffn_out, - token_num * hidden_units, - tensor_para_, - GeluFfnLayer::stream_); + ftNcclAllReduceSum(ffn_out, ffn_out, token_num * hidden_units, tensor_para_, GeluFfnLayer::stream_); } else { custom_all_reduce_comm_->customAllReduce(token_num * hidden_units, GeluFfnLayer::stream_); } - if (cast_int_fp) { - invokeCudaD2DScaleCpyConvert(reinterpret_cast(ffn_out), - ffn_output_fp_, - ffn_weights->output_weight.scale_inter, - true, - token_num * hidden_units, - GeluFfnLayer::stream_); - } sync_check_cuda_error(); } + POP_RANGE; } template @@ -136,12 +113,6 @@ TensorParallelGeluFfnLayer::TensorParallelGeluFfnLayer(TensorParallelGeluFfnL { } -template -TensorParallelGeluFfnLayer::~TensorParallelGeluFfnLayer() -{ - GeluFfnLayer::allocator_->free((void**)&ffn_output_fp_); -} - template class TensorParallelGeluFfnLayer; template class TensorParallelGeluFfnLayer; #ifdef ENABLE_BF16 diff --git a/src/fastertransformer/layers/TensorParallelGeluFfnLayer.h b/src/fastertransformer/layers/TensorParallelGeluFfnLayer.h index 3736ced37..08b736d22 100644 --- a/src/fastertransformer/layers/TensorParallelGeluFfnLayer.h +++ b/src/fastertransformer/layers/TensorParallelGeluFfnLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -29,7 +29,6 @@ class TensorParallelGeluFfnLayer: public GeluFfnLayer { std::shared_ptr custom_all_reduce_comm_; int enable_custom_all_reduce_; bool do_all_reduce_; - T* ffn_output_fp_ = nullptr; protected: public: @@ -53,8 +52,6 @@ class TensorParallelGeluFfnLayer: public GeluFfnLayer { TensorParallelGeluFfnLayer(TensorParallelGeluFfnLayer const& ffn_layer); - virtual ~TensorParallelGeluFfnLayer(); - void forward(std::vector* output_tensors, const std::vector* input_tensors, const FfnWeight* ffn_weights) override; diff --git a/src/fastertransformer/layers/TensorParallelReluFfnLayer.cc b/src/fastertransformer/layers/TensorParallelReluFfnLayer.cc index 041c641c0..29ac2846e 100644 --- a/src/fastertransformer/layers/TensorParallelReluFfnLayer.cc +++ b/src/fastertransformer/layers/TensorParallelReluFfnLayer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -15,6 +15,7 @@ */ #include "src/fastertransformer/layers/TensorParallelReluFfnLayer.h" +#include "src/fastertransformer/utils/nvtx_utils.h" namespace fastertransformer { @@ -49,41 +50,17 @@ void TensorParallelReluFfnLayer::forward(TensorMap* output_tensors, ReluFfnLayer::forward(output_tensors, input_tensors, ffn_weights); T* ffn_out = out_tensor.getPtr(); + PUSH_RANGE("FFN all reduce sum"); if (do_all_reduce_ && tensor_para_.world_size_ > 1) { - // TODO(mseznec): temporary fix to increase performance. In the future, use fp16 as gemm output directly (with - // cutlass) - const bool cast_int_fp = ReluFfnLayer::int8_mode_ == 2; - if (cast_int_fp) { - ffn_output_fp_ = reinterpret_cast( - ReluFfnLayer::allocator_->reMalloc(ffn_output_fp_, sizeof(T) * token_num * hidden_units, false)); - // We must scale int32 activations as they may overflow float16's range - invokeCudaD2DScaleCpyConvert(ffn_output_fp_, - reinterpret_cast(ffn_out), - ffn_weights->output_weight.scale_inter, - false, - token_num * hidden_units, - ReluFfnLayer::stream_); - } if (!use_custom_all_reduce_kernel) { - ftNcclAllReduceSum(cast_int_fp ? ffn_output_fp_ : ffn_out, - cast_int_fp ? ffn_output_fp_ : ffn_out, - token_num * hidden_units, - tensor_para_, - ReluFfnLayer::stream_); + ftNcclAllReduceSum(ffn_out, ffn_out, token_num * hidden_units, tensor_para_, ReluFfnLayer::stream_); } else { custom_all_reduce_comm_->customAllReduce(token_num * hidden_units, ReluFfnLayer::stream_); } - if (cast_int_fp) { - invokeCudaD2DScaleCpyConvert(reinterpret_cast(ffn_out), - ffn_output_fp_, - ffn_weights->output_weight.scale_inter, - true, - token_num * hidden_units, - ReluFfnLayer::stream_); - } sync_check_cuda_error(); } + POP_RANGE; } template @@ -131,16 +108,10 @@ TensorParallelReluFfnLayer::TensorParallelReluFfnLayer(TensorParallelReluFfnL { } -template -TensorParallelReluFfnLayer::~TensorParallelReluFfnLayer() -{ - ReluFfnLayer::allocator_->free((void**)&ffn_output_fp_); -} - template class TensorParallelReluFfnLayer; template class TensorParallelReluFfnLayer; #ifdef ENABLE_BF16 template class TensorParallelReluFfnLayer<__nv_bfloat16>; #endif -} // namespace fastertransformer \ No newline at end of file +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/TensorParallelReluFfnLayer.h b/src/fastertransformer/layers/TensorParallelReluFfnLayer.h index d62e227a2..dacae5283 100644 --- a/src/fastertransformer/layers/TensorParallelReluFfnLayer.h +++ b/src/fastertransformer/layers/TensorParallelReluFfnLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -29,7 +29,6 @@ class TensorParallelReluFfnLayer: public ReluFfnLayer { std::shared_ptr custom_all_reduce_comm_; int enable_custom_all_reduce_; bool do_all_reduce_; - T* ffn_output_fp_ = nullptr; protected: public: @@ -53,8 +52,6 @@ class TensorParallelReluFfnLayer: public ReluFfnLayer { TensorParallelReluFfnLayer(TensorParallelReluFfnLayer const& ffn_layer); - virtual ~TensorParallelReluFfnLayer(); - void forward(std::vector* output_tensors, const std::vector* input_tensors, const FfnWeight* ffn_weights) override; diff --git a/src/fastertransformer/layers/TensorParallelSiluFfnLayer.cc b/src/fastertransformer/layers/TensorParallelSiluFfnLayer.cc index 902a5206a..25a2da86b 100644 --- a/src/fastertransformer/layers/TensorParallelSiluFfnLayer.cc +++ b/src/fastertransformer/layers/TensorParallelSiluFfnLayer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -50,38 +50,12 @@ void TensorParallelSiluFfnLayer::forward(TensorMap* output_tensors, T* ffn_out = out_tensor.getPtr(); if (do_all_reduce_ && tensor_para_.world_size_ > 1) { - // TODO(mseznec): temporary fix to increase performance. In the future, use fp16 as gemm output directly (with - // cutlass) - const bool cast_int_fp = SiluFfnLayer::int8_mode_ == 2; - if (cast_int_fp) { - ffn_output_fp_ = reinterpret_cast( - SiluFfnLayer::allocator_->reMalloc(ffn_output_fp_, sizeof(T) * token_num * hidden_units, false)); - // We must scale int32 activations as they may overflow float16's range - invokeCudaD2DScaleCpyConvert(ffn_output_fp_, - reinterpret_cast(ffn_out), - ffn_weights->output_weight.scale_inter, - false, - token_num * hidden_units, - SiluFfnLayer::stream_); - } if (!use_custom_all_reduce_kernel) { - ftNcclAllReduceSum(cast_int_fp ? ffn_output_fp_ : ffn_out, - cast_int_fp ? ffn_output_fp_ : ffn_out, - token_num * hidden_units, - tensor_para_, - SiluFfnLayer::stream_); + ftNcclAllReduceSum(ffn_out, ffn_out, token_num * hidden_units, tensor_para_, SiluFfnLayer::stream_); } else { custom_all_reduce_comm_->customAllReduce(token_num * hidden_units, SiluFfnLayer::stream_); } - if (cast_int_fp) { - invokeCudaD2DScaleCpyConvert(reinterpret_cast(ffn_out), - ffn_output_fp_, - ffn_weights->output_weight.scale_inter, - true, - token_num * hidden_units, - SiluFfnLayer::stream_); - } sync_check_cuda_error(); } } @@ -129,12 +103,6 @@ TensorParallelSiluFfnLayer::TensorParallelSiluFfnLayer(TensorParallelSiluFfnL { } -template -TensorParallelSiluFfnLayer::~TensorParallelSiluFfnLayer() -{ - SiluFfnLayer::allocator_->free((void**)&ffn_output_fp_); -} - template class TensorParallelSiluFfnLayer; template class TensorParallelSiluFfnLayer; #ifdef ENABLE_BF16 diff --git a/src/fastertransformer/layers/TensorParallelSiluFfnLayer.h b/src/fastertransformer/layers/TensorParallelSiluFfnLayer.h index 23b908b74..ae481373a 100644 --- a/src/fastertransformer/layers/TensorParallelSiluFfnLayer.h +++ b/src/fastertransformer/layers/TensorParallelSiluFfnLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -29,7 +29,6 @@ class TensorParallelSiluFfnLayer: public SiluFfnLayer { std::shared_ptr custom_all_reduce_comm_; int enable_custom_all_reduce_; bool do_all_reduce_; - T* ffn_output_fp_ = nullptr; protected: public: @@ -52,8 +51,6 @@ class TensorParallelSiluFfnLayer: public SiluFfnLayer { TensorParallelSiluFfnLayer(TensorParallelSiluFfnLayer const& ffn_layer); - virtual ~TensorParallelSiluFfnLayer(); - void forward(std::vector* output_tensors, const std::vector* input_tensors, const FfnWeight* ffn_weights) override; diff --git a/src/fastertransformer/layers/adapter_layers/CMakeLists.txt b/src/fastertransformer/layers/adapter_layers/CMakeLists.txt new file mode 100644 index 000000000..cf2774ea8 --- /dev/null +++ b/src/fastertransformer/layers/adapter_layers/CMakeLists.txt @@ -0,0 +1,20 @@ +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +cmake_minimum_required(VERSION 3.8) + +add_library(LinearAdapterLayer STATIC LinearAdapterLayer.cc) +set_property(TARGET LinearAdapterLayer PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET LinearAdapterLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(LinearAdapterLayer PUBLIC -lcudart TensorParallelSiluFfnLayer nccl_utils nvtx_utils) diff --git a/src/fastertransformer/layers/adapter_layers/LinearAdapterLayer.cc b/src/fastertransformer/layers/adapter_layers/LinearAdapterLayer.cc new file mode 100644 index 000000000..c5ea150f4 --- /dev/null +++ b/src/fastertransformer/layers/adapter_layers/LinearAdapterLayer.cc @@ -0,0 +1,176 @@ +/* + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "LinearAdapterLayer.h" +#include "src/fastertransformer/kernels/add_residual_kernels.h" +#include "src/fastertransformer/layers/TensorParallelSiluFfnLayer.h" +#include "src/fastertransformer/utils/logger.h" + +namespace fastertransformer { + +LayerNormType LinearAdapterConfig::toLayerNormType(const std::string& layer_norm_type) +{ + if (layer_norm_type == "pre") { + return LayerNormType::pre_layernorm; + } + else if (layer_norm_type == "post") { + return LayerNormType::post_layernorm; + } + else if (layer_norm_type == "invalid") { + return LayerNormType::InvalidType; + } + else { + FT_THROW("Layernorm Type: " + layer_norm_type + " not supported!"); + } +} + +std::string LinearAdapterConfig::toString(LayerNormType layer_norm_type) +{ + if (layer_norm_type == LayerNormType::pre_layernorm) { + return "pre"; + } + else if (layer_norm_type == LayerNormType::post_layernorm) { + return "post"; + } + else if (layer_norm_type == LayerNormType::InvalidType) { + return "invalid"; + } + else { + FT_THROW("Layernorm Type: " + std::to_string(static_cast(layer_norm_type)) + " not supported!"); + } +} +std::string LinearAdapterConfig::toString() const +{ + return std::string("[inter_size: ") + std::to_string(inter_size_) + + ", layer_norm_type: " + toString(layer_norm_type_) + "]"; +} + +template +LinearAdapterLayer::LinearAdapterLayer(LinearAdapterConfig const& config, + size_t max_batch_size, + size_t max_seq_len, + size_t hidden_size, + NcclParam const& tensor_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool is_sparse, + std::shared_ptr custom_all_reduce_comm, + int enable_custom_all_reduce, + float layer_norm_eps): + BaseLayer{stream, cublas_wrapper, allocator, is_free_buffer_after_forward, nullptr, is_sparse}, + ffn_layer_{new TensorParallelSiluFfnLayer(max_batch_size, + max_seq_len, + 1, + hidden_size, + 0, + config.interSize(), + tensor_para, + stream, + cublas_wrapper, + allocator, + true, + is_free_buffer_after_forward, + is_sparse, + false, + custom_all_reduce_comm, + enable_custom_all_reduce)}, + layer_norm_type_{config.layerNormType()}, + layer_norm_eps_{layer_norm_eps}, + max_token_size_{max_batch_size * max_seq_len}, + hidden_size_{hidden_size} +{ + FT_LOG_DEBUG("Constructing LinearAdapterLayer with config: %s", config.toString().c_str()); + allocateBuffer(); +} + +template +LinearAdapterLayer::~LinearAdapterLayer() +{ + freeBuffer(); +} + +template +void LinearAdapterLayer::allocateBuffer() +{ + adapter_buf_ = (T*)allocator_->reMalloc(adapter_buf_, sizeof(T) * max_token_size_ * hidden_size_, false); +} + +template +void LinearAdapterLayer::allocateBuffer(size_t token_size) +{ + adapter_buf_ = (T*)allocator_->reMalloc(adapter_buf_, sizeof(T) * token_size * hidden_size_, false); +} + +template +void LinearAdapterLayer::freeBuffer() +{ + if (adapter_buf_) { + allocator_->free(reinterpret_cast(&adapter_buf_)); + } +} + +template +void LinearAdapterLayer::forward(Tensor* output, const Tensor* input, const LinearAdapterWeight* adapter_weight) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + + auto* const output_data = output->getPtr(); + auto* const input_data = input->getPtr(); + auto* const gamma = adapter_weight->layer_norm_weight.gamma; + auto* const beta = adapter_weight->layer_norm_weight.beta; + auto const m = input->shape[0]; + auto const n = input->shape[1]; + FT_CHECK(n == hidden_size_); + FT_CHECK(output->shape[0] == m); + FT_CHECK(output->shape[1] == n); + allocateBuffer(m); + + Tensor adapter_tensor{MemoryType::MEMORY_GPU, getTensorType(), {m, n}, adapter_buf_}; + TensorMap output_map{{{"ffn_output", adapter_tensor}}}; + + if (layer_norm_type_ == LayerNormType::pre_layernorm) { + invokeGeneralLayerNorm( + adapter_buf_, input_data, gamma, beta, layer_norm_eps_, m, n, nullptr, 0, ffn_layer_->getStream()); + TensorMap input_map{{{"ffn_input", adapter_tensor}}}; + ffn_layer_->forward(&output_map, &input_map, &adapter_weight->ffn_weight); + } + else if (layer_norm_type_ == LayerNormType::post_layernorm) { + Tensor input_tensor{MemoryType::MEMORY_GPU, getTensorType(), {m, n}, input_data}; + TensorMap input_map{{{"ffn_input", input_tensor}}}; + ffn_layer_->forward(&output_map, &input_map, &adapter_weight->ffn_weight); + invokeGeneralLayerNorm( + adapter_buf_, adapter_buf_, gamma, beta, layer_norm_eps_, m, n, nullptr, 0, ffn_layer_->getStream()); + } + else { + FT_CHECK_WITH_INFO(false, "Unsupported layer norm type"); + } + + invokeT5AddResidual(output_data, adapter_buf_, m, n, ffn_layer_->getStream()); + + if (is_free_buffer_after_forward_) { + freeBuffer(); + } +} + +template class LinearAdapterLayer; +template class LinearAdapterLayer; +#ifdef ENABLE_BF16 +template class LinearAdapterLayer<__nv_bfloat16>; +#endif + +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/layers/adapter_layers/LinearAdapterLayer.h b/src/fastertransformer/layers/adapter_layers/LinearAdapterLayer.h new file mode 100644 index 000000000..dbf63e596 --- /dev/null +++ b/src/fastertransformer/layers/adapter_layers/LinearAdapterLayer.h @@ -0,0 +1,128 @@ +/* + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include +#include + +#include "src/fastertransformer/kernels/layernorm_kernels.h" +#include "src/fastertransformer/layers/BaseLayer.h" +#include "src/fastertransformer/layers/FfnLayer.h" +#include "src/fastertransformer/layers/adapter_layers/LinearAdapterWeight.h" +#include "src/fastertransformer/utils/custom_ar_comm.h" +#include "src/fastertransformer/utils/nccl_utils.h" + +namespace fastertransformer { + +class LinearAdapterConfig { +public: + LinearAdapterConfig(): inter_size_{0}, layer_norm_type_{LayerNormType::InvalidType} {} + + LinearAdapterConfig(std::size_t inter_size, LayerNormType layer_norm_type): + inter_size_{inter_size}, layer_norm_type_{layer_norm_type} + { + } + + LinearAdapterConfig(const LinearAdapterConfig& other) = default; + LinearAdapterConfig& operator=(const LinearAdapterConfig& other) = default; + + std::size_t interSize() const + { + return inter_size_; + } + + void interSize(std::size_t inter_size) + { + inter_size_ = inter_size; + } + + LayerNormType layerNormType() const + { + return layer_norm_type_; + } + + void layerNormType(LayerNormType layer_norm_type) + { + layer_norm_type_ = layer_norm_type; + } + + void layerNormType(std::string const& layer_norm_type) + { + layer_norm_type_ = toLayerNormType(layer_norm_type); + } + + bool enabled() const + { + return inter_size_ > 0; + } + + std::string toString() const; + + static std::string toString(LayerNormType layer_norm_type); + + static LayerNormType toLayerNormType(std::string const& layer_norm_type); + +private: + std::size_t inter_size_; + LayerNormType layer_norm_type_; +}; + +template +class LinearAdapterLayer: public BaseLayer { +public: + LinearAdapterLayer(LinearAdapterConfig const& config, + std::size_t max_batch_size, + std::size_t max_seq_len, + std::size_t hidden_size, + NcclParam const& tensor_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool is_sparse, + std::shared_ptr custom_all_reduce_comm = nullptr, + int enable_custom_all_reduce = 0, + float layer_norm_eps = 1e-6f); + ~LinearAdapterLayer() override; + + LinearAdapterLayer(LinearAdapterLayer const&) = delete; + LinearAdapterLayer& operator=(LinearAdapterLayer const&) = delete; + + virtual void forward(Tensor* output, Tensor const* input, const LinearAdapterWeight* adapter_weight); + + void setStream(cudaStream_t stream) override + { + BaseLayer::setStream(stream); + ffn_layer_->setStream(stream); + } + +protected: + void allocateBuffer() override; + void allocateBuffer(std::size_t token_size); + void freeBuffer() override; + + T* adapter_buf_ = nullptr; + +private: + std::unique_ptr> ffn_layer_; + LayerNormType const layer_norm_type_; + float const layer_norm_eps_; + std::size_t const max_token_size_; + std::size_t const hidden_size_; +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/adapter_layers/LinearAdapterWeight.h b/src/fastertransformer/layers/adapter_layers/LinearAdapterWeight.h new file mode 100644 index 000000000..96db24401 --- /dev/null +++ b/src/fastertransformer/layers/adapter_layers/LinearAdapterWeight.h @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/kernels/layernorm_kernels.h" +#include "src/fastertransformer/layers/FfnWeight.h" + +namespace fastertransformer { + +template +struct LinearAdapterWeight { + // Layer Norm Weights + LayerNormWeight layer_norm_weight; + // FFN Weights + FfnWeight ffn_weight; + + DenseWeight& input_weight() + { + return ffn_weight.intermediate_weight; + } + + DenseWeight& output_weight() + { + return ffn_weight.output_weight; + } +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/attention_layers/AttentionWeight.h b/src/fastertransformer/layers/attention_layers/AttentionWeight.h index 5a9bee17c..673cbe9ff 100644 --- a/src/fastertransformer/layers/attention_layers/AttentionWeight.h +++ b/src/fastertransformer/layers/attention_layers/AttentionWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -20,14 +20,14 @@ namespace fastertransformer { -template +template struct AttentionWeight { - DenseWeight query_weight; - DenseWeight key_weight; - DenseWeight value_weight; - DenseWeight attention_output_weight; - DenseWeight ia3_key_weight; - DenseWeight ia3_value_weight; + DenseWeight query_weight; + DenseWeight key_weight; + DenseWeight value_weight; + DenseWeight attention_output_weight; + DenseWeight ia3_key_weight; + DenseWeight ia3_value_weight; }; } // namespace fastertransformer diff --git a/src/fastertransformer/layers/attention_layers/BaseAttentionLayer.h b/src/fastertransformer/layers/attention_layers/BaseAttentionLayer.h index 4715e5b63..e34e8af52 100644 --- a/src/fastertransformer/layers/attention_layers/BaseAttentionLayer.h +++ b/src/fastertransformer/layers/attention_layers/BaseAttentionLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -25,6 +25,7 @@ #include "src/fastertransformer/utils/Tensor.h" #include "src/fastertransformer/utils/allocator.h" #include "src/fastertransformer/utils/cublasMMWrapper.h" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" #include "src/fastertransformer/utils/memory_utils.h" namespace fastertransformer { @@ -51,7 +52,7 @@ AttentionType getAttentionType(size_t size_per_head, const bool causal_mask = false) { - if (std::is_same::value && is_fuse == true) { + if (std::is_same::value && is_fuse) { // Bert/Vit if (!causal_mask) { if (!with_swin_relative_position_bias @@ -74,6 +75,18 @@ AttentionType getAttentionType(size_t size_per_head, } } } +#ifdef ENABLE_FP8 + else if (std::is_same::value && is_fuse) { + if (!causal_mask) { + if (sm == kSM_90 && max_seq_len < 512 && is_fuse && size_per_head == 64) { + return remove_padding ? AttentionType::FUSED_MHA : AttentionType::FUSED_PADDED_MHA; + } + else { + return remove_padding ? AttentionType::UNFUSED_MHA : AttentionType::UNFUSED_PADDED_MHA; + } + } + } +#endif return remove_padding ? AttentionType::UNFUSED_MHA : AttentionType::UNFUSED_PADDED_MHA; } @@ -103,6 +116,11 @@ inline bool isUnPaddedMHA(AttentionType attention_type) return attention_type == AttentionType::FUSED_MHA || attention_type == AttentionType::UNFUSED_MHA; } +inline bool isPaddedMHA(AttentionType attention_type) +{ + return attention_type == AttentionType::FUSED_PADDED_MHA || attention_type == AttentionType::UNFUSED_PADDED_MHA; +} + inline AttentionType getUnfusedAttentionType(AttentionType attention_type) { if (attention_type == AttentionType::FUSED_MHA) { diff --git a/src/fastertransformer/layers/attention_layers/CMakeLists.txt b/src/fastertransformer/layers/attention_layers/CMakeLists.txt index 6d8fd6b84..1f0e93b1b 100644 --- a/src/fastertransformer/layers/attention_layers/CMakeLists.txt +++ b/src/fastertransformer/layers/attention_layers/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -37,17 +37,22 @@ target_link_libraries(LongformerAttentionLayer PUBLIC -lcublas -lcudart cublasMM add_library(DecoderSelfAttentionLayer STATIC DecoderSelfAttentionLayer.cc) set_property(TARGET DecoderSelfAttentionLayer PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET DecoderSelfAttentionLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) -target_link_libraries(DecoderSelfAttentionLayer PUBLIC -lcublas -lcudart cublasMMWrapper memory_utils decoder_masked_multihead_attention fpA_intB_gemm tensor) +target_link_libraries(DecoderSelfAttentionLayer PUBLIC -lcublas -lcudart cublasMMWrapper memory_utils decoder_masked_multihead_attention fpA_intB_gemm int8_gemm tensor nvtx_utils) add_library(GptContextAttentionLayer STATIC GptContextAttentionLayer.cc) set_property(TARGET GptContextAttentionLayer PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET GptContextAttentionLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) -target_link_libraries(GptContextAttentionLayer PUBLIC -lcublas -lcudart cublasMMWrapper memory_utils unfused_attention_kernels trt_fused_multi_head_attention fpA_intB_gemm) +target_link_libraries(GptContextAttentionLayer PUBLIC -lcublas -lcudart cublasMMWrapper memory_utils unfused_attention_kernels trt_fused_multi_head_attention fpA_intB_gemm int8_gemm nvtx_utils) + +add_library(DisentangledAttentionLayer STATIC DisentangledAttentionLayer.cc) +set_property(TARGET DisentangledAttentionLayer PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET DisentangledAttentionLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(DisentangledAttentionLayer PUBLIC -lcublas -lcudart cublasMMWrapper memory_utils disentangled_attention_kernels unfused_attention_kernels) add_library(TensorParallelDecoderSelfAttentionLayer STATIC TensorParallelDecoderSelfAttentionLayer.cc) set_property(TARGET TensorParallelDecoderSelfAttentionLayer PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET TensorParallelDecoderSelfAttentionLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) -target_link_libraries(TensorParallelDecoderSelfAttentionLayer PUBLIC -lcudart DecoderSelfAttentionLayer nccl_utils custom_ar_kernels) +target_link_libraries(TensorParallelDecoderSelfAttentionLayer PUBLIC -lcudart DecoderSelfAttentionLayer nccl_utils custom_ar_kernels nvtx_utils) add_library(TensorParallelDecoderCrossAttentionLayer STATIC TensorParallelDecoderCrossAttentionLayer.cc) set_property(TARGET TensorParallelDecoderCrossAttentionLayer PROPERTY POSITION_INDEPENDENT_CODE ON) @@ -57,13 +62,18 @@ target_link_libraries(TensorParallelDecoderCrossAttentionLayer PUBLIC -lcudart D add_library(TensorParallelGptContextAttentionLayer STATIC TensorParallelGptContextAttentionLayer.cc) set_property(TARGET TensorParallelGptContextAttentionLayer PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET TensorParallelGptContextAttentionLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) -target_link_libraries(TensorParallelGptContextAttentionLayer PUBLIC -lcudart GptContextAttentionLayer nccl_utils custom_ar_kernels) +target_link_libraries(TensorParallelGptContextAttentionLayer PUBLIC -lcudart GptContextAttentionLayer nccl_utils custom_ar_kernels nvtx_utils) add_library(TensorParallelUnfusedAttentionLayer STATIC TensorParallelUnfusedAttentionLayer.cc) set_property(TARGET TensorParallelUnfusedAttentionLayer PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET TensorParallelUnfusedAttentionLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) target_link_libraries(TensorParallelUnfusedAttentionLayer PUBLIC -lcudart UnfusedAttentionLayer nccl_utils) +add_library(TensorParallelDisentangledAttentionLayer STATIC TensorParallelDisentangledAttentionLayer.cc) +set_property(TARGET TensorParallelDisentangledAttentionLayer PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET TensorParallelDisentangledAttentionLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(TensorParallelDisentangledAttentionLayer PUBLIC -lcudart DisentangledAttentionLayer nccl_utils) + add_library(WindowAttention STATIC WindowAttention.cc) set_property(TARGET WindowAttention PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET WindowAttention PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) diff --git a/src/fastertransformer/layers/attention_layers/DecoderCrossAttentionLayer.cu b/src/fastertransformer/layers/attention_layers/DecoderCrossAttentionLayer.cu index 7cca3898b..7d022c4f4 100644 --- a/src/fastertransformer/layers/attention_layers/DecoderCrossAttentionLayer.cu +++ b/src/fastertransformer/layers/attention_layers/DecoderCrossAttentionLayer.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/attention_layers/DecoderCrossAttentionLayer.h b/src/fastertransformer/layers/attention_layers/DecoderCrossAttentionLayer.h index e35ae0cab..5a4649219 100644 --- a/src/fastertransformer/layers/attention_layers/DecoderCrossAttentionLayer.h +++ b/src/fastertransformer/layers/attention_layers/DecoderCrossAttentionLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/attention_layers/DecoderSelfAttentionLayer.cc b/src/fastertransformer/layers/attention_layers/DecoderSelfAttentionLayer.cc index 8a2b28a93..7ff426128 100644 --- a/src/fastertransformer/layers/attention_layers/DecoderSelfAttentionLayer.cc +++ b/src/fastertransformer/layers/attention_layers/DecoderSelfAttentionLayer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -17,6 +17,8 @@ #include "src/fastertransformer/layers/attention_layers/DecoderSelfAttentionLayer.h" #include "src/fastertransformer/kernels/decoder_masked_multihead_attention.h" #include "src/fastertransformer/utils/logger.h" +#include "src/fastertransformer/utils/memory_utils.h" +#include "src/fastertransformer/utils/nvtx_utils.h" namespace fastertransformer { @@ -138,7 +140,9 @@ void fusedQKV_masked_attention_dispatch(const T* qkv_buf, params.attention_out_scale = attention_out_scale; } + PUSH_RANGE("scaled dot-product fusion"); masked_multihead_attention(params, stream); + POP_RANGE; } #define INSTANTIATE_FUSEDQKV_MASKED_ATTENTION_DISPATCH(T) \ @@ -187,23 +191,7 @@ INSTANTIATE_FUSEDQKV_MASKED_ATTENTION_DISPATCH(__nv_bfloat16); template void DecoderSelfAttentionLayer::allocateBuffer() { - const size_t type_size = int8_mode_ == 2 ? sizeof(int8_t) : sizeof(T); - if (is_allocate_buffer_ == false) { - qkv_buf_ = reinterpret_cast( - allocator_->reMalloc(qkv_buf_, type_size * max_batch_size_ * 3 * local_hidden_units_, false)); - context_buf_ = reinterpret_cast( - allocator_->reMalloc(context_buf_, type_size * max_batch_size_ * local_hidden_units_, false)); - - if (int8_mode_ == 1) { - // We use max_size for n and k since we reuse buffers for both FCs and want to allocate the max - // possible memory that would be required by any of the individual gemms. - const int max_size = std::max(d_model_, 3 * local_hidden_units_); - mixed_gemm_ws_bytes_ = weight_only_int8_fc_runner_->getWorkspaceSize(max_batch_size_, max_size, max_size); - mixed_gemm_workspace_ = (char*)allocator_->reMalloc(mixed_gemm_workspace_, mixed_gemm_ws_bytes_, false); - } - - is_allocate_buffer_ = true; - } + FT_CHECK_WITH_INFO(false, "Deprecated. Use `allocateBuffer(size_t batch_size)` instead"); } template @@ -223,6 +211,12 @@ void DecoderSelfAttentionLayer::allocateBuffer(size_t batch_size) mixed_gemm_ws_bytes_ = weight_only_int8_fc_runner_->getWorkspaceSize(batch_size, max_size, max_size); mixed_gemm_workspace_ = (char*)allocator_->reMalloc(mixed_gemm_workspace_, mixed_gemm_ws_bytes_, false); } + else if (int8_mode_ == 2) { + const int max_size = std::max(d_model_, 3 * local_hidden_units_); + int8_gemm_ws_bytes_ = int8_fc_runner_->getWorkspaceSize(batch_size, max_size, max_size); + int8_gemm_workspace_ = (char*)allocator_->reMalloc(int8_gemm_workspace_, int8_gemm_ws_bytes_, false); + } + is_allocate_buffer_ = true; } @@ -280,6 +274,7 @@ DecoderSelfAttentionLayer::DecoderSelfAttentionLayer(size_t max_bat neox_rotary_style_(neox_rotary_style), d_model_(d_model), q_scaling_(q_scaling), + int8_fc_runner_(int8_mode == 2 ? std::make_shared>() : nullptr), int8_mode_(int8_mode) { FT_CHECK(size_per_head_ == 32 || size_per_head_ == 48 || size_per_head_ == 64 || size_per_head_ == 80 @@ -520,6 +515,7 @@ void DecoderSelfAttentionLayer::forward(TensorMap* output_tens constexpr bool use_sparse_gemm = false; #endif + PUSH_RANGE("qkv_gemm"); if (use_sparse_gemm) { #ifdef SPARSITY_ENABLED cublas_wrapper_->SpGemm(CUBLAS_OP_N, @@ -581,6 +577,7 @@ void DecoderSelfAttentionLayer::forward(TensorMap* output_tens } } sync_check_cuda_error(); + POP_RANGE; fusedQKV_masked_attention_dispatch( qkv_buf_, attention_weights->query_weight.bias, @@ -617,6 +614,7 @@ void DecoderSelfAttentionLayer::forward(TensorMap* output_tens stream_); sync_check_cuda_error(); + PUSH_RANGE("proj gemm"); #ifdef SPARSITY_ENABLED use_sparse_gemm = sparse_ && cublas_wrapper_->isUseSparse(1, d_model_, m_padded, local_hidden_units_); #endif @@ -652,15 +650,18 @@ void DecoderSelfAttentionLayer::forward(TensorMap* output_tens stream_); } else if (int8_mode_ == 2) { - cublas_wrapper_->Int8Gemm(d_model_, - batch_size, - local_hidden_units_, - attention_weights->attention_output_weight.int8_kernel, - local_hidden_units_, - reinterpret_cast(context_buf_), - local_hidden_units_, - output_tensors->getPtr("hidden_features"), - d_model_); + int8_fc_runner_->gemm(reinterpret_cast(context_buf_), + attention_weights->attention_output_weight.int8_kernel, + QuantMode::PerTensorQuant, + attention_weights->attention_output_weight.scale_inter, + attention_weights->attention_output_weight.scale_out, + output_tensors->getPtr("hidden_features"), + batch_size, + d_model_, + local_hidden_units_, + nullptr, + 0, + stream_); } else { cublas_wrapper_->Gemm(CUBLAS_OP_N, @@ -677,6 +678,7 @@ void DecoderSelfAttentionLayer::forward(TensorMap* output_tens } sync_check_cuda_error(); } + POP_RANGE; if (is_free_buffer_after_forward_) { freeBuffer(); diff --git a/src/fastertransformer/layers/attention_layers/DecoderSelfAttentionLayer.h b/src/fastertransformer/layers/attention_layers/DecoderSelfAttentionLayer.h index d7bbd586d..1b1644e64 100644 --- a/src/fastertransformer/layers/attention_layers/DecoderSelfAttentionLayer.h +++ b/src/fastertransformer/layers/attention_layers/DecoderSelfAttentionLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -17,6 +17,7 @@ #pragma once #include "src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm.h" +#include "src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm.h" #include "src/fastertransformer/kernels/matrix_vector_multiplication.h" #include "src/fastertransformer/layers/attention_layers/BaseAttentionLayer.h" @@ -40,6 +41,7 @@ class DecoderSelfAttentionLayer: public BaseAttentionLayer { const bool neox_rotary_style_; std::shared_ptr> weight_only_int8_fc_runner_; + std::shared_ptr> int8_fc_runner_; void allocateBuffer() override; void freeBuffer() override; @@ -55,6 +57,8 @@ class DecoderSelfAttentionLayer: public BaseAttentionLayer { T* context_buf_ = nullptr; char* mixed_gemm_workspace_ = nullptr; size_t mixed_gemm_ws_bytes_ = 0; + char* int8_gemm_workspace_ = nullptr; + size_t int8_gemm_ws_bytes_ = 0; using BaseAttentionLayer::stream_; using BaseAttentionLayer::sparse_; using BaseAttentionLayer::allocator_; diff --git a/src/fastertransformer/layers/attention_layers/DisentangledAttentionLayer.cc b/src/fastertransformer/layers/attention_layers/DisentangledAttentionLayer.cc new file mode 100644 index 000000000..435b41e9c --- /dev/null +++ b/src/fastertransformer/layers/attention_layers/DisentangledAttentionLayer.cc @@ -0,0 +1,601 @@ +/* + * Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/layers/attention_layers/DisentangledAttentionLayer.h" +#include "src/fastertransformer/kernels/disentangled_attention_kernels.h" +#include "src/fastertransformer/kernels/unfused_attention_kernels.h" + +namespace fastertransformer { + +template +void DisentangledAttentionLayer::forward(TensorMap* output_tensors, + TensorMap* input_tensors, + const AttentionWeight* attention_weights) +{ + // input_tensors: + // input_query [token_num, d_model], + // attention_mask [batch, 1, seqlen, seqlen], + // relative_embeddings [2*attention_span, hidden_size], + // padding_offset [token_num] (optional) + // output_tensors: + // hidden_features [token_num, hidden_units] + // attentions [batch, num_layer, head_num, seqlen, seqlen] (optional) + // If padding_offset.data is nullptr, then not remove padding + + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + const size_t request_batch_size = input_tensors->at("attention_mask").shape[0]; + const size_t request_seq_len = input_tensors->at("attention_mask").shape[2]; + const bool output_attentions = output_tensors->isExist("attentions"); + allocateBuffer(request_batch_size, request_seq_len); + + T* hidden_features = output_tensors->getPtr("hidden_features"); + const T* from_tensor = input_tensors->getPtr("input_query"); + const T* attention_mask = input_tensors->getPtr("attention_mask"); + const T* relative_embeddings = input_tensors->getPtr("relative_embeddings"); + const int* padding_offset = input_tensors->getPtr("padding_offset", nullptr); + + const int m = input_tensors->at("input_query").shape[0]; // total_valid_tokens + int k = d_model_; // hidden size + int n = hidden_units_; // num_heads * head_size + int s = attention_span_; // relative attention span ("k" in original paper) + + // Compute Q,K,V [token_num, hidden_size] --> [token_num, num_heads*head_size] +#ifdef SPARSITY_ENABLED + int m_tmp = m; + if (m_tmp % 8 != 0) { + m_tmp = (m_tmp / 8 + 1) * 8; + } + const int m_padded = m_tmp; + + if (sparse_ && cublas_wrapper_->isUseSparse(1, n, m, k)) { + cublas_wrapper_->SpGemm( + CUBLAS_OP_N, CUBLAS_OP_N, n, m_padded, k, attention_weights->query_weight.sp_kernel, from_tensor, q_buf_); + cublas_wrapper_->SpGemm( + CUBLAS_OP_N, CUBLAS_OP_N, n, m_padded, k, attention_weights->key_weight.sp_kernel, from_tensor, k_buf_); + cublas_wrapper_->SpGemm( + CUBLAS_OP_N, CUBLAS_OP_N, n, m_padded, k, attention_weights->value_weight.sp_kernel, from_tensor, v_buf_); + } + else { +#endif + const bool is_batched_QKV_ = cublas_wrapper_->isFuseBatchGemm(3, n, m, k); + if (is_batched_QKV_) { + const T* hA[]{attention_weights->query_weight.kernel, + attention_weights->key_weight.kernel, + attention_weights->value_weight.kernel, + nullptr, + from_tensor, + from_tensor, + from_tensor, + nullptr, + q_buf_, + k_buf_, + v_buf_, + nullptr}; + // Note: Here, we assume the weights of each time may be different. + // If we can preprocess these weights before inference, we can reduce the overhead + // caused by cudaMemcpyAsync + cudaMemcpyAsync((void*)batch_qkv_kernel_ptr_, hA, sizeof(T*) * 12, cudaMemcpyHostToDevice, stream_); + cublas_wrapper_->batchedGemm(CUBLAS_OP_N, + CUBLAS_OP_N, + n, + m, + k, + (const void* const*)batch_qkv_kernel_ptr_, + n, + (const void* const*)batch_qkv_input_ptr_, + k, + (void* const*)batch_qkv_buf_ptr_, + n, + 3); + } + else { + cublas_wrapper_->Gemm(CUBLAS_OP_N, + CUBLAS_OP_N, + n, + m, + k, + attention_weights->query_weight.kernel, + n, + from_tensor, + k, + q_buf_, + n); + + cublas_wrapper_->Gemm( + CUBLAS_OP_N, CUBLAS_OP_N, n, m, k, attention_weights->key_weight.kernel, n, from_tensor, k, k_buf_, n); + + cublas_wrapper_->Gemm(CUBLAS_OP_N, + CUBLAS_OP_N, + n, + m, + k, + attention_weights->value_weight.kernel, + n, + from_tensor, + k, + v_buf_, + n); + } +#ifdef SPARSITY_ENABLED + } +#endif + + // add QKV bias (bias optional, can be nullptr) & permute + // [batch, seq_len, num_heads*head_size] or [token_num, num_heads*head_size] --> [batch, num_heads, seq_len, + // head_size] Note: aligned to padded seq len again + if (padding_offset == nullptr) { + invokeAddQKVBiasIA3Transpose(q_buf_2_, + k_buf_2_, + v_buf_2_, + q_buf_, + attention_weights->query_weight.bias, + k_buf_, + attention_weights->key_weight.bias, + v_buf_, + attention_weights->value_weight.bias, + request_batch_size, + request_seq_len, + head_num_, + size_per_head_, + (int*)nullptr, // suppress IA3 inputs + (T*)nullptr, + (T*)nullptr, + stream_); + sync_check_cuda_error(); + } + else { + cudaMemsetAsync(q_buf_2_, 0, 3 * request_batch_size * request_seq_len * hidden_units_ * sizeof(T), stream_); + sync_check_cuda_error(); + invokeAddQKVBiasIA3RebuildPadding(q_buf_, + attention_weights->query_weight.bias, + k_buf_, + attention_weights->key_weight.bias, + v_buf_, + attention_weights->value_weight.bias, + q_buf_2_, + k_buf_2_, + v_buf_2_, + request_batch_size, + request_seq_len, + head_num_, + size_per_head_, + m, + padding_offset, + (int*)nullptr, // suppress IA3 inputs + (T*)nullptr, + (T*)nullptr, + stream_); + sync_check_cuda_error(); + } + + float scalar = 1 / (sqrtf(size_per_head_ * 1.0f) * q_scaling_); + + // compute Q*K [batch, num_heads, q_seq_len, k_seq_len] + cublas_wrapper_->stridedBatchedGemm(CUBLAS_OP_T, + CUBLAS_OP_N, + request_seq_len, + request_seq_len, + size_per_head_, + k_buf_2_, + size_per_head_, + request_seq_len * size_per_head_, + q_buf_2_, + size_per_head_, + request_seq_len * size_per_head_, + qk_buf_, + request_seq_len, + request_seq_len * request_seq_len, + request_batch_size * head_num_, /* batch size */ + scalar /* alpha */); + + // above is content-to-content "c2c" attention, Qc*Kc^T + // similarly, disentangled attention has two extra type of attentions (replacing the normal relative attention bias + // w/ real attentions) + + // compute Qr, Kr [2*attention_span, hidden_size] --> [2*attention_span, num_heads*head_size] +#ifdef SPARSITY_ENABLED + int tmp_2k = 2 * s; + if (tmp_2k % 8 != 0) { + tmp_2k = (tmp_2k / 8 + 1) * 8; + } + const int padded_2k = tmp_2k; + + if (sparse_ && cublas_wrapper_->isUseSparse(1, n, 2 * s, k)) { + cublas_wrapper_->SpGemm(CUBLAS_OP_N, + CUBLAS_OP_N, + n, + padded_2k, + k, + attention_weights->query_weight.sp_kernel, + relative_embeddings, + q_rel_buf_); + cublas_wrapper_->SpGemm(CUBLAS_OP_N, + CUBLAS_OP_N, + n, + padded_2k, + k, + attention_weights->key_weight.sp_kernel, + relative_embeddings, + k_rel_buf_); + } + else { +#endif + const bool is_batched_QK_rel_ = cublas_wrapper_->isFuseBatchGemm(2, n, 2 * s, k); + if (is_batched_QK_rel_) { + const T* hA[]{attention_weights->query_weight.kernel, + attention_weights->key_weight.kernel, + nullptr, + relative_embeddings, + relative_embeddings, + nullptr, + q_rel_buf_, + k_rel_buf_, + nullptr}; + // Note: Here, we assume the weights of each time may be different. + // If we can preprocess these weights before inference, we can reduce the overhead + // caused by cudaMemcpyAsync + cudaMemcpyAsync((void*)batch_qk_rel_kernel_ptr_, hA, sizeof(T*) * 9, cudaMemcpyHostToDevice, stream_); + cublas_wrapper_->batchedGemm(CUBLAS_OP_N, + CUBLAS_OP_N, + n, + 2 * s, + k, + (const void* const*)batch_qk_rel_kernel_ptr_, + n, + (const void* const*)batch_qk_rel_input_ptr_, + k, + (void* const*)batch_qk_rel_buf_ptr_, + n, + 2); + } + else { + cublas_wrapper_->Gemm(CUBLAS_OP_N, + CUBLAS_OP_N, + n, + 2 * s, + k, + attention_weights->query_weight.kernel, + n, + relative_embeddings, + k, + q_rel_buf_, + n); + + cublas_wrapper_->Gemm(CUBLAS_OP_N, + CUBLAS_OP_N, + n, + 2 * s, + k, + attention_weights->key_weight.kernel, + n, + relative_embeddings, + k, + k_rel_buf_, + n); + } +#ifdef SPARSITY_ENABLED + } +#endif + + // add QK bias & permute & repeat [2*attention_span, num_heads*head_size] --> [batch, num_heads, 2*attention_span, + // head_size]. Relative position embedding is constant across all batches, so need to repeat for later gemm + invokeAddQKBiasTransposeRepeat(q_rel_buf_2_, + k_rel_buf_2_, + q_rel_buf_, + attention_weights->query_weight.bias, + k_rel_buf_, + attention_weights->key_weight.bias, + request_batch_size, + 2 * s, + head_num_, + size_per_head_, + stream_); + sync_check_cuda_error(); + + // compute content-to-position "c2p" attention, Qc*Kr^T [batch, num_heads, seq_len, 2*attention_span] + cublas_wrapper_->stridedBatchedGemm(CUBLAS_OP_T, + CUBLAS_OP_N, + 2 * s, + request_seq_len, + size_per_head_, + k_rel_buf_2_, + size_per_head_, + 2 * s * size_per_head_, + q_buf_2_, + size_per_head_, + request_seq_len * size_per_head_, + QcKr_buf_, + 2 * s, + request_seq_len * 2 * s, + request_batch_size * head_num_, /* batch size */ + scalar /* alpha */); + + // compute position-to-content "p2c" attention, Kc*Qr^T [batch, num_heads, seq_len, 2*attention_span] + cublas_wrapper_->stridedBatchedGemm(CUBLAS_OP_T, + CUBLAS_OP_N, + 2 * s, + request_seq_len, + size_per_head_, + q_rel_buf_2_, + size_per_head_, + 2 * s * size_per_head_, + k_buf_2_, + size_per_head_, + request_seq_len * size_per_head_, + KcQr_buf_, + 2 * s, + request_seq_len * 2 * s, + request_batch_size * head_num_, /* batch size */ + scalar /* alpha */); + + // gather & add c2c+c2p+p2c. In-place operation + invokeDisentangledAttention( + qk_buf_, qk_buf_, QcKr_buf_, KcQr_buf_, request_batch_size * head_num_, request_seq_len, s, stream_); + sync_check_cuda_error(); + + // softmax(QK) + MaskedSoftmaxParam param; + param.attention_score = qk_buf_; // (batch_size, head_num, q_length, k_length) + param.qk = qk_buf_; // (batch_size, head_num, q_length, k_length) + param.attention_mask = attention_mask; // (batch_size, q_length, k_length) + param.batch_size = request_batch_size; + param.q_length = request_seq_len; + param.k_length = request_seq_len; + param.num_heads = head_num_; + param.qk_scale = 1.0f; + param.linear_bias_slopes = nullptr; + invokeMaskedSoftmax(param, stream_); + sync_check_cuda_error(); + + // save attention results + // Note: "transpose" is not transpose, it's just writting attention results to certain layer, [B, M, S, S] --> [B, + // L, M, S, S] + if (output_attentions) { + invokeTransposeAttentions(output_tensors->at("attentions"), + {MEMORY_GPU, + getTensorType(), + {request_batch_size, head_num_, request_seq_len, request_seq_len}, + qk_buf_}, + stream_); + } + sync_check_cuda_error(); + + // compute softmax(QK) * V + cublas_wrapper_->stridedBatchedGemm(CUBLAS_OP_N, + CUBLAS_OP_N, + size_per_head_, + request_seq_len, + request_seq_len, + v_buf_2_, + size_per_head_, + request_seq_len * size_per_head_, + qk_buf_, + request_seq_len, + request_seq_len * request_seq_len, + qkv_buf_, + size_per_head_, + request_seq_len * size_per_head_, + request_batch_size * head_num_); + + // permute [batch_size, num_heads, seq_len, head_size] --> [batch_size, seq_len, num_heads, head_size] or + // [token_num, num_heads, head_size] w/ padding removal + if (padding_offset == nullptr) { + invokeTransposeQKV(qkv_buf_2_, + qkv_buf_, + request_batch_size, + request_seq_len, + head_num_, + size_per_head_, + (float*)nullptr, + 0, + stream_); + sync_check_cuda_error(); + } + else { + invokeTransposeAttentionOutRemovePadding(qkv_buf_, + qkv_buf_2_, + m, + request_batch_size, + request_seq_len, + head_num_, + size_per_head_, + padding_offset, + (float*)nullptr, + 0, + stream_); + } + + // switch Linear dimension + k = hidden_units_; + n = d_model_; + + // attention output Linear layer (bias and layernorm are handled outside) +#ifdef SPARSITY_ENABLED + if (sparse_ && cublas_wrapper_->isUseSparse(1, n, m, k)) { + cublas_wrapper_->SpGemm(CUBLAS_OP_N, + CUBLAS_OP_N, + n, + m_padded, + k, + attention_weights->attention_output_weight.sp_kernel, + qkv_buf_2_, + hidden_features); + } + else { +#endif + cublas_wrapper_->Gemm(CUBLAS_OP_N, + CUBLAS_OP_N, + n, + m, + k, + attention_weights->attention_output_weight.kernel, + n, + qkv_buf_2_, + k, + hidden_features, + n); +#ifdef SPARSITY_ENABLED + } +#endif + + if (is_free_buffer_after_forward_ == true) { + freeBuffer(); + } + sync_check_cuda_error(); +} + +template +DisentangledAttentionLayer::DisentangledAttentionLayer(size_t max_batch_size, + size_t max_seq_len, + size_t head_num, + size_t size_per_head, + size_t attention_span, + float q_scaling, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool sparse): + DisentangledAttentionLayer(max_batch_size, + max_seq_len, + head_num, + size_per_head, + attention_span, + head_num * size_per_head, + q_scaling, + stream, + cublas_wrapper, + allocator, + is_free_buffer_after_forward, + sparse) +{ +} + +template +DisentangledAttentionLayer::DisentangledAttentionLayer(size_t max_batch_size, + size_t max_seq_len, + size_t head_num, + size_t size_per_head, + size_t attention_span, + size_t d_model, + float q_scaling, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool sparse): + BaseAttentionLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward), + head_num_(head_num), + size_per_head_(size_per_head), + hidden_units_(head_num_ * size_per_head_), + attention_span_(attention_span), + d_model_(d_model), + sparse_(sparse), + q_scaling_(q_scaling) +{ +} + +template +DisentangledAttentionLayer::DisentangledAttentionLayer(DisentangledAttentionLayer const& attention_layer): + BaseAttentionLayer(attention_layer.stream_, + attention_layer.cublas_wrapper_, + attention_layer.allocator_, + attention_layer.is_free_buffer_after_forward_), + head_num_(attention_layer.head_num_), + size_per_head_(attention_layer.size_per_head_), + hidden_units_(attention_layer.hidden_units_), + attention_span_(attention_layer.attention_span_), + d_model_(attention_layer.d_model_), + sparse_(attention_layer.sparse_), + q_scaling_(attention_layer.q_scaling_) +{ +} + +template +DisentangledAttentionLayer::~DisentangledAttentionLayer() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + cublas_wrapper_ = nullptr; + freeBuffer(); +} + +template +void DisentangledAttentionLayer::allocateBuffer() +{ + FT_CHECK(false); +} + +template +void DisentangledAttentionLayer::allocateBuffer(size_t batch_size, size_t seq_len) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + q_buf_ = (T*)allocator_->reMalloc(q_buf_, sizeof(T) * batch_size * seq_len * hidden_units_, false); + k_buf_ = (T*)allocator_->reMalloc(k_buf_, sizeof(T) * batch_size * seq_len * hidden_units_, false); + v_buf_ = (T*)allocator_->reMalloc(v_buf_, sizeof(T) * batch_size * seq_len * hidden_units_, false); + q_buf_2_ = (T*)allocator_->reMalloc(q_buf_2_, sizeof(T) * 3 * batch_size * seq_len * hidden_units_, false); + k_buf_2_ = q_buf_2_ + batch_size * seq_len * hidden_units_; + v_buf_2_ = k_buf_2_ + batch_size * seq_len * hidden_units_; + qk_buf_ = (T*)allocator_->reMalloc(qk_buf_, sizeof(T) * batch_size * head_num_ * seq_len * seq_len, false); + q_rel_buf_ = + (T*)allocator_->reMalloc(q_rel_buf_, sizeof(T) * 2 * 2 * attention_span_ * head_num_ * size_per_head_, false); + k_rel_buf_ = q_rel_buf_ + 2 * attention_span_ * head_num_ * size_per_head_; + q_rel_buf_2_ = (T*)allocator_->reMalloc( + q_rel_buf_2_, sizeof(T) * 2 * batch_size * head_num_ * 2 * attention_span_ * size_per_head_, false); + k_rel_buf_2_ = q_rel_buf_2_ + batch_size * head_num_ * 2 * attention_span_ * size_per_head_; + QcKr_buf_ = (T*)allocator_->reMalloc( + QcKr_buf_, sizeof(T) * 2 * batch_size * head_num_ * seq_len * 2 * attention_span_, false); + KcQr_buf_ = QcKr_buf_ + batch_size * head_num_ * seq_len * 2 * attention_span_; + qkv_buf_ = (T*)allocator_->reMalloc(qkv_buf_, sizeof(T) * batch_size * seq_len * hidden_units_, false); + qkv_buf_2_ = (T*)allocator_->reMalloc(qkv_buf_2_, sizeof(T) * batch_size * seq_len * hidden_units_, false); + batch_qkv_kernel_ptr_ = (T**)allocator_->reMalloc(batch_qkv_kernel_ptr_, sizeof(T*) * 12, false); + batch_qkv_input_ptr_ = batch_qkv_kernel_ptr_ + 4; + batch_qkv_buf_ptr_ = batch_qkv_input_ptr_ + 4; + batch_qk_rel_kernel_ptr_ = (T**)allocator_->reMalloc(batch_qk_rel_kernel_ptr_, sizeof(T*) * 9, false); + batch_qk_rel_input_ptr_ = batch_qk_rel_kernel_ptr_ + 3; + batch_qk_rel_buf_ptr_ = batch_qk_rel_input_ptr_ + 3; + + is_allocate_buffer_ = true; +} + +template +void DisentangledAttentionLayer::freeBuffer() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + if (is_allocate_buffer_) { + allocator_->free((void**)(&q_buf_)); + allocator_->free((void**)(&k_buf_)); + allocator_->free((void**)(&v_buf_)); + allocator_->free((void**)(&q_buf_2_)); + allocator_->free((void**)(&qk_buf_)); + allocator_->free((void**)(&q_rel_buf_)); + allocator_->free((void**)(&q_rel_buf_2_)); + allocator_->free((void**)(&QcKr_buf_)); + allocator_->free((void**)(&qkv_buf_)); + allocator_->free((void**)(&qkv_buf_2_)); + allocator_->free((void**)(&batch_qkv_kernel_ptr_)); + allocator_->free((void**)(&batch_qk_rel_kernel_ptr_)); + sync_check_cuda_error(); + is_allocate_buffer_ = false; + } +} + +template class DisentangledAttentionLayer; +template class DisentangledAttentionLayer; +#ifdef ENABLE_BF16 +template class DisentangledAttentionLayer<__nv_bfloat16>; +#endif + +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/attention_layers/DisentangledAttentionLayer.h b/src/fastertransformer/layers/attention_layers/DisentangledAttentionLayer.h new file mode 100644 index 000000000..e087693d7 --- /dev/null +++ b/src/fastertransformer/layers/attention_layers/DisentangledAttentionLayer.h @@ -0,0 +1,103 @@ +/* + * Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/layers/attention_layers/BaseAttentionLayer.h" + +namespace fastertransformer { + +template +class DisentangledAttentionLayer: public BaseAttentionLayer { +private: + // metadata + size_t head_num_; + size_t size_per_head_; + size_t hidden_units_; + size_t attention_span_; + size_t d_model_; + bool sparse_; + float q_scaling_; + + void allocateBuffer() override; + void freeBuffer() override; + void allocateBuffer(size_t batch_size, size_t seq_len); + +protected: + using BaseAttentionLayer::stream_; + using BaseAttentionLayer::is_free_buffer_after_forward_; + using BaseAttentionLayer::is_allocate_buffer_; + using BaseAttentionLayer::cublas_wrapper_; + using BaseAttentionLayer::allocator_; + + T* q_buf_ = nullptr; + T* k_buf_ = nullptr; + T* v_buf_ = nullptr; + T* q_buf_2_ = nullptr; + T* k_buf_2_ = nullptr; + T* v_buf_2_ = nullptr; + T* qk_buf_ = nullptr; + T* q_rel_buf_ = nullptr; + T* k_rel_buf_ = nullptr; + T* q_rel_buf_2_ = nullptr; + T* k_rel_buf_2_ = nullptr; + T* QcKr_buf_ = nullptr; + T* KcQr_buf_ = nullptr; + T* qkv_buf_ = nullptr; + T* qkv_buf_2_ = nullptr; + + T** batch_qkv_kernel_ptr_ = nullptr; + T** batch_qkv_input_ptr_ = nullptr; + T** batch_qkv_buf_ptr_ = nullptr; + T** batch_qk_rel_kernel_ptr_ = nullptr; + T** batch_qk_rel_input_ptr_ = nullptr; + T** batch_qk_rel_buf_ptr_ = nullptr; + +public: + DisentangledAttentionLayer(size_t max_batch_size, + size_t max_seq_len, + size_t head_num, + size_t size_per_head, + size_t attention_span, + float q_scaling, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool sparse = false); + + DisentangledAttentionLayer(size_t max_batch_size, + size_t max_seq_len, + size_t head_num, + size_t size_per_head, + size_t attention_span, + size_t d_model, + float q_scaling, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool sparse = false); + + DisentangledAttentionLayer(DisentangledAttentionLayer const& attention_layer); + + ~DisentangledAttentionLayer(); + + void + forward(TensorMap* output_tensors, TensorMap* input_tensors, const AttentionWeight* attention_weights) override; +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/attention_layers/FusedAttentionLayer.cu b/src/fastertransformer/layers/attention_layers/FusedAttentionLayer.cu index bd9aaa6c4..6a21736fa 100644 --- a/src/fastertransformer/layers/attention_layers/FusedAttentionLayer.cu +++ b/src/fastertransformer/layers/attention_layers/FusedAttentionLayer.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/attention_layers/FusedAttentionLayer.h b/src/fastertransformer/layers/attention_layers/FusedAttentionLayer.h index a7fe074c5..b11413fc8 100644 --- a/src/fastertransformer/layers/attention_layers/FusedAttentionLayer.h +++ b/src/fastertransformer/layers/attention_layers/FusedAttentionLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/attention_layers/GptContextAttentionLayer.cc b/src/fastertransformer/layers/attention_layers/GptContextAttentionLayer.cc index b9e7b29fe..2a5b7fecc 100644 --- a/src/fastertransformer/layers/attention_layers/GptContextAttentionLayer.cc +++ b/src/fastertransformer/layers/attention_layers/GptContextAttentionLayer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -17,6 +17,7 @@ #include "src/fastertransformer/layers/attention_layers/GptContextAttentionLayer.h" #include "src/fastertransformer/kernels/unfused_attention_kernels.h" +#include "src/fastertransformer/utils/nvtx_utils.h" namespace fastertransformer { @@ -56,6 +57,8 @@ void GptContextAttentionLayer::forward(TensorMap* output_tenso const int* padding_offset = input_tensors->getPtr("padding_offset", nullptr); int* cu_seqlens = input_tensors->getPtr("cu_seqlens", nullptr); T* linear_bias_slopes = input_tensors->getPtr("linear_bias_slopes", nullptr); + /* float* attention_query_dynamic_scale = input_tensors->getPtr("attention_query_dynamic_scale", + * nullptr); */ T* attention_out = output_tensors->at("hidden_features").getPtr(); T* attention_input = input_tensors->at("input_query").getPtr(); @@ -65,13 +68,17 @@ void GptContextAttentionLayer::forward(TensorMap* output_tenso FT_CHECK_WITH_INFO(attention_type != AttentionType::FUSED_PADDED_MHA, "Gpt Context FUSED_PADDED_MHA is not supported !"); + PUSH_RANGE("attention buffer alloc"); allocateBuffer(request_batch_size, request_seq_len + max_prompt_length, attention_type != AttentionType::FUSED_MHA); + POP_RANGE; sync_check_cuda_error(); const bool is_final = input_tensors->at("is_final_layer").getVal(); const int m = input_tensors->at("input_query").shape[0]; + PUSH_RANGE("qkv_gemm"); + #ifdef SPARSITY_ENABLED const int m_padded = 8 * div_up(m, 8); bool use_sparse = sparse_ && cublas_wrapper_->isUseSparse(1, 3 * local_hidden_units_, m_padded, hidden_units_); @@ -190,6 +197,7 @@ void GptContextAttentionLayer::forward(TensorMap* output_tenso } // NOTE: qkv buffer shape (batch_size, num_heads,L or prompt_len + L, Dh) + POP_RANGE; if (is_final == false) { const cudaDataType_t gemm_data_type = getCudaDataType(); const int attention_seq_len_1 = request_seq_len; // q length @@ -197,6 +205,7 @@ void GptContextAttentionLayer::forward(TensorMap* output_tenso const T qk_scale = static_cast(1.0f / sqrtf(size_per_head_ * 1.0f)); if (attention_type != AttentionType::FUSED_MHA) { if (is_qk_buf_float_ == true && gemm_data_type != CUDA_R_32F) { + PUSH_RANGE("Q*K batch gemm"); cublas_wrapper_->stridedBatchedGemm(CUBLAS_OP_T, CUBLAS_OP_N, attention_seq_len_2, // n @@ -220,7 +229,9 @@ void GptContextAttentionLayer::forward(TensorMap* output_tenso CUDA_R_32F); sync_check_cuda_error(); + POP_RANGE; + PUSH_RANGE("softmax"); MaskedSoftmaxParam param; param.attention_score = qk_buf_; // (batch_size, head_num, q_length, k_length) param.qk = qk_buf_float_; // (batch_size, head_num, q_length, k_length) @@ -233,8 +244,10 @@ void GptContextAttentionLayer::forward(TensorMap* output_tenso param.linear_bias_slopes = const_cast(linear_bias_slopes); // (head_num,), optional invokeMaskedSoftmax(param, stream_); sync_check_cuda_error(); + POP_RANGE; } else { + PUSH_RANGE("Q*K batch gemm"); cublas_wrapper_->stridedBatchedGemm(CUBLAS_OP_T, CUBLAS_OP_N, attention_seq_len_2, @@ -251,6 +264,8 @@ void GptContextAttentionLayer::forward(TensorMap* output_tenso attention_seq_len_2 * attention_seq_len_1, request_batch_size * local_head_num_); + POP_RANGE; + PUSH_RANGE("softmax"); MaskedSoftmaxParam param; param.attention_score = qk_buf_; // (batch_size, head_num, q_length, k_length) param.qk = qk_buf_; // (batch_size, head_num, q_length, k_length) @@ -263,8 +278,11 @@ void GptContextAttentionLayer::forward(TensorMap* output_tenso param.linear_bias_slopes = const_cast(linear_bias_slopes); // (head_num,), optional invokeMaskedSoftmax(param, stream_); sync_check_cuda_error(); + POP_RANGE; } + PUSH_RANGE("QK*V batch gemm"); + cublas_wrapper_->stridedBatchedGemm(CUBLAS_OP_N, CUBLAS_OP_N, size_per_head_, @@ -307,9 +325,11 @@ void GptContextAttentionLayer::forward(TensorMap* output_tenso int8_mode_, stream_); } + POP_RANGE; } sync_check_cuda_error(); + PUSH_RANGE("proj gemm"); #ifdef SPARSITY_ENABLED bool use_sparse = sparse_ && cublas_wrapper_->isUseSparse(1, hidden_units_, m_padded, local_hidden_units_); #endif @@ -345,15 +365,18 @@ void GptContextAttentionLayer::forward(TensorMap* output_tenso stream_); } else if (int8_mode_ == 2) { - cublas_wrapper_->Int8Gemm(hidden_units_, - m, - local_hidden_units_, - attention_weights->attention_output_weight.int8_kernel, - local_hidden_units_, - reinterpret_cast(qkv_buf_3_), - local_hidden_units_, - output_tensors->at("hidden_features").getPtr(), - hidden_units_); + int8_fc_runner_->gemm(reinterpret_cast(qkv_buf_3_), + attention_weights->attention_output_weight.int8_kernel, + QuantMode::PerTensorQuant, + attention_weights->attention_output_weight.scale_inter, + attention_weights->attention_output_weight.scale_out, + output_tensors->at("hidden_features").getPtr(), + m, + hidden_units_, + local_hidden_units_, + nullptr, + 0, + stream_); } else { cublas_wrapper_->Gemm(CUBLAS_OP_N, @@ -369,6 +392,7 @@ void GptContextAttentionLayer::forward(TensorMap* output_tenso hidden_units_); } } + POP_RANGE; } if (is_free_buffer_after_forward_ == true) { @@ -402,6 +426,7 @@ GptContextAttentionLayer::GptContextAttentionLayer(size_t max_batch neox_rotary_style_(false), is_qk_buf_float_(is_qk_buf_float || int8_mode == 2), weight_only_int8_fc_runner_(int8_mode == 1 ? std::make_shared>() : nullptr), + int8_fc_runner_(int8_mode == 2 ? std::make_shared>() : nullptr), int8_mode_(int8_mode) { } @@ -431,6 +456,7 @@ GptContextAttentionLayer::GptContextAttentionLayer(size_t max_batch neox_rotary_style_(false), is_qk_buf_float_(is_qk_buf_float || int8_mode == 2), weight_only_int8_fc_runner_(int8_mode == 1 ? std::make_shared>() : nullptr), + int8_fc_runner_(int8_mode == 2 ? std::make_shared>() : nullptr), int8_mode_(int8_mode) { FT_LOG_DEBUG(__PRETTY_FUNCTION__); @@ -464,6 +490,7 @@ GptContextAttentionLayer::GptContextAttentionLayer(size_t max_batch neox_rotary_style_(neox_rotary_style), is_qk_buf_float_(is_qk_buf_float), weight_only_int8_fc_runner_(int8_mode == 1 ? std::make_shared>() : nullptr), + int8_fc_runner_(int8_mode == 2 ? std::make_shared>() : nullptr), int8_mode_(int8_mode) { FT_LOG_DEBUG(__PRETTY_FUNCTION__); @@ -488,6 +515,7 @@ GptContextAttentionLayer::GptContextAttentionLayer(GptContextAttentionLayer void GptContextAttentionLayer::allocateBuffer(size_t batch_size, size_t seq_len, bool allocate_qk_buf) { FT_LOG_DEBUG(__PRETTY_FUNCTION__); - const auto type_size = int8_mode_ == 2 ? sizeof(int8_t) : sizeof(T); + // const auto type_size = int8_mode_ == 2 ? sizeof(int8_t) : sizeof(T); + // NOTE (perkzz): use sizeof(T) here for cutlass int8 kernels. + const auto type_size = sizeof(T); qkv_buf_ = (T*)allocator_->reMalloc(qkv_buf_, type_size * 3 * batch_size * seq_len * local_hidden_units_, true); q_buf_2_ = (T*)allocator_->reMalloc(q_buf_2_, sizeof(T) * batch_size * seq_len * 3 * local_hidden_units_, true); k_buf_2_ = q_buf_2_ + batch_size * seq_len * local_hidden_units_; @@ -517,12 +547,11 @@ void GptContextAttentionLayer::allocateBuffer(size_t batch_size, size_t seq_l // save memory usage when using fmha if (allocate_qk_buf) { - qk_buf_ = (T*)allocator_->reMalloc(qk_buf_, sizeof(T) * batch_size * local_head_num_ * seq_len * seq_len, true); + qk_buf_ = (T*)allocator_->reMalloc(qk_buf_, sizeof(T) * batch_size * local_head_num_ * seq_len * seq_len, true); } else { allocator_->free((void**)(&qk_buf_)); } - qk_buf_ = (T*)allocator_->reMalloc(qk_buf_, sizeof(T) * batch_size * local_head_num_ * seq_len * seq_len, true); qkv_buf_2_ = (T*)allocator_->reMalloc(qkv_buf_2_, sizeof(T) * batch_size * seq_len * local_hidden_units_, true); qkv_buf_3_ = (T*)allocator_->reMalloc(qkv_buf_3_, type_size * batch_size * seq_len * local_hidden_units_, true); @@ -543,6 +572,19 @@ void GptContextAttentionLayer::allocateBuffer(size_t batch_size, size_t seq_l mixed_gemm_ws_bytes_ = weight_only_int8_fc_runner_->getWorkspaceSize(batch_size * seq_len, max_size, max_size); mixed_gemm_workspace_ = (char*)allocator_->reMalloc(mixed_gemm_workspace_, mixed_gemm_ws_bytes_, false); } + + if (int8_mode_ == 1) { + // We use max_size for n and k since we reuse buffers for both FCs and want to allocate the max + // possible memory that would be required by any of the individual gemms. + const int max_size = std::max(hidden_units_, 3 * local_hidden_units_); + mixed_gemm_ws_bytes_ = weight_only_int8_fc_runner_->getWorkspaceSize(batch_size * seq_len, max_size, max_size); + mixed_gemm_workspace_ = (char*)allocator_->reMalloc(mixed_gemm_workspace_, mixed_gemm_ws_bytes_, false); + } + else if (int8_mode_ == 2) { + const int max_size = std::max(hidden_units_, 3 * local_hidden_units_); + int8_gemm_ws_bytes_ = int8_fc_runner_->getWorkspaceSize(batch_size * seq_len, max_size, max_size); + int8_gemm_workspace_ = (char*)allocator_->reMalloc(int8_gemm_workspace_, int8_gemm_ws_bytes_, false); + } is_allocate_buffer_ = true; } @@ -561,10 +603,11 @@ void GptContextAttentionLayer::freeBuffer() allocator_->free((void**)(&qk_buf_float_)); } - if (mixed_gemm_workspace_) { - allocator_->free((void**)(&mixed_gemm_workspace_)); - mixed_gemm_ws_bytes_ = 0; - } + allocator_->free((void**)(&mixed_gemm_workspace_)); + mixed_gemm_ws_bytes_ = 0; + + allocator_->free((void**)(&int8_gemm_workspace_)); + int8_gemm_ws_bytes_ = 0; is_allocate_buffer_ = false; } diff --git a/src/fastertransformer/layers/attention_layers/GptContextAttentionLayer.h b/src/fastertransformer/layers/attention_layers/GptContextAttentionLayer.h index 0886a9d27..7efc126fe 100644 --- a/src/fastertransformer/layers/attention_layers/GptContextAttentionLayer.h +++ b/src/fastertransformer/layers/attention_layers/GptContextAttentionLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -19,6 +19,7 @@ #include "3rdparty/trt_fused_multihead_attention/qkvToContext.h" #include "src/fastertransformer/kernels/cutlass_kernels/fpA_intB_gemm/fpA_intB_gemm.h" +#include "src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm.h" #include "src/fastertransformer/layers/attention_layers/BaseAttentionLayer.h" namespace fastertransformer { @@ -54,6 +55,7 @@ class GptContextAttentionLayer: public BaseAttentionLayer { bool is_qk_buf_float_; std::shared_ptr> weight_only_int8_fc_runner_; + std::shared_ptr> int8_fc_runner_; protected: using BaseAttentionLayer::allocator_; @@ -69,6 +71,8 @@ class GptContextAttentionLayer: public BaseAttentionLayer { T* qkv_buf_3_ = nullptr; char* mixed_gemm_workspace_ = nullptr; size_t mixed_gemm_ws_bytes_ = 0; + char* int8_gemm_workspace_ = nullptr; + size_t int8_gemm_ws_bytes_ = 0; // int8_mode_ == 0 means we don't use any mechanism related to INT8. // int8_mode_ == 1 for weight quantized only gemm for GPT diff --git a/src/fastertransformer/layers/attention_layers/LongformerAttentionLayer.cc b/src/fastertransformer/layers/attention_layers/LongformerAttentionLayer.cc index 5f47a2347..9531b3d6a 100644 --- a/src/fastertransformer/layers/attention_layers/LongformerAttentionLayer.cc +++ b/src/fastertransformer/layers/attention_layers/LongformerAttentionLayer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/attention_layers/LongformerAttentionLayer.h b/src/fastertransformer/layers/attention_layers/LongformerAttentionLayer.h index 589ada7a3..54920c25e 100644 --- a/src/fastertransformer/layers/attention_layers/LongformerAttentionLayer.h +++ b/src/fastertransformer/layers/attention_layers/LongformerAttentionLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/attention_layers/TensorParallelDecoderCrossAttentionLayer.cc b/src/fastertransformer/layers/attention_layers/TensorParallelDecoderCrossAttentionLayer.cc index 5dd8400cb..8f14ff14a 100644 --- a/src/fastertransformer/layers/attention_layers/TensorParallelDecoderCrossAttentionLayer.cc +++ b/src/fastertransformer/layers/attention_layers/TensorParallelDecoderCrossAttentionLayer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/attention_layers/TensorParallelDecoderCrossAttentionLayer.h b/src/fastertransformer/layers/attention_layers/TensorParallelDecoderCrossAttentionLayer.h index db642ee65..12faa0528 100644 --- a/src/fastertransformer/layers/attention_layers/TensorParallelDecoderCrossAttentionLayer.h +++ b/src/fastertransformer/layers/attention_layers/TensorParallelDecoderCrossAttentionLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/attention_layers/TensorParallelDecoderSelfAttentionLayer.cc b/src/fastertransformer/layers/attention_layers/TensorParallelDecoderSelfAttentionLayer.cc index d35321df9..4eb9159cf 100644 --- a/src/fastertransformer/layers/attention_layers/TensorParallelDecoderSelfAttentionLayer.cc +++ b/src/fastertransformer/layers/attention_layers/TensorParallelDecoderSelfAttentionLayer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -15,6 +15,7 @@ */ #include "src/fastertransformer/layers/attention_layers/TensorParallelDecoderSelfAttentionLayer.h" +#include "src/fastertransformer/utils/nvtx_utils.h" namespace fastertransformer { @@ -208,47 +209,18 @@ void TensorParallelDecoderSelfAttentionLayer::forward(TensorMap* DecoderSelfAttentionLayer::forward(output_tensors, input_tensors, attention_weights); + PUSH_RANGE("all reduce sum"); T* attention_out = output_tensors->getPtr("hidden_features"); if (tensor_para_.world_size_ > 1 && do_all_reduce_) { - // TODO(mseznec): temporary fix to increase performance. In the future, use fp16 as gemm output directly (with - // cutlass) - const bool cast_int_fp = DecoderSelfAttentionLayer::int8_mode_ == 2; - if (cast_int_fp) { - attention_out_fp_ = reinterpret_cast( - DecoderSelfAttentionLayer::allocator_->reMalloc(attention_out_fp_, sizeof(T) * size, false)); - invokeCudaD2DScaleCpyConvert(attention_out_fp_, - reinterpret_cast(attention_out), - attention_weights->attention_output_weight.scale_inter, - false, - size, - DecoderSelfAttentionLayer::stream_); - } if (!use_custom_all_reduce_kernel) { - ftNcclAllReduceSum(cast_int_fp ? attention_out_fp_ : attention_out, - cast_int_fp ? attention_out_fp_ : attention_out, - size, - tensor_para_, - DecoderSelfAttentionLayer::stream_); + ftNcclAllReduceSum(attention_out, attention_out, size, tensor_para_, DecoderSelfAttentionLayer::stream_); } else { custom_all_reduce_comm_->customAllReduce(size, DecoderSelfAttentionLayer::stream_); } - if (cast_int_fp) { - invokeCudaD2DScaleCpyConvert(reinterpret_cast(attention_out), - attention_out_fp_, - attention_weights->attention_output_weight.scale_inter, - true, - size, - DecoderSelfAttentionLayer::stream_); - } sync_check_cuda_error(); } -} - -template -TensorParallelDecoderSelfAttentionLayer::~TensorParallelDecoderSelfAttentionLayer() -{ - DecoderSelfAttentionLayer::allocator_->free((void**)&attention_out_fp_); + POP_RANGE; } template class TensorParallelDecoderSelfAttentionLayer; diff --git a/src/fastertransformer/layers/attention_layers/TensorParallelDecoderSelfAttentionLayer.h b/src/fastertransformer/layers/attention_layers/TensorParallelDecoderSelfAttentionLayer.h index 18be07ad6..4ac28d561 100644 --- a/src/fastertransformer/layers/attention_layers/TensorParallelDecoderSelfAttentionLayer.h +++ b/src/fastertransformer/layers/attention_layers/TensorParallelDecoderSelfAttentionLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -29,7 +29,6 @@ class TensorParallelDecoderSelfAttentionLayer: public DecoderSelfAttentionLayer< std::shared_ptr custom_all_reduce_comm_; int enable_custom_all_reduce_; bool do_all_reduce_; - T* attention_out_fp_ = nullptr; protected: public: @@ -99,8 +98,6 @@ class TensorParallelDecoderSelfAttentionLayer: public DecoderSelfAttentionLayer< TensorParallelDecoderSelfAttentionLayer(TensorParallelDecoderSelfAttentionLayer const& attention_layer); - virtual ~TensorParallelDecoderSelfAttentionLayer(); - void forward(TensorMap* output_tensors, TensorMap* input_tensors, const AttentionWeight* attention_weights) override; }; diff --git a/src/fastertransformer/layers/attention_layers/TensorParallelDisentangledAttentionLayer.cc b/src/fastertransformer/layers/attention_layers/TensorParallelDisentangledAttentionLayer.cc new file mode 100644 index 000000000..dd66344a7 --- /dev/null +++ b/src/fastertransformer/layers/attention_layers/TensorParallelDisentangledAttentionLayer.cc @@ -0,0 +1,109 @@ +/* + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/layers/attention_layers/TensorParallelDisentangledAttentionLayer.h" + +namespace fastertransformer { + +template +void TensorParallelDisentangledAttentionLayer::forward(TensorMap* output_tensors, + TensorMap* input_tensors, + const AttentionWeight* attention_weights) +{ + // input_tensors: + // input_query [token_num, d_model], + // attention_mask [batch, 1, seqlen, seqlen], + // relative_embeddings [2*attention_span, hidden_size], + // padding_offset [token_num] (optional) + // + // output_tensors: + // hidden_features [token_num, d_model] + // + // For more information, please refer to DisentangledAttentionLayer + + const size_t size = output_tensors->at("hidden_features").size(); + + bool use_custom_all_reduce_kernel = false; + if (enable_custom_all_reduce_ && custom_all_reduce_comm_ != nullptr) { + std::vector hidden_features_reduce = {output_tensors->at("hidden_features")}; + use_custom_all_reduce_kernel = custom_all_reduce_comm_->swapInternalBuffer(&hidden_features_reduce, size); + } + + DisentangledAttentionLayer::forward(output_tensors, input_tensors, attention_weights); + + T* attention_out = output_tensors->getPtr("hidden_features"); + if (tensor_para_.world_size_ > 1) { + if (!use_custom_all_reduce_kernel) { + ftNcclAllReduceSum( + attention_out, attention_out, size, tensor_para_, DisentangledAttentionLayer::stream_); + } + else { + custom_all_reduce_comm_->customAllReduce(size, DisentangledAttentionLayer::stream_); + } + sync_check_cuda_error(); + } +} + +template +TensorParallelDisentangledAttentionLayer::TensorParallelDisentangledAttentionLayer( + size_t max_batch_size, + size_t max_seq_len, + size_t head_num, + size_t size_per_head, + size_t attention_span, + size_t d_model, + float q_scaling, + NcclParam tensor_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool is_sparse, + std::shared_ptr custom_all_reduce_comm, + int enable_custom_all_reduce): + DisentangledAttentionLayer(max_batch_size, + max_seq_len, + head_num / tensor_para.world_size_, + size_per_head, + attention_span, + d_model, + q_scaling, + stream, + cublas_wrapper, + allocator, + is_free_buffer_after_forward, + is_sparse), + tensor_para_(tensor_para), + custom_all_reduce_comm_(custom_all_reduce_comm), + enable_custom_all_reduce_(enable_custom_all_reduce) +{ + FT_CHECK(head_num % tensor_para_.world_size_ == 0); +} + +template +TensorParallelDisentangledAttentionLayer::TensorParallelDisentangledAttentionLayer( + TensorParallelDisentangledAttentionLayer const& attention_layer): + DisentangledAttentionLayer(attention_layer), tensor_para_(attention_layer.tensor_para_) +{ +} + +template class TensorParallelDisentangledAttentionLayer; +template class TensorParallelDisentangledAttentionLayer; +#ifdef ENABLE_BF16 +template class TensorParallelDisentangledAttentionLayer<__nv_bfloat16>; +#endif + +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/layers/attention_layers/TensorParallelDisentangledAttentionLayer.h b/src/fastertransformer/layers/attention_layers/TensorParallelDisentangledAttentionLayer.h new file mode 100644 index 000000000..5137dfcfb --- /dev/null +++ b/src/fastertransformer/layers/attention_layers/TensorParallelDisentangledAttentionLayer.h @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/layers/attention_layers/DisentangledAttentionLayer.h" +#include "src/fastertransformer/utils/custom_ar_comm.h" +#include "src/fastertransformer/utils/nccl_utils.h" + +namespace fastertransformer { + +template +class TensorParallelDisentangledAttentionLayer: public DisentangledAttentionLayer { +private: + NcclParam tensor_para_; + std::shared_ptr custom_all_reduce_comm_; + int enable_custom_all_reduce_; + +public: + TensorParallelDisentangledAttentionLayer(size_t max_batch_size, + size_t max_seq_len, + size_t head_num, + size_t size_per_head, + size_t attention_span, + size_t d_model, + float q_scaling, + NcclParam tensor_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool is_sparse, + std::shared_ptr custom_all_reduce_comm = nullptr, + int enable_custom_all_reduce = 0); + + TensorParallelDisentangledAttentionLayer(TensorParallelDisentangledAttentionLayer const& attention_layer); + + ~TensorParallelDisentangledAttentionLayer() = default; + + void + forward(TensorMap* output_tensors, TensorMap* input_tensors, const AttentionWeight* attention_weights) override; +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/attention_layers/TensorParallelGptContextAttentionLayer.cc b/src/fastertransformer/layers/attention_layers/TensorParallelGptContextAttentionLayer.cc index 6d2ec7957..55cb5efd7 100644 --- a/src/fastertransformer/layers/attention_layers/TensorParallelGptContextAttentionLayer.cc +++ b/src/fastertransformer/layers/attention_layers/TensorParallelGptContextAttentionLayer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -15,6 +15,7 @@ */ #include "src/fastertransformer/layers/attention_layers/TensorParallelGptContextAttentionLayer.h" +#include "src/fastertransformer/utils/nvtx_utils.h" namespace fastertransformer { @@ -43,41 +44,18 @@ void TensorParallelGptContextAttentionLayer::forward(TensorMap* GptContextAttentionLayer::forward(output_tensors, input_tensors, attention_weights); + PUSH_RANGE("all reduce sum"); T* attention_out = output_tensors->getPtr("hidden_features"); if (do_all_reduce_ && tensor_para_.world_size_ > 1) { - // TODO(mseznec): temporary fix to increase performance. In the future, use fp16 as gemm output directly (with - // cutlass) - const bool cast_int_fp = GptContextAttentionLayer::int8_mode_ == 2; - if (cast_int_fp) { - attention_out_fp_ = reinterpret_cast( - GptContextAttentionLayer::allocator_->reMalloc(attention_out_fp_, sizeof(T) * size, false)); - invokeCudaD2DScaleCpyConvert(attention_out_fp_, - reinterpret_cast(attention_out), - attention_weights->attention_output_weight.scale_inter, - false, - size, - GptContextAttentionLayer::stream_); - } if (!use_custom_all_reduce_kernel) { - ftNcclAllReduceSum(cast_int_fp ? attention_out_fp_ : attention_out, - cast_int_fp ? attention_out_fp_ : attention_out, - size, - tensor_para_, - GptContextAttentionLayer::stream_); + ftNcclAllReduceSum(attention_out, attention_out, size, tensor_para_, GptContextAttentionLayer::stream_); } else { custom_all_reduce_comm_->customAllReduce(size, GptContextAttentionLayer::stream_); } - if (cast_int_fp) { - invokeCudaD2DScaleCpyConvert(reinterpret_cast(attention_out), - attention_out_fp_, - attention_weights->attention_output_weight.scale_inter, - true, - size, - GptContextAttentionLayer::stream_); - } sync_check_cuda_error(); } + POP_RANGE; } template @@ -169,12 +147,6 @@ TensorParallelGptContextAttentionLayer::TensorParallelGptContextAttentionLaye { } -template -TensorParallelGptContextAttentionLayer::~TensorParallelGptContextAttentionLayer() -{ - GptContextAttentionLayer::allocator_->free((void**)&attention_out_fp_); -} - template class TensorParallelGptContextAttentionLayer; template class TensorParallelGptContextAttentionLayer; #ifdef ENABLE_BF16 diff --git a/src/fastertransformer/layers/attention_layers/TensorParallelGptContextAttentionLayer.h b/src/fastertransformer/layers/attention_layers/TensorParallelGptContextAttentionLayer.h index b179fc336..3efd1c80c 100644 --- a/src/fastertransformer/layers/attention_layers/TensorParallelGptContextAttentionLayer.h +++ b/src/fastertransformer/layers/attention_layers/TensorParallelGptContextAttentionLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -29,7 +29,6 @@ class TensorParallelGptContextAttentionLayer: public GptContextAttentionLayer std::shared_ptr custom_all_reduce_comm_; int enable_custom_all_reduce_; bool do_all_reduce_; - T* attention_out_fp_ = nullptr; public: TensorParallelGptContextAttentionLayer(size_t max_batch_size, @@ -68,8 +67,6 @@ class TensorParallelGptContextAttentionLayer: public GptContextAttentionLayer TensorParallelGptContextAttentionLayer(TensorParallelGptContextAttentionLayer const& attention_layer); - virtual ~TensorParallelGptContextAttentionLayer(); - void forward(TensorMap* output_tensors, TensorMap* input_tensors, const AttentionWeight* attention_weights) override; }; diff --git a/src/fastertransformer/layers/attention_layers/TensorParallelUnfusedAttentionLayer.cc b/src/fastertransformer/layers/attention_layers/TensorParallelUnfusedAttentionLayer.cc index 6b4cd9fe5..0b7f2dc05 100644 --- a/src/fastertransformer/layers/attention_layers/TensorParallelUnfusedAttentionLayer.cc +++ b/src/fastertransformer/layers/attention_layers/TensorParallelUnfusedAttentionLayer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/attention_layers/TensorParallelUnfusedAttentionLayer.h b/src/fastertransformer/layers/attention_layers/TensorParallelUnfusedAttentionLayer.h index 349dc6fd3..f9a562d90 100644 --- a/src/fastertransformer/layers/attention_layers/TensorParallelUnfusedAttentionLayer.h +++ b/src/fastertransformer/layers/attention_layers/TensorParallelUnfusedAttentionLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/attention_layers/UnfusedAttentionLayer.cc b/src/fastertransformer/layers/attention_layers/UnfusedAttentionLayer.cc index 2c633156d..5f1df40b1 100644 --- a/src/fastertransformer/layers/attention_layers/UnfusedAttentionLayer.cc +++ b/src/fastertransformer/layers/attention_layers/UnfusedAttentionLayer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -180,7 +180,13 @@ void UnfusedAttentionLayer::forward(TensorMap* output_tensors, stream_); sync_check_cuda_error(); } - + // print_abs_mean(q_buf_2_, m * hidden_units_, stream_, "q_buf_2_"); + // print_to_screen(q_buf_2_, 3); + // print_abs_mean(k_buf_2_, m * hidden_units_, stream_, "k_buf_2_"); + // print_to_screen(k_buf_2_, 3); + // print_abs_mean(v_buf_2_, m * hidden_units_, stream_, "v_buf_2_"); + // print_to_screen(v_buf_2_, 3); + // exit(0); float scalar = 1 / (sqrtf(size_per_head_ * 1.0f) * q_scaling_); cublas_wrapper_->stridedBatchedGemm(CUBLAS_OP_T, diff --git a/src/fastertransformer/layers/attention_layers/UnfusedAttentionLayer.h b/src/fastertransformer/layers/attention_layers/UnfusedAttentionLayer.h index dbe8efd60..b5fc8e87d 100644 --- a/src/fastertransformer/layers/attention_layers/UnfusedAttentionLayer.h +++ b/src/fastertransformer/layers/attention_layers/UnfusedAttentionLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/attention_layers/WindowAttention.cc b/src/fastertransformer/layers/attention_layers/WindowAttention.cc index 157b50cef..73a2429c2 100644 --- a/src/fastertransformer/layers/attention_layers/WindowAttention.cc +++ b/src/fastertransformer/layers/attention_layers/WindowAttention.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/attention_layers/WindowAttention.h b/src/fastertransformer/layers/attention_layers/WindowAttention.h index f06ac0a7c..c485bca18 100644 --- a/src/fastertransformer/layers/attention_layers/WindowAttention.h +++ b/src/fastertransformer/layers/attention_layers/WindowAttention.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/attention_layers_fp8/AttentionFP8Weight.h b/src/fastertransformer/layers/attention_layers_fp8/AttentionFP8Weight.h new file mode 100644 index 000000000..aa891831e --- /dev/null +++ b/src/fastertransformer/layers/attention_layers_fp8/AttentionFP8Weight.h @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/layers/attention_layers/AttentionWeight.h" +#include "src/fastertransformer/utils/ScaleList.h" + +namespace fastertransformer { + +template +struct AttentionFP8Weight: public AttentionWeight { + const float* qk_scale; + const float* qk_scale_inv; + float* qk_h_scale; + float* qk_h_scale_inv; + float* identity_scale; + float* identity_h_scale; +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/attention_layers_fp8/BaseAttentionFP8Layer.h b/src/fastertransformer/layers/attention_layers_fp8/BaseAttentionFP8Layer.h new file mode 100644 index 000000000..b92b47bd4 --- /dev/null +++ b/src/fastertransformer/layers/attention_layers_fp8/BaseAttentionFP8Layer.h @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include +#include + +#include "src/fastertransformer/layers/BaseLayer.h" +#include "src/fastertransformer/layers/attention_layers/BaseAttentionLayer.h" +#include "src/fastertransformer/layers/attention_layers_fp8/AttentionFP8Weight.h" +#include "src/fastertransformer/utils/Tensor.h" +#include "src/fastertransformer/utils/allocator.h" +#include "src/fastertransformer/utils/cublasFP8MMWrapper.h" +#include "src/fastertransformer/utils/memory_utils.h" + +namespace fastertransformer { + +// template +// AttentionType getAttentionType(size_t size_per_head, const int sm, const bool remove_padding, const int max_seq_len, +// const bool is_fuse = true) +// { +// if (std::is_same::value && (sm == kSM_70 || sm == kSM_86 || sm == kSM_80 || sm == kSM_75 || sm == +// kSM_72) +// && size_per_head == 64 && max_seq_len <= 384 && is_fuse == true) { +// return remove_padding ? AttentionType::FUSED_MHA : AttentionType::FUSED_PADDED_MHA; +// } +// else { +// return remove_padding ? AttentionType::UNFUSED_MHA : AttentionType::UNFUSED_PADDED_MHA; +// } +// } + +template +class BaseAttentionFP8Layer: public BaseLayer { + +public: + virtual void forward(TensorMap* output_tensors, + TensorMap* input_tensors, + const AttentionFP8Weight* attention_weights) = 0; + + BaseAttentionFP8Layer(cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool sparse = false): + BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward, nullptr, sparse) + { + } + virtual ~BaseAttentionFP8Layer() = default; +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/attention_layers_fp8/CMakeLists.txt b/src/fastertransformer/layers/attention_layers_fp8/CMakeLists.txt new file mode 100644 index 000000000..dd27762db --- /dev/null +++ b/src/fastertransformer/layers/attention_layers_fp8/CMakeLists.txt @@ -0,0 +1,41 @@ +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +cmake_minimum_required(VERSION 3.8) + +add_library(DecoderSelfAttentionFP8Layer STATIC DecoderSelfAttentionFP8Layer.cc) +set_property(TARGET DecoderSelfAttentionFP8Layer PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET DecoderSelfAttentionFP8Layer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(DecoderSelfAttentionFP8Layer PUBLIC -lcublasLt -lcublas -lcudart cublasMMWrapper cublasFP8MMWrapper decoder_masked_multihead_attention memory_utils cuda_fp8_utils) + +add_library(TensorParallelDecoderSelfAttentionFP8Layer STATIC TensorParallelDecoderSelfAttentionFP8Layer.cc) +set_property(TARGET TensorParallelDecoderSelfAttentionFP8Layer PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET TensorParallelDecoderSelfAttentionFP8Layer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(TensorParallelDecoderSelfAttentionFP8Layer PUBLIC -lcublasLt -lcublas -lcudart cublasMMWrapper cublasFP8MMWrapper DecoderSelfAttentionFP8Layer cuda_fp8_utils) + +add_library(GptContextAttentionFP8Layer STATIC GptContextAttentionFP8Layer.cc) +set_property(TARGET GptContextAttentionFP8Layer PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET GptContextAttentionFP8Layer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(GptContextAttentionFP8Layer PUBLIC -lcublasLt -lcublas -lcudart cublasMMWrapper cublasFP8MMWrapper unfused_attention_fp8_kernels memory_utils unfused_attention_kernels cuda_fp8_utils) + +add_library(TensorParallelGptContextAttentionFP8Layer STATIC TensorParallelGptContextAttentionFP8Layer.cc) +set_property(TARGET TensorParallelGptContextAttentionFP8Layer PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET TensorParallelGptContextAttentionFP8Layer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(TensorParallelGptContextAttentionFP8Layer PUBLIC -lcublasLt -lcublas -lcudart cublasMMWrapper cublasFP8MMWrapper GptContextAttentionFP8Layer cuda_fp8_utils) + +add_library(SelfAttentionFP8Layer STATIC SelfAttentionFP8Layer.cc) +set_property(TARGET SelfAttentionFP8Layer PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET SelfAttentionFP8Layer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(SelfAttentionFP8Layer PUBLIC -lcublasLt -lcublas -lcudart cublasMMWrapper cublasFP8MMWrapper + GptContextAttentionFP8Layer trt_fused_multi_head_attention cuda_fp8_utils nvtx_utils) diff --git a/src/fastertransformer/layers/attention_layers_fp8/DecoderSelfAttentionFP8Layer.cc b/src/fastertransformer/layers/attention_layers_fp8/DecoderSelfAttentionFP8Layer.cc new file mode 100644 index 000000000..29e2be12d --- /dev/null +++ b/src/fastertransformer/layers/attention_layers_fp8/DecoderSelfAttentionFP8Layer.cc @@ -0,0 +1,478 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/layers/attention_layers_fp8/DecoderSelfAttentionFP8Layer.h" +#include "src/fastertransformer/kernels/decoder_masked_multihead_attention.h" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" +#include "src/fastertransformer/utils/logger.h" +#include "src/fastertransformer/utils/memory_utils.h" +#include "src/fastertransformer/utils/nvtx_utils.h" + +namespace fastertransformer { + +template +void fusedQKV_masked_attention_dispatch(const T1* qkv_buf, + const T1* qkv_bias, + const T1* relative_attention_bias, + const float* query_weight_output_scale, + const float* attention_qk_scale, + const float* attention_output_weight_input_scale_inv, + T1* key_cache, + T1* value_cache, + const int* cache_indir, + T1* context_buf, + const bool* finished, + const int* sequence_lengths, + const int max_batch_size, + const int inference_batch_size, + const int beam_width, + const int head_num, + const int size_per_head, + const int rotary_embedding_dim, + const bool neox_rotary_style, + const int memory_max_len, + const int* prefix_prompt_lengths, + const int max_prefix_prompt_length, + const int max_input_len, + const int* total_padding_tokens, + const int step, + const float q_scaling, + const int relative_attention_bias_stride, + const T1* linear_bias_slopes, + const bool* masked_tokens, + const int* ia3_tasks, + const T1* ia3_key_weights, + const T1* ia3_value_weights, + cudaStream_t stream) +{ + using DataType = typename std::conditional::type; + // using DataType = typename std::conditional::type; + Masked_multihead_attention_params params; + memset(¶ms, 0, sizeof(params)); + int hidden_units = head_num * size_per_head; + if (qkv_bias != nullptr) { + params.q_bias = reinterpret_cast(qkv_bias); + params.k_bias = reinterpret_cast(qkv_bias) + hidden_units; + params.v_bias = reinterpret_cast(qkv_bias) + 2 * hidden_units; + } + else { + params.q_bias = nullptr; + params.k_bias = nullptr; + params.v_bias = nullptr; + } + + // Set the output buffer. + params.out = reinterpret_cast(context_buf); + + // Set the input buffers. + params.q = reinterpret_cast(qkv_buf); + params.k = reinterpret_cast(qkv_buf) + hidden_units; + params.v = reinterpret_cast(qkv_buf) + 2 * hidden_units; + params.stride = 3 * hidden_units; + params.finished = const_cast(finished); + + // Scale + params.query_weight_output_scale = query_weight_output_scale; + params.attention_qk_scale = attention_qk_scale; + params.attention_output_weight_input_scale_inv = attention_output_weight_input_scale_inv; + + params.k_cache = reinterpret_cast(key_cache); + params.v_cache = reinterpret_cast(value_cache); + params.cache_indir = cache_indir; + params.batch_size = inference_batch_size; + params.beam_width = beam_width; + params.memory_max_len = memory_max_len; + params.prefix_prompt_lengths = prefix_prompt_lengths; + params.max_prefix_prompt_length = max_prefix_prompt_length; + params.length_per_sample = sequence_lengths; // max_input_length + current output length + // timestep adding max_prefix_prompt_length for shared memory size calculation and rotary embedding computation + params.timestep = step + max_prefix_prompt_length - 1; + params.num_heads = head_num; + params.hidden_size_per_head = size_per_head; + params.rotary_embedding_dim = rotary_embedding_dim; + params.neox_rotary_style = neox_rotary_style; + // Note: keep norm factor (sqrt(K_dim)) when adopting megatron T5 structure (may adjust) + params.inv_sqrt_dh = 1.F / (sqrtf((float)params.hidden_size_per_head) * q_scaling); + + params.total_padding_tokens = total_padding_tokens; + // TODO(bhsueh) Need better implementation + FT_CHECK_WITH_INFO(rotary_embedding_dim == 0, "FP8 decoder still not support rotary embedding"); + if (relative_attention_bias != nullptr) { + if (std::is_same::value) { + params.relative_attention_bias = reinterpret_cast(relative_attention_bias); + } + else { + FT_CHECK(false); + } + } + params.relative_attention_bias_stride = relative_attention_bias_stride; + params.masked_tokens = masked_tokens; + + if (linear_bias_slopes != nullptr) { + params.linear_bias_slopes = reinterpret_cast(linear_bias_slopes); + } + params.max_input_length = max_input_len; + + params.ia3_tasks = ia3_tasks; + params.ia3_key_weights = reinterpret_cast(ia3_key_weights); + params.ia3_value_weights = reinterpret_cast(ia3_value_weights); + + masked_multihead_attention(params, stream); +} + +template +void DecoderSelfAttentionFP8Layer::allocateBuffer() +{ + // deprecated + FT_CHECK(false); +} + +template +void DecoderSelfAttentionFP8Layer::allocateBuffer(size_t batch_size) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); +#ifdef FP8_MHA + qkv_buf_ = + reinterpret_cast(allocator_->reMalloc(qkv_buf_, sizeof(T1) * batch_size * 3 * local_hidden_units_, false)); +#else + qkv_buf_ = + reinterpret_cast(allocator_->reMalloc(qkv_buf_, sizeof(T2) * batch_size * 3 * local_hidden_units_, false)); +#endif + context_buf_ = + reinterpret_cast(allocator_->reMalloc(context_buf_, sizeof(T1) * batch_size * local_hidden_units_, false)); + high_precision_context_buf_ = reinterpret_cast( + allocator_->reMalloc(high_precision_context_buf_, sizeof(T2) * batch_size * local_hidden_units_, false)); + is_allocate_buffer_ = true; +} + +template +void DecoderSelfAttentionFP8Layer::freeBuffer() +{ + if (is_allocate_buffer_) { + allocator_->free((void**)(&qkv_buf_)); + allocator_->free((void**)(&context_buf_)); + allocator_->free((void**)(&high_precision_context_buf_)); + + if (bf16_key_cache != nullptr) { + deviceFree(bf16_key_cache); + } + if (bf16_value_cache != nullptr) { + deviceFree(bf16_value_cache); + } + is_allocate_buffer_ = false; + } +} + +template +DecoderSelfAttentionFP8Layer::DecoderSelfAttentionFP8Layer(size_t head_num, + size_t size_per_head, + size_t local_head_num, + size_t rotary_embedding_dim, + bool neox_rotary_style, + size_t d_model, + const float q_scaling, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool sparse): + BaseAttentionLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward, sparse), + head_num_(head_num), + size_per_head_(size_per_head), + hidden_units_(head_num_ * size_per_head_), + local_head_num_(local_head_num), + local_hidden_units_(local_head_num_ * size_per_head_), + rotary_embedding_dim_(rotary_embedding_dim), + neox_rotary_style_(neox_rotary_style), + d_model_(d_model), + q_scaling_(q_scaling) +{ + FT_CHECK(size_per_head_ == 32 || size_per_head_ == 64 || size_per_head_ == 96 || size_per_head_ == 128 + || size_per_head_ == 160 || size_per_head_ == 192 || size_per_head_ == 224 || size_per_head_ == 256); +} + +template +DecoderSelfAttentionFP8Layer::DecoderSelfAttentionFP8Layer( + DecoderSelfAttentionFP8Layer const& attention_layer): + DecoderSelfAttentionFP8Layer(attention_layer.head_num_, + attention_layer.size_per_head_, + attention_layer.local_head_num_, + attention_layer.rotary_embedding_dim_, + attention_layer.neox_rotary_style_, + attention_layer.d_model_, + attention_layer.q_scaling_, + attention_layer.stream_, + attention_layer.cublas_wrapper_, + attention_layer.allocator_, + attention_layer.is_free_buffer_after_forward_, + attention_layer.sparse_) +{ +} + +template +DecoderSelfAttentionFP8Layer::~DecoderSelfAttentionFP8Layer() +{ + cublas_wrapper_ = nullptr; + freeBuffer(); +} + +template +void DecoderSelfAttentionFP8Layer::forward(TensorMap* output_tensors, + TensorMap* input_tensors, + const AttentionWeight* attention_weights) +{ + // input tensors: + // attention_input [batch_size, d_model_], + // finished [batch_size], + // sequence_lengths [batch_size] + // max_input_length [1] on cpu + // total_padding_tokens [batch_size] (optional) + // masked_tokens [batch_size, memory_len], (optional) + // step [1] on cpu + // cache_indirection [batch_size / beam_width, beam_width, memory_max_len], optional + // relative_attention_bias [1, head_num, step, step] or [1, head_num, memory_max_len, memory_max_len] + // (optional) d_prefix_prompt_lengths [batch_size] (optional) max_prefix_prompt_length [1] on cpu (optional) + // linear_bias_slopes [head_num] (optional) + + // output tensors: + // attention_output [batch_size, d_model_], + // key_cache [batch, local_head_num, size_per_head // x, memory_max_len, x] + // value_cache [batch, local_head_num, memory_max_len, size_per_head] + + const AttentionFP8Weight* attention_weights_ptr = + reinterpret_cast*>(attention_weights); + + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + FT_CHECK(input_tensors->size() == 7 || input_tensors->size() == 8); + FT_CHECK(output_tensors->size() == 3); + FT_CHECK(output_tensors->at("key_cache").shape.size() == 5 || output_tensors->at("key_cache").shape.size() == 3); + FT_CHECK(output_tensors->at("value_cache").shape.size() == 4 + || output_tensors->at("value_cache").shape.size() == 3); + allocateBuffer(input_tensors->at("attention_input").shape[0]); + + const T1* attention_input = input_tensors->getPtr("attention_input"); + const bool* finished = input_tensors->getPtr("finished", nullptr); + const int* sequence_lengths = input_tensors->getPtr("sequence_lengths"); + const bool* masked_tokens = input_tensors->getPtr("masked_tokens", nullptr); + const int* cache_indir = input_tensors->getPtr("cache_indirection", nullptr); +#ifdef FP8_MHA + const T1* relative_attention_bias = input_tensors->getPtr("relative_attention_bias", nullptr); +#else + const T2* relative_attention_bias = input_tensors->getPtr("relative_attention_bias", nullptr); +#endif + const int relative_attention_bias_stride = + input_tensors->isExist("relative_attention_bias") ? input_tensors->at("relative_attention_bias").shape[3] : 0; + +#ifdef FP8_MHA + const T1* linear_bias_slopes = input_tensors->getPtr("linear_bias_slopes", nullptr); +#else + const T2* linear_bias_slopes = input_tensors->getPtr("linear_bias_slopes", nullptr); +#endif + + T2* attention_out = output_tensors->getPtr("attention_output"); +#ifdef FP8_MHA + T1* key_cache = output_tensors->getPtr("key_cache"); + T1* value_cache = output_tensors->getPtr("value_cache"); +#else + T2* key_cache = output_tensors->getPtr("key_cache"); + T2* value_cache = output_tensors->getPtr("value_cache"); +#endif + const int batch_size = input_tensors->at("attention_input").shape[0]; + const int beam_width = cache_indir != nullptr ? input_tensors->at("cache_indirection").shape[1] : 1; + const int memory_max_len = output_tensors->at("key_cache").shape[3]; + + const int* d_prefix_prompt_lengths = input_tensors->getPtr("d_prefix_prompt_lengths", nullptr); + const int max_prefix_prompt_length = input_tensors->getVal("max_prefix_prompt_length", 0); + +#ifdef FP8_MHA + + using qkv_output_type = T1; +#else + + using qkv_output_type = T2; +#endif + +#ifdef SPARSITY_ENABLED + FT_CHECK_WITH_INFO(false, "DecoderSelfAttentionFP8Layer does not support sparse now."); + const int m_padded = 8 * div_up(batch_size, 8); + if (sparse_ && cublas_wrapper_->isUseSparse(1, 3 * local_hidden_units_, m_padded, d_model_)) { + // cublas_wrapper_->SpGemm(CUBLAS_OP_N, + // CUBLAS_OP_N, + // 3 * local_hidden_units_, + // m_padded, + // d_model_, + // attention_weights->query_weight.sp_kernel, + // attention_input, + // qkv_buf_); + } + else { +#endif + { + const float alpha = 1.0f; + const float beta = 0.0f; + reinterpret_cast(cublas_wrapper_) + ->Gemm((qkv_output_type*)qkv_buf_, + (int)1, + (int)batch_size, + (int)3 * local_hidden_units_, + (int)d_model_, + (int64_t)0, + (int64_t)0, + (int64_t)0, + &alpha, + &beta, + attention_input, + attention_weights_ptr->query_weight.kernel, + attention_weights_ptr->query_weight.input_scale, + attention_weights_ptr->query_weight.weight_scale, +#ifdef FP8_MHA + attention_weights_ptr->query_weight.output_scale_inv, +#endif + stream_); + } +#ifdef SPARSITY_ENABLED + } +#endif + sync_check_cuda_error(); + +#ifdef FP8_MHA + fusedQKV_masked_attention_dispatch( + (qkv_output_type*)qkv_buf_, + attention_weights_ptr->query_weight.fp8_bias, + relative_attention_bias, + attention_weights_ptr->query_weight.output_scale, + attention_weights_ptr->qk_scale, + attention_weights_ptr->attention_output_weight.input_scale_inv, + key_cache, + value_cache, + cache_indir, + context_buf_, + finished, + sequence_lengths, // NOTE: current seq len including padding (fixed after meeting the finished id) + batch_size, + batch_size, + beam_width, + local_head_num_, + size_per_head_, + rotary_embedding_dim_, + neox_rotary_style_, + memory_max_len, + d_prefix_prompt_lengths, + max_prefix_prompt_length, + input_tensors->getVal("max_input_length", 0), + input_tensors->getPtr("total_padding_tokens", nullptr), + input_tensors->getVal("step"), + q_scaling_, + relative_attention_bias_stride, + linear_bias_slopes, + masked_tokens, + input_tensors->getPtr("ia3_tasks", nullptr), + nullptr, // ia3_key_weight + nullptr, // ia3_value_weight + stream_); + sync_check_cuda_error(); +#else + fusedQKV_masked_attention_dispatch( + (qkv_output_type*)qkv_buf_, + attention_weights_ptr->query_weight.bias, + relative_attention_bias, + (const float*)nullptr, + (const float*)nullptr, + (const float*)nullptr, + key_cache, + value_cache, + cache_indir, + high_precision_context_buf_, + finished, + sequence_lengths, // NOTE: current seq len including padding (fixed after meeting the finished id) + batch_size, + batch_size, + beam_width, + local_head_num_, + size_per_head_, + rotary_embedding_dim_, + neox_rotary_style_, + memory_max_len, + d_prefix_prompt_lengths, + max_prefix_prompt_length, + input_tensors->getVal("max_input_length", 0), + input_tensors->getPtr("total_padding_tokens", nullptr), + input_tensors->getVal("step"), + q_scaling_, + relative_attention_bias_stride, + linear_bias_slopes, + masked_tokens, + input_tensors->getPtr("ia3_tasks", nullptr), + nullptr, // ia3_key_weight + nullptr, // ia3_value_weight + stream_); + sync_check_cuda_error(); + invokeQuantizeMatrix( + context_buf_, + attention_weights_ptr->attention_output_weight.input_scale_inv, + high_precision_context_buf_, + batch_size * local_head_num_ * size_per_head_, + 1, + stream_); + sync_check_cuda_error(); +#endif + +#ifdef SPARSITY_ENABLED + FT_CHECK_WITH_INFO(false, "DecoderSelfAttentionFP8Layer does not support sparse now."); + if (sparse_ && cublas_wrapper_->isUseSparse(1, d_model_, m_padded, local_hidden_units_)) { + // cublas_wrapper_->SpGemm(CUBLAS_OP_N, + // CUBLAS_OP_N, + // d_model_, + // m_padded, + // local_hidden_units_, + // attention_weights_->attention_output_weight.sp_kernel, + // context_buf_, + // attention_out); + } + else { +#endif + + const float alpha = 1.0f; + const float beta = 0.0f; + reinterpret_cast(cublas_wrapper_) + ->Gemm(attention_out, + (int)1, + (int)batch_size, + (int)d_model_, + (int)local_hidden_units_, + (int64_t)0, + (int64_t)0, + (int64_t)0, + &alpha, + &beta, + context_buf_, + attention_weights_ptr->attention_output_weight.kernel, + attention_weights_ptr->attention_output_weight.input_scale, + attention_weights_ptr->attention_output_weight.weight_scale, + stream_); + sync_check_cuda_error(); +#ifdef SPARSITY_ENABLED + } +#endif + + if (is_free_buffer_after_forward_ == true) { + freeBuffer(); + } +} + +template class DecoderSelfAttentionFP8Layer<__nv_fp8_e4m3, __nv_bfloat16>; + +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/attention_layers_fp8/DecoderSelfAttentionFP8Layer.h b/src/fastertransformer/layers/attention_layers_fp8/DecoderSelfAttentionFP8Layer.h new file mode 100644 index 000000000..7893d969e --- /dev/null +++ b/src/fastertransformer/layers/attention_layers_fp8/DecoderSelfAttentionFP8Layer.h @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/layers/attention_layers/BaseAttentionLayer.h" +#include "src/fastertransformer/layers/attention_layers_fp8/AttentionFP8Weight.h" +#include "src/fastertransformer/utils/cublasFP8MMWrapper.h" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" + +namespace fastertransformer { + +template +class DecoderSelfAttentionFP8Layer: public BaseAttentionLayer { +private: + // metadata + const size_t head_num_; + const size_t size_per_head_; + const size_t hidden_units_; + const size_t local_head_num_; + const size_t local_hidden_units_; + const size_t d_model_; + const float q_scaling_; + const size_t rotary_embedding_dim_; + const bool neox_rotary_style_; + + void allocateBuffer() override; + void freeBuffer() override; + void allocateBuffer(size_t batch_size); + + using BaseAttentionLayer::is_free_buffer_after_forward_; + using BaseAttentionLayer::is_allocate_buffer_; + using BaseAttentionLayer::cublas_wrapper_; + using BaseAttentionLayer::allocator_; + +protected: +#ifdef FP8_MHA + T1* qkv_buf_ = nullptr; +#else + T2* qkv_buf_ = nullptr; +#endif + T2* high_precision_context_buf_ = nullptr; + T1* context_buf_ = nullptr; + using BaseAttentionLayer::stream_; + using BaseAttentionLayer::sparse_; + + T2* bf16_key_cache = nullptr; + T2* bf16_value_cache = nullptr; + +public: + DecoderSelfAttentionFP8Layer(size_t head_num, + size_t size_per_head, + size_t local_head_num, + size_t rotary_embedding_dim, + bool neox_rotary_style, + size_t d_model, + const float q_scaling, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool sparse = false); + + DecoderSelfAttentionFP8Layer(DecoderSelfAttentionFP8Layer const& attention_layer); + + ~DecoderSelfAttentionFP8Layer(); + + void + forward(TensorMap* output_tensors, TensorMap* input_tensors, const AttentionWeight* attention_weights) override; +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/attention_layers_fp8/GptContextAttentionFP8Layer.cc b/src/fastertransformer/layers/attention_layers_fp8/GptContextAttentionFP8Layer.cc new file mode 100644 index 000000000..ddf6916e7 --- /dev/null +++ b/src/fastertransformer/layers/attention_layers_fp8/GptContextAttentionFP8Layer.cc @@ -0,0 +1,487 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/layers/attention_layers_fp8/GptContextAttentionFP8Layer.h" +#include "src/fastertransformer/kernels/unfused_attention_fp8_kernels.h" +#include "src/fastertransformer/kernels/unfused_attention_kernels.h" + +namespace fastertransformer { + +template +void GptContextAttentionFP8Layer::forward(TensorMap* output_tensors, + TensorMap* input_tensors, + const AttentionWeight* attention_weights) +{ + // input_tensors: + // input_query [batch_size * seq_len, hidden_dimension] + // attention_mask [batch_size, 1, seq_len_padded, seq_len_padded] + // is_final_layer [1], bool on cpu + + // output_tensors: + // attention_out [batch_size * seq_len, hidden_dimension] + // key_cache [batch, local_head_num, size_per_head // x, max_seq_len, x] + // value_cache [batch, local_head_num, max_seq_len, size_per_head] + + const AttentionFP8Weight* attention_weights_ptr = + reinterpret_cast*>(attention_weights); + FT_CHECK(input_tensors->size() == 3); + FT_CHECK(output_tensors->size() == 3); + FT_CHECK(output_tensors->at("key_cache").shape.size() == 5); + FT_CHECK(output_tensors->at("value_cache").shape.size() == 4 + || output_tensors->at("value_cache").shape.size() == 3); + const int request_batch_size = (int)(input_tensors->at("attention_mask").shape[0]); + const int request_seq_len = (int)(input_tensors->at("attention_mask").shape[2]); + const int max_seq_len = (int)(output_tensors->at("key_cache").shape[3]); + allocateBuffer(request_batch_size, max_seq_len); + sync_check_cuda_error(); + + const int request_seq_len_padded = (request_seq_len + 15) / 16 * 16; + + T2* attention_out = output_tensors->at("attention_out").getPtr(); + const T1* attention_input = input_tensors->at("input_query").getPtr(); + const T1* attention_mask = input_tensors->at("attention_mask").getPtr(); + const bool is_final = input_tensors->at("is_final_layer").getVal(); + + const int m = input_tensors->at("input_query").shape[0]; + +#ifdef SPARSITY_ENABLED + FT_CHECK_WITH_INFO(false, "DecoderSelfAttentionFP8Layer does not support sparse now."); + const int m_padded = 8 * div_up(m, 8); + if (sparse_ && cublas_wrapper_->isUseSparse(1, 3 * local_hidden_units_, m_padded, hidden_units_)) { + // cublas_wrapper_->SpGemm(CUBLAS_OP_N, + // CUBLAS_OP_N, + // 3 * local_hidden_units_, + // m_padded, + // hidden_units_, + // attention_weights_ptr->query_weight.sp_kernel, + // attention_input, + // qkv_buf_); + } + else { +#endif + // reinterpret_cast(cublas_wrapper_) + // ->Gemm(qkv_buf_, + // (int)1, + // (int)m, + // (int)3 * local_hidden_units_, + // (int)hidden_units_, + // (int64_t)0, + // (int64_t)0, + // (int64_t)0, + // attention_weights_ptr->query_weight.input_scale, + // attention_input, + // attention_weights_ptr->query_weight.kernel); + + { + const float alpha = 1.0f; + const float beta = 0.0f; + reinterpret_cast(cublas_wrapper_) + ->Gemm(qkv_buf_, + (int)1, + (int)m, + (int)3 * local_hidden_units_, + (int)hidden_units_, + (int64_t)0, + (int64_t)0, + (int64_t)0, + &alpha, + &beta, + attention_input, + attention_weights_ptr->query_weight.kernel, + attention_weights_ptr->query_weight.input_scale, + attention_weights_ptr->query_weight.weight_scale, +#ifndef FP8_GEMM_OUTPUT_QUANT_DISABLE + attention_weights_ptr->query_weight.output_scale_inv, +#endif + stream_); + } + +#ifdef SPARSITY_ENABLED + } +#endif + sync_check_cuda_error(); + + { + FP8AddFusedQKVBiasRebuildPaddingParam param{ + q_buf_2_, + k_buf_2_, + v_buf_2_, +#ifdef FP8_GEMM_OUTPUT_QUANT_DISABLE + nullptr, // T1 + qkv_buf_, // T2 +#else + qkv_buf_, // T1 + nullptr, // T2 +#endif + attention_weights_ptr->query_weight.bias, +#ifdef FP8_GEMM_OUTPUT_QUANT_DISABLE + attention_weights_ptr->identity_scale, +#else + attention_weights_ptr->query_weight.output_scale, +#endif + nullptr, // fp8_mode_ == 1 ? attention_weights_ptr->query_weight.scale : nullptr, + nullptr, // fp8_mode_ == 1 ? attention_weights_ptr->query_weight.per_channel_scale_min : nullptr, + attention_weights_ptr->query_weight.output_scale_inv, + nullptr, + nullptr, // padding_offset +#ifdef FP8_MHA + output_tensors->at("value_cache").getPtr(), +#else + output_tensors->at("value_cache").getPtr(), +#endif + (uint32_t)m, + (uint32_t)request_batch_size, + (uint32_t)request_seq_len, + (uint32_t)request_seq_len_padded, + (uint32_t)max_seq_len, + (uint32_t)local_head_num_, + (uint32_t)size_per_head_, + 0, // rotary_embedding_dim_, + stream_}; + invokeFP8AddFusedQKVBiasRebuildPadding(param); + sync_check_cuda_error(); + } + + { + const int max_seq_len = (int)(output_tensors->at("key_cache").shape[3]); + // Use batch major + // put k_buf from shape [B, H, L, Dh] to [B, H, Dh/x, L, x] + // put v_buf from shape [B, H, Dh, L_padd] to [B, H, L_max, Dh/x, x] + +#ifdef FP8_MHA + // invokeMultiplyScale(k_buf_2_, + // (1.0f / K_CACHE_SCALE), + // request_batch_size * request_seq_len * size_per_head_ * local_head_num_, + // stream_); + FP8Transpose4dBatchMajorParam param{output_tensors->at("key_cache").getPtr(), + output_tensors->at("value_cache").getPtr(), + k_buf_2_, + v_buf_2_, + (const float*)nullptr, + request_batch_size, + request_seq_len, + max_seq_len, + size_per_head_, + local_head_num_, + request_seq_len_padded, + stream_}; + invokeFP8Transpose4dBatchMajor(param); +#else + // { + FP8Transpose4dBatchMajorParam param{output_tensors->at("key_cache").getPtr(), + output_tensors->at("value_cache").getPtr(), + k_buf_2_, + v_buf_2_, + attention_weights_ptr->query_weight.output_scale, + request_batch_size, + request_seq_len, + max_seq_len, + size_per_head_, + local_head_num_, + request_seq_len_padded, + stream_}; + invokeFP8Transpose4dBatchMajor(param); + // TODO(bhsueh) fuse these two kernels into invokeTranspose4dBatchMajor + // invokeTmpHanldKCache(tmp_k_buf_, + // k_buf_2_, + // attention_weights_ptr->query_weight.output_scale, + // request_batch_size, + // request_seq_len, + // request_seq_len_padded, + // local_head_num_, + // size_per_head_, + // stream_); + + // invokeTmpHanldVCache(tmp_v_buf_, + // v_buf_2_, + // attention_weights_ptr->query_weight.output_scale, + // request_batch_size, + // request_seq_len, + // request_seq_len_padded, + // local_head_num_, + // size_per_head_, + // stream_); + + // invokeTranspose4dBatchMajor((T2*)output_tensors->at("key_cache").data, + // (T2*)output_tensors->at("value_cache").data, + // tmp_k_buf_, + // tmp_v_buf_, + // request_batch_size, + // request_seq_len, + // max_seq_len, + // size_per_head_, + // local_head_num_, + // stream_); + // sync_check_cuda_error(); + // } +#endif + } + + if (is_final == false) { + { + const float alpha = 1.0f; + const float beta = 0.0f; + + reinterpret_cast(cublas_wrapper_) + ->Gemm(qk_buf_bfloat_, + (int)request_batch_size * local_head_num_, + (int)request_seq_len_padded, + (int)request_seq_len_padded, + (int)size_per_head_, + (int64_t)request_seq_len_padded * size_per_head_, + (int64_t)request_seq_len_padded * size_per_head_, + (int64_t)request_seq_len_padded * request_seq_len_padded, + &alpha, + &beta, + q_buf_2_, + k_buf_2_, + attention_weights_ptr->query_weight.output_scale, + attention_weights_ptr->query_weight.output_scale, + stream_); + } + sync_check_cuda_error(); + + float scalar = (float)(1.0f / sqrtf(size_per_head_ * 1.0f)); + FP8MaskedSoftMaxParam param{qk_buf_, + qk_buf_bfloat_, + attention_mask, + nullptr, + (uint32_t)request_batch_size, + (uint32_t)request_seq_len_padded, + (uint32_t)local_head_num_, + scalar, + nullptr, + attention_weights_ptr->qk_scale_inv, + stream_}; + invokeFP8MaskedSoftMax(param); + sync_check_cuda_error(); + + { + const float alpha = 1.0f; + const float beta = 0.0f; + reinterpret_cast(cublas_wrapper_) + ->Gemm(qkv_buf_2_, + (int)request_batch_size * local_head_num_, + (int)request_seq_len_padded, + (int)size_per_head_, + (int)request_seq_len_padded, + (int64_t)size_per_head_ * request_seq_len_padded, + (int64_t)request_seq_len_padded * request_seq_len_padded, + (int64_t)size_per_head_ * request_seq_len_padded, + &alpha, + &beta, + qk_buf_, + v_buf_2_, + attention_weights_ptr->qk_scale, + attention_weights_ptr->query_weight.output_scale, +#ifndef FP8_GEMM_OUTPUT_QUANT_DISABLE + attention_weights_ptr->attention_output_weight.input_scale_inv, +#endif + stream_); + sync_check_cuda_error(); + } + + { + // NOTE: add last gemm's output scale here +#ifdef FP8_GEMM_OUTPUT_QUANT_DISABLE + FP8TransposeAttentionOutRemovePaddingParam param{ + qkv_buf_3_, + qkv_buf_2_, + attention_weights_ptr->attention_output_weight.input_scale_inv, + m, + request_batch_size, + request_seq_len_padded, + (int)local_head_num_, + (int)size_per_head_, + nullptr, // padding_offset + stream_}; +#else + FP8TransposeAttentionOutRemovePaddingParam param{qkv_buf_3_, + qkv_buf_2_, + (const float*)nullptr, + m, + request_batch_size, + request_seq_len_padded, + (int)local_head_num_, + (int)size_per_head_, + nullptr, // padding_offset + stream_}; +#endif + invokeFP8TransposeAttentionOutRemovePadding(param); + } + +#ifdef SPARSITY_ENABLED + FT_CHECK_WITH_INFO(false, "DecoderSelfAttentionFP8Layer does not support sparse now."); + if (sparse_ && cublas_wrapper_->isUseSparse(1, hidden_units_, m_padded, local_hidden_units_)) { + // cublas_wrapper_->SpGemm(CUBLAS_OP_N, + // CUBLAS_OP_N, + // hidden_units_, + // m_padded, + // local_hidden_units_, + // attention_weights_ptr->attention_output_weight.sp_kernel, + // qkv_buf_3_, + // attention_out); + } + else { +#endif + const float alpha = 1.0f; + const float beta = 0.0f; + reinterpret_cast(cublas_wrapper_) + ->Gemm(attention_out, + (int)1, + (int)m, + (int)hidden_units_, + (int)local_hidden_units_, + (int64_t)0, + (int64_t)0, + (int64_t)0, + &alpha, + &beta, + qkv_buf_3_, + attention_weights_ptr->attention_output_weight.kernel, + attention_weights_ptr->attention_output_weight.input_scale, + attention_weights_ptr->attention_output_weight.weight_scale, + stream_); + sync_check_cuda_error(); +#ifdef SPARSITY_ENABLED + } +#endif + } + + if (is_free_buffer_after_forward_ == true) + freeBuffer(); + sync_check_cuda_error(); +} + +template +GptContextAttentionFP8Layer::GptContextAttentionFP8Layer(size_t head_num, + size_t size_per_head, + size_t local_head_num, + size_t rotary_embedding_dim, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool is_qk_buf_float, + bool sparse): + BaseAttentionLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward, sparse), + head_num_(head_num), + size_per_head_(size_per_head), + hidden_units_(head_num * size_per_head), + local_head_num_(local_head_num), + local_hidden_units_(local_head_num_ * size_per_head), + rotary_embedding_dim_(rotary_embedding_dim), + is_qk_buf_float_(is_qk_buf_float) +{ +} + +template +GptContextAttentionFP8Layer::GptContextAttentionFP8Layer( + GptContextAttentionFP8Layer const& attention_layer): + BaseAttentionLayer(attention_layer.stream_, + attention_layer.cublas_wrapper_, + attention_layer.allocator_, + attention_layer.is_free_buffer_after_forward_, + attention_layer.sparse_), + head_num_(attention_layer.head_num_), + size_per_head_(attention_layer.size_per_head_), + hidden_units_(attention_layer.hidden_units_), + local_head_num_(attention_layer.local_head_num_), + local_hidden_units_(attention_layer.local_hidden_units_), + rotary_embedding_dim_(attention_layer.rotary_embedding_dim_), + is_qk_buf_float_(attention_layer.is_qk_buf_float_) +{ +} + +template +GptContextAttentionFP8Layer::~GptContextAttentionFP8Layer() +{ + cublas_wrapper_ = nullptr; + freeBuffer(); +} + +template +void GptContextAttentionFP8Layer::allocateBuffer() +{ + FT_CHECK(false); +} + +template +void GptContextAttentionFP8Layer::allocateBuffer(size_t batch_size, size_t seq_len) +{ + size_t seq_len_padded = (seq_len + 15) / 16 * 16; + FT_LOG_DEBUG(__PRETTY_FUNCTION__); +#ifdef FP8_GEMM_OUTPUT_QUANT_DISABLE + qkv_buf_ = + (T2*)allocator_->reMalloc(qkv_buf_, sizeof(T2) * 3 * batch_size * seq_len_padded * local_hidden_units_, true); + qkv_buf_2_ = + (T2*)allocator_->reMalloc(qkv_buf_2_, sizeof(T2) * batch_size * seq_len_padded * local_hidden_units_, true); +#else + qkv_buf_ = + (T1*)allocator_->reMalloc(qkv_buf_, sizeof(T1) * 3 * batch_size * seq_len_padded * local_hidden_units_, true); + qkv_buf_2_ = + (T1*)allocator_->reMalloc(qkv_buf_2_, sizeof(T1) * batch_size * seq_len_padded * local_hidden_units_, true); +#endif + q_buf_2_ = + (T1*)allocator_->reMalloc(q_buf_2_, sizeof(T1) * batch_size * seq_len_padded * local_hidden_units_, true); + k_buf_2_ = + (T1*)allocator_->reMalloc(k_buf_2_, sizeof(T1) * batch_size * seq_len_padded * local_hidden_units_, true); + v_buf_2_ = + (T1*)allocator_->reMalloc(v_buf_2_, sizeof(T1) * batch_size * seq_len_padded * local_hidden_units_, true); + + qk_buf_ = (T1*)allocator_->reMalloc( + qk_buf_, sizeof(T1) * batch_size * local_head_num_ * seq_len_padded * seq_len_padded, true); + qkv_buf_3_ = (T1*)allocator_->reMalloc(qkv_buf_3_, sizeof(T1) * batch_size * seq_len * local_hidden_units_, true); + + if (is_qk_buf_float_ == true) { + // qk_buf_float_ = (float*)allocator_->reMalloc( + // qk_buf_float_, sizeof(float) * batch_size * local_head_num_ * seq_len * seq_len, true); + } + qk_buf_bfloat_ = (T2*)allocator_->reMalloc( + qk_buf_bfloat_, sizeof(T2) * batch_size * local_head_num_ * seq_len_padded * seq_len_padded, true); + tmp_k_buf_ = + (T2*)allocator_->reMalloc(tmp_k_buf_, sizeof(T2) * batch_size * seq_len_padded * local_hidden_units_, true); + tmp_v_buf_ = + (T2*)allocator_->reMalloc(tmp_v_buf_, sizeof(T2) * batch_size * seq_len_padded * local_hidden_units_, true); + is_allocate_buffer_ = true; +} + +template +void GptContextAttentionFP8Layer::freeBuffer() +{ + if (is_allocate_buffer_) { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + allocator_->free((void**)(&qkv_buf_)); + allocator_->free((void**)(&q_buf_2_)); + allocator_->free((void**)(&k_buf_2_)); + allocator_->free((void**)(&v_buf_2_)); + allocator_->free((void**)(&qk_buf_)); + allocator_->free((void**)(&qkv_buf_2_)); + allocator_->free((void**)(&qkv_buf_3_)); + + if (is_qk_buf_float_ == true) { + // allocator_->free(qk_buf_float_); + } + allocator_->free((void**)(&qk_buf_bfloat_)); + allocator_->free((void**)(&tmp_k_buf_)); + allocator_->free((void**)(&tmp_v_buf_)); + is_allocate_buffer_ = false; + } +} + +template class GptContextAttentionFP8Layer<__nv_fp8_e4m3, __nv_bfloat16>; + +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/attention_layers_fp8/GptContextAttentionFP8Layer.h b/src/fastertransformer/layers/attention_layers_fp8/GptContextAttentionFP8Layer.h new file mode 100644 index 000000000..1a183f055 --- /dev/null +++ b/src/fastertransformer/layers/attention_layers_fp8/GptContextAttentionFP8Layer.h @@ -0,0 +1,93 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/layers/attention_layers/BaseAttentionLayer.h" +#include "src/fastertransformer/layers/attention_layers_fp8/AttentionFP8Weight.h" +#include "src/fastertransformer/utils/cublasFP8MMWrapper.h" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" + +namespace fastertransformer { + +template +class GptContextAttentionFP8Layer: public BaseAttentionLayer { +private: + // metadata + const size_t head_num_; + const size_t size_per_head_; + const size_t hidden_units_; + const size_t local_head_num_; + const size_t local_hidden_units_; + const size_t rotary_embedding_dim_; + + void allocateBuffer() override; + void allocateBuffer(size_t batch_size, size_t seq_len); + void freeBuffer() override; + + using BaseAttentionLayer::is_free_buffer_after_forward_; + using BaseAttentionLayer::is_allocate_buffer_; + using BaseAttentionLayer::cublas_wrapper_; + using BaseAttentionLayer::allocator_; + + bool is_qk_buf_float_; + +protected: + using BaseAttentionLayer::stream_; + using BaseAttentionLayer::sparse_; +#ifdef FP8_GEMM_OUTPUT_QUANT_DISABLE + T2* qkv_buf_ = nullptr; +#else + T1* qkv_buf_ = nullptr; +#endif + T1* q_buf_2_ = nullptr; + T1* k_buf_2_ = nullptr; + T1* v_buf_2_ = nullptr; + T1* qk_buf_ = nullptr; + // float* qk_buf_float_ = nullptr; + T2* qk_buf_bfloat_ = nullptr; + +#ifdef FP8_GEMM_OUTPUT_QUANT_DISABLE + T2* qkv_buf_2_ = nullptr; +#else + T1* qkv_buf_2_ = nullptr; +#endif + T1* qkv_buf_3_ = nullptr; + + T2* tmp_k_buf_ = nullptr; + T2* tmp_v_buf_ = nullptr; + +public: + GptContextAttentionFP8Layer(size_t head_num, + size_t size_per_head, + size_t local_head_num, + size_t rotary_embedding_dim, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool is_qk_buf_float, + bool sparse = false); + + GptContextAttentionFP8Layer(GptContextAttentionFP8Layer const& attention_layer); + + virtual ~GptContextAttentionFP8Layer(); + + void + forward(TensorMap* output_tensors, TensorMap* input_tensors, const AttentionWeight* attention_weights) override; +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/attention_layers_fp8/SelfAttentionFP8Layer.cc b/src/fastertransformer/layers/attention_layers_fp8/SelfAttentionFP8Layer.cc new file mode 100644 index 000000000..0ce9ee803 --- /dev/null +++ b/src/fastertransformer/layers/attention_layers_fp8/SelfAttentionFP8Layer.cc @@ -0,0 +1,426 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/layers/attention_layers_fp8/SelfAttentionFP8Layer.h" +#include "3rdparty/trt_fp8_fmha/fused_multihead_attention.h" +#include "src/fastertransformer/kernels/unfused_attention_fp8_kernels.h" +#include "src/fastertransformer/kernels/unfused_attention_kernels.h" +#include "src/fastertransformer/layers/attention_layers_fp8/AttentionFP8Weight.h" +#include "src/fastertransformer/utils/nvtx_utils.h" + +namespace fastertransformer { + +template +void SelfAttentionFP8Layer::forward(TensorMap* output_tensors, + TensorMap* input_tensors, + const AttentionFP8Weight* attention_weights) +{ + // input_tensors: + // input_hidden_state (token_num, d_model), + // attention_mask (batch, 1, seqlen, seqlen), + // padding_offset (token_num) + // relative_attention_bias (optional) + // If padding_offset.data is nullptr, then not remove padding + // trt_padding_offset (batch_size + 1 or 2 * batch_size + 1) + + // ouptut_tensors: + // output_hidden_state [token_num, d_model] + + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + FT_CHECK(input_tensors->size() >= 2); + const int request_batch_size = input_tensors->at("attention_mask").shape[0]; + const int request_seq_len = input_tensors->at("attention_mask").shape[2]; + allocateBuffer(request_batch_size, request_seq_len); + + T1* attention_out = output_tensors->at("output_hidden_state").getPtr(); + const T1* attention_input = input_tensors->at("input_hidden_state").getPtr(); + const T1* attention_mask = input_tensors->at("attention_mask").getPtr(); + const int* padding_offset = + input_tensors->isExist("padding_offset") ? input_tensors->at("padding_offset").getPtr() : nullptr; + const int* trt_padding_offset = + input_tensors->isExist("trt_padding_offset") ? input_tensors->at("trt_padding_offset").getPtr() : nullptr; + + const T1* relative_attention_bias = input_tensors->isExist("relative_attention_bias") ? + input_tensors->at("relative_attention_bias").getPtr() : + nullptr; + + const int m = input_tensors->at("input_hidden_state").shape[0]; + int k = d_model_; + int n = hidden_units_; + const int request_seq_len_padded = (request_seq_len + 15) / 16 * 16; + const AttentionType attention_type = input_tensors->getVal("attention_type"); + + if (attention_weights->query_weight.fuse_gemm_bias) { + PUSH_RANGE("qkv gemm bias"); + reinterpret_cast(cublas_wrapper_) + ->Conv1x1Gemm(q_buf_2_, + m, + 3 * hidden_units_, + d_model_, + attention_input, + attention_weights->query_weight.kernel, + attention_weights->query_weight.bias, + *(attention_weights->query_weight.input_h_scale), // scale_a, + *(attention_weights->query_weight.weight_h_scale), // scale_b, + *(attention_weights->query_weight.output_h_scale_inv), // scale_d, + stream_); + sync_check_cuda_error(); + POP_RANGE; + } + else { + PUSH_RANGE("qkv_gemm"); + if (fp8_mode_ == 1) { + FT_CHECK_WITH_INFO(false, fmtstr("%s not support fp8_mode 1 now", __PRETTY_FUNCTION__)); + } + else if (fp8_mode_ == 2) { + float alpha = 1.0f; + float beta = 0.0f; + reinterpret_cast(cublas_wrapper_) + ->Gemm(qkv_buf_, + (int)1, + (int)m, + (int)3 * hidden_units_, + (int)d_model_, + (int64_t)0, + (int64_t)0, + (int64_t)0, + &alpha, + &beta, + attention_input, + attention_weights->query_weight.kernel, + attention_weights->query_weight.input_scale, + attention_weights->query_weight.weight_scale, + attention_weights->query_weight.output_scale_inv, + stream_); + sync_check_cuda_error(); + } + POP_RANGE; + } + + if (isFusedMHA(attention_type)) { + if (!attention_weights->query_weight.fuse_gemm_bias) { + PUSH_RANGE("invokeFP8TrtAddQKVBias"); + FP8TrtAddQKVBiasParam param{q_buf_2_, + qkv_buf_, + attention_weights->query_weight.bias, + attention_weights->query_weight.output_scale, + attention_weights->query_weight.output_scale_inv, + (size_t)m, + head_num_, + size_per_head_, + head_num_ * size_per_head_, + stream_}; + invokeFP8TrtAddQKVBias(param); + sync_check_cuda_error(); + POP_RANGE; + } + + { + PUSH_RANGE("run_fmha_v2"); + dispatcher_fp8->setup_flags(false, false, false, false, false); + int s = dispatcher_fp8->getSFromMaxSeqLen(request_seq_len); + FT_CHECK(dispatcher_fp8->isValid(s, false)); + float attn_scale_1 = attention_weights->query_weight.output_h_scale[0] + * attention_weights->query_weight.output_h_scale[0] * 1.0f + / q_scaling_; // q and k and softmax scaling + float attn_scale_2 = + attention_weights->query_weight.output_h_scale[0] + * attention_weights->attention_output_weight.input_h_scale_inv[0]; // v and output scale + dispatcher_fp8->setScaleList(attn_scale_1, 0.0f, attn_scale_2); + // For example, if a query is like + // [[S_0, P_0], [S_1, P_1]], where S_i is real tokens and P_i is padded tokens. + // In zero pad case, we remove the padding and the input looks like [S_0, S_1]. + // In padding case, we view padding as sentences and the input looks like [S_0, P_0, S_1, P_0] + // to leverage the fused mha directly. + dispatcher_fp8->setup(s, input_tensors->at("trt_padding_offset").size() - 1); + dispatcher_fp8->run(q_buf_2_, nullptr, const_cast(trt_padding_offset), nullptr, qkv_buf_3_, stream_); + sync_check_cuda_error(); + POP_RANGE; + } + } + else { + FT_CHECK_WITH_INFO(!attention_weights->query_weight.fuse_gemm_bias, + "Unfused MHA only support fuse_gemm_bias=false"); + { + PUSH_RANGE("invokeFP8AddFusedQKVBiasRebuildPadding"); + FP8AddFusedQKVBiasRebuildPaddingParam param{ + q_buf_2_, + k_buf_2_, + v_buf_2_, + qkv_buf_, // T1 + nullptr, // T2 + attention_weights->query_weight.bias, + attention_weights->query_weight.output_scale, + fp8_mode_ == 1 ? attention_weights->query_weight.scale : nullptr, + fp8_mode_ == 1 ? attention_weights->query_weight.per_channel_scale_min : nullptr, + attention_weights->query_weight.output_scale_inv, + padding_offset, + trt_padding_offset, + nullptr, + (uint32_t)m, + (uint32_t)request_batch_size, + (uint32_t)request_seq_len, + (uint32_t)request_seq_len_padded, + (uint32_t)request_seq_len_padded, + (uint32_t)head_num_, + (uint32_t)size_per_head_, + 0, // rotary_embedding_dim_, + stream_}; + invokeFP8AddFusedQKVBiasRebuildPadding(param); + sync_check_cuda_error(); + POP_RANGE; + } + + { + PUSH_RANGE("Q*K batch gemm"); + const float alpha = 1.0f; + const float beta = 0.0f; + reinterpret_cast(cublas_wrapper_) + ->Gemm(qk_buf_bfloat_, + (int)request_batch_size * head_num_, + (int)request_seq_len, + (int)request_seq_len, + (int)size_per_head_, + (int64_t)request_seq_len * size_per_head_, + (int64_t)request_seq_len * size_per_head_, + (int64_t)request_seq_len * request_seq_len, + &alpha, + &beta, + q_buf_2_, + k_buf_2_, + attention_weights->query_weight.output_scale, + attention_weights->query_weight.output_scale, + stream_); + sync_check_cuda_error(); + POP_RANGE; + } + FT_CHECK(relative_attention_bias == nullptr); + // if (relative_attention_bias != nullptr) { + // invokeAddRelativeAttentionBias( + // qk_buf_, relative_attention_bias, request_batch_size, head_num_, request_seq_len, stream_); + // } + + { + PUSH_RANGE("softmax"); + float scalar = (float)(1.0f / (sqrtf(size_per_head_ * 1.0f) * q_scaling_)); + FP8MaskedSoftMaxParam param{qk_buf_, + qk_buf_bfloat_, + attention_mask, + trt_padding_offset, + (uint32_t)request_batch_size, + (uint32_t)request_seq_len, + (uint32_t)head_num_, + scalar, + nullptr, + attention_weights->qk_scale_inv, + stream_}; + invokeFP8MaskedSoftMax(param); + sync_check_cuda_error(); + POP_RANGE; + } + + { + PUSH_RANGE("QK*V batch gemm"); + + const float alpha = 1.0f; + const float beta = 0.0f; + reinterpret_cast(cublas_wrapper_) + ->Gemm(qkv_buf_2_, + (int)request_batch_size * head_num_, + (int)request_seq_len, + (int)size_per_head_, + (int)request_seq_len, + (int64_t)size_per_head_ * request_seq_len, + (int64_t)request_seq_len * request_seq_len, + (int64_t)size_per_head_ * request_seq_len, + &alpha, + &beta, + qk_buf_, + v_buf_2_, + attention_weights->qk_scale, // qk_buf_ scale + attention_weights->query_weight.output_scale, // v_buf_2_ scale + attention_weights->attention_output_weight.input_scale_inv, // outupt_scale + stream_); + + sync_check_cuda_error(); + POP_RANGE + } + { + PUSH_RANGE("invokeFP8TransposeAttentionOutRemovePadding"); + FP8TransposeAttentionOutRemovePaddingParam param{qkv_buf_3_, + qkv_buf_2_, + (const float*)nullptr, + m, + request_batch_size, + request_seq_len, + (int)head_num_, + (int)size_per_head_, + padding_offset, + stream_}; + invokeFP8TransposeAttentionOutRemovePadding(param); + POP_RANGE; + } + } + + k = hidden_units_; + n = d_model_; + + PUSH_RANGE("proj gemm"); + if (fp8_mode_ == 1) { + FT_CHECK_WITH_INFO(false, fmtstr("%s not support fp8_mode 1 now", __PRETTY_FUNCTION__)); + } + else if (fp8_mode_ == 2) { +#ifdef FUSE_GEMM_ACT + reinterpret_cast(cublas_wrapper_) + ->Conv1x1Gemm(attention_out, + m, + n, + k, + qkv_buf_3_, + attention_weights->attention_output_weight.kernel, + attention_weights->attention_output_weight.bias, + *(attention_weights->attention_output_weight.input_h_scale), // scale_a, + *(attention_weights->attention_output_weight.weight_h_scale), // scale_b, + *(attention_weights->attention_output_weight.output_h_scale_inv), // scale_d, + stream_); +#else + float alpha = 1.0f; + float beta = 0.0f; + reinterpret_cast(cublas_wrapper_) + ->Gemm(attention_out, + (int)1, + (int)m, + (int)n, + (int)k, + (int64_t)0, + (int64_t)0, + (int64_t)0, + &alpha, + &beta, + qkv_buf_3_, + attention_weights->attention_output_weight.kernel, + attention_weights->attention_output_weight.input_scale, + attention_weights->attention_output_weight.weight_scale, + attention_weights->attention_output_weight.output_scale_inv, + stream_); +#endif + } + + POP_RANGE; + if (is_free_buffer_after_forward_ == true) { + freeBuffer(); + } + sync_check_cuda_error(); +} + +template +SelfAttentionFP8Layer::SelfAttentionFP8Layer(size_t head_num, + size_t size_per_head, + size_t d_model, + float q_scaling, + int fp8_mode, + int sm, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool sparse): + BaseAttentionFP8Layer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward), + head_num_(head_num), + size_per_head_(size_per_head), + d_model_(d_model), + hidden_units_(head_num_ * size_per_head_), + fp8_mode_(fp8_mode), + sm_(sm), + sparse_(sparse), + q_scaling_(q_scaling) +{ + FT_CHECK_WITH_INFO(sparse_ == false, fmtstr("%s not support sparse gemm yet.", __PRETTY_FUNCTION__)); + if (sm_ == kSM_90 && size_per_head_ == 64) { + dispatcher_fp8.reset(new FusedMHARunnerFP8v2(head_num_, size_per_head_, sm_, q_scaling_)); + } +} + +template +SelfAttentionFP8Layer::SelfAttentionFP8Layer(SelfAttentionFP8Layer const& attention_layer): + SelfAttentionFP8Layer(attention_layer.head_num_, + attention_layer.size_per_head_, + attention_layer.d_model_, + attention_layer.q_scaling_, + attention_layer.fp8_mode_, + attention_layer.sm_, + attention_layer.stream_, + attention_layer.cublas_wrapper_, + attention_layer.allocator_, + attention_layer.is_free_buffer_after_forward_, + attention_layer.sparse_) +{ +} + +template +SelfAttentionFP8Layer::~SelfAttentionFP8Layer() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + cublas_wrapper_ = nullptr; + freeBuffer(); +} + +template +void SelfAttentionFP8Layer::allocateBuffer() +{ + FT_CHECK(false); +} + +template +void SelfAttentionFP8Layer::allocateBuffer(size_t batch_size, size_t seq_len) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + qkv_buf_ = (T1*)(allocator_->reMalloc(qkv_buf_, sizeof(T1) * batch_size * seq_len * 3 * hidden_units_, false)); + qk_buf_bfloat_ = + (T2*)(allocator_->reMalloc(qk_buf_bfloat_, sizeof(T2) * batch_size * head_num_ * seq_len * seq_len, false)); + qk_buf_ = (T1*)(allocator_->reMalloc(qk_buf_, sizeof(T1) * batch_size * head_num_ * seq_len * seq_len, false)); + + q_buf_2_ = (T1*)(allocator_->reMalloc(q_buf_2_, sizeof(T1) * batch_size * seq_len * 3 * hidden_units_, false)); + k_buf_2_ = q_buf_2_ + batch_size * seq_len * hidden_units_; + v_buf_2_ = k_buf_2_ + batch_size * seq_len * hidden_units_; + + qkv_buf_2_ = (T1*)(allocator_->reMalloc(qkv_buf_2_, sizeof(T1) * batch_size * seq_len * hidden_units_, false)); + qkv_buf_3_ = (T1*)(allocator_->reMalloc(qkv_buf_3_, sizeof(T1) * batch_size * seq_len * hidden_units_, false)); + qkv_buf_4_ = (T2*)(allocator_->reMalloc(qkv_buf_4_, sizeof(T2) * batch_size * seq_len * hidden_units_, false)); + + is_allocate_buffer_ = true; +} + +template +void SelfAttentionFP8Layer::freeBuffer() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + if (is_allocate_buffer_) { + allocator_->free((void**)(&qkv_buf_)); + allocator_->free((void**)(&qk_buf_bfloat_)); + allocator_->free((void**)(&qk_buf_)); + allocator_->free((void**)(&q_buf_2_)); + allocator_->free((void**)(&qkv_buf_2_)); + allocator_->free((void**)(&qkv_buf_3_)); + allocator_->free((void**)(&qkv_buf_4_)); + sync_check_cuda_error(); + is_allocate_buffer_ = false; + } +} + +template class SelfAttentionFP8Layer<__nv_fp8_e4m3, __nv_bfloat16>; + +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/attention_layers_fp8/SelfAttentionFP8Layer.h b/src/fastertransformer/layers/attention_layers_fp8/SelfAttentionFP8Layer.h new file mode 100644 index 000000000..addc429dc --- /dev/null +++ b/src/fastertransformer/layers/attention_layers_fp8/SelfAttentionFP8Layer.h @@ -0,0 +1,84 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "3rdparty/trt_fused_multihead_attention/qkvToContext.h" +#include "src/fastertransformer/layers/attention_layers_fp8/BaseAttentionFP8Layer.h" + +namespace fastertransformer { + +template +class SelfAttentionFP8Layer: public BaseAttentionFP8Layer { +private: + // metadata + size_t head_num_; + size_t size_per_head_; + size_t hidden_units_; + size_t d_model_; + bool sparse_; + float q_scaling_; + int fp8_mode_; + int sm_; + + void allocateBuffer() override; + void freeBuffer() override; + void allocateBuffer(size_t batch_size, size_t seq_len); + +protected: + using BaseAttentionFP8Layer::stream_; + using BaseAttentionFP8Layer::is_free_buffer_after_forward_; + using BaseAttentionFP8Layer::is_allocate_buffer_; + using BaseAttentionFP8Layer::cublas_wrapper_; + using BaseAttentionFP8Layer::allocator_; + + std::unique_ptr dispatcher_fp8; + + T1* qkv_buf_ = nullptr; + T2* qk_buf_bfloat_ = nullptr; + + T1* q_buf_2_ = nullptr; + T1* k_buf_2_ = nullptr; + T1* v_buf_2_ = nullptr; + + T1* qk_buf_ = nullptr; + T1* qkv_buf_2_ = nullptr; + T1* qkv_buf_3_ = nullptr; + T2* qkv_buf_4_ = nullptr; + +public: + SelfAttentionFP8Layer(size_t head_num, + size_t size_per_head, + size_t d_model, + float q_scaling, + int fp8_mode, + int sm, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool sparse = false); + + SelfAttentionFP8Layer(SelfAttentionFP8Layer const& attention_layer); + + ~SelfAttentionFP8Layer(); + + void forward(TensorMap* output_tensors, + TensorMap* input_tensors, + const AttentionFP8Weight* attention_weights) override; +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/attention_layers_fp8/TensorParallelDecoderSelfAttentionFP8Layer.cc b/src/fastertransformer/layers/attention_layers_fp8/TensorParallelDecoderSelfAttentionFP8Layer.cc new file mode 100644 index 000000000..f02bced24 --- /dev/null +++ b/src/fastertransformer/layers/attention_layers_fp8/TensorParallelDecoderSelfAttentionFP8Layer.cc @@ -0,0 +1,95 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/layers/attention_layers_fp8/TensorParallelDecoderSelfAttentionFP8Layer.h" + +namespace fastertransformer { + +template +TensorParallelDecoderSelfAttentionFP8Layer::TensorParallelDecoderSelfAttentionFP8Layer( + size_t head_num, + size_t size_per_head, + size_t rotary_embedding_dim, + bool neox_rotary_style, + size_t d_model, + float q_scaling, + NcclParam tensor_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool is_sparse): + DecoderSelfAttentionFP8Layer(head_num, + size_per_head, + head_num / tensor_para.world_size_, + rotary_embedding_dim, + neox_rotary_style, + d_model, + q_scaling, + stream, + cublas_wrapper, + allocator, + is_free_buffer_after_forward, + is_sparse), + tensor_para_(tensor_para) +{ + FT_CHECK(head_num % tensor_para_.world_size_ == 0); +} + +template +TensorParallelDecoderSelfAttentionFP8Layer::TensorParallelDecoderSelfAttentionFP8Layer( + TensorParallelDecoderSelfAttentionFP8Layer const& attention_layer): + DecoderSelfAttentionFP8Layer(attention_layer), tensor_para_(attention_layer.tensor_para_) +{ +} + +template +void TensorParallelDecoderSelfAttentionFP8Layer::forward(TensorMap* output_tensors, + TensorMap* input_tensors, + const AttentionWeight* attention_weights) +{ + // input tensors: + // attention_input [batch_size, hidden_dimension], + // finished [batch_size], + // sequence_lengths [batch_size] + // input_lengths [batch_size] + // max_input_length [1] on cpu + // step [1] on cpu + + // output tensors: + // attention_output [batch_size, hidden_dimension], + // key_cache [batch, head_num, size_per_head // x, max_seq_len, x] + // value_cache [batch, head_num, max_seq_len, size_per_head] + + DecoderSelfAttentionFP8Layer::forward(output_tensors, input_tensors, attention_weights); + + const size_t batch_size = output_tensors->at("attention_output").shape[0]; + const size_t hidden_units = output_tensors->at("attention_output").shape[1]; + + T2* attention_out = (T2*)(output_tensors->at("attention_output").data); + if (tensor_para_.world_size_ > 1) { + ftNcclAllReduceSum(attention_out, + attention_out, + batch_size * hidden_units, + tensor_para_, + DecoderSelfAttentionFP8Layer::stream_); + sync_check_cuda_error(); + } +} + +template class TensorParallelDecoderSelfAttentionFP8Layer<__nv_fp8_e4m3, __nv_bfloat16>; + +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/attention_layers_fp8/TensorParallelDecoderSelfAttentionFP8Layer.h b/src/fastertransformer/layers/attention_layers_fp8/TensorParallelDecoderSelfAttentionFP8Layer.h new file mode 100644 index 000000000..860c05418 --- /dev/null +++ b/src/fastertransformer/layers/attention_layers_fp8/TensorParallelDecoderSelfAttentionFP8Layer.h @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/layers/attention_layers_fp8/DecoderSelfAttentionFP8Layer.h" +#include "src/fastertransformer/utils/nccl_utils.h" + +namespace fastertransformer { + +template +class TensorParallelDecoderSelfAttentionFP8Layer: public DecoderSelfAttentionFP8Layer { +private: + NcclParam tensor_para_; + +protected: +public: + TensorParallelDecoderSelfAttentionFP8Layer(size_t head_num, + size_t size_per_head, + size_t rotary_embedding_dim, + bool neox_rotary_style, + size_t d_model, + float q_scaling, + NcclParam tensor_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool is_sparse = false); + + TensorParallelDecoderSelfAttentionFP8Layer( + TensorParallelDecoderSelfAttentionFP8Layer const& attention_layer); + + ~TensorParallelDecoderSelfAttentionFP8Layer() = default; + + void + forward(TensorMap* output_tensors, TensorMap* input_tensors, const AttentionWeight* attention_weights) override; +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/attention_layers_fp8/TensorParallelGptContextAttentionFP8Layer.cc b/src/fastertransformer/layers/attention_layers_fp8/TensorParallelGptContextAttentionFP8Layer.cc new file mode 100644 index 000000000..37673a73a --- /dev/null +++ b/src/fastertransformer/layers/attention_layers_fp8/TensorParallelGptContextAttentionFP8Layer.cc @@ -0,0 +1,86 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/layers/attention_layers_fp8/TensorParallelGptContextAttentionFP8Layer.h" + +namespace fastertransformer { + +template +void TensorParallelGptContextAttentionFP8Layer::forward(TensorMap* output_tensors, + TensorMap* input_tensors, + const AttentionWeight* attention_weights) +{ + // input_tensors: + // input_query [batch_size * seq_len, hidden_dimension] + // attention_mask [batch_size, 1, seq_len, seq_len] + // is_final_layer [1], bool on cpu + + // output_tensors: + // attention_out [batch_size * seq_len, hidden_dimension] + // key_cache [batch, local_head_num, size_per_head // x, max_seq_len, x] + // value_cache [batch, local_head_num, max_seq_len, size_per_head] + + GptContextAttentionFP8Layer::forward(output_tensors, input_tensors, attention_weights); + + const size_t m = output_tensors->at("attention_out").shape[0]; + const size_t hidden_units = output_tensors->at("attention_out").shape[1]; + + T2* attention_out = (T2*)(output_tensors->at("attention_out").data); + if (tensor_para_.world_size_ > 1) { + ftNcclAllReduceSum( + attention_out, attention_out, m * hidden_units, tensor_para_, GptContextAttentionFP8Layer::stream_); + sync_check_cuda_error(); + } +} + +template +TensorParallelGptContextAttentionFP8Layer::TensorParallelGptContextAttentionFP8Layer( + size_t head_num, + size_t size_per_head, + size_t rotary_embedding_dim, + NcclParam tensor_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool is_qk_buf_float, + bool sparse): + GptContextAttentionFP8Layer(head_num, + size_per_head, + head_num / tensor_para.world_size_, + rotary_embedding_dim, + stream, + cublas_wrapper, + allocator, + is_free_buffer_after_forward, + is_qk_buf_float, + sparse), + tensor_para_(tensor_para) +{ + FT_CHECK(head_num % tensor_para_.world_size_ == 0); +} + +template +TensorParallelGptContextAttentionFP8Layer::TensorParallelGptContextAttentionFP8Layer( + TensorParallelGptContextAttentionFP8Layer const& attention_layer): + GptContextAttentionFP8Layer(attention_layer), tensor_para_(attention_layer.tensor_para_) + +{ +} + +template class TensorParallelGptContextAttentionFP8Layer<__nv_fp8_e4m3, __nv_bfloat16>; + +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/layers/attention_layers_fp8/TensorParallelGptContextAttentionFP8Layer.h b/src/fastertransformer/layers/attention_layers_fp8/TensorParallelGptContextAttentionFP8Layer.h new file mode 100644 index 000000000..e23273228 --- /dev/null +++ b/src/fastertransformer/layers/attention_layers_fp8/TensorParallelGptContextAttentionFP8Layer.h @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/layers/attention_layers_fp8/GptContextAttentionFP8Layer.h" +#include "src/fastertransformer/utils/nccl_utils.h" + +namespace fastertransformer { + +template +class TensorParallelGptContextAttentionFP8Layer: public GptContextAttentionFP8Layer { +private: + NcclParam tensor_para_; + +public: + TensorParallelGptContextAttentionFP8Layer(size_t head_num, + size_t size_per_head, + size_t rotary_embedding_dim, + NcclParam tensor_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool is_qk_buf_float, + bool sparse = false); + + TensorParallelGptContextAttentionFP8Layer(TensorParallelGptContextAttentionFP8Layer const& attention_layer); + + ~TensorParallelGptContextAttentionFP8Layer() = default; + + void + forward(TensorMap* output_tensors, TensorMap* input_tensors, const AttentionWeight* attention_weights) override; +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/attention_layers_int8/AttentionINT8Weight.h b/src/fastertransformer/layers/attention_layers_int8/AttentionINT8Weight.h index 91083412a..43315d51d 100644 --- a/src/fastertransformer/layers/attention_layers_int8/AttentionINT8Weight.h +++ b/src/fastertransformer/layers/attention_layers_int8/AttentionINT8Weight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/attention_layers_int8/CMakeLists.txt b/src/fastertransformer/layers/attention_layers_int8/CMakeLists.txt index 17189ac17..54dc93a38 100644 --- a/src/fastertransformer/layers/attention_layers_int8/CMakeLists.txt +++ b/src/fastertransformer/layers/attention_layers_int8/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/attention_layers_int8/FusedAttentionLayerINT8.cu b/src/fastertransformer/layers/attention_layers_int8/FusedAttentionLayerINT8.cu index 9c08cdf51..e8eac8482 100644 --- a/src/fastertransformer/layers/attention_layers_int8/FusedAttentionLayerINT8.cu +++ b/src/fastertransformer/layers/attention_layers_int8/FusedAttentionLayerINT8.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/attention_layers_int8/FusedAttentionLayerINT8.h b/src/fastertransformer/layers/attention_layers_int8/FusedAttentionLayerINT8.h index 95e61bb29..b46aac039 100644 --- a/src/fastertransformer/layers/attention_layers_int8/FusedAttentionLayerINT8.h +++ b/src/fastertransformer/layers/attention_layers_int8/FusedAttentionLayerINT8.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/attention_layers_int8/UnfusedAttentionLayerINT8.cc b/src/fastertransformer/layers/attention_layers_int8/UnfusedAttentionLayerINT8.cc index 57e3920bd..6b97d355f 100644 --- a/src/fastertransformer/layers/attention_layers_int8/UnfusedAttentionLayerINT8.cc +++ b/src/fastertransformer/layers/attention_layers_int8/UnfusedAttentionLayerINT8.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/attention_layers_int8/UnfusedAttentionLayerINT8.h b/src/fastertransformer/layers/attention_layers_int8/UnfusedAttentionLayerINT8.h index 670f8eb03..9befe5836 100644 --- a/src/fastertransformer/layers/attention_layers_int8/UnfusedAttentionLayerINT8.h +++ b/src/fastertransformer/layers/attention_layers_int8/UnfusedAttentionLayerINT8.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/attention_layers_int8/WindowAttentionINT8.cu b/src/fastertransformer/layers/attention_layers_int8/WindowAttentionINT8.cu index add5971d9..9019d5d4c 100644 --- a/src/fastertransformer/layers/attention_layers_int8/WindowAttentionINT8.cu +++ b/src/fastertransformer/layers/attention_layers_int8/WindowAttentionINT8.cu @@ -254,8 +254,8 @@ void WindowAttentionINT8::forward(TensorMap* output_tensors, const int shift_size = additional_params[4]; const int sm = additional_params[5]; const int window_size_in_use = additional_params[6]; - const int basic_layer_id = additional_params[7]; - const int block_id = additional_params[8]; + // const int basic_layer_id = additional_params[7]; // not used + // const int block_id = additional_params[8]; // not used int use_ORDER_COL32_2R_4R4 = (sm >= 80 ? 1 : 0); diff --git a/src/fastertransformer/layers/beam_search_layers/BaseBeamSearchLayer.cu b/src/fastertransformer/layers/beam_search_layers/BaseBeamSearchLayer.cu index 7a5b4fcc0..f09929393 100644 --- a/src/fastertransformer/layers/beam_search_layers/BaseBeamSearchLayer.cu +++ b/src/fastertransformer/layers/beam_search_layers/BaseBeamSearchLayer.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -193,6 +193,9 @@ void BaseBeamSearchLayer::forward(TensorMap* output_tensors, TensorMap* input // temperature [1] on cpu, optional // len_penalty [1] on cpu, optional // repetition_penalty [1] on cpu, optional + // presence_penalty [1] on cpu, optional + // Only one of repetition and presence penalties is allowed. + // min_length [1] on cpu, int, optional // output_tensors: // output_ids [max_seq_len, batch_size, beam_width] @@ -214,32 +217,45 @@ void BaseBeamSearchLayer::forward(TensorMap* output_tensors, TensorMap* input const int ite = input_tensors->at("ite").getVal(); const int local_batch_size = input_tensors->at("logits").shape[0]; - const float temperature = - input_tensors->isExist("temperature") ? input_tensors->at("temperature").getVal() : 1.0f; - const float repetition_penalty = - input_tensors->isExist("repetition_penalty") ? input_tensors->at("repetition_penalty").getVal() : 1.0f; - const T* embedding_bias = - input_tensors->isExist("embedding_bias") ? input_tensors->at("embedding_bias").getPtr() : nullptr; + const float temperature = input_tensors->getVal("temperature", 1.0f); + const T* embedding_bias = input_tensors->getPtr("embedding_bias", nullptr); + + RepetitionPenaltyType repetition_penalty_type = RepetitionPenaltyType::None; + float repetition_penalty = getDefaultPenaltyValue(repetition_penalty_type); + if (input_tensors->isExist("repetition_penalty") || input_tensors->isExist("presence_penalty")) { + FT_CHECK_WITH_INFO( + !(input_tensors->isExist("repetition_penalty") && input_tensors->isExist("presence_penalty")), + "Found ambiguous parameters repetition_penalty and presence_penalty which are mutually exclusive. " + "Please provide one of repetition_penalty or presence_penalty."); + repetition_penalty_type = input_tensors->isExist("repetition_penalty") ? RepetitionPenaltyType::Multiplicative : + RepetitionPenaltyType::Additive; + repetition_penalty = repetition_penalty_type == RepetitionPenaltyType::Multiplicative ? + input_tensors->getVal("repetition_penalty") : + input_tensors->getVal("presence_penalty"); + } invokeAddBiasApplyPenalties( step, input_tensors->at("logits").getPtr(), output_tensors->at("output_ids") .getPtrWithOffset((step - 1) * batch_size * beam_width + ite * local_batch_size * beam_width), - output_tensors->at("output_ids").getPtr(), - output_tensors->at("parent_ids").getPtr(), - input_tensors->at("input_lengths", Tensor{MEMORY_GPU, TYPE_INT32, {}, nullptr}).getPtr(), + output_tensors->getPtr("output_ids"), + output_tensors->getPtr("parent_ids"), + input_tensors->getPtr("input_lengths", nullptr), + output_tensors->getPtr("sequence_length", nullptr), embedding_bias, ite, - input_tensors->at("max_input_length").getVal(), + input_tensors->getVal("max_input_length"), local_batch_size, batch_size, beam_width, vocab_size_, vocab_size_padded_, - input_tensors->at("end_id").getPtr(), + input_tensors->getPtr("end_id", nullptr), temperature, repetition_penalty, + repetition_penalty_type, + input_tensors->getVal("min_length", 0), stream_); sync_check_cuda_error(); diff --git a/src/fastertransformer/layers/beam_search_layers/BaseBeamSearchLayer.h b/src/fastertransformer/layers/beam_search_layers/BaseBeamSearchLayer.h index 60be29dcf..bbd02ef7d 100644 --- a/src/fastertransformer/layers/beam_search_layers/BaseBeamSearchLayer.h +++ b/src/fastertransformer/layers/beam_search_layers/BaseBeamSearchLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -16,6 +16,7 @@ #pragma once +#include "src/fastertransformer/kernels/penalty_types.h" #include "src/fastertransformer/layers/DynamicDecodeBaseLayer.h" namespace fastertransformer { diff --git a/src/fastertransformer/layers/beam_search_layers/BeamSearchLayer.cu b/src/fastertransformer/layers/beam_search_layers/BeamSearchLayer.cu index f96e7ec3c..23efb4828 100644 --- a/src/fastertransformer/layers/beam_search_layers/BeamSearchLayer.cu +++ b/src/fastertransformer/layers/beam_search_layers/BeamSearchLayer.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/beam_search_layers/BeamSearchLayer.h b/src/fastertransformer/layers/beam_search_layers/BeamSearchLayer.h index bc19b8d86..4c30f23ac 100644 --- a/src/fastertransformer/layers/beam_search_layers/BeamSearchLayer.h +++ b/src/fastertransformer/layers/beam_search_layers/BeamSearchLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/beam_search_layers/CMakeLists.txt b/src/fastertransformer/layers/beam_search_layers/CMakeLists.txt index cbc6a8ab1..270872233 100644 --- a/src/fastertransformer/layers/beam_search_layers/CMakeLists.txt +++ b/src/fastertransformer/layers/beam_search_layers/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/beam_search_layers/OnlineBeamSearchLayer.cu b/src/fastertransformer/layers/beam_search_layers/OnlineBeamSearchLayer.cu index 8ab8af74e..89f489d00 100644 --- a/src/fastertransformer/layers/beam_search_layers/OnlineBeamSearchLayer.cu +++ b/src/fastertransformer/layers/beam_search_layers/OnlineBeamSearchLayer.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -189,8 +189,7 @@ void OnlineBeamSearchLayer::allocateBuffer(size_t batch_size, size_t beam_wid // 64 is the max beam width we support now. topk_softmax_workspace_size_ = (size_t)(ceil(batch_size * 64 * (64 * 2) / 4.) * 4 * 2 - + ceil(batch_size * (64 * 2) * SMALL_TOP_K_SOFTMAX_MAX_VOC_PARTS * (2 * (MAX_K * 2) + 2) / 4.) - * 4); + + ceil(batch_size * (64 * 2) * SMALL_TOP_K_SOFTMAX_MAX_VOC_PARTS * (2 * (MAX_K * 2) + 2) / 4.) * 4); topk_softmax_workspace_ = reinterpret_cast( allocator_->reMalloc(topk_softmax_workspace_, sizeof(float) * topk_softmax_workspace_size_, true)); diff --git a/src/fastertransformer/layers/beam_search_layers/OnlineBeamSearchLayer.h b/src/fastertransformer/layers/beam_search_layers/OnlineBeamSearchLayer.h index 83a55c98e..3991a11ce 100644 --- a/src/fastertransformer/layers/beam_search_layers/OnlineBeamSearchLayer.h +++ b/src/fastertransformer/layers/beam_search_layers/OnlineBeamSearchLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/sampling_layers/BaseSamplingLayer.cc b/src/fastertransformer/layers/sampling_layers/BaseSamplingLayer.cc index 80c22b0e9..bb168847f 100644 --- a/src/fastertransformer/layers/sampling_layers/BaseSamplingLayer.cc +++ b/src/fastertransformer/layers/sampling_layers/BaseSamplingLayer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -37,6 +37,7 @@ void BaseSamplingLayer::allocateBuffer(size_t batch_size, Tensor top_k, Tenso reinterpret_cast(allocator_->reMalloc(temperature_buf_, sizeof(float) * batch_size, false)); repetition_penalty_buf_ = reinterpret_cast(allocator_->reMalloc(repetition_penalty_buf_, sizeof(float) * batch_size, false)); + min_lengths_buf_ = reinterpret_cast(allocator_->reMalloc(min_lengths_buf_, sizeof(int) * batch_size, false)); runtime_logits_buf_ = reinterpret_cast( allocator_->reMalloc(runtime_logits_buf_, sizeof(T) * batch_size * vocab_size_padded_, false)); skip_decode_buf_ = @@ -45,6 +46,7 @@ void BaseSamplingLayer::allocateBuffer(size_t batch_size, Tensor top_k, Tenso // host buffers. temperature_ = new float[batch_size]; repetition_penalty_ = new float[batch_size]; + min_lengths_ = new int[batch_size]; skip_decode_ = new bool[batch_size]; is_allocate_buffer_ = true; @@ -59,10 +61,12 @@ void BaseSamplingLayer::freeBuffer() allocator_->free((void**)(&random_seeds_buf_)); allocator_->free((void**)(&temperature_buf_)); allocator_->free((void**)(&repetition_penalty_buf_)); + allocator_->free((void**)(&min_lengths_buf_)); allocator_->free((void**)(&runtime_logits_buf_)); allocator_->free((void**)(&skip_decode_buf_)); delete[] temperature_; delete[] repetition_penalty_; + delete[] min_lengths_; delete[] skip_decode_; is_allocate_buffer_ = false; } @@ -114,6 +118,9 @@ void BaseSamplingLayer::setup(const size_t batch_size, const size_t beam_widt // runtime_top_p [1] or [batch_size] on cpu, optional // temperature [1] or [batch_size] on cpu, optional // repetition_penalty [1] or [batch_size] on cpu, optional + // presence_penalty [1] or [batch_size] on cpu, optional, + // repetition_penalty and presence_penalty are mutually exclusive. + // min_length [1] or [batch_size] on cpu, optional FT_LOG_DEBUG(__PRETTY_FUNCTION__); Tensor runtime_top_k = runtime_args->isExist("runtime_top_k") ? runtime_args->at("runtime_top_k") : Tensor(); @@ -161,18 +168,40 @@ void BaseSamplingLayer::setup(const size_t batch_size, const size_t beam_widt std::copy_n(temperature.getPtr(), batch_size, temperature_); } - const float default_repetition_penalty = 1.0f; - Tensor repetition_penalty = runtime_args->isExist("repetition_penalty") ? - runtime_args->at("repetition_penalty") : - Tensor(MEMORY_CPU, TYPE_FP32, {1}, &default_repetition_penalty); - if (repetition_penalty.size() == 1) { - float rp = repetition_penalty.getVal(); - deviceFill(repetition_penalty_buf_, batch_size, rp, stream_); - std::fill_n(repetition_penalty_, batch_size, rp); + if (runtime_args->isExist("repetition_penalty") || runtime_args->isExist("presence_penalty")) { + FT_CHECK_WITH_INFO( + !(runtime_args->isExist("repetition_penalty") && runtime_args->isExist("presence_penalty")), + "Found ambiguous parameters repetition_penalty and presence_penalty which are mutually exclusive. " + "Please provide one of repetition_penalty or presence_penalty."); + repetition_penalty_type_ = runtime_args->isExist("repetition_penalty") ? RepetitionPenaltyType::Multiplicative : + RepetitionPenaltyType::Additive; + Tensor repetition_penalty = repetition_penalty_type_ == RepetitionPenaltyType::Multiplicative ? + runtime_args->at("repetition_penalty") : + runtime_args->at("presence_penalty"); + if (repetition_penalty.size() == 1) { + float rp = repetition_penalty.getVal(); + deviceFill(repetition_penalty_buf_, batch_size, rp, stream_); + std::fill_n(repetition_penalty_, batch_size, rp); + } + else { + cudaAutoCpy(repetition_penalty_buf_, repetition_penalty.getPtr(), batch_size, stream_); + std::copy_n(repetition_penalty.getPtr(), batch_size, repetition_penalty_); + } } else { - cudaAutoCpy(repetition_penalty_buf_, repetition_penalty.getPtr(), batch_size, stream_); - std::copy_n(repetition_penalty.getPtr(), batch_size, repetition_penalty_); + repetition_penalty_type_ = RepetitionPenaltyType::None; + } + + const int default_min_length = 0; + Tensor min_lengths = runtime_args->at("min_length", Tensor(MEMORY_CPU, TYPE_INT32, {1}, &default_min_length)); + if (min_lengths.size() == 1) { + int minlen = min_lengths.getVal(); + deviceFill(min_lengths_buf_, batch_size, minlen, stream_); + std::fill_n(min_lengths_, batch_size, minlen); + } + else { + cudaAutoCpy(min_lengths_buf_, min_lengths.getPtr(), batch_size, stream_); + std::copy_n(min_lengths.getPtr(), batch_size, min_lengths_); } } @@ -232,6 +261,7 @@ void BaseSamplingLayer::forward(TensorMap* output_tensors, TensorMap* input_t // max_input_length [1] on cpu // input_lengths [local_batch_size], optional // ite [1] on cpu + // end_id [local_batch_size], optional // output_tensors: // output_ids [max_seq_len, batch_size] @@ -249,9 +279,10 @@ void BaseSamplingLayer::forward(TensorMap* output_tensors, TensorMap* input_t const int local_batch_size = input_tensors->at("logits").shape[0]; const int step = input_tensors->at("step").getVal(); const int ite = input_tensors->at("ite").getVal(); + const int max_input_length = input_tensors->at("max_input_length").getVal(); T* logits = input_tensors->at("logits").getPtr(); -#define ALL_OF(p_, sz_, dt_, v_) (std::all_of(p_, p_ + sz_, [](dt_ b) { return b == v_; })) +#define ALL_OF(p_, sz_, dt_, v_) (std::all_of(p_, p_ + sz_, [&](dt_ b) { return b == v_; })) bool* skip_decode = skip_decode_ + ite * local_batch_size; if (ALL_OF(skip_decode, local_batch_size, bool, true)) { @@ -281,18 +312,39 @@ void BaseSamplingLayer::forward(TensorMap* output_tensors, TensorMap* input_t } sync_check_cuda_error(); - if (step > 1 && !ALL_OF(repetition_penalty_ + ite * local_batch_size, local_batch_size, float, 1.0f)) { - invokeBatchApplyRepetitionPenalty( - logits, - repetition_penalty_buf_ + ite * local_batch_size, - output_tensors->at("output_ids").getPtrWithOffset(ite * local_batch_size), - batch_size, - local_batch_size, - vocab_size_padded_, - input_tensors->at("input_lengths", Tensor{MEMORY_GPU, TYPE_INT32, {}, nullptr}).getPtr(), - input_tensors->at("max_input_length").getVal(), - step, - stream_); + if (step > 1 && repetition_penalty_type_ != RepetitionPenaltyType::None) { + float default_value = getDefaultPenaltyValue(repetition_penalty_type_); + if (!ALL_OF(repetition_penalty_ + ite * local_batch_size, local_batch_size, float, default_value)) { + invokeBatchApplyRepetitionPenalty( + logits, + repetition_penalty_buf_ + ite * local_batch_size, + output_tensors->at("output_ids").getPtrWithOffset(ite * local_batch_size), + batch_size, + local_batch_size, + vocab_size_padded_, + input_tensors->at("input_lengths", Tensor{MEMORY_GPU, TYPE_INT32, {}, nullptr}).getPtr(), + max_input_length, + step, + repetition_penalty_type_, + stream_); + sync_check_cuda_error(); + } + } + + const int num_generated_tokens = step - max_input_length; + const int* min_lengths = min_lengths_ + ite * local_batch_size; + const bool invoke_min_length_penalty = std::any_of( + min_lengths, min_lengths + local_batch_size, [&](int min_length) { return min_length > num_generated_tokens; }); + if (invoke_min_length_penalty) { + FT_CHECK_WITH_INFO(input_tensors->isExist("end_id"), "Need end_id to apply min length penlaty"); + invokeMinLengthPenalty(logits, + min_lengths_buf_ + ite * local_batch_size, + input_tensors->getPtr("end_id"), + output_tensors->getPtr("sequence_length"), + max_input_length, + local_batch_size, + vocab_size_padded_, + stream_); sync_check_cuda_error(); } #undef ALL_OF diff --git a/src/fastertransformer/layers/sampling_layers/BaseSamplingLayer.h b/src/fastertransformer/layers/sampling_layers/BaseSamplingLayer.h index b40a22eaa..3b02cd596 100644 --- a/src/fastertransformer/layers/sampling_layers/BaseSamplingLayer.h +++ b/src/fastertransformer/layers/sampling_layers/BaseSamplingLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -19,6 +19,7 @@ #include +#include "src/fastertransformer/kernels/penalty_types.h" #include "src/fastertransformer/layers/DynamicDecodeBaseLayer.h" namespace fastertransformer { @@ -39,14 +40,18 @@ class BaseSamplingLayer: public DynamicDecodeBaseLayer { float* temperature_buf_ = nullptr; float* repetition_penalty_buf_ = nullptr; + int* min_lengths_buf_ = nullptr; bool* skip_decode_buf_ = nullptr; T* runtime_logits_buf_ = nullptr; float* temperature_ = nullptr; float* repetition_penalty_ = nullptr; + int* min_lengths_ = nullptr; bool* skip_decode_ = nullptr; bool skip_any_ = false; + RepetitionPenaltyType repetition_penalty_type_ = RepetitionPenaltyType::None; + virtual void runSampling(TensorMap* output_tensors, TensorMap* input_tensors) = 0; virtual void freeBuffer(); diff --git a/src/fastertransformer/layers/sampling_layers/CMakeLists.txt b/src/fastertransformer/layers/sampling_layers/CMakeLists.txt index 97c037cb9..fab57668e 100644 --- a/src/fastertransformer/layers/sampling_layers/CMakeLists.txt +++ b/src/fastertransformer/layers/sampling_layers/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/sampling_layers/TopKSamplingLayer.cu b/src/fastertransformer/layers/sampling_layers/TopKSamplingLayer.cu index 6f4d0c081..d0092e279 100644 --- a/src/fastertransformer/layers/sampling_layers/TopKSamplingLayer.cu +++ b/src/fastertransformer/layers/sampling_layers/TopKSamplingLayer.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -35,7 +35,7 @@ __global__ void setup_topk_runtime_args(int batch_size, int top_ps_size, bool* skip_decode) { - int index = blockIdx.x * gridDim.x + threadIdx.x; + int index = blockIdx.x * blockDim.x + threadIdx.x; for (int i = index; i < batch_size; i += gridDim.x * blockDim.x) { uint k = top_ks_size > 1 ? top_ks[i] : top_k; float p = top_ps_size > 1 ? top_ps[i] : top_p; @@ -167,7 +167,7 @@ void TopKSamplingLayer::setup(const size_t batch_size, const size_t beam_widt cudaAutoCpy(runtime_top_p_buf_, runtime_top_p.getPtr(), batch_size, stream_); } - dim3 block(std::min((int)batch_size, 1024)); + dim3 block(std::min((int)batch_size, 256)); dim3 grid(div_up((int)batch_size, (int)block.x)); // support top_k up to 1024. setup_topk_runtime_args<1024><<>>(batch_size, diff --git a/src/fastertransformer/layers/sampling_layers/TopKSamplingLayer.h b/src/fastertransformer/layers/sampling_layers/TopKSamplingLayer.h index 3ea1dc807..3b62a44b3 100644 --- a/src/fastertransformer/layers/sampling_layers/TopKSamplingLayer.h +++ b/src/fastertransformer/layers/sampling_layers/TopKSamplingLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/layers/sampling_layers/TopPSamplingLayer.cu b/src/fastertransformer/layers/sampling_layers/TopPSamplingLayer.cu index d739e5f92..2fa3e6b0f 100644 --- a/src/fastertransformer/layers/sampling_layers/TopPSamplingLayer.cu +++ b/src/fastertransformer/layers/sampling_layers/TopPSamplingLayer.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -66,7 +66,7 @@ static __global__ void set_topp_runtime_args(int batch_size, * */ - int index = blockIdx.x * gridDim.x + threadIdx.x; + int index = blockIdx.x * blockDim.x + threadIdx.x; for (int i = index; i < batch_size; i += gridDim.x * blockDim.x) { uint k = top_ks_size > 1 ? top_ks[i] : top_k; float p = top_ps_size > 1 ? top_ps[i] : top_p; @@ -223,7 +223,7 @@ void TopPSamplingLayer::setup(const size_t batch_size, const size_t beam_widt cudaH2Dcpy(runtime_top_p_buf_, runtime_top_p.getPtr(), batch_size); } - dim3 block(std::min((int)batch_size, 1024)); + dim3 block(std::min((int)batch_size, 256)); dim3 grid(div_up((int)batch_size, (int)block.x)); const float* top_p_decay = runtime_args->getPtr("top_p_decay", nullptr); diff --git a/src/fastertransformer/layers/sampling_layers/TopPSamplingLayer.h b/src/fastertransformer/layers/sampling_layers/TopPSamplingLayer.h index 5c6f973de..17463ce93 100644 --- a/src/fastertransformer/layers/sampling_layers/TopPSamplingLayer.h +++ b/src/fastertransformer/layers/sampling_layers/TopPSamplingLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/layers/xlnet_attention_layers/CMakeLists.txt b/src/fastertransformer/layers/xlnet_attention_layers/CMakeLists.txt index 4131d60e2..5e57d41a2 100644 --- a/src/fastertransformer/layers/xlnet_attention_layers/CMakeLists.txt +++ b/src/fastertransformer/layers/xlnet_attention_layers/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/xlnet_attention_layers/XlnetAttentionLayer.cc b/src/fastertransformer/layers/xlnet_attention_layers/XlnetAttentionLayer.cc index eb1e7d040..45dffe3de 100644 --- a/src/fastertransformer/layers/xlnet_attention_layers/XlnetAttentionLayer.cc +++ b/src/fastertransformer/layers/xlnet_attention_layers/XlnetAttentionLayer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/xlnet_attention_layers/XlnetAttentionLayer.h b/src/fastertransformer/layers/xlnet_attention_layers/XlnetAttentionLayer.h index 0b719d200..b85ae1295 100644 --- a/src/fastertransformer/layers/xlnet_attention_layers/XlnetAttentionLayer.h +++ b/src/fastertransformer/layers/xlnet_attention_layers/XlnetAttentionLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/xlnet_attention_layers/XlnetAttentionWeight.h b/src/fastertransformer/layers/xlnet_attention_layers/XlnetAttentionWeight.h index 5157751c0..481f2b0b6 100644 --- a/src/fastertransformer/layers/xlnet_attention_layers/XlnetAttentionWeight.h +++ b/src/fastertransformer/layers/xlnet_attention_layers/XlnetAttentionWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/BaseWeight.h b/src/fastertransformer/models/BaseWeight.h index f610baa07..4c7312ac3 100644 --- a/src/fastertransformer/models/BaseWeight.h +++ b/src/fastertransformer/models/BaseWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/CMakeLists.txt b/src/fastertransformer/models/CMakeLists.txt index 4eb8cf3c4..248b4af3d 100644 --- a/src/fastertransformer/models/CMakeLists.txt +++ b/src/fastertransformer/models/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -14,6 +14,10 @@ add_subdirectory(bert) add_subdirectory(bert_int8) +if(ENABLE_FP8) +add_subdirectory(bert_fp8) +endif() +add_subdirectory(deberta) add_subdirectory(decoder) add_subdirectory(longformer) add_subdirectory(decoding) @@ -24,6 +28,9 @@ add_subdirectory(bart) add_subdirectory(gptj) add_subdirectory(gptneox) add_subdirectory(multi_gpu_gpt) +if(ENABLE_FP8) +add_subdirectory(gpt_fp8) +endif() add_subdirectory(swin) add_subdirectory(swin_int8) add_subdirectory(vit) diff --git a/src/fastertransformer/models/bart/BartDecoder.cc b/src/fastertransformer/models/bart/BartDecoder.cc index 25b9cad6d..2c7180549 100644 --- a/src/fastertransformer/models/bart/BartDecoder.cc +++ b/src/fastertransformer/models/bart/BartDecoder.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/bart/BartDecoder.h b/src/fastertransformer/models/bart/BartDecoder.h index d9d1f9019..e9cb9e174 100644 --- a/src/fastertransformer/models/bart/BartDecoder.h +++ b/src/fastertransformer/models/bart/BartDecoder.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/bart/BartDecoderLayerWeight.cc b/src/fastertransformer/models/bart/BartDecoderLayerWeight.cc index e4c2d480a..3b17c7317 100644 --- a/src/fastertransformer/models/bart/BartDecoderLayerWeight.cc +++ b/src/fastertransformer/models/bart/BartDecoderLayerWeight.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/bart/BartDecoderLayerWeight.h b/src/fastertransformer/models/bart/BartDecoderLayerWeight.h index a361ebab5..ee1ead027 100644 --- a/src/fastertransformer/models/bart/BartDecoderLayerWeight.h +++ b/src/fastertransformer/models/bart/BartDecoderLayerWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/bart/BartDecoding.cc b/src/fastertransformer/models/bart/BartDecoding.cc index 129b193d3..a0e2d876e 100644 --- a/src/fastertransformer/models/bart/BartDecoding.cc +++ b/src/fastertransformer/models/bart/BartDecoding.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -830,7 +830,8 @@ void BartDecoding::forward(TensorMap* output_tensors, beam_hyps_.output_ids_src = output_ids_buf_; beam_hyps_.log_probs_src = output_log_probs_buf_; beam_hyps_.max_seq_len = max_seq_len; - beam_hyps_.length_penalty = input_tensors->at("len_penalty").getVal(); + beam_hyps_.length_penalty = + input_tensors->isExist("len_penalty") ? input_tensors->at("len_penalty").getVal() : 0.0f; invokeInsertUnfinishedPath(beam_hyps_, finished_buf_, cum_log_probs_, batch_size, beam_width, stream_); sync_check_cuda_error(); diff --git a/src/fastertransformer/models/bart/BartDecoding.h b/src/fastertransformer/models/bart/BartDecoding.h index 3050aa6c4..09ec9c2fa 100644 --- a/src/fastertransformer/models/bart/BartDecoding.h +++ b/src/fastertransformer/models/bart/BartDecoding.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/bart/BartDecodingWeight.cc b/src/fastertransformer/models/bart/BartDecodingWeight.cc index 2208fcf04..7789eb0cf 100644 --- a/src/fastertransformer/models/bart/BartDecodingWeight.cc +++ b/src/fastertransformer/models/bart/BartDecodingWeight.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/bart/BartDecodingWeight.h b/src/fastertransformer/models/bart/BartDecodingWeight.h index 80c8b04f6..89047ca05 100644 --- a/src/fastertransformer/models/bart/BartDecodingWeight.h +++ b/src/fastertransformer/models/bart/BartDecodingWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/bart/BartEncoder.cc b/src/fastertransformer/models/bart/BartEncoder.cc index e03ba6bb9..f6a6cc005 100644 --- a/src/fastertransformer/models/bart/BartEncoder.cc +++ b/src/fastertransformer/models/bart/BartEncoder.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -218,7 +218,7 @@ template void BartEncoder::allocateBuffer() { if (is_allocate_buffer_ == false) { - token_num_ = (size_t*)allocator_->reMalloc(token_num_, sizeof(size_t) * 1, false); + check_cuda_error(cudaMallocHost((void**)&h_pinned_token_num_ptr_, sizeof(size_t))); padding_offset_ = (int*)allocator_->reMalloc(padding_offset_, sizeof(int) * max_batch_size_ * max_seq_len_, false); trt_mha_padding_offset_ = @@ -256,7 +256,9 @@ template void BartEncoder::allocateBuffer(size_t batch_size, size_t seq_len) { FT_LOG_DEBUG(__PRETTY_FUNCTION__); - token_num_ = (size_t*)allocator_->reMalloc(token_num_, sizeof(size_t) * 1, false); + if (!is_allocate_buffer_) { + check_cuda_error(cudaMallocHost((void**)&h_pinned_token_num_ptr_, sizeof(size_t))); + } padding_offset_ = (int*)allocator_->reMalloc(padding_offset_, sizeof(int) * batch_size * seq_len, false); trt_mha_padding_offset_ = (int*)allocator_->reMalloc(trt_mha_padding_offset_, sizeof(int) * (2 * batch_size + 1), false); @@ -290,7 +292,7 @@ template void BartEncoder::freeBuffer() { if (is_allocate_buffer_) { - allocator_->free((void**)(&token_num_)); + check_cuda_error(cudaFreeHost(h_pinned_token_num_ptr_)); allocator_->free((void**)(&padding_offset_)); allocator_->free((void**)(&trt_mha_padding_offset_)); @@ -464,8 +466,8 @@ void BartEncoder::forward(TensorMap* output_tensors, attention_mask_, sequence_lengths, local_batch_size, request_seq_len, stream_); sync_check_cuda_error(); - invokeGetPaddingOffset(&h_token_num, - token_num_, + invokeGetPaddingOffset(h_pinned_token_num_ptr_, + &h_token_num, padding_offset_, sequence_lengths, local_batch_size, diff --git a/src/fastertransformer/models/bart/BartEncoder.h b/src/fastertransformer/models/bart/BartEncoder.h index f50de96b0..f72754565 100644 --- a/src/fastertransformer/models/bart/BartEncoder.h +++ b/src/fastertransformer/models/bart/BartEncoder.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -79,7 +79,7 @@ class BartEncoder: public BaseLayer { protected: // model params - size_t* token_num_ = nullptr; + size_t* h_pinned_token_num_ptr_ = nullptr; int* padding_offset_ = nullptr; int* trt_mha_padding_offset_ = nullptr; T* attention_mask_ = nullptr; diff --git a/src/fastertransformer/models/bart/BartEncoderLayerWeight.cc b/src/fastertransformer/models/bart/BartEncoderLayerWeight.cc index 12b3c7e69..579e8aec3 100644 --- a/src/fastertransformer/models/bart/BartEncoderLayerWeight.cc +++ b/src/fastertransformer/models/bart/BartEncoderLayerWeight.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/bart/BartEncoderLayerWeight.h b/src/fastertransformer/models/bart/BartEncoderLayerWeight.h index 44aa7490b..3eb1485c4 100644 --- a/src/fastertransformer/models/bart/BartEncoderLayerWeight.h +++ b/src/fastertransformer/models/bart/BartEncoderLayerWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/bart/BartEncoderWeight.cc b/src/fastertransformer/models/bart/BartEncoderWeight.cc index 8d42be7e0..47028260a 100644 --- a/src/fastertransformer/models/bart/BartEncoderWeight.cc +++ b/src/fastertransformer/models/bart/BartEncoderWeight.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/bart/BartEncoderWeight.h b/src/fastertransformer/models/bart/BartEncoderWeight.h index ba8ce0119..c6d800eb0 100644 --- a/src/fastertransformer/models/bart/BartEncoderWeight.h +++ b/src/fastertransformer/models/bart/BartEncoderWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/bart/CMakeLists.txt b/src/fastertransformer/models/bart/CMakeLists.txt index 63e236570..6fc00e317 100644 --- a/src/fastertransformer/models/bart/CMakeLists.txt +++ b/src/fastertransformer/models/bart/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/bert/Bert.cc b/src/fastertransformer/models/bert/Bert.cc index 7132ff4d9..af01848db 100644 --- a/src/fastertransformer/models/bert/Bert.cc +++ b/src/fastertransformer/models/bert/Bert.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -217,7 +217,9 @@ template void Bert::allocateBuffer(size_t batch_size, size_t seq_len) { FT_LOG_DEBUG(__PRETTY_FUNCTION__); - token_num_ = (size_t*)allocator_->reMalloc(token_num_, sizeof(size_t) * 1, false); + if (!is_allocate_buffer_) { + check_cuda_error(cudaMallocHost((void**)&h_pinned_token_num_ptr_, sizeof(size_t))); + } padding_offset_ = (int*)allocator_->reMalloc(padding_offset_, sizeof(int) * batch_size * seq_len, false); trt_mha_padding_offset_ = (int*)allocator_->reMalloc(trt_mha_padding_offset_, sizeof(int) * (2 * batch_size + 1), false); @@ -240,28 +242,32 @@ void Bert::allocateBuffer(size_t batch_size, size_t seq_len) normed_attn_out_buf_ = (T*)allocator_->reMalloc(normed_attn_out_buf_, sizeof(T) * batch_size * seq_len * hidden_units_, false); } + is_allocate_buffer_ = true; } template void Bert::freeBuffer() { FT_LOG_DEBUG(__PRETTY_FUNCTION__); - allocator_->free((void**)(&token_num_)); - allocator_->free((void**)(&padding_offset_)); - allocator_->free((void**)(&trt_mha_padding_offset_)); - - allocator_->free((void**)(&attention_mask_)); - allocator_->free((void**)(&bert_in_buffer_)); - allocator_->free((void**)(&attn_out_buf_)); - allocator_->free((void**)(&bert_out_buffer_)); - - if (layernorm_type_ == LayerNormType::post_layernorm) { - normed_from_tensor_ = nullptr; - normed_attn_out_buf_ = nullptr; - } - else { - allocator_->free((void**)(&normed_from_tensor_)); - allocator_->free((void**)(&normed_attn_out_buf_)); + if (is_allocate_buffer_) { + check_cuda_error(cudaFreeHost(h_pinned_token_num_ptr_)); + allocator_->free((void**)(&padding_offset_)); + allocator_->free((void**)(&trt_mha_padding_offset_)); + + allocator_->free((void**)(&attention_mask_)); + allocator_->free((void**)(&bert_in_buffer_)); + allocator_->free((void**)(&attn_out_buf_)); + allocator_->free((void**)(&bert_out_buffer_)); + + if (layernorm_type_ == LayerNormType::post_layernorm) { + normed_from_tensor_ = nullptr; + normed_attn_out_buf_ = nullptr; + } + else { + allocator_->free((void**)(&normed_from_tensor_)); + allocator_->free((void**)(&normed_attn_out_buf_)); + } + is_allocate_buffer_ = false; } } @@ -363,8 +369,8 @@ void Bert::forward(TensorMap* output_tensors, TensorMap* input_tensors, const stream_); sync_check_cuda_error(); invokeGetPaddingOffset( + h_pinned_token_num_ptr_, &h_token_num, - token_num_, padding_offset_, input_tensors->at("sequence_lengths").getPtrWithOffset(ite * local_batch_size), local_batch_size, @@ -403,8 +409,8 @@ void Bert::forward(TensorMap* output_tensors, TensorMap* input_tensors, const } case AttentionType::FUSED_MHA: { invokeGetPaddingOffset( + h_pinned_token_num_ptr_, &h_token_num, - token_num_, padding_offset_, input_tensors->at("sequence_lengths").getPtrWithOffset(ite * local_batch_size), local_batch_size, @@ -563,6 +569,7 @@ void Bert::forward(TensorMap* output_tensors, TensorMap* input_tensors, const (float*)nullptr, (float*)nullptr, (float*)nullptr, + (float*)nullptr, 0, stream_); } diff --git a/src/fastertransformer/models/bert/Bert.h b/src/fastertransformer/models/bert/Bert.h index 41c0a83d1..b3a1c334f 100644 --- a/src/fastertransformer/models/bert/Bert.h +++ b/src/fastertransformer/models/bert/Bert.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -70,7 +70,7 @@ class Bert: public BaseLayer { protected: // model params - size_t* token_num_ = nullptr; + size_t* h_pinned_token_num_ptr_ = nullptr; int* padding_offset_ = nullptr; int* trt_mha_padding_offset_ = nullptr; T* attention_mask_ = nullptr; diff --git a/src/fastertransformer/models/bert/BertLayerWeight.cc b/src/fastertransformer/models/bert/BertLayerWeight.cc new file mode 100644 index 000000000..8abc802db --- /dev/null +++ b/src/fastertransformer/models/bert/BertLayerWeight.cc @@ -0,0 +1,226 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "BertLayerWeight.h" + +namespace fastertransformer { + +template +BertLayerWeight::BertLayerWeight(const size_t hidden_units, + const size_t inter_size, + const size_t tensor_para_size, + const size_t tensor_para_rank): + hidden_units_(hidden_units), + inter_size_(inter_size), + tensor_para_size_(tensor_para_size), + tensor_para_rank_(tensor_para_rank) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + std::string name; + + name = "attention.self.query.weight." + std::to_string(tensor_para_rank_) + ".bin"; + weights_ptr.insert({name, FtWeight(name, {hidden_units_, hidden_units_ / tensor_para_size_}, nullptr)}); + name = "attention.self.query.bias." + std::to_string(tensor_para_rank_) + ".bin"; + weights_ptr.insert({name, FtWeight(name, {hidden_units_ / tensor_para_size_}, nullptr)}); + name = "attention.self.key.weight." + std::to_string(tensor_para_rank_) + ".bin"; + weights_ptr.insert({name, FtWeight(name, {hidden_units_, hidden_units_ / tensor_para_size_}, nullptr)}); + name = "attention.self.key.bias." + std::to_string(tensor_para_rank_) + ".bin"; + weights_ptr.insert({name, FtWeight(name, {hidden_units_ / tensor_para_size_}, nullptr)}); + name = "attention.self.value.weight." + std::to_string(tensor_para_rank_) + ".bin"; + weights_ptr.insert({name, FtWeight(name, {hidden_units_, hidden_units_ / tensor_para_size_}, nullptr)}); + name = "attention.self.value.bias." + std::to_string(tensor_para_rank_) + ".bin"; + weights_ptr.insert({name, FtWeight(name, {hidden_units_ / tensor_para_size_}, nullptr)}); + name = "attention.output.dense.weight." + std::to_string(tensor_para_rank_) + ".bin"; + weights_ptr.insert({name, FtWeight(name, {hidden_units_, hidden_units_ / tensor_para_size_}, nullptr)}); + name = "attention.output.dense.bias.bin"; + weights_ptr.insert({name, FtWeight(name, {hidden_units_}, nullptr)}); + name = "attention.output.LayerNorm.weight.bin"; + weights_ptr.insert({name, FtWeight(name, {hidden_units_}, nullptr)}); + name = "attention.output.LayerNorm.bias.bin"; + weights_ptr.insert({name, FtWeight(name, {hidden_units_}, nullptr)}); + name = "intermediate.dense.weight." + std::to_string(tensor_para_rank_) + ".bin"; + weights_ptr.insert({name, FtWeight(name, {hidden_units_, inter_size_ / tensor_para_size_}, nullptr)}); + name = "intermediate.dense.bias." + std::to_string(tensor_para_rank_) + ".bin"; + weights_ptr.insert({name, FtWeight(name, {inter_size_ / tensor_para_size_}, nullptr)}); + name = "output.dense.weight." + std::to_string(tensor_para_rank_) + ".bin"; + weights_ptr.insert({name, FtWeight(name, {inter_size_ / tensor_para_size_, hidden_units_}, nullptr)}); + name = "output.dense.bias.bin"; + weights_ptr.insert({name, FtWeight(name, {hidden_units_}, nullptr)}); + name = "output.LayerNorm.weight.bin"; + weights_ptr.insert({name, FtWeight(name, {hidden_units_}, nullptr)}); + name = "output.LayerNorm.bias.bin"; + weights_ptr.insert({name, FtWeight(name, {hidden_units_}, nullptr)}); + + for (auto it = weights_ptr.begin(); it != weights_ptr.end(); ++it) { + deviceMalloc(&it->second.ptr_, it->second.size_); + } + setWeightPtr(); + FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); +} + +template +BertLayerWeight::~BertLayerWeight() +{ + if (is_maintain_buffer == true) { + for (auto it = weights_ptr.begin(); it != weights_ptr.end(); ++it) { + deviceFree(it->second.ptr_); + } + weights_ptr.clear(); + + attention_weights.query_weight.kernel = nullptr; + attention_weights.query_weight.bias = nullptr; + attention_weights.key_weight.kernel = nullptr; + attention_weights.key_weight.bias = nullptr; + attention_weights.value_weight.kernel = nullptr; + attention_weights.value_weight.bias = nullptr; + attention_weights.attention_output_weight.kernel = nullptr; + attention_weights.attention_output_weight.bias = nullptr; + attn_layernorm_weights.gamma = nullptr; + attn_layernorm_weights.beta = nullptr; + ffn_weights.intermediate_weight.kernel = nullptr; + ffn_weights.intermediate_weight.bias = nullptr; + ffn_weights.output_weight.kernel = nullptr; + ffn_weights.output_weight.bias = nullptr; + ffn_layernorm_weights.gamma = nullptr; + ffn_layernorm_weights.beta = nullptr; + is_maintain_buffer = false; + } + if (is_maintain_sp_buffer == true) { + for (int i = 0; i < 6; i++) { + deviceFree(sp_weights_ptr[i]); + } + attention_weights.query_weight.sp_kernel = nullptr; + attention_weights.key_weight.sp_kernel = nullptr; + attention_weights.value_weight.sp_kernel = nullptr; + attention_weights.attention_output_weight.sp_kernel = nullptr; + ffn_weights.intermediate_weight.sp_kernel = nullptr; + ffn_weights.output_weight.sp_kernel = nullptr; + is_maintain_sp_buffer = false; + } +} + +template +BertLayerWeight::BertLayerWeight(const BertLayerWeight& other): + BertLayerWeight(other.hidden_units_, other.inter_size_, other.tensor_para_size_, other.tensor_para_rank_) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + for (auto it = other.weights_ptr.begin(); it != other.weights_ptr.end(); ++it) { + cudaD2Dcpy(weights_ptr.at(it->first).ptr_, it->second.ptr_, it->second.size_); + } + FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); +} + +template +BertLayerWeight& BertLayerWeight::operator=(const BertLayerWeight& other) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + hidden_units_ = other.hidden_units_; + inter_size_ = other.inter_size_; + tensor_para_size_ = other.tensor_para_size_; + tensor_para_rank_ = other.tensor_para_rank_; + + for (auto it = other.weights_ptr.begin(); it != other.weights_ptr.end(); ++it) { + weights_ptr.insert({it->first, it->second}); + weights_ptr.at(it->first).ptr_ = nullptr; + deviceMalloc(&weights_ptr.at(it->first).ptr_, it->second.size_); + cudaD2Dcpy(weights_ptr.at(it->first).ptr_, it->second.ptr_, it->second.size_); + } + setWeightPtr(); + FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); + + return *this; +} + +#ifdef SPARSITY_ENABLED +template +void BertLayerWeight::compress_weights(cublasMMWrapper& cublas_wrapper, int hidden_dim) +{ + int inter_size = hidden_dim * 4; + deviceMalloc(&sp_weights_ptr[0], hidden_dim * hidden_dim); + deviceMalloc(&sp_weights_ptr[1], hidden_dim * hidden_dim); + deviceMalloc(&sp_weights_ptr[2], hidden_dim * hidden_dim); + deviceMalloc(&sp_weights_ptr[3], hidden_dim * hidden_dim); + deviceMalloc(&sp_weights_ptr[4], hidden_dim * inter_size); + deviceMalloc(&sp_weights_ptr[5], inter_size * hidden_dim); + cublas_wrapper.compressMatrix(attention_weights.query_weight.kernel, sp_weights_ptr[0], hidden_dim, hidden_dim); + cublas_wrapper.compressMatrix(attention_weights.key_weight.kernel, sp_weights_ptr[1], hidden_dim, hidden_dim); + cublas_wrapper.compressMatrix(attention_weights.value_weight.kernel, sp_weights_ptr[2], hidden_dim, hidden_dim); + cublas_wrapper.compressMatrix( + attention_weights.attention_output_weight.kernel, sp_weights_ptr[3], hidden_dim, hidden_dim); + cublas_wrapper.compressMatrix(ffn_weights.intermediate_weight.kernel, sp_weights_ptr[4], inter_size, hidden_dim); + cublas_wrapper.compressMatrix(ffn_weights.output_weight.kernel, sp_weights_ptr[5], hidden_dim, inter_size); + attention_weights.query_weight.sp_kernel = sp_weights_ptr[0]; + attention_weights.key_weight.sp_kernel = sp_weights_ptr[1]; + attention_weights.value_weight.sp_kernel = sp_weights_ptr[2]; + attention_weights.attention_output_weight.sp_kernel = sp_weights_ptr[3]; + ffn_weights.intermediate_weight.sp_kernel = sp_weights_ptr[4]; + ffn_weights.output_weight.sp_kernel = sp_weights_ptr[5]; + is_maintain_sp_buffer = true; +} +#endif + +template +void BertLayerWeight::loadModel(std::string dir_path, FtCudaDataType model_file_type) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + for (auto it = weights_ptr.begin(); it != weights_ptr.end(); ++it) { + loadWeightFromBin(it->second.ptr_, it->second.shape_, dir_path + it->first, model_file_type); + } + FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); +} + +template +void BertLayerWeight::setWeightPtr() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + attention_weights.query_weight.kernel = + weights_ptr.at("attention.self.query.weight." + std::to_string(tensor_para_rank_) + ".bin").ptr_; + attention_weights.query_weight.bias = + weights_ptr.at("attention.self.query.bias." + std::to_string(tensor_para_rank_) + ".bin").ptr_; + attention_weights.key_weight.kernel = + weights_ptr.at("attention.self.key.weight." + std::to_string(tensor_para_rank_) + ".bin").ptr_; + attention_weights.key_weight.bias = + weights_ptr.at("attention.self.key.bias." + std::to_string(tensor_para_rank_) + ".bin").ptr_; + attention_weights.value_weight.kernel = + weights_ptr.at("attention.self.value.weight." + std::to_string(tensor_para_rank_) + ".bin").ptr_; + attention_weights.value_weight.bias = + weights_ptr.at("attention.self.value.bias." + std::to_string(tensor_para_rank_) + ".bin").ptr_; + attention_weights.attention_output_weight.kernel = + weights_ptr.at("attention.output.dense.weight." + std::to_string(tensor_para_rank_) + ".bin").ptr_; + attention_weights.attention_output_weight.bias = weights_ptr.at("attention.output.dense.bias.bin").ptr_; + attn_layernorm_weights.gamma = weights_ptr.at("attention.output.LayerNorm.weight.bin").ptr_; + attn_layernorm_weights.beta = weights_ptr.at("attention.output.LayerNorm.bias.bin").ptr_; + ffn_weights.intermediate_weight.kernel = + weights_ptr.at("intermediate.dense.weight." + std::to_string(tensor_para_rank_) + ".bin").ptr_; + ffn_weights.intermediate_weight.bias = + weights_ptr.at("intermediate.dense.bias." + std::to_string(tensor_para_rank_) + ".bin").ptr_; + ffn_weights.output_weight.kernel = + weights_ptr.at("output.dense.weight." + std::to_string(tensor_para_rank_) + ".bin").ptr_; + ffn_weights.output_weight.bias = weights_ptr.at("output.dense.bias.bin").ptr_; + ffn_layernorm_weights.gamma = weights_ptr.at("output.LayerNorm.weight.bin").ptr_; + ffn_layernorm_weights.beta = weights_ptr.at("output.LayerNorm.bias.bin").ptr_; + + is_maintain_buffer = true; + FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); +} + +template struct BertLayerWeight; +template struct BertLayerWeight; +#ifdef ENABLE_BF16 +template struct BertLayerWeight<__nv_bfloat16>; +#endif + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/bert/BertLayerWeight.h b/src/fastertransformer/models/bert/BertLayerWeight.h index c8a6e2fe9..e2729a5b8 100644 --- a/src/fastertransformer/models/bert/BertLayerWeight.h +++ b/src/fastertransformer/models/bert/BertLayerWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -33,203 +33,27 @@ struct BertLayerWeight { BertLayerWeight(const size_t hidden_units, const size_t inter_size, const size_t tensor_para_size, - const size_t tensor_para_rank): - hidden_units_(hidden_units), - inter_size_(inter_size), - tensor_para_size_(tensor_para_size), - tensor_para_rank_(tensor_para_rank) - { - FT_LOG_DEBUG(__PRETTY_FUNCTION__); - std::string name; - - name = "attention.self.query.weight." + std::to_string(tensor_para_rank_) + ".bin"; - weights_ptr.insert({name, FtWeight(name, {hidden_units_, hidden_units_ / tensor_para_size_}, nullptr)}); - name = "attention.self.query.bias." + std::to_string(tensor_para_rank_) + ".bin"; - weights_ptr.insert({name, FtWeight(name, {hidden_units_ / tensor_para_size_}, nullptr)}); - name = "attention.self.key.weight." + std::to_string(tensor_para_rank_) + ".bin"; - weights_ptr.insert({name, FtWeight(name, {hidden_units_, hidden_units_ / tensor_para_size_}, nullptr)}); - name = "attention.self.key.bias." + std::to_string(tensor_para_rank_) + ".bin"; - weights_ptr.insert({name, FtWeight(name, {hidden_units_ / tensor_para_size_}, nullptr)}); - name = "attention.self.value.weight." + std::to_string(tensor_para_rank_) + ".bin"; - weights_ptr.insert({name, FtWeight(name, {hidden_units_, hidden_units_ / tensor_para_size_}, nullptr)}); - name = "attention.self.value.bias." + std::to_string(tensor_para_rank_) + ".bin"; - weights_ptr.insert({name, FtWeight(name, {hidden_units_ / tensor_para_size_}, nullptr)}); - name = "attention.output.dense.weight." + std::to_string(tensor_para_rank_) + ".bin"; - weights_ptr.insert({name, FtWeight(name, {hidden_units_, hidden_units_ / tensor_para_size_}, nullptr)}); - name = "attention.output.dense.bias.bin"; - weights_ptr.insert({name, FtWeight(name, {hidden_units_}, nullptr)}); - name = "attention.output.LayerNorm.weight.bin"; - weights_ptr.insert({name, FtWeight(name, {hidden_units_}, nullptr)}); - name = "attention.output.LayerNorm.bias.bin"; - weights_ptr.insert({name, FtWeight(name, {hidden_units_}, nullptr)}); - name = "intermediate.dense.weight." + std::to_string(tensor_para_rank_) + ".bin"; - weights_ptr.insert({name, FtWeight(name, {hidden_units_, inter_size_ / tensor_para_size_}, nullptr)}); - name = "intermediate.dense.bias." + std::to_string(tensor_para_rank_) + ".bin"; - weights_ptr.insert({name, FtWeight(name, {inter_size_ / tensor_para_size_}, nullptr)}); - name = "output.dense.weight." + std::to_string(tensor_para_rank_) + ".bin"; - weights_ptr.insert({name, FtWeight(name, {inter_size_ / tensor_para_size_, hidden_units_}, nullptr)}); - name = "output.dense.bias.bin"; - weights_ptr.insert({name, FtWeight(name, {hidden_units_}, nullptr)}); - name = "output.LayerNorm.weight.bin"; - weights_ptr.insert({name, FtWeight(name, {hidden_units_}, nullptr)}); - name = "output.LayerNorm.bias.bin"; - weights_ptr.insert({name, FtWeight(name, {hidden_units_}, nullptr)}); - - for (auto it = weights_ptr.begin(); it != weights_ptr.end(); ++it) { - deviceMalloc(&it->second.ptr_, it->second.size_); - } - setWeightPtr(); - FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); - } - + const size_t tensor_para_rank); BertLayerWeight(const int hidden_units, const int inter_size): BertLayerWeight(hidden_units, inter_size, 1, 0) {} - - ~BertLayerWeight() - { - if (is_maintain_buffer == true) { - for (auto it = weights_ptr.begin(); it != weights_ptr.end(); ++it) { - deviceFree(it->second.ptr_); - } - weights_ptr.clear(); - - attention_weights.query_weight.kernel = nullptr; - attention_weights.query_weight.bias = nullptr; - attention_weights.key_weight.kernel = nullptr; - attention_weights.key_weight.bias = nullptr; - attention_weights.value_weight.kernel = nullptr; - attention_weights.value_weight.bias = nullptr; - attention_weights.attention_output_weight.kernel = nullptr; - attention_weights.attention_output_weight.bias = nullptr; - attn_layernorm_weights.gamma = nullptr; - attn_layernorm_weights.beta = nullptr; - ffn_weights.intermediate_weight.kernel = nullptr; - ffn_weights.intermediate_weight.bias = nullptr; - ffn_weights.output_weight.kernel = nullptr; - ffn_weights.output_weight.bias = nullptr; - ffn_layernorm_weights.gamma = nullptr; - ffn_layernorm_weights.beta = nullptr; - is_maintain_buffer = false; - } - if (is_maintain_sp_buffer == true) { - for (int i = 0; i < 6; i++) { - deviceFree(sp_weights_ptr[i]); - } - attention_weights.query_weight.sp_kernel = nullptr; - attention_weights.key_weight.sp_kernel = nullptr; - attention_weights.value_weight.sp_kernel = nullptr; - attention_weights.attention_output_weight.sp_kernel = nullptr; - ffn_weights.intermediate_weight.sp_kernel = nullptr; - ffn_weights.output_weight.sp_kernel = nullptr; - is_maintain_sp_buffer = false; - } - } - - BertLayerWeight(const BertLayerWeight& other): - BertLayerWeight(other.hidden_units_, other.inter_size_, other.tensor_para_size_, other.tensor_para_rank_) - { - FT_LOG_DEBUG(__PRETTY_FUNCTION__); - for (auto it = other.weights_ptr.begin(); it != other.weights_ptr.end(); ++it) { - cudaD2Dcpy(weights_ptr.at(it->first).ptr_, it->second.ptr_, it->second.size_); - } - FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); - } - - BertLayerWeight& operator=(const BertLayerWeight& other) - { - FT_LOG_DEBUG(__PRETTY_FUNCTION__); - hidden_units_ = other.hidden_units_; - inter_size_ = other.inter_size_; - tensor_para_size_ = other.tensor_para_size_; - tensor_para_rank_ = other.tensor_para_rank_; - - for (auto it = other.weights_ptr.begin(); it != other.weights_ptr.end(); ++it) { - weights_ptr.insert({it->first, it->second}); - weights_ptr.at(it->first).ptr_ = nullptr; - deviceMalloc(weights_ptr.at(it->first).ptr_, it->second.size_); - cudaD2Dcpy(weights_ptr.at(it->first).ptr_, it->second.ptr_, it->second.size_); - } - setWeightPtr(); - FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); - - return *this; - } + ~BertLayerWeight(); + BertLayerWeight(const BertLayerWeight& other); + BertLayerWeight& operator=(const BertLayerWeight& other); #ifdef SPARSITY_ENABLED - void compress_weights(cublasMMWrapper& cublas_wrapper, int hidden_dim) - { - int inter_size = hidden_dim * 4; - deviceMalloc(&sp_weights_ptr[0], hidden_dim * hidden_dim); - deviceMalloc(&sp_weights_ptr[1], hidden_dim * hidden_dim); - deviceMalloc(&sp_weights_ptr[2], hidden_dim * hidden_dim); - deviceMalloc(&sp_weights_ptr[3], hidden_dim * hidden_dim); - deviceMalloc(&sp_weights_ptr[4], hidden_dim * inter_size); - deviceMalloc(&sp_weights_ptr[5], inter_size * hidden_dim); - cublas_wrapper.compressMatrix(attention_weights.query_weight.kernel, sp_weights_ptr[0], hidden_dim, hidden_dim); - cublas_wrapper.compressMatrix(attention_weights.key_weight.kernel, sp_weights_ptr[1], hidden_dim, hidden_dim); - cublas_wrapper.compressMatrix(attention_weights.value_weight.kernel, sp_weights_ptr[2], hidden_dim, hidden_dim); - cublas_wrapper.compressMatrix( - attention_weights.attention_output_weight.kernel, sp_weights_ptr[3], hidden_dim, hidden_dim); - cublas_wrapper.compressMatrix( - ffn_weights.intermediate_weight.kernel, sp_weights_ptr[4], inter_size, hidden_dim); - cublas_wrapper.compressMatrix(ffn_weights.output_weight.kernel, sp_weights_ptr[5], hidden_dim, inter_size); - attention_weights.query_weight.sp_kernel = sp_weights_ptr[0]; - attention_weights.key_weight.sp_kernel = sp_weights_ptr[1]; - attention_weights.value_weight.sp_kernel = sp_weights_ptr[2]; - attention_weights.attention_output_weight.sp_kernel = sp_weights_ptr[3]; - ffn_weights.intermediate_weight.sp_kernel = sp_weights_ptr[4]; - ffn_weights.output_weight.sp_kernel = sp_weights_ptr[5]; - is_maintain_sp_buffer = true; - } + void compress_weights(cublasMMWrapper& cublas_wrapper, int hidden_dim); #endif + void loadModel(std::string dir_path); AttentionWeight attention_weights; LayerNormWeight attn_layernorm_weights; FfnWeight ffn_weights; LayerNormWeight ffn_layernorm_weights; - void loadModel(std::string dir_path, FtCudaDataType model_file_type) - { - FT_LOG_DEBUG(__PRETTY_FUNCTION__); - for (auto it = weights_ptr.begin(); it != weights_ptr.end(); ++it) { - loadWeightFromBin(it->second.ptr_, it->second.shape_, dir_path + it->first, model_file_type); - } - FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); - } + void loadModel(std::string dir_path, FtCudaDataType model_file_type); private: - void setWeightPtr() - { - FT_LOG_DEBUG(__PRETTY_FUNCTION__); - attention_weights.query_weight.kernel = - weights_ptr.at("attention.self.query.weight." + std::to_string(tensor_para_rank_) + ".bin").ptr_; - attention_weights.query_weight.bias = - weights_ptr.at("attention.self.query.bias." + std::to_string(tensor_para_rank_) + ".bin").ptr_; - attention_weights.key_weight.kernel = - weights_ptr.at("attention.self.key.weight." + std::to_string(tensor_para_rank_) + ".bin").ptr_; - attention_weights.key_weight.bias = - weights_ptr.at("attention.self.key.bias." + std::to_string(tensor_para_rank_) + ".bin").ptr_; - attention_weights.value_weight.kernel = - weights_ptr.at("attention.self.value.weight." + std::to_string(tensor_para_rank_) + ".bin").ptr_; - attention_weights.value_weight.bias = - weights_ptr.at("attention.self.value.bias." + std::to_string(tensor_para_rank_) + ".bin").ptr_; - attention_weights.attention_output_weight.kernel = - weights_ptr.at("attention.output.dense.weight." + std::to_string(tensor_para_rank_) + ".bin").ptr_; - attention_weights.attention_output_weight.bias = weights_ptr.at("attention.output.dense.bias.bin").ptr_; - attn_layernorm_weights.gamma = weights_ptr.at("attention.output.LayerNorm.weight.bin").ptr_; - attn_layernorm_weights.beta = weights_ptr.at("attention.output.LayerNorm.bias.bin").ptr_; - ffn_weights.intermediate_weight.kernel = - weights_ptr.at("intermediate.dense.weight." + std::to_string(tensor_para_rank_) + ".bin").ptr_; - ffn_weights.intermediate_weight.bias = - weights_ptr.at("intermediate.dense.bias." + std::to_string(tensor_para_rank_) + ".bin").ptr_; - ffn_weights.output_weight.kernel = - weights_ptr.at("output.dense.weight." + std::to_string(tensor_para_rank_) + ".bin").ptr_; - ffn_weights.output_weight.bias = weights_ptr.at("output.dense.bias.bin").ptr_; - ffn_layernorm_weights.gamma = weights_ptr.at("output.LayerNorm.weight.bin").ptr_; - ffn_layernorm_weights.beta = weights_ptr.at("output.LayerNorm.bias.bin").ptr_; + void setWeightPtr(); - is_maintain_buffer = true; - FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); - } size_t hidden_units_; size_t inter_size_; size_t tensor_para_size_; diff --git a/src/fastertransformer/models/bert/BertWeight.cc b/src/fastertransformer/models/bert/BertWeight.cc new file mode 100644 index 000000000..638fc1a6a --- /dev/null +++ b/src/fastertransformer/models/bert/BertWeight.cc @@ -0,0 +1,156 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "BertWeight.h" + +namespace fastertransformer { + +template +BertWeight::BertWeight(const size_t hidden_units, + const size_t inter_size, + const size_t num_layer, + const size_t tensor_para_size, + const size_t tensor_para_rank, + const size_t pipeline_para_size, + const size_t pipeline_para_rank): + hidden_units_(hidden_units), + inter_size_(inter_size), + num_layer_(num_layer), + tensor_para_size_(tensor_para_size), + tensor_para_rank_(tensor_para_rank), + pipeline_para_size_(pipeline_para_size), + pipeline_para_rank_(pipeline_para_rank) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + + deviceMalloc(&weights_ptr[0], hidden_units_); + deviceMalloc(&weights_ptr[1], hidden_units_); + + setWeightPtr(); + bert_layer_weights.reserve(num_layer_); + for (int i = 0; i < num_layer_; i++) { + bert_layer_weights.push_back( + BertLayerWeight(hidden_units_, inter_size_, tensor_para_size_, tensor_para_rank_)); + } + FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); +} + +template +BertWeight::~BertWeight() +{ + if (is_maintain_buffer == true) { + bert_layer_weights.clear(); + for (int i = 0; i < 2; i++) { + deviceFree(weights_ptr[i]); + } + + post_transformer_layernorm_weights.gamma = nullptr; + post_transformer_layernorm_weights.beta = nullptr; + is_maintain_buffer = false; + } +} + +template +BertWeight::BertWeight(const BertWeight& other): + BertWeight(other.hidden_units_, + other.inter_size_, + other.num_layer_, + other.tensor_para_size_, + other.tensor_para_rank_, + other.pipeline_para_size_, + other.pipeline_para_rank_) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + bert_layer_weights.clear(); + bert_layer_weights.reserve(num_layer_); + for (int i = 0; i < num_layer_; i++) { + bert_layer_weights.push_back(other.bert_layer_weights[i]); + } + deviceMalloc(&weights_ptr[0], hidden_units_); + cudaD2Dcpy(weights_ptr[0], other.weights_ptr[0], hidden_units_); + deviceMalloc(&weights_ptr[1], hidden_units_); + cudaD2Dcpy(weights_ptr[1], other.weights_ptr[1], hidden_units_); + + setWeightPtr(); + FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); +} + +template +BertWeight& BertWeight::operator=(const BertWeight& other) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + hidden_units_ = other.hidden_units_; + inter_size_ = other.inter_size_; + num_layer_ = other.num_layer_; + tensor_para_size_ = other.tensor_para_size_; + tensor_para_rank_ = other.tensor_para_rank_; + pipeline_para_size_ = other.pipeline_para_size_; + pipeline_para_rank_ = other.pipeline_para_rank_; + + bert_layer_weights.clear(); + bert_layer_weights.reserve(num_layer_); + for (int i = 0; i < num_layer_; i++) { + bert_layer_weights.push_back(other.bert_layer_weights[i]); + } + deviceMalloc(&weights_ptr[0], hidden_units_); + cudaD2Dcpy(weights_ptr[0], other.weights_ptr[0], hidden_units_); + deviceMalloc(&weights_ptr[1], hidden_units_); + cudaD2Dcpy(weights_ptr[1], other.weights_ptr[1], hidden_units_); + + setWeightPtr(); + FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); + + return *this; +} + +template +void BertWeight::loadModel(std::string dir_path) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + FtCudaDataType model_file_type = getModelFileType(dir_path + "/config.ini", "bert"); + for (uint l = 0; l < num_layer_; l++) { + if (isValidLayerParallelId(l)) { + bert_layer_weights[l].loadModel(dir_path + "model.encoder.layer." + std::to_string(l) + ".", + model_file_type); + } + } + FT_LOG_DEBUG(__PRETTY_FUNCTION__, " stop"); +} + +template +bool BertWeight::isValidLayerParallelId(int l) +{ + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_size_)); + return l < num_layer_ && (l >= local_num_layer * pipeline_para_rank_) + && (l < local_num_layer * (pipeline_para_rank_ + 1)); +} + +template +void BertWeight::setWeightPtr() +{ + post_transformer_layernorm_weights.gamma = weights_ptr[0]; + post_transformer_layernorm_weights.beta = weights_ptr[1]; + + is_maintain_buffer = true; +} + +template struct BertWeight; +template struct BertWeight; +#ifdef ENABLE_BF16 +template struct BertWeight<__nv_bfloat16>; +#endif + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/bert/BertWeight.h b/src/fastertransformer/models/bert/BertWeight.h index 5ac75e6ef..3b498146b 100644 --- a/src/fastertransformer/models/bert/BertWeight.h +++ b/src/fastertransformer/models/bert/BertWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -30,130 +30,23 @@ struct BertWeight { const size_t tensor_para_size, const size_t tensor_para_rank, const size_t pipeline_para_size, - const size_t pipeline_para_rank): - hidden_units_(hidden_units), - inter_size_(inter_size), - num_layer_(num_layer), - tensor_para_size_(tensor_para_size), - tensor_para_rank_(tensor_para_rank), - pipeline_para_size_(pipeline_para_size), - pipeline_para_rank_(pipeline_para_rank) - { - FT_LOG_DEBUG(__PRETTY_FUNCTION__); - - deviceMalloc(&weights_ptr[0], hidden_units_); - deviceMalloc(&weights_ptr[1], hidden_units_); - - setWeightPtr(); - bert_layer_weights.reserve(num_layer_); - for (int i = 0; i < num_layer_; i++) { - bert_layer_weights.push_back( - BertLayerWeight(hidden_units_, inter_size_, tensor_para_size_, tensor_para_rank_)); - } - FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); - } - + const size_t pipeline_para_rank); BertWeight(const int hidden_units, const int inter_size, const int num_layer): BertWeight(hidden_units, inter_size, num_layer, 1, 0, 1, 0) { } - - ~BertWeight() - { - if (is_maintain_buffer == true) { - bert_layer_weights.clear(); - for (int i = 0; i < 2; i++) { - deviceFree(weights_ptr[i]); - } - - post_transformer_layernorm_weights.gamma = nullptr; - post_transformer_layernorm_weights.beta = nullptr; - is_maintain_buffer = false; - } - } - - BertWeight(const BertWeight& other): - BertWeight(other.hidden_units_, - other.inter_size_, - other.num_layer_, - other.tensor_para_size_, - other.tensor_para_rank_, - other.pipeline_para_size_, - other.pipeline_para_rank_) - { - FT_LOG_DEBUG(__PRETTY_FUNCTION__); - bert_layer_weights.clear(); - bert_layer_weights.reserve(num_layer_); - for (int i = 0; i < num_layer_; i++) { - bert_layer_weights.push_back(other.bert_layer_weights[i]); - } - deviceMalloc(&weights_ptr[0], hidden_units_); - cudaD2Dcpy(weights_ptr[0], other.weights_ptr[0], hidden_units_); - deviceMalloc(&weights_ptr[1], hidden_units_); - cudaD2Dcpy(weights_ptr[1], other.weights_ptr[1], hidden_units_); - - setWeightPtr(); - FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); - } - - BertWeight& operator=(const BertWeight& other) - { - FT_LOG_DEBUG(__PRETTY_FUNCTION__); - hidden_units_ = other.hidden_units_; - inter_size_ = other.inter_size_; - num_layer_ = other.num_layer_; - tensor_para_size_ = other.tensor_para_size_; - tensor_para_rank_ = other.tensor_para_rank_; - pipeline_para_size_ = other.pipeline_para_size_; - pipeline_para_rank_ = other.pipeline_para_rank_; - - bert_layer_weights.clear(); - bert_layer_weights.reserve(num_layer_); - for (int i = 0; i < num_layer_; i++) { - bert_layer_weights.push_back(other.bert_layer_weights[i]); - } - deviceMalloc(&weights_ptr[0], hidden_units_); - cudaD2Dcpy(weights_ptr[0], other.weights_ptr[0], hidden_units_); - deviceMalloc(&weights_ptr[1], hidden_units_); - cudaD2Dcpy(weights_ptr[1], other.weights_ptr[1], hidden_units_); - - setWeightPtr(); - FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); - - return *this; - } - + ~BertWeight(); + BertWeight(const BertWeight& other); + BertWeight& operator=(const BertWeight& other); std::vector> bert_layer_weights; LayerNormWeight post_transformer_layernorm_weights; - bool isValidLayerParallelId(int l) - { - int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_size_)); - return l < num_layer_ && (l >= local_num_layer * pipeline_para_rank_) - && (l < local_num_layer * (pipeline_para_rank_ + 1)); - } - - void loadModel(std::string dir_path) - { - FT_LOG_DEBUG(__PRETTY_FUNCTION__); - FtCudaDataType model_file_type = getModelFileType(dir_path + "/config.ini", "bert"); - for (uint l = 0; l < num_layer_; l++) { - if (isValidLayerParallelId(l)) { - bert_layer_weights[l].loadModel(dir_path + "/model.encoder.layer." + std::to_string(l) + ".", - model_file_type); - } - } - FT_LOG_DEBUG(__PRETTY_FUNCTION__, " stop"); - } + bool isValidLayerParallelId(int l); + void loadModel(std::string dir_path); private: - void setWeightPtr() - { - post_transformer_layernorm_weights.gamma = weights_ptr[0]; - post_transformer_layernorm_weights.beta = weights_ptr[1]; + void setWeightPtr(); - is_maintain_buffer = true; - } size_t hidden_units_; size_t inter_size_; size_t num_layer_; diff --git a/src/fastertransformer/models/bert/CMakeLists.txt b/src/fastertransformer/models/bert/CMakeLists.txt index 2ae3cfe3d..3170f3973 100644 --- a/src/fastertransformer/models/bert/CMakeLists.txt +++ b/src/fastertransformer/models/bert/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -14,12 +14,22 @@ cmake_minimum_required(VERSION 3.8) +add_library(BertLayerWeight STATIC BertLayerWeight.cc) +set_property(TARGET BertLayerWeight PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET BertLayerWeight PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(BertLayerWeight PUBLIC memory_utils) + +add_library(BertWeight STATIC BertWeight.cc) +set_property(TARGET BertWeight PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET BertWeight PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(BertWeight PUBLIC BertLayerWeight) + add_library(Bert STATIC Bert.cc) set_property(TARGET Bert PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET Bert PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) target_link_libraries(Bert PUBLIC -lcudart bert_preprocess_kernels cublasMMWrapper UnfusedAttentionLayer FusedAttentionLayer TensorParallelGeluFfnLayer TensorParallelReluFfnLayer - layernorm_kernels add_residual_kernels nccl_utils custom_ar_comm tensor cuda_utils logger) + layernorm_kernels add_residual_kernels BertWeight nccl_utils custom_ar_comm tensor cuda_utils logger) add_executable(bert_gemm bert_gemm.cc) target_link_libraries(bert_gemm PUBLIC -lcublas -lcublasLt -lcudart encoder_gemm_func encoder_igemm_func memory_utils tensor cuda_utils logger) diff --git a/src/fastertransformer/models/bert/bert_gemm.cc b/src/fastertransformer/models/bert/bert_gemm.cc index b483ed80a..886687674 100644 --- a/src/fastertransformer/models/bert/bert_gemm.cc +++ b/src/fastertransformer/models/bert/bert_gemm.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/bert_fp8/BertFP8.cc b/src/fastertransformer/models/bert_fp8/BertFP8.cc new file mode 100644 index 000000000..305656314 --- /dev/null +++ b/src/fastertransformer/models/bert_fp8/BertFP8.cc @@ -0,0 +1,575 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include + +#include "src/fastertransformer/kernels/add_residual_kernels.h" +#include "src/fastertransformer/kernels/layernorm_fp8_kernels.h" +#include "src/fastertransformer/models/bert_fp8/BertFP8.h" +#include "src/fastertransformer/utils/nvtx_utils.h" + +namespace fastertransformer { + +template +void BertFP8::initialize() +{ + attention_layer_ = new SelfAttentionFP8Layer(head_num_, + size_per_head_, + head_num_ * size_per_head_, + q_scaling_, + fp8_mode_, + sm_, + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + sparse_); + + if (activation_type_ == ActivationType::Gelu) { + ffn_layer_ = new GeluFfnFP8Layer( + inter_size_, fp8_mode_, stream_, cublas_wrapper_, allocator_, is_free_buffer_after_forward_, sparse_); + } + else if (activation_type_ == ActivationType::Relu) { + ffn_layer_ = new ReluFfnFP8Layer( + inter_size_, fp8_mode_, stream_, cublas_wrapper_, allocator_, is_free_buffer_after_forward_, sparse_); + } +} + +template +BertFP8::BertFP8(size_t head_num, + size_t size_per_head, + size_t d_model, + size_t inter_size, + size_t num_layer, + NcclParam tensor_para, + NcclParam pipeline_para, + int sm, + float q_scaling, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + AttentionType attention_type, + bool sparse, + ActivationType activation_type, + LayerNormType layernorm_type, + int fp8_mode): + BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward, nullptr, sparse), + head_num_(head_num), + size_per_head_(size_per_head), + d_model_(d_model), + inter_size_(inter_size), + num_layer_(num_layer), + tensor_para_(tensor_para), + pipeline_para_(pipeline_para), + sm_(sm), + q_scaling_(q_scaling), + attention_type_(attention_type), + activation_type_(activation_type), + layernorm_type_(layernorm_type), + fp8_mode_(fp8_mode) +{ + initialize(); +} + +template +BertFP8::BertFP8(BertFP8 const& bert): + BertFP8(bert.head_num_, + bert.size_per_head_, + bert.d_model_, + bert.inter_size_, + bert.num_layer_, + bert.tensor_para_, + bert.pipeline_para_, + bert.sm_, + bert.q_scaling_, + bert.stream_, + bert.cublas_wrapper_, + bert.allocator_, + bert.is_free_buffer_after_forward_, + bert.attention_type_, + bert.sparse_, + bert.activation_type_, + bert.layernorm_type_, + bert.fp8_mode_) +{ +} + +template +BertFP8::~BertFP8() +{ + delete attention_layer_; + delete ffn_layer_; + freeBuffer(); +} + +template +void BertFP8::allocateBuffer() +{ + FT_CHECK(false); +} + +template +void BertFP8::allocateBuffer(size_t batch_size, size_t seq_len) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + if (!is_allocate_buffer_) { + check_cuda_error(cudaMallocHost((void**)&h_pinned_token_num_ptr_, sizeof(size_t))); + is_allocate_buffer_ = true; + } + padding_offset_ = (int*)allocator_->reMalloc(padding_offset_, sizeof(int) * batch_size * seq_len, false); + trt_mha_padding_offset_ = + (int*)allocator_->reMalloc(trt_mha_padding_offset_, sizeof(int) * (2 * batch_size + 1), false); + + attention_mask_ = (T1*)allocator_->reMalloc(attention_mask_, sizeof(T1) * batch_size * seq_len * seq_len, false); + + bert_in_buffer_ = (T1*)allocator_->reMalloc( + bert_in_buffer_, sizeof(T1) * batch_size * seq_len * head_num_ * size_per_head_, false); + attn_out_buf_ = (T1*)allocator_->reMalloc(attn_out_buf_, sizeof(T1) * batch_size * seq_len * d_model_, false); + bf16_out_tensor_ = (T2*)allocator_->reMalloc(bf16_out_tensor_, sizeof(T2) * batch_size * seq_len * d_model_, false); + bert_out_buffer_ = (T1*)allocator_->reMalloc( + bert_out_buffer_, sizeof(T1) * batch_size * seq_len * head_num_ * size_per_head_, false); + + if (layernorm_type_ == LayerNormType::post_layernorm) { + normed_from_tensor_ = nullptr; + normed_attn_out_buf_ = nullptr; + } + else { + normed_from_tensor_ = + (T1*)allocator_->reMalloc(normed_from_tensor_, sizeof(T1) * batch_size * seq_len * d_model_, false); + normed_attn_out_buf_ = + (T1*)allocator_->reMalloc(normed_attn_out_buf_, sizeof(T1) * batch_size * seq_len * d_model_, false); + } + + first_token_tensor_ = (T2*)allocator_->reMalloc(first_token_tensor_, sizeof(T2) * batch_size * d_model_, false); +} + +template +void BertFP8::freeBuffer() +{ + if (is_allocate_buffer_) { + check_cuda_error(cudaFreeHost(h_pinned_token_num_ptr_)); + is_allocate_buffer_ = false; + } + allocator_->free((void**)(&padding_offset_)); + allocator_->free((void**)(&trt_mha_padding_offset_)); + + allocator_->free((void**)(&attention_mask_)); + allocator_->free((void**)(&bert_in_buffer_)); + allocator_->free((void**)(&attn_out_buf_)); + allocator_->free((void**)(&bf16_out_tensor_)); + allocator_->free((void**)(&bert_out_buffer_)); + + if (layernorm_type_ == LayerNormType::post_layernorm) { + normed_from_tensor_ = nullptr; + normed_attn_out_buf_ = nullptr; + } + else { + allocator_->free((void**)(&normed_from_tensor_)); + allocator_->free((void**)(&normed_attn_out_buf_)); + } + allocator_->free((void**)(&first_token_tensor_)); +} + +template +void BertFP8::forward(TensorMap* output_tensors, + TensorMap* input_tensors, + const BertFP8Weight* bert_weights) +{ + // input_tensors: + // input_ids, int, [batch, seq_len] + // sequence_lengths, int, [batch] + // token_type_ids, int, [batch, seq_len] + // output tensors: + // output_hidden_state [batch, seqlen, d_model_] + // ft_pooled_output, bfloat, [batch, d_model_], optional, the results of first token, only used for + // classification. + + const size_t request_batch_size = input_tensors->at("input_ids").shape[0]; + const size_t request_seq_len = input_tensors->at("input_ids").shape[1]; + FT_CHECK(input_tensors->size() >= 2); + FT_CHECK(request_batch_size == input_tensors->at("sequence_lengths").shape[0]); + FT_CHECK(input_tensors->at("sequence_lengths").shape.size() == 1); + allocateBuffer(request_batch_size, request_seq_len); + FT_CHECK(output_tensors->at("output_hidden_state").type == DataType::TYPE_FP16); + + const int* sequence_lengths = reinterpret_cast(input_tensors->at("sequence_lengths").data); + + size_t h_token_num; + Tensor* padding_offset_tensor_ptr = nullptr; + Tensor* trt_padding_offset_tensor_ptr = nullptr; + + AttentionType attention_type = attention_type_; + + FT_CHECK(attention_type != AttentionType::UNFUSED_MHA); // not support UNFUSED_MHA now + if (isFusedMHA(attention_type) == false) { + PUSH_RANGE("invokeBuildEncoderAttentionMask"); + invokeBuildEncoderAttentionMask( + attention_mask_, sequence_lengths, request_batch_size, request_seq_len, stream_); + sync_check_cuda_error(); + POP_RANGE; + } + + if (isPaddedMHA(attention_type)) { + h_token_num = request_batch_size * request_seq_len; + cudaMemsetAsync(padding_offset_, 0, sizeof(int) * h_token_num, stream_); + + PUSH_RANGE("invokeGetTrtPaddingOffset"); + invokeGetTrtPaddingOffset( + trt_mha_padding_offset_, sequence_lengths, request_batch_size, request_seq_len, stream_); + POP_RANGE; + sync_check_cuda_error(); + + padding_offset_tensor_ptr = + new Tensor(MEMORY_GPU, TYPE_INT32, std::vector{h_token_num}, padding_offset_); + trt_padding_offset_tensor_ptr = new Tensor( + MEMORY_GPU, TYPE_INT32, std::vector{request_batch_size * 2 + 1}, trt_mha_padding_offset_); + } + else { + PUSH_RANGE("invokeGetPaddingOffset"); + invokeGetPaddingOffset(h_pinned_token_num_ptr_, + &h_token_num, + padding_offset_, + sequence_lengths, + request_batch_size, + request_seq_len, + stream_); + sync_check_cuda_error(); + POP_RANGE; + + PUSH_RANGE("invokeGetTrtPaddingOffset"); + invokeGetTrtPaddingOffset(trt_mha_padding_offset_, sequence_lengths, request_batch_size, stream_); + POP_RANGE; + sync_check_cuda_error(); + + padding_offset_tensor_ptr = + new Tensor(MEMORY_GPU, TYPE_INT32, std::vector{h_token_num}, padding_offset_); + trt_padding_offset_tensor_ptr = + new Tensor(MEMORY_GPU, TYPE_INT32, std::vector{request_batch_size + 1}, trt_mha_padding_offset_); + } + + { + RemovePaddingEmbLookupLayerNormFP8OutParam param{ + bert_out_buffer_, + input_tensors->at("input_ids").getPtr(), + input_tensors->isExist("position_ids") ? input_tensors->at("position_ids").getPtr() : nullptr, + input_tensors->isExist("token_type_ids") ? input_tensors->at("token_type_ids").getPtr() : nullptr, + padding_offset_, + bert_weights->word_embeddings, + bert_weights->position_embeddings, + bert_weights->token_type_embeddings, + bert_weights->embeddings_layernorm.gamma, + bert_weights->embeddings_layernorm.beta, + bert_weights->bert_layer_weights[0].attention_weights.query_weight.input_scale_inv, + sequence_lengths, + (int)h_token_num, + (int)d_model_, + (int)request_batch_size, + (int)request_seq_len, + 0, // pad_token_id + stream_, + false, + }; + PUSH_RANGE("invokeRemovePaddingEmbLookupLayerNormFP8Out"); + invokeRemovePaddingEmbLookupLayerNormFP8Out(param); + sync_check_cuda_error(); + POP_RANGE; + } + + DataType data_type = getTensorType(); + DataType high_precision_data_type = getTensorType(); + for (uint i = 0; i < num_layer_; i++) { + const T1* from_tensor = bert_out_buffer_; + T1* out_tensor = bert_out_buffer_; + + const BertFP8LayerWeight* layer_weight = &bert_weights->bert_layer_weights[i]; + + if (layernorm_type_ == LayerNormType::pre_layernorm) { + if (fp8_mode_ == 1) { + FT_CHECK(false); + } + else if (fp8_mode_ == 2) { + // Need to layernorm kernel to support fp8 input. + GeneralFP8IOPostLayerNormParam param{ + normed_from_tensor_, + from_tensor, + layer_weight->attn_layernorm_weights.gamma, + layer_weight->attn_layernorm_weights.beta, + nullptr, + layer_weight->attention_weights.query_weight.input_scale_inv, + (int)h_token_num, + (int)d_model_, + stream_, + true}; + sync_check_cuda_error(); + } + } + + // Attention + { + TensorMap attn_input_tensors = TensorMap(std::unordered_map{ + {"input_hidden_state", + Tensor{MEMORY_GPU, + data_type, + {h_token_num, d_model_}, + layernorm_type_ == LayerNormType::pre_layernorm ? normed_from_tensor_ : from_tensor}}, + {"attention_mask", + Tensor{MEMORY_GPU, + data_type, + {request_batch_size, 1, request_seq_len, request_seq_len}, + attention_mask_}}, + {"attention_type", Tensor{MEMORY_CPU, TYPE_VOID, {1}, &attention_type}}}); + if (padding_offset_tensor_ptr != nullptr) { + attn_input_tensors.insert("padding_offset", *padding_offset_tensor_ptr); + } + if (trt_padding_offset_tensor_ptr != nullptr) { + attn_input_tensors.insert("trt_padding_offset", *trt_padding_offset_tensor_ptr); + } + + TensorMap attn_output_tensors = TensorMap(std::unordered_map{ + {"output_hidden_state", Tensor{MEMORY_GPU, data_type, {h_token_num, d_model_}, attn_out_buf_}}}); + + attention_layer_->forward(&attn_output_tensors, &attn_input_tensors, &layer_weight->attention_weights); + } + + if (layernorm_type_ == LayerNormType::post_layernorm) { + PUSH_RANGE("post layernorm 1"); + if (fp8_mode_ == 1) { + FT_CHECK_WITH_INFO(false, "invokeGeneralFP8IOAddBiasResidualPostLayerNorm not support fp8_mode 1 now"); + // GeneralFP8IOAddBiasResidualPostLayerNormParam param{ + // attn_out_buf_, + // attn_out_buf_, + // from_tensor, + // layer_weight->attn_layernorm_weights.gamma, + // layer_weight->attn_layernorm_weights.beta, + // layer_weight->attention_weights.attention_output_weight.bias, + // layer_weight->attention_weights.attention_output_weight.output_scale, + // layer_weight->attention_weights.attention_output_weight.scale, + // layer_weight->attention_weights.attention_output_weight.per_channel_scale_min, + // layer_weight->ffn_weights.intermediate_weight.input_scale_inv, + // layer_weight->attention_weights.query_weight.input_scale, + // (int)h_token_num, + // (int)d_model_, + // stream_}; + // invokeGeneralFP8IOAddBiasResidualPostLayerNorm(param); + } + else if (fp8_mode_ == 2) { + GeneralFP8IOAddBiasResidualPostLayerNormParam param{ + attn_out_buf_, + attn_out_buf_, + from_tensor, + layer_weight->attn_layernorm_weights.gamma, + layer_weight->attn_layernorm_weights.beta, +#ifdef FUSE_GEMM_ACT + nullptr, +#else + layer_weight->attention_weights.attention_output_weight.bias, +#endif + layer_weight->attention_weights.attention_output_weight.output_scale, + nullptr, + nullptr, + layer_weight->ffn_weights.intermediate_weight.input_scale_inv, + layer_weight->attention_weights.query_weight.input_scale, + (int)h_token_num, + (int)d_model_, + stream_}; + invokeGeneralFP8IOAddBiasResidualPostLayerNorm(param); + } + POP_RANGE; + } + else if (layernorm_type_ == LayerNormType::pre_layernorm) { + // GeneralFP8AddBiasResidualPreLayerNormParam param{ + // normed_attn_out_buf_, + // attn_out_buf_, + // from_tensor, + // layer_weight->attention_weights.attention_output_weight.bias, + // layer_weight->ffn_layernorm_weights.gamma, + // layer_weight->ffn_layernorm_weights.beta, + // (const float*)layer_weight->attention_weights.attention_output_weight.scale, + // (const float*)layer_weight->ffn_weights.intermediate_weight.input_scale, + // h_token_num, + // d_model_, + // stream_, + // true}; + // invokeGeneralFP8AddBiasResidualPreLayerNorm(param); + // sync_check_cuda_error(); + } + + // FFN + { + TensorMap ffn_input_tensors = TensorMap(std::unordered_map{ + {"input_hidden_state", + Tensor{MEMORY_GPU, + data_type, + std::vector{h_token_num, d_model_}, + layernorm_type_ == LayerNormType::pre_layernorm ? normed_attn_out_buf_ : attn_out_buf_}}}); + TensorMap ffn_output_tensors = TensorMap(std::unordered_map{ + {"output_hidden_state", + Tensor{MEMORY_GPU, data_type, std::vector{h_token_num, d_model_}, out_tensor}}}); + ffn_layer_->forward(&ffn_output_tensors, &ffn_input_tensors, &layer_weight->ffn_weights); + } + + if (layernorm_type_ == LayerNormType::post_layernorm) { + PUSH_RANGE("post layernorm 2"); + if (fp8_mode_ == 1) { + FT_CHECK_WITH_INFO(false, "invokeGeneralFP8IOAddBiasResidualPostLayerNorm not support fp8_mode 1 now"); + // GeneralFP8IOAddBiasResidualPostLayerNormParam param{ + // out_tensor, + // out_tensor, + // attn_out_buf_, + // layer_weight->ffn_layernorm_weights.gamma, + // layer_weight->ffn_layernorm_weights.beta, + // layer_weight->ffn_weights.output_weight.bias, + // layer_weight->ffn_weights.output_weight.output_scale, + // layer_weight->ffn_weights.output_weight.scale, + // layer_weight->ffn_weights.output_weight.per_channel_scale_min, + // i == num_layer_ - 1 ? + // layer_weight->attention_weights.query_weight.input_scale_inv : + // bert_weights->bert_layer_weights[i + 1] + // .attention_weights.query_weight.input_scale_inv, // for next layer + // layer_weight->ffn_weights.intermediate_weight.input_scale, + // (int)h_token_num, + // (int)d_model_, + // stream_}; + // invokeGeneralFP8IOAddBiasResidualPostLayerNorm(param); + } + else if (fp8_mode_ == 2) { + GeneralFP8IOAddBiasResidualPostLayerNormParam param{ + out_tensor, + out_tensor, + attn_out_buf_, + layer_weight->ffn_layernorm_weights.gamma, + layer_weight->ffn_layernorm_weights.beta, +#ifdef FUSE_GEMM_ACT + layer_weight->ffn_weights.output_weight.bias, // nullptr, +#else + layer_weight->ffn_weights.output_weight.bias, +#endif + layer_weight->ffn_weights.output_weight.output_scale, + nullptr, + nullptr, + i == num_layer_ - 1 ? layer_weight->attention_weights.query_weight.input_scale_inv : + bert_weights->bert_layer_weights[i + 1] + .attention_weights.query_weight.input_scale_inv, // for next layer + layer_weight->ffn_weights.intermediate_weight.input_scale, + (int)h_token_num, + (int)d_model_, + stream_}; + invokeGeneralFP8IOAddBiasResidualPostLayerNorm(param); + } + POP_RANGE; + } + else if (layernorm_type_ == LayerNormType::pre_layernorm) { + // invokeAddBiasResidual(out_tensor, + // attn_out_buf_, + // layer_weight->ffn_weights.output_weight.bias, + // h_token_num, + // d_model_, + // stream_); + } + sync_check_cuda_error(); + } + + if (layernorm_type_ == LayerNormType::pre_layernorm) { + // invokeGeneralLayerNorm(bert_out_buffer_, + // bert_out_buffer_, + // bert_weights->post_transformer_layernorm_weights.gamma, + // bert_weights->post_transformer_layernorm_weights.beta, + // h_token_num, + // d_model_, + // stream_); + } + + { + // because TRT does not support bfloat output now. + QuantizeMatrixRebuildPaddingParam param{ + output_tensors->at("output_hidden_state").getPtr(), + bert_out_buffer_, + isPaddedMHA(attention_type) ? nullptr : padding_offset_, + (int)h_token_num, + (int)d_model_, + bert_weights->bert_layer_weights[num_layer_ - 1].attention_weights.query_weight.input_scale, + stream_}; + PUSH_RANGE("invokeQuantizeMatrixRebuildPadding"); + invokeQuantizeMatrixRebuildPadding(param); + sync_check_cuda_error(); + POP_RANGE; + } + + if (output_tensors->isExist("ft_pooled_output")) { + { + getLastTokenDequantizeParam param{ + first_token_tensor_, + bert_out_buffer_, + bert_weights->bert_layer_weights[num_layer_ - 1].attention_weights.query_weight.input_scale, + (int)request_batch_size, + (int)request_seq_len, + (int)d_model_, + stream_}; + invokeGetLastTokenDequantize(param); + sync_check_cuda_error(); + } + + { + float alpha = 1.0f; + float beta = 0.0f; + cublas_wrapper_->Gemm(CUBLAS_OP_N, + CUBLAS_OP_N, + d_model_, + request_batch_size, + d_model_, + &alpha, + bert_weights->pooler_dense.kernel, + CUDA_R_16BF, + d_model_, + first_token_tensor_, + CUDA_R_16BF, + d_model_, + &beta, + output_tensors->at("ft_pooled_output").getPtr(), + CUDA_R_16BF, + d_model_, + CUDA_R_32F, + cublasGemmAlgo_t(-1)); + } + + { + invokeAddBiasTanh(output_tensors->at("ft_pooled_output").getPtr(), + bert_weights->pooler_dense.bias, + request_batch_size, + d_model_, + stream_); + sync_check_cuda_error(); + } + } + + if (is_free_buffer_after_forward_ == true) { + freeBuffer(); + } + sync_check_cuda_error(); + + if (padding_offset_tensor_ptr != nullptr) { + delete padding_offset_tensor_ptr; + } + if (trt_padding_offset_tensor_ptr != nullptr) { + delete trt_padding_offset_tensor_ptr; + } +} + +template class BertFP8<__nv_fp8_e4m3, __nv_bfloat16>; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/bert_fp8/BertFP8.h b/src/fastertransformer/models/bert_fp8/BertFP8.h new file mode 100644 index 000000000..bb1dc7b3b --- /dev/null +++ b/src/fastertransformer/models/bert_fp8/BertFP8.h @@ -0,0 +1,106 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/kernels/bert_preprocess_kernels.h" +#include "src/fastertransformer/kernels/layernorm_kernels.h" +#include "src/fastertransformer/layers/TensorParallelGeluFfnFP8Layer.h" +#include "src/fastertransformer/layers/attention_layers_fp8/SelfAttentionFP8Layer.h" +#include "src/fastertransformer/models/bert_fp8/BertFP8Weight.h" +#include "src/fastertransformer/utils/cublasFP8MMWrapper.h" +#include "src/fastertransformer/utils/nccl_utils.h" + +namespace fastertransformer { + +template +class BertFP8: public BaseLayer { +private: + // meta data + size_t head_num_; + size_t size_per_head_; + size_t inter_size_; + size_t d_model_; + size_t num_layer_; + NcclParam tensor_para_; + NcclParam pipeline_para_; + // mode 0: no fp8. Should use original bert directly + // mode 1: per tensor scale for activation, per channel scale for weight + // mode 2: per tensor scale for activation and weight + int fp8_mode_; + + int sm_; + float q_scaling_; + AttentionType attention_type_; + + BaseAttentionFP8Layer* attention_layer_; + FfnFP8Layer* ffn_layer_; + + bool is_allocate_buffer_ = false; + + void allocateBuffer(); + void freeBuffer(); + void initialize(); + + const ActivationType activation_type_; + const LayerNormType layernorm_type_; + + void allocateBuffer(size_t batch_size, size_t seq_len); + +protected: + // model params + size_t* h_pinned_token_num_ptr_ = nullptr; + int* padding_offset_ = nullptr; + int* trt_mha_padding_offset_ = nullptr; + T1* attention_mask_ = nullptr; + T1* bert_in_buffer_ = nullptr; + T1* attn_out_buf_ = nullptr; + T2* bf16_out_tensor_ = nullptr; + T1* bert_out_buffer_ = nullptr; + + T1* normed_from_tensor_ = nullptr; + T1* normed_attn_out_buf_ = nullptr; + + T2* first_token_tensor_ = nullptr; + +public: + BertFP8(size_t head_num, + size_t size_per_head, + size_t d_model, + size_t inter_size, + size_t num_layer, + NcclParam tensor_para, + NcclParam pipeline_para, + int sm, + float q_scaling, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + AttentionType attention_type, + bool sparse, + ActivationType activation_type, + LayerNormType layernorm_type, + int fp8_mode); + + BertFP8(BertFP8 const& bert_layer); + + ~BertFP8(); + + void forward(TensorMap* output_tensors, TensorMap* input_tensors, const BertFP8Weight* bert_weights); +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/bert_fp8/BertFP8LayerWeight.cc b/src/fastertransformer/models/bert_fp8/BertFP8LayerWeight.cc new file mode 100644 index 000000000..e5acd3a80 --- /dev/null +++ b/src/fastertransformer/models/bert_fp8/BertFP8LayerWeight.cc @@ -0,0 +1,595 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "BertFP8LayerWeight.h" +#include "3rdparty/fp8_qgmma_1x1/fp8_qgmma_1x1_utils.h" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" +#include "src/fastertransformer/utils/memory_utils.h" +#include +#include +#include + +namespace fastertransformer { + +template +BertFP8LayerWeight::BertFP8LayerWeight(const size_t d_model, + const size_t head_num, + const size_t size_per_head, + const size_t inter_size, + const size_t tensor_para_size, + const size_t pipeline_para_size, + const int fp8_mode, + bool is_load_model, + bool is_fused_qkv_gemm_bias): + d_model_(d_model), + head_num_(head_num), + size_per_head_(size_per_head), + hidden_units_(head_num * size_per_head), + inter_size_(inter_size), + tensor_para_size_(tensor_para_size), + pipeline_para_size_(pipeline_para_size), + fp8_mode_(fp8_mode), + is_fused_qkv_gemm_bias_(is_fused_qkv_gemm_bias), + weights_ptr(4), + vec_ptr(8), + scale_ptr_(26), + scale_h_ptr_(26) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + if (is_load_model) { + mallocWeights(); + setWeightPtr(); + } +} + +template +BertFP8LayerWeight::~BertFP8LayerWeight() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + if (is_maintain_buffer == true) { + for (uint i = 0; i < weights_ptr.size(); i++) { + weights_ptr[i].first = 0; + deviceFree(weights_ptr[i].second); + } + for (uint i = 0; i < vec_ptr.size(); i++) { + vec_ptr[i].first = 0; + deviceFree(vec_ptr[i].second); + } + for (uint i = 0; i < scale_ptr_.size(); i++) { + scale_ptr_[i].first = 0; + deviceFree(scale_ptr_[i].second); + } + for (uint i = 0; i < scale_h_ptr_.size(); i++) { + delete scale_h_ptr_[i]; + } + + attention_weights.query_weight.kernel = nullptr; + attention_weights.query_weight.bias = nullptr; + attention_weights.query_weight.input_scale = nullptr; + attention_weights.query_weight.input_scale_inv = nullptr; + attention_weights.query_weight.output_scale = nullptr; + attention_weights.query_weight.output_scale_inv = nullptr; + attention_weights.query_weight.weight_scale_inv = nullptr; + attention_weights.query_weight.weight_scale = nullptr; + attention_weights.key_weight.kernel = nullptr; + attention_weights.key_weight.bias = nullptr; + attention_weights.value_weight.kernel = nullptr; + attention_weights.value_weight.bias = nullptr; + attention_weights.attention_output_weight.kernel = nullptr; + attention_weights.attention_output_weight.bias = nullptr; + attention_weights.attention_output_weight.input_scale = nullptr; + attention_weights.attention_output_weight.input_scale_inv = nullptr; + attention_weights.attention_output_weight.output_scale = nullptr; + attention_weights.attention_output_weight.output_scale_inv = nullptr; + attention_weights.attention_output_weight.weight_scale_inv = nullptr; + attention_weights.attention_output_weight.weight_scale = nullptr; + attn_layernorm_weights.gamma = nullptr; + attn_layernorm_weights.beta = nullptr; + ffn_weights.intermediate_weight.kernel = nullptr; + ffn_weights.intermediate_weight.bias = nullptr; + ffn_weights.intermediate_weight.input_scale = nullptr; + ffn_weights.intermediate_weight.input_scale_inv = nullptr; + ffn_weights.intermediate_weight.output_scale = nullptr; + ffn_weights.intermediate_weight.output_scale_inv = nullptr; + ffn_weights.intermediate_weight.weight_scale_inv = nullptr; + ffn_weights.intermediate_weight.weight_scale = nullptr; + ffn_weights.output_weight.kernel = nullptr; + ffn_weights.output_weight.bias = nullptr; + ffn_weights.output_weight.input_scale = nullptr; + ffn_weights.output_weight.input_scale_inv = nullptr; + ffn_weights.output_weight.output_scale = nullptr; + ffn_weights.output_weight.output_scale_inv = nullptr; + ffn_weights.output_weight.weight_scale_inv = nullptr; + ffn_weights.output_weight.weight_scale = nullptr; + ffn_layernorm_weights.gamma = nullptr; + ffn_layernorm_weights.beta = nullptr; + is_maintain_buffer = false; + } + if (is_maintain_sp_buffer == true) { + for (uint i = 0; i < sp_weights_ptr.size(); i++) { + sp_weights_ptr[i].first = 0; + deviceFree(sp_weights_ptr[i].second); + } + + attention_weights.query_weight.sp_kernel = nullptr; + attention_weights.key_weight.sp_kernel = nullptr; + attention_weights.value_weight.sp_kernel = nullptr; + attention_weights.attention_output_weight.sp_kernel = nullptr; + ffn_weights.intermediate_weight.sp_kernel = nullptr; + ffn_weights.output_weight.sp_kernel = nullptr; + is_maintain_sp_buffer = false; + } +} + +template +BertFP8LayerWeight::BertFP8LayerWeight(const BertFP8LayerWeight& other): + BertFP8LayerWeight(other.d_model_, + other.head_num_, + other.size_per_head_, + other.inter_size_, + other.tensor_para_size_, + other.pipeline_para_size_, + other.fp8_mode_, + true, + other.is_fused_qkv_gemm_bias_) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + for (uint i = 0; i < weights_ptr.size(); i++) { + cudaD2Dcpy(weights_ptr[i].second, other.weights_ptr[i].second, weights_ptr[i].first); + } + for (uint i = 0; i < vec_ptr.size(); i++) { + cudaD2Dcpy(vec_ptr[i].second, other.vec_ptr[i].second, vec_ptr[i].first); + } + for (uint i = 0; i < sp_weights_ptr.size(); i++) { + cudaD2Dcpy(sp_weights_ptr[i].second, other.sp_weights_ptr[i].second, sp_weights_ptr[i].first); + } + for (int i = 0; i < scale_ptr_.size(); i++) { + cudaD2Dcpy(scale_ptr_[i].second, other.scale_ptr_[i].second, scale_ptr_[i].first); + } + for (int i = 0; i < scale_h_ptr_.size(); i++) { + *(scale_h_ptr_[i]) = *(other.scale_h_ptr_[i]); + } +} + +template +void BertFP8LayerWeight::setWeightPtr() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + attention_weights.query_weight.kernel = weights_ptr[0].second; + attention_weights.attention_output_weight.kernel = weights_ptr[1].second; + ffn_weights.intermediate_weight.kernel = weights_ptr[2].second; + ffn_weights.output_weight.kernel = weights_ptr[3].second; + + attention_weights.query_weight.bias = vec_ptr[0].second; + attention_weights.attention_output_weight.bias = vec_ptr[1].second; + attn_layernorm_weights.gamma = vec_ptr[2].second; + attn_layernorm_weights.beta = vec_ptr[3].second; + ffn_weights.intermediate_weight.bias = vec_ptr[4].second; + ffn_weights.output_weight.bias = vec_ptr[5].second; + ffn_layernorm_weights.gamma = vec_ptr[6].second; + ffn_layernorm_weights.beta = vec_ptr[7].second; + + attention_weights.query_weight.input_scale = scale_ptr_[0].second; + attention_weights.query_weight.input_scale_inv = scale_ptr_[1].second; + attention_weights.query_weight.output_scale = scale_ptr_[2].second; + attention_weights.query_weight.output_scale_inv = scale_ptr_[3].second; + attention_weights.query_weight.weight_scale = scale_ptr_[4].second; + attention_weights.query_weight.weight_scale_inv = scale_ptr_[5].second; + attention_weights.attention_output_weight.input_scale = scale_ptr_[6].second; + attention_weights.attention_output_weight.input_scale_inv = scale_ptr_[7].second; + attention_weights.attention_output_weight.output_scale = scale_ptr_[8].second; + attention_weights.attention_output_weight.output_scale_inv = scale_ptr_[9].second; + attention_weights.attention_output_weight.weight_scale = scale_ptr_[10].second; + attention_weights.attention_output_weight.weight_scale_inv = scale_ptr_[11].second; + ffn_weights.intermediate_weight.input_scale = scale_ptr_[12].second; + ffn_weights.intermediate_weight.input_scale_inv = scale_ptr_[13].second; + ffn_weights.intermediate_weight.output_scale = scale_ptr_[14].second; + ffn_weights.intermediate_weight.output_scale_inv = scale_ptr_[15].second; + ffn_weights.intermediate_weight.weight_scale = scale_ptr_[16].second; + ffn_weights.intermediate_weight.weight_scale_inv = scale_ptr_[17].second; + ffn_weights.output_weight.input_scale = scale_ptr_[18].second; + ffn_weights.output_weight.input_scale_inv = scale_ptr_[19].second; + ffn_weights.output_weight.output_scale = scale_ptr_[20].second; + ffn_weights.output_weight.output_scale_inv = scale_ptr_[21].second; + ffn_weights.output_weight.weight_scale = scale_ptr_[22].second; + ffn_weights.output_weight.weight_scale_inv = scale_ptr_[23].second; + attention_weights.qk_scale = scale_ptr_[24].second; + attention_weights.qk_scale_inv = scale_ptr_[25].second; + + attention_weights.query_weight.input_h_scale = scale_h_ptr_[0]; + attention_weights.query_weight.input_h_scale_inv = scale_h_ptr_[1]; + attention_weights.query_weight.output_h_scale = scale_h_ptr_[2]; + attention_weights.query_weight.output_h_scale_inv = scale_h_ptr_[3]; + attention_weights.query_weight.weight_h_scale = scale_h_ptr_[4]; + attention_weights.query_weight.weight_h_scale_inv = scale_h_ptr_[5]; + attention_weights.attention_output_weight.input_h_scale = scale_h_ptr_[6]; + attention_weights.attention_output_weight.input_h_scale_inv = scale_h_ptr_[7]; + attention_weights.attention_output_weight.output_h_scale = scale_h_ptr_[8]; + attention_weights.attention_output_weight.output_h_scale_inv = scale_h_ptr_[9]; + attention_weights.attention_output_weight.weight_h_scale = scale_h_ptr_[10]; + attention_weights.attention_output_weight.weight_h_scale_inv = scale_h_ptr_[11]; + ffn_weights.intermediate_weight.input_h_scale = scale_h_ptr_[12]; + ffn_weights.intermediate_weight.input_h_scale_inv = scale_h_ptr_[13]; + ffn_weights.intermediate_weight.output_h_scale = scale_h_ptr_[14]; + ffn_weights.intermediate_weight.output_h_scale_inv = scale_h_ptr_[15]; + ffn_weights.intermediate_weight.weight_h_scale = scale_h_ptr_[16]; + ffn_weights.intermediate_weight.weight_h_scale_inv = scale_h_ptr_[17]; + ffn_weights.output_weight.input_h_scale = scale_h_ptr_[18]; + ffn_weights.output_weight.input_h_scale_inv = scale_h_ptr_[19]; + ffn_weights.output_weight.output_h_scale = scale_h_ptr_[20]; + ffn_weights.output_weight.output_h_scale_inv = scale_h_ptr_[21]; + ffn_weights.output_weight.weight_h_scale = scale_h_ptr_[22]; + ffn_weights.output_weight.weight_h_scale_inv = scale_h_ptr_[23]; + attention_weights.qk_h_scale = scale_h_ptr_[24]; + attention_weights.qk_h_scale_inv = scale_h_ptr_[25]; + + attention_weights.query_weight.fuse_gemm_bias = is_fused_qkv_gemm_bias_; + is_maintain_buffer = true; +} + +template +void BertFP8LayerWeight::mallocWeights() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + FT_CHECK(d_model_ != 0 && hidden_units_ != 0 && inter_size_ != 0); + FT_CHECK(head_num_ % tensor_para_size_ == 0); + FT_CHECK(inter_size_ % tensor_para_size_ == 0); + + weights_ptr[0].first = d_model_ * 3 * hidden_units_ / tensor_para_size_; // attention qkv weight + weights_ptr[1].first = hidden_units_ / tensor_para_size_ * d_model_; // attention projection weight + weights_ptr[2].first = d_model_ * inter_size_ / tensor_para_size_; // ffn gemm 1 weight + weights_ptr[3].first = inter_size_ / tensor_para_size_ * d_model_; // ffn gemm 2 weight + + vec_ptr[0].first = 3 * hidden_units_ / tensor_para_size_; // attention qkv bias + vec_ptr[1].first = d_model_; // attention projection bias + vec_ptr[2].first = d_model_; // attention_layernorm gamma + vec_ptr[3].first = d_model_; // attention_layernorm beta + vec_ptr[4].first = inter_size_ / tensor_para_size_; // ffn gemm 1 bias + vec_ptr[5].first = d_model_; // ffn gemm 2 bias + vec_ptr[6].first = d_model_; // ffn_layernorm gamma + vec_ptr[7].first = d_model_; // ffn_layernorm beta + + if (fp8_mode_ == 1) { + scale_ptr_[0].first = 1; + scale_ptr_[1].first = 1; + scale_ptr_[2].first = 1; + scale_ptr_[3].first = 1; + scale_ptr_[4].first = 3 * hidden_units_ / tensor_para_size_; + scale_ptr_[5].first = 3 * hidden_units_ / tensor_para_size_; + scale_ptr_[6].first = 1; + scale_ptr_[7].first = 1; + scale_ptr_[8].first = 1; + scale_ptr_[9].first = 1; + scale_ptr_[10].first = d_model_; + scale_ptr_[11].first = d_model_; + scale_ptr_[12].first = 1; + scale_ptr_[13].first = 1; + scale_ptr_[14].first = 1; + scale_ptr_[15].first = 1; + scale_ptr_[16].first = inter_size_ / tensor_para_size_; + scale_ptr_[17].first = inter_size_ / tensor_para_size_; + scale_ptr_[18].first = 1; + scale_ptr_[19].first = 1; + scale_ptr_[20].first = 1; + scale_ptr_[21].first = 1; + scale_ptr_[22].first = d_model_; + scale_ptr_[23].first = d_model_; + scale_ptr_[24].first = 1; + scale_ptr_[25].first = 1; + } + else if (fp8_mode_ == 2) { + for (int i = 0; i < scale_ptr_.size(); i++) { + scale_ptr_[i].first = 1; + } + } + else { + FT_CHECK(false); + } + + for (uint i = 0; i < weights_ptr.size(); i++) { + deviceMalloc(&weights_ptr[i].second, weights_ptr[i].first); + } + for (uint i = 0; i < vec_ptr.size(); i++) { + deviceMalloc(&vec_ptr[i].second, vec_ptr[i].first); + } + for (uint i = 0; i < scale_ptr_.size(); i++) { + deviceMalloc(&scale_ptr_[i].second, scale_ptr_[i].first, false); + deviceFill(scale_ptr_[i].second, scale_ptr_[i].first, 1.0f); + } + for (uint i = 0; i < scale_h_ptr_.size(); i++) { + scale_h_ptr_[i] = new float(1.0f); + } +} + +template +void BertFP8LayerWeight::loadModel(std::string dir_path) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + FT_CHECK(is_maintain_buffer == true); + + loadWeightFromBin( + vec_ptr[0].second, {(int)vec_ptr[0].first}, dir_path + ".attention.self.query_key_value.bias.bin"); + loadWeightFromBin(vec_ptr[1].second, {(int)vec_ptr[1].first}, dir_path + ".attention.output.dense.bias.bin"); + loadWeightFromBin( + vec_ptr[2].second, {(int)vec_ptr[2].first}, dir_path + ".attention.output.LayerNorm.weight.bin"); + loadWeightFromBin( + vec_ptr[3].second, {(int)vec_ptr[3].first}, dir_path + ".attention.output.LayerNorm.bias.bin"); + loadWeightFromBin(vec_ptr[4].second, {(int)vec_ptr[4].first}, dir_path + ".intermediate.dense.bias.bin"); + loadWeightFromBin(vec_ptr[5].second, {(int)vec_ptr[5].first}, dir_path + ".output.dense.bias.bin"); + loadWeightFromBin(vec_ptr[6].second, {(int)vec_ptr[6].first}, dir_path + ".output.LayerNorm.weight.bin"); + loadWeightFromBin(vec_ptr[7].second, {(int)vec_ptr[7].first}, dir_path + ".output.LayerNorm.bias.bin"); + + // Load scaling + { + std::string quantizer_list[13] = { + ".attention.self.query_key_value._input_quantizer._amax.bin", + ".attention.self.matmul_q_input_quantizer._amax.bin", + ".attention.self.query_key_value._weight_quantizer._amax.bin", + ".attention.output.dense._input_quantizer._amax.bin", + ".attention.output.add_local_input_quantizer._amax.bin", + ".attention.output.dense._weight_quantizer._amax.bin", + ".intermediate.dense._input_quantizer._amax.bin", + ".intermediate.intermediate_act_fn_input_quantizer._amax.bin", + ".intermediate.dense._weight_quantizer._amax.bin", + ".output.dense._input_quantizer._amax.bin", + ".output.add_local_input_quantizer._amax.bin", + ".output.dense._weight_quantizer._amax.bin", + ".attention.self.matmul_a_input_quantizer._amax.bin", // special amax for multi-head attention + }; + + float* d_amax = nullptr; + deviceMalloc(&d_amax, inter_size_, false); + float* h_amax = new float[inter_size_]; + float* h_scale = new float[inter_size_]; + float* h_scale_inv = new float[inter_size_]; + + for (int i = 0; i < 13; i++) { + // prevent random initialize the scales, make them to 1.0f + if (checkIfFileExist(dir_path + quantizer_list[i])) { + loadWeightFromBin(d_amax, {(int)scale_ptr_[i * 2].first}, dir_path + quantizer_list[i]); + cudaD2Hcpy(h_amax, d_amax, scale_ptr_[i * 2].first); + } + else { + for (int j = 0; j < scale_ptr_[i * 2].first; j++) { + h_amax[j] = 480.f; + } + } + for (int j = 0; j < scale_ptr_[i * 2].first; j++) { + h_scale[j] = h_amax[j] / 480.f; + h_scale_inv[j] = 480.f / h_amax[j]; + } + cudaH2Dcpy(scale_ptr_[i * 2 + 0].second, h_scale, scale_ptr_[i * 2 + 0].first); + cudaH2Dcpy(scale_ptr_[i * 2 + 1].second, h_scale_inv, scale_ptr_[i * 2 + 1].first); + + if (fp8_mode_ == 2) { + *(scale_h_ptr_[i * 2 + 0]) = h_scale[0]; // only for per tensor + *(scale_h_ptr_[i * 2 + 1]) = h_scale_inv[0]; // only for per tensor + } + } + deviceFree(d_amax); + delete[] h_amax; + delete[] h_scale; + delete[] h_scale_inv; + } + + { + float* d_float_weight = nullptr; + deviceMalloc(&d_float_weight, inter_size_ * inter_size_); + + if (fp8_mode_ == 1) { + loadWeightFromBin( + d_float_weight, {(int)weights_ptr[0].first}, dir_path + ".attention.self.query_key_value.weight.bin"); + invokeQuantizeMatrix(weights_ptr[0].second, + scale_ptr_[5].second, + d_float_weight, + (int)weights_ptr[0].first, + scale_ptr_[4].first, + (cudaStream_t)0); + loadWeightFromBin( + d_float_weight, {(int)weights_ptr[1].first}, dir_path + ".attention.output.dense.weight.bin"); + invokeQuantizeMatrix(weights_ptr[1].second, + scale_ptr_[11].second, + d_float_weight, + (int)weights_ptr[1].first, + scale_ptr_[10].first, + (cudaStream_t)0); + loadWeightFromBin( + d_float_weight, {(int)weights_ptr[2].first}, dir_path + ".intermediate.dense.weight.bin"); + invokeQuantizeMatrix(weights_ptr[2].second, + scale_ptr_[17].second, + d_float_weight, + (int)weights_ptr[2].first, + scale_ptr_[16].first, + (cudaStream_t)0); + loadWeightFromBin( + d_float_weight, {(int)weights_ptr[3].first}, dir_path + ".output.dense.weight.bin"); + invokeQuantizeMatrix(weights_ptr[3].second, + scale_ptr_[23].second, + d_float_weight, + (int)weights_ptr[3].first, + scale_ptr_[22].first, + (cudaStream_t)0); + } + else if (fp8_mode_ == 2) { + loadWeightFromBin( + d_float_weight, {(int)weights_ptr[0].first}, dir_path + ".attention.self.query_key_value.weight.bin"); + invokeQuantizeMatrix(weights_ptr[0].second, + scale_ptr_[5].second, + d_float_weight, + (int)weights_ptr[0].first, + 1, + (cudaStream_t)0); + loadWeightFromBin( + d_float_weight, {(int)weights_ptr[1].first}, dir_path + ".attention.output.dense.weight.bin"); + invokeQuantizeMatrix(weights_ptr[1].second, + scale_ptr_[11].second, + d_float_weight, + (int)weights_ptr[1].first, + 1, + (cudaStream_t)0); + loadWeightFromBin( + d_float_weight, {(int)weights_ptr[2].first}, dir_path + ".intermediate.dense.weight.bin"); + invokeQuantizeMatrix(weights_ptr[2].second, + scale_ptr_[17].second, + d_float_weight, + (int)weights_ptr[2].first, + 1, + (cudaStream_t)0); + loadWeightFromBin( + d_float_weight, {(int)weights_ptr[3].first}, dir_path + ".output.dense.weight.bin"); + invokeQuantizeMatrix(weights_ptr[3].second, + scale_ptr_[23].second, + d_float_weight, + (int)weights_ptr[3].first, + 1, + (cudaStream_t)0); + } + + deviceFree(d_float_weight); + } +} + +template +void BertFP8LayerWeight::serialize(uint8_t*& buffer) const +{ + serialize_d2h(buffer, weights_ptr); + serialize_d2h(buffer, vec_ptr); + serialize_d2h(buffer, sp_weights_ptr); + serialize_d2h(buffer, scale_ptr_); + serialize_h2h(buffer, scale_h_ptr_); +} + +template +void BertFP8LayerWeight::deserialize(const uint8_t*& buffer) +{ + if (!is_maintain_buffer) { + return; + } + + deserialize_h2d(buffer, weights_ptr); + deserialize_h2d(buffer, vec_ptr); + deserialize_h2d(buffer, sp_weights_ptr); + deserialize_h2d(buffer, scale_ptr_); + deserialize_h2h(buffer, scale_h_ptr_); +} + +template +int32_t BertFP8LayerWeight::getSerializationSize() const +{ + int32_t size = 0; + int32_t dtype_size = sizeof(T1); + const auto pair_accum = [&dtype_size](const auto acc, const auto& x) { return acc + x.first * dtype_size; }; + size = std::accumulate(std::begin(weights_ptr), std::end(weights_ptr), size, pair_accum); + dtype_size = sizeof(T2); + size = std::accumulate(std::begin(vec_ptr), std::end(vec_ptr), size, pair_accum); + dtype_size = sizeof(T1); + size = std::accumulate(std::begin(sp_weights_ptr), std::end(sp_weights_ptr), size, pair_accum); + dtype_size = sizeof(float); + size = std::accumulate(std::begin(scale_ptr_), std::end(scale_ptr_), size, pair_accum); + size += scale_h_ptr_.size() * sizeof(float); + return size; +} + +template +void BertFP8LayerWeight::transposeWeight() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + T1* workspace; + deviceMalloc(&workspace, hidden_units_ / tensor_para_size_ * std::max(3 * hidden_units_, inter_size_)); + + if (is_fused_qkv_gemm_bias_) { + // transpose the qkv gemm from [hidden, 3, head_num / tp, size_per_head] to [hidden, head_num / tp, 3, + // size_per_head] + invokeInPlaceTranspose0213( + weights_ptr[0].second, workspace, d_model_, 3, head_num_ / tensor_para_size_, size_per_head_); + // transpose the qkv bias from [3, head_num / tp, size_per_head] to [head_num / tp, 3, size_per_head] + invokeInPlaceTranspose102( + vec_ptr[0].second, (T2*)workspace, 3, head_num_ / tensor_para_size_, size_per_head_); + } + invokeInPlaceTranspose(weights_ptr[0].second, workspace, hidden_units_, 3 * hidden_units_ / tensor_para_size_); + invokeInPlaceTranspose(weights_ptr[1].second, workspace, hidden_units_ / tensor_para_size_, hidden_units_); + invokeInPlaceTranspose(weights_ptr[2].second, workspace, hidden_units_, inter_size_ / tensor_para_size_); + invokeInPlaceTranspose(weights_ptr[3].second, workspace, inter_size_ / tensor_para_size_, hidden_units_); + deviceFree(workspace); + + // swizzle for fused qkv gemm and bias + if (is_fused_qkv_gemm_bias_) { + { + T1* h_B = new T1[weights_ptr[0].first]; + cudaD2Hcpy(h_B, weights_ptr[0].second, weights_ptr[0].first); + T2* h_bias = new T2[vec_ptr[0].first]; + cudaD2Hcpy(h_bias, vec_ptr[0].second, vec_ptr[0].first); + invokeSwizzleQgmmaWeights(d_model_, + 3 * hidden_units_ / tensor_para_size_, + (uint8_t*)h_B, + (uint8_t*)weights_ptr[0].second, + (uint16_t*)h_bias, + (uint16_t*)vec_ptr[0].second); + delete h_B; + delete h_bias; + } + } +#ifdef FUSE_GEMM_ACT + { + T1* h_B = new T1[weights_ptr[1].first]; + cudaD2Hcpy(h_B, weights_ptr[1].second, weights_ptr[1].first); + T2* h_bias = new T2[vec_ptr[1].first]; + cudaD2Hcpy(h_bias, vec_ptr[1].second, vec_ptr[1].first); + invokeSwizzleQgmmaWeights(hidden_units_ / tensor_para_size_, + d_model_, + (uint8_t*)h_B, + (uint8_t*)weights_ptr[1].second, + (uint16_t*)h_bias, + (uint16_t*)vec_ptr[1].second); + delete h_B; + delete h_bias; + } + // swizzle for fused ffn gemm 1 and bias + { + T1* h_B = new T1[weights_ptr[2].first]; + cudaD2Hcpy(h_B, weights_ptr[2].second, weights_ptr[2].first); + T2* h_bias = new T2[vec_ptr[4].first]; + cudaD2Hcpy(h_bias, vec_ptr[4].second, vec_ptr[4].first); + invokeSwizzleQgmmaWeights(hidden_units_, + inter_size_ / tensor_para_size_, + (uint8_t*)h_B, + (uint8_t*)weights_ptr[2].second, + (uint16_t*)h_bias, + (uint16_t*)vec_ptr[4].second); + delete h_B; + delete h_bias; + } + // swizzle for fused ffn gemm 2 and bias + { + // T1* h_B = new T1[weights_ptr[3].first]; + // cudaD2Hcpy(h_B, weights_ptr[3].second, weights_ptr[3].first); + // T2* h_bias = new T2[vec_ptr[5].first]; + // cudaD2Hcpy(h_bias, vec_ptr[5].second, vec_ptr[5].first); + // invokeSwizzleQgmmaWeights(inter_size_ / tensor_para_size_, + // hidden_units_, + // (uint8_t*)h_B, + // (uint8_t*)weights_ptr[3].second, + // (uint16_t*)h_bias, + // (uint16_t*)vec_ptr[5].second); + // delete h_B; + // delete h_bias; + } +#endif +} + +template struct BertFP8LayerWeight<__nv_fp8_e4m3, __nv_bfloat16>; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/bert_fp8/BertFP8LayerWeight.h b/src/fastertransformer/models/bert_fp8/BertFP8LayerWeight.h new file mode 100644 index 000000000..bbca6cd02 --- /dev/null +++ b/src/fastertransformer/models/bert_fp8/BertFP8LayerWeight.h @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include +#include +#include + +#include "src/fastertransformer/kernels/layernorm_fp8_kernels.h" +#include "src/fastertransformer/layers/FfnFP8Weight.h" +#include "src/fastertransformer/layers/attention_layers_fp8/AttentionFP8Weight.h" +#include "src/fastertransformer/models/bert_fp8/serialize.hpp" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" + +namespace fastertransformer { + +template +struct BertFP8LayerWeight { + + BertFP8LayerWeight() = default; + BertFP8LayerWeight(const size_t d_model, + const size_t head_num, + const size_t size_per_head, + const size_t inter_size, + const size_t tensor_para_size, + const size_t pipeline_para_size, + const int fp8_mode, + bool is_load_model, + bool is_fused_qkv_gemm); + ~BertFP8LayerWeight(); + BertFP8LayerWeight(const BertFP8LayerWeight& other); + BertFP8LayerWeight& operator=(const BertFP8LayerWeight& other) = delete; + void transposeWeight(); + void quantizeWeights(); + void loadModel(std::string dir_path); + void serialize(uint8_t*& buffer) const; + void deserialize(const uint8_t*& buffer); + int32_t getSerializationSize() const; + + AttentionFP8Weight attention_weights; + LayerNormWeight attn_layernorm_weights; + FfnFP8Weight ffn_weights; + LayerNormWeight ffn_layernorm_weights; + +private: + void setWeightPtr(); + void mallocWeights(); + + size_t d_model_ = 0; + size_t head_num_ = 0; + size_t size_per_head_ = 0; + size_t hidden_units_ = 0; + size_t inter_size_ = 0; + size_t tensor_para_size_ = 1; + size_t pipeline_para_size_ = 1; + bool is_maintain_buffer = false; + bool is_maintain_sp_buffer = false; + // mode 0: no fp8. Should use original bert directly + // mode 1: per tensor scale for activation, per channel scale for weight + // mode 2: per tensor scale for activation and weight + int fp8_mode_; + bool is_fused_qkv_gemm_bias_; + + std::vector> weights_ptr; + std::vector> vec_ptr; // containing bias, gamma and beta + std::vector> sp_weights_ptr; + std::vector> scale_ptr_; + std::vector scale_h_ptr_; +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/bert_fp8/BertFP8Weight.cc b/src/fastertransformer/models/bert_fp8/BertFP8Weight.cc new file mode 100644 index 000000000..8bb979b3a --- /dev/null +++ b/src/fastertransformer/models/bert_fp8/BertFP8Weight.cc @@ -0,0 +1,222 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/models/bert_fp8/BertFP8Weight.h" +#include "src/fastertransformer/utils/memory_utils.h" +#include + +namespace fastertransformer { + +template +BertFP8Weight::BertFP8Weight(const size_t d_model, + const size_t head_num, + const size_t size_per_head, + const size_t inter_size, + const size_t num_layer, + const size_t vocab_size, + const size_t max_position_embeddings, + const size_t token_type_vocab_size, + const size_t tensor_para_size, + const size_t pipeline_para_size, + const int fp8_mode, + bool is_load_model, + bool is_fused_qkv_gemm): + d_model_(d_model), + head_num_(head_num), + size_per_head_(size_per_head), + inter_size_(inter_size), + num_layer_(num_layer), + vocab_size_(vocab_size), + max_position_embeddings_(max_position_embeddings), + token_type_vocab_size_(token_type_vocab_size), + tensor_para_size_(tensor_para_size), + pipeline_para_size_(pipeline_para_size), + fp8_mode_(fp8_mode), + weights_ptr(9) +{ + mallocWeights(); + setWeightPtr(); + + bert_layer_weights.clear(); + for (int i = 0; i < num_layer_; i++) { + bert_layer_weights.push_back(BertFP8LayerWeight(d_model_, + head_num_, + size_per_head_, + inter_size_, + tensor_para_size_, + pipeline_para_size_, + fp8_mode_, + is_load_model, + is_fused_qkv_gemm)); + } +} + +template +BertFP8Weight::~BertFP8Weight() +{ + if (is_maintain_buffer == true) { + bert_layer_weights.clear(); + for (uint i = 0; i < weights_ptr.size(); i++) { + deviceFree(weights_ptr[i].second); + weights_ptr[i].first = 0; + } + + word_embeddings = nullptr; // weights_ptr[0] + position_embeddings = nullptr; // weights_ptr[1] + token_type_embeddings = nullptr; // weights_ptr[2] + embeddings_layernorm.gamma = nullptr; // weights_ptr[3] + embeddings_layernorm.beta = nullptr; // weights_ptr[4] + post_transformer_layernorm_weights.gamma = nullptr; // weights_ptr[5] + post_transformer_layernorm_weights.beta = nullptr; // weights_ptr[6] + pooler_dense.kernel = nullptr; // weights_ptr[7] + pooler_dense.bias = nullptr; // weights_ptr[8] + + is_maintain_buffer = false; + } +} + +template +BertFP8Weight::BertFP8Weight(const BertFP8Weight& other): + BertFP8Weight(other.d_model_, + other.head_num_, + other.size_per_head_, + other.inter_size_, + other.num_layer_, + other.vocab_size_, + other.max_position_embeddings_, + other.token_type_vocab_size_, + other.tensor_para_size_, + other.pipeline_para_size_, + other.fp8_mode_, + true) +{ + for (uint i = 0; i < weights_ptr.size(); i++) { + cudaD2Dcpy(weights_ptr[i].second, other.weights_ptr[i].second, weights_ptr[i].first); + } +} + +template +void BertFP8Weight::transposeWeight() +{ + for (int i = 0; i < bert_layer_weights.size(); i++) { + bert_layer_weights[i].transposeWeight(); + } + + // We use bfloat 16 with NN for this gemm, don't need to transpose this weight. + // T2* workspace; + // deviceMalloc(&workspace, d_model_ * d_model_); + // invokeInPlaceTranspose(weights_ptr[7].second, workspace, d_model_, d_model_); + // deviceFree(workspace); +} + +template +void BertFP8Weight::loadModel(std::string dir_path) +{ + for (int i = 0; i < bert_layer_weights.size(); i++) { + bert_layer_weights[i].loadModel(dir_path + "bert.encoder.layer." + std::to_string(i)); + } + + loadWeightFromBin( + weights_ptr[0].second, {(int)weights_ptr[0].first}, dir_path + "bert.embeddings.word_embeddings.weight.bin"); + loadWeightFromBin(weights_ptr[1].second, + {(int)weights_ptr[1].first}, + dir_path + "bert.embeddings.position_embeddings.weight.bin"); + loadWeightFromBin(weights_ptr[2].second, + {(int)weights_ptr[2].first}, + dir_path + "bert.embeddings.token_type_embeddings.weight.bin"); + loadWeightFromBin( + weights_ptr[3].second, {(int)weights_ptr[3].first}, dir_path + "bert.embeddings.LayerNorm.weight.bin"); + loadWeightFromBin( + weights_ptr[4].second, {(int)weights_ptr[4].first}, dir_path + "bert.embeddings.LayerNorm.bias.bin"); + // loadWeightFromBin(weights_ptr[5].second, {(int)weights_ptr[5].first}, + // "bert.embeddings.post_transformer_layernorm_weights.gamma"); loadWeightFromBin(weights_ptr[6].second, + // {(int)weights_ptr[6].first}, dir_path + "bert.embeddings.post_transformer_layernorm_weights.beta"); + loadWeightFromBin( + weights_ptr[7].second, {(int)weights_ptr[7].first}, dir_path + "bert.pooler.dense.weight.bin"); + loadWeightFromBin(weights_ptr[8].second, {(int)weights_ptr[8].first}, dir_path + "bert.pooler.dense.bias.bin"); +} + +template +void BertFP8Weight::serialize(uint8_t*& buffer) +{ + uint8_t* base = buffer; + for (const auto& layer_weight : bert_layer_weights) { + layer_weight.serialize(buffer); + } + + serialize_d2h(buffer, weights_ptr); +} + +template +void BertFP8Weight::deserialize(const uint8_t*& buffer) +{ + const uint8_t* base = buffer; + for (auto& layer_weight : bert_layer_weights) { + layer_weight.deserialize(buffer); + } + + deserialize_h2d(buffer, weights_ptr); +} + +template +size_t BertFP8Weight::getSerializationSize() const +{ + size_t sz = 0; + sz = std::accumulate(std::begin(bert_layer_weights), + std::end(bert_layer_weights), + sz, + [](auto acc, const auto& layer) { return acc + layer.getSerializationSize(); }); + sz = std::accumulate(std::begin(weights_ptr), std::end(weights_ptr), sz, [](auto acc, const auto& weight_ptr) { + return acc + weight_ptr.first * sizeof(T2); + }); + return sz; +} + +template +void BertFP8Weight::setWeightPtr() +{ + word_embeddings = weights_ptr[0].second; + position_embeddings = weights_ptr[1].second; + token_type_embeddings = weights_ptr[2].second; + embeddings_layernorm.gamma = weights_ptr[3].second; + embeddings_layernorm.beta = weights_ptr[4].second; + post_transformer_layernorm_weights.gamma = weights_ptr[5].second; + post_transformer_layernorm_weights.beta = weights_ptr[6].second; + pooler_dense.kernel = weights_ptr[7].second; + pooler_dense.bias = weights_ptr[8].second; +} + +template +void BertFP8Weight::mallocWeights() +{ + weights_ptr[0].first = vocab_size_ * d_model_; + weights_ptr[1].first = max_position_embeddings_ * d_model_; + weights_ptr[2].first = token_type_vocab_size_ * d_model_; + weights_ptr[3].first = d_model_; + weights_ptr[4].first = d_model_; + weights_ptr[5].first = d_model_; + weights_ptr[6].first = d_model_; + weights_ptr[7].first = d_model_ * d_model_; + weights_ptr[8].first = d_model_; + + for (uint i = 0; i < weights_ptr.size(); i++) { + deviceMalloc(&weights_ptr[i].second, weights_ptr[i].first); + } +} + +template struct BertFP8Weight<__nv_fp8_e4m3, __nv_bfloat16>; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/bert_fp8/BertFP8Weight.h b/src/fastertransformer/models/bert_fp8/BertFP8Weight.h new file mode 100644 index 000000000..d2e2a0290 --- /dev/null +++ b/src/fastertransformer/models/bert_fp8/BertFP8Weight.h @@ -0,0 +1,82 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/models/bert_fp8/BertFP8LayerWeight.h" + +namespace fastertransformer { + +template +struct BertFP8Weight { + + BertFP8Weight() = default; + BertFP8Weight(const size_t d_model, + const size_t head_num, + const size_t size_per_head, + const size_t inter_size, + const size_t num_layer, + const size_t vocab_size, + const size_t max_position_embeddings, + const size_t token_type_vocab_size, + const size_t tensor_para_size, + const size_t pipeline_para_size, + const int fp8_mode, + bool is_load_model = false, + bool is_fused_qkv_gemm = true); + ~BertFP8Weight(); + BertFP8Weight(const BertFP8Weight& other); + BertFP8Weight& operator=(const BertFP8Weight& other) = delete; + void transposeWeight(); + void loadModel(std::string dir_path); + void serialize(uint8_t*& buffer); + void deserialize(const uint8_t*& buffer); + size_t getSerializationSize() const; + + // Weights + std::vector> bert_layer_weights; + const T2* word_embeddings; + const T2* position_embeddings; + const T2* token_type_embeddings; + LayerNormWeight embeddings_layernorm; + LayerNormWeight post_transformer_layernorm_weights; + DenseWeight pooler_dense; + +private: + void setWeightPtr(); + void mallocWeights(); + + // model configs + size_t d_model_ = 0; + size_t head_num_ = 0; + size_t size_per_head_ = 0; + size_t inter_size_ = 0; + size_t num_layer_ = 0; + size_t vocab_size_ = 0; + size_t max_position_embeddings_; + size_t token_type_vocab_size_; + size_t tensor_para_size_; + size_t pipeline_para_size_; + // mode 0: no fp8. Should use original bert directly + // mode 1: per tensor scale for activation, per channel scale for weight + // mode 2: per tensor scale for activation and weight + int fp8_mode_; + + bool is_maintain_buffer = false; + std::vector> weights_ptr; +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/bert_fp8/CMakeLists.txt b/src/fastertransformer/models/bert_fp8/CMakeLists.txt new file mode 100644 index 000000000..fceb1f6be --- /dev/null +++ b/src/fastertransformer/models/bert_fp8/CMakeLists.txt @@ -0,0 +1,28 @@ +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +cmake_minimum_required(VERSION 3.8) + + +add_library(BertFP8Weight STATIC BertFP8Weight.cc BertFP8LayerWeight.cc) +set_property(TARGET BertFP8Weight PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET BertFP8Weight PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(BertFP8Weight PUBLIC memory_utils cuda_fp8_utils fp8_qgmma_1x1_utils) + +add_library(BertFP8 STATIC BertFP8.cc) +set_property(TARGET BertFP8 PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET BertFP8 PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(BertFP8 PUBLIC -lcudart bert_preprocess_kernels + FfnFP8Layer layernorm_kernels layernorm_fp8_kernels add_residual_kernels SelfAttentionFP8Layer + BertFP8Weight) diff --git a/src/fastertransformer/models/bert_fp8/serialize.hpp b/src/fastertransformer/models/bert_fp8/serialize.hpp new file mode 100644 index 000000000..592f32d6d --- /dev/null +++ b/src/fastertransformer/models/bert_fp8/serialize.hpp @@ -0,0 +1,100 @@ +#pragma once + +#include +#include +#include +#include +#include + +namespace fastertransformer { +using memcpy_fn = std::function; + +template +void serialize(uint8_t*& buffer, const std::vector>& v, const memcpy_fn& fn) +{ + for (int i = 0; i < v.size(); i++) { + size_t bytes = v[i].first * sizeof(T); + fn((void*)buffer, v[i].second, bytes); + buffer += bytes; + } +} + +template +void serialize(uint8_t*& buffer, const std::vector& v, const memcpy_fn& fn) +{ + for (int i = 0; i < v.size(); i++) { + size_t bytes = sizeof(T); + fn((void*)buffer, v[i], bytes); + buffer += bytes; + } +} + +template +void serialize_d2h(uint8_t*& buffer, const std::vector>& v) +{ + serialize(buffer, v, [](void* src, void* dst, size_t sz) { cudaMemcpy(src, dst, sz, cudaMemcpyDeviceToHost); }); +} + +template +void serialize_d2h(uint8_t*& buffer, const std::vector& v) +{ + serialize(buffer, v, [](void* src, void* dst, size_t sz) { cudaMemcpy(src, dst, sz, cudaMemcpyDeviceToHost); }); +} + +template +void serialize_h2h(uint8_t*& buffer, const std::vector>& v) +{ + serialize(buffer, v, std::memcpy); +} + +template +void serialize_h2h(uint8_t*& buffer, const std::vector& v) +{ + serialize(buffer, v, std::memcpy); +} + +template +void deserialize(const uint8_t*& buffer, std::vector>& v, const memcpy_fn& fn) +{ + for (int i = 0; i < v.size(); i++) { + size_t bytes = v[i].first * sizeof(T); + fn(v[i].second, (void*)buffer, bytes); + buffer += bytes; + } +} + +template +void deserialize(const uint8_t*& buffer, std::vector& v, const memcpy_fn& fn) +{ + for (int i = 0; i < v.size(); i++) { + size_t bytes = sizeof(T); + fn(v[i], (void*)buffer, bytes); + buffer += bytes; + } +} + +template +void deserialize_h2d(const uint8_t*& buffer, std::vector>& v) +{ + deserialize(buffer, v, [](void* src, void* dst, size_t sz) { cudaMemcpy(src, dst, sz, cudaMemcpyHostToDevice); }); +} + +template +void deserialize_h2d(const uint8_t*& buffer, std::vector& v) +{ + deserialize(buffer, v, [](void* src, void* dst, size_t sz) { cudaMemcpy(src, dst, sz, cudaMemcpyHostToDevice); }); +} + +template +void deserialize_h2h(const uint8_t*& buffer, std::vector>& v) +{ + deserialize(buffer, v, std::memcpy); +} + +template +void deserialize_h2h(const uint8_t*& buffer, std::vector& v) +{ + deserialize(buffer, v, std::memcpy); +} + +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/models/bert_int8/BertINT8.cc b/src/fastertransformer/models/bert_int8/BertINT8.cc index f12489630..a13f054ef 100644 --- a/src/fastertransformer/models/bert_int8/BertINT8.cc +++ b/src/fastertransformer/models/bert_int8/BertINT8.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -126,7 +126,7 @@ template void BertINT8::allocateBuffer() { if (is_allocate_buffer_ == false) { - token_num_ = (size_t*)allocator_->reMalloc(token_num_, sizeof(size_t) * 1, false); + check_cuda_error(cudaMallocHost((void**)&h_pinned_token_num_ptr_, sizeof(size_t))); padding_offset_ = (int*)allocator_->reMalloc(padding_offset_, sizeof(int) * max_batch_size_ * max_seq_len_, false); trt_mha_padding_offset_ = @@ -147,7 +147,7 @@ template void BertINT8::freeBuffer() { if (is_allocate_buffer_ == true) { - allocator_->free((void**)(&token_num_)); + check_cuda_error(cudaFreeHost(h_pinned_token_num_ptr_)); allocator_->free((void**)(&padding_offset_)); allocator_->free((void**)(&trt_mha_padding_offset_)); @@ -187,8 +187,8 @@ void BertINT8::forward(std::vector* output_tens invokeBuildEncoderAttentionMask( attention_mask_, sequence_lengths, request_batch_size, request_seq_len, stream_); sync_check_cuda_error(); - invokeGetPaddingOffset(&h_token_num, - token_num_, + invokeGetPaddingOffset(h_pinned_token_num_ptr_, + &h_token_num, padding_offset_, sequence_lengths, request_batch_size, @@ -220,8 +220,8 @@ void BertINT8::forward(std::vector* output_tens break; } case AttentionType::FUSED_MHA: { - invokeGetPaddingOffset(&h_token_num, - token_num_, + invokeGetPaddingOffset(h_pinned_token_num_ptr_, + &h_token_num, padding_offset_, sequence_lengths, request_batch_size, diff --git a/src/fastertransformer/models/bert_int8/BertINT8.h b/src/fastertransformer/models/bert_int8/BertINT8.h index e70eba691..ab14bbe3a 100644 --- a/src/fastertransformer/models/bert_int8/BertINT8.h +++ b/src/fastertransformer/models/bert_int8/BertINT8.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -55,7 +55,7 @@ class BertINT8 { bool isValidSeqLen(size_t seq_len); protected: - size_t* token_num_; + size_t* h_pinned_token_num_ptr_; int* padding_offset_; int* trt_mha_padding_offset_; T* attention_mask_; diff --git a/src/fastertransformer/models/bert_int8/BertLayerINT8.cc b/src/fastertransformer/models/bert_int8/BertLayerINT8.cc index 15b33e825..473a43cd1 100644 --- a/src/fastertransformer/models/bert_int8/BertLayerINT8.cc +++ b/src/fastertransformer/models/bert_int8/BertLayerINT8.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/bert_int8/BertLayerINT8.h b/src/fastertransformer/models/bert_int8/BertLayerINT8.h index 21a44d713..c6e172f6e 100644 --- a/src/fastertransformer/models/bert_int8/BertLayerINT8.h +++ b/src/fastertransformer/models/bert_int8/BertLayerINT8.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/bert_int8/BertLayerINT8Weight.cc b/src/fastertransformer/models/bert_int8/BertLayerINT8Weight.cc new file mode 100644 index 000000000..34544eb97 --- /dev/null +++ b/src/fastertransformer/models/bert_int8/BertLayerINT8Weight.cc @@ -0,0 +1,221 @@ +/* + * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/models/bert_int8/BertLayerINT8Weight.h" + +namespace fastertransformer { + +template +BertLayerINT8Weight::BertLayerINT8Weight(const int hidden_units, const int inter_size): + hidden_units_(hidden_units), inter_size_(inter_size) +{ + + deviceMalloc(&weights_ptr[0], hidden_units_ * hidden_units_ * 3); // fuse kernel of qkv + deviceMalloc(&weights_ptr[1], hidden_units_ * 3); // fuse bias of qkv + deviceMalloc(&weights_ptr[2], hidden_units_ * hidden_units_); + deviceMalloc(&weights_ptr[3], hidden_units_); + deviceMalloc(&weights_ptr[4], hidden_units_); + deviceMalloc(&weights_ptr[5], hidden_units_); + deviceMalloc(&weights_ptr[6], hidden_units_ * inter_size_); + deviceMalloc(&weights_ptr[7], inter_size_); + deviceMalloc(&weights_ptr[8], inter_size_ * hidden_units_); + deviceMalloc(&weights_ptr[9], hidden_units_); + deviceMalloc(&weights_ptr[10], hidden_units_); + deviceMalloc(&weights_ptr[11], hidden_units_); + + scale_list_.size_ = ACTIVATION_AMAX_NUM + 9 * hidden_units + INT8O_GEMM_NUM + TRT_AMAX_NUM + SCALE_RESERVE_NUM; + scale_list_.p3_offset_ = ACTIVATION_AMAX_NUM + 9 * hidden_units; + scale_list_.p4_offset_ = ACTIVATION_AMAX_NUM + 9 * hidden_units + INT8O_GEMM_NUM; + deviceMalloc(&scale_list_ptr[0], scale_list_.size_); + scale_list_ptr[1] = (float*)malloc(sizeof(float) * scale_list_.size_); + + setWeightPtr(); +} + +template +BertLayerINT8Weight::~BertLayerINT8Weight() +{ + if (is_maintain_buffer == true) { + for (int i = 0; i < 12; i++) { + deviceFree(weights_ptr[i]); + } + + deviceFree(scale_list_ptr[0]); + free(scale_list_ptr[1]); + + attention_weights.query_weight.kernel = nullptr; + attention_weights.query_weight.bias = nullptr; + attention_weights.key_weight.kernel = nullptr; + attention_weights.key_weight.bias = nullptr; + attention_weights.value_weight.kernel = nullptr; + attention_weights.value_weight.bias = nullptr; + attention_weights.attention_output_weight.kernel = nullptr; + attention_weights.attention_output_weight.bias = nullptr; + attention_weights.scale_list_ptr = nullptr; + attn_layernorm_weights.gamma = nullptr; + attn_layernorm_weights.beta = nullptr; + ffn_weights.intermediate_weight.kernel = nullptr; + ffn_weights.intermediate_weight.bias = nullptr; + ffn_weights.output_weight.kernel = nullptr; + ffn_weights.output_weight.bias = nullptr; + ffn_weights.scale_list_ptr = nullptr; + ffn_layernorm_weights.gamma = nullptr; + ffn_layernorm_weights.beta = nullptr; + is_maintain_buffer = false; + } + if (is_maintain_sp_buffer == true) { + for (int i = 0; i < 6; i++) { + deviceFree(sp_weights_ptr[i]); + } + attention_weights.query_weight.sp_kernel = nullptr; + attention_weights.key_weight.sp_kernel = nullptr; + attention_weights.value_weight.sp_kernel = nullptr; + attention_weights.attention_output_weight.sp_kernel = nullptr; + ffn_weights.intermediate_weight.sp_kernel = nullptr; + ffn_weights.output_weight.sp_kernel = nullptr; + is_maintain_sp_buffer = false; + } +} + +template +BertLayerINT8Weight::BertLayerINT8Weight(const BertLayerINT8Weight& other): + hidden_units_(other.hidden_units_), inter_size_(other.inter_size_) +{ + deviceMalloc(&weights_ptr[0], hidden_units_ * hidden_units_ * 3); + cudaD2Dcpy(weights_ptr[0], other.weights_ptr[0], hidden_units_ * hidden_units_ * 3); + deviceMalloc(&weights_ptr[1], hidden_units_ * 3); + cudaD2Dcpy(weights_ptr[1], other.weights_ptr[1], hidden_units_ * 3); + deviceMalloc(&weights_ptr[2], hidden_units_ * hidden_units_); + cudaD2Dcpy(weights_ptr[2], other.weights_ptr[2], hidden_units_ * hidden_units_); + deviceMalloc(&weights_ptr[3], hidden_units_); + cudaD2Dcpy(weights_ptr[3], other.weights_ptr[3], hidden_units_); + deviceMalloc(&weights_ptr[4], hidden_units_); + cudaD2Dcpy(weights_ptr[4], other.weights_ptr[4], hidden_units_); + deviceMalloc(&weights_ptr[5], hidden_units_); + cudaD2Dcpy(weights_ptr[5], other.weights_ptr[5], hidden_units_); + deviceMalloc(&weights_ptr[6], hidden_units_ * inter_size_); + cudaD2Dcpy(weights_ptr[6], other.weights_ptr[6], hidden_units_ * inter_size_); + deviceMalloc(&weights_ptr[7], inter_size_); + cudaD2Dcpy(weights_ptr[7], other.weights_ptr[7], inter_size_); + deviceMalloc(&weights_ptr[8], inter_size_ * hidden_units_); + cudaD2Dcpy(weights_ptr[8], other.weights_ptr[8], inter_size_ * hidden_units_); + deviceMalloc(&weights_ptr[9], hidden_units_); + cudaD2Dcpy(weights_ptr[9], other.weights_ptr[9], hidden_units_); + deviceMalloc(&weights_ptr[10], hidden_units_); + cudaD2Dcpy(weights_ptr[10], other.weights_ptr[10], hidden_units_); + deviceMalloc(&weights_ptr[11], hidden_units_); + cudaD2Dcpy(weights_ptr[11], other.weights_ptr[11], hidden_units_); + + scale_list_.size_ = other.scale_list_.size_; + scale_list_.p3_offset_ = other.scale_list_.p3_offset_; + scale_list_.p4_offset_ = other.scale_list_.p4_offset_; + deviceMalloc(&scale_list_ptr[0], scale_list_.size_); + cudaD2Dcpy(scale_list_ptr[0], other.scale_list_ptr[0], scale_list_.size_); + scale_list_ptr[1] = (float*)malloc(sizeof(float) * scale_list_.size_); + memcpy(scale_list_ptr[1], other.scale_list_ptr[1], sizeof(float) * scale_list_.size_); + + setWeightPtr(); +} + +template +BertLayerINT8Weight& BertLayerINT8Weight::operator=(const BertLayerINT8Weight& other) +{ + + // to be confirmed， free buffer before = + /* + if (is_maintain_buffer) { + for(int i = 0; i < 16; i++) { + deviceFree(weights_ptr[i]); + } + deviceFree(scale_list_.d_scale_list_); + free(scale_list_.h_scale_list_); + } + */ + + hidden_units_ = other.hidden_units_; + inter_size_ = other.inter_size_; + deviceMalloc(&weights_ptr[0], hidden_units_ * hidden_units_ * 3); + cudaD2Dcpy(weights_ptr[0], other.weights_ptr[0], hidden_units_ * hidden_units_ * 3); + deviceMalloc(&weights_ptr[1], hidden_units_ * 3); + cudaD2Dcpy(weights_ptr[1], other.weights_ptr[1], hidden_units_ * 3); + deviceMalloc(&weights_ptr[2], hidden_units_ * hidden_units_); + cudaD2Dcpy(weights_ptr[2], other.weights_ptr[2], hidden_units_ * hidden_units_); + deviceMalloc(&weights_ptr[3], hidden_units_); + cudaD2Dcpy(weights_ptr[3], other.weights_ptr[3], hidden_units_); + deviceMalloc(&weights_ptr[4], hidden_units_); + cudaD2Dcpy(weights_ptr[4], other.weights_ptr[4], hidden_units_); + deviceMalloc(&weights_ptr[5], hidden_units_); + cudaD2Dcpy(weights_ptr[5], other.weights_ptr[5], hidden_units_); + deviceMalloc(&weights_ptr[6], hidden_units_ * inter_size_); + cudaD2Dcpy(weights_ptr[6], other.weights_ptr[6], hidden_units_ * inter_size_); + deviceMalloc(&weights_ptr[7], inter_size_); + cudaD2Dcpy(weights_ptr[7], other.weights_ptr[7], inter_size_); + deviceMalloc(&weights_ptr[8], inter_size_ * hidden_units_); + cudaD2Dcpy(weights_ptr[8], other.weights_ptr[8], inter_size_ * hidden_units_); + deviceMalloc(&weights_ptr[9], hidden_units_); + cudaD2Dcpy(weights_ptr[9], other.weights_ptr[9], hidden_units_); + deviceMalloc(&weights_ptr[10], hidden_units_); + cudaD2Dcpy(weights_ptr[10], other.weights_ptr[10], hidden_units_); + deviceMalloc(&weights_ptr[11], hidden_units_); + cudaD2Dcpy(weights_ptr[11], other.weights_ptr[11], hidden_units_); + + scale_list_.size_ = other.scale_list_.size_; + scale_list_.p3_offset_ = other.scale_list_.p3_offset_; + scale_list_.p4_offset_ = other.scale_list_.p4_offset_; + deviceMalloc(&scale_list_ptr[0], scale_list_.size_); + cudaD2Dcpy(scale_list_ptr[0], other.scale_list_ptr[0], scale_list_.size_); + scale_list_ptr[1] = (float*)malloc(sizeof(float) * scale_list_.size_); + memcpy(scale_list_ptr[1], other.scale_list_ptr[1], sizeof(float) * scale_list_.size_); + + setWeightPtr(); + return *this; +} + +template +void BertLayerINT8Weight::setWeightPtr() +{ + attention_weights.query_weight.kernel = weights_ptr[0]; + attention_weights.query_weight.bias = weights_ptr[1]; + attention_weights.key_weight.kernel = weights_ptr[0] + hidden_units_ * hidden_units_; + attention_weights.key_weight.bias = weights_ptr[1] + hidden_units_; + attention_weights.value_weight.kernel = weights_ptr[0] + hidden_units_ * hidden_units_ * 2; + attention_weights.value_weight.bias = weights_ptr[1] + hidden_units_ * 2; + attention_weights.attention_output_weight.kernel = weights_ptr[2]; + attention_weights.attention_output_weight.bias = weights_ptr[3]; + attn_layernorm_weights.gamma = weights_ptr[4]; + attn_layernorm_weights.beta = weights_ptr[5]; + ffn_weights.intermediate_weight.kernel = weights_ptr[6]; + ffn_weights.intermediate_weight.bias = weights_ptr[7]; + ffn_weights.output_weight.kernel = weights_ptr[8]; + ffn_weights.output_weight.bias = weights_ptr[9]; + ffn_layernorm_weights.gamma = weights_ptr[10]; + ffn_layernorm_weights.beta = weights_ptr[11]; + + scale_list_.d_scale_list_ = scale_list_ptr[0]; + scale_list_.h_scale_list_ = scale_list_ptr[1]; + attention_weights.scale_list_ptr = &scale_list_; + ffn_weights.scale_list_ptr = &scale_list_; + + is_maintain_buffer = true; +} + +template struct BertLayerINT8Weight; +template struct BertLayerINT8Weight; +#ifdef ENABLE_BF16 +template struct BertLayerINT8Weight<__nv_bfloat16>; +#endif + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/bert_int8/BertLayerINT8Weight.h b/src/fastertransformer/models/bert_int8/BertLayerINT8Weight.h index 5e9fa5d30..30b51035b 100644 --- a/src/fastertransformer/models/bert_int8/BertLayerINT8Weight.h +++ b/src/fastertransformer/models/bert_int8/BertLayerINT8Weight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -27,166 +27,10 @@ template struct BertLayerINT8Weight: BertLayerWeight { BertLayerINT8Weight() = default; - BertLayerINT8Weight(const int hidden_units, const int inter_size): - hidden_units_(hidden_units), inter_size_(inter_size) - { - - deviceMalloc(&weights_ptr[0], hidden_units_ * hidden_units_ * 3); // fuse kernel of qkv - deviceMalloc(&weights_ptr[1], hidden_units_ * 3); // fuse bias of qkv - deviceMalloc(&weights_ptr[2], hidden_units_ * hidden_units_); - deviceMalloc(&weights_ptr[3], hidden_units_); - deviceMalloc(&weights_ptr[4], hidden_units_); - deviceMalloc(&weights_ptr[5], hidden_units_); - deviceMalloc(&weights_ptr[6], hidden_units_ * inter_size_); - deviceMalloc(&weights_ptr[7], inter_size_); - deviceMalloc(&weights_ptr[8], inter_size_ * hidden_units_); - deviceMalloc(&weights_ptr[9], hidden_units_); - deviceMalloc(&weights_ptr[10], hidden_units_); - deviceMalloc(&weights_ptr[11], hidden_units_); - - scale_list_.size_ = ACTIVATION_AMAX_NUM + 9 * hidden_units + INT8O_GEMM_NUM + TRT_AMAX_NUM + SCALE_RESERVE_NUM; - scale_list_.p3_offset_ = ACTIVATION_AMAX_NUM + 9 * hidden_units; - scale_list_.p4_offset_ = ACTIVATION_AMAX_NUM + 9 * hidden_units + INT8O_GEMM_NUM; - deviceMalloc(&scale_list_ptr[0], scale_list_.size_); - scale_list_ptr[1] = (float*)malloc(sizeof(float) * scale_list_.size_); - - setWeightPtr(); - } - - ~BertLayerINT8Weight() - { - if (is_maintain_buffer == true) { - for (int i = 0; i < 12; i++) { - deviceFree(weights_ptr[i]); - } - - deviceFree(scale_list_ptr[0]); - free(scale_list_ptr[1]); - - attention_weights.query_weight.kernel = nullptr; - attention_weights.query_weight.bias = nullptr; - attention_weights.key_weight.kernel = nullptr; - attention_weights.key_weight.bias = nullptr; - attention_weights.value_weight.kernel = nullptr; - attention_weights.value_weight.bias = nullptr; - attention_weights.attention_output_weight.kernel = nullptr; - attention_weights.attention_output_weight.bias = nullptr; - attention_weights.scale_list_ptr = nullptr; - attn_layernorm_weights.gamma = nullptr; - attn_layernorm_weights.beta = nullptr; - ffn_weights.intermediate_weight.kernel = nullptr; - ffn_weights.intermediate_weight.bias = nullptr; - ffn_weights.output_weight.kernel = nullptr; - ffn_weights.output_weight.bias = nullptr; - ffn_weights.scale_list_ptr = nullptr; - ffn_layernorm_weights.gamma = nullptr; - ffn_layernorm_weights.beta = nullptr; - is_maintain_buffer = false; - } - if (is_maintain_sp_buffer == true) { - for (int i = 0; i < 6; i++) { - deviceFree(sp_weights_ptr[i]); - } - attention_weights.query_weight.sp_kernel = nullptr; - attention_weights.key_weight.sp_kernel = nullptr; - attention_weights.value_weight.sp_kernel = nullptr; - attention_weights.attention_output_weight.sp_kernel = nullptr; - ffn_weights.intermediate_weight.sp_kernel = nullptr; - ffn_weights.output_weight.sp_kernel = nullptr; - is_maintain_sp_buffer = false; - } - } - - BertLayerINT8Weight(const BertLayerINT8Weight& other): - hidden_units_(other.hidden_units_), inter_size_(other.inter_size_) - { - deviceMalloc(&weights_ptr[0], hidden_units_ * hidden_units_ * 3); - cudaD2Dcpy(weights_ptr[0], other.weights_ptr[0], hidden_units_ * hidden_units_ * 3); - deviceMalloc(&weights_ptr[1], hidden_units_ * 3); - cudaD2Dcpy(weights_ptr[1], other.weights_ptr[1], hidden_units_ * 3); - deviceMalloc(&weights_ptr[2], hidden_units_ * hidden_units_); - cudaD2Dcpy(weights_ptr[2], other.weights_ptr[2], hidden_units_ * hidden_units_); - deviceMalloc(&weights_ptr[3], hidden_units_); - cudaD2Dcpy(weights_ptr[3], other.weights_ptr[3], hidden_units_); - deviceMalloc(&weights_ptr[4], hidden_units_); - cudaD2Dcpy(weights_ptr[4], other.weights_ptr[4], hidden_units_); - deviceMalloc(&weights_ptr[5], hidden_units_); - cudaD2Dcpy(weights_ptr[5], other.weights_ptr[5], hidden_units_); - deviceMalloc(&weights_ptr[6], hidden_units_ * inter_size_); - cudaD2Dcpy(weights_ptr[6], other.weights_ptr[6], hidden_units_ * inter_size_); - deviceMalloc(&weights_ptr[7], inter_size_); - cudaD2Dcpy(weights_ptr[7], other.weights_ptr[7], inter_size_); - deviceMalloc(&weights_ptr[8], inter_size_ * hidden_units_); - cudaD2Dcpy(weights_ptr[8], other.weights_ptr[8], inter_size_ * hidden_units_); - deviceMalloc(&weights_ptr[9], hidden_units_); - cudaD2Dcpy(weights_ptr[9], other.weights_ptr[9], hidden_units_); - deviceMalloc(&weights_ptr[10], hidden_units_); - cudaD2Dcpy(weights_ptr[10], other.weights_ptr[10], hidden_units_); - deviceMalloc(&weights_ptr[11], hidden_units_); - cudaD2Dcpy(weights_ptr[11], other.weights_ptr[11], hidden_units_); - - scale_list_.size_ = other.scale_list_.size_; - scale_list_.p3_offset_ = other.scale_list_.p3_offset_; - scale_list_.p4_offset_ = other.scale_list_.p4_offset_; - deviceMalloc(&scale_list_ptr[0], scale_list_.size_); - cudaD2Dcpy(scale_list_ptr[0], other.scale_list_ptr[0], scale_list_.size_); - scale_list_ptr[1] = (float*)malloc(sizeof(float) * scale_list_.size_); - memcpy(scale_list_ptr[1], other.scale_list_ptr[1], sizeof(float) * scale_list_.size_); - - setWeightPtr(); - } - - BertLayerINT8Weight& operator=(const BertLayerINT8Weight& other) - { - - // to be confirmed， free buffer before = - /* - if (is_maintain_buffer) { - for(int i = 0; i < 16; i++) { - deviceFree(weights_ptr[i]); - } - deviceFree(scale_list_.d_scale_list_); - free(scale_list_.h_scale_list_); - } - */ - - hidden_units_ = other.hidden_units_; - inter_size_ = other.inter_size_; - deviceMalloc(&weights_ptr[0], hidden_units_ * hidden_units_ * 3); - cudaD2Dcpy(weights_ptr[0], other.weights_ptr[0], hidden_units_ * hidden_units_ * 3); - deviceMalloc(&weights_ptr[1], hidden_units_ * 3); - cudaD2Dcpy(weights_ptr[1], other.weights_ptr[1], hidden_units_ * 3); - deviceMalloc(&weights_ptr[2], hidden_units_ * hidden_units_); - cudaD2Dcpy(weights_ptr[2], other.weights_ptr[2], hidden_units_ * hidden_units_); - deviceMalloc(&weights_ptr[3], hidden_units_); - cudaD2Dcpy(weights_ptr[3], other.weights_ptr[3], hidden_units_); - deviceMalloc(&weights_ptr[4], hidden_units_); - cudaD2Dcpy(weights_ptr[4], other.weights_ptr[4], hidden_units_); - deviceMalloc(&weights_ptr[5], hidden_units_); - cudaD2Dcpy(weights_ptr[5], other.weights_ptr[5], hidden_units_); - deviceMalloc(&weights_ptr[6], hidden_units_ * inter_size_); - cudaD2Dcpy(weights_ptr[6], other.weights_ptr[6], hidden_units_ * inter_size_); - deviceMalloc(&weights_ptr[7], inter_size_); - cudaD2Dcpy(weights_ptr[7], other.weights_ptr[7], inter_size_); - deviceMalloc(&weights_ptr[8], inter_size_ * hidden_units_); - cudaD2Dcpy(weights_ptr[8], other.weights_ptr[8], inter_size_ * hidden_units_); - deviceMalloc(&weights_ptr[9], hidden_units_); - cudaD2Dcpy(weights_ptr[9], other.weights_ptr[9], hidden_units_); - deviceMalloc(&weights_ptr[10], hidden_units_); - cudaD2Dcpy(weights_ptr[10], other.weights_ptr[10], hidden_units_); - deviceMalloc(&weights_ptr[11], hidden_units_); - cudaD2Dcpy(weights_ptr[11], other.weights_ptr[11], hidden_units_); - - scale_list_.size_ = other.scale_list_.size_; - scale_list_.p3_offset_ = other.scale_list_.p3_offset_; - scale_list_.p4_offset_ = other.scale_list_.p4_offset_; - deviceMalloc(&scale_list_ptr[0], scale_list_.size_); - cudaD2Dcpy(scale_list_ptr[0], other.scale_list_ptr[0], scale_list_.size_); - scale_list_ptr[1] = (float*)malloc(sizeof(float) * scale_list_.size_); - memcpy(scale_list_ptr[1], other.scale_list_ptr[1], sizeof(float) * scale_list_.size_); - - setWeightPtr(); - } + BertLayerINT8Weight(const int hidden_units, const int inter_size); + ~BertLayerINT8Weight(); + BertLayerINT8Weight(const BertLayerINT8Weight& other); + BertLayerINT8Weight& operator=(const BertLayerINT8Weight& other); LayerNormWeight attn_layernorm_weights; LayerNormWeight ffn_layernorm_weights; @@ -195,32 +39,7 @@ struct BertLayerINT8Weight: BertLayerWeight { ScaleList scale_list_; private: - void setWeightPtr() - { - attention_weights.query_weight.kernel = weights_ptr[0]; - attention_weights.query_weight.bias = weights_ptr[1]; - attention_weights.key_weight.kernel = weights_ptr[0] + hidden_units_ * hidden_units_; - attention_weights.key_weight.bias = weights_ptr[1] + hidden_units_; - attention_weights.value_weight.kernel = weights_ptr[0] + hidden_units_ * hidden_units_ * 2; - attention_weights.value_weight.bias = weights_ptr[1] + hidden_units_ * 2; - attention_weights.attention_output_weight.kernel = weights_ptr[2]; - attention_weights.attention_output_weight.bias = weights_ptr[3]; - attn_layernorm_weights.gamma = weights_ptr[4]; - attn_layernorm_weights.beta = weights_ptr[5]; - ffn_weights.intermediate_weight.kernel = weights_ptr[6]; - ffn_weights.intermediate_weight.bias = weights_ptr[7]; - ffn_weights.output_weight.kernel = weights_ptr[8]; - ffn_weights.output_weight.bias = weights_ptr[9]; - ffn_layernorm_weights.gamma = weights_ptr[10]; - ffn_layernorm_weights.beta = weights_ptr[11]; - - scale_list_.d_scale_list_ = scale_list_ptr[0]; - scale_list_.h_scale_list_ = scale_list_ptr[1]; - attention_weights.scale_list_ptr = &scale_list_; - ffn_weights.scale_list_ptr = &scale_list_; - - is_maintain_buffer = true; - } + void setWeightPtr(); int hidden_units_; int inter_size_; diff --git a/src/fastertransformer/models/bert_int8/CMakeLists.txt b/src/fastertransformer/models/bert_int8/CMakeLists.txt index 42baeb5e0..d1f96c29d 100644 --- a/src/fastertransformer/models/bert_int8/CMakeLists.txt +++ b/src/fastertransformer/models/bert_int8/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -14,12 +14,19 @@ cmake_minimum_required(VERSION 3.8) + +add_library(BertLayerINT8Weight STATIC BertLayerINT8Weight.cc) +set_property(TARGET BertLayerINT8Weight PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET BertLayerINT8Weight PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(BertLayerINT8Weight PUBLIC -lcublasLt -lcublas -lcudart -lcurand cublasMMWrapper + cublasINT8MMWrapper BertLayerWeight) + add_library(BertLayerINT8 STATIC BertLayerINT8.cc) set_property(TARGET BertLayerINT8 PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET BertLayerINT8 PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) target_link_libraries(BertLayerINT8 PUBLIC -lcublasLt -lcublas -lcudart -lcurand cublasMMWrapper cublasINT8MMWrapper UnfusedAttentionLayerINT8 FusedAttentionLayerINT8 - FfnLayerINT8 layernorm_int8_kernels + FfnLayerINT8 layernorm_int8_kernels BertLayerINT8Weight layout_transformer_int8_kernels quantization_int8_kernels nvtx_utils tensor cuda_utils logger) add_library(BertINT8 STATIC BertINT8.cc) diff --git a/src/fastertransformer/models/deberta/CMakeLists.txt b/src/fastertransformer/models/deberta/CMakeLists.txt new file mode 100644 index 000000000..cd8962eff --- /dev/null +++ b/src/fastertransformer/models/deberta/CMakeLists.txt @@ -0,0 +1,30 @@ +# Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +cmake_minimum_required(VERSION 3.8) + +add_library(DebertaLayerWeight STATIC DebertaLayerWeight.cc) +set_property(TARGET DebertaLayerWeight PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET DebertaLayerWeight PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(DebertaLayerWeight PUBLIC memory_utils) + +add_library(DebertaWeight STATIC DebertaWeight.cc) +set_property(TARGET DebertaWeight PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET DebertaWeight PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(DebertaWeight PUBLIC DebertaLayerWeight) + +add_library(Deberta STATIC Deberta.cc) +set_property(TARGET Deberta PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET Deberta PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(Deberta PUBLIC -lcudart bert_preprocess_kernels gpt_kernels layernorm_kernels cublasMMWrapper TensorParallelDisentangledAttentionLayer TensorParallelGeluFfnLayer TensorParallelReluFfnLayer add_residual_kernels DebertaWeight nccl_utils custom_ar_comm tensor cuda_utils logger) diff --git a/src/fastertransformer/models/deberta/Deberta.cc b/src/fastertransformer/models/deberta/Deberta.cc new file mode 100644 index 000000000..42c90456b --- /dev/null +++ b/src/fastertransformer/models/deberta/Deberta.cc @@ -0,0 +1,617 @@ +/* + * Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/models/deberta/Deberta.h" +#include "src/fastertransformer/kernels/add_residual_kernels.h" + +namespace fastertransformer { + +template +void Deberta::initialize() +{ + disentangled_attention_layer_ = + new TensorParallelDisentangledAttentionLayer(0, + 0, + head_num_ / tensor_para_.world_size_, + size_per_head_, + relative_position_buckets_, + head_num_ * size_per_head_, + q_scaling_, + tensor_para_, + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + sparse_, + custom_all_reduce_comm_, + enable_custom_all_reduce_); + + bool use_gated_activation = activation_type_ == ActivationType::GeGLU || activation_type_ == ActivationType::ReGLU; + if (activation_type_ == ActivationType::Gelu) { + ffn_layer_ = new TensorParallelGeluFfnLayer(0, + 0, + head_num_, + size_per_head_, + 0, // expert_num + inter_size_, + tensor_para_, + stream_, + cublas_wrapper_, + allocator_, + true, + is_free_buffer_after_forward_, + sparse_, + 0, + use_gated_activation, + custom_all_reduce_comm_, + enable_custom_all_reduce_); + } + else if (activation_type_ == ActivationType::Relu) { + ffn_layer_ = new TensorParallelReluFfnLayer(0, + 0, + head_num_, + size_per_head_, + 0, // expert_num + inter_size_, + tensor_para_, + stream_, + cublas_wrapper_, + allocator_, + true, + is_free_buffer_after_forward_, + sparse_, + 0, + use_gated_activation, + custom_all_reduce_comm_, + enable_custom_all_reduce_); + } +} + +template +Deberta::Deberta(size_t max_batch_size, + size_t max_seq_len, + size_t head_num, + size_t size_per_head, + size_t max_relative_positions, + size_t relative_position_buckets, + size_t inter_size, + size_t num_layer, + float q_scaling, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool sparse, + ActivationType activation_type, + LayerNormType layernorm_type, + NcclParam tensor_para, + NcclParam pipeline_para, + std::shared_ptr custom_all_reduce_comm, + bool enable_custom_all_reduce): + BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward), + head_num_(head_num), + size_per_head_(size_per_head), + max_relative_positions_(max_relative_positions), + relative_position_buckets_(relative_position_buckets), + inter_size_(inter_size), + hidden_units_(head_num_ * size_per_head_), + num_layer_(num_layer), + q_scaling_(q_scaling), + sparse_(sparse), + activation_type_(activation_type), + layernorm_type_(layernorm_type), + tensor_para_(tensor_para), + pipeline_para_(pipeline_para), + custom_all_reduce_comm_(custom_all_reduce_comm), + enable_custom_all_reduce_(enable_custom_all_reduce) +{ + initialize(); +} + +template +Deberta::Deberta(size_t max_batch_size, + size_t max_seq_len, + size_t head_num, + size_t size_per_head, + size_t max_relative_positions, + size_t relative_position_buckets, + size_t inter_size, + size_t num_layer, + float q_scaling, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool sparse, + ActivationType activation_type, + LayerNormType layernorm_type): + Deberta(max_batch_size, + max_seq_len, + head_num, + size_per_head, + max_relative_positions, + relative_position_buckets, + inter_size, + num_layer, + q_scaling, + stream, + cublas_wrapper, + allocator, + is_free_buffer_after_forward, + sparse, + activation_type, + layernorm_type, + NcclParam(0, 1), + NcclParam(0, 1), + nullptr, + false) +{ +} + +template +Deberta::Deberta(Deberta const& deberta): + Deberta(0, + 0, + deberta.head_num_, + deberta.size_per_head_, + deberta.max_relative_positions_, + deberta.relative_position_buckets_, + deberta.inter_size_, + deberta.num_layer_, + deberta.q_scaling_, + deberta.stream_, + deberta.cublas_wrapper_, + deberta.allocator_, + deberta.is_free_buffer_after_forward_, + deberta.sparse_, + deberta.activation_type_, + deberta.layernorm_type_, + deberta.tensor_para_, + deberta.pipeline_para_, + deberta.custom_all_reduce_comm_, + deberta.enable_custom_all_reduce_) +{ +} + +template +Deberta::~Deberta() +{ + delete disentangled_attention_layer_; + delete ffn_layer_; + freeBuffer(); +} + +template +void Deberta::allocateBuffer() +{ + FT_CHECK(false); +} + +template +void Deberta::allocateBuffer(size_t batch_size, size_t seq_len) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + if (!is_allocate_buffer_) { + check_cuda_error(cudaMallocHost((void**)&h_pinned_token_num_ptr_, sizeof(size_t))); + } + padding_offset_ = (int*)allocator_->reMalloc(padding_offset_, sizeof(int) * batch_size * seq_len, false); + attention_mask_ = (T*)allocator_->reMalloc(attention_mask_, sizeof(T) * batch_size * seq_len * seq_len, false); + + deberta_emb_buf_ = + (T*)allocator_->reMalloc(deberta_emb_buf_, sizeof(T) * batch_size * seq_len * hidden_units_, false); + deberta_rel_emb_buf_ = (T*)allocator_->reMalloc( + deberta_rel_emb_buf_, + sizeof(T) * (relative_position_buckets_ > 0 ? relative_position_buckets_ * 2 : max_relative_positions_ * 2) + * hidden_units_, + false); + deberta_in_buffer_ = + (T*)allocator_->reMalloc(deberta_in_buffer_, sizeof(T) * batch_size * seq_len * hidden_units_, false); + attn_out_buf_ = (T*)allocator_->reMalloc(attn_out_buf_, sizeof(T) * batch_size * seq_len * hidden_units_, false); + deberta_out_buffer_ = + (T*)allocator_->reMalloc(deberta_out_buffer_, sizeof(T) * batch_size * seq_len * hidden_units_, false); + + if (layernorm_type_ == LayerNormType::post_layernorm) { + normed_from_tensor_ = nullptr; + normed_attn_out_buf_ = nullptr; + } + else { + normed_from_tensor_ = + (T*)allocator_->reMalloc(normed_from_tensor_, sizeof(T) * batch_size * seq_len * hidden_units_, false); + normed_attn_out_buf_ = + (T*)allocator_->reMalloc(normed_attn_out_buf_, sizeof(T) * batch_size * seq_len * hidden_units_, false); + } + is_allocate_buffer_ = true; +} + +template +void Deberta::freeBuffer() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + if (is_allocate_buffer_) { + check_cuda_error(cudaFreeHost(h_pinned_token_num_ptr_)); + allocator_->free((void**)(&padding_offset_)); + allocator_->free((void**)(&attention_mask_)); + allocator_->free((void**)(&deberta_emb_buf_)); + allocator_->free((void**)(&deberta_rel_emb_buf_)); + allocator_->free((void**)(&deberta_in_buffer_)); + allocator_->free((void**)(&attn_out_buf_)); + allocator_->free((void**)(&deberta_out_buffer_)); + + if (layernorm_type_ == LayerNormType::post_layernorm) { + normed_from_tensor_ = nullptr; + normed_attn_out_buf_ = nullptr; + } + else { + allocator_->free((void**)(&normed_from_tensor_)); + allocator_->free((void**)(&normed_attn_out_buf_)); + } + is_allocate_buffer_ = false; + } +} + +template +bool Deberta::isValidLayerParallelId(uint l) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return l < num_layer_ && (l >= local_num_layer * pipeline_para_.rank_) + && (l < local_num_layer * (pipeline_para_.rank_ + 1)); +} + +template +bool Deberta::isFirstLayerParallelId(uint l) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return l < num_layer_ && (l == local_num_layer * pipeline_para_.rank_); +} + +template +bool Deberta::isLastLayerParallelId(uint l) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return l < num_layer_ && (l == local_num_layer * (pipeline_para_.rank_ + 1) - 1); +} + +template +int Deberta::getFirstLayerParallelId() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return local_num_layer * pipeline_para_.rank_; +} + +template +void Deberta::forward(std::vector* output_tensors, + const std::vector* input_tensors, + const DebertaWeight* deberta_weights) +{ + TensorMap input_tensors_map = + TensorMap({{"input_ids", input_tensors->at(0)}, {"sequence_lengths", input_tensors->at(1)}}); + TensorMap output_tensors_map = TensorMap({{"output_hidden_state", output_tensors->at(0)}}); + forward(&output_tensors_map, &input_tensors_map, deberta_weights); +} + +template +void Deberta::forward(TensorMap* output_tensors, TensorMap* input_tensors, const DebertaWeight* deberta_weights) +{ + // input_tensors: + // input_ids [batch, seqlen] + // sequence_lengths [batch] + // output tensors: + // output_hidden_state [batch, seqlen, hidden] + + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + FT_CHECK(input_tensors->size() == 2); + const size_t request_batch_size = input_tensors->at("input_ids").shape[0]; + const size_t request_seq_len = input_tensors->at("input_ids").shape[1]; + FT_CHECK(input_tensors->at("input_ids").shape.size() == 2); + FT_CHECK(input_tensors->at("sequence_lengths").shape.size() == 1); + FT_CHECK(request_batch_size == input_tensors->at("sequence_lengths").shape[0]); + allocateBuffer(request_batch_size, request_seq_len); + + const int* sequence_lengths = input_tensors->at("sequence_lengths").getPtr(); + + DataType data_type = getTensorType(); + const size_t local_batch_size = getLocalBatchSize(request_batch_size, request_seq_len, pipeline_para_.world_size_); + FT_CHECK(request_batch_size % local_batch_size == 0); + const size_t iteration_num = request_batch_size / local_batch_size; + + for (uint ite = 0; ite < iteration_num; ite++) { + Tensor* padding_offset_tensor_ptr = nullptr; + size_t id_offset = ite * local_batch_size; + const size_t hidden_offset = ite * local_batch_size * request_seq_len * hidden_units_; + size_t h_token_num = 0; + + T* deberta_input_ptr; + T* deberta_rel_embedding_input_ptr; + T* deberta_output_ptr; + + // Word embedding layer [batch_size, seq_len] --> [batch_size, seq_len, hidden_size] + invokeInputIdsEmbeddingLookupPosEncoding( + deberta_emb_buf_, + nullptr, + deberta_weights->word_embedding_table, + (T*)nullptr, // word embedding only, position embedding was replaced by relative embedding design in + // DeBERTa + pPromptTuningParam{}, + input_tensors->at("input_ids").getPtrWithOffset(id_offset * request_seq_len), + 1, + request_seq_len, + request_seq_len, + local_batch_size, + hidden_units_, + stream_); + sync_check_cuda_error(); + + // Relative embedding layer (a learned weight matrix [relative_position_buckets*2, hidden_size] followed by a + // LayerNorm. It will then be passed to each disentangled attention layer and serve as an input for QKV + // calculation. Therefore, disentangled attention attends on hidden states & relataive embeddings) + invokeGeneralLayerNorm(deberta_rel_emb_buf_, + deberta_weights->relative_embedding_table, + deberta_weights->relative_embedding_layernorm_weights.gamma, + deberta_weights->relative_embedding_layernorm_weights.beta, + layernorm_eps_, + relative_position_buckets_ > 0 ? relative_position_buckets_ * 2 : + max_relative_positions_ * 2, + hidden_units_, + (float*)nullptr, + 0, + stream_); + sync_check_cuda_error(); + + //// Padding removal + // build attention mask from seq len + invokeBuildEncoderAttentionMask( + attention_mask_, + input_tensors->at("sequence_lengths").getPtrWithOffset(ite * local_batch_size), + local_batch_size, + request_seq_len, + stream_); + sync_check_cuda_error(); + + // compute cumulative number of word tokens & padded tokens + invokeGetPaddingOffset(h_pinned_token_num_ptr_, + &h_token_num, + padding_offset_, + input_tensors->at("sequence_lengths").getPtrWithOffset(ite * local_batch_size), + local_batch_size, + request_seq_len, + stream_); + + // full input embeddings --> padding-entries-removed input embeddings + invokeRemovePadding( + deberta_in_buffer_, deberta_emb_buf_, padding_offset_, h_token_num, head_num_ * size_per_head_, stream_); + sync_check_cuda_error(); + + padding_offset_tensor_ptr = + new Tensor(MEMORY_GPU, TYPE_INT32, std::vector{h_token_num}, padding_offset_); + //// Padding removal done + + // LayerNorm on word embeddings (do this after padding removing is better) + invokeGeneralLayerNorm(deberta_in_buffer_, + deberta_in_buffer_, + deberta_weights->word_embedding_layernorm_weights.gamma, + deberta_weights->word_embedding_layernorm_weights.beta, + layernorm_eps_, + h_token_num, + hidden_units_, + (float*)nullptr, + 0, + stream_); + + deberta_input_ptr = deberta_in_buffer_; + deberta_output_ptr = deberta_out_buffer_; + deberta_rel_embedding_input_ptr = deberta_rel_emb_buf_; + sync_check_cuda_error(); + + // Encoder layers + for (uint l = 0; l < num_layer_; l++) { + if (!isValidLayerParallelId(l)) { + continue; + } + T* from_tensor = l == 0 ? deberta_input_ptr : deberta_output_ptr; + T* out_tensor = deberta_output_ptr; + const DebertaLayerWeight& layer_weight = deberta_weights->deberta_layer_weights[l]; + + if (isFirstLayerParallelId(l) && pipeline_para_.rank_ != 0 && pipeline_para_.world_size_ > 1) { + ftNcclRecv(from_tensor + h_token_num * hidden_units_ / tensor_para_.world_size_ * tensor_para_.rank_, + h_token_num * hidden_units_ / tensor_para_.world_size_, + pipeline_para_.rank_ - 1, + pipeline_para_, + stream_); + if (tensor_para_.world_size_ > 1) { + ftNcclAllGather(from_tensor, + from_tensor, + h_token_num * hidden_units_ / tensor_para_.world_size_, + tensor_para_.rank_, + tensor_para_, + stream_); + } + } + if (layernorm_type_ == LayerNormType::pre_layernorm) { + invokeGeneralLayerNorm(normed_from_tensor_, + from_tensor, + layer_weight.attn_layernorm_weights.gamma, + layer_weight.attn_layernorm_weights.beta, + layernorm_eps_, + h_token_num, + hidden_units_, + (float*)nullptr, + 0, + stream_); + sync_check_cuda_error(); + } + + // Attention + { + TensorMap attn_input_tensors{ + {"input_query", + Tensor{MEMORY_GPU, + data_type, + std::vector{h_token_num, hidden_units_}, + layernorm_type_ == LayerNormType::pre_layernorm ? normed_from_tensor_ : from_tensor}}, + {"attention_mask", + Tensor{MEMORY_GPU, + data_type, + std::vector{local_batch_size, 1, request_seq_len, request_seq_len}, + attention_mask_}}, + {"relative_embeddings", + Tensor{MEMORY_GPU, + data_type, + std::vector{relative_position_buckets_ * 2, hidden_units_}, + deberta_rel_embedding_input_ptr}}}; + attn_input_tensors.insertIfValid("padding_offset", *padding_offset_tensor_ptr); + + TensorMap attn_output_tensors{ + {"hidden_features", + Tensor{MEMORY_GPU, data_type, std::vector{h_token_num, hidden_units_}, attn_out_buf_}}}; + + disentangled_attention_layer_->forward( + &attn_output_tensors, &attn_input_tensors, &layer_weight.attention_weights); + } + + if (layernorm_type_ == LayerNormType::post_layernorm) { + invokeAddBiasResidualLayerNorm(attn_out_buf_, + from_tensor, + layer_weight.attention_weights.attention_output_weight.bias, + layer_weight.attn_layernorm_weights.gamma, + layer_weight.attn_layernorm_weights.beta, + layernorm_eps_, + h_token_num, + hidden_units_, + stream_); + } + else if (layernorm_type_ == LayerNormType::pre_layernorm) { + invokeGeneralAddBiasResidualPreLayerNorm(attn_out_buf_, + normed_attn_out_buf_, + attn_out_buf_, + from_tensor, + layer_weight.ffn_layernorm_weights.gamma, + layer_weight.ffn_layernorm_weights.beta, + layer_weight.attention_weights.attention_output_weight.bias, + layernorm_eps_, + h_token_num, + hidden_units_, + (float*)nullptr, + (float*)nullptr, + (float*)nullptr, + (float*)nullptr, + 0, + stream_); + } + sync_check_cuda_error(); + + // FFN (Intermediate + Output) + { + TensorMap ffn_input_tensors( + {{"ffn_input", + Tensor{MEMORY_GPU, + data_type, + std::vector{h_token_num, hidden_units_}, + layernorm_type_ == LayerNormType::pre_layernorm ? normed_attn_out_buf_ : attn_out_buf_}}}); + TensorMap ffn_output_tensors( + {{"ffn_output", + Tensor{MEMORY_GPU, data_type, std::vector{h_token_num, hidden_units_}, out_tensor}}}); + ffn_layer_->forward(&ffn_output_tensors, &ffn_input_tensors, &layer_weight.ffn_weights); + } + + if (layernorm_type_ == LayerNormType::post_layernorm) { + invokeAddBiasResidualLayerNorm(out_tensor, + attn_out_buf_, + layer_weight.ffn_weights.output_weight.bias, + layer_weight.ffn_layernorm_weights.gamma, + layer_weight.ffn_layernorm_weights.beta, + layernorm_eps_, + h_token_num, + hidden_units_, + stream_); + } + else if (layernorm_type_ == LayerNormType::pre_layernorm) { + invokeAddBiasResidual(out_tensor, + attn_out_buf_, + layer_weight.ffn_weights.output_weight.bias, + h_token_num, + hidden_units_, + stream_); + } + sync_check_cuda_error(); + + if (isLastLayerParallelId(l) && pipeline_para_.rank_ != pipeline_para_.world_size_ - 1 + && pipeline_para_.world_size_ > 1) { + + ftNcclSend(out_tensor + h_token_num * hidden_units_ / tensor_para_.world_size_ * tensor_para_.rank_, + h_token_num * hidden_units_ / tensor_para_.world_size_, + pipeline_para_.rank_ + 1, + pipeline_para_, + stream_); + } + } // transformer layers + + if (pipeline_para_.rank_ == pipeline_para_.world_size_ - 1) { + // post process (rebuild padding) + invokeRebuildPadding(output_tensors->at("output_hidden_state").getPtrWithOffset(hidden_offset), + deberta_out_buffer_, + padding_offset_, + h_token_num, + head_num_ * size_per_head_, + stream_); + sync_check_cuda_error(); + } + + if (padding_offset_tensor_ptr != nullptr) { + delete padding_offset_tensor_ptr; + } + } + + if (is_free_buffer_after_forward_ == true) { + freeBuffer(); + } + sync_check_cuda_error(); + + if (pipeline_para_.world_size_ > 1) { + ftNcclGroupStart(); + const int data_size = request_batch_size * request_seq_len * hidden_units_ / tensor_para_.world_size_; + ftNcclBroadCast(output_tensors->at("output_hidden_state").getPtr() + data_size * tensor_para_.rank_, + data_size, + pipeline_para_.world_size_ - 1, + pipeline_para_, + stream_); + ftNcclGroupEnd(); + + sync_check_cuda_error(); + if (tensor_para_.world_size_ > 1) { + ftNcclAllGather(output_tensors->at("output_hidden_state").getPtr(), + output_tensors->at("output_hidden_state").getPtr(), + data_size, + tensor_para_.rank_, + tensor_para_, + stream_); + } + // throw errors when detected + ftNcclStreamSynchronize(tensor_para_, pipeline_para_, stream_); + } + cudaStreamSynchronize(stream_); +} + +template class Deberta; +template class Deberta; +#ifdef ENABLE_BF16 +template class Deberta<__nv_bfloat16>; +#endif + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/deberta/Deberta.h b/src/fastertransformer/models/deberta/Deberta.h new file mode 100644 index 000000000..b14ffd7bd --- /dev/null +++ b/src/fastertransformer/models/deberta/Deberta.h @@ -0,0 +1,133 @@ +/* + * Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include + +#include "src/fastertransformer/kernels/bert_preprocess_kernels.h" +#include "src/fastertransformer/kernels/gpt_kernels.h" +#include "src/fastertransformer/kernels/layernorm_kernels.h" +#include "src/fastertransformer/layers/TensorParallelGeluFfnLayer.h" +#include "src/fastertransformer/layers/TensorParallelReluFfnLayer.h" +#include "src/fastertransformer/layers/attention_layers/TensorParallelDisentangledAttentionLayer.h" +#include "src/fastertransformer/models/deberta/DebertaWeight.h" +#include "src/fastertransformer/utils/nccl_utils.h" + +namespace fastertransformer { + +template +class Deberta: public BaseLayer { +private: + // meta data + size_t head_num_; + size_t size_per_head_; + size_t inter_size_; + size_t hidden_units_; + size_t num_layer_; + size_t max_relative_positions_; // usually 2 * attention_span + size_t relative_position_buckets_; // i.e., attention_span + static constexpr float layernorm_eps_ = 1e-7f; + float q_scaling_; + bool sparse_; + + BaseAttentionLayer* disentangled_attention_layer_ = nullptr; + FfnLayer* ffn_layer_; + + bool is_allocate_buffer_ = false; + + NcclParam tensor_para_; + NcclParam pipeline_para_; + std::shared_ptr custom_all_reduce_comm_; + bool enable_custom_all_reduce_; + + void allocateBuffer(); + void freeBuffer(); + void initialize(); + + const ActivationType activation_type_; + const LayerNormType layernorm_type_; + + void allocateBuffer(size_t batch_size, size_t seq_len); + bool isValidLayerParallelId(uint l); + bool isFirstLayerParallelId(uint l); + bool isLastLayerParallelId(uint l); + int getFirstLayerParallelId(); + +protected: + // model params + size_t* h_pinned_token_num_ptr_ = nullptr; + int* padding_offset_ = nullptr; + T* attention_mask_ = nullptr; + T* deberta_emb_buf_ = nullptr; + T* deberta_rel_emb_buf_ = nullptr; + T* deberta_in_buffer_ = nullptr; + T* attn_out_buf_ = nullptr; + T* deberta_out_buffer_ = nullptr; + + T* normed_from_tensor_ = nullptr; + T* normed_attn_out_buf_ = nullptr; + +public: + Deberta(size_t max_batch_size, + size_t max_seq_len, + size_t head_num, + size_t size_per_head, + size_t max_relative_positions, + size_t relative_position_buckets, + size_t inter_size, + size_t num_layer, + float q_scaling, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool sparse, + ActivationType activation_type, + LayerNormType layernorm_type, + NcclParam tensor_para, + NcclParam pipeline_para, + std::shared_ptr custom_all_reduce_comm, + bool enable_custom_all_reduce); + + Deberta(size_t max_batch_size, + size_t max_seq_len, + size_t head_num, + size_t size_per_head, + size_t max_relative_positions, + size_t relative_position_buckets, + size_t inter_size, + size_t num_layer, + float q_scaling, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool sparse, + ActivationType activation_type, + LayerNormType layernorm_type); + + Deberta(Deberta const& deberta); + + ~Deberta(); + + void forward(std::vector* output_tensors, + const std::vector* input_tensors, + const DebertaWeight* deberta_weights); + void forward(TensorMap* output_tensors, TensorMap* input_tensors, const DebertaWeight* deberta_weights); +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/deberta/DebertaLayerWeight.cc b/src/fastertransformer/models/deberta/DebertaLayerWeight.cc new file mode 100644 index 000000000..77a15e655 --- /dev/null +++ b/src/fastertransformer/models/deberta/DebertaLayerWeight.cc @@ -0,0 +1,228 @@ +/* + * Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "DebertaLayerWeight.h" + +namespace fastertransformer { + +template +DebertaLayerWeight::DebertaLayerWeight(const size_t hidden_units, + const size_t inter_size, + const size_t tensor_para_size, + const size_t tensor_para_rank): + hidden_units_(hidden_units), + inter_size_(inter_size), + tensor_para_size_(tensor_para_size), + tensor_para_rank_(tensor_para_rank) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + std::string name; + + // Note: TensorFlow/PyTorch interface usage is unclear at this time, so weight loading are based on named bin for + // now + name = "attention.self.query_proj.weight." + std::to_string(tensor_para_rank_) + ".bin"; + weights_ptr_.insert({name, FtWeight(name, {hidden_units_, hidden_units_ / tensor_para_size_}, nullptr)}); + name = "attention.self.query_proj.bias." + std::to_string(tensor_para_rank_) + ".bin"; + weights_ptr_.insert({name, FtWeight(name, {hidden_units_ / tensor_para_size_}, nullptr)}); + name = "attention.self.key_proj.weight." + std::to_string(tensor_para_rank_) + ".bin"; + weights_ptr_.insert({name, FtWeight(name, {hidden_units_, hidden_units_ / tensor_para_size_}, nullptr)}); + name = "attention.self.key_proj.bias." + std::to_string(tensor_para_rank_) + ".bin"; + weights_ptr_.insert({name, FtWeight(name, {hidden_units_ / tensor_para_size_}, nullptr)}); + name = "attention.self.value_proj.weight." + std::to_string(tensor_para_rank_) + ".bin"; + weights_ptr_.insert({name, FtWeight(name, {hidden_units_, hidden_units_ / tensor_para_size_}, nullptr)}); + name = "attention.self.value_proj.bias." + std::to_string(tensor_para_rank_) + ".bin"; + weights_ptr_.insert({name, FtWeight(name, {hidden_units_ / tensor_para_size_}, nullptr)}); + name = "attention.output.dense.weight." + std::to_string(tensor_para_rank_) + ".bin"; + weights_ptr_.insert({name, FtWeight(name, {hidden_units_, hidden_units_ / tensor_para_size_}, nullptr)}); + name = "attention.output.dense.bias.bin"; + weights_ptr_.insert({name, FtWeight(name, {hidden_units_}, nullptr)}); + name = "attention.output.LayerNorm.weight.bin"; + weights_ptr_.insert({name, FtWeight(name, {hidden_units_}, nullptr)}); + name = "attention.output.LayerNorm.bias.bin"; + weights_ptr_.insert({name, FtWeight(name, {hidden_units_}, nullptr)}); + name = "intermediate.dense.weight." + std::to_string(tensor_para_rank_) + ".bin"; + weights_ptr_.insert({name, FtWeight(name, {hidden_units_, inter_size_ / tensor_para_size_}, nullptr)}); + name = "intermediate.dense.bias." + std::to_string(tensor_para_rank_) + ".bin"; + weights_ptr_.insert({name, FtWeight(name, {inter_size_ / tensor_para_size_}, nullptr)}); + name = "output.dense.weight." + std::to_string(tensor_para_rank_) + ".bin"; + weights_ptr_.insert({name, FtWeight(name, {inter_size_ / tensor_para_size_, hidden_units_}, nullptr)}); + name = "output.dense.bias.bin"; + weights_ptr_.insert({name, FtWeight(name, {hidden_units_}, nullptr)}); + name = "output.LayerNorm.weight.bin"; + weights_ptr_.insert({name, FtWeight(name, {hidden_units_}, nullptr)}); + name = "output.LayerNorm.bias.bin"; + weights_ptr_.insert({name, FtWeight(name, {hidden_units_}, nullptr)}); + + for (auto it = weights_ptr_.begin(); it != weights_ptr_.end(); ++it) { + deviceMalloc(&it->second.ptr_, it->second.size_); + } + setWeightPtr(); + FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); +} + +template +DebertaLayerWeight::~DebertaLayerWeight() +{ + if (is_maintain_buffer_ == true) { + for (auto it = weights_ptr_.begin(); it != weights_ptr_.end(); ++it) { + deviceFree(it->second.ptr_); + } + weights_ptr_.clear(); + + attention_weights.query_weight.kernel = nullptr; + attention_weights.query_weight.bias = nullptr; + attention_weights.key_weight.kernel = nullptr; + attention_weights.key_weight.bias = nullptr; + attention_weights.value_weight.kernel = nullptr; + attention_weights.value_weight.bias = nullptr; + attention_weights.attention_output_weight.kernel = nullptr; + attention_weights.attention_output_weight.bias = nullptr; + attn_layernorm_weights.gamma = nullptr; + attn_layernorm_weights.beta = nullptr; + ffn_weights.intermediate_weight.kernel = nullptr; + ffn_weights.intermediate_weight.bias = nullptr; + ffn_weights.output_weight.kernel = nullptr; + ffn_weights.output_weight.bias = nullptr; + ffn_layernorm_weights.gamma = nullptr; + ffn_layernorm_weights.beta = nullptr; + is_maintain_buffer_ = false; + } + if (is_maintain_sp_buffer_ == true) { + for (int i = 0; i < 6; i++) { + deviceFree(sp_weights_ptr_[i]); + } + attention_weights.query_weight.sp_kernel = nullptr; + attention_weights.key_weight.sp_kernel = nullptr; + attention_weights.value_weight.sp_kernel = nullptr; + attention_weights.attention_output_weight.sp_kernel = nullptr; + ffn_weights.intermediate_weight.sp_kernel = nullptr; + ffn_weights.output_weight.sp_kernel = nullptr; + is_maintain_sp_buffer_ = false; + } +} + +template +DebertaLayerWeight::DebertaLayerWeight(const DebertaLayerWeight& other): + DebertaLayerWeight(other.hidden_units_, other.inter_size_, other.tensor_para_size_, other.tensor_para_rank_) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + for (auto it = other.weights_ptr_.begin(); it != other.weights_ptr_.end(); ++it) { + cudaD2Dcpy(weights_ptr_.at(it->first).ptr_, it->second.ptr_, it->second.size_); + } + FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); +} + +template +DebertaLayerWeight& DebertaLayerWeight::operator=(const DebertaLayerWeight& other) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + hidden_units_ = other.hidden_units_; + inter_size_ = other.inter_size_; + tensor_para_size_ = other.tensor_para_size_; + tensor_para_rank_ = other.tensor_para_rank_; + + for (auto it = other.weights_ptr_.begin(); it != other.weights_ptr_.end(); ++it) { + weights_ptr_.insert({it->first, it->second}); + weights_ptr_.at(it->first).ptr_ = nullptr; + deviceMalloc(&weights_ptr_.at(it->first).ptr_, it->second.size_); + cudaD2Dcpy(weights_ptr_.at(it->first).ptr_, it->second.ptr_, it->second.size_); + } + setWeightPtr(); + FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); + + return *this; +} + +#ifdef SPARSITY_ENABLED +template +void DebertaLayerWeight::compress_weights(cublasMMWrapper& cublas_wrapper, int hidden_dim) +{ + int inter_size = hidden_dim * 4; + deviceMalloc(&sp_weights_ptr_[0], hidden_dim * hidden_dim); + deviceMalloc(&sp_weights_ptr_[1], hidden_dim * hidden_dim); + deviceMalloc(&sp_weights_ptr_[2], hidden_dim * hidden_dim); + deviceMalloc(&sp_weights_ptr_[3], hidden_dim * hidden_dim); + deviceMalloc(&sp_weights_ptr_[4], hidden_dim * inter_size); + deviceMalloc(&sp_weights_ptr_[5], inter_size * hidden_dim); + cublas_wrapper.compressMatrix(attention_weights.query_weight.kernel, sp_weights_ptr_[0], hidden_dim, hidden_dim); + cublas_wrapper.compressMatrix(attention_weights.key_weight.kernel, sp_weights_ptr_[1], hidden_dim, hidden_dim); + cublas_wrapper.compressMatrix(attention_weights.value_weight.kernel, sp_weights_ptr_[2], hidden_dim, hidden_dim); + cublas_wrapper.compressMatrix( + attention_weights.attention_output_weight.kernel, sp_weights_ptr_[3], hidden_dim, hidden_dim); + cublas_wrapper.compressMatrix(ffn_weights.intermediate_weight.kernel, sp_weights_ptr_[4], inter_size, hidden_dim); + cublas_wrapper.compressMatrix(ffn_weights.output_weight.kernel, sp_weights_ptr_[5], hidden_dim, inter_size); + attention_weights.query_weight.sp_kernel = sp_weights_ptr_[0]; + attention_weights.key_weight.sp_kernel = sp_weights_ptr_[1]; + attention_weights.value_weight.sp_kernel = sp_weights_ptr_[2]; + attention_weights.attention_output_weight.sp_kernel = sp_weights_ptr_[3]; + ffn_weights.intermediate_weight.sp_kernel = sp_weights_ptr_[4]; + ffn_weights.output_weight.sp_kernel = sp_weights_ptr_[5]; + is_maintain_sp_buffer_ = true; +} +#endif + +template +void DebertaLayerWeight::loadModel(std::string dir_path, FtCudaDataType model_file_type) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + for (auto it = weights_ptr_.begin(); it != weights_ptr_.end(); ++it) { + loadWeightFromBin(it->second.ptr_, it->second.shape_, dir_path + it->first, model_file_type); + } + FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); +} + +template +void DebertaLayerWeight::setWeightPtr() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + attention_weights.query_weight.kernel = + weights_ptr_.at("attention.self.query_proj.weight." + std::to_string(tensor_para_rank_) + ".bin").ptr_; + attention_weights.query_weight.bias = + weights_ptr_.at("attention.self.query_proj.bias." + std::to_string(tensor_para_rank_) + ".bin").ptr_; + attention_weights.key_weight.kernel = + weights_ptr_.at("attention.self.key_proj.weight." + std::to_string(tensor_para_rank_) + ".bin").ptr_; + attention_weights.key_weight.bias = + weights_ptr_.at("attention.self.key_proj.bias." + std::to_string(tensor_para_rank_) + ".bin").ptr_; + attention_weights.value_weight.kernel = + weights_ptr_.at("attention.self.value_proj.weight." + std::to_string(tensor_para_rank_) + ".bin").ptr_; + attention_weights.value_weight.bias = + weights_ptr_.at("attention.self.value_proj.bias." + std::to_string(tensor_para_rank_) + ".bin").ptr_; + attention_weights.attention_output_weight.kernel = + weights_ptr_.at("attention.output.dense.weight." + std::to_string(tensor_para_rank_) + ".bin").ptr_; + attention_weights.attention_output_weight.bias = weights_ptr_.at("attention.output.dense.bias.bin").ptr_; + attn_layernorm_weights.gamma = weights_ptr_.at("attention.output.LayerNorm.weight.bin").ptr_; + attn_layernorm_weights.beta = weights_ptr_.at("attention.output.LayerNorm.bias.bin").ptr_; + ffn_weights.intermediate_weight.kernel = + weights_ptr_.at("intermediate.dense.weight." + std::to_string(tensor_para_rank_) + ".bin").ptr_; + ffn_weights.intermediate_weight.bias = + weights_ptr_.at("intermediate.dense.bias." + std::to_string(tensor_para_rank_) + ".bin").ptr_; + ffn_weights.output_weight.kernel = + weights_ptr_.at("output.dense.weight." + std::to_string(tensor_para_rank_) + ".bin").ptr_; + ffn_weights.output_weight.bias = weights_ptr_.at("output.dense.bias.bin").ptr_; + ffn_layernorm_weights.gamma = weights_ptr_.at("output.LayerNorm.weight.bin").ptr_; + ffn_layernorm_weights.beta = weights_ptr_.at("output.LayerNorm.bias.bin").ptr_; + + is_maintain_buffer_ = true; + FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); +} + +template struct DebertaLayerWeight; +template struct DebertaLayerWeight; +#ifdef ENABLE_BF16 +template struct DebertaLayerWeight<__nv_bfloat16>; +#endif + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/deberta/DebertaLayerWeight.h b/src/fastertransformer/models/deberta/DebertaLayerWeight.h new file mode 100644 index 000000000..d14f241ec --- /dev/null +++ b/src/fastertransformer/models/deberta/DebertaLayerWeight.h @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/kernels/layernorm_kernels.h" +#include "src/fastertransformer/layers/FfnWeight.h" +#include "src/fastertransformer/layers/attention_layers/AttentionWeight.h" +#include "src/fastertransformer/models/BaseWeight.h" +#include "src/fastertransformer/utils/cublasMMWrapper.h" +#include "src/fastertransformer/utils/memory_utils.h" +#include + +namespace fastertransformer { + +template +struct DebertaLayerWeight { + + DebertaLayerWeight() = default; + DebertaLayerWeight(const size_t hidden_units, + const size_t inter_size, + const size_t tensor_para_size, + const size_t tensor_para_rank); + DebertaLayerWeight(const int hidden_units, const int inter_size): DebertaLayerWeight(hidden_units, inter_size, 1, 0) + { + } + ~DebertaLayerWeight(); + DebertaLayerWeight(const DebertaLayerWeight& other); + DebertaLayerWeight& operator=(const DebertaLayerWeight& other); + +#ifdef SPARSITY_ENABLED + void compress_weights(cublasMMWrapper& cublas_wrapper, int hidden_dim); +#endif + + AttentionWeight attention_weights; + LayerNormWeight attn_layernorm_weights; + FfnWeight ffn_weights; + LayerNormWeight ffn_layernorm_weights; + + void loadModel(std::string dir_path, FtCudaDataType model_file_type); + +private: + void setWeightPtr(); + + size_t hidden_units_; + size_t inter_size_; + size_t tensor_para_size_; + size_t tensor_para_rank_; + bool is_maintain_buffer_ = false; + std::unordered_map> weights_ptr_; + T* sp_weights_ptr_[6]; + bool is_maintain_sp_buffer_ = false; +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/deberta/DebertaWeight.cc b/src/fastertransformer/models/deberta/DebertaWeight.cc new file mode 100644 index 000000000..7811253c8 --- /dev/null +++ b/src/fastertransformer/models/deberta/DebertaWeight.cc @@ -0,0 +1,212 @@ +/* + * Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "DebertaWeight.h" + +namespace fastertransformer { + +template +DebertaWeight::DebertaWeight(const size_t hidden_units, + const size_t inter_size, + const size_t max_relative_positions, + const size_t relative_position_buckets, + const size_t vocab_size, + const size_t num_layer, + const size_t tensor_para_size, + const size_t tensor_para_rank, + const size_t pipeline_para_size, + const size_t pipeline_para_rank): + hidden_units_(hidden_units), + inter_size_(inter_size), + max_relative_positions_(max_relative_positions), + relative_position_buckets_(relative_position_buckets), + vocab_size_(vocab_size), + num_layer_(num_layer), + tensor_para_size_(tensor_para_size), + tensor_para_rank_(tensor_para_rank), + pipeline_para_size_(pipeline_para_size), + pipeline_para_rank_(pipeline_para_rank) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + + // [1] word embedding weight [2] word-LN weight [3] word-LN bias [4] relative embedding weight [5] relative-LN + // weight [6] relative-LN bias + weights_size[0] = vocab_size_ * hidden_units_; + weights_size[1] = hidden_units_; + weights_size[2] = hidden_units_; + weights_size[3] = + (relative_position_buckets_ > 0 ? relative_position_buckets_ * 2 : max_relative_positions_ * 2) * hidden_units_; + weights_size[4] = hidden_units_; + weights_size[5] = hidden_units_; + + for (int i = 0; i < weights_num_; i++) { + deviceMalloc(&weights_ptr[i], weights_size[i]); + } + + setWeightPtr(); + deberta_layer_weights.reserve(num_layer_); + for (int i = 0; i < num_layer_; i++) { + deberta_layer_weights.push_back( + DebertaLayerWeight(hidden_units_, inter_size_, tensor_para_size_, tensor_para_rank_)); + } + FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); +} + +template +DebertaWeight::~DebertaWeight() +{ + if (is_maintain_buffer == true) { + deberta_layer_weights.clear(); + for (int i = 0; i < weights_num_; i++) { + deviceFree(weights_ptr[i]); + } + + word_embedding_table = nullptr; + word_embedding_layernorm_weights.gamma = nullptr; + word_embedding_layernorm_weights.beta = nullptr; + relative_embedding_table = nullptr; + relative_embedding_layernorm_weights.gamma = nullptr; + relative_embedding_layernorm_weights.beta = nullptr; + + is_maintain_buffer = false; + } +} + +template +DebertaWeight::DebertaWeight(const DebertaWeight& other): + DebertaWeight(other.hidden_units_, + other.inter_size_, + other.max_relative_positions_, + other.relative_position_buckets_, + other.vocab_size_, + other.num_layer_, + other.tensor_para_size_, + other.tensor_para_rank_, + other.pipeline_para_size_, + other.pipeline_para_rank_) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + deberta_layer_weights.clear(); + deberta_layer_weights.reserve(num_layer_); + for (int i = 0; i < num_layer_; i++) { + deberta_layer_weights.push_back(other.deberta_layer_weights[i]); + } + for (int i = 0; i < weights_num_; i++) { + deviceMalloc(&weights_ptr[i], weights_size[i]); + cudaD2Dcpy(weights_ptr[i], other.weights_ptr[i], weights_size[i]); + } + + setWeightPtr(); + FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); +} + +template +DebertaWeight& DebertaWeight::operator=(const DebertaWeight& other) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + hidden_units_ = other.hidden_units_; + inter_size_ = other.inter_size_; + max_relative_positions_ = other.max_relative_positions_; + relative_position_buckets_ = other.relative_position_buckets_; + vocab_size_ = other.vocab_size_; + num_layer_ = other.num_layer_; + tensor_para_size_ = other.tensor_para_size_; + tensor_para_rank_ = other.tensor_para_rank_; + pipeline_para_size_ = other.pipeline_para_size_; + pipeline_para_rank_ = other.pipeline_para_rank_; + + deberta_layer_weights.clear(); + deberta_layer_weights.reserve(num_layer_); + for (int i = 0; i < num_layer_; i++) { + deberta_layer_weights.push_back(other.deberta_layer_weights[i]); + } + for (int i = 0; i < weights_num_; i++) { + deviceMalloc(&weights_ptr[i], weights_size[i]); + cudaD2Dcpy(weights_ptr[i], other.weights_ptr[i], weights_size[i]); + } + + setWeightPtr(); + FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); + + return *this; +} + +template +void DebertaWeight::loadModel(std::string dir_path) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + FtCudaDataType model_file_type = + getModelFileType(dir_path + "/config.ini", "deberta"); // by default FP32 if no .ini exists + + // Note: TensorFlow/PyTorch interface usage is unclear at this time, so weight loading are based on named bin for + // now + loadWeightFromBin(weights_ptr[0], + {(size_t)weights_size[0]}, + dir_path + "/model.embeddings.word_embeddings.weight.bin", + model_file_type); + loadWeightFromBin(weights_ptr[1], + {(size_t)weights_size[1]}, + dir_path + "/model.embeddings.LayerNorm.weight.bin", + model_file_type); + loadWeightFromBin( + weights_ptr[2], {(size_t)weights_size[2]}, dir_path + "/model.embeddings.LayerNorm.bias.bin", model_file_type); + loadWeightFromBin(weights_ptr[3], + {(size_t)weights_size[3]}, + dir_path + "/model.encoder.rel_embeddings.weight.bin", + model_file_type); + loadWeightFromBin( + weights_ptr[4], {(size_t)weights_size[4]}, dir_path + "/model.encoder.LayerNorm.weight.bin", model_file_type); + loadWeightFromBin( + weights_ptr[5], {(size_t)weights_size[5]}, dir_path + "/model.encoder.LayerNorm.bias.bin", model_file_type); + + for (uint l = 0; l < num_layer_; l++) { + if (isValidLayerParallelId(l)) { + deberta_layer_weights[l].loadModel(dir_path + "model.encoder.layer." + std::to_string(l) + ".", + model_file_type); + } + } + FT_LOG_DEBUG(__PRETTY_FUNCTION__, " stop"); +} + +template +bool DebertaWeight::isValidLayerParallelId(int l) +{ + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_size_)); + return l < num_layer_ && (l >= local_num_layer * pipeline_para_rank_) + && (l < local_num_layer * (pipeline_para_rank_ + 1)); +} + +template +void DebertaWeight::setWeightPtr() +{ + word_embedding_table = weights_ptr[0]; + word_embedding_layernorm_weights.gamma = weights_ptr[1]; + word_embedding_layernorm_weights.beta = weights_ptr[2]; + + relative_embedding_table = weights_ptr[3]; + relative_embedding_layernorm_weights.gamma = weights_ptr[4]; + relative_embedding_layernorm_weights.beta = weights_ptr[5]; + + is_maintain_buffer = true; +} + +template struct DebertaWeight; +template struct DebertaWeight; +#ifdef ENABLE_BF16 +template struct DebertaWeight<__nv_bfloat16>; +#endif + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/deberta/DebertaWeight.h b/src/fastertransformer/models/deberta/DebertaWeight.h new file mode 100644 index 000000000..b08e3ee9a --- /dev/null +++ b/src/fastertransformer/models/deberta/DebertaWeight.h @@ -0,0 +1,89 @@ +/* + * Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/models/deberta/DebertaLayerWeight.h" + +namespace fastertransformer { + +template +struct DebertaWeight { + + DebertaWeight() = default; + DebertaWeight(const size_t hidden_units, + const size_t inter_size, + const size_t max_relative_positions, + const size_t relative_position_buckets, + const size_t vocab_size, + const size_t num_layer, + const size_t tensor_para_size, + const size_t tensor_para_rank, + const size_t pipeline_para_size, + const size_t pipeline_para_rank); + DebertaWeight(const int hidden_units, + const int inter_size, + const size_t max_relative_positions, + const size_t relative_position_buckets, + const size_t vocab_size, + const int num_layer): + DebertaWeight(hidden_units, + inter_size, + max_relative_positions, + relative_position_buckets, + vocab_size, + num_layer, + 1, + 0, + 1, + 0) + { + } + ~DebertaWeight(); + DebertaWeight(const DebertaWeight& other); + DebertaWeight& operator=(const DebertaWeight& other); + std::vector> deberta_layer_weights; + const T* word_embedding_table = nullptr; + LayerNormWeight word_embedding_layernorm_weights; + const T* relative_embedding_table = nullptr; + LayerNormWeight relative_embedding_layernorm_weights; + + bool isValidLayerParallelId(int l); + void loadModel(std::string dir_path); + +private: + void setWeightPtr(); + + size_t hidden_units_; + size_t inter_size_; + size_t max_relative_positions_; + size_t relative_position_buckets_; + size_t vocab_size_; + size_t num_layer_; + size_t tensor_para_size_; + size_t tensor_para_rank_; + size_t pipeline_para_size_; + size_t pipeline_para_rank_; + bool is_maintain_buffer = false; + + // 6: [1] word embedding weight [2] word-LN weight [3] word-LN bias [4] relative embedding weight [5] relative-LN + // weight [6] relative-LN bias + const static int weights_num_ = 6; + T* weights_ptr[weights_num_]; + size_t weights_size[weights_num_]; +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/decoder/CMakeLists.txt b/src/fastertransformer/models/decoder/CMakeLists.txt index 3d1e37772..28a7bc84a 100644 --- a/src/fastertransformer/models/decoder/CMakeLists.txt +++ b/src/fastertransformer/models/decoder/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/decoder/Decoder.cc b/src/fastertransformer/models/decoder/Decoder.cc index 1e4b0800e..07fc20fb8 100644 --- a/src/fastertransformer/models/decoder/Decoder.cc +++ b/src/fastertransformer/models/decoder/Decoder.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -252,6 +252,7 @@ void Decoder::forward(std::vector* output_tensor (float*)nullptr, (float*)nullptr, (float*)nullptr, + (float*)nullptr, 0, stream_); sync_check_cuda_error(); @@ -292,6 +293,7 @@ void Decoder::forward(std::vector* output_tensor (float*)nullptr, (float*)nullptr, (float*)nullptr, + (float*)nullptr, 0, stream_); sync_check_cuda_error(); diff --git a/src/fastertransformer/models/decoder/Decoder.h b/src/fastertransformer/models/decoder/Decoder.h index 2f7483e6f..9d85ea77f 100644 --- a/src/fastertransformer/models/decoder/Decoder.h +++ b/src/fastertransformer/models/decoder/Decoder.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/decoder/DecoderLayerWeight.h b/src/fastertransformer/models/decoder/DecoderLayerWeight.h index c80a62223..5b1699d98 100644 --- a/src/fastertransformer/models/decoder/DecoderLayerWeight.h +++ b/src/fastertransformer/models/decoder/DecoderLayerWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/decoding/CMakeLists.txt b/src/fastertransformer/models/decoding/CMakeLists.txt index faf001b58..6f6297818 100644 --- a/src/fastertransformer/models/decoding/CMakeLists.txt +++ b/src/fastertransformer/models/decoding/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/decoding/Decoding.cc b/src/fastertransformer/models/decoding/Decoding.cc index 3b31ec42d..8eb1406e0 100644 --- a/src/fastertransformer/models/decoding/Decoding.cc +++ b/src/fastertransformer/models/decoding/Decoding.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/models/decoding/Decoding.h b/src/fastertransformer/models/decoding/Decoding.h index 8c5764e79..75fc737fa 100644 --- a/src/fastertransformer/models/decoding/Decoding.h +++ b/src/fastertransformer/models/decoding/Decoding.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/decoding/DecodingWeight.h b/src/fastertransformer/models/decoding/DecodingWeight.h index 54605074a..5b58c1e2c 100644 --- a/src/fastertransformer/models/decoding/DecodingWeight.h +++ b/src/fastertransformer/models/decoding/DecodingWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/decoding/decoding_gemm.cc b/src/fastertransformer/models/decoding/decoding_gemm.cc index 3eb8ab358..801500aa3 100644 --- a/src/fastertransformer/models/decoding/decoding_gemm.cc +++ b/src/fastertransformer/models/decoding/decoding_gemm.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/gpt_fp8/CMakeLists.txt b/src/fastertransformer/models/gpt_fp8/CMakeLists.txt new file mode 100644 index 000000000..0936e5cd3 --- /dev/null +++ b/src/fastertransformer/models/gpt_fp8/CMakeLists.txt @@ -0,0 +1,51 @@ +# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +cmake_minimum_required(VERSION 3.8) + +# add_compile_definitions(FP8_MHA) + +add_library(GptFP8DecoderLayerWeight STATIC GptFP8DecoderLayerWeight.cc) +set_property(TARGET GptFP8DecoderLayerWeight PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET GptFP8DecoderLayerWeight PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(GptFP8DecoderLayerWeight PUBLIC memory_utils cuda_fp8_utils) + +add_library(GptFP8Weight STATIC GptFP8Weight.cc) +set_property(TARGET GptFP8Weight PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET GptFP8Weight PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(GptFP8Weight PUBLIC GptFP8DecoderLayerWeight) + +add_library(GptFP8ContextDecoder STATIC GptFP8ContextDecoder.cc) +set_property(TARGET GptFP8ContextDecoder PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET GptFP8ContextDecoder PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(GptFP8ContextDecoder PUBLIC -lcudart TensorParallelGeluFfnFP8Layer + TensorParallelGptContextAttentionFP8Layer layernorm_fp8_kernels + add_residual_kernels nccl_utils gpt_kernels) + +add_library(GptFP8Decoder STATIC GptFP8Decoder.cc) +set_property(TARGET GptFP8Decoder PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET GptFP8Decoder PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(GptFP8Decoder PUBLIC -lcudart TensorParallelGeluFfnLayer + TensorParallelDecoderSelfAttentionFP8Layer layernorm_fp8_kernels + add_residual_kernels nccl_utils) + +add_library(GptFP8 STATIC GptFP8.cc) +set_property(TARGET GptFP8 PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET GptFP8 PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(GptFP8 PUBLIC -lcudart GptFP8Decoder GptFP8ContextDecoder + bert_preprocess_kernels decoding_kernels gpt_kernels layernorm_kernels + DynamicDecodeLayer BaseBeamSearchLayer GptFP8Weight) + +add_executable(gpt_fp8_gemm gpt_fp8_gemm.cc) +target_link_libraries(gpt_fp8_gemm PUBLIC -lcudart gpt_gemm_func memory_utils) diff --git a/src/fastertransformer/models/gpt_fp8/GptFP8.cc b/src/fastertransformer/models/gpt_fp8/GptFP8.cc new file mode 100644 index 000000000..66e02fa9f --- /dev/null +++ b/src/fastertransformer/models/gpt_fp8/GptFP8.cc @@ -0,0 +1,871 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/models/gpt_fp8/GptFP8.h" +#include "src/fastertransformer/kernels/bert_preprocess_kernels.h" +#include "src/fastertransformer/kernels/decoding_kernels.h" +#include "src/fastertransformer/kernels/gpt_kernels.h" +#include "src/fastertransformer/kernels/layernorm_kernels.h" +#include "src/fastertransformer/layers/beam_search_layers/BaseBeamSearchLayer.h" +#include "src/fastertransformer/utils/logger.h" + +namespace fastertransformer { + +template +void GptFP8::initialize() +{ + gpt_context_decoder_ = new GptFP8ContextDecoder(head_num_, + size_per_head_, + inter_size_, + num_layer_, + tensor_para_, + pipeline_para_, + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + is_context_qk_buf_float_, + sparse_); + + gpt_decoder_ = new GptFP8Decoder(head_num_, + size_per_head_, + inter_size_, + num_layer_, + tensor_para_, + pipeline_para_, + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + sparse_); + + dynamic_decode_layer_ = new DynamicDecodeLayer(vocab_size_, + vocab_size_padded_, + 0, // end_id, deprecated + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + cuda_device_prop_); +} + +template +void GptFP8::allocateBuffer() +{ + FT_CHECK(false); +} + +template +void GptFP8::allocateBuffer(size_t batch_size, size_t beam_width, size_t max_seq_len, size_t max_input_len) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + const size_t batchxbeam = batch_size * beam_width; + const size_t self_cache_size = + (num_layer_ / pipeline_para_.world_size_) * batchxbeam * max_seq_len * hidden_units_ / tensor_para_.world_size_; + const size_t max_input_len_padded = (max_input_len + 15) / 16 * 16; + if (vocab_size_ != vocab_size_padded_) { + padded_embedding_kernel_ = (T2*)(allocator_->reMalloc( + padded_embedding_kernel_, sizeof(T2) * hidden_units_ * vocab_size_padded_, true)); + padded_embedding_kernel_ptr_ = padded_embedding_kernel_; + } + + input_attention_mask_ = (T1*)(allocator_->reMalloc( + input_attention_mask_, sizeof(T1) * batchxbeam * max_input_len_padded * max_input_len_padded, false)); + decoder_input_buf_ = + (T2*)(allocator_->reMalloc(decoder_input_buf_, sizeof(T2) * batchxbeam * hidden_units_, false)); + decoder_output_buf_ = + (T2*)(allocator_->reMalloc(decoder_output_buf_, sizeof(T2) * batchxbeam * hidden_units_, false)); + normed_decoder_output_buf_ = + (T2*)(allocator_->reMalloc(normed_decoder_output_buf_, sizeof(T2) * batchxbeam * hidden_units_, false)); + logits_buf_ = (float*)(allocator_->reMalloc(logits_buf_, sizeof(float) * batchxbeam * vocab_size_padded_, false)); + nccl_logits_buf_ = + (float*)(allocator_->reMalloc(nccl_logits_buf_, sizeof(float) * batchxbeam * vocab_size_padded_, false)); + cum_log_probs_ = (float*)(allocator_->reMalloc(cum_log_probs_, sizeof(float) * batchxbeam, false)); + finished_buf_ = (bool*)(allocator_->reMalloc(finished_buf_, sizeof(bool) * batchxbeam, false)); + h_finished_buf_ = new bool[batchxbeam]; + +#ifdef FP8_MHA + key_cache_ = (T1*)(allocator_->reMalloc(key_cache_, sizeof(T1) * self_cache_size * 2, true)); +#else + key_cache_ = (T2*)(allocator_->reMalloc(key_cache_, sizeof(T2) * self_cache_size * 2, true)); +#endif + value_cache_ = key_cache_ + self_cache_size; + if (beam_width > 1) { + cache_indirections_[0] = + (int*)(allocator_->reMalloc(cache_indirections_[0], sizeof(int) * batchxbeam * max_seq_len * 2, true)); + cache_indirections_[1] = cache_indirections_[0] + batchxbeam * max_seq_len; + } + + tiled_input_ids_buf_ = + (int*)(allocator_->reMalloc(tiled_input_ids_buf_, sizeof(int) * batchxbeam * max_input_len, true)); + tiled_input_lengths_buf_ = (int*)(allocator_->reMalloc(tiled_input_lengths_buf_, sizeof(int) * batchxbeam, true)); + + start_ids_buf_ = (int*)(allocator_->reMalloc(start_ids_buf_, sizeof(int) * batch_size, false)); + end_ids_buf_ = (int*)(allocator_->reMalloc(end_ids_buf_, sizeof(int) * batch_size, false)); + + transposed_output_ids_buf_ = + (int*)(allocator_->reMalloc(transposed_output_ids_buf_, sizeof(int) * batchxbeam * max_seq_len, true)); + output_ids_buf_ = (int*)(allocator_->reMalloc(output_ids_buf_, sizeof(int) * batchxbeam * max_seq_len, true)); + parent_ids_buf_ = (int*)(allocator_->reMalloc(parent_ids_buf_, sizeof(int) * batchxbeam * max_seq_len, true)); + tiled_total_padding_count_ = + (int*)(allocator_->reMalloc(tiled_total_padding_count_, sizeof(int) * batchxbeam * max_seq_len, true)); + masked_tokens_ = (bool*)(allocator_->reMalloc(masked_tokens_, sizeof(bool) * batchxbeam * max_seq_len, true)); + + context_decoder_input_buf_ = (T2*)(allocator_->reMalloc( + context_decoder_input_buf_, sizeof(T2) * batchxbeam * max_input_len * hidden_units_, false)); + context_decoder_output_buf_ = (T2*)(allocator_->reMalloc( + context_decoder_output_buf_, sizeof(T2) * batchxbeam * max_input_len * hidden_units_, false)); + is_allocate_buffer_ = true; +} + +template +void GptFP8::freeBuffer() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + if (is_allocate_buffer_) { + if (vocab_size_ != vocab_size_padded_) { + padded_embedding_kernel_ptr_ = nullptr; + allocator_->free((void**)(&padded_embedding_kernel_)); + } + + allocator_->free((void**)(&input_attention_mask_)); + allocator_->free((void**)(&decoder_input_buf_)); + allocator_->free((void**)(&decoder_output_buf_)); + allocator_->free((void**)(&normed_decoder_output_buf_)); + allocator_->free((void**)(&logits_buf_)); + allocator_->free((void**)(&nccl_logits_buf_)); + allocator_->free((void**)(&cum_log_probs_)); + allocator_->free((void**)(&finished_buf_)); + delete[] h_finished_buf_; + + allocator_->free((void**)(&key_cache_)); + if (cache_indirections_[0] != nullptr) { + allocator_->free((void**)(&cache_indirections_[0])); + } + + allocator_->free((void**)(&tiled_input_ids_buf_)); + allocator_->free((void**)(&tiled_input_lengths_buf_)); + + allocator_->free((void**)(&start_ids_buf_)); + allocator_->free((void**)(&end_ids_buf_)); + + allocator_->free((void**)(&transposed_output_ids_buf_)); + allocator_->free((void**)(&output_ids_buf_)); + allocator_->free((void**)(&parent_ids_buf_)); + allocator_->free((void**)(&tiled_total_padding_count_)); + allocator_->free((void**)(&masked_tokens_)); + + allocator_->free((void**)(&context_decoder_input_buf_)); + allocator_->free((void**)(&context_decoder_output_buf_)); + is_allocate_buffer_ = false; + } +} + +template +GptFP8::GptFP8(size_t beam_width, + size_t head_num, + size_t size_per_head, + size_t inter_size, + size_t num_layer, + size_t vocab_size, + int start_id, + int end_id, + NcclParam tensor_para, + NcclParam pipeline_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + cudaDeviceProp* cuda_device_prop, + bool sparse): + BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward, cuda_device_prop, sparse), + head_num_(head_num), + size_per_head_(size_per_head), + inter_size_(inter_size), + num_layer_(num_layer), + vocab_size_(vocab_size), + start_id_(start_id), + end_id_(end_id), + hidden_units_(head_num_ * size_per_head), + tensor_para_(tensor_para), + pipeline_para_(pipeline_para), + local_head_num_(head_num / tensor_para.world_size_) +{ + int local_vacab_size = ceil(vocab_size_ / 1.f / tensor_para_.world_size_); + if (std::is_same<__nv_bfloat16, T1>::value || std::is_same<__nv_fp8_e4m3, T1>::value) { + local_vacab_size = ceil(local_vacab_size / 8.f) * 8; + } + vocab_size_padded_ = (size_t)local_vacab_size * tensor_para_.world_size_; + initialize(); +} + +template +GptFP8::GptFP8(GptFP8 const& gpt): + BaseLayer(gpt), + head_num_(gpt.head_num_), + size_per_head_(gpt.size_per_head_), + inter_size_(gpt.inter_size_), + num_layer_(gpt.num_layer_), + vocab_size_(gpt.vocab_size_), + start_id_(gpt.start_id_), + end_id_(gpt.end_id_), + hidden_units_(gpt.hidden_units_), + tensor_para_(gpt.tensor_para_), + pipeline_para_(gpt.pipeline_para_), + local_head_num_(gpt.local_head_num_), + vocab_size_padded_(gpt.vocab_size_padded_) +{ + initialize(); +} + +template +GptFP8::~GptFP8() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + delete gpt_decoder_; + delete gpt_context_decoder_; + delete dynamic_decode_layer_; + freeBuffer(); +} + +template +void GptFP8::forward(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors, + const GptFP8Weight* gpt_weights) +{ + // input_tensors: + // input_ids [batch_size, max_input_length] + // input_lengths [batch_size] + // output_seq_len [batch size] + // runtime_top_k [1] or [batch_size] on cpu, optional + // runtime_top_p [1] or [batch_size] on cpu, optional + // beam_search_diversity_rate [1] or [batch_size] on cpu, optional + // temperature [1] or [batch_size] on cpu, optional + // len_penalty [1] or [batch_size] on cpu, optional + // repetition_penalty [1] or [batch_size] on cpu, optional + // random_seed [1] or [batch_size] on cpu, optional + // prefix_soft_prompt_lengths [batch_size], optional + // prefix_soft_prompt_embedding [batch_size, max_prefix_soft_prompt_length, hidden_units], optional + + // output_tensors: + // output_ids [batch_size, beam_width, max_output_seq_len] + // sequence_length [batch_size, beam_width] + // output_cum_log_probs [request_output_seq_len, batch_size, beam_width], must be float*. + // optional. It leads to additional computing cost. If we don't need this result, don't put it. + + // Step is from max_input_length ~ max_output_seq_len, + // When step = k, we put output ids and caches at step k, and the sequence_length would be k - 1 before + // complete this step. + // When there is no input_ids, put the start token at step 0 of output_ids_buf_. After forward, only copy + // the step 1 ~ max_output_seq_len of output_ids_buf_ to output_tensors->at(0).data + + FT_CHECK_WITH_INFO(input_tensors->size() >= 3, "input_tensors->size() >= 3"); + FT_CHECK_WITH_INFO(output_tensors->size() >= 2, "output_tensors->size() >= 2"); + FT_CHECK(input_tensors->at("input_ids").shape.size() == 2); + FT_CHECK(input_tensors->at("input_lengths").shape.size() == 1); + FT_CHECK(input_tensors->count("output_seq_len")); + FT_CHECK(output_tensors->at("output_ids").shape.size() == 3); + FT_CHECK(output_tensors->at("sequence_length").shape.size() == 2); + FT_CHECK_WITH_INFO(input_tensors->at("input_ids").shape[0] == output_tensors->at("output_ids").shape[0], + "input_tensors->at(\"input_ids\").shape[0] == output_tensors->at(\"output_ids\").shape[0]"); + + // Used when inputs do not contain random_seed + const size_t batch_size = output_tensors->at("output_ids").shape[0]; + const size_t beam_width = output_tensors->at("output_ids").shape[1]; + int max_input_length = input_tensors->at("input_ids").shape[1]; + const size_t max_prefix_soft_prompt_length = input_tensors->count("prefix_soft_prompt_embedding") ? + input_tensors->at("prefix_soft_prompt_embedding").shape[1] : + 0; + const size_t limit_len_offset = max_prefix_soft_prompt_length + (max_input_length == 0 ? 1 : 0); + const size_t max_output_seq_len = input_tensors->at("output_seq_len").max() + limit_len_offset; + const size_t max_seq_len = max_output_seq_len; + allocateBuffer(batch_size, beam_width, max_seq_len, max_input_length + max_prefix_soft_prompt_length); + sync_check_cuda_error(); + + int* sequence_lengths = (int*)(output_tensors->at("sequence_length").data); + const DataType data_type = getTensorType(); + const DataType high_precision_data_type = getTensorType(); + + const int initial_step = 0; + +#ifdef FP8_MHA + const std::vector self_k_cache_shape = {num_layer_ / pipeline_para_.world_size_, + batch_size * beam_width, + local_head_num_, + size_per_head_ / (16 / sizeof(T1)), + max_output_seq_len, + 16 / sizeof(T1)}; +#else + const std::vector self_k_cache_shape = {num_layer_ / pipeline_para_.world_size_, + batch_size * beam_width, + local_head_num_, + size_per_head_ / (16 / sizeof(T2)), + max_output_seq_len, + 16 / sizeof(T2)}; +#endif + const std::vector self_v_cache_shape = {num_layer_ / pipeline_para_.world_size_, + batch_size * beam_width, + local_head_num_, + max_output_seq_len, + size_per_head_}; + { + TensorMap input_map(*input_tensors); + dynamic_decode_layer_->setup(batch_size, beam_width, &input_map); + handleOptArg(&input_map, "start_id", start_ids_buf_, start_id_, batch_size); + handleOptArg(&input_map, "end_id", end_ids_buf_, end_id_, batch_size); + } + + // TODO(bhsueh) Initilaize them in one kernel + // initialize the output ids and parent ids + cudaMemsetAsync(output_ids_buf_, 0, sizeof(int) * batch_size * beam_width * max_seq_len, stream_); + cudaMemsetAsync(parent_ids_buf_, 0, sizeof(int) * batch_size * beam_width * max_seq_len, stream_); + cudaMemsetAsync(tiled_total_padding_count_, 0, sizeof(int) * batch_size * beam_width, stream_); + if (beam_width > 1) { + cudaMemsetAsync(cache_indirections_[0], 0, 2 * sizeof(int) * batch_size * beam_width * max_seq_len, stream_); + } + sync_check_cuda_error(); + // handle first step + if (input_tensors->count("prefix_soft_prompt_embedding") || max_input_length > 1) { + invokeTileGptInputs(tiled_input_ids_buf_, + tiled_input_lengths_buf_, + (int*)input_tensors->at("input_ids").data, + (const int*)(input_tensors->at("input_lengths").data), + batch_size, + beam_width, + max_input_length, + stream_); + sync_check_cuda_error(); + + if (input_tensors->count("prefix_soft_prompt_embedding")) { + inputIdsEmbeddingLookupPosEncodingSoftPromptParam param; + param.from_tensor = context_decoder_input_buf_; + param.output_ids = output_ids_buf_; + param.input_lengths = tiled_input_lengths_buf_; + param.embedding_table = gpt_weights->pre_decoder_embedding_table; + param.pos_table = gpt_weights->position_encoding_table; + param.prefix_soft_prompt_embedding = input_tensors->at("prefix_soft_prompt_embedding").getPtr(); + param.prefix_soft_prompt_lengths = input_tensors->at("prefix_soft_prompt_lengths").getPtr(); + param.input_ids = tiled_input_ids_buf_; + param.start_step = 1; + param.max_input_length = max_input_length; + param.max_prefix_soft_prompt_length = max_prefix_soft_prompt_length; + param.batch_size = batch_size; + param.beam_width = beam_width; + param.hidden_units = hidden_units_; + param.stream = stream_; + + invokeInputIdsEmbeddingLookupPosEncodingSoftPrompt(param); + sync_check_cuda_error(); + max_input_length += max_prefix_soft_prompt_length; // view soft_prompt as input + } + else { + pPromptTuningParam prompt_param{nullptr, 0, 0, false, nullptr}; + invokeInputIdsEmbeddingLookupPosEncoding(context_decoder_input_buf_, + output_ids_buf_, + gpt_weights->pre_decoder_embedding_table, + gpt_weights->position_encoding_table, + prompt_param, + tiled_input_ids_buf_, + 1, + max_input_length, + max_input_length, + batch_size * beam_width, + hidden_units_, + stream_); + sync_check_cuda_error(); + } + + const int max_input_length_padded = (max_input_length + 15) / 16 * 16; + invokeBuildDecoderAttentionMask(input_attention_mask_, + tiled_input_lengths_buf_, + nullptr, + batch_size * beam_width, + max_input_length_padded, + 0, + stream_); + sync_check_cuda_error(); + + std::vector decoder_input_tensors{ + Tensor{MEMORY_GPU, + high_precision_data_type, + {batch_size * beam_width, (size_t)max_input_length, hidden_units_}, + context_decoder_input_buf_}, + Tensor{MEMORY_GPU, + data_type, + {batch_size * beam_width, 1, (size_t)max_input_length_padded, (size_t)max_input_length_padded}, + input_attention_mask_}, + Tensor{MEMORY_GPU, TYPE_INT32, {batch_size * beam_width}, tiled_input_lengths_buf_}}; + + std::vector decoder_output_tensors{ + Tensor{MEMORY_GPU, + high_precision_data_type, + {batch_size * beam_width, (size_t)max_input_length, hidden_units_}, + context_decoder_output_buf_}, +#ifdef FP8_MHA + Tensor{MEMORY_GPU, getTensorType(), self_k_cache_shape, key_cache_}, + Tensor{MEMORY_GPU, getTensorType(), self_v_cache_shape, value_cache_}, +#else + Tensor{MEMORY_GPU, getTensorType(), self_k_cache_shape, key_cache_}, + Tensor{MEMORY_GPU, getTensorType(), self_v_cache_shape, value_cache_}, +#endif + Tensor{MEMORY_GPU, data_type, {batch_size * beam_width, hidden_units_}, decoder_output_buf_}}; + + gpt_context_decoder_->forward( + &decoder_output_tensors, &decoder_input_tensors, &gpt_weights->decoder_layer_weights); + + invokeDecodingInitialize(finished_buf_, + sequence_lengths, + nullptr, + cum_log_probs_, + start_ids_buf_, + batch_size, + beam_width, + max_input_length - 1, + stream_); + sync_check_cuda_error(); + } + else if (max_input_length == 0) { + max_input_length++; + invokeDecodingInitialize(finished_buf_, + sequence_lengths, + output_ids_buf_, + cum_log_probs_, + start_ids_buf_, + batch_size, + beam_width, + max_input_length - 1, + stream_); + std::vector h_input_lengths(batch_size * beam_width, 1); + cudaMemcpyAsync(tiled_input_lengths_buf_, + h_input_lengths.data(), + sizeof(int) * batch_size * beam_width, + cudaMemcpyHostToDevice, + stream_); + sync_check_cuda_error(); + } + else if (max_input_length == 1) { + invokeDecodingInitialize(finished_buf_, + sequence_lengths, + nullptr, + cum_log_probs_, + start_ids_buf_, + batch_size, + beam_width, + max_input_length - 1, + stream_); + sync_check_cuda_error(); + invokeTileGptInputs(tiled_input_ids_buf_, + tiled_input_lengths_buf_, + (int*)input_tensors->at("input_ids").data, + (const int*)(input_tensors->at("input_lengths").data), + batch_size, + beam_width, + max_input_length, + stream_); + sync_check_cuda_error(); + + cudaMemcpyAsync(output_ids_buf_, + tiled_input_ids_buf_, + sizeof(int) * batch_size * beam_width, + cudaMemcpyDeviceToDevice, + stream_); + } + + if (vocab_size_ == vocab_size_padded_) { + padded_embedding_kernel_ptr_ = gpt_weights->post_decoder_embedding.kernel; + } + else { + cudaMemcpyAsync(padded_embedding_kernel_, + gpt_weights->post_decoder_embedding.kernel, + sizeof(T2) * vocab_size_ * hidden_units_, + cudaMemcpyDeviceToDevice, + stream_); + sync_check_cuda_error(); + } + + const size_t memory_len = max_seq_len; + invokeMaskPaddingTokens(masked_tokens_, + input_tensors->at("input_lengths").getPtr(), + memory_len, + max_input_length, + initial_step, + batch_size, + beam_width, + stream_); + + for (int step = max_input_length; step < (int)max_output_seq_len; step++) { + const int src_indir_idx = (step - max_input_length) % 2; + const int tgt_indir_idx = 1 - src_indir_idx; + + const size_t local_batch_size = getLocalBatchSize(batch_size, 1, pipeline_para_.world_size_); + FT_CHECK(batch_size % local_batch_size == 0); + const size_t iteration_num = batch_size / local_batch_size; + + for (uint ite = 0; ite < iteration_num; ++ite) { + const int id_offset = ite * local_batch_size * beam_width; + const int hidden_units_offset = id_offset * hidden_units_; + const int vocab_size_units_offset = id_offset * vocab_size_padded_; + + if (!(max_input_length > 1 && step == max_input_length)) { + if (pipeline_para_.rank_ == 0) { + invokeEmbeddingLookupPosEncodingPadCount(decoder_input_buf_ + hidden_units_offset, + gpt_weights->pre_decoder_embedding_table, + gpt_weights->position_encoding_table, + output_ids_buf_ + id_offset, + tiled_total_padding_count_ + id_offset, + local_batch_size * beam_width, + hidden_units_, + (T2)(1.0f), + step - 1, + batch_size * beam_width, + 0, + stream_); + sync_check_cuda_error(); + } + + TensorMap decoder_input_tensors( + {{"decoder_input", + Tensor(MEMORY_GPU, + high_precision_data_type, + {local_batch_size * beam_width, hidden_units_}, + decoder_input_buf_ + hidden_units_offset)}, + {"finished", + Tensor(MEMORY_GPU, TYPE_BOOL, {local_batch_size * beam_width}, finished_buf_ + id_offset)}, + {"input_lengths", + Tensor(MEMORY_GPU, TYPE_INT32, {local_batch_size * beam_width}, sequence_lengths + id_offset)}, + {"total_padding_tokens", + Tensor(MEMORY_GPU, + TYPE_INT32, + {local_batch_size * beam_width}, + tiled_total_padding_count_ + id_offset)}, + {"max_input_length", Tensor(MEMORY_CPU, TYPE_INT32, {1}, &max_input_length)}, + {"step", Tensor(MEMORY_CPU, TYPE_INT32, {1}, &step)}, + {"ite", Tensor(MEMORY_CPU, TYPE_INT32, {1}, &ite)}, + {"masked_tokens", + Tensor(MEMORY_GPU, + TYPE_BOOL, + {local_batch_size * beam_width, memory_len}, + masked_tokens_ + id_offset * memory_len)}}); + if (beam_width > 1) { + decoder_input_tensors.insert({"cache_indirection", + Tensor(MEMORY_GPU, + TYPE_INT32, + {local_batch_size, beam_width, memory_len}, + cache_indirections_[src_indir_idx] + id_offset * memory_len)}); + } + +#ifdef FP8_MHA + using cache_type = T1; +#else + using cache_type = T2; +#endif + + TensorMap decoder_output_tensors( + {{"decoder_output", + Tensor(MEMORY_GPU, + high_precision_data_type, + {local_batch_size * beam_width, hidden_units_}, + decoder_output_buf_ + hidden_units_offset)}, + {"key_cache", Tensor(MEMORY_GPU, getTensorType(), self_k_cache_shape, key_cache_)}, + {"value_cache", + Tensor(MEMORY_GPU, getTensorType(), self_v_cache_shape, value_cache_)}}); + + gpt_decoder_->forward( + &decoder_output_tensors, &decoder_input_tensors, &gpt_weights->decoder_layer_weights); + } + + if (pipeline_para_.rank_ == pipeline_para_.world_size_ - 1) { + invokeGeneralLayerNorm(normed_decoder_output_buf_ + hidden_units_offset, + decoder_output_buf_ + hidden_units_offset, + gpt_weights->post_decoder_layernorm.gamma, + gpt_weights->post_decoder_layernorm.beta, + layernorm_eps_, + local_batch_size * beam_width, + hidden_units_, + (float*)nullptr, + 0, + stream_); + sync_check_cuda_error(); + + // TODO Support FP8 GEMM + if (tensor_para_.world_size_ == 1) { + float alpha = 1.0f; + float beta = 0.0f; + cublas_wrapper_->Gemm(CUBLAS_OP_T, + CUBLAS_OP_N, + vocab_size_padded_, // n + local_batch_size * beam_width, + hidden_units_, // k + &alpha, + padded_embedding_kernel_ptr_, + sizeof(T2) == 2 ? CUDA_R_16BF : CUDA_R_32F, + hidden_units_, // k + normed_decoder_output_buf_ + hidden_units_offset, + sizeof(T2) == 2 ? CUDA_R_16BF : CUDA_R_32F, + hidden_units_, // k + &beta, + logits_buf_ + vocab_size_units_offset, + CUDA_R_32F, + vocab_size_padded_, /* n */ + CUDA_R_32F, + cublasGemmAlgo_t(-1)); + } + else { + FT_CHECK(vocab_size_padded_ % tensor_para_.world_size_ == 0); + const int local_vocab_size = vocab_size_padded_ / tensor_para_.world_size_; + float alpha = 1.0f; + float beta = 0.0f; + cublas_wrapper_->Gemm(CUBLAS_OP_T, + CUBLAS_OP_N, + local_vocab_size, // n + local_batch_size * beam_width, + hidden_units_, // k + &alpha, + padded_embedding_kernel_ptr_ + + tensor_para_.rank_ * local_vocab_size * hidden_units_, + sizeof(T2) == 2 ? CUDA_R_16BF : CUDA_R_32F, + hidden_units_, // k + normed_decoder_output_buf_ + hidden_units_offset, + sizeof(T2) == 2 ? CUDA_R_16BF : CUDA_R_32F, + hidden_units_, // k + &beta, + nccl_logits_buf_ + vocab_size_units_offset + + tensor_para_.rank_ * local_batch_size * beam_width * local_vocab_size, + CUDA_R_32F, + local_vocab_size, /* n */ + CUDA_R_32F, + cublasGemmAlgo_t(-1)); + ftNcclAllGather(nccl_logits_buf_ + vocab_size_units_offset, + nccl_logits_buf_ + vocab_size_units_offset, + local_batch_size * beam_width * local_vocab_size, + tensor_para_.rank_, + tensor_para_, + stream_); + check_cuda_error(cudaStreamSynchronize(stream_)); + invokeTransposeAxis01(logits_buf_ + vocab_size_units_offset, + nccl_logits_buf_ + vocab_size_units_offset, + tensor_para_.world_size_, + local_batch_size * beam_width, + local_vocab_size, + stream_); + } + + int tmp_local_batch_size = local_batch_size; + bool is_initialize_random_table = step == max_input_length; + std::unordered_map dynamic_decode_input_tensors{ + {"logits", + Tensor{MEMORY_GPU, TYPE_FP32, {batch_size, beam_width, vocab_size_padded_}, logits_buf_}}, + {"embedding_bias", Tensor{MEMORY_GPU, data_type, {vocab_size_padded_}, nullptr}}, + {"step", Tensor{MEMORY_CPU, TYPE_INT32, {1}, &step}}, + {"max_input_length", Tensor{MEMORY_CPU, TYPE_INT32, {1}, &max_input_length}}, + {"end_id", Tensor{MEMORY_GPU, TYPE_INT32, {batch_size}, end_ids_buf_}}, + {"input_lengths", + Tensor{MEMORY_GPU, TYPE_INT32, {batch_size, beam_width}, tiled_input_lengths_buf_}}, + {"ite", Tensor{MEMORY_CPU, TYPE_UINT32, {1}, &ite}}, + {"src_key_cache", Tensor{MEMORY_GPU, data_type, self_k_cache_shape, key_cache_}}, + {"src_value_cache", Tensor{MEMORY_GPU, data_type, self_v_cache_shape, value_cache_}}, + {"src_cache_indirection", + Tensor{MEMORY_GPU, + TYPE_INT32, + {local_batch_size, beam_width, max_output_seq_len}, + cache_indirections_[src_indir_idx] + id_offset * max_output_seq_len}}, + {"local_batch_size", Tensor{MEMORY_CPU, TYPE_INT32, {1}, &tmp_local_batch_size}}, + {"is_initialize_random_table", Tensor{MEMORY_CPU, TYPE_BOOL, {1}, &is_initialize_random_table}}}; + + for (auto t = input_tensors->begin(); t != input_tensors->end(); ++t) { + dynamic_decode_input_tensors.insert(*t); + } + + // common outputs + std::unordered_map dynamic_decode_output_tensors{ + {"output_ids", + Tensor{MEMORY_GPU, TYPE_INT32, {max_seq_len, batch_size, beam_width}, output_ids_buf_}}, + {"finished", Tensor{MEMORY_GPU, TYPE_BOOL, {batch_size * beam_width}, finished_buf_}}, + {"cum_log_probs", Tensor{MEMORY_GPU, TYPE_FP32, {batch_size * beam_width}, cum_log_probs_}}, + {"parent_ids", + Tensor{MEMORY_GPU, TYPE_INT32, {max_seq_len, batch_size, beam_width}, parent_ids_buf_}}, + {"sequence_length", Tensor{MEMORY_GPU, TYPE_INT32, {batch_size * beam_width}, sequence_lengths}}, + {"tgt_cache_indirection", + Tensor{MEMORY_GPU, + TYPE_INT32, + {local_batch_size, beam_width, max_output_seq_len}, + cache_indirections_[tgt_indir_idx] + id_offset * max_output_seq_len}}}; + + for (auto t = output_tensors->begin(); t != output_tensors->end(); ++t) { + dynamic_decode_output_tensors.insert(*t); + } + + dynamic_decode_layer_->forward(&dynamic_decode_output_tensors, &dynamic_decode_input_tensors); + } + + if (pipeline_para_.world_size_ > 1) { + NCCLCHECK(ncclGroupStart()); + ftNcclBroadCast(output_ids_buf_ + step * batch_size * beam_width, + batch_size * beam_width, + pipeline_para_.world_size_ - 1, + pipeline_para_, + stream_); + + ftNcclBroadCast( + sequence_lengths, batch_size * beam_width, pipeline_para_.world_size_ - 1, pipeline_para_, stream_); + + ftNcclBroadCast( + finished_buf_, batch_size * beam_width, pipeline_para_.world_size_ - 1, pipeline_para_, stream_); + + if (beam_width > 1) { + // TODO(bhsueh) Check that do we need this broadcast + ftNcclBroadCast(parent_ids_buf_ + step * batch_size * beam_width, + batch_size * beam_width, + pipeline_para_.world_size_ - 1, + pipeline_para_, + stream_); + + ftNcclBroadCast(cache_indirections_[tgt_indir_idx], + batch_size * beam_width * max_output_seq_len, + pipeline_para_.world_size_ - 1, + pipeline_para_, + stream_); + } + NCCLCHECK(ncclGroupEnd()); + check_cuda_error(cudaStreamSynchronize(stream_)); + sync_check_cuda_error(); + } + + cudaD2Hcpy(h_finished_buf_, finished_buf_, batch_size * beam_width); + uint sum = 0; + for (uint i = 0; i < batch_size * beam_width; i++) { + sum += (int)h_finished_buf_[i]; + } + if (sum == batch_size * beam_width) { + break; + } + } + + if (step == initial_step + max_input_length) { + /* We have just finished processing input: update the padding count: + * total_padding_count += (max_input_length - input_lengths) */ + invokeUpdatePaddingCount(tiled_total_padding_count_, + input_tensors->at("input_lengths").getPtr(), + max_input_length, + batch_size, + beam_width, + stream_); + } + } + + if (input_tensors->at("input_ids").shape[1] == 0) { + if (beam_width > 1) { + // For beam search, do gather_tree + invokeGatherTree(transposed_output_ids_buf_, + sequence_lengths, + max_output_seq_len, + batch_size, + beam_width, + output_ids_buf_ + batch_size * beam_width, + parent_ids_buf_ + batch_size * beam_width, + end_ids_buf_, + stream_); + + // transpose and take output_parent_ids as inter buffer + invokeTransposeAxis01((int*)output_tensors->at("output_ids").data, + transposed_output_ids_buf_, + max_output_seq_len - 1, + batch_size * beam_width, + 1, + stream_); + } + else { + // For sampling, only transpose the results to output_tensor + invokeTransposeAxis01((int*)output_tensors->at("output_ids").data, + output_ids_buf_ + batch_size * beam_width, + max_output_seq_len - 1, + batch_size * beam_width, + 1, + stream_); + } + } + else { + // For sampling, it is equivalent to all parent ids are 0. + gatherTreeParam param; + param.beams = transposed_output_ids_buf_; + // Remove prompt length if possible + param.max_sequence_lengths = sequence_lengths; + // add sequence_length 1 here because the sequence_length of time step t is t - 1 + param.max_sequence_length_final_step = 1; + // response input lengths (used to slice the ids during postprocessing) + param.response_input_lengths = output_tensors->count("response_input_lengths") ? + output_tensors->at("response_input_lengths").getPtr() : + nullptr; + param.max_time = max_output_seq_len; + param.batch_size = batch_size; + param.beam_width = beam_width; + param.step_ids = output_ids_buf_; + param.parent_ids = beam_width == 1 ? nullptr : parent_ids_buf_; + param.end_tokens = end_ids_buf_; + param.max_input_length = max_input_length; + param.prefix_soft_prompt_lengths = input_tensors->count("prefix_soft_prompt_lengths") ? + input_tensors->at("prefix_soft_prompt_lengths").getPtr() : + nullptr; + param.input_lengths = tiled_input_lengths_buf_; + // param.p_prompt_tuning_prompt_lengths = has_p_prompt_tuning_ ? tiled_prompt_lengths_buf_ : nullptr; + param.p_prompt_tuning_prompt_lengths = nullptr; + const int max_input_without_prompt_length = max_input_length; + param.max_input_without_prompt_length = max_input_without_prompt_length; + param.max_prefix_soft_prompt_length = max_prefix_soft_prompt_length; + param.stream = stream_; + param.output_ids = output_tensors->at("output_ids").getPtr(); + // NOTE: need to remove all prompt virtual tokens + invokeGatherTree(param); + sync_check_cuda_error(); + } +} + +template +size_t GptFP8::getPipelineParallelRank() +{ + return pipeline_para_.rank_; +} + +template +size_t GptFP8::getPipelineParallelSize() +{ + return pipeline_para_.world_size_; +} + +template +size_t GptFP8::getTensorParallelRank() +{ + return tensor_para_.rank_; +} + +template +size_t GptFP8::getTensorParallelSize() +{ + return tensor_para_.world_size_; +} + +template +bool* GptFP8::getFinishBuffer() +{ + return finished_buf_; +} + +// template class GptFP8<__nv_fp8_e4m3>; +template class GptFP8<__nv_fp8_e4m3, __nv_bfloat16>; +// template class GptFP8<__nv_bfloat16, __nv_fp8_e4m3>; +// template class GptFP8<__nv_bfloat16, __nv_bfloat16>; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/gpt_fp8/GptFP8.h b/src/fastertransformer/models/gpt_fp8/GptFP8.h new file mode 100644 index 000000000..53bd16e4c --- /dev/null +++ b/src/fastertransformer/models/gpt_fp8/GptFP8.h @@ -0,0 +1,135 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include +#include + +#include "src/fastertransformer/layers/DynamicDecodeLayer.h" +#include "src/fastertransformer/models/gpt_fp8/GptFP8ContextDecoder.h" +#include "src/fastertransformer/models/gpt_fp8/GptFP8Decoder.h" +#include "src/fastertransformer/models/gpt_fp8/GptFP8Weight.h" + +namespace fastertransformer { + +template +class GptFP8: public BaseLayer { +private: + // meta data + size_t head_num_; + size_t size_per_head_; + size_t inter_size_; + size_t num_layer_; + size_t vocab_size_; + + int start_id_; + int end_id_; + size_t hidden_units_; + + size_t local_head_num_; + NcclParam tensor_para_; + NcclParam pipeline_para_; + + const bool is_context_qk_buf_float_ = true; + size_t vocab_size_padded_; + const int int8_mode_ = 0; + + GptFP8Decoder* gpt_decoder_; + GptFP8ContextDecoder* gpt_context_decoder_; + DynamicDecodeLayer* dynamic_decode_layer_; + + void allocateBuffer() override; + void allocateBuffer(size_t batch_size, size_t beam_width, size_t max_seq_len, size_t max_input_len); + void freeBuffer() override; + + void initialize(); + +protected: + T2* padded_embedding_kernel_; + const T2* padded_embedding_kernel_ptr_; + + T1* input_attention_mask_; + + T2* decoder_input_buf_; + T2* decoder_output_buf_; + T2* normed_decoder_output_buf_; + float* logits_buf_; + float* nccl_logits_buf_; + float* cum_log_probs_; + bool* finished_buf_; + bool* h_finished_buf_; + +#ifdef FP8_MHA + T1* key_cache_; + T1* value_cache_; +#else + T2* key_cache_; + T2* value_cache_; +#endif + int* cache_indirections_[2] = {nullptr, nullptr}; + + int* tiled_input_ids_buf_; + int* tiled_input_lengths_buf_; + + int* start_ids_buf_; + int* end_ids_buf_; + + int* transposed_output_ids_buf_; + int* output_ids_buf_; + int* parent_ids_buf_; + int* tiled_total_padding_count_; + bool* masked_tokens_; + + T2* context_decoder_input_buf_; + T2* context_decoder_output_buf_; + + float layernorm_eps_ = 1e-6f; + +public: + GptFP8(size_t beam_width, + size_t head_num, + size_t size_per_head, + size_t inter_size, + size_t num_layer, + size_t vocab_size, + int start_id, + int end_id, + NcclParam tensor_para, + NcclParam pipeline_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + cudaDeviceProp* cuda_device_prop = nullptr, + bool sparse = false); + + GptFP8(GptFP8 const& gpt); + + ~GptFP8(); + + void forward(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors, + const GptFP8Weight* gpt_weights); + + size_t getPipelineParallelRank(); + size_t getPipelineParallelSize(); + size_t getTensorParallelRank(); + size_t getTensorParallelSize(); + bool* getFinishBuffer(); +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/gpt_fp8/GptFP8ContextDecoder.cc b/src/fastertransformer/models/gpt_fp8/GptFP8ContextDecoder.cc new file mode 100644 index 000000000..ebccc6042 --- /dev/null +++ b/src/fastertransformer/models/gpt_fp8/GptFP8ContextDecoder.cc @@ -0,0 +1,369 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/models/gpt_fp8/GptFP8ContextDecoder.h" +#include "src/fastertransformer/kernels/add_residual_kernels.h" +#include "src/fastertransformer/kernels/gpt_kernels.h" + +namespace fastertransformer { + +template +void GptFP8ContextDecoder::initialize() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + self_attention_layer_ = new TensorParallelGptContextAttentionFP8Layer(head_num_, + size_per_head_, + 0, + tensor_para_, + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + is_qk_buf_float_, + sparse_); + + ffn_layer_ = new TensorParallelGeluFfnFP8Layer(inter_size_, + tensor_para_, + 2, // fp8_mode + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + sparse_); +} + +template +void GptFP8ContextDecoder::allocateBuffer() +{ + FT_CHECK(false); +} + +template +void GptFP8ContextDecoder::allocateBuffer(size_t batch_size, size_t seq_len) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + decoder_normed_input_ = reinterpret_cast( + allocator_->reMalloc(decoder_normed_input_, sizeof(T1) * batch_size * seq_len * hidden_units_, false)); + self_attn_output_ = reinterpret_cast( + allocator_->reMalloc(self_attn_output_, sizeof(T2) * batch_size * seq_len * hidden_units_, false)); + normed_self_attn_output_ = decoder_normed_input_; // reuse the buffer + decoder_layer_output_ = reinterpret_cast( + allocator_->reMalloc(decoder_layer_output_, sizeof(T2) * batch_size * seq_len * hidden_units_, false)); + is_allocate_buffer_ = true; +} + +template +void GptFP8ContextDecoder::freeBuffer() +{ + if (is_allocate_buffer_) { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + allocator_->free((void**)(&decoder_normed_input_)); + allocator_->free((void**)(&self_attn_output_)); + allocator_->free((void**)(&decoder_layer_output_)); + is_allocate_buffer_ = false; + } +} + +template +bool GptFP8ContextDecoder::isValidLayerParallelId(uint l) +{ + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return l < num_layer_ && (l >= local_num_layer * pipeline_para_.rank_) + && (l < local_num_layer * (pipeline_para_.rank_ + 1)); +} + +template +bool GptFP8ContextDecoder::isFirstLayerParallelId(uint l) +{ + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return l < num_layer_ && (l == local_num_layer * pipeline_para_.rank_); +} + +template +bool GptFP8ContextDecoder::isLastLayerParallelId(uint l) +{ + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return l < num_layer_ && (l == local_num_layer * (pipeline_para_.rank_ + 1) - 1); +} + +template +int GptFP8ContextDecoder::getFirstLayerParallelId() +{ + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return local_num_layer * pipeline_para_.rank_; +} + +template +GptFP8ContextDecoder::GptFP8ContextDecoder(size_t head_num, + size_t size_per_head, + size_t inter_size, + size_t num_layer, + NcclParam tensor_para, + NcclParam pipeline_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool is_qk_buf_float, + bool sparse): + BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward, nullptr, sparse), + head_num_(head_num), + size_per_head_(size_per_head), + inter_size_(inter_size), + num_layer_(num_layer), + hidden_units_(head_num_ * size_per_head), + tensor_para_(tensor_para), + pipeline_para_(pipeline_para), + is_qk_buf_float_(is_qk_buf_float) +{ + initialize(); +} + +template +GptFP8ContextDecoder::GptFP8ContextDecoder(GptFP8ContextDecoder const& decoder): + BaseLayer(decoder.stream_, decoder.cublas_wrapper_, decoder.allocator_, decoder.is_free_buffer_after_forward_), + head_num_(decoder.head_num_), + size_per_head_(decoder.size_per_head_), + inter_size_(decoder.inter_size_), + num_layer_(decoder.num_layer_), + hidden_units_(decoder.hidden_units_), + tensor_para_(decoder.tensor_para_), + pipeline_para_(decoder.pipeline_para_), + is_qk_buf_float_(decoder.is_qk_buf_float_) +{ + initialize(); +} + +template +GptFP8ContextDecoder::~GptFP8ContextDecoder() +{ + delete self_attention_layer_; + delete ffn_layer_; + freeBuffer(); +} + +template +void GptFP8ContextDecoder::forward( + std::vector* output_tensors, + const std::vector* input_tensors, + const std::vector*>* gpt_decoder_layer_weight) +{ + // input tensors: + // decoder_input [batch_size, seq_len, hidden_dimension], + // attention_mask [batch_size, 1, seq_len, seq_len] + // input_lengths [batch_size] + + // output tensors: + // decoder_output [batch_size, seq_len, hidden_dimension], + // key_cache [num_layer, batch, local_head_num, size_per_head // x, max_seq_len, x] + // value_cache [num_layer, batch, local_head_num, max_seq_len, size_per_head] + // last_token_hidden_units [batch_size, hidden_dimension] + + // To use layer/pipeline parallelism, we view the shape of 'batch_size' to 'ite * local_batch_size'. + // For example, the shape of decoder_input becomes [ite, batch_size, seq_len, hidden_dimension] during + // computing. + + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + FT_CHECK(input_tensors->size() == 3); + FT_CHECK(output_tensors->size() == 4); + const size_t batch_size = (size_t)input_tensors->at(0).shape[0]; + const size_t seq_len = (size_t)input_tensors->at(0).shape[1]; + allocateBuffer(batch_size, seq_len); + + const DataType data_type = getTensorType(); + const DataType high_precision_type = getTensorType(); + + const size_t local_batch_size = getLocalBatchSize(batch_size, seq_len, pipeline_para_.world_size_); + FT_CHECK(batch_size % local_batch_size == 0); + const size_t iteration_num = batch_size / local_batch_size; + + std::vector self_k_cache_size; + self_k_cache_size.push_back(local_batch_size); + for (auto t = output_tensors->at(1).shape.begin() + 2; t != output_tensors->at(1).shape.end(); ++t) { + self_k_cache_size.push_back(*t); + } + std::vector self_v_cache_size; + self_v_cache_size.push_back(local_batch_size); + for (auto t = output_tensors->at(2).shape.begin() + 2; t != output_tensors->at(2).shape.end(); ++t) { + self_v_cache_size.push_back(*t); + } + for (uint ite = 0; ite < iteration_num; ite++) { + for (uint l = 0; l < num_layer_; l++) { + if (isValidLayerParallelId(l) == false) + continue; + + // const bool is_final = l == (num_layer_ - 1); + const bool is_final = false; // TODO(bhsueh) remove this flag + T2* decoder_input = + (l == 0) ? (T2*)(input_tensors->at(0).data) + (int)(ite * local_batch_size * seq_len * hidden_units_) : + decoder_layer_output_; + T2* decoder_output = + (l == (num_layer_ - 1)) ? + (T2*)(output_tensors->at(0).data) + (int)(ite * local_batch_size * seq_len * hidden_units_) : + decoder_layer_output_; + + if (isFirstLayerParallelId(l) && pipeline_para_.rank_ != 0) { + const int data_size = local_batch_size * seq_len * hidden_units_ / tensor_para_.world_size_; + ftNcclRecv(decoder_input + data_size * tensor_para_.rank_, + data_size, + pipeline_para_.rank_ - 1, + pipeline_para_, + stream_); + if (tensor_para_.world_size_ > 1) { + ftNcclAllGather(decoder_input, decoder_input, data_size, tensor_para_.rank_, tensor_para_, stream_); + } + } + + { + FP8LayerNormParam param{ + decoder_normed_input_, + decoder_input, + gpt_decoder_layer_weight->at(l)->pre_layernorm_weights.gamma, + gpt_decoder_layer_weight->at(l)->pre_layernorm_weights.beta, + gpt_decoder_layer_weight->at(l)->identity_scale, + gpt_decoder_layer_weight->at(l)->self_attention_weights.query_weight.input_scale_inv, + local_batch_size * seq_len, + hidden_units_, + stream_, + true}; + invokeFP8LayerNorm(param); + sync_check_cuda_error(); + } + TensorMap self_attention_input_tensors{ + {"input_query", + Tensor{MEMORY_GPU, data_type, {local_batch_size * seq_len, hidden_units_}, decoder_normed_input_}}, + {"attention_mask", + Tensor{MEMORY_GPU, + data_type, + {local_batch_size, 1, seq_len, seq_len}, + (const T1*)input_tensors->at(1).data + local_batch_size * ite * seq_len * seq_len}}, + {"is_final_layer", Tensor{MEMORY_CPU, TYPE_BOOL, {1}, &is_final}}}; + + size_t cache_offset = l - getFirstLayerParallelId(); + for (auto t = output_tensors->at(1).shape.begin() + 1; t != output_tensors->at(1).shape.end(); ++t) { + cache_offset *= *t; + }; + size_t ite_cache_offset = ite * local_batch_size; + for (auto t = output_tensors->at(1).shape.begin() + 2; t != output_tensors->at(1).shape.end(); ++t) { + ite_cache_offset *= *t; + } + cache_offset += ite_cache_offset; + +#ifdef FP8_MHA + TensorMap self_attention_output_tensors{ + {"input_query", + Tensor{ + MEMORY_GPU, high_precision_type, {local_batch_size * seq_len, hidden_units_}, self_attn_output_}}, + {"attention_mask", + Tensor{ + MEMORY_GPU, data_type, self_k_cache_size, ((const T1*)output_tensors->at(1).data) + cache_offset}}, + {"is_final_layer", + Tensor{MEMORY_GPU, + data_type, + self_v_cache_size, + ((const T1*)output_tensors->at(2).data) + cache_offset}}}; +#else + TensorMap self_attention_output_tensors{ + {"attention_out", + Tensor{ + MEMORY_GPU, high_precision_type, {local_batch_size * seq_len, hidden_units_}, self_attn_output_}}, + {"key_cache", + Tensor{MEMORY_GPU, + high_precision_type, + self_k_cache_size, + ((const T2*)output_tensors->at(1).data) + cache_offset}}, + {"value_cache", + Tensor{MEMORY_GPU, + high_precision_type, + self_v_cache_size, + ((const T2*)output_tensors->at(2).data) + cache_offset}}}; +#endif + self_attention_layer_->forward( + &self_attention_output_tensors, + &self_attention_input_tensors, + (const AttentionWeight*)&gpt_decoder_layer_weight->at(l)->self_attention_weights); + + if (is_final == false) { + { + GeneralFP8AddBiasResidualPreLayerNormParam param{ + normed_self_attn_output_, + self_attn_output_, + decoder_input, + gpt_decoder_layer_weight->at(l)->self_attention_weights.attention_output_weight.bias, + gpt_decoder_layer_weight->at(l)->self_attn_layernorm_weights.gamma, + gpt_decoder_layer_weight->at(l)->self_attn_layernorm_weights.beta, + nullptr, // gpt_decoder_layer_weight->at(l)->self_attention_weights.attention_output_weight.weight_scale, + gpt_decoder_layer_weight->at(l)->ffn_weights.intermediate_weight.input_scale_inv, + local_batch_size * seq_len, + hidden_units_, + stream_, + true}; + invokeGeneralFP8AddBiasResidualPreLayerNorm(param); + sync_check_cuda_error(); + } + + TensorMap ffn_input_tensors = TensorMap(std::unordered_map{ + {"input_hidden_state", + Tensor{MEMORY_GPU, + data_type, + std::vector{local_batch_size * seq_len, hidden_units_}, + normed_self_attn_output_}}}); + TensorMap ffn_output_tensors = TensorMap(std::unordered_map{ + {"output_hidden_state", + Tensor{MEMORY_GPU, + high_precision_type, + std::vector{local_batch_size * seq_len, hidden_units_}, + decoder_output}}}); + + ffn_layer_->forward( + &ffn_output_tensors, &ffn_input_tensors, &gpt_decoder_layer_weight->at(l)->ffn_weights); + invokeAddBiasResidual(decoder_output, + self_attn_output_, + gpt_decoder_layer_weight->at(l)->ffn_weights.output_weight.bias, + local_batch_size * seq_len, + hidden_units_, + stream_); + sync_check_cuda_error(); + + if (isLastLayerParallelId(l) == true && pipeline_para_.rank_ != pipeline_para_.world_size_ - 1) { + const int data_size = local_batch_size * seq_len * hidden_units_ / tensor_para_.world_size_; + ftNcclSend(decoder_output + data_size * tensor_para_.rank_, + data_size, + pipeline_para_.rank_ + 1, + pipeline_para_, + stream_); + } + } + } + } + + // TODO(bhsueh) We could optimize this point by only computing the last token for the last layer + invokeLookupHiddenStateOfLastToken((T2*)output_tensors->at(3).data, + (T2*)output_tensors->at(0).data, + (int*)input_tensors->at(2).data, + seq_len, + batch_size, + hidden_units_, + stream_); + + if (is_free_buffer_after_forward_ == true) { + freeBuffer(); + } +} + +template class GptFP8ContextDecoder<__nv_fp8_e4m3, __nv_bfloat16>; + +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/models/gpt_fp8/GptFP8ContextDecoder.h b/src/fastertransformer/models/gpt_fp8/GptFP8ContextDecoder.h new file mode 100644 index 000000000..f5c8dc402 --- /dev/null +++ b/src/fastertransformer/models/gpt_fp8/GptFP8ContextDecoder.h @@ -0,0 +1,91 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include + +// #include "src/fastertransformer/kernels/add_residual_fp8_kernels.h" +#include "src/fastertransformer/kernels/layernorm_fp8_kernels.h" +#include "src/fastertransformer/layers/BaseLayer.h" +#include "src/fastertransformer/layers/TensorParallelGeluFfnFP8Layer.h" +#include "src/fastertransformer/layers/attention_layers_fp8/TensorParallelGptContextAttentionFP8Layer.h" +#include "src/fastertransformer/models/gpt_fp8/GptFP8DecoderLayerWeight.h" +#include "src/fastertransformer/utils/Tensor.h" +#include "src/fastertransformer/utils/allocator.h" +#include "src/fastertransformer/utils/cublasFP8MMWrapper.h" + +namespace fastertransformer { + +template +class GptFP8ContextDecoder: public BaseLayer { +private: + // meta data + size_t head_num_; + size_t size_per_head_; + size_t inter_size_; + size_t num_layer_; + + // calculated data + size_t hidden_units_; + + NcclParam tensor_para_; + NcclParam pipeline_para_; + + bool is_qk_buf_float_; + + BaseAttentionLayer* self_attention_layer_; + FfnFP8Layer* ffn_layer_; + + void allocateBuffer() override; + void allocateBuffer(size_t batch_size, size_t seq_len); + void freeBuffer() override; + bool isValidLayerParallelId(uint l); + void initialize(); + bool isFirstLayerParallelId(uint l); + bool isLastLayerParallelId(uint l); + int getFirstLayerParallelId(); + + T1* decoder_normed_input_ = nullptr; + T2* self_attn_output_ = nullptr; + T1* normed_self_attn_output_ = nullptr; + T2* decoder_layer_output_ = nullptr; + +protected: +public: + GptFP8ContextDecoder(size_t head_num, + size_t size_per_head, + size_t inter_size, + size_t num_layer, + NcclParam tensor_para, + NcclParam pipeline_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool is_qk_buf_float, + bool sparse = false); + + GptFP8ContextDecoder(GptFP8ContextDecoder const& decoder); + + ~GptFP8ContextDecoder(); + + void forward(std::vector* output_tensors, + const std::vector* input_tensors, + const std::vector*>* decoder_layer_weights); +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/gpt_fp8/GptFP8Decoder.cc b/src/fastertransformer/models/gpt_fp8/GptFP8Decoder.cc new file mode 100644 index 000000000..8ea0ea099 --- /dev/null +++ b/src/fastertransformer/models/gpt_fp8/GptFP8Decoder.cc @@ -0,0 +1,384 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/models/gpt_fp8/GptFP8Decoder.h" +#include "src/fastertransformer/kernels/add_residual_kernels.h" +#include "src/fastertransformer/kernels/layernorm_fp8_kernels.h" + +namespace fastertransformer { + +template +void GptFP8Decoder::initialize() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + self_attention_layer_ = new TensorParallelDecoderSelfAttentionFP8Layer(head_num_, + size_per_head_, + 0, + false, + head_num_ * size_per_head_, + 1.0f, + tensor_para_, + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + sparse_); + + ffn_layer_ = new TensorParallelGeluFfnFP8Layer( + inter_size_, tensor_para_, 2, stream_, cublas_wrapper_, allocator_, is_free_buffer_after_forward_, sparse_); +} + +template +GptFP8Decoder::GptFP8Decoder(size_t head_num, + size_t size_per_head, + size_t inter_size, + size_t num_layer, + NcclParam tensor_para, + NcclParam pipeline_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool sparse): + BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward, nullptr, sparse), + head_num_(head_num), + size_per_head_(size_per_head), + inter_size_(inter_size), + num_layer_(num_layer), + hidden_units_(head_num_ * size_per_head_), + tensor_para_(tensor_para), + pipeline_para_(pipeline_para) +{ + initialize(); +} + +template +GptFP8Decoder::GptFP8Decoder(GptFP8Decoder const& decoder): + BaseLayer(decoder.stream_, + decoder.cublas_wrapper_, + decoder.allocator_, + decoder.is_free_buffer_after_forward_, + decoder.cuda_device_prop_, + decoder.sparse_), + head_num_(decoder.head_num_), + size_per_head_(decoder.size_per_head_), + inter_size_(decoder.inter_size_), + num_layer_(decoder.num_layer_), + hidden_units_(decoder.hidden_units_), + tensor_para_(decoder.tensor_para_), + pipeline_para_(decoder.pipeline_para_) +{ + initialize(); +} + +template +void GptFP8Decoder::allocateBuffer() +{ + FT_CHECK(false); +} + +template +void GptFP8Decoder::allocateBuffer(size_t batch_size) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + decoder_layer_output_ = reinterpret_cast( + allocator_->reMalloc(decoder_layer_output_, sizeof(T2) * batch_size * hidden_units_, false)); + decoder_normed_input_ = reinterpret_cast( + allocator_->reMalloc(decoder_normed_input_, sizeof(T1) * batch_size * hidden_units_, false)); + self_attn_output_ = + reinterpret_cast(allocator_->reMalloc(self_attn_output_, sizeof(T2) * batch_size * hidden_units_, false)); + normed_self_attn_output_ = reinterpret_cast( + allocator_->reMalloc(normed_self_attn_output_, sizeof(T1) * batch_size * hidden_units_, false)); + is_allocate_buffer_ = true; +} + +template +void GptFP8Decoder::freeBuffer() +{ + if (is_allocate_buffer_) { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + allocator_->free((void**)(&decoder_layer_output_)); + allocator_->free((void**)(&decoder_normed_input_)); + allocator_->free((void**)(&self_attn_output_)); + allocator_->free((void**)(&normed_self_attn_output_)); + is_allocate_buffer_ = false; + } +} + +template +bool GptFP8Decoder::isValidLayerParallelId(uint l) +{ + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return l < num_layer_ && (l >= local_num_layer * pipeline_para_.rank_) + && (l < local_num_layer * (pipeline_para_.rank_ + 1)); +} + +template +bool GptFP8Decoder::isFirstLayerParallelId(uint l) +{ + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return l < num_layer_ && (l == local_num_layer * pipeline_para_.rank_); +} + +template +bool GptFP8Decoder::isLastLayerParallelId(uint l) +{ + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return l < num_layer_ && (l == local_num_layer * (pipeline_para_.rank_ + 1) - 1); +} + +template +int GptFP8Decoder::getFirstLayerParallelId() +{ + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return local_num_layer * pipeline_para_.rank_; +} + +template +GptFP8Decoder::~GptFP8Decoder() +{ + delete self_attention_layer_; + delete ffn_layer_; + freeBuffer(); +} + +template +void GptFP8Decoder::forward(TensorMap* output_tensors, + const TensorMap* input_tensors, + const std::vector*>* gpt_decoder_layer_weight) +{ + // input tensors: + // decoder_input [local_batch_size, hidden_dimension], + // finished [local_batch_size], + // input_lengths [local_batch_size], + // total_padding_tokens [local_batch_size] + // max_input_length [1] on cpu + // step [1] on cpu + // ite [1] on cpu + // cache_indirection [local_batch_size / beam_width, beam_width, memory_len] + // Here, local_batch_size contains the beam_width, so local_batch_size / beam_width + // is real local_batch_size. (optional.) + // masked_tokens [local_batch_size, memory_len] + + // output tensors: + // decoder_output [local_batch_size, hidden_dimension], + // key_cache [num_layer, batch_size, head_num, size_per_head // x, max_seq_len, x] + // value_cache [num_layer, batch_size, head_num, max_seq_len, size_per_head] + + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + + FT_CHECK(input_tensors->isExist("decoder_input")); + FT_CHECK(input_tensors->isExist("finished")); + FT_CHECK(input_tensors->isExist("input_lengths")); + FT_CHECK(input_tensors->isExist("total_padding_tokens")); + FT_CHECK(input_tensors->isExist("max_input_length")); + FT_CHECK(input_tensors->isExist("step")); + FT_CHECK(input_tensors->isExist("ite")); + FT_CHECK(input_tensors->isExist("masked_tokens")); + FT_CHECK(output_tensors->isExist("decoder_output")); + FT_CHECK(output_tensors->isExist("key_cache")); + FT_CHECK(output_tensors->isExist("value_cache")); + + const size_t local_batch_size = input_tensors->at("decoder_input").shape[0]; + allocateBuffer(local_batch_size); + + const DataType data_type = getTensorType(); + const DataType high_precision_type = getTensorType(); + const int ite = input_tensors->getVal("ite"); + + std::vector self_k_cache_size; + self_k_cache_size.push_back(local_batch_size); + for (auto t = output_tensors->at("key_cache").shape.begin() + 2; t != output_tensors->at("key_cache").shape.end(); + ++t) { + self_k_cache_size.push_back(*t); + } + std::vector self_v_cache_size; + self_v_cache_size.push_back(local_batch_size); + for (auto t = output_tensors->at("value_cache").shape.begin() + 2; + t != output_tensors->at("value_cache").shape.end(); + ++t) { + self_v_cache_size.push_back(*t); + } + + for (uint l = 0; l < num_layer_; l++) { + if (isValidLayerParallelId(l) == false) { + continue; + } + T2* decoder_input = (T2*)((l == 0) ? input_tensors->getPtr("decoder_input") : decoder_layer_output_); + T2* decoder_output = + (T2*)((l == num_layer_ - 1) ? output_tensors->getPtr("decoder_output") : decoder_layer_output_); + + if (isFirstLayerParallelId(l) == true && pipeline_para_.rank_ != 0 && pipeline_para_.world_size_ > 1) { + // ftNcclRecv(decoder_input, local_batch_size * hidden_units_, pipeline_para_.rank_ - 1, pipeline_para_, + // stream_); + + ftNcclRecv(decoder_input + local_batch_size * hidden_units_ / tensor_para_.world_size_ * tensor_para_.rank_, + local_batch_size * hidden_units_ / tensor_para_.world_size_, + pipeline_para_.rank_ - 1, + pipeline_para_, + stream_); + if (tensor_para_.world_size_ > 1) { + ftNcclAllGather(decoder_input, + decoder_input, + local_batch_size * hidden_units_ / tensor_para_.world_size_, + tensor_para_.rank_, + tensor_para_, + stream_); + } + } + + size_t cache_offset = l - getFirstLayerParallelId(); + for (auto t = output_tensors->at("key_cache").shape.begin() + 1; + t != output_tensors->at("key_cache").shape.end(); + ++t) { + cache_offset *= *t; + }; + size_t ite_cache_offset = ite * local_batch_size; + for (auto t = output_tensors->at("key_cache").shape.begin() + 2; + t != output_tensors->at("key_cache").shape.end(); + ++t) { + ite_cache_offset *= *t; + } + cache_offset += ite_cache_offset; + + { + FP8LayerNormParam param{ + decoder_normed_input_, + (T2*)decoder_input, + gpt_decoder_layer_weight->at(l)->pre_layernorm_weights.gamma, + gpt_decoder_layer_weight->at(l)->pre_layernorm_weights.beta, + gpt_decoder_layer_weight->at(l)->identity_scale, + gpt_decoder_layer_weight->at(l)->self_attention_weights.query_weight.input_scale_inv, + (int)local_batch_size, + (int)hidden_units_, + stream_, + true}; + invokeFP8LayerNorm(param); + sync_check_cuda_error(); + } + + TensorMap self_attention_input_tensors{ + {"attention_input", + Tensor{MEMORY_GPU, data_type, {local_batch_size, hidden_units_}, decoder_normed_input_}}, + {"finished", input_tensors->at("finished")}, + {"sequence_lengths", input_tensors->at("input_lengths")}, + {"total_padding_tokens", input_tensors->at("total_padding_tokens")}, + {"max_input_length", input_tensors->at("max_input_length")}, + {"step", input_tensors->at("step")}, + {"masked_tokens", input_tensors->at("masked_tokens")}}; + if (input_tensors->isExist("cache_indirection")) { + self_attention_input_tensors.insert("cache_indirection", input_tensors->at("cache_indirection")); + } + +#ifdef FP8_MHA + TensorMap self_attention_output_tensors{ + {"attention_output", + Tensor{MEMORY_GPU, high_precision_type, {local_batch_size, hidden_units_}, self_attn_output_}}, + {"key_cache", + Tensor{MEMORY_GPU, + high_precision_type, + self_k_cache_size, + ((const T1*)output_tensors->at("key_cache").data) + cache_offset}}, + {"value_cache", + Tensor{MEMORY_GPU, + high_precision_type, + self_v_cache_size, + ((const T1*)output_tensors->at("value_cache").data) + cache_offset}}}; +#else + TensorMap self_attention_output_tensors{ + {"attention_output", + Tensor{MEMORY_GPU, high_precision_type, {local_batch_size, hidden_units_}, self_attn_output_}}, + {"key_cache", + Tensor{MEMORY_GPU, + high_precision_type, + self_k_cache_size, + ((const T2*)output_tensors->at("key_cache").data) + cache_offset}}, + {"value_cache", + Tensor{MEMORY_GPU, + high_precision_type, + self_v_cache_size, + ((const T2*)output_tensors->at("value_cache").data) + cache_offset}}}; +#endif + + self_attention_layer_->forward( + &self_attention_output_tensors, + &self_attention_input_tensors, + (const AttentionWeight*)&gpt_decoder_layer_weight->at(l)->self_attention_weights); + + { + GeneralFP8AddBiasResidualPreLayerNormParam param{ + normed_self_attn_output_, + self_attn_output_, + decoder_input, + gpt_decoder_layer_weight->at(l)->self_attention_weights.attention_output_weight.bias, + gpt_decoder_layer_weight->at(l)->self_attn_layernorm_weights.gamma, + gpt_decoder_layer_weight->at(l)->self_attn_layernorm_weights.beta, + nullptr, // (const + // float*)gpt_decoder_layer_weight->at(l)->self_attention_weights.attention_output_weight.scale, + (const float*)gpt_decoder_layer_weight->at(l)->ffn_weights.intermediate_weight.input_scale_inv, + (int)local_batch_size, + (int)hidden_units_, + stream_, + true}; + invokeGeneralFP8AddBiasResidualPreLayerNorm(param); + sync_check_cuda_error(); + } + + TensorMap ffn_input_tensors = TensorMap( + std::unordered_map{{"input_hidden_state", + Tensor{MEMORY_GPU, + data_type, + std::vector{local_batch_size, hidden_units_}, + normed_self_attn_output_}}}); + TensorMap ffn_output_tensors = TensorMap( + std::unordered_map{{"output_hidden_state", + Tensor{MEMORY_GPU, + high_precision_type, + std::vector{local_batch_size, hidden_units_}, + decoder_output}}}); + + ffn_layer_->forward(&ffn_output_tensors, &ffn_input_tensors, &gpt_decoder_layer_weight->at(l)->ffn_weights); + + invokeAddBiasResidual(decoder_output, + self_attn_output_, + gpt_decoder_layer_weight->at(l)->ffn_weights.output_weight.bias, + local_batch_size, + hidden_units_, + stream_); + sync_check_cuda_error(); + + if (isLastLayerParallelId(l) == true && pipeline_para_.rank_ != pipeline_para_.world_size_ - 1 + && pipeline_para_.world_size_ > 1) { + // ftNcclSend(decoder_output, local_batch_size * hidden_units_, pipeline_para_.rank_ + 1, pipeline_para_, + // stream_); + + ftNcclSend(decoder_output + + local_batch_size * hidden_units_ / tensor_para_.world_size_ * tensor_para_.rank_, + local_batch_size * hidden_units_ / tensor_para_.world_size_, + pipeline_para_.rank_ + 1, + pipeline_para_, + stream_); + } + } + + if (is_free_buffer_after_forward_ == true) { + freeBuffer(); + } +} + +template class GptFP8Decoder<__nv_fp8_e4m3, __nv_bfloat16>; + +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/models/gpt_fp8/GptFP8Decoder.h b/src/fastertransformer/models/gpt_fp8/GptFP8Decoder.h new file mode 100644 index 000000000..ea8a042ac --- /dev/null +++ b/src/fastertransformer/models/gpt_fp8/GptFP8Decoder.h @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/layers/BaseLayer.h" +#include "src/fastertransformer/layers/TensorParallelGeluFfnFP8Layer.h" +#include "src/fastertransformer/layers/attention_layers_fp8/TensorParallelDecoderSelfAttentionFP8Layer.h" +#include "src/fastertransformer/models/gpt_fp8/GptFP8DecoderLayerWeight.h" +#include "src/fastertransformer/utils/Tensor.h" +#include "src/fastertransformer/utils/allocator.h" +#include "src/fastertransformer/utils/cublasFP8MMWrapper.h" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" +#include "src/fastertransformer/utils/nccl_utils.h" + +namespace fastertransformer { + +template +class GptFP8Decoder: public BaseLayer { +private: + // meta data + size_t head_num_; + size_t size_per_head_; + size_t inter_size_; + size_t num_layer_; + + // calculated data + size_t hidden_units_; + + NcclParam tensor_para_; + NcclParam pipeline_para_; + + // buffers + T1* decoder_normed_input_ = nullptr; + T2* self_attn_output_ = nullptr; + T1* normed_self_attn_output_ = nullptr; + T2* decoder_layer_output_ = nullptr; + + BaseAttentionLayer* self_attention_layer_; + FfnFP8Layer* ffn_layer_; + + void initialize(); + void allocateBuffer() override; + void allocateBuffer(size_t batch_size); + void freeBuffer() override; + bool isValidLayerParallelId(uint l); + bool isFirstLayerParallelId(uint l); + bool isLastLayerParallelId(uint l); + int getFirstLayerParallelId(); + +protected: +public: + GptFP8Decoder(size_t head_num, + size_t size_per_head, + size_t inter_size, + size_t num_layer, + NcclParam tensor_para, + NcclParam pipeline_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool sparse = false); + + GptFP8Decoder(GptFP8Decoder const& decoder); + + ~GptFP8Decoder(); + + void forward(TensorMap* output_tensors, + const TensorMap* input_tensors, + const std::vector*>* decoder_layer_weights); +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/gpt_fp8/GptFP8DecoderLayerWeight.cc b/src/fastertransformer/models/gpt_fp8/GptFP8DecoderLayerWeight.cc new file mode 100644 index 000000000..1d37f0fa7 --- /dev/null +++ b/src/fastertransformer/models/gpt_fp8/GptFP8DecoderLayerWeight.cc @@ -0,0 +1,571 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/models/gpt_fp8/GptFP8DecoderLayerWeight.h" +#include "3rdparty/fp8_qgmma_1x1/fp8_qgmma_1x1_utils.h" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" +#include "src/fastertransformer/utils/memory_utils.h" + +namespace fastertransformer { + +template +GptFP8DecoderLayerWeight::GptFP8DecoderLayerWeight(const int hidden_units, + const int inter_size, + const int tensor_para_size, + const int tensor_para_rank): + hidden_units_(hidden_units), + inter_size_(inter_size), + tensor_para_size_(tensor_para_size), + tensor_para_rank_(tensor_para_rank), + weights_ptr(4), + vec_ptr(8), + scale_ptr(26), + scale_h_ptr_(26), + trans_ptr(4) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + mallocWeights(); + setWeightPtr(); +} + +template +GptFP8DecoderLayerWeight::~GptFP8DecoderLayerWeight() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + if (is_maintain_buffer == true) { + for (int i = 0; i < weights_ptr.size(); i++) { + weights_ptr[i].first = 0; + deviceFree(weights_ptr[i].second); + } + for (int i = 0; i < vec_ptr.size(); i++) { + vec_ptr[i].first = 0; + deviceFree(vec_ptr[i].second); + } + for (int i = 0; i < scale_ptr.size(); i++) { + scale_ptr[i].first = 0; + deviceFree(scale_ptr[i].second); + } + for (uint i = 0; i < scale_h_ptr_.size(); i++) { + delete scale_h_ptr_[i]; + } + + pre_layernorm_weights.beta = nullptr; + pre_layernorm_weights.gamma = nullptr; + + self_attention_weights.query_weight.kernel = nullptr; + self_attention_weights.query_weight.bias = nullptr; + self_attention_weights.query_weight.input_scale = nullptr; + self_attention_weights.query_weight.input_scale_inv = nullptr; + self_attention_weights.query_weight.output_scale = nullptr; + self_attention_weights.query_weight.output_scale_inv = nullptr; + self_attention_weights.query_weight.weight_scale = nullptr; + self_attention_weights.query_weight.weight_scale_inv = nullptr; + + self_attention_weights.attention_output_weight.kernel = nullptr; + self_attention_weights.attention_output_weight.bias = nullptr; + self_attention_weights.attention_output_weight.input_scale = nullptr; + self_attention_weights.attention_output_weight.input_scale_inv = nullptr; + self_attention_weights.attention_output_weight.output_scale = nullptr; + self_attention_weights.attention_output_weight.output_scale_inv = nullptr; + self_attention_weights.attention_output_weight.weight_scale = nullptr; + self_attention_weights.attention_output_weight.weight_scale_inv = nullptr; + + self_attn_layernorm_weights.beta = nullptr; + self_attn_layernorm_weights.gamma = nullptr; + + ffn_weights.intermediate_weight.kernel = nullptr; + ffn_weights.intermediate_weight.bias = nullptr; + ffn_weights.intermediate_weight.input_scale = nullptr; + ffn_weights.intermediate_weight.input_scale_inv = nullptr; + ffn_weights.intermediate_weight.output_scale = nullptr; + ffn_weights.intermediate_weight.output_scale_inv = nullptr; + ffn_weights.intermediate_weight.weight_scale = nullptr; + ffn_weights.intermediate_weight.weight_scale_inv = nullptr; + + ffn_weights.output_weight.kernel = nullptr; + ffn_weights.output_weight.bias = nullptr; + ffn_weights.output_weight.input_scale = nullptr; + ffn_weights.output_weight.input_scale_inv = nullptr; + ffn_weights.output_weight.output_scale = nullptr; + ffn_weights.output_weight.output_scale_inv = nullptr; + ffn_weights.output_weight.weight_scale = nullptr; + ffn_weights.output_weight.weight_scale_inv = nullptr; + + self_attention_weights.identity_h_scale = nullptr; + ffn_weights.identity_h_scale = nullptr; + + self_attention_weights.qk_scale = nullptr; + self_attention_weights.qk_scale_inv = nullptr; + + deviceFree(fp8_qkv_bias); + fp8_qkv_bias = nullptr; + deviceFree(identity_scale); + identity_scale = nullptr; + delete identity_h_scale; + identity_h_scale = nullptr; + is_maintain_buffer = false; + } +} + +template +GptFP8DecoderLayerWeight::GptFP8DecoderLayerWeight(const GptFP8DecoderLayerWeight& other): + hidden_units_(other.hidden_units_), + inter_size_(other.inter_size_), + tensor_para_size_(other.tensor_para_size_), + tensor_para_rank_(other.tensor_para_rank_), + weights_ptr(4), + vec_ptr(8), + scale_ptr(26), + scale_h_ptr_(26), + trans_ptr(4) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + + mallocWeights(); + for (int i = 0; i < weights_ptr.size(); i++) { + cudaD2Dcpy(weights_ptr[i].second, other.weights_ptr[i].second, weights_ptr[i].first); + } + for (int i = 0; i < vec_ptr.size(); i++) { + cudaD2Dcpy(vec_ptr[i].second, other.vec_ptr[i].second, vec_ptr[i].first); + } + for (int i = 0; i < scale_ptr.size(); i++) { + cudaD2Dcpy(scale_ptr[i].second, other.scale_ptr[i].second, scale_ptr[i].first); + } + for (int i = 0; i < scale_h_ptr_.size(); i++) { + *(scale_h_ptr_[i]) = *(other.scale_h_ptr_[i]); + } + setWeightPtr(); +} + +template +GptFP8DecoderLayerWeight& GptFP8DecoderLayerWeight::operator=(const GptFP8DecoderLayerWeight& other) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + hidden_units_ = other.hidden_units_; + inter_size_ = other.inter_size_; + tensor_para_size_ = other.tensor_para_size_; + tensor_para_rank_ = other.tensor_para_rank_; + + mallocWeights(); + for (int i = 0; i < weights_ptr.size(); i++) { + cudaD2Dcpy(weights_ptr[i].second, other.weights_ptr[i].second, weights_ptr[i].first); + } + for (int i = 0; i < vec_ptr.size(); i++) { + cudaD2Dcpy(vec_ptr[i].second, other.vec_ptr[i].second, vec_ptr[i].first); + } + for (int i = 0; i < scale_ptr.size(); i++) { + cudaD2Dcpy(scale_ptr[i].second, other.scale_ptr[i].second, scale_ptr[i].first); + } + for (int i = 0; i < scale_h_ptr_.size(); i++) { + *(scale_h_ptr_[i]) = *(other.scale_h_ptr_[i]); + } + setWeightPtr(); + return *this; +} + +template +void GptFP8DecoderLayerWeight::loadModel(std::string dir_path) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + FT_CHECK(is_maintain_buffer == true); + + loadWeightFromBin(vec_ptr[0].second, {(int)vec_ptr[0].first}, dir_path + ".input_layernorm.bias.bin"); + loadWeightFromBin(vec_ptr[1].second, {(int)vec_ptr[1].first}, dir_path + ".input_layernorm.weight.bin"); + loadWeightFromBin(vec_ptr[2].second, + {(int)vec_ptr[2].first}, + dir_path + ".attention.query_key_value.bias." + std::to_string(tensor_para_rank_) + ".bin"); + loadWeightFromBin(vec_ptr[3].second, {(int)vec_ptr[3].first}, dir_path + ".attention.dense.bias.bin"); + loadWeightFromBin(vec_ptr[4].second, {(int)vec_ptr[4].first}, dir_path + ".post_attention_layernorm.bias.bin"); + loadWeightFromBin( + vec_ptr[5].second, {(int)vec_ptr[5].first}, dir_path + ".post_attention_layernorm.weight.bin"); + loadWeightFromBin(vec_ptr[6].second, + {(int)vec_ptr[6].first}, + dir_path + ".mlp.dense_h_to_4h.bias." + std::to_string(tensor_para_rank_) + ".bin"); + loadWeightFromBin(vec_ptr[7].second, {(int)vec_ptr[7].first}, dir_path + ".mlp.dense_4h_to_h.bias.bin"); + + // Load scaling + { + std::string quantizer_list[13] = { + ".attention.query_key_value.fp_linear.fi.bin", + ".attention.query_key_value.fp_linear.fo.bin", + ".attention.query_key_value.fp_linear.fw.bin", + ".attention.dense.fp_linear.fi.bin", + ".attention.dense.fp_linear.fo.bin", + ".attention.dense.fp_linear.fw.bin", + ".mlp.dense_h_to_4h.fp_linear.fi.bin", + ".mlp.dense_h_to_4h.fp_linear.fo.bin", + ".mlp.dense_h_to_4h.fp_linear.fw.bin", + ".mlp.dense_4h_to_h.fp_linear.fi.bin", + ".mlp.dense_4h_to_h.fp_linear.fo.bin", + ".mlp.dense_4h_to_h.fp_linear.fw.bin", + ".attention.softmax.fo.bin", + }; + + float* d_scale_inv = nullptr; + deviceMalloc(&d_scale_inv, inter_size_, false); + float* h_scale = new float[inter_size_]; + float* h_scale_inv = new float[inter_size_]; + + for (int i = 0; i < 13; i++) { + if (checkIfFileExist(dir_path + quantizer_list[i])) { + loadWeightFromBin(d_scale_inv, {(int)scale_ptr[i * 2].first}, dir_path + quantizer_list[i]); + cudaD2Hcpy(h_scale_inv, d_scale_inv, scale_ptr[i * 2].first); + } + else { + // If we cannot find the scales, use identity scales. + FT_LOG_WARNING(fmtstr("Cannot find %s, use identity scales.", (dir_path + quantizer_list[i]).c_str())); + for (int j = 0; j < scale_ptr[i * 2].first; j++) { + h_scale_inv[j] = 1.0f; + } + } + for (int j = 0; j < scale_ptr[i * 2].first; j++) { + h_scale[j] = 1.0f / h_scale_inv[j]; + } + cudaH2Dcpy(scale_ptr[i * 2 + 0].second, h_scale, scale_ptr[i * 2 + 0].first); + cudaH2Dcpy(scale_ptr[i * 2 + 1].second, h_scale_inv, scale_ptr[i * 2 + 1].first); + + if (fp8_mode_ == 2) { + *(scale_h_ptr_[i * 2 + 0]) = h_scale[0]; // only for per tensor + *(scale_h_ptr_[i * 2 + 1]) = h_scale_inv[0]; // only for per tensor + } + } + deviceFree(d_scale_inv); + delete[] h_scale; + delete[] h_scale_inv; + } + + { + float* d_float_weight = nullptr; + deviceMalloc(&d_float_weight, hidden_units_ * std::max(3 * hidden_units_, inter_size_) / tensor_para_size_); + + if (fp8_mode_ == 1) { + loadWeightFromBin(d_float_weight, + {(int)weights_ptr[0].first}, + dir_path + ".attention.query_key_value.weight." + std::to_string(tensor_para_rank_) + + ".bin"); + invokeQuantizeMatrix(weights_ptr[0].second, + scale_ptr[5].second, + d_float_weight, + (int)weights_ptr[0].first, + scale_ptr[4].first, + (cudaStream_t)0); + loadWeightFromBin(d_float_weight, + {(int)weights_ptr[1].first}, + dir_path + ".attention.dense.weight." + std::to_string(tensor_para_rank_) + + ".bin"); + invokeQuantizeMatrix(weights_ptr[1].second, + scale_ptr[11].second, + d_float_weight, + (int)weights_ptr[1].first, + scale_ptr[10].first, + (cudaStream_t)0); + loadWeightFromBin(d_float_weight, + {(int)weights_ptr[2].first}, + dir_path + ".mlp.dense_h_to_4h.weight." + std::to_string(tensor_para_rank_) + + ".bin"); + invokeQuantizeMatrix(weights_ptr[2].second, + scale_ptr[17].second, + d_float_weight, + (int)weights_ptr[2].first, + scale_ptr[16].first, + (cudaStream_t)0); + loadWeightFromBin(d_float_weight, + {(int)weights_ptr[3].first}, + dir_path + ".mlp.dense_4h_to_h.weight." + std::to_string(tensor_para_rank_) + + ".bin"); + invokeQuantizeMatrix(weights_ptr[3].second, + scale_ptr[23].second, + d_float_weight, + (int)weights_ptr[3].first, + scale_ptr[22].first, + (cudaStream_t)0); + } + else if (fp8_mode_ == 2) { + loadWeightFromBin(d_float_weight, + {(int)weights_ptr[0].first}, + dir_path + ".attention.query_key_value.weight." + std::to_string(tensor_para_rank_) + + ".bin"); + invokeQuantizeMatrix(weights_ptr[0].second, + scale_ptr[5].second, + d_float_weight, + (int)weights_ptr[0].first, + 1, + (cudaStream_t)0); + loadWeightFromBin(d_float_weight, + {(int)weights_ptr[1].first}, + dir_path + ".attention.dense.weight." + std::to_string(tensor_para_rank_) + + ".bin"); + invokeQuantizeMatrix(weights_ptr[1].second, + scale_ptr[11].second, + d_float_weight, + (int)weights_ptr[1].first, + 1, + (cudaStream_t)0); + loadWeightFromBin(d_float_weight, + {(int)weights_ptr[2].first}, + dir_path + ".mlp.dense_h_to_4h.weight." + std::to_string(tensor_para_rank_) + + ".bin"); + invokeQuantizeMatrix(weights_ptr[2].second, + scale_ptr[17].second, + d_float_weight, + (int)weights_ptr[2].first, + 1, + (cudaStream_t)0); + loadWeightFromBin(d_float_weight, + {(int)weights_ptr[3].first}, + dir_path + ".mlp.dense_4h_to_h.weight." + std::to_string(tensor_para_rank_) + + ".bin"); + invokeQuantizeMatrix(weights_ptr[3].second, + scale_ptr[23].second, + d_float_weight, + (int)weights_ptr[3].first, + 1, + (cudaStream_t)0); + } + + invokeQuantizeMatrix( + fp8_qkv_bias, scale_ptr[3].second, vec_ptr[2].second, vec_ptr[2].first, 1, (cudaStream_t)0); + + deviceFree(d_float_weight); + } +} + +template +void GptFP8DecoderLayerWeight::setWeightPtr() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + self_attention_weights.query_weight.kernel = weights_ptr[0].second; + self_attention_weights.attention_output_weight.kernel = weights_ptr[1].second; + ffn_weights.intermediate_weight.kernel = weights_ptr[2].second; + ffn_weights.output_weight.kernel = weights_ptr[3].second; + + self_attention_weights.query_weight.input_scale = scale_ptr[0].second; + self_attention_weights.query_weight.input_scale_inv = scale_ptr[1].second; + self_attention_weights.query_weight.output_scale = scale_ptr[2].second; + self_attention_weights.query_weight.output_scale_inv = scale_ptr[3].second; + self_attention_weights.query_weight.weight_scale = scale_ptr[4].second; + self_attention_weights.query_weight.weight_scale_inv = scale_ptr[5].second; + self_attention_weights.attention_output_weight.input_scale = scale_ptr[6].second; + self_attention_weights.attention_output_weight.input_scale_inv = scale_ptr[7].second; + self_attention_weights.attention_output_weight.output_scale = scale_ptr[8].second; + self_attention_weights.attention_output_weight.output_scale_inv = scale_ptr[9].second; + self_attention_weights.attention_output_weight.weight_scale = scale_ptr[10].second; + self_attention_weights.attention_output_weight.weight_scale_inv = scale_ptr[11].second; + ffn_weights.intermediate_weight.input_scale = scale_ptr[12].second; + ffn_weights.intermediate_weight.input_scale_inv = scale_ptr[13].second; + ffn_weights.intermediate_weight.output_scale = scale_ptr[14].second; + ffn_weights.intermediate_weight.output_scale_inv = scale_ptr[15].second; + ffn_weights.intermediate_weight.weight_scale = scale_ptr[16].second; + ffn_weights.intermediate_weight.weight_scale_inv = scale_ptr[17].second; + ffn_weights.output_weight.input_scale = scale_ptr[18].second; + ffn_weights.output_weight.input_scale_inv = scale_ptr[19].second; + ffn_weights.output_weight.output_scale = scale_ptr[20].second; + ffn_weights.output_weight.output_scale_inv = scale_ptr[21].second; + ffn_weights.output_weight.weight_scale = scale_ptr[22].second; + ffn_weights.output_weight.weight_scale_inv = scale_ptr[23].second; + self_attention_weights.qk_scale = scale_ptr[24].second; + self_attention_weights.qk_scale_inv = scale_ptr[25].second; + + self_attention_weights.identity_scale = identity_scale; + ffn_weights.identity_scale = identity_scale; + self_attention_weights.identity_h_scale = identity_h_scale; + ffn_weights.identity_h_scale = identity_h_scale; + + self_attention_weights.query_weight.input_h_scale = scale_h_ptr_[0]; + self_attention_weights.query_weight.input_h_scale_inv = scale_h_ptr_[1]; + self_attention_weights.query_weight.output_h_scale = scale_h_ptr_[2]; + self_attention_weights.query_weight.output_h_scale_inv = scale_h_ptr_[3]; + self_attention_weights.query_weight.weight_h_scale = scale_h_ptr_[4]; + self_attention_weights.query_weight.weight_h_scale_inv = scale_h_ptr_[5]; + self_attention_weights.attention_output_weight.input_h_scale = scale_h_ptr_[6]; + self_attention_weights.attention_output_weight.input_h_scale_inv = scale_h_ptr_[7]; + self_attention_weights.attention_output_weight.output_h_scale = scale_h_ptr_[8]; + self_attention_weights.attention_output_weight.output_h_scale_inv = scale_h_ptr_[9]; + self_attention_weights.attention_output_weight.weight_h_scale = scale_h_ptr_[10]; + self_attention_weights.attention_output_weight.weight_h_scale_inv = scale_h_ptr_[11]; + ffn_weights.intermediate_weight.input_h_scale = scale_h_ptr_[12]; + ffn_weights.intermediate_weight.input_h_scale_inv = scale_h_ptr_[13]; + ffn_weights.intermediate_weight.output_h_scale = scale_h_ptr_[14]; + ffn_weights.intermediate_weight.output_h_scale_inv = scale_h_ptr_[15]; + ffn_weights.intermediate_weight.weight_h_scale = scale_h_ptr_[16]; + ffn_weights.intermediate_weight.weight_h_scale_inv = scale_h_ptr_[17]; + ffn_weights.output_weight.input_h_scale = scale_h_ptr_[18]; + ffn_weights.output_weight.input_h_scale_inv = scale_h_ptr_[19]; + ffn_weights.output_weight.output_h_scale = scale_h_ptr_[20]; + ffn_weights.output_weight.output_h_scale_inv = scale_h_ptr_[21]; + ffn_weights.output_weight.weight_h_scale = scale_h_ptr_[22]; + ffn_weights.output_weight.weight_h_scale_inv = scale_h_ptr_[23]; + self_attention_weights.qk_h_scale = scale_h_ptr_[24]; + self_attention_weights.qk_h_scale_inv = scale_h_ptr_[25]; + + pre_layernorm_weights.beta = vec_ptr[0].second; + pre_layernorm_weights.gamma = vec_ptr[1].second; + self_attention_weights.query_weight.bias = vec_ptr[2].second; + self_attention_weights.attention_output_weight.bias = vec_ptr[3].second; + self_attn_layernorm_weights.beta = vec_ptr[4].second; + self_attn_layernorm_weights.gamma = vec_ptr[5].second; + ffn_weights.intermediate_weight.bias = vec_ptr[6].second; + ffn_weights.output_weight.bias = vec_ptr[7].second; + + self_attention_weights.query_weight.fp8_bias = fp8_qkv_bias; + is_maintain_buffer = true; +} + +template +void GptFP8DecoderLayerWeight::mallocWeights() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + weights_ptr[0].first = hidden_units_ * 3 * hidden_units_ / tensor_para_size_; + weights_ptr[1].first = hidden_units_ / tensor_para_size_ * hidden_units_; + weights_ptr[2].first = hidden_units_ * inter_size_ / tensor_para_size_; + weights_ptr[3].first = inter_size_ / tensor_para_size_ * hidden_units_; + + vec_ptr[0].first = hidden_units_; + vec_ptr[1].first = hidden_units_; + vec_ptr[2].first = 3 * hidden_units_ / tensor_para_size_; + vec_ptr[3].first = hidden_units_; + vec_ptr[4].first = hidden_units_; + vec_ptr[5].first = hidden_units_; + vec_ptr[6].first = inter_size_ / tensor_para_size_; + vec_ptr[7].first = hidden_units_; + + if (fp8_mode_ == 1) { + scale_ptr[0].first = 1; + scale_ptr[1].first = 1; + scale_ptr[2].first = 1; + scale_ptr[3].first = 1; + scale_ptr[4].first = 3 * hidden_units_ / tensor_para_size_; + scale_ptr[5].first = 3 * hidden_units_ / tensor_para_size_; + scale_ptr[6].first = 1; + scale_ptr[7].first = 1; + scale_ptr[8].first = 1; + scale_ptr[9].first = 1; + scale_ptr[10].first = hidden_units_; + scale_ptr[11].first = hidden_units_; + scale_ptr[12].first = 1; + scale_ptr[13].first = 1; + scale_ptr[14].first = 1; + scale_ptr[15].first = 1; + scale_ptr[16].first = inter_size_ / tensor_para_size_; + scale_ptr[17].first = inter_size_ / tensor_para_size_; + scale_ptr[18].first = 1; + scale_ptr[19].first = 1; + scale_ptr[20].first = 1; + scale_ptr[21].first = 1; + scale_ptr[22].first = hidden_units_; + scale_ptr[23].first = hidden_units_; + scale_ptr[24].first = 1; + scale_ptr[25].first = 1; + } + else if (fp8_mode_ == 2) { + for (int i = 0; i < scale_ptr.size(); i++) { + scale_ptr[i].first = 1; + } + } + else { + FT_CHECK(false); + } + + for (int i = 0; i < weights_ptr.size(); i++) { + deviceMalloc(&weights_ptr[i].second, weights_ptr[i].first); + } + for (int i = 0; i < vec_ptr.size(); i++) { + deviceMalloc(&vec_ptr[i].second, vec_ptr[i].first); + } + for (int i = 0; i < scale_ptr.size(); i++) { + deviceMalloc(&scale_ptr[i].second, scale_ptr[i].first); + deviceFill(scale_ptr[i].second, scale_ptr[i].first, 1.0f); + } + deviceMalloc(&fp8_qkv_bias, vec_ptr[2].first); + for (uint i = 0; i < scale_h_ptr_.size(); i++) { + scale_h_ptr_[i] = new float(1.0f); + } + + // identity scalar + deviceMalloc(&identity_scale, hidden_units_); + deviceFill(identity_scale, hidden_units_, 1.0f); + identity_h_scale = new float{1.0f}; +} + +// #ifdef SPARSITY_ENABLED +// template +// void GptFP8DecoderLayerWeight::compress_weights(cublasMMWrapper& cublas_wrapper, int hidden_dim) +// { +// hidden_units_ = hidden_dim; +// inter_size_ = 4 * hidden_units_; + +// const size_t num_sparse_weights = 4; +// size_t shapes[num_sparse_weights][2] = {{hidden_units_, 3 * hidden_units_ / tensor_para_size_}, +// {hidden_units_ / tensor_para_size_, hidden_units_}, +// {hidden_units_, inter_size_ / tensor_para_size_}, +// {inter_size_ / tensor_para_size_, hidden_units_}}; + +// const T* dense_weights[num_sparse_weights] = {self_attention_weights.query_weight.kernel, +// self_attention_weights.attention_output_weight.kernel, +// ffn_weights.intermediate_weight.kernel, +// ffn_weights.output_weight.kernel}; + +// for (size_t i = 0; i < num_sparse_weights; ++i) { +// int m = shapes[i][1]; +// int k = shapes[i][0]; +// size_t compressed_size = cublas_wrapper.getSparseMatrixSize(m, k); +// deviceMalloc(&sp_weights_ptr[i], static_cast(compressed_size), false); +// cublas_wrapper.compressMatrix(dense_weights[i], sp_weights_ptr[i], m, k); +// } + +// self_attention_weights.query_weight.sp_kernel = sp_weights_ptr[0]; +// self_attention_weights.attention_output_weight.sp_kernel = sp_weights_ptr[1]; +// ffn_weights.intermediate_weight.sp_kernel = sp_weights_ptr[2]; +// ffn_weights.output_weight.sp_kernel = sp_weights_ptr[3]; +// is_maintain_sp_buffer = true; +// } +// #endif + +template +void GptFP8DecoderLayerWeight::transposeWeight() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + T1* workspace; + deviceMalloc(&workspace, hidden_units_ / tensor_para_size_ * std::max(3 * hidden_units_, inter_size_)); + invokeInPlaceTranspose(weights_ptr[0].second, workspace, hidden_units_, 3 * hidden_units_ / tensor_para_size_); + invokeInPlaceTranspose(weights_ptr[1].second, workspace, hidden_units_ / tensor_para_size_, hidden_units_); + invokeInPlaceTranspose(weights_ptr[2].second, workspace, hidden_units_, inter_size_ / tensor_para_size_); + invokeInPlaceTranspose(weights_ptr[3].second, workspace, inter_size_ / tensor_para_size_, hidden_units_); + deviceFree(workspace); + +#ifdef FUSE_GEMM_ACT +#ifdef USE_QGMMA + { + T1* h_B = new T1[weights_ptr[2].first]; + cudaD2Hcpy(h_B, weights_ptr[2].second, weights_ptr[2].first); + T2* h_bias = new T2[vec_ptr[6].first]; + cudaD2Hcpy(h_bias, vec_ptr[6].second, vec_ptr[6].first); + invokeSwizzleQgmmaWeights(hidden_units_, + inter_size_ / tensor_para_size_, + (uint8_t*)h_B, + (uint8_t*)weights_ptr[2].second, + (uint16_t*)h_bias, + (uint16_t*)vec_ptr[6].second); + delete h_B; + delete h_bias; + } +#endif +#endif +} + +template struct GptFP8DecoderLayerWeight<__nv_fp8_e4m3, __nv_bfloat16>; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/gpt_fp8/GptFP8DecoderLayerWeight.h b/src/fastertransformer/models/gpt_fp8/GptFP8DecoderLayerWeight.h new file mode 100644 index 000000000..cc6af22f7 --- /dev/null +++ b/src/fastertransformer/models/gpt_fp8/GptFP8DecoderLayerWeight.h @@ -0,0 +1,82 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include +#include + +#include "src/fastertransformer/kernels/layernorm_fp8_kernels.h" +#include "src/fastertransformer/layers/FfnFP8Weight.h" +#include "src/fastertransformer/layers/attention_layers_fp8/AttentionFP8Weight.h" +#include "src/fastertransformer/utils/cublasMMWrapper.h" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" + +namespace fastertransformer { + +template +struct GptFP8DecoderLayerWeight { +public: + GptFP8DecoderLayerWeight() = default; + GptFP8DecoderLayerWeight(const int hidden_units, + const int inter_size, + const int tensor_para_size, + const int tensor_para_rank); + ~GptFP8DecoderLayerWeight(); + GptFP8DecoderLayerWeight(const GptFP8DecoderLayerWeight& other); + GptFP8DecoderLayerWeight& operator=(const GptFP8DecoderLayerWeight& other); + void loadModel(std::string dir_path); + // #ifdef SPARSITY_ENABLED + // void compress_weights(cublasMMWrapper& cublas_wrapper, int hidden_dim); + // #endif + void transposeWeight(); + + LayerNormWeight pre_layernorm_weights; + AttentionFP8Weight self_attention_weights; + LayerNormWeight self_attn_layernorm_weights; + FfnFP8Weight ffn_weights; + float* identity_scale; + float* identity_h_scale; + + T1* fp8_qkv_bias; + +private: + void setWeightPtr(); + void mallocWeights(); + +protected: + size_t hidden_units_; + size_t inter_size_; + size_t tensor_para_size_ = 1; + size_t tensor_para_rank_ = 0; + bool is_maintain_buffer = false; + std::vector> weights_ptr; + std::vector> vec_ptr; // containing bias, gamma and beta + + std::vector trans_ptr; + + std::vector> scale_ptr; + std::vector scale_h_ptr_; + cudaStream_t stream_ = 0; + const int fp8_mode_ = 2; + +#ifdef SPARSITY_ENABLED + std::pair sp_weights_ptr[4]; + bool is_maintain_sp_buffer = false; +#endif +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/gpt_fp8/GptFP8Weight.cc b/src/fastertransformer/models/gpt_fp8/GptFP8Weight.cc new file mode 100644 index 000000000..93cf9d5e7 --- /dev/null +++ b/src/fastertransformer/models/gpt_fp8/GptFP8Weight.cc @@ -0,0 +1,234 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/models/gpt_fp8/GptFP8Weight.h" + +namespace fastertransformer { + +template +GptFP8Weight::GptFP8Weight(const int hidden_units, + const int inter_size, + const int vocab_size, + const int num_layer, + const int max_seq_len, + const int tensor_para_size, + const int tensor_para_rank, + const int layer_para_size, + const int layer_para_rank): + hidden_units_(hidden_units), + inter_size_(inter_size), + vocab_size_(vocab_size), + num_layer_(num_layer), + max_seq_len_(max_seq_len), + tensor_para_size_(tensor_para_size), + tensor_para_rank_(tensor_para_rank), + layer_para_size_(layer_para_size), + layer_para_rank_(layer_para_rank), + table_ptr(3), + vec_ptr(2) +{ + decoder_layer_weights.clear(); + for (int l = 0; l < num_layer_; l++) { + if (isValidLayerParallelId(l)) { + decoder_layer_weights.push_back( + new GptFP8DecoderLayerWeight(hidden_units_, inter_size_, tensor_para_size_, tensor_para_rank_)); + } + else { + // Don't malloc and load these layers since we don't use them. + decoder_layer_weights.push_back(new GptFP8DecoderLayerWeight()); + } + } + + mallocWeights(); + setWeightPtr(); +} + +template +GptFP8Weight::~GptFP8Weight() +{ + if (is_maintain_buffer == true) { + for (int i = 0; i < table_ptr.size(); ++i) { + table_ptr[i].first = 0; + deviceFree(table_ptr[i].second); + } + + for (int i = 0; i < vec_ptr.size(); ++i) { + vec_ptr[i].first = 0; + deviceFree(vec_ptr[i].second); + } + + position_encoding_table = nullptr; + pre_decoder_embedding_table = nullptr; + post_decoder_layernorm.beta = nullptr; + post_decoder_layernorm.gamma = nullptr; + post_decoder_embedding.kernel = nullptr; + post_decoder_embedding.bias = nullptr; + is_maintain_buffer = false; + } + + for (int i = 0; i < num_layer_; i++) { + delete decoder_layer_weights[i]; + } +} + +template +GptFP8Weight::GptFP8Weight(const GptFP8Weight& other): + hidden_units_(other.hidden_units_), + inter_size_(other.inter_size_), + vocab_size_(other.vocab_size_), + num_layer_(other.num_layer_), + max_seq_len_(other.max_seq_len_), + tensor_para_size_(other.tensor_para_size_), + tensor_para_rank_(other.tensor_para_rank_), + layer_para_size_(other.layer_para_size_), + layer_para_rank_(other.layer_para_rank_), + table_ptr(3), + vec_ptr(2) +{ + mallocWeights(); + for (int i = 0; i < table_ptr.size(); ++i) { + cudaD2Dcpy(table_ptr[i].second, other.table_ptr[i].second, table_ptr[i].first); + } + for (int i = 0; i < table_ptr.size(); ++i) { + cudaD2Dcpy(vec_ptr[i].second, other.vec_ptr[i].second, vec_ptr[i].first); + } + setWeightPtr(); + + decoder_layer_weights.clear(); + for (int l = 0; l < num_layer_; l++) { + decoder_layer_weights.push_back(other.decoder_layer_weights[l]); + } +} + +template +GptFP8Weight& GptFP8Weight::operator=(const GptFP8Weight& other) +{ + hidden_units_ = other.hidden_units_; + inter_size_ = other.inter_size_; + num_layer_ = other.num_layer_; + vocab_size_ = other.vocab_size_; + max_seq_len_ = other.max_seq_len_; + tensor_para_size_ = other.tensor_para_size_; + tensor_para_rank_ = other.tensor_para_rank_; + layer_para_size_ = other.layer_para_size_; + layer_para_rank_ = other.layer_para_rank_; + + mallocWeights(); + for (int i = 0; i < table_ptr.size(); ++i) { + cudaD2Dcpy(table_ptr[i].second, other.table_ptr[i].second, table_ptr[i].first); + } + for (int i = 0; i < table_ptr.size(); ++i) { + cudaD2Dcpy(vec_ptr[i].second, other.vec_ptr[i].second, vec_ptr[i].first); + } + setWeightPtr(); + + decoder_layer_weights.clear(); + for (int l = 0; l < num_layer_; l++) { + decoder_layer_weights.push_back(other.decoder_layer_weights[l]); + } + return *this; +} + +template +void GptFP8Weight::setWeightPtr() +{ + position_encoding_table = table_ptr[0].second; + pre_decoder_embedding_table = table_ptr[1].second; + post_decoder_layernorm.beta = vec_ptr[0].second; + post_decoder_layernorm.gamma = vec_ptr[1].second; + post_decoder_embedding.kernel = table_ptr[2].second; + post_decoder_embedding.bias = nullptr; +} + +template +void GptFP8Weight::mallocWeights() +{ + table_ptr[0].first = max_seq_len_ * hidden_units_; + table_ptr[1].first = vocab_size_ * hidden_units_; + table_ptr[2].first = hidden_units_ * vocab_size_; + vec_ptr[0].first = hidden_units_; + vec_ptr[1].first = hidden_units_; + + deviceMalloc(&table_ptr[0].second, table_ptr[0].first); + deviceMalloc(&table_ptr[1].second, table_ptr[1].first); + deviceMalloc(&table_ptr[2].second, table_ptr[2].first); + deviceMalloc(&vec_ptr[0].second, vec_ptr[0].first); + deviceMalloc(&vec_ptr[1].second, vec_ptr[1].first); + is_maintain_buffer = true; +} + +template +void GptFP8Weight::loadModel(std::string dir_path) +{ + FT_CHECK(is_maintain_buffer == true); + + loadWeightFromBin(table_ptr[0].second, {table_ptr[0].first}, dir_path + "/model.wpe.bin"); + loadWeightFromBin(table_ptr[1].second, {table_ptr[1].first}, dir_path + "/model.wte.bin"); + loadWeightFromBin(vec_ptr[0].second, {vec_ptr[0].first}, dir_path + "/model.final_layernorm.bias.bin"); + loadWeightFromBin(vec_ptr[1].second, {vec_ptr[1].first}, dir_path + "/model.final_layernorm.weight.bin"); + loadWeightFromBin(table_ptr[2].second, {table_ptr[2].first}, dir_path + "/model.wte.bin"); + + for (int l = 0; l < num_layer_; l++) { + if (isValidLayerParallelId(l)) { + decoder_layer_weights[l]->loadModel(dir_path + "/model.layers." + std::to_string(l)); + } + } +} + +template +bool GptFP8Weight::isValidLayerParallelId(int l) +{ + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / layer_para_size_)); + return l < num_layer_ && (l >= local_num_layer * layer_para_rank_) + && (l < local_num_layer * (layer_para_rank_ + 1)); +} + +template +void GptFP8Weight::resizeLayer(const int num_layer) +{ + num_layer_ = num_layer; + for (int l = 0; l < num_layer_; l++) { + decoder_layer_weights.push_back(new GptFP8DecoderLayerWeight()); + } +} + +#ifdef SPARSITY_ENABLED +template +void GptFP8Weight::compress_weights(cublasMMWrapper& cublas_wrapper) +{ + FT_CHECK(decoder_layer_weights.size() == static_cast(num_layer_)); + for (int i = 0; i < num_layer_; ++i) { + if (isValidLayerParallelId(i)) { + decoder_layer_weights[i]->compress_weights(cublas_wrapper, hidden_units_); + } + } +} +#endif + +template +void GptFP8Weight::transposeWeight() +{ + // only transpose the weight of transformer layer + for (int i = 0; i < num_layer_; ++i) { + if (isValidLayerParallelId(i)) { + decoder_layer_weights[i]->transposeWeight(); + } + } +} + +template struct GptFP8Weight<__nv_fp8_e4m3, __nv_bfloat16>; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/gpt_fp8/GptFP8Weight.h b/src/fastertransformer/models/gpt_fp8/GptFP8Weight.h new file mode 100644 index 000000000..26de96336 --- /dev/null +++ b/src/fastertransformer/models/gpt_fp8/GptFP8Weight.h @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/kernels/layernorm_fp8_kernels.h" +#include "src/fastertransformer/models/gpt_fp8/GptFP8DecoderLayerWeight.h" +#include "src/fastertransformer/utils/memory_utils.h" + +namespace fastertransformer { + +template +struct GptFP8Weight { + + GptFP8Weight() = default; + GptFP8Weight(const int hidden_units, + const int inter_size, + const int vocab_size, + const int num_layer, + const int max_seq_len, + const int tensor_para_size, + const int tensor_para_rank, + const int layer_para_size, + const int layer_para_rank); + ~GptFP8Weight(); + GptFP8Weight(const GptFP8Weight& other); + GptFP8Weight& operator=(const GptFP8Weight& other); + void loadModel(std::string dir_path); + void resizeLayer(const int num_layer); +#ifdef SPARSITY_ENABLED + void compress_weights(cublasMMWrapper& cublas_wrapper); +#endif + void transposeWeight(); + + std::vector*> decoder_layer_weights; + const T2* position_encoding_table = nullptr; + const T2* pre_decoder_embedding_table = nullptr; + LayerNormWeight post_decoder_layernorm; + DenseWeight post_decoder_embedding; + +private: + void setWeightPtr(); + void mallocWeights(); + bool isValidLayerParallelId(int l); + + int hidden_units_; + int inter_size_; + int vocab_size_; + int num_layer_; + int max_seq_len_; + int tensor_para_size_; + int tensor_para_rank_; + int layer_para_size_; + int layer_para_rank_; + bool is_maintain_buffer = false; + std::vector> table_ptr; + std::vector> vec_ptr; +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/gpt_fp8/gpt_fp8_gemm.cc b/src/fastertransformer/models/gpt_fp8/gpt_fp8_gemm.cc new file mode 100644 index 000000000..fd603f0d5 --- /dev/null +++ b/src/fastertransformer/models/gpt_fp8/gpt_fp8_gemm.cc @@ -0,0 +1,138 @@ +/* + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/utils/gemm_test/gpt_gemm_func.h" +#include "src/fastertransformer/utils/memory_utils.h" + +namespace ft = fastertransformer; + +int main(int argc, char* argv[]) +{ + if (argc != 9 && argc != 10) { + printf( + "[ERROR] gpt_gemm batch_size beam_width max_input_len head_number size_per_head inter_size vocab_size data_type tensor_para_size\n"); + printf("e.g. ./bin/gpt_gemm 8 4 32 96 128 49152 51200 1 8\n"); + return 0; + } + + const int batch_size = atoi(argv[1]); + const int beam_width = atoi(argv[2]); + const int max_input_len = atoi(argv[3]); + const int head_num = atoi(argv[4]); + const int size_per_head = atoi(argv[5]); + const int inter_size = atoi(argv[6]); + const int vocab_size = atoi(argv[7]); + const ft::CublasDataType data_type = + static_cast(atoi(argv[8])); // 0 FP32, 1 FP16, 2 BF 16, 4 FP8 + const int tensor_para_size = argc <= 9 ? 1 : atoi(argv[9]); + const int is_fp16_compute_type = argc <= 10 ? 0 : atoi(argv[10]); + + printf("[INFO] arguments: \n"); + printf(" batch_size: %d \n", batch_size); + printf(" beam_width: %d \n", beam_width); + printf(" max_input_len: %d \n", max_input_len); + printf(" head_num: %d \n", head_num); + printf(" size_per_head: %d \n", size_per_head); + printf(" inter_size: %d \n", inter_size); + printf(" vocab_size: %d \n", vocab_size); + printf(" data_type: %d \n", data_type); + printf(" tensor_para_size: %d \n", tensor_para_size); + std::cout << std::endl; + + void* gemm_test_buf; + size_t buf_size_in_byte = ft::calGptGemmTestBufSizeInByte(batch_size, + beam_width, + max_input_len, + head_num, + size_per_head, + inter_size, + vocab_size, + tensor_para_size, + data_type); + size_t total, free; + ft::check_cuda_error(cudaMemGetInfo(&free, &total)); + if (free < buf_size_in_byte + 10 * 1024 * 1024) { + printf("[ERROR] There is no enough device memory for gemm test!\n" + " %ld Bytes is needed, but only %ld Bytes is free.\n", + buf_size_in_byte, + free); + gemm_test_buf = NULL; + return -1; + } + else { + ft::deviceMalloc(reinterpret_cast(&gemm_test_buf), buf_size_in_byte, false); + } + + if (data_type == ft::FLOAT_DATATYPE) { + ft::generate_gpt_gemm_config(batch_size, + beam_width, + max_input_len, + head_num, + size_per_head, + inter_size, + vocab_size, + tensor_para_size, + gemm_test_buf, + false); + } + else if (data_type == ft::HALF_DATATYPE) { + ft::generate_gpt_gemm_config(batch_size, + beam_width, + max_input_len, + head_num, + size_per_head, + inter_size, + vocab_size, + tensor_para_size, + gemm_test_buf, + false); + } +#ifdef ENABLE_BF16 + else if (data_type == ft::BFLOAT16_DATATYPE) { + ft::generate_gpt_gemm_config<__nv_bfloat16>(batch_size, + beam_width, + max_input_len, + head_num, + size_per_head, + inter_size, + vocab_size, + tensor_para_size, + gemm_test_buf, + false); + } +#endif +#ifdef ENABLE_FP8 + else if (data_type == ft::FP8_DATATYPE) { + ft::generate_gpt_gemm_config<__nv_fp8_e4m3>(batch_size, + beam_width, + max_input_len, + head_num, + size_per_head, + inter_size, + vocab_size, + tensor_para_size, + gemm_test_buf, + false); + } +#endif + else { + FT_LOG_ERROR("data type only supports fp32(0), fp16(1), bf16(2)."); + return -1; + } + + ft::check_cuda_error(cudaFree(gemm_test_buf)); + return 0; +} diff --git a/src/fastertransformer/models/gptj/CMakeLists.txt b/src/fastertransformer/models/gptj/CMakeLists.txt index 1cb3d456b..c6ccc4404 100644 --- a/src/fastertransformer/models/gptj/CMakeLists.txt +++ b/src/fastertransformer/models/gptj/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/gptj/GptJ.cc b/src/fastertransformer/models/gptj/GptJ.cc index f96d4db3b..bea8c8983 100644 --- a/src/fastertransformer/models/gptj/GptJ.cc +++ b/src/fastertransformer/models/gptj/GptJ.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -405,6 +405,7 @@ void GptJ::forward(std::unordered_map* output_tens // temperature [1] or [batch_size] on cpu, optional, float. // len_penalty [1] or [batch_size] on cpu, optional, float. // repetition_penalty [1] or [batch_size] on cpu, optional, float. + // min_length [1] or [batch_size] on cpu, optional, int // random_seed [1] or [batch_size] on cpu, optional, unsigned long long int. // request_prompt_lengths [batch_size], optional // request_prompt_embedding [batch_size, max_prompt_length, hidden_units], float, optional diff --git a/src/fastertransformer/models/gptj/GptJ.h b/src/fastertransformer/models/gptj/GptJ.h index b30f1b7a2..bf33c66a2 100644 --- a/src/fastertransformer/models/gptj/GptJ.h +++ b/src/fastertransformer/models/gptj/GptJ.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/gptj/GptJContextDecoder.cc b/src/fastertransformer/models/gptj/GptJContextDecoder.cc index 39b1b9da6..71bc62b23 100644 --- a/src/fastertransformer/models/gptj/GptJContextDecoder.cc +++ b/src/fastertransformer/models/gptj/GptJContextDecoder.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -80,7 +80,9 @@ void GptJContextDecoder::allocateBuffer(size_t batch_size, size_t seq_len) allocator_->reMalloc(ffn_output_, sizeof(T) * batch_size * seq_len * hidden_units_, false)); decoder_layer_output_ = reinterpret_cast( allocator_->reMalloc(decoder_layer_output_, sizeof(T) * batch_size * seq_len * hidden_units_, false)); - token_num_ = reinterpret_cast(allocator_->reMalloc(token_num_, sizeof(size_t) * 1, false)); + if (!is_allocate_buffer_) { + check_cuda_error(cudaMallocHost((void**)&h_pinned_token_num_ptr_, sizeof(size_t))); + } padding_offset_ = reinterpret_cast(allocator_->reMalloc(padding_offset_, sizeof(int) * batch_size * seq_len, false)); cu_seqlens_ = reinterpret_cast(allocator_->reMalloc(cu_seqlens_, sizeof(int) * (batch_size + 1), false)); @@ -95,7 +97,7 @@ void GptJContextDecoder::freeBuffer() allocator_->free((void**)(&self_attn_output_)); allocator_->free((void**)(&ffn_output_)); allocator_->free((void**)(&decoder_layer_output_)); - allocator_->free((void**)(&token_num_)); + check_cuda_error(cudaFreeHost(h_pinned_token_num_ptr_)); allocator_->free((void**)(&padding_offset_)); allocator_->free((void**)(&cu_seqlens_)); is_allocate_buffer_ = false; @@ -274,16 +276,17 @@ void GptJContextDecoder::forward(std::unordered_map* self_v_cache_size.push_back(*t); } - AttentionType attention_type = - (d_prefix_prompt_lengths != nullptr || is_qk_buf_float_) ? getUnfusedAttentionType(attention_type_) : attention_type_; - const bool is_unpadded_mha = isUnPaddedMHA(attention_type); + AttentionType attention_type = (d_prefix_prompt_lengths != nullptr || is_qk_buf_float_) ? + getUnfusedAttentionType(attention_type_) : + attention_type_; + const bool is_unpadded_mha = isUnPaddedMHA(attention_type); for (int ite = 0; ite < iteration_num; ite++) { size_t h_token_num = local_batch_size * seq_len; if (is_unpadded_mha) { const int* base_input_lengths = input_tensors->at("input_lengths").getPtr(); - invokeGetPaddingOffsetAndCuSeqLens(&h_token_num, - token_num_, + invokeGetPaddingOffsetAndCuSeqLens(h_pinned_token_num_ptr_, + &h_token_num, padding_offset_, cu_seqlens_, base_input_lengths + ite * local_batch_size, diff --git a/src/fastertransformer/models/gptj/GptJContextDecoder.h b/src/fastertransformer/models/gptj/GptJContextDecoder.h index f624c5829..742a12f72 100644 --- a/src/fastertransformer/models/gptj/GptJContextDecoder.h +++ b/src/fastertransformer/models/gptj/GptJContextDecoder.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -77,13 +77,13 @@ class GptJContextDecoder: public BaseLayer { void initialize(); protected: - T* decoder_normed_input_ = nullptr; - T* self_attn_output_ = nullptr; - T* ffn_output_ = nullptr; - T* decoder_layer_output_ = nullptr; - size_t* token_num_ = nullptr; - int* padding_offset_ = nullptr; - int* cu_seqlens_ = nullptr; + T* decoder_normed_input_ = nullptr; + T* self_attn_output_ = nullptr; + T* ffn_output_ = nullptr; + T* decoder_layer_output_ = nullptr; + size_t* h_pinned_token_num_ptr_ = nullptr; + int* padding_offset_ = nullptr; + int* cu_seqlens_ = nullptr; public: GptJContextDecoder(size_t max_batch_size, diff --git a/src/fastertransformer/models/gptj/GptJDecoder.cc b/src/fastertransformer/models/gptj/GptJDecoder.cc index 1e0dd5fa2..fdcbe593f 100644 --- a/src/fastertransformer/models/gptj/GptJDecoder.cc +++ b/src/fastertransformer/models/gptj/GptJDecoder.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/gptj/GptJDecoder.h b/src/fastertransformer/models/gptj/GptJDecoder.h index 63c5889b3..019bfb783 100644 --- a/src/fastertransformer/models/gptj/GptJDecoder.h +++ b/src/fastertransformer/models/gptj/GptJDecoder.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/gptj/GptJDecoderLayerWeight.cc b/src/fastertransformer/models/gptj/GptJDecoderLayerWeight.cc index 409f24df6..f3ef6e689 100644 --- a/src/fastertransformer/models/gptj/GptJDecoderLayerWeight.cc +++ b/src/fastertransformer/models/gptj/GptJDecoderLayerWeight.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/gptj/GptJDecoderLayerWeight.h b/src/fastertransformer/models/gptj/GptJDecoderLayerWeight.h index 713436dd1..ea1b0f1d7 100644 --- a/src/fastertransformer/models/gptj/GptJDecoderLayerWeight.h +++ b/src/fastertransformer/models/gptj/GptJDecoderLayerWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/gptj/GptJWeight.cc b/src/fastertransformer/models/gptj/GptJWeight.cc index c2fb6898f..e64162b1f 100644 --- a/src/fastertransformer/models/gptj/GptJWeight.cc +++ b/src/fastertransformer/models/gptj/GptJWeight.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -274,7 +274,9 @@ void GptJWeight::loadModel(std::string dir_path) } for (int l = 0; l < num_layer_; l++) { - decoder_layer_weights[l].loadModel(dir_path + "/model.layers." + std::to_string(l), model_file_type); + if (isValidLayerParallelId(l)) { + decoder_layer_weights[l].loadModel(dir_path + "/model.layers." + std::to_string(l), model_file_type); + } } } diff --git a/src/fastertransformer/models/gptj/GptJWeight.h b/src/fastertransformer/models/gptj/GptJWeight.h index 2cbe2c396..c75547e65 100644 --- a/src/fastertransformer/models/gptj/GptJWeight.h +++ b/src/fastertransformer/models/gptj/GptJWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/gptneox/CMakeLists.txt b/src/fastertransformer/models/gptneox/CMakeLists.txt index ac92205bc..41a35ca87 100644 --- a/src/fastertransformer/models/gptneox/CMakeLists.txt +++ b/src/fastertransformer/models/gptneox/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/gptneox/GptNeoX.cc b/src/fastertransformer/models/gptneox/GptNeoX.cc index c84a748db..cc7dd124b 100644 --- a/src/fastertransformer/models/gptneox/GptNeoX.cc +++ b/src/fastertransformer/models/gptneox/GptNeoX.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -397,6 +397,7 @@ void GptNeoX::forward(std::unordered_map* output_t // temperature [1] or [batch_size] on cpu, optional, float. // len_penalty [1] or [batch_size] on cpu, optional, float. // repetition_penalty [1] or [batch_size] on cpu, optional, float. + // min_length [1] or [batch_size] on cpu, optional, int // random_seed [1] or [batch_size] on cpu, optional, unsigned long long int. // request_prompt_lengths [batch_size], optional // request_prompt_embedding [batch_size, max_prompt_length, hidden_units], float, optional diff --git a/src/fastertransformer/models/gptneox/GptNeoX.h b/src/fastertransformer/models/gptneox/GptNeoX.h index 740dc9cb9..cb755ef58 100644 --- a/src/fastertransformer/models/gptneox/GptNeoX.h +++ b/src/fastertransformer/models/gptneox/GptNeoX.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/gptneox/GptNeoXContextDecoder.cc b/src/fastertransformer/models/gptneox/GptNeoXContextDecoder.cc index 723709428..e9829d43a 100644 --- a/src/fastertransformer/models/gptneox/GptNeoXContextDecoder.cc +++ b/src/fastertransformer/models/gptneox/GptNeoXContextDecoder.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -80,7 +80,9 @@ void GptNeoXContextDecoder::allocateBuffer(size_t batch_size, size_t seq_len) allocator_->reMalloc(ffn_output_, sizeof(T) * batch_size * seq_len * hidden_units_, false)); decoder_layer_output_ = reinterpret_cast( allocator_->reMalloc(decoder_layer_output_, sizeof(T) * batch_size * seq_len * hidden_units_, false)); - token_num_ = reinterpret_cast(allocator_->reMalloc(token_num_, sizeof(size_t) * 1, false)); + if (!is_allocate_buffer_) { + check_cuda_error(cudaMallocHost((void**)&h_pinned_token_num_ptr_, sizeof(size_t))); + } padding_offset_ = reinterpret_cast(allocator_->reMalloc(padding_offset_, sizeof(int) * batch_size * seq_len, false)); cu_seqlens_ = reinterpret_cast(allocator_->reMalloc(cu_seqlens_, sizeof(int) * (batch_size + 1), false)); @@ -95,7 +97,7 @@ void GptNeoXContextDecoder::freeBuffer() allocator_->free((void**)(&self_attn_output_)); allocator_->free((void**)(&ffn_output_)); allocator_->free((void**)(&decoder_layer_output_)); - allocator_->free((void**)(&token_num_)); + check_cuda_error(cudaFreeHost(h_pinned_token_num_ptr_)); allocator_->free((void**)(&padding_offset_)); allocator_->free((void**)(&cu_seqlens_)); is_allocate_buffer_ = false; @@ -272,16 +274,17 @@ void GptNeoXContextDecoder::forward(std::unordered_map* self_v_cache_size.push_back(*t); } - AttentionType attention_type = - (d_prefix_prompt_lengths != nullptr || is_qk_buf_float_) ? getUnfusedAttentionType(attention_type_) : attention_type_; - const bool is_unpadded_mha = isUnPaddedMHA(attention_type); + AttentionType attention_type = (d_prefix_prompt_lengths != nullptr || is_qk_buf_float_) ? + getUnfusedAttentionType(attention_type_) : + attention_type_; + const bool is_unpadded_mha = isUnPaddedMHA(attention_type); for (int ite = 0; ite < iteration_num; ite++) { size_t h_token_num = local_batch_size * seq_len; if (is_unpadded_mha) { const int* base_input_lengths = input_tensors->at("input_lengths").getPtr(); - invokeGetPaddingOffsetAndCuSeqLens(&h_token_num, - token_num_, + invokeGetPaddingOffsetAndCuSeqLens(h_pinned_token_num_ptr_, + &h_token_num, padding_offset_, cu_seqlens_, base_input_lengths + ite * local_batch_size, @@ -422,6 +425,7 @@ void GptNeoXContextDecoder::forward(std::unordered_map* (float*)nullptr, (float*)nullptr, (float*)nullptr, + (float*)nullptr, 0, stream_); } diff --git a/src/fastertransformer/models/gptneox/GptNeoXContextDecoder.h b/src/fastertransformer/models/gptneox/GptNeoXContextDecoder.h index f9ac58910..c81dcfe90 100644 --- a/src/fastertransformer/models/gptneox/GptNeoXContextDecoder.h +++ b/src/fastertransformer/models/gptneox/GptNeoXContextDecoder.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -73,13 +73,13 @@ class GptNeoXContextDecoder: public BaseLayer { void initialize(); protected: - T* decoder_normed_input_ = nullptr; - T* self_attn_output_ = nullptr; - T* ffn_output_ = nullptr; - T* decoder_layer_output_ = nullptr; - size_t* token_num_ = nullptr; - int* padding_offset_ = nullptr; - int* cu_seqlens_ = nullptr; + T* decoder_normed_input_ = nullptr; + T* self_attn_output_ = nullptr; + T* ffn_output_ = nullptr; + T* decoder_layer_output_ = nullptr; + size_t* h_pinned_token_num_ptr_ = nullptr; + int* padding_offset_ = nullptr; + int* cu_seqlens_ = nullptr; public: GptNeoXContextDecoder(size_t head_num, diff --git a/src/fastertransformer/models/gptneox/GptNeoXDecoder.cc b/src/fastertransformer/models/gptneox/GptNeoXDecoder.cc index 6b1d604d6..7b73ba8ee 100644 --- a/src/fastertransformer/models/gptneox/GptNeoXDecoder.cc +++ b/src/fastertransformer/models/gptneox/GptNeoXDecoder.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -322,6 +322,7 @@ void GptNeoXDecoder::forward(std::unordered_map* (float*)nullptr, (float*)nullptr, (float*)nullptr, + (float*)nullptr, 0, stream_); } diff --git a/src/fastertransformer/models/gptneox/GptNeoXDecoder.h b/src/fastertransformer/models/gptneox/GptNeoXDecoder.h index c9d7fa7a6..add736adc 100644 --- a/src/fastertransformer/models/gptneox/GptNeoXDecoder.h +++ b/src/fastertransformer/models/gptneox/GptNeoXDecoder.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/gptneox/GptNeoXDecoderLayerWeight.cc b/src/fastertransformer/models/gptneox/GptNeoXDecoderLayerWeight.cc index 148329706..3d62df83d 100644 --- a/src/fastertransformer/models/gptneox/GptNeoXDecoderLayerWeight.cc +++ b/src/fastertransformer/models/gptneox/GptNeoXDecoderLayerWeight.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/gptneox/GptNeoXDecoderLayerWeight.h b/src/fastertransformer/models/gptneox/GptNeoXDecoderLayerWeight.h index 31e22224e..3662256c1 100644 --- a/src/fastertransformer/models/gptneox/GptNeoXDecoderLayerWeight.h +++ b/src/fastertransformer/models/gptneox/GptNeoXDecoderLayerWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/gptneox/GptNeoXWeight.cc b/src/fastertransformer/models/gptneox/GptNeoXWeight.cc index 94be0948a..0f052a3a3 100644 --- a/src/fastertransformer/models/gptneox/GptNeoXWeight.cc +++ b/src/fastertransformer/models/gptneox/GptNeoXWeight.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -272,7 +272,9 @@ void GptNeoXWeight::loadModel(std::string dir_path) } for (int l = 0; l < num_layer_; l++) { - decoder_layer_weights[l]->loadModel(dir_path + "/model.layers." + std::to_string(l), model_file_type); + if (isValidLayerParallelId(l)) { + decoder_layer_weights[l]->loadModel(dir_path + "/model.layers." + std::to_string(l), model_file_type); + } } } diff --git a/src/fastertransformer/models/gptneox/GptNeoXWeight.h b/src/fastertransformer/models/gptneox/GptNeoXWeight.h index 4cdb06163..2a6b1764e 100644 --- a/src/fastertransformer/models/gptneox/GptNeoXWeight.h +++ b/src/fastertransformer/models/gptneox/GptNeoXWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/longformer/CMakeLists.txt b/src/fastertransformer/models/longformer/CMakeLists.txt index 0c1fc2e2f..1b2cf2596 100644 --- a/src/fastertransformer/models/longformer/CMakeLists.txt +++ b/src/fastertransformer/models/longformer/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/longformer/LongformerEncoder.cc b/src/fastertransformer/models/longformer/LongformerEncoder.cc index bced3247d..a7278246d 100644 --- a/src/fastertransformer/models/longformer/LongformerEncoder.cc +++ b/src/fastertransformer/models/longformer/LongformerEncoder.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/longformer/LongformerEncoder.h b/src/fastertransformer/models/longformer/LongformerEncoder.h index a9c887b1e..8f6dac773 100644 --- a/src/fastertransformer/models/longformer/LongformerEncoder.h +++ b/src/fastertransformer/models/longformer/LongformerEncoder.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/multi_gpu_gpt/CMakeLists.txt b/src/fastertransformer/models/multi_gpu_gpt/CMakeLists.txt index aa72c5531..59117f330 100644 --- a/src/fastertransformer/models/multi_gpu_gpt/CMakeLists.txt +++ b/src/fastertransformer/models/multi_gpu_gpt/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -30,7 +30,7 @@ set_property(TARGET ParallelGptContextDecoder PROPERTY CUDA_RESOLVE_DEVICE_SYMBO target_link_libraries(ParallelGptContextDecoder PUBLIC -lcudart TensorParallelGeluFfnLayer TensorParallelReluFfnLayer TensorParallelGptContextAttentionLayer layernorm_kernels add_residual_kernels bert_preprocess_kernels nccl_utils gpt_kernels tensor - cuda_utils logger) + nvtx_utils cuda_utils logger) add_library(ParallelGptDecoder STATIC ParallelGptDecoder.cc) set_property(TARGET ParallelGptDecoder PROPERTY POSITION_INDEPENDENT_CODE ON) @@ -44,7 +44,7 @@ set_property(TARGET ParallelGpt PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET ParallelGpt PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) target_link_libraries(ParallelGpt PUBLIC -lcudart ParallelGptDecoder ParallelGptContextDecoder decoding_kernels gpt_kernels DynamicDecodeLayer BaseBeamSearchLayer bert_preprocess_kernels gen_relative_pos_bias ParallelGptWeight - custom_ar_comm logprob_kernels cuda_utils logger) + custom_ar_comm logprob_kernels cuda_utils logger nvtx_utils) add_executable(gpt_gemm gpt_gemm.cc) target_link_libraries(gpt_gemm PUBLIC -lcudart gpt_gemm_func memory_utils cuda_utils logger) diff --git a/src/fastertransformer/models/multi_gpu_gpt/ParallelGpt.cc b/src/fastertransformer/models/multi_gpu_gpt/ParallelGpt.cc index 594ef76b8..54b36ba57 100644 --- a/src/fastertransformer/models/multi_gpu_gpt/ParallelGpt.cc +++ b/src/fastertransformer/models/multi_gpu_gpt/ParallelGpt.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * Copyright (c) 2022, SK Telecom Authored by A. Dialog * @@ -24,6 +24,7 @@ #include "src/fastertransformer/kernels/logprob_kernels.h" #include "src/fastertransformer/layers/beam_search_layers/BaseBeamSearchLayer.h" #include "src/fastertransformer/utils/logger.h" +#include "src/fastertransformer/utils/nvtx_utils.h" namespace fastertransformer { @@ -36,6 +37,9 @@ void ParallelGpt::initialize() size_per_head_, inter_size_, num_layer_, + expert_num_, + moe_k_, + moe_layer_index_, layernorm_eps_, gpt_variant_params_, tensor_para_, @@ -56,6 +60,9 @@ void ParallelGpt::initialize() size_per_head_, inter_size_, num_layer_, + expert_num_, + moe_k_, + moe_layer_index_, layernorm_eps_, gpt_variant_params_, tensor_para_, @@ -271,6 +278,9 @@ ParallelGpt::ParallelGpt(size_t max_batch_size, size_t size_per_head, size_t inter_size, size_t num_layer, + size_t expert_num, + size_t moe_k, + std::vector moe_layer_index, size_t vocab_size, int start_id, int end_id, @@ -302,6 +312,9 @@ ParallelGpt::ParallelGpt(size_t max_batch_size, size_per_head_(size_per_head), inter_size_(inter_size), num_layer_(num_layer), + expert_num_(expert_num), + moe_k_(moe_k), + moe_layer_index_(moe_layer_index), vocab_size_(vocab_size), start_id_(start_id), end_id_(end_id), @@ -327,7 +340,11 @@ ParallelGpt::ParallelGpt(size_t max_batch_size, shared_contexts_ratio_(shared_contexts_ratio) { int local_vacab_size = ceil(vocab_size_ / 1.f / tensor_para_.world_size_); - if (std::is_same::value) { + if (std::is_same::value +#ifdef ENABLE_BF16 + || std::is_same<__nv_bfloat16, T>::value +#endif + ) { local_vacab_size = ceil(local_vacab_size / 8.f) * 8; } vocab_size_padded_ = (size_t)local_vacab_size * tensor_para_.world_size_; @@ -341,6 +358,9 @@ ParallelGpt::ParallelGpt(ParallelGpt const& gpt): size_per_head_(gpt.size_per_head_), inter_size_(gpt.inter_size_), num_layer_(gpt.num_layer_), + expert_num_(gpt.expert_num_), + moe_k_(gpt.moe_k_), + moe_layer_index_(gpt.moe_layer_index_), vocab_size_(gpt.vocab_size_), start_id_(gpt.start_id_), end_id_(gpt.end_id_), @@ -568,6 +588,9 @@ void ParallelGpt::forward(std::unordered_map* outp // temperature [1] or [batch_size] on cpu, optional, float. // len_penalty [1] or [batch_size] on cpu, optional, float. // repetition_penalty [1] or [batch_size] on cpu, optional, float. + // presence_penalty [1] or [batch_size] on cpu, optional, float. + // Only one of repetition and presence penalties is allowed. + // min_length [1] or [batch_size] on cpu, optional, int // random_seed [1] or [batch_size] on cpu, optional, unsigned long long int. // request_prompt_lengths [batch_size], optional // request_prompt_lengths_h [batch_size], cpu, optional @@ -763,6 +786,7 @@ void ParallelGpt::forward(std::unordered_map* outp "the cumulative log probability computation of input contexts."); } + PUSH_RANGE("buffer allocation"); if (!continue_gen) { allocateBuffer(batch_size, beam_width, @@ -772,8 +796,8 @@ void ParallelGpt::forward(std::unordered_map* outp is_return_context_cum_log_probs); sync_check_cuda_error(); } - setSeqLimitLen(seq_limit_len_, input_tensors->at("output_seq_len"), limit_len_offset, batch_size); + POP_RANGE; const DataType data_type = getTensorType(); const cudaDataType_t gemm_data_type = getCudaDataType(); @@ -788,17 +812,22 @@ void ParallelGpt::forward(std::unordered_map* outp num_layer_ / pipeline_para_.world_size_, batch_size * beam_width, local_head_num_, memory_len, size_per_head_}; { + PUSH_RANGE("dynamic decode setup"); TensorMap input_map(*input_tensors); dynamic_decode_layer_->setup(batch_size, beam_width, &input_map); handleOptArg(&input_map, "start_id", start_ids_buf_, start_id_, batch_size); handleOptArg(&input_map, "end_id", end_ids_buf_, end_id_, batch_size); + POP_RANGE; } if (gpt_variant_params_.use_attention_linear_bias) { + PUSH_RANGE("build alibi slopes"); invokeBuildAlibiSlopes(linear_bias_slopes_, head_num_, stream_); + POP_RANGE; } if (continue_gen) { + PUSH_RANGE("input tiling and init"); invokeTileGptInputs(tiled_input_ids_buf_, tiled_input_lengths_buf_, input_tensors->at("input_ids").getPtr(), @@ -824,10 +853,12 @@ void ParallelGpt::forward(std::unordered_map* outp max_input_length, 1, stream_); + POP_RANGE; } else { // TODO(bhsueh) Initilaize them in one kernel // initialize the output ids and parent ids + PUSH_RANGE("initialize output and parent ids"); cudaMemsetAsync(output_ids_buf_, 0, sizeof(int) * batch_size * beam_width * session_len, stream_); cudaMemsetAsync(parent_ids_buf_, 0, sizeof(int) * batch_size * beam_width * session_len, stream_); cudaMemsetAsync(masked_tokens_, false, sizeof(bool) * batch_size * beam_width * memory_len, stream_); @@ -836,7 +867,9 @@ void ParallelGpt::forward(std::unordered_map* outp cudaMemsetAsync(cache_indirections_[0], 0, 2 * sizeof(int) * batch_size * beam_width * memory_len, stream_); } sync_check_cuda_error(); + POP_RANGE; + PUSH_RANGE("padded embedding kernel init"); if (vocab_size_ == vocab_size_padded_) { padded_embedding_kernel_ptr_ = gpt_weights->post_decoder_embedding.kernel; } @@ -847,9 +880,11 @@ void ParallelGpt::forward(std::unordered_map* outp stream_); sync_check_cuda_error(); } + POP_RANGE; int compact_size; bool use_shared_contexts = (shared_contexts_ratio_ > 0.0f) && (max_input_length >= 1) && (batch_size > 1); + PUSH_RANGE("find context dups"); if (use_shared_contexts) { invokeFindContextDups(shared_contexts_idx_, batch_to_compact_idx_, @@ -863,12 +898,14 @@ void ParallelGpt::forward(std::unordered_map* outp use_shared_contexts = compact_size <= shared_contexts_ratio_ * batch_size; sync_check_cuda_error(); } + POP_RANGE; // NOTE: p/prompt-tuning process here (lookup prompt embedding tables by task name ids) // get p/prompt-tuning weight for each batch --> shape [batch, beam_width] // --> ptrs with shape [prompt_len, hidden_size] std::vector p_prompt_tuning_batch_ptrs; std::vector p_prompt_tuning_lengths; + PUSH_RANGE("prompt embedding lookup"); if (use_loaded_p_prompt_embedding) { for (int bs_id = 0; bs_id < batch_size; ++bs_id) { int task_id = prompt_learning_task_name_ids[bs_id]; @@ -907,9 +944,11 @@ void ParallelGpt::forward(std::unordered_map* outp sync_check_cuda_error(); } + POP_RANGE; // handle first step if (has_p_prompt_tuning_ || has_prefix_prompt_ || has_prefix_soft_prompt_ || max_input_length > 1) { + PUSH_RANGE("input tiling and init"); invokeTileGptPromptInputs(tiled_input_ids_buf_, tiled_input_lengths_buf_, use_request_p_prompt_embedding ? tiled_prompt_lengths_buf_ : nullptr, @@ -923,8 +962,10 @@ void ParallelGpt::forward(std::unordered_map* outp max_input_length, stream_); sync_check_cuda_error(); + POP_RANGE; if (has_prefix_soft_prompt_) { + PUSH_RANGE("input id embedding lookup"); inputIdsEmbeddingLookupPosEncodingSoftPromptParam param; param.from_tensor = context_decoder_input_buf_; param.output_ids = output_ids_buf_; @@ -944,12 +985,14 @@ void ParallelGpt::forward(std::unordered_map* outp invokeInputIdsEmbeddingLookupPosEncodingSoftPrompt(param); sync_check_cuda_error(); + POP_RANGE; max_input_length += max_prefix_soft_prompt_length; // view soft_prompt as input max_context_len += max_prefix_soft_prompt_length; } else { // NOTE: add prompt embeddings here (for p/prompt tuning) + PUSH_RANGE("input id embedding lookup"); pPromptTuningParam prompt_param{ use_loaded_p_prompt_embedding ? prompt_learning_weight_batch_ : (const T**)nullptr, prompt_learning_start_id_, @@ -970,9 +1013,11 @@ void ParallelGpt::forward(std::unordered_map* outp hidden_units_, stream_); sync_check_cuda_error(); + POP_RANGE; } if (gpt_variant_params_.has_pre_decoder_layernorm) { + PUSH_RANGE("pre-decoder layernorm"); invokeGeneralLayerNorm(context_decoder_normed_input_buf_, context_decoder_input_buf_, gpt_weights->pre_decoder_layernorm.gamma, @@ -983,7 +1028,9 @@ void ParallelGpt::forward(std::unordered_map* outp (float*)nullptr, 0, stream_); + POP_RANGE; } + PUSH_RANGE("build decoder attention mask"); invokeBuildDecoderAttentionMask(input_attention_mask_, tiled_input_lengths_buf_, nullptr, @@ -992,6 +1039,7 @@ void ParallelGpt::forward(std::unordered_map* outp 0, stream_); sync_check_cuda_error(); + POP_RANGE; TensorMap decoder_input_tensors( {{"decoder_input", @@ -1037,14 +1085,17 @@ void ParallelGpt::forward(std::unordered_map* outp &decoder_output_tensors, &decoder_input_tensors, &gpt_weights->decoder_layer_weights); if (is_return_context_embeddings) { + PUSH_RANGE("context embedding sum length dim"); invokeSumLengthDimension(output_tensors->at("context_embeddings").getPtr(), context_decoder_output_buf_, batch_size * beam_width, max_input_length, hidden_units_, stream_); + POP_RANGE; } + PUSH_RANGE("decoding init"); invokeDecodingInitialize(finished_buf_, sequence_lengths_, nullptr, @@ -1054,8 +1105,10 @@ void ParallelGpt::forward(std::unordered_map* outp beam_width, max_input_length - 1, stream_); + POP_RANGE; if (is_return_context_cum_log_probs) { + PUSH_RANGE("compute context cumulative log probs"); computeContextCumLogProbs(cum_log_probs_, context_decoder_output_buf_, tiled_input_ids_buf_, @@ -1064,6 +1117,7 @@ void ParallelGpt::forward(std::unordered_map* outp beam_width, (size_t)max_input_length, gpt_weights); + POP_RANGE; } sync_check_cuda_error(); } @@ -1071,6 +1125,7 @@ void ParallelGpt::forward(std::unordered_map* outp FT_CHECK(prompt_learning_type_ == PromptLearningType::no_prompt && request_prompt_type == PromptLearningType::no_prompt); max_input_length++; + PUSH_RANGE("decoding init"); invokeDecodingInitialize(finished_buf_, sequence_lengths_, output_ids_buf_, @@ -1083,10 +1138,12 @@ void ParallelGpt::forward(std::unordered_map* outp std::vector h_input_lengths(batch_size * beam_width, 1); cudaAutoCpy(tiled_input_lengths_buf_, h_input_lengths.data(), batch_size * beam_width, stream_); sync_check_cuda_error(); + POP_RANGE; } else if (max_input_length == 1) { FT_CHECK(prompt_learning_type_ == PromptLearningType::no_prompt && request_prompt_type == PromptLearningType::no_prompt); + PUSH_RANGE("decoding init"); invokeDecodingInitialize(finished_buf_, sequence_lengths_, nullptr, @@ -1097,6 +1154,8 @@ void ParallelGpt::forward(std::unordered_map* outp max_input_length - 1, stream_); sync_check_cuda_error(); + POP_RANGE; + PUSH_RANGE("input tiling and init"); invokeTileGptInputs(tiled_input_ids_buf_, tiled_input_lengths_buf_, input_tensors->at("input_ids").getPtr(), @@ -1108,9 +1167,11 @@ void ParallelGpt::forward(std::unordered_map* outp sync_check_cuda_error(); cudaAutoCpy(output_ids_buf_, tiled_input_ids_buf_, batch_size * beam_width, stream_); + POP_RANGE; } } + PUSH_RANGE("mask padding tokens"); invokeMaskPaddingTokens(masked_tokens_, input_tensors->at("input_lengths").getPtr(), memory_len, @@ -1119,6 +1180,7 @@ void ParallelGpt::forward(std::unordered_map* outp batch_size, beam_width, stream_); + POP_RANGE; // If continue, we restart from initial_step because last token hasn't been processed in decoder const int step_start = continue_gen ? initial_step : max_input_length; @@ -1136,11 +1198,58 @@ void ParallelGpt::forward(std::unordered_map* outp const size_t iteration_num = batch_size / local_batch_size; *generation_should_stop_ = !fill_caches_only; + PUSH_RANGE(fmtstr("token_%d", step_ - step_start)); for (uint ite = 0; ite < iteration_num; ++ite) { const int id_offset = ite * local_batch_size * beam_width; const int hidden_units_offset = id_offset * hidden_units_; const int vocab_size_units_offset = id_offset * vocab_size_padded_; + // Rank 0~N-1 needs to update the buffer by the results of last rank when the pipeline parallelism is + // enabled (pipeline_para_.world_size_ > 1). And if step_ == step_start, then this is the first step and + // these buffers are initialized by context directly. + if (step_ != step_start && pipeline_para_.rank_ != pipeline_para_.world_size_ - 1 + && pipeline_para_.world_size_ > 1) { + ftNcclGroupStart(); + // receive updated sequence_length_ from last rank + ftNcclRecv(sequence_lengths_ + id_offset, + local_batch_size * beam_width, + pipeline_para_.world_size_ - 1, + pipeline_para_, + stream_); + + // receive updated generation_should_stop_ from last rank + if (ite == 0) { + ftNcclRecv(generation_should_stop_, 1, pipeline_para_.world_size_ - 1, pipeline_para_, stream_); + } + + // receive updated cache_indirections from last rank + if (beam_width > 1) { + ftNcclRecv(cache_indirections_[tgt_indir_idx] + id_offset * memory_len, + local_batch_size * beam_width * memory_len, + pipeline_para_.world_size_ - 1, + pipeline_para_, + stream_); + } + + // for ids of next step, only first rank needs to receive updated ids + if (pipeline_para_.rank_ == 0) { + ftNcclRecv(output_ids_buf_ + (step_ - 1) * batch_size * beam_width + id_offset, + local_batch_size * beam_width, + pipeline_para_.world_size_ - 1, + pipeline_para_, + stream_); + } + + ftNcclGroupEnd(); + // throw errors when detected + ftNcclStreamSynchronize(tensor_para_, pipeline_para_, stream_); + sync_check_cuda_error(); + + if (ite == 0 && *generation_should_stop_) { + break; + } + } + if ((max_input_length <= 1) || (step_ > step_start) || continue_gen) { if (pipeline_para_.rank_ == 0) { invokeEmbeddingLookupPosEncodingPadCount(decoder_input_buf_ + hidden_units_offset, @@ -1228,6 +1337,7 @@ void ParallelGpt::forward(std::unordered_map* outp if (!fill_caches_only && pipeline_para_.rank_ == pipeline_para_.world_size_ - 1) { // OPT + PUSH_RANGE("Token Final Layer Norm"); T* decoder_output_final_buf = gpt_variant_params_.has_post_decoder_layernorm ? normed_decoder_output_buf_ : decoder_output_buf_; if (gpt_variant_params_.has_post_decoder_layernorm) { @@ -1243,10 +1353,12 @@ void ParallelGpt::forward(std::unordered_map* outp stream_); } sync_check_cuda_error(); + POP_RANGE; if (tensor_para_.world_size_ == 1) { float alpha = 1.0f; float beta = 0.0f; + PUSH_RANGE("logits gemm"); cublas_wrapper_->Gemm(CUBLAS_OP_T, CUBLAS_OP_N, vocab_size_padded_, // n @@ -1265,12 +1377,14 @@ void ParallelGpt::forward(std::unordered_map* outp vocab_size_padded_, /* n */ CUDA_R_32F, cublasGemmAlgo_t(-1)); + POP_RANGE; } else { FT_CHECK(vocab_size_padded_ % tensor_para_.world_size_ == 0); const int local_vocab_size = vocab_size_padded_ / tensor_para_.world_size_; float alpha = 1.0f; float beta = 0.0f; + PUSH_RANGE("logits gemm"); cublas_wrapper_->Gemm(CUBLAS_OP_T, CUBLAS_OP_N, local_vocab_size, // n @@ -1291,6 +1405,8 @@ void ParallelGpt::forward(std::unordered_map* outp local_vocab_size, /* n */ CUDA_R_32F, cublasGemmAlgo_t(-1)); + POP_RANGE; + PUSH_RANGE("logits all reduce sum"); ftNcclAllGather(nccl_logits_buf_ + vocab_size_units_offset, nccl_logits_buf_ + vocab_size_units_offset, local_batch_size * beam_width * local_vocab_size, @@ -1303,6 +1419,7 @@ void ParallelGpt::forward(std::unordered_map* outp local_batch_size * beam_width, local_vocab_size, stream_); + POP_RANGE; } int tmp_local_batch_size = local_batch_size; @@ -1368,42 +1485,56 @@ void ParallelGpt::forward(std::unordered_map* outp dynamic_decode_output_tensors.insert(*t); } + PUSH_RANGE("result sampling and stop check"); dynamic_decode_layer_->forward(&dynamic_decode_output_tensors, &dynamic_decode_input_tensors); *generation_should_stop_ &= subbatch_should_stop; + POP_RANGE; } - } - if (fill_caches_only) { - invokePlusScalar(sequence_lengths_, 1, batch_size * beam_width, stream_); - } - else if (pipeline_para_.world_size_ > 1) { - ftNcclGroupStart(); - ftNcclBroadCast(output_ids_buf_ + step_ * batch_size * beam_width, - batch_size * beam_width, - pipeline_para_.world_size_ - 1, - pipeline_para_, - stream_); + PUSH_RANGE("result communication"); + // send results to other rank + if (fill_caches_only) { + invokePlusScalar(sequence_lengths_, 1, batch_size * beam_width, stream_); + } - ftNcclBroadCast( - sequence_lengths_, batch_size * beam_width, pipeline_para_.world_size_ - 1, pipeline_para_, stream_); + // When pipeline parallelism is enabled (pipeline_para_.world_size_ > 1), last rank needs to send updates + // to other ranks. + if (step_ < gen_len - 1 && pipeline_para_.world_size_ > 1 + && pipeline_para_.rank_ == pipeline_para_.world_size_ - 1) { + ftNcclGroupStart(); + for (int i = 0; i < pipeline_para_.world_size_ - 1; i++) { + // send updated sequence_length_ to other rank + ftNcclSend( + sequence_lengths_ + id_offset, local_batch_size * beam_width, i, pipeline_para_, stream_); + + // send updated generation_should_stop_ + if (ite == 0) { + ftNcclSend(generation_should_stop_, 1, i, pipeline_para_, stream_); + } - ftNcclBroadCast(generation_should_stop_, 1, pipeline_para_.world_size_ - 1, pipeline_para_, stream_); + // send updated cache_indirections + if (beam_width > 1) { + ftNcclSend(cache_indirections_[tgt_indir_idx] + id_offset * memory_len, + local_batch_size * beam_width * memory_len, + i, + pipeline_para_, + stream_); + } + } - if (beam_width > 1) { - ftNcclBroadCast(cache_indirections_[tgt_indir_idx], - batch_size * beam_width * memory_len, - pipeline_para_.world_size_ - 1, - pipeline_para_, - stream_); - } - ftNcclGroupEnd(); - // throw errors when detected - ftNcclStreamSynchronize(tensor_para_, pipeline_para_, stream_); - sync_check_cuda_error(); - } + // for ids of next step, only need to send updated ids to first rank + ftNcclSend(output_ids_buf_ + step_ * batch_size * beam_width + id_offset, + local_batch_size * beam_width, + 0, + pipeline_para_, + stream_); - if (*generation_should_stop_) { - break; + ftNcclGroupEnd(); + // throw errors when detected + ftNcclStreamSynchronize(tensor_para_, pipeline_para_, stream_); + sync_check_cuda_error(); + } + POP_RANGE; } if (token_generated_cb_ && step_ + 1 < (int)gen_len) { @@ -1426,10 +1557,13 @@ void ParallelGpt::forward(std::unordered_map* outp beam_width, stream_); } + POP_RANGE; } + PUSH_RANGE("communicate tensors"); setOutputTensors( output_tensors, input_tensors, gen_len, session_len, max_context_len, max_input_without_prompt_length); sendTensorsToFirstPipelineNode(output_tensors, input_tensors); + POP_RANGE; } template diff --git a/src/fastertransformer/models/multi_gpu_gpt/ParallelGpt.h b/src/fastertransformer/models/multi_gpu_gpt/ParallelGpt.h index 730534c7a..fbe061e19 100644 --- a/src/fastertransformer/models/multi_gpu_gpt/ParallelGpt.h +++ b/src/fastertransformer/models/multi_gpu_gpt/ParallelGpt.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -32,11 +32,14 @@ template class ParallelGpt: public BaseLayer { private: // meta data - size_t head_num_; - size_t size_per_head_; - size_t inter_size_; - size_t num_layer_; - size_t vocab_size_; + size_t head_num_; + size_t size_per_head_; + size_t inter_size_; + size_t num_layer_; + size_t vocab_size_; + size_t expert_num_; + size_t moe_k_; + std::vector moe_layer_index_; int start_id_; int end_id_; @@ -62,10 +65,10 @@ class ParallelGpt: public BaseLayer { std::shared_ptr custom_all_reduce_comm_; int enable_custom_all_reduce_; - const bool is_context_qk_buf_float_ = false; - size_t vocab_size_padded_; - const int int8_mode_ = 0; - AttentionType attention_type_ = AttentionType::UNFUSED_MHA; + const bool is_context_qk_buf_float_ = false; + size_t vocab_size_padded_; + const int int8_mode_ = 0; + AttentionType attention_type_ = AttentionType::UNFUSED_MHA; // Prompt Learning Parameters PromptLearningType prompt_learning_type_; @@ -188,6 +191,9 @@ class ParallelGpt: public BaseLayer { size_t size_per_head, size_t inter_size, size_t num_layer, + size_t expert_num, + size_t moe_k, + std::vector moe_layer_index, size_t vocab_size, int start_id, int end_id, diff --git a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptContextDecoder.cc b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptContextDecoder.cc index 731e388a0..612561e43 100644 --- a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptContextDecoder.cc +++ b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptContextDecoder.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2022, SK Telecom Authored by A. Dialog * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -18,6 +18,7 @@ #include "src/fastertransformer/models/multi_gpu_gpt/ParallelGptContextDecoder.h" #include "src/fastertransformer/kernels/bert_preprocess_kernels.h" #include "src/fastertransformer/kernels/gpt_kernels.h" +#include "src/fastertransformer/utils/nvtx_utils.h" namespace fastertransformer { @@ -48,7 +49,7 @@ void ParallelGptContextDecoder::initialize() max_seq_len_, head_num_, size_per_head_, - 0, // expert_num + expert_num_, // expert_num max_inter_size, tensor_para_, stream_, @@ -67,7 +68,7 @@ void ParallelGptContextDecoder::initialize() max_seq_len_, head_num_, size_per_head_, - 0, // expert_num + expert_num_, // expert_num max_inter_size, tensor_para_, stream_, @@ -106,16 +107,31 @@ void ParallelGptContextDecoder::allocateBuffer(size_t batch_size, size_t seq_ decoder_layer_output_ = reinterpret_cast( allocator_->reMalloc(decoder_layer_output_, sizeof(T) * batch_size * seq_len * hidden_units_, false)); if (int8_mode_ == 2) { - // TODO(mseznec): only use one buffer - self_attn_output_int32_ = reinterpret_cast(allocator_->reMalloc( - self_attn_output_int32_, sizeof(int32_t) * batch_size * seq_len * hidden_units_, false)); - decoder_layer_output_int32_ = reinterpret_cast(allocator_->reMalloc( - decoder_layer_output_int32_, sizeof(int32_t) * batch_size * seq_len * hidden_units_, false)); + // dynamic scale + attention_query_dynamic_scale_ = reinterpret_cast( + allocator_->reMalloc(attention_query_dynamic_scale_, sizeof(float) * batch_size * seq_len, true)); + ffn_intermediate_dynamic_scale_ = reinterpret_cast( + allocator_->reMalloc(ffn_intermediate_dynamic_scale_, sizeof(float) * batch_size * seq_len, true)); + } + if (!is_allocate_buffer_) { + check_cuda_error(cudaMallocHost((void**)&h_pinned_token_num_ptr_, sizeof(size_t))); } - token_num_ = reinterpret_cast(allocator_->reMalloc(token_num_, sizeof(size_t) * 1, false)); padding_offset_ = reinterpret_cast(allocator_->reMalloc(padding_offset_, sizeof(int) * batch_size * seq_len, false)); cu_seqlens_ = reinterpret_cast(allocator_->reMalloc(cu_seqlens_, sizeof(int) * (batch_size + 1), false)); + // for moe + expert_scales_ = reinterpret_cast( + allocator_->malloc(sizeof(T) * pad_to_multiple_of_16(moe_k_ * batch_size * seq_len), false)); + expanded_source_row_to_expanded_dest_row_ = reinterpret_cast( + allocator_->malloc(sizeof(int) * pad_to_multiple_of_16(moe_k_ * batch_size * seq_len), false)); + expert_for_source_row_ = reinterpret_cast( + allocator_->malloc(sizeof(int) * pad_to_multiple_of_16(moe_k_ * batch_size * seq_len), false)); + fc2_result_ = reinterpret_cast( + allocator_->malloc(sizeof(T) * pad_to_multiple_of_16(moe_k_ * batch_size * seq_len * hidden_units_), false)); + adapter_fc2_result_ = + has_adapters_ ? reinterpret_cast(allocator_->malloc( + sizeof(T) * pad_to_multiple_of_16(moe_k_ * batch_size * seq_len * hidden_units_), false)) : + nullptr; is_allocate_buffer_ = true; if (use_shared_contexts) { @@ -141,11 +157,18 @@ void ParallelGptContextDecoder::freeBuffer() allocator_->free((void**)(&self_attn_output_)); if (has_adapters_) { allocator_->free((void**)(&after_adapter_attn_output_)); + allocator_->free((void**)(&adapter_fc2_result_)); } allocator_->free((void**)(&decoder_layer_output_)); - allocator_->free((void**)(&token_num_)); + check_cuda_error(cudaFreeHost(h_pinned_token_num_ptr_)); allocator_->free((void**)(&padding_offset_)); allocator_->free((void**)(&cu_seqlens_)); + + allocator_->free((void**)(&expert_scales_)); + allocator_->free((void**)(&expanded_source_row_to_expanded_dest_row_)); + allocator_->free((void**)(&expert_for_source_row_)); + allocator_->free((void**)(&fc2_result_)); + if (compact_attention_mask_ != nullptr) { allocator_->free((void**)(&compact_decoder_features_)); allocator_->free((void**)(&compact_attention_mask_)); @@ -154,8 +177,8 @@ void ParallelGptContextDecoder::freeBuffer() allocator_->free((void**)(&v_cache_layer_)); } if (int8_mode_ == 2) { - allocator_->free((void**)(&decoder_layer_output_int32_)); - allocator_->free((void**)(&self_attn_output_int32_)); + allocator_->free((void**)(&attention_query_dynamic_scale_)); + allocator_->free((void**)(&ffn_intermediate_dynamic_scale_)); } is_allocate_buffer_ = false; } @@ -191,24 +214,27 @@ int ParallelGptContextDecoder::getFirstLayerParallelId() } template -ParallelGptContextDecoder::ParallelGptContextDecoder(size_t max_batch_size, - size_t max_seq_len, - size_t head_num, - size_t size_per_head, - size_t inter_size, - size_t num_layer, - float layernorm_eps, - gptVariantParams gpt_variant_params, - NcclParam tensor_para, - NcclParam pipeline_para, - cudaStream_t stream, - cublasMMWrapper* cublas_wrapper, - IAllocator* allocator, - bool is_free_buffer_after_forward, - bool is_qk_buf_float, - AttentionType attention_type, - bool sparse, - int int8_mode, +ParallelGptContextDecoder::ParallelGptContextDecoder(size_t max_batch_size, + size_t max_seq_len, + size_t head_num, + size_t size_per_head, + size_t inter_size, + size_t num_layer, + size_t expert_num, + size_t moe_k, + std::vector moe_layer_index, + float layernorm_eps, + gptVariantParams gpt_variant_params, + NcclParam tensor_para, + NcclParam pipeline_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool is_qk_buf_float, + AttentionType attention_type, + bool sparse, + int int8_mode, std::shared_ptr custom_all_reduce_comm, int enable_custom_all_reduce): BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward, nullptr, sparse), @@ -218,6 +244,9 @@ ParallelGptContextDecoder::ParallelGptContextDecoder(size_t max_bat size_per_head_(size_per_head), inter_size_(inter_size), num_layer_(num_layer), + expert_num_(expert_num), + moe_k_(moe_k), + moe_layer_index_(moe_layer_index), layernorm_eps_(layernorm_eps), layernorm_type_(gpt_variant_params.layernorm_type), activation_type_(gpt_variant_params.activation_type), @@ -244,6 +273,9 @@ ParallelGptContextDecoder::ParallelGptContextDecoder(ParallelGptContextDecode size_per_head_(decoder.size_per_head_), inter_size_(decoder.inter_size_), num_layer_(decoder.num_layer_), + expert_num_(decoder.expert_num_), + moe_k_(decoder.moe_k_), + moe_layer_index_(decoder.moe_layer_index_), layernorm_eps_(decoder.layernorm_eps_), layernorm_type_(decoder.layernorm_type_), activation_type_(decoder.activation_type_), @@ -320,8 +352,11 @@ void ParallelGptContextDecoder::forward( const DataType data_type = getTensorType(); + PUSH_RANGE("buffer allocation"); allocateBuffer(batch_size, seq_len, use_shared_contexts); + POP_RANGE; + PUSH_RANGE("compact inputs"); if (use_shared_contexts) { invokeCompactInputs(compact_decoder_features_, compact_attention_mask_, @@ -335,6 +370,7 @@ void ParallelGptContextDecoder::forward( hidden_units_, stream_); } + POP_RANGE; const size_t local_batch_size = getLocalBatchSize(batch_size, seq_len, pipeline_para_.world_size_); FT_CHECK(batch_size % local_batch_size == 0); @@ -344,7 +380,7 @@ void ParallelGptContextDecoder::forward( Tensor v_cache = output_tensors->at("value_cache"); const auto activation_in_type = int8_mode_ == 2 ? TYPE_INT8 : data_type; - const auto activation_out_type = int8_mode_ == 2 ? TYPE_INT32 : data_type; + const auto activation_out_type = data_type; // The resize of the key cache buffer by // (local_batch_size, local_head_num, size_per_head // x, max_seq_len, x) where x is constant. @@ -362,17 +398,20 @@ void ParallelGptContextDecoder::forward( self_v_cache_size[2] = seq_len; } - AttentionType attention_type = (input_tensors->isExist("linear_bias_slopes") || is_qk_buf_float_ || int8_mode_ == 2) ? - getUnfusedAttentionType(attention_type_) : attention_type_; + AttentionType attention_type = + (input_tensors->isExist("linear_bias_slopes") || is_qk_buf_float_ || int8_mode_ == 2) ? + getUnfusedAttentionType(attention_type_) : + attention_type_; const bool is_unpadded_mha = isUnPaddedMHA(attention_type); + PUSH_RANGE("context_generation"); for (uint ite = 0; ite < iteration_num; ite++) { size_t h_token_num = local_batch_size * seq_len; if (is_unpadded_mha) { const int* base_input_lengths = (use_shared_contexts ? compact_input_lengths_ : input_tensors->at("input_lengths").getPtr()); - invokeGetPaddingOffsetAndCuSeqLens(&h_token_num, - token_num_, + invokeGetPaddingOffsetAndCuSeqLens(h_pinned_token_num_ptr_, + &h_token_num, padding_offset_, cu_seqlens_, base_input_lengths + ite * local_batch_size, @@ -382,11 +421,14 @@ void ParallelGptContextDecoder::forward( } for (uint l = 0; l < num_layer_; l++) { + PUSH_RANGE(fmtstr("layer_%u", l)); + bool use_moe = std::find(moe_layer_index_.begin(), moe_layer_index_.end(), l) != moe_layer_index_.end(); if (isValidLayerParallelId(l) == false) { continue; } if (l == 0 && is_unpadded_mha) { + PUSH_RANGE("remove padding"); const T* base_input = (use_shared_contexts ? compact_decoder_features_ : decoder_input_tensor.getPtr()); invokeRemovePadding(decoder_layer_output_, @@ -395,6 +437,7 @@ void ParallelGptContextDecoder::forward( h_token_num, hidden_units_, stream_); + POP_RANGE; } ParallelGptDecoderLayerWeight* layer_weight = gpt_decoder_layer_weight->at(l); @@ -414,6 +457,7 @@ void ParallelGptContextDecoder::forward( } if (isFirstLayerParallelId(l) && pipeline_para_.rank_ != 0) { + PUSH_RANGE("input communication"); const int data_size = h_token_num * hidden_units_ / tensor_para_.world_size_; ftNcclRecv(decoder_input + data_size * tensor_para_.rank_, data_size, @@ -421,10 +465,14 @@ void ParallelGptContextDecoder::forward( pipeline_para_, stream_); if (tensor_para_.world_size_ > 1) { + PUSH_RANGE("all gather"); ftNcclAllGather(decoder_input, decoder_input, data_size, tensor_para_.rank_, tensor_para_, stream_); + POP_RANGE; } + POP_RANGE; } + PUSH_RANGE("pre-mha layernorm"); if (layernorm_type_ == LayerNormType::pre_layernorm) { invokeGeneralLayerNorm(decoder_normed_input_, decoder_input, @@ -433,11 +481,14 @@ void ParallelGptContextDecoder::forward( layernorm_eps_, h_token_num, hidden_units_, - layer_weight->self_attention_weights.query_weight.scale, + const_cast(layer_weight->self_attention_weights.query_weight.scale), + nullptr, + /* dynamic_quant_ ? attention_query_dynamic_scale_ : nullptr, */ int8_mode_, stream_); } sync_check_cuda_error(); + POP_RANGE; const bool is_final = false; // TODO(bhsueh) remove this flag @@ -466,6 +517,11 @@ void ParallelGptContextDecoder::forward( "cu_seqlens", Tensor{MEMORY_GPU, TYPE_INT32, {size_t(local_batch_size + 1)}, cu_seqlens_}); } + /* if (dynamic_quant_) { */ + /* self_attention_input_tensors.insert("attention_query_dynamic_scale", */ + /* Tensor{MEMORY_GPU, TYPE_FP32, {h_token_num}, attention_query_dynamic_scale_}); */ + /* } */ + if (input_tensors->isExist("linear_bias_slopes")) { self_attention_input_tensors.insert("linear_bias_slopes", input_tensors->at("linear_bias_slopes")); } @@ -482,16 +538,16 @@ void ParallelGptContextDecoder::forward( T* k_cache_ptr = use_shared_contexts ? k_cache_layer_ : k_cache.getPtrWithOffset(cache_offset); T* v_cache_ptr = use_shared_contexts ? v_cache_layer_ : v_cache.getPtrWithOffset(cache_offset); - T* attention_out = (int8_mode_ == 2) ? reinterpret_cast(self_attn_output_int32_) : self_attn_output_; TensorMap self_attention_output_tensors{ {"hidden_features", - Tensor{MEMORY_GPU, activation_out_type, {h_token_num, hidden_units_}, attention_out}}, + Tensor{MEMORY_GPU, activation_out_type, {h_token_num, hidden_units_}, self_attn_output_}}, {"key_cache", Tensor{MEMORY_GPU, data_type, self_k_cache_size, k_cache_ptr}}, {"value_cache", Tensor{MEMORY_GPU, data_type, self_v_cache_size, v_cache_ptr}}}; self_attention_layer_->forward( &self_attention_output_tensors, &self_attention_input_tensors, &layer_weight->self_attention_weights); + PUSH_RANGE("K/V cache clean"); if (use_shared_contexts) { // Even with local batches, we must process the whole K/V caches as any // element in batch_idx_to_compact_idx may reference the local batch @@ -512,8 +568,10 @@ void ParallelGptContextDecoder::forward( stream_); sync_check_cuda_error(); } + POP_RANGE; // the adapter after attention (only pre layernorm currently) + PUSH_RANGE("post mha layernorm"); if (has_adapters_) { invokeGenericActivation( self_attn_output_, @@ -545,9 +603,9 @@ void ParallelGptContextDecoder::forward( invokeGeneralAddBiasResidualPreLayerNorm( has_adapters_ ? after_adapter_attn_output_ : self_attn_output_, normed_self_attn_output_, - has_adapters_ ? after_adapter_attn_output_ : attention_out, + has_adapters_ ? after_adapter_attn_output_ : self_attn_output_, decoder_input, - has_adapters_ ? attention_out : nullptr, + has_adapters_ ? self_attn_output_ : nullptr, layer_weight->self_attn_layernorm_weights.gamma, layer_weight->self_attn_layernorm_weights.beta, has_adapters_ ? layer_weight->after_attention_adapter_weights.output_weight.bias : @@ -555,9 +613,10 @@ void ParallelGptContextDecoder::forward( layernorm_eps_, h_token_num, hidden_units_, - layer_weight->self_attention_weights.attention_output_weight.scale_inter, - layer_weight->self_attention_weights.attention_output_weight.scale_out, - layer_weight->ffn_weights.intermediate_weight.scale, + nullptr, + nullptr, + const_cast(layer_weight->ffn_weights.intermediate_weight.scale), + nullptr, // NOTE (perkzz): dynamic_quant_ ? ffn_intermediate_dynamic_scale_ : nullptr, int8_mode_, stream_); } @@ -575,17 +634,9 @@ void ParallelGptContextDecoder::forward( stream_); } sync_check_cuda_error(); + POP_RANGE; - T* ffn_output_ptr; - if (int8_mode_ == 2) { - ffn_output_ptr = reinterpret_cast(decoder_layer_output_int32_); - } - else if (has_adapters_) { - ffn_output_ptr = self_attn_output_; - } - else { - ffn_output_ptr = decoder_output; - } + T* ffn_output_ptr = has_adapters_ ? self_attn_output_ : decoder_output; TensorMap ffn_input_tensors( {{"ffn_input", @@ -594,67 +645,157 @@ void ParallelGptContextDecoder::forward( {h_token_num, hidden_units_}, layernorm_type_ == LayerNormType::pre_layernorm ? normed_self_attn_output_ : after_adapter_attn_output_}}}); - TensorMap ffn_output_tensors( - {{"ffn_output", - Tensor{MEMORY_GPU, activation_out_type, {h_token_num, hidden_units_}, ffn_output_ptr}}}); + TensorMap ffn_output_tensors; + if (!use_moe) { + ffn_output_tensors.insert( + "ffn_output", + Tensor{MEMORY_GPU, activation_out_type, {h_token_num, hidden_units_}, ffn_output_ptr}); + } + else { + ffn_input_tensors.insert("moe_k", Tensor{MEMORY_CPU, TYPE_UINT64, {1}, &moe_k_}); + + ffn_output_tensors.insert("ffn_output", + Tensor{MEMORY_GPU, + activation_out_type, + {moe_k_ * h_token_num, hidden_units_}, + has_adapters_ ? adapter_fc2_result_ : fc2_result_}); + ffn_output_tensors.insert( + "expert_scales", Tensor{MEMORY_GPU, activation_out_type, {h_token_num, moe_k_}, expert_scales_}); + ffn_output_tensors.insert( + "expanded_source_row_to_expanded_dest_row", + Tensor{MEMORY_GPU, TYPE_INT32, {h_token_num, moe_k_}, expanded_source_row_to_expanded_dest_row_}); + ffn_output_tensors.insert( + "expert_for_source_row", + Tensor{MEMORY_GPU, TYPE_INT32, {h_token_num, moe_k_}, expert_for_source_row_}); + } ffn_layer_->resetInterSize(inter_size_ / tensor_para_.world_size_); ffn_layer_->forward(&ffn_output_tensors, &ffn_input_tensors, &layer_weight->ffn_weights); // the adapter after ffn (only pre layernorm currently) + PUSH_RANGE("post ffn"); if (has_adapters_) { - invokeGenericActivation(ffn_output_ptr, - layer_weight->ffn_weights.output_weight.bias, - nullptr, - nullptr, - nullptr, - nullptr, - h_token_num, - hidden_units_, - 0, - nullptr, - nullptr, - stream_); - - TensorMap ffn_input_tensors( - {{"ffn_input", Tensor{MEMORY_GPU, data_type, {h_token_num, hidden_units_}, ffn_output_ptr}}}); - TensorMap ffn_output_tensors( - {{"ffn_output", Tensor{MEMORY_GPU, data_type, {h_token_num, hidden_units_}, decoder_output}}}); + TensorMap ffn_input_tensors; + TensorMap ffn_output_tensors; + if (!use_moe) { + invokeGenericActivation(ffn_output_ptr, + layer_weight->ffn_weights.output_weight.bias, + nullptr, + nullptr, + nullptr, + nullptr, + h_token_num, + hidden_units_, + 0, + nullptr, + nullptr, + stream_); + + ffn_input_tensors.insert( + "ffn_input", Tensor{MEMORY_GPU, data_type, {h_token_num, hidden_units_}, ffn_output_ptr}); + ffn_output_tensors.insert( + "ffn_output", Tensor{MEMORY_GPU, data_type, {h_token_num, hidden_units_}, decoder_output}); + } + else { + invokeGenericActivation(adapter_fc2_result_, + layer_weight->ffn_weights.output_weight.bias, + nullptr, + nullptr, + nullptr, + nullptr, + moe_k_ * h_token_num, + hidden_units_, + 0, + nullptr, + nullptr, + stream_); + + ffn_input_tensors.insert( + "ffn_input", + Tensor{MEMORY_GPU, data_type, {moe_k_ * h_token_num, hidden_units_}, adapter_fc2_result_}); + ffn_output_tensors.insert( + "ffn_output", + Tensor{MEMORY_GPU, data_type, {moe_k_ * h_token_num, hidden_units_}, fc2_result_}); + } ffn_layer_->resetInterSize(adapter_inter_size_ / tensor_para_.world_size_); ffn_layer_->forward(&ffn_output_tensors, &ffn_input_tensors, &layer_weight->after_ffn_adapter_weights); } - if (layernorm_type_ == LayerNormType::pre_layernorm) { - invokeAddBiasResidual(decoder_output, - int8_mode_ == 2 ? reinterpret_cast(decoder_layer_output_int32_) : - decoder_output, - after_adapter_attn_output_, - has_adapters_ ? ffn_output_ptr : nullptr, - has_adapters_ ? layer_weight->after_ffn_adapter_weights.output_weight.bias : - layer_weight->ffn_weights.output_weight.bias, - int8_mode_ == 2 ? layer_weight->ffn_weights.output_weight.scale_inter : nullptr, - int8_mode_ == 2 ? layer_weight->ffn_weights.output_weight.scale_out : nullptr, - h_token_num, - hidden_units_, - int8_mode_, - stream_); + if (!use_moe) { + if (layernorm_type_ == LayerNormType::pre_layernorm) { + invokeAddBiasResidual(decoder_output, + decoder_output, + after_adapter_attn_output_, + has_adapters_ ? ffn_output_ptr : nullptr, + has_adapters_ ? layer_weight->after_ffn_adapter_weights.output_weight.bias : + layer_weight->ffn_weights.output_weight.bias, + nullptr, + nullptr, + h_token_num, + hidden_units_, + stream_); + } + else if (layernorm_type_ == LayerNormType::post_layernorm) { + invokeAddBiasResidualLayerNorm(decoder_output, + after_adapter_attn_output_, + has_adapters_ ? + layer_weight->after_ffn_adapter_weights.output_weight.bias : + layer_weight->ffn_weights.output_weight.bias, + layer_weight->self_attn_layernorm_weights.gamma, + layer_weight->self_attn_layernorm_weights.beta, + layernorm_eps_, + h_token_num, + hidden_units_, + stream_); + } } - else if (layernorm_type_ == LayerNormType::post_layernorm) { - invokeAddBiasResidualLayerNorm(decoder_output, - after_adapter_attn_output_, - has_adapters_ ? - layer_weight->after_ffn_adapter_weights.output_weight.bias : - layer_weight->ffn_weights.output_weight.bias, - layer_weight->self_attn_layernorm_weights.gamma, - layer_weight->self_attn_layernorm_weights.beta, - layernorm_eps_, - h_token_num, - hidden_units_, - stream_); + else { + if (layernorm_type_ == LayerNormType::pre_layernorm) { + finalize_moe_routing_kernelLauncher(fc2_result_, + decoder_output, + after_adapter_attn_output_, + has_adapters_ ? ffn_output_ptr : nullptr, + has_adapters_ ? + layer_weight->after_ffn_adapter_weights.output_weight.bias : + layer_weight->ffn_weights.output_weight.bias, + expert_scales_, + expanded_source_row_to_expanded_dest_row_, + expert_for_source_row_, + h_token_num, + hidden_units_, + moe_k_, + stream_); + } + else if (layernorm_type_ == LayerNormType::post_layernorm) { + finalize_moe_routing_kernelLauncher(fc2_result_, + decoder_output, + after_adapter_attn_output_, + has_adapters_ ? + layer_weight->after_ffn_adapter_weights.output_weight.bias : + layer_weight->ffn_weights.output_weight.bias, + expert_scales_, + expanded_source_row_to_expanded_dest_row_, + expert_for_source_row_, + h_token_num, + hidden_units_, + moe_k_, + stream_); + invokeGeneralLayerNorm(decoder_output, + decoder_output, + layer_weight->self_attn_layernorm_weights.gamma, + layer_weight->self_attn_layernorm_weights.beta, + layernorm_eps_, + h_token_num, + hidden_units_, + (float*)nullptr, + 0, + stream_); + } } sync_check_cuda_error(); - + POP_RANGE; + PUSH_RANGE("Nccl send"); if (isLastLayerParallelId(l) == true && (pipeline_para_.rank_ != pipeline_para_.world_size_ - 1)) { const int data_size = h_token_num * hidden_units_ / tensor_para_.world_size_; ftNcclSend(decoder_output + data_size * tensor_para_.rank_, @@ -663,7 +804,9 @@ void ParallelGptContextDecoder::forward( pipeline_para_, stream_); } + POP_RANGE; + PUSH_RANGE("Rebuild padding"); if ((l == num_layer_ - 1) && is_unpadded_mha) { T* base_ptr = use_shared_contexts ? compact_decoder_features_ : output_tensors->at("decoder_output").getPtr(); @@ -674,9 +817,14 @@ void ParallelGptContextDecoder::forward( head_num_ * size_per_head_, stream_); } + POP_RANGE; + + POP_RANGE; } } + POP_RANGE; + PUSH_RANGE("uncompact outputs"); if (use_shared_contexts) { invokeUnCompactOutputs(output_tensors->at("decoder_output").getPtr(), compact_decoder_features_, @@ -685,7 +833,9 @@ void ParallelGptContextDecoder::forward( seq_len * hidden_units_, stream_); } + POP_RANGE; + PUSH_RANGE("last token hidden state lookup"); // TODO(bhsueh) We could optimize this point by only computing the last token for the last layer invokeLookupHiddenStateOfLastToken(output_tensors->at("last_token_hidden_units").getPtr(), output_tensors->at("decoder_output").getPtr(), @@ -694,7 +844,7 @@ void ParallelGptContextDecoder::forward( request_batch_size, hidden_units_, stream_); - + POP_RANGE; if (is_free_buffer_after_forward_ == true) { freeBuffer(); } diff --git a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptContextDecoder.h b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptContextDecoder.h index 9171ef31d..3ef7e83e7 100644 --- a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptContextDecoder.h +++ b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptContextDecoder.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -40,13 +40,17 @@ class ParallelGptContextDecoder: public BaseLayer { size_t max_seq_len_ = 0; // meta data - size_t head_num_; - size_t size_per_head_; - size_t inter_size_; - size_t num_layer_; - float layernorm_eps_; - LayerNormType layernorm_type_; - ActivationType activation_type_; + size_t head_num_; + size_t size_per_head_; + size_t inter_size_; + size_t num_layer_; + size_t num_valid_layer_; + size_t expert_num_; + size_t moe_k_; + std::vector moe_layer_index_; + float layernorm_eps_; + LayerNormType layernorm_type_; + ActivationType activation_type_; // adapter bool has_adapters_; @@ -62,7 +66,13 @@ class ParallelGptContextDecoder: public BaseLayer { std::shared_ptr custom_all_reduce_comm_; int enable_custom_all_reduce_; AttentionType attention_type_; - int int8_mode_ = 0; + + // quantization + int int8_mode_ = 0; + // NOTE (perkzz): dynamic_quant enabled + bool dynamic_quant_ = true; + float* attention_query_dynamic_scale_ = nullptr; + float* ffn_intermediate_dynamic_scale_ = nullptr; bool is_qk_buf_float_; @@ -78,15 +88,13 @@ class ParallelGptContextDecoder: public BaseLayer { bool isLastLayerParallelId(uint l); int getFirstLayerParallelId(); - T* decoder_normed_input_ = nullptr; - T* self_attn_output_ = nullptr; - T* normed_self_attn_output_ = nullptr; - T* decoder_layer_output_ = nullptr; - int32_t* self_attn_output_int32_ = nullptr; - int32_t* decoder_layer_output_int32_ = nullptr; - size_t* token_num_ = nullptr; - int* padding_offset_ = nullptr; - int* cu_seqlens_ = nullptr; + T* decoder_normed_input_ = nullptr; + T* self_attn_output_ = nullptr; + T* normed_self_attn_output_ = nullptr; + T* decoder_layer_output_ = nullptr; + size_t* h_pinned_token_num_ptr_ = nullptr; + int* padding_offset_ = nullptr; + int* cu_seqlens_ = nullptr; T* compact_decoder_features_ = nullptr; T* compact_attention_mask_ = nullptr; @@ -94,6 +102,12 @@ class ParallelGptContextDecoder: public BaseLayer { T* k_cache_layer_ = nullptr; T* v_cache_layer_ = nullptr; + T* expert_scales_ = nullptr; + int* expanded_source_row_to_expanded_dest_row_ = nullptr; + int* expert_for_source_row_ = nullptr; + T* fc2_result_ = nullptr; + T* adapter_fc2_result_ = nullptr; + protected: public: ParallelGptContextDecoder(size_t max_batch_size, @@ -102,6 +116,9 @@ class ParallelGptContextDecoder: public BaseLayer { size_t size_per_head, size_t inter_size, size_t num_layer, + size_t expert_num, + size_t moe_k, + std::vector moe_layer_index, float layernorm_eps, gptVariantParams gpt_variant_params, NcclParam tensor_para, diff --git a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoder.cc b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoder.cc index 233ba2452..173c87b46 100644 --- a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoder.cc +++ b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoder.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2022, SK Telecom Authored by A. Dialog * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -16,6 +16,7 @@ */ #include "src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoder.h" +#include "src/fastertransformer/utils/nvtx_utils.h" namespace fastertransformer { @@ -44,7 +45,7 @@ void ParallelGptDecoder::initialize() 1, head_num_, size_per_head_, - 0, // expert_num + expert_num_, // expert_num max_inter_size, tensor_para_, stream_, @@ -63,7 +64,7 @@ void ParallelGptDecoder::initialize() 1, head_num_, size_per_head_, - 0, // expert_num + expert_num_, // expert_num max_inter_size, tensor_para_, stream_, @@ -85,6 +86,9 @@ ParallelGptDecoder::ParallelGptDecoder(size_t ma size_t size_per_head, size_t inter_size, size_t num_layer, + size_t expert_num, + size_t moe_k, + std::vector moe_layer_index, float layernorm_eps, gptVariantParams gpt_variant_params, NcclParam tensor_para, @@ -103,6 +107,9 @@ ParallelGptDecoder::ParallelGptDecoder(size_t ma size_per_head_(size_per_head), inter_size_(inter_size), num_layer_(num_layer), + expert_num_(expert_num), + moe_k_(moe_k), + moe_layer_index_(moe_layer_index), layernorm_eps_(layernorm_eps), layernorm_type_(gpt_variant_params.layernorm_type), activation_type_(gpt_variant_params.activation_type), @@ -131,6 +138,9 @@ ParallelGptDecoder::ParallelGptDecoder(ParallelGptDecoder const& decoder): size_per_head_(decoder.size_per_head_), inter_size_(decoder.inter_size_), num_layer_(decoder.num_layer_), + expert_num_(decoder.expert_num_), + moe_k_(decoder.moe_k_), + moe_layer_index_(decoder.moe_layer_index_), layernorm_eps_(decoder.layernorm_eps_), layernorm_type_(decoder.layernorm_type_), activation_type_(decoder.activation_type_), @@ -158,12 +168,6 @@ void ParallelGptDecoder::allocateBuffer(size_t batch_size) FT_LOG_DEBUG(__PRETTY_FUNCTION__); decoder_layer_output_ = reinterpret_cast( allocator_->reMalloc(decoder_layer_output_, sizeof(T) * batch_size * hidden_units_, false)); - if (int8_mode_ == 2) { - decoder_layer_output_int32_ = reinterpret_cast( - allocator_->reMalloc(decoder_layer_output_int32_, sizeof(int32_t) * batch_size * hidden_units_, false)); - self_attn_output_int32_ = reinterpret_cast( - allocator_->reMalloc(self_attn_output_int32_, sizeof(int32_t) * batch_size * hidden_units_, false)); - } decoder_normed_input_ = reinterpret_cast( allocator_->reMalloc(decoder_normed_input_, sizeof(T) * batch_size * hidden_units_, false)); self_attn_output_ = @@ -174,7 +178,20 @@ void ParallelGptDecoder::allocateBuffer(size_t batch_size) after_adapter_attn_output_ = has_adapters_ ? reinterpret_cast(allocator_->reMalloc( after_adapter_attn_output_, sizeof(T) * batch_size * hidden_units_, false)) : self_attn_output_; - is_allocate_buffer_ = true; + // for moe + expert_scales_ = reinterpret_cast( + allocator_->reMalloc(expert_scales_, sizeof(T) * pad_to_multiple_of_16(moe_k_ * batch_size), false)); + expanded_source_row_to_expanded_dest_row_ = reinterpret_cast(allocator_->reMalloc( + expanded_source_row_to_expanded_dest_row_, sizeof(int) * pad_to_multiple_of_16(moe_k_ * batch_size), false)); + expert_for_source_row_ = reinterpret_cast( + allocator_->reMalloc(expert_for_source_row_, sizeof(int) * pad_to_multiple_of_16(moe_k_ * batch_size), false)); + fc2_result_ = reinterpret_cast(allocator_->reMalloc( + fc2_result_, sizeof(T) * pad_to_multiple_of_16(moe_k_ * batch_size * hidden_units_), false)); + adapter_fc2_result_ = + has_adapters_ ? reinterpret_cast(allocator_->reMalloc( + adapter_fc2_result_, sizeof(T) * pad_to_multiple_of_16(moe_k_ * batch_size * hidden_units_), false)) : + nullptr; + is_allocate_buffer_ = true; } template @@ -188,12 +205,14 @@ void ParallelGptDecoder::freeBuffer() allocator_->free((void**)(&normed_self_attn_output_)); if (has_adapters_) { allocator_->free((void**)(&after_adapter_attn_output_)); - } - if (int8_mode_ == 2) { - allocator_->free((void**)(&self_attn_output_int32_)); - allocator_->free((void**)(&decoder_layer_output_int32_)); + allocator_->free((void**)(&adapter_fc2_result_)); } is_allocate_buffer_ = false; + + allocator_->free((void**)(&expert_scales_)); + allocator_->free((void**)(&expanded_source_row_to_expanded_dest_row_)); + allocator_->free((void**)(&expert_for_source_row_)); + allocator_->free((void**)(&fc2_result_)); } } @@ -292,9 +311,11 @@ void ParallelGptDecoder::forward(std::unordered_map* self_v_cache_size.insert(self_v_cache_size.begin(), local_batch_size); const auto activation_in_type = int8_mode_ == 2 ? TYPE_INT8 : data_type; - const auto activation_out_type = int8_mode_ == 2 ? TYPE_INT32 : data_type; + const auto activation_out_type = data_type; for (uint l = 0; l < num_layer_; l++) { + PUSH_RANGE(fmtstr("layer_%d", l)); + bool use_moe = std::find(moe_layer_index_.begin(), moe_layer_index_.end(), l) != moe_layer_index_.end(); if (isValidLayerParallelId(l) == false) { continue; } @@ -304,16 +325,21 @@ void ParallelGptDecoder::forward(std::unordered_map* if (isFirstLayerParallelId(l) == true && pipeline_para_.rank_ != 0 && pipeline_para_.world_size_ > 1) { size_t data_size = local_batch_size * hidden_units_ / tensor_para_.world_size_; + PUSH_RANGE("input communication"); ftNcclRecv(decoder_input + data_size * tensor_para_.rank_, data_size, pipeline_para_.rank_ - 1, pipeline_para_, stream_); if (tensor_para_.world_size_ > 1) { + PUSH_RANGE("all gather"); ftNcclAllGather(decoder_input, decoder_input, data_size, tensor_para_.rank_, tensor_para_, stream_); + POP_RANGE; } + POP_RANGE; } + PUSH_RANGE("pre-mha layernorm"); ParallelGptDecoderLayerWeight* layer_weight = gpt_decoder_layer_weight->at(l); if (layernorm_type_ == LayerNormType::pre_layernorm) { @@ -324,11 +350,12 @@ void ParallelGptDecoder::forward(std::unordered_map* layernorm_eps_, local_batch_size, hidden_units_, - layer_weight->self_attention_weights.query_weight.scale, + const_cast(layer_weight->self_attention_weights.query_weight.scale), int8_mode_, stream_); } sync_check_cuda_error(); + POP_RANGE; TensorMap self_attention_input_tensors{ {"input_query", @@ -359,10 +386,9 @@ void ParallelGptDecoder::forward(std::unordered_map* } cache_offset += ite_cache_offset; - T* attention_out = (int8_mode_ == 2) ? reinterpret_cast(self_attn_output_int32_) : self_attn_output_; TensorMap self_attention_output_tensors{ {"hidden_features", - Tensor(MEMORY_GPU, activation_out_type, {local_batch_size, hidden_units_}, attention_out)}, + Tensor(MEMORY_GPU, activation_out_type, {local_batch_size, hidden_units_}, self_attn_output_)}, {"key_cache", Tensor(MEMORY_GPU, data_type, self_k_cache_size, k_cache.getPtrWithOffset(cache_offset))}, {"value_cache", Tensor(MEMORY_GPU, data_type, self_v_cache_size, v_cache.getPtrWithOffset(cache_offset))}}; @@ -371,6 +397,7 @@ void ParallelGptDecoder::forward(std::unordered_map* &self_attention_output_tensors, &self_attention_input_tensors, &layer_weight->self_attention_weights); // the adapter after attention + PUSH_RANGE("post mha layernorm"); if (has_adapters_) { invokeGenericActivation( self_attn_output_, @@ -403,7 +430,7 @@ void ParallelGptDecoder::forward(std::unordered_map* // has_adapters_ ? after_adapter_attn_outpu_ : self_attn_output_, has_adapters_ ? after_adapter_attn_output_ : self_attn_output_, normed_self_attn_output_, - has_adapters_ ? after_adapter_attn_output_ : attention_out, + has_adapters_ ? after_adapter_attn_output_ : self_attn_output_, decoder_input, has_adapters_ ? self_attn_output_ : nullptr, layer_weight->self_attn_layernorm_weights.gamma, @@ -413,9 +440,10 @@ void ParallelGptDecoder::forward(std::unordered_map* layernorm_eps_, local_batch_size, hidden_units_, - layer_weight->self_attention_weights.attention_output_weight.scale_inter, - layer_weight->self_attention_weights.attention_output_weight.scale_out, - layer_weight->ffn_weights.intermediate_weight.scale, + nullptr, + nullptr, + const_cast(layer_weight->ffn_weights.intermediate_weight.scale), + (float*)nullptr, int8_mode_, stream_); } @@ -435,17 +463,9 @@ void ParallelGptDecoder::forward(std::unordered_map* } sync_check_cuda_error(); + POP_RANGE; - T* ffn_output_ptr; - if (int8_mode_ == 2) { - ffn_output_ptr = reinterpret_cast(decoder_layer_output_int32_); - } - else if (has_adapters_) { - ffn_output_ptr = self_attn_output_; - } - else { - ffn_output_ptr = decoder_output; - } + T* ffn_output_ptr = has_adapters_ ? self_attn_output_ : decoder_output; TensorMap ffn_input_tensors( {{"ffn_input", @@ -454,65 +474,158 @@ void ParallelGptDecoder::forward(std::unordered_map* {local_batch_size, hidden_units_}, layernorm_type_ == LayerNormType::pre_layernorm ? normed_self_attn_output_ : after_adapter_attn_output_}}}); - TensorMap ffn_output_tensors( - {{"ffn_output", - Tensor{MEMORY_GPU, activation_out_type, {local_batch_size, hidden_units_}, ffn_output_ptr}}}); + TensorMap ffn_output_tensors; + if (!use_moe) { + ffn_output_tensors.insert( + "ffn_output", + Tensor{MEMORY_GPU, activation_out_type, {local_batch_size, hidden_units_}, ffn_output_ptr}); + } + else { + ffn_input_tensors.insert("moe_k", Tensor{MEMORY_CPU, TYPE_UINT64, {1}, &moe_k_}); + + ffn_output_tensors.insert("ffn_output", + Tensor{MEMORY_GPU, + activation_out_type, + {moe_k_ * local_batch_size, hidden_units_}, + has_adapters_ ? adapter_fc2_result_ : fc2_result_}); + ffn_output_tensors.insert( + "expert_scales", Tensor{MEMORY_GPU, activation_out_type, {local_batch_size, moe_k_}, expert_scales_}); + ffn_output_tensors.insert( + "expanded_source_row_to_expanded_dest_row", + Tensor{MEMORY_GPU, TYPE_INT32, {local_batch_size, moe_k_}, expanded_source_row_to_expanded_dest_row_}); + ffn_output_tensors.insert( + "expert_for_source_row", + Tensor{MEMORY_GPU, TYPE_INT32, {local_batch_size, moe_k_}, expert_for_source_row_}); + } ffn_layer_->resetInterSize(inter_size_ / tensor_para_.world_size_); ffn_layer_->forward(&ffn_output_tensors, &ffn_input_tensors, &layer_weight->ffn_weights); // the adapter after ffn + PUSH_RANGE("post ffn"); if (has_adapters_) { - invokeGenericActivation(ffn_output_ptr, - layer_weight->ffn_weights.output_weight.bias, - nullptr, - nullptr, - nullptr, - nullptr, - local_batch_size, - hidden_units_, - 0, - nullptr, - nullptr, - stream_); - - TensorMap ffn_input_tensors( - {{"ffn_input", Tensor{MEMORY_GPU, data_type, {local_batch_size, hidden_units_}, ffn_output_ptr}}}); - TensorMap ffn_output_tensors( - {{"ffn_output", Tensor{MEMORY_GPU, data_type, {local_batch_size, hidden_units_}, decoder_output}}}); + TensorMap ffn_input_tensors; + TensorMap ffn_output_tensors; + if (!use_moe) { + invokeGenericActivation(ffn_output_ptr, + layer_weight->ffn_weights.output_weight.bias, + nullptr, + nullptr, + nullptr, + nullptr, + local_batch_size, + hidden_units_, + 0, + nullptr, + nullptr, + stream_); + + ffn_input_tensors.insert( + "ffn_input", Tensor{MEMORY_GPU, data_type, {local_batch_size, hidden_units_}, ffn_output_ptr}); + ffn_output_tensors.insert( + "ffn_output", Tensor{MEMORY_GPU, data_type, {local_batch_size, hidden_units_}, decoder_output}); + } + else { + invokeGenericActivation(adapter_fc2_result_, + layer_weight->ffn_weights.output_weight.bias, + nullptr, + nullptr, + nullptr, + nullptr, + moe_k_ * local_batch_size, + hidden_units_, + 0, + nullptr, + nullptr, + stream_); + + ffn_input_tensors.insert( + "ffn_input", + Tensor{MEMORY_GPU, data_type, {moe_k_ * local_batch_size, hidden_units_}, adapter_fc2_result_}); + ffn_output_tensors.insert( + "ffn_output", + Tensor{MEMORY_GPU, data_type, {moe_k_ * local_batch_size, hidden_units_}, fc2_result_}); + } ffn_layer_->resetInterSize(adapter_inter_size_ / tensor_para_.world_size_); ffn_layer_->forward(&ffn_output_tensors, &ffn_input_tensors, &layer_weight->after_ffn_adapter_weights); } - if (layernorm_type_ == LayerNormType::pre_layernorm) { - invokeAddBiasResidual(decoder_output, - int8_mode_ == 2 ? reinterpret_cast(decoder_layer_output_int32_) : decoder_output, - after_adapter_attn_output_, - has_adapters_ ? ffn_output_ptr : nullptr, - has_adapters_ ? layer_weight->after_ffn_adapter_weights.output_weight.bias : - layer_weight->ffn_weights.output_weight.bias, - int8_mode_ == 2 ? layer_weight->ffn_weights.output_weight.scale_inter : nullptr, - int8_mode_ == 2 ? layer_weight->ffn_weights.output_weight.scale_out : nullptr, - local_batch_size, - hidden_units_, - int8_mode_, - stream_); + if (!use_moe) { + if (layernorm_type_ == LayerNormType::pre_layernorm) { + invokeAddBiasResidual(decoder_output, + decoder_output, + after_adapter_attn_output_, + has_adapters_ ? ffn_output_ptr : nullptr, + has_adapters_ ? layer_weight->after_ffn_adapter_weights.output_weight.bias : + layer_weight->ffn_weights.output_weight.bias, + nullptr, + nullptr, + local_batch_size, + hidden_units_, + stream_); + } + else if (layernorm_type_ == LayerNormType::post_layernorm) { + invokeAddBiasResidualLayerNorm(decoder_output, + after_adapter_attn_output_, + has_adapters_ ? + layer_weight->after_ffn_adapter_weights.output_weight.bias : + layer_weight->ffn_weights.output_weight.bias, + layer_weight->self_attn_layernorm_weights.gamma, + layer_weight->self_attn_layernorm_weights.beta, + layernorm_eps_, + local_batch_size, + hidden_units_, + stream_); + } } - else if (layernorm_type_ == LayerNormType::post_layernorm) { - invokeAddBiasResidualLayerNorm(decoder_output, - after_adapter_attn_output_, - has_adapters_ ? layer_weight->after_ffn_adapter_weights.output_weight.bias : - layer_weight->ffn_weights.output_weight.bias, - layer_weight->self_attn_layernorm_weights.gamma, - layer_weight->self_attn_layernorm_weights.beta, - layernorm_eps_, - local_batch_size, - hidden_units_, - stream_); + else { + if (layernorm_type_ == LayerNormType::pre_layernorm) { + finalize_moe_routing_kernelLauncher(fc2_result_, + decoder_output, + after_adapter_attn_output_, + has_adapters_ ? ffn_output_ptr : nullptr, + has_adapters_ ? + layer_weight->after_ffn_adapter_weights.output_weight.bias : + layer_weight->ffn_weights.output_weight.bias, + expert_scales_, + expanded_source_row_to_expanded_dest_row_, + expert_for_source_row_, + local_batch_size, + hidden_units_, + moe_k_, + stream_); + } + else if (layernorm_type_ == LayerNormType::post_layernorm) { + finalize_moe_routing_kernelLauncher(fc2_result_, + decoder_output, + after_adapter_attn_output_, + has_adapters_ ? + layer_weight->after_ffn_adapter_weights.output_weight.bias : + layer_weight->ffn_weights.output_weight.bias, + expert_scales_, + expanded_source_row_to_expanded_dest_row_, + expert_for_source_row_, + local_batch_size, + hidden_units_, + moe_k_, + stream_); + invokeGeneralLayerNorm(decoder_output, + decoder_output, + layer_weight->self_attn_layernorm_weights.gamma, + layer_weight->self_attn_layernorm_weights.beta, + layernorm_eps_, + local_batch_size, + hidden_units_, + (float*)nullptr, + 0, + stream_); + } } sync_check_cuda_error(); + POP_RANGE; + PUSH_RANGE("Nccl send"); if (isLastLayerParallelId(l) == true && pipeline_para_.rank_ != pipeline_para_.world_size_ - 1 && pipeline_para_.world_size_ > 1) { @@ -523,6 +636,8 @@ void ParallelGptDecoder::forward(std::unordered_map* pipeline_para_, stream_); } + POP_RANGE; + POP_RANGE; } if (is_free_buffer_after_forward_ == true) { diff --git a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoder.h b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoder.h index f72da3e14..430ae6c56 100644 --- a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoder.h +++ b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoder.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -36,13 +36,16 @@ class ParallelGptDecoder: public BaseLayer { // buffer handling size_t max_batch_size_ = 0; // meta data - size_t head_num_; - size_t size_per_head_; - size_t inter_size_; - size_t num_layer_; - float layernorm_eps_; - LayerNormType layernorm_type_; - ActivationType activation_type_; + size_t head_num_; + size_t size_per_head_; + size_t inter_size_; + size_t num_layer_; + size_t expert_num_; + size_t moe_k_; + std::vector moe_layer_index_; + float layernorm_eps_; + LayerNormType layernorm_type_; + ActivationType activation_type_; // adapter bool has_adapters_; @@ -59,12 +62,16 @@ class ParallelGptDecoder: public BaseLayer { int enable_custom_all_reduce_; // buffers - T* decoder_normed_input_ = nullptr; - T* self_attn_output_ = nullptr; - T* normed_self_attn_output_ = nullptr; - T* decoder_layer_output_ = nullptr; - int32_t* self_attn_output_int32_ = nullptr; - int32_t* decoder_layer_output_int32_ = nullptr; + T* decoder_normed_input_ = nullptr; + T* self_attn_output_ = nullptr; + T* normed_self_attn_output_ = nullptr; + T* decoder_layer_output_ = nullptr; + + T* expert_scales_ = nullptr; + int* expanded_source_row_to_expanded_dest_row_ = nullptr; + int* expert_for_source_row_ = nullptr; + T* fc2_result_ = nullptr; + T* adapter_fc2_result_ = nullptr; BaseAttentionLayer* self_attention_layer_; FfnLayer* ffn_layer_; @@ -87,6 +94,9 @@ class ParallelGptDecoder: public BaseLayer { size_t size_per_head, size_t inter_size, size_t num_layer, + size_t expert_num, + size_t moe_k, + std::vector moe_layer_index, float layernorm_eps, gptVariantParams gpt_variant_params, NcclParam tensor_para, diff --git a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoderLayerWeight.cc b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoderLayerWeight.cc index 7c905a303..e650d0ef8 100644 --- a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoderLayerWeight.cc +++ b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoderLayerWeight.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoderLayerWeight.h b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoderLayerWeight.h index f04bfe60a..d63ac07ac 100644 --- a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoderLayerWeight.h +++ b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoderLayerWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptWeight.cc b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptWeight.cc index 341cab850..3f0ca04a3 100644 --- a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptWeight.cc +++ b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptWeight.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -81,6 +81,9 @@ ParallelGptWeight::~ParallelGptWeight() { if (is_maintain_buffer == true) { for (int i = 0; i < weights_ptr.size(); i++) { + if (i == 6 && shared_embed_ && weights_ptr[i] == nullptr) { + continue; + } deviceFree(weights_ptr[i]); } @@ -116,7 +119,8 @@ ParallelGptWeight::ParallelGptWeight(const ParallelGptWeight& other): malloc_load_prompt_weights_(other.malloc_load_prompt_weights_), prompt_learning_type_(other.prompt_learning_type_), prompt_learning_pair_(other.prompt_learning_pair_), - gpt_variant_params_(other.gpt_variant_params_) + gpt_variant_params_(other.gpt_variant_params_), + shared_embed_(other.shared_embed_) { mallocWeights(); if (gpt_variant_params_.has_positional_encoding) { @@ -173,6 +177,7 @@ ParallelGptWeight& ParallelGptWeight::operator=(const ParallelGptWeight& o prompt_learning_type_ = other.prompt_learning_type_; prompt_learning_pair_ = other.prompt_learning_pair_; gpt_variant_params_ = other.gpt_variant_params_; + shared_embed_ = other.shared_embed_; mallocWeights(); if (gpt_variant_params_.has_positional_encoding) { @@ -216,14 +221,21 @@ void ParallelGptWeight::setWeightPtr() { prompt_learning_table.resize(prompt_learning_pair_.size()); - position_encoding_table = gpt_variant_params_.has_positional_encoding ? weights_ptr[0] : nullptr; - pre_decoder_embedding_table = weights_ptr[1]; - pre_decoder_layernorm.gamma = gpt_variant_params_.has_pre_decoder_layernorm ? weights_ptr[2] : nullptr; - pre_decoder_layernorm.beta = gpt_variant_params_.has_pre_decoder_layernorm ? weights_ptr[3] : nullptr; - post_decoder_layernorm.beta = gpt_variant_params_.has_post_decoder_layernorm ? weights_ptr[4] : nullptr; - post_decoder_layernorm.gamma = gpt_variant_params_.has_post_decoder_layernorm ? weights_ptr[5] : nullptr; - post_decoder_embedding.kernel = weights_ptr[6]; - post_decoder_embedding.bias = nullptr; + position_encoding_table = gpt_variant_params_.has_positional_encoding ? weights_ptr[0] : nullptr; + pre_decoder_embedding_table = weights_ptr[1]; + pre_decoder_layernorm.gamma = gpt_variant_params_.has_pre_decoder_layernorm ? weights_ptr[2] : nullptr; + pre_decoder_layernorm.beta = gpt_variant_params_.has_pre_decoder_layernorm ? weights_ptr[3] : nullptr; + post_decoder_layernorm.beta = gpt_variant_params_.has_post_decoder_layernorm ? weights_ptr[4] : nullptr; + post_decoder_layernorm.gamma = gpt_variant_params_.has_post_decoder_layernorm ? weights_ptr[5] : nullptr; + if (shared_embed_ && weights_ptr[6] != weights_ptr[1]) { + deviceFree(weights_ptr[6]); + weights_ptr[6] = nullptr; + post_decoder_embedding.kernel = weights_ptr[1]; + } + else { + post_decoder_embedding.kernel = weights_ptr[6]; + } + post_decoder_embedding.bias = nullptr; // prompt learning tables: set weight ptr if (malloc_load_prompt_weights_) { @@ -300,10 +312,12 @@ void ParallelGptWeight::loadModel(std::string dir_path) weights_ptr[5], {hidden_units_}, dir_path + "/model.final_layernorm.weight.bin", model_file_type); } if (checkIfFileExist(dir_path + "/model.lm_head.weight.bin")) { + shared_embed_ = false; loadWeightFromBin( weights_ptr[6], {vocab_size_ * hidden_units_}, dir_path + "/model.lm_head.weight.bin", model_file_type); } else { + shared_embed_ = true; loadWeightFromBin( weights_ptr[6], {vocab_size_ * hidden_units_}, dir_path + "/model.wte.bin", model_file_type); } @@ -329,6 +343,7 @@ void ParallelGptWeight::loadModel(std::string dir_path) } } } + setWeightPtr(); for (int l = 0; l < num_layer_; l++) { if (isValidLayerParallelId(l)) { diff --git a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptWeight.h b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptWeight.h index 23f3815e2..0287ac7d9 100644 --- a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptWeight.h +++ b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -89,7 +89,8 @@ struct ParallelGptWeight { size_t tensor_para_rank_; size_t layer_para_size_; size_t layer_para_rank_; - size_t int8_mode_ = 0; + size_t int8_mode_ = 0; + bool shared_embed_ = false; // gpt variants: e.g. meta opt gptVariantParams gpt_variant_params_; diff --git a/src/fastertransformer/models/multi_gpu_gpt/gpt_gemm.cc b/src/fastertransformer/models/multi_gpu_gpt/gpt_gemm.cc index 03d69bb02..01abb66ee 100644 --- a/src/fastertransformer/models/multi_gpu_gpt/gpt_gemm.cc +++ b/src/fastertransformer/models/multi_gpu_gpt/gpt_gemm.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -121,9 +121,23 @@ int main(int argc, char* argv[]) gemm_test_buf, is_append); } +#endif +#ifdef ENABLE_FP8 + else if (data_type == ft::FP8_DATATYPE) { + ft::generate_gpt_gemm_config<__nv_fp8_e4m3>(batch_size, + beam_width, + max_input_len, + head_num, + size_per_head, + inter_size, + vocab_size, + tensor_para_size, + gemm_test_buf, + false); + } #endif else { - printf("[ERROR] data type only supports fp32(0), fp16(1), bf16(2). \n"); + printf("[ERROR] data type only supports fp32(0), fp16(1), bf16(2), fp8(4). \n"); return -1; } diff --git a/src/fastertransformer/models/swin/CMakeLists.txt b/src/fastertransformer/models/swin/CMakeLists.txt index 4940adfc1..e89e6ffcb 100644 --- a/src/fastertransformer/models/swin/CMakeLists.txt +++ b/src/fastertransformer/models/swin/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/swin/SwinBlock.cc b/src/fastertransformer/models/swin/SwinBlock.cc index 431ea386e..5e93801db 100644 --- a/src/fastertransformer/models/swin/SwinBlock.cc +++ b/src/fastertransformer/models/swin/SwinBlock.cc @@ -213,6 +213,7 @@ void SwinTransformerBlock::forward(TensorMap* output_tens (float*)nullptr, (float*)nullptr, (float*)nullptr, + (float*)nullptr, 0, stream_); } diff --git a/src/fastertransformer/models/swin/SwinWeight.h b/src/fastertransformer/models/swin/SwinWeight.h index de60aaf5f..cc0f341f6 100644 --- a/src/fastertransformer/models/swin/SwinWeight.h +++ b/src/fastertransformer/models/swin/SwinWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/swin/swin_gemm.cc b/src/fastertransformer/models/swin/swin_gemm.cc index 43423f15c..cd71c751f 100644 --- a/src/fastertransformer/models/swin/swin_gemm.cc +++ b/src/fastertransformer/models/swin/swin_gemm.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/swin_int8/CMakeLists.txt b/src/fastertransformer/models/swin_int8/CMakeLists.txt index 1ff1eedab..45d6e1fee 100644 --- a/src/fastertransformer/models/swin_int8/CMakeLists.txt +++ b/src/fastertransformer/models/swin_int8/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/swin_int8/SwinBlockINT8.h b/src/fastertransformer/models/swin_int8/SwinBlockINT8.h index cdd7a8fa0..c916a6eaa 100644 --- a/src/fastertransformer/models/swin_int8/SwinBlockINT8.h +++ b/src/fastertransformer/models/swin_int8/SwinBlockINT8.h @@ -23,6 +23,7 @@ #include "src/fastertransformer/kernels/layernorm_int8_kernels.h" #include "src/fastertransformer/layers/FfnINT8Weight.h" #include "src/fastertransformer/layers/attention_layers_int8/WindowAttentionINT8.h" +#include "src/fastertransformer/models/swin_int8/SwinINT8Weight.h" namespace fastertransformer { template diff --git a/src/fastertransformer/models/swin_int8/SwinINT8Weight.h b/src/fastertransformer/models/swin_int8/SwinINT8Weight.h index c729499ec..b9057a0c4 100644 --- a/src/fastertransformer/models/swin_int8/SwinINT8Weight.h +++ b/src/fastertransformer/models/swin_int8/SwinINT8Weight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/t5/CMakeLists.txt b/src/fastertransformer/models/t5/CMakeLists.txt index cca61751a..cfc4ef8fe 100644 --- a/src/fastertransformer/models/t5/CMakeLists.txt +++ b/src/fastertransformer/models/t5/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -14,12 +14,17 @@ cmake_minimum_required(VERSION 3.8) +add_library(T5Common STATIC T5AdapterWeight.cc) +set_property(TARGET T5Common PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET T5Common PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(T5Common PUBLIC -lcudart LinearAdapterLayer) + add_library(T5Decoder STATIC T5Decoder.cc T5DecoderLayerWeight.cc) set_property(TARGET T5Decoder PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET T5Decoder PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) -target_link_libraries(T5Decoder PUBLIC -lcudart cublasMMWrapper TensorParallelDecoderSelfAttentionLayer - TensorParallelDecoderCrossAttentionLayer TensorParallelReluFfnLayer TensorParallelSiluFfnLayer - layernorm_kernels add_residual_kernels nccl_utils memory_utils tensor cuda_utils logger) +target_link_libraries(T5Decoder PUBLIC -lcudart cublasMMWrapper T5Common TensorParallelDecoderSelfAttentionLayer + TensorParallelDecoderCrossAttentionLayer TensorParallelReluFfnLayer TensorParallelSiluFfnLayer + layernorm_kernels add_residual_kernels nccl_utils memory_utils tensor cuda_utils logger) add_library(T5Decoding STATIC T5Decoding.cc T5DecodingWeight.cc) set_property(TARGET T5Decoding PROPERTY POSITION_INDEPENDENT_CODE ON) @@ -31,10 +36,10 @@ target_link_libraries(T5Decoding PUBLIC -lcudart cublasMMWrapper T5Decoder bert_ add_library(T5Encoder STATIC T5Encoder.cc T5EncoderWeight.cc T5EncoderLayerWeight.cc) set_property(TARGET T5Encoder PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET T5Encoder PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) -target_link_libraries(T5Encoder PUBLIC -lcudart bert_preprocess_kernels cublasMMWrapper - TensorParallelUnfusedAttentionLayer FusedAttentionLayer TensorParallelReluFfnLayer - TensorParallelGeluFfnLayer TensorParallelSiluFfnLayer layernorm_kernels add_residual_kernels - nccl_utils tensor cuda_utils logger) +target_link_libraries(T5Encoder PUBLIC -lcudart bert_preprocess_kernels cublasMMWrapper T5Common + TensorParallelUnfusedAttentionLayer FusedAttentionLayer TensorParallelReluFfnLayer + TensorParallelGeluFfnLayer TensorParallelSiluFfnLayer layernorm_kernels add_residual_kernels + nccl_utils tensor cuda_utils logger) add_executable(t5_gemm t5_gemm.cc) target_link_libraries(t5_gemm PUBLIC -lcudart t5_gemm_func memory_utils cuda_utils logger) diff --git a/src/fastertransformer/models/t5/T5AdapterWeight.cc b/src/fastertransformer/models/t5/T5AdapterWeight.cc new file mode 100644 index 000000000..f149ede40 --- /dev/null +++ b/src/fastertransformer/models/t5/T5AdapterWeight.cc @@ -0,0 +1,215 @@ + +/* + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/models/t5/T5AdapterWeight.h" +#include "src/fastertransformer/utils/logger.h" +#include "src/fastertransformer/utils/memory_utils.h" + +namespace fastertransformer { + +template +T5AdapterWeight::T5AdapterWeight(const size_t d_model, + const size_t adapter_inter_size, + const size_t tensor_para_size, + const size_t tensor_para_rank): + d_model_{d_model}, + adapter_inter_size_{adapter_inter_size}, + tensor_para_size_{tensor_para_size}, + tensor_para_rank_{tensor_para_rank} +{ + FT_LOG_DEBUG("T5AdapterWeight " + std::string(__func__) + " start"); + initialize(); + mallocWeights(); + setWeightPtr(); + FT_LOG_DEBUG("T5AdapterWeight " + std::string(__func__) + " end"); +} + +template +void T5AdapterWeight::initialize() +{ + FT_LOG_DEBUG("T5AdapterWeight " + std::string(__func__) + " start"); + + if (enabled()) { + auto const adapter_weights_in = d_model_ * (adapter_inter_size_ / tensor_para_size_); + auto const adapter_weights_out = (adapter_inter_size_ / tensor_para_size_) * d_model_; + adapter_weights_size_[AdapterWeights::kAttentionInput] = adapter_weights_in; + adapter_weights_size_[AdapterWeights::kAttentionOutput] = adapter_weights_out; + adapter_weights_size_[AdapterWeights::kAttentionNormGamma] = d_model_; + adapter_weights_size_[AdapterWeights::kAttentionNormBeta] = d_model_; + adapter_weights_size_[AdapterWeights::kFfnInput] = adapter_weights_in; + adapter_weights_size_[AdapterWeights::kFfnOutput] = adapter_weights_out; + adapter_weights_size_[AdapterWeights::kFfnNormGamma] = d_model_; + adapter_weights_size_[AdapterWeights::kFfnNormBeta] = d_model_; + } + + FT_LOG_DEBUG("T5AdapterWeight " + std::string(__func__) + " end"); +} + +template +T5AdapterWeight::~T5AdapterWeight() +{ + FT_LOG_DEBUG("T5AdapterWeight " + std::string(__func__) + " start"); + if (maintain_adapter_buffer_) { + for (auto w : adapter_weights_ptr_) { + deviceFree(w); + } + after_attention_adapter_weights_.input_weight().kernel = nullptr; + after_attention_adapter_weights_.output_weight().kernel = nullptr; + after_attention_adapter_weights_.layer_norm_weight.gamma = nullptr; + after_attention_adapter_weights_.layer_norm_weight.beta = nullptr; + after_ffn_adapter_weights_.input_weight().kernel = nullptr; + after_ffn_adapter_weights_.output_weight().kernel = nullptr; + after_ffn_adapter_weights_.layer_norm_weight.gamma = nullptr; + after_ffn_adapter_weights_.layer_norm_weight.beta = nullptr; + maintain_adapter_buffer_ = false; + } + FT_LOG_DEBUG("T5AdapterWeight " + std::string(__func__) + " end"); +} + +template +T5AdapterWeight::T5AdapterWeight(const T5AdapterWeight& other): + d_model_{other.d_model_}, + adapter_inter_size_{other.adapter_inter_size_}, + tensor_para_size_{other.tensor_para_size_}, + tensor_para_rank_{other.tensor_para_rank_} +{ + FT_LOG_DEBUG("T5AdapterWeight " + std::string(__func__) + " start"); + initialize(); + mallocWeights(); + if (enabled()) { + for (int i = 0; i < AdapterWeights::kNum; i++) { + cudaD2Dcpy(adapter_weights_ptr_[i], other.adapter_weights_ptr_[i], adapter_weights_size_[i]); + } + } + setWeightPtr(); + FT_LOG_DEBUG("T5AdapterWeight " + std::string(__func__) + " end"); +} + +template +T5AdapterWeight& T5AdapterWeight::operator=(const T5AdapterWeight& other) +{ + if (this == &other) { + return *this; + } + + FT_LOG_DEBUG("T5AdapterWeight " + std::string(__func__) + " start"); + + d_model_ = other.d_model_; + adapter_inter_size_ = other.adapter_inter_size_; + tensor_para_size_ = other.tensor_para_size_; + tensor_para_rank_ = other.tensor_para_rank_; + initialize(); + mallocWeights(); + if (enabled()) { + for (int i = 0; i < AdapterWeights::kNum; i++) { + cudaD2Dcpy(adapter_weights_ptr_[i], other.adapter_weights_ptr_[i], adapter_weights_size_[i]); + } + } + setWeightPtr(); + FT_LOG_DEBUG("T5AdapterWeight " + std::string(__func__) + " end"); + + return *this; +} + +template +void T5AdapterWeight::setWeightPtr() +{ + FT_LOG_DEBUG("T5AdapterWeight " + std::string(__func__) + " start"); + if (enabled()) { + after_attention_adapter_weights_.input_weight().kernel = adapter_weights_ptr_[AdapterWeights::kAttentionInput]; + after_attention_adapter_weights_.output_weight().kernel = + adapter_weights_ptr_[AdapterWeights::kAttentionOutput]; + after_attention_adapter_weights_.layer_norm_weight.gamma = + adapter_weights_ptr_[AdapterWeights::kAttentionNormGamma]; + after_attention_adapter_weights_.layer_norm_weight.beta = + adapter_weights_ptr_[AdapterWeights::kAttentionNormBeta]; + after_ffn_adapter_weights_.input_weight().kernel = adapter_weights_ptr_[AdapterWeights::kFfnInput]; + after_ffn_adapter_weights_.output_weight().kernel = adapter_weights_ptr_[AdapterWeights::kFfnOutput]; + after_ffn_adapter_weights_.layer_norm_weight.gamma = adapter_weights_ptr_[AdapterWeights::kFfnNormGamma]; + after_ffn_adapter_weights_.layer_norm_weight.beta = adapter_weights_ptr_[AdapterWeights::kFfnNormBeta]; + } + + FT_LOG_DEBUG("T5AdapterWeight " + std::string(__func__) + " end"); +} + +template +void T5AdapterWeight::mallocWeights() +{ + FT_LOG_DEBUG("T5AdapterWeight " + std::string(__func__) + " start"); + if (enabled()) { + for (int i = 0; i < AdapterWeights::kNum; i++) { + deviceMalloc(&adapter_weights_ptr_[i], adapter_weights_size_[i]); + } + maintain_adapter_buffer_ = true; + } + FT_LOG_DEBUG("T5AdapterWeight " + std::string(__func__) + " end"); +} + +template +void T5AdapterWeight::loadModel(std::string const& dir_path, FtCudaDataType model_file_type) +{ + FT_LOG_DEBUG("T5AdapterWeight " + std::string(__func__) + " start"); + + if (enabled()) { + FT_CHECK(maintain_adapter_buffer_); + + const auto tp_rank = std::to_string(tensor_para_rank_); + + loadWeightFromBin(adapter_weights_ptr_[AdapterWeights::kAttentionInput], + {adapter_weights_size_[AdapterWeights::kAttentionInput]}, + dir_path + "after_attention_adapter.DenseSiluDense.wi.weight." + tp_rank + ".bin", + model_file_type); + loadWeightFromBin(adapter_weights_ptr_[AdapterWeights::kAttentionOutput], + {adapter_weights_size_[AdapterWeights::kAttentionOutput]}, + dir_path + "after_attention_adapter.DenseSiluDense.wo.weight." + tp_rank + ".bin", + model_file_type); + loadWeightFromBin(adapter_weights_ptr_[AdapterWeights::kAttentionNormGamma], + {adapter_weights_size_[AdapterWeights::kAttentionNormGamma]}, + dir_path + "after_attention_adapter.layer_norm.weight.bin", + model_file_type); + loadWeightFromBin(adapter_weights_ptr_[AdapterWeights::kAttentionNormBeta], + {adapter_weights_size_[AdapterWeights::kAttentionNormBeta]}, + dir_path + "after_attention_adapter.layer_norm.bias.bin", + model_file_type); + loadWeightFromBin(adapter_weights_ptr_[AdapterWeights::kFfnInput], + {adapter_weights_size_[AdapterWeights::kFfnInput]}, + dir_path + "after_ffn_adapter.DenseSiluDense.wi.weight." + tp_rank + ".bin", + model_file_type); + loadWeightFromBin(adapter_weights_ptr_[AdapterWeights::kFfnOutput], + {adapter_weights_size_[AdapterWeights::kFfnOutput]}, + dir_path + "after_ffn_adapter.DenseSiluDense.wo.weight." + tp_rank + ".bin", + model_file_type); + loadWeightFromBin(adapter_weights_ptr_[AdapterWeights::kFfnNormGamma], + {adapter_weights_size_[AdapterWeights::kFfnNormGamma]}, + dir_path + "after_ffn_adapter.layer_norm.weight.bin", + model_file_type); + loadWeightFromBin(adapter_weights_ptr_[AdapterWeights::kFfnNormBeta], + {adapter_weights_size_[AdapterWeights::kFfnNormBeta]}, + dir_path + "after_ffn_adapter.layer_norm.bias.bin", + model_file_type); + } + + FT_LOG_DEBUG("T5AdapterWeight " + std::string(__func__) + " end"); +} + +template struct T5AdapterWeight; +template struct T5AdapterWeight; +#ifdef ENABLE_BF16 +template struct T5AdapterWeight<__nv_bfloat16>; +#endif + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/t5/T5AdapterWeight.h b/src/fastertransformer/models/t5/T5AdapterWeight.h new file mode 100644 index 000000000..bc9c683c4 --- /dev/null +++ b/src/fastertransformer/models/t5/T5AdapterWeight.h @@ -0,0 +1,76 @@ +/* + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/layers/adapter_layers/LinearAdapterWeight.h" +#include "src/fastertransformer/utils/cuda_utils.h" +#include + +namespace fastertransformer { + +template +struct T5AdapterWeight { + + T5AdapterWeight() = default; + T5AdapterWeight(size_t d_model, size_t tensor_para_size, size_t tensor_para_rank, size_t adapter_inter_size); + ~T5AdapterWeight(); + T5AdapterWeight(const T5AdapterWeight& other); + T5AdapterWeight& operator=(const T5AdapterWeight& other); + + LinearAdapterWeight after_attention_adapter_weights_; + LinearAdapterWeight after_ffn_adapter_weights_; + + void loadModel(std::string const& dir_path, FtCudaDataType model_file_type); + + bool enabled() const + { + return adapter_inter_size_ > 0; + } + + void setAdapterInterSize(size_t adapter_inter_size) + { + adapter_inter_size_ = adapter_inter_size; + } + +private: + void setWeightPtr(); + void mallocWeights(); + void initialize(); + + size_t d_model_{}; + size_t adapter_inter_size_{}; + size_t tensor_para_size_{}; + size_t tensor_para_rank_{}; + + enum AdapterWeights : int { + kAttentionInput, + kAttentionOutput, + kAttentionNormGamma, + kAttentionNormBeta, + kFfnInput, + kFfnOutput, + kFfnNormGamma, + kFfnNormBeta, + kNum // Must be the last one + }; + + T* adapter_weights_ptr_[AdapterWeights::kNum]; + size_t adapter_weights_size_[AdapterWeights::kNum]; + bool maintain_adapter_buffer_ = false; +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/t5/T5Decoder.cc b/src/fastertransformer/models/t5/T5Decoder.cc index 887add3e2..b935852bc 100644 --- a/src/fastertransformer/models/t5/T5Decoder.cc +++ b/src/fastertransformer/models/t5/T5Decoder.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -110,6 +110,22 @@ void T5Decoder::initialize() custom_all_reduce_comm_, enable_custom_all_reduce_); } + + if (has_adapters()) { + adapter_layer_ = new LinearAdapterLayer(adapter_config_, + max_batch_size_, + 1, + d_model_, + tensor_para_, + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + sparse_, + custom_all_reduce_comm_, + enable_custom_all_reduce_, + layernorm_eps_); + } } template @@ -223,7 +239,8 @@ T5Decoder::T5Decoder(size_t max_batch_size, ActivationType activation_type, float q_scaling, std::shared_ptr custom_all_reduce_comm, - int enable_custom_all_reduce): + int enable_custom_all_reduce, + LinearAdapterConfig const& adapter_config): BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward), max_batch_size_(max_batch_size), head_num_(head_num), @@ -241,7 +258,8 @@ T5Decoder::T5Decoder(size_t max_batch_size, activation_type_(activation_type), q_scaling_(q_scaling), custom_all_reduce_comm_(custom_all_reduce_comm), - enable_custom_all_reduce_(enable_custom_all_reduce) + enable_custom_all_reduce_(enable_custom_all_reduce), + adapter_config_{adapter_config} { initialize(); } @@ -265,7 +283,8 @@ T5Decoder::T5Decoder(T5Decoder const& decoder): activation_type_(decoder.activation_type_), q_scaling_(decoder.q_scaling_), custom_all_reduce_comm_(decoder.custom_all_reduce_comm_), - enable_custom_all_reduce_(decoder.enable_custom_all_reduce_) + enable_custom_all_reduce_(decoder.enable_custom_all_reduce_), + adapter_config_(decoder.adapter_config_) { initialize(); } @@ -276,6 +295,10 @@ T5Decoder::~T5Decoder() delete self_attention_layer_; delete cross_attention_layer_; delete ffn_layer_; + if (adapter_layer_ != nullptr) { + delete adapter_layer_; + adapter_layer_ = nullptr; + } freeBuffer(); } @@ -285,6 +308,9 @@ void T5Decoder::setStream(cudaStream_t stream) self_attention_layer_->setStream(stream); cross_attention_layer_->setStream(stream); ffn_layer_->setStream(stream); + if (adapter_layer_ != nullptr) { + adapter_layer_->setStream(stream); + } BaseLayer::setStream(stream); } @@ -421,10 +447,11 @@ void T5Decoder::forward(std::vector* output_t } mem_cache_offset += ite_cache_offset; + auto const& layer_weight = decoder_layer_weight->at(l); invokeGeneralT5LayerNorm(decoder_normed_input_, decoder_input, - decoder_layer_weight->at(l)->pre_layernorm_weights.gamma, - decoder_layer_weight->at(l)->pre_layernorm_weights.beta, + layer_weight->pre_layernorm_weights.gamma, + layer_weight->pre_layernorm_weights.beta, layernorm_eps_, local_batch_size, d_model_, @@ -449,21 +476,33 @@ void T5Decoder::forward(std::vector* output_t Tensor{MEMORY_GPU, data_type, self_k_cache_shape, output_tensors->at(1).getPtrWithOffset(cache_offset)}}, {"value_cache", Tensor{MEMORY_GPU, data_type, self_v_cache_shape, output_tensors->at(2).getPtrWithOffset(cache_offset)}}}; - self_attention_layer_->forward(&self_attention_output_tensors, - &self_attention_input_tensors, - &decoder_layer_weight->at(l)->self_attention_weights); - - invokeGeneralAddBiasResidualT5PreLayerNorm( - self_attn_output_, - normed_self_attn_output_, - decoder_input, - decoder_layer_weight->at(l)->self_attn_layernorm_weights.gamma, - decoder_layer_weight->at(l)->self_attn_layernorm_weights.beta, - decoder_layer_weight->at(l)->self_attention_weights.attention_output_weight.bias, - layernorm_eps_, - local_batch_size, - d_model_, - stream_); + self_attention_layer_->forward( + &self_attention_output_tensors, &self_attention_input_tensors, &layer_weight->self_attention_weights); + + const T* attention_bias = layer_weight->self_attention_weights.attention_output_weight.bias; + if (has_adapters() && layer_weight->has_adapters()) { + if (attention_bias != nullptr) { + invokeAddBias(self_attn_output_, attention_bias, local_batch_size, d_model_, stream_); + attention_bias = nullptr; + } + Tensor input_tensor{ + MEMORY_GPU, data_type, std::vector{local_batch_size, d_model_}, self_attn_output_}; + Tensor output_tensor{ + MEMORY_GPU, data_type, std::vector{local_batch_size, d_model_}, self_attn_output_}; + adapter_layer_->forward( + &input_tensor, &output_tensor, &layer_weight->adapter_weights_.after_attention_adapter_weights_); + } + + invokeGeneralAddBiasResidualT5PreLayerNorm(self_attn_output_, + normed_self_attn_output_, + decoder_input, + layer_weight->self_attn_layernorm_weights.gamma, + layer_weight->self_attn_layernorm_weights.beta, + attention_bias, + layernorm_eps_, + local_batch_size, + d_model_, + stream_); sync_check_cuda_error(); TensorMap cross_attention_input_tensors{ @@ -493,21 +532,19 @@ void T5Decoder::forward(std::vector* output_t {local_batch_size, head_num_ / tensor_para_.world_size_, max_seq_len, mem_max_seq_len}, output_tensors->at(5).getPtrWithOffset(cross_attentions_offset)}); } - cross_attention_layer_->forward(&cross_attention_output_tensors, - &cross_attention_input_tensors, - &decoder_layer_weight->at(l)->cross_attention_weights); - - invokeGeneralAddBiasResidualT5PreLayerNorm( - cross_attn_output_, - normed_cross_attn_output_, - self_attn_output_, - decoder_layer_weight->at(l)->cross_attn_layernorm_weights.gamma, - decoder_layer_weight->at(l)->cross_attn_layernorm_weights.beta, - decoder_layer_weight->at(l)->cross_attention_weights.attention_output_weight.bias, - layernorm_eps_, - local_batch_size, - d_model_, - stream_); + cross_attention_layer_->forward( + &cross_attention_output_tensors, &cross_attention_input_tensors, &layer_weight->cross_attention_weights); + + invokeGeneralAddBiasResidualT5PreLayerNorm(cross_attn_output_, + normed_cross_attn_output_, + self_attn_output_, + layer_weight->cross_attn_layernorm_weights.gamma, + layer_weight->cross_attn_layernorm_weights.beta, + layer_weight->cross_attention_weights.attention_output_weight.bias, + layernorm_eps_, + local_batch_size, + d_model_, + stream_); sync_check_cuda_error(); TensorMap ffn_input_tensors( @@ -538,7 +575,7 @@ void T5Decoder::forward(std::vector* output_t Tensor{MEMORY_GPU, data_type, {local_batch_size, d_model_}, decoder_output}); } - ffn_layer_->forward(&ffn_output_tensors, &ffn_input_tensors, &decoder_layer_weight->at(l)->ffn_weights); + ffn_layer_->forward(&ffn_output_tensors, &ffn_input_tensors, &layer_weight->ffn_weights); if (use_moe) { // residual addition for moe, we should pass the unnormed attention output if using pre_layernorm @@ -546,7 +583,7 @@ void T5Decoder::forward(std::vector* output_t finalize_moe_routing_kernelLauncher(fc2_result_, decoder_output, cross_attn_output_, - decoder_layer_weight->at(l)->ffn_weights.output_weight.bias, + layer_weight->ffn_weights.output_weight.bias, expert_scales_, expanded_source_row_to_expanded_dest_row_, expert_for_source_row_, @@ -556,12 +593,20 @@ void T5Decoder::forward(std::vector* output_t stream_); } else { - invokeT5AddBiasResidual(decoder_output, - cross_attn_output_, - decoder_layer_weight->at(l)->ffn_weights.output_weight.bias, - local_batch_size, - d_model_, - stream_); + auto* ffn_bias = layer_weight->ffn_weights.output_weight.bias; + if (has_adapters() && layer_weight->has_adapters()) { + if (ffn_bias != nullptr) { + invokeAddBias(decoder_output, ffn_bias, local_batch_size, d_model_, stream_); + ffn_bias = nullptr; + } + Tensor input_tensor{ + MEMORY_GPU, data_type, std::vector{local_batch_size, d_model_}, decoder_output}; + Tensor output_tensor{ + MEMORY_GPU, data_type, std::vector{local_batch_size, d_model_}, decoder_output}; + adapter_layer_->forward( + &input_tensor, &output_tensor, &layer_weight->adapter_weights_.after_ffn_adapter_weights_); + } + invokeT5AddBiasResidual(decoder_output, cross_attn_output_, ffn_bias, local_batch_size, d_model_, stream_); } sync_check_cuda_error(); diff --git a/src/fastertransformer/models/t5/T5Decoder.h b/src/fastertransformer/models/t5/T5Decoder.h index 085803d57..42dc98c0c 100644 --- a/src/fastertransformer/models/t5/T5Decoder.h +++ b/src/fastertransformer/models/t5/T5Decoder.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -24,6 +24,7 @@ #include "src/fastertransformer/layers/TensorParallelGeluFfnLayer.h" #include "src/fastertransformer/layers/TensorParallelReluFfnLayer.h" #include "src/fastertransformer/layers/TensorParallelSiluFfnLayer.h" +#include "src/fastertransformer/layers/adapter_layers/LinearAdapterLayer.h" #include "src/fastertransformer/layers/attention_layers/TensorParallelDecoderCrossAttentionLayer.h" #include "src/fastertransformer/layers/attention_layers/TensorParallelDecoderSelfAttentionLayer.h" #include "src/fastertransformer/models/t5/T5DecoderLayerWeight.h" @@ -56,6 +57,7 @@ class T5Decoder: public BaseLayer { BaseAttentionLayer* self_attention_layer_; BaseAttentionLayer* cross_attention_layer_; FfnLayer* ffn_layer_; + LinearAdapterLayer* adapter_layer_ = nullptr; void allocateBuffer() override; void freeBuffer() override; @@ -69,6 +71,7 @@ class T5Decoder: public BaseLayer { std::shared_ptr custom_all_reduce_comm_; int enable_custom_all_reduce_; + LinearAdapterConfig adapter_config_; bool isValidLayerParallelId(uint l); bool isFirstLayerParallelId(uint l); @@ -108,7 +111,8 @@ class T5Decoder: public BaseLayer { ActivationType activation_type, float q_scaling = 1.0f, std::shared_ptr custom_all_reduce_comm = nullptr, - int enable_custom_all_reduce = 0); + int enable_custom_all_reduce = 0, + LinearAdapterConfig const& adapter_config = {}); T5Decoder(T5Decoder const& decoder); @@ -117,6 +121,12 @@ class T5Decoder: public BaseLayer { void forward(std::vector* output_tensors, const std::vector* input_tensors, const std::vector*>* decoder_layer_weights); + + bool has_adapters() const + { + return adapter_config_.enabled(); + } + void setStream(cudaStream_t stream) override; }; diff --git a/src/fastertransformer/models/t5/T5DecoderLayerWeight.cc b/src/fastertransformer/models/t5/T5DecoderLayerWeight.cc index c93a19925..a18ffca4a 100644 --- a/src/fastertransformer/models/t5/T5DecoderLayerWeight.cc +++ b/src/fastertransformer/models/t5/T5DecoderLayerWeight.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -32,7 +32,9 @@ T5DecoderLayerWeight::T5DecoderLayerWeight(const size_t head_num, const size_t tensor_para_rank, const bool t5_with_bias, const bool use_gated_activation, - const size_t ia3_num_tasks): + const size_t ia3_num_tasks, + const size_t adapter_inter_size): + adapter_weights_{d_model, adapter_inter_size, tensor_para_size, tensor_para_rank}, head_num_(head_num), size_per_head_(size_per_head), d_model_(d_model), @@ -184,6 +186,7 @@ T5DecoderLayerWeight::~T5DecoderLayerWeight() template T5DecoderLayerWeight::T5DecoderLayerWeight(const T5DecoderLayerWeight& other): + adapter_weights_{other.adapter_weights_}, head_num_(other.head_num_), size_per_head_(other.size_per_head_), d_model_(other.d_model_), @@ -213,6 +216,10 @@ T5DecoderLayerWeight::T5DecoderLayerWeight(const T5DecoderLayerWeight& other) template T5DecoderLayerWeight& T5DecoderLayerWeight::operator=(const T5DecoderLayerWeight& other) { + if (this == &other) + return *this; + + adapter_weights_ = other.adapter_weights_; head_num_ = other.head_num_; size_per_head_ = other.size_per_head_; d_model_ = other.d_model_; @@ -453,6 +460,8 @@ void T5DecoderLayerWeight::loadModel(std::string dir_path, FtCudaDataType mod model_file_type); } + adapter_weights_.loadModel(dir_path, model_file_type); + FT_LOG_DEBUG("T5DecoderLayerWeight " + std::string(__func__) + " end"); } diff --git a/src/fastertransformer/models/t5/T5DecoderLayerWeight.h b/src/fastertransformer/models/t5/T5DecoderLayerWeight.h index 61b7aaef6..379f7032d 100644 --- a/src/fastertransformer/models/t5/T5DecoderLayerWeight.h +++ b/src/fastertransformer/models/t5/T5DecoderLayerWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -16,6 +16,7 @@ #pragma once +#include "T5AdapterWeight.h" #include "src/fastertransformer/kernels/layernorm_kernels.h" #include "src/fastertransformer/layers/FfnWeight.h" #include "src/fastertransformer/layers/attention_layers/AttentionWeight.h" @@ -29,16 +30,17 @@ template struct T5DecoderLayerWeight { T5DecoderLayerWeight() = default; - T5DecoderLayerWeight(const size_t head_num, - const size_t size_per_head, - const size_t d_model, - const size_t inter_size, - const size_t mem_d_model, - const size_t tensor_para_size, - const size_t tensor_para_rank, - const bool t5_with_bias, - const bool use_gated_activation, - const size_t ia3_num_tasks); + T5DecoderLayerWeight(size_t head_num, + size_t size_per_head, + size_t d_model, + size_t inter_size, + size_t mem_d_model, + size_t tensor_para_size, + size_t tensor_para_rank, + bool t5_with_bias, + bool use_gated_activation, + size_t ia3_num_tasks, + size_t adapter_inter_size); ~T5DecoderLayerWeight(); T5DecoderLayerWeight(const T5DecoderLayerWeight& other); T5DecoderLayerWeight& operator=(const T5DecoderLayerWeight& other); @@ -52,10 +54,17 @@ struct T5DecoderLayerWeight { bool t5_with_bias_; bool use_gated_activation_; + T5AdapterWeight adapter_weights_; + void loadModel(std::string dir_path, FtCudaDataType model_file_type); void setT5WithBias(bool t5_with_bias_para, bool use_gated_activation_para); + bool has_adapters() const + { + return adapter_weights_.enabled(); + } + private: void setWeightPtr(); void mallocWeights(); diff --git a/src/fastertransformer/models/t5/T5Decoding.cc b/src/fastertransformer/models/t5/T5Decoding.cc index 7e1ebc3c1..377db267b 100644 --- a/src/fastertransformer/models/t5/T5Decoding.cc +++ b/src/fastertransformer/models/t5/T5Decoding.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -44,7 +44,8 @@ void T5Decoding::initialize() activation_type_, q_scaling_, custom_all_reduce_comm_, - enable_custom_all_reduce_); + enable_custom_all_reduce_, + adapter_config_); dynamic_decode_layer_ = new DynamicDecodeLayer(vocab_size_, vocab_size_padded_, @@ -248,7 +249,8 @@ T5Decoding::T5Decoding(size_t max_batch_size, ActivationType activation_type, bool tie_word_embeddings, std::shared_ptr custom_all_reduce_comm, - int enable_custom_all_reduce): + int enable_custom_all_reduce, + LinearAdapterConfig const& adapter_config): BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward, cuda_device_prop), head_num_(head_num), size_per_head_(size_per_head), @@ -276,10 +278,15 @@ T5Decoding::T5Decoding(size_t max_batch_size, activation_type_(activation_type), tie_word_embeddings_(tie_word_embeddings), custom_all_reduce_comm_(custom_all_reduce_comm), - enable_custom_all_reduce_(enable_custom_all_reduce) + enable_custom_all_reduce_(enable_custom_all_reduce), + adapter_config_(adapter_config) { int local_vacab_size = ceil(vocab_size_ / 1.f / tensor_para_.world_size_); - if (std::is_same::value) { + if (std::is_same::value +#ifdef ENABLE_BF16 + || std::is_same<__nv_bfloat16, T>::value +#endif + ) { local_vacab_size = ceil(local_vacab_size / 8.f) * 8; } vocab_size_padded_ = (size_t)local_vacab_size * tensor_para_.world_size_; @@ -316,7 +323,8 @@ T5Decoding::T5Decoding(T5Decoding const& decoding): activation_type_(decoding.activation_type_), tie_word_embeddings_(decoding.tie_word_embeddings_), custom_all_reduce_comm_(decoding.custom_all_reduce_comm_), - enable_custom_all_reduce_(decoding.enable_custom_all_reduce_) + enable_custom_all_reduce_(decoding.enable_custom_all_reduce_), + adapter_config_(decoding.adapter_config_) { initialize(); } @@ -383,6 +391,9 @@ void T5Decoding::forward(TensorMap* output_tensors, // temperature [1] or [batch_size] on cpu, optional, float. // len_penalty [1] or [batch_size] on cpu, optional, float. // repetition_penalty [1] or [batch_size] on cpu, optional, float. + // presence_penalty [1] or [batch_size] on cpu, optional, float. + // Only one of repetition and presence penalties is allowed. + // min_length [1] or [batch_size] on cpu, optional, int // random_seed [1] or [batch_size] on cpu, optional, unsigned long long int. // top_p_decay [batch_size] on gpu, float, optional // top_p_min [batch_size] on gpu, float, optional @@ -868,7 +879,8 @@ void T5Decoding::forward(TensorMap* output_tensors, beam_hyps_.output_ids_src = output_ids_buf_; beam_hyps_.log_probs_src = output_log_probs_buf_; beam_hyps_.max_seq_len = max_seq_len; - beam_hyps_.length_penalty = input_tensors->at("len_penalty").getVal(); + beam_hyps_.length_penalty = + input_tensors->isExist("len_penalty") ? input_tensors->at("len_penalty").getVal() : 0.0f; invokeInsertUnfinishedPath(beam_hyps_, finished_buf_, cum_log_probs_, batch_size, beam_width, stream_); sync_check_cuda_error(); diff --git a/src/fastertransformer/models/t5/T5Decoding.h b/src/fastertransformer/models/t5/T5Decoding.h index 2863f9440..d3cd66c8e 100644 --- a/src/fastertransformer/models/t5/T5Decoding.h +++ b/src/fastertransformer/models/t5/T5Decoding.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -90,6 +90,7 @@ class T5Decoding: public BaseLayer { std::shared_ptr custom_all_reduce_comm_; int enable_custom_all_reduce_; + LinearAdapterConfig adapter_config_; protected: T* padded_embedding_kernel_ = nullptr; @@ -165,7 +166,8 @@ class T5Decoding: public BaseLayer { ActivationType activation_type = ActivationType::Relu, bool tie_word_embeddings = true, std::shared_ptr custom_all_reduce_comm = nullptr, - int enable_custom_all_reduce = 0); + int enable_custom_all_reduce = 0, + LinearAdapterConfig const& adapter_config = {}); T5Decoding(T5Decoding const& T5Decoding); diff --git a/src/fastertransformer/models/t5/T5DecodingWeight.cc b/src/fastertransformer/models/t5/T5DecodingWeight.cc index c62bce764..09a657fe0 100644 --- a/src/fastertransformer/models/t5/T5DecodingWeight.cc +++ b/src/fastertransformer/models/t5/T5DecodingWeight.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -36,7 +36,8 @@ T5DecodingWeight::T5DecodingWeight(const size_t head_num, const bool t5_with_bias_para, const bool use_gated_activation_para, const PositionEmbeddingType pe_type, - const size_t ia3_num_tasks): + const size_t ia3_num_tasks, + const size_t adapter_inter_size): head_num_(head_num), size_per_head_(size_per_head), d_model_(d_model), @@ -53,7 +54,8 @@ T5DecodingWeight::T5DecodingWeight(const size_t head_num, use_gated_activation(use_gated_activation_para), position_embedding_type(pe_type), real_weights_num_(t5_with_bias ? 6 : 4), - ia3_num_tasks_(ia3_num_tasks) + ia3_num_tasks_(ia3_num_tasks), + adapter_inter_size_(adapter_inter_size) { FT_LOG_DEBUG("T5DecodingWeight " + std::string(__func__) + " start"); FT_CHECK(num_layer_ % pipeline_para_size_ == 0); @@ -74,7 +76,8 @@ T5DecodingWeight::T5DecodingWeight(const size_t head_num, tensor_para_rank_, t5_with_bias, use_gated_activation, - ia3_num_tasks_)); + ia3_num_tasks_, + adapter_inter_size_)); } else { decoder_layer_weights.push_back(new T5DecoderLayerWeight()); @@ -108,6 +111,9 @@ T5DecodingWeight::~T5DecodingWeight() if (is_maintain_buffer == true) { decoder_layer_weights.clear(); for (int i = 0; i < real_weights_num_; i++) { + if (shared_embed_ && i == 3 && weights_ptr[i] == nullptr) { + continue; + } deviceFree(weights_ptr[i]); } @@ -140,7 +146,9 @@ T5DecodingWeight::T5DecodingWeight(const T5DecodingWeight& other): use_gated_activation(other.use_gated_activation), position_embedding_type(other.position_embedding_type), real_weights_num_(other.real_weights_num_), - ia3_num_tasks_(other.ia3_num_tasks_) + ia3_num_tasks_(other.ia3_num_tasks_), + adapter_inter_size_(other.adapter_inter_size_), + shared_embed_(other.shared_embed_) { FT_LOG_DEBUG("T5DecodingWeight " + std::string(__func__) + " start"); initialize(); @@ -178,6 +186,8 @@ T5DecodingWeight& T5DecodingWeight::operator=(const T5DecodingWeight& othe position_embedding_type = other.position_embedding_type; real_weights_num_ = other.real_weights_num_; ia3_num_tasks_ = other.ia3_num_tasks_; + adapter_inter_size_ = other.adapter_inter_size_; + shared_embed_ = other.shared_embed_; FT_LOG_DEBUG("T5DecodingWeight " + std::string(__func__) + " start"); initialize(); @@ -213,7 +223,14 @@ void T5DecodingWeight::setWeightPtr() pre_decoder_embedding_table = weights_ptr[0]; absolute_or_relative_position_embedding = weights_ptr[1]; post_decoder_layernorm.gamma = weights_ptr[2]; - post_decoder_embedding.kernel = weights_ptr[3]; + if (shared_embed_ && weights_ptr[1] != weights_ptr[3]) { + deviceFree(weights_ptr[3]); + weights_ptr[3] = nullptr; + post_decoder_embedding.kernel = weights_ptr[1]; + } + else { + post_decoder_embedding.kernel = weights_ptr[3]; + } if (t5_with_bias) { post_decoder_layernorm.beta = weights_ptr[4]; post_decoder_embedding.bias = weights_ptr[5]; @@ -241,10 +258,12 @@ void T5DecodingWeight::loadModel(std::string dir_path) loadWeightFromBin( weights_ptr[2], {(size_t)weights_size[2]}, dir_path + "/decoder.final_layer_norm.weight.bin", model_file_type); if (checkIfFileExist(dir_path + "/lm_head.weight.bin")) { + shared_embed_ = false; loadWeightFromBin( weights_ptr[3], {(size_t)weights_size[3]}, dir_path + "/lm_head.weight.bin", model_file_type); } else { + shared_embed_ = true; loadWeightFromBin( weights_ptr[3], {(size_t)weights_size[3]}, dir_path + "/shared.weight_T.bin", model_file_type); } diff --git a/src/fastertransformer/models/t5/T5DecodingWeight.h b/src/fastertransformer/models/t5/T5DecodingWeight.h index 1def647e9..98e8eb6a1 100644 --- a/src/fastertransformer/models/t5/T5DecodingWeight.h +++ b/src/fastertransformer/models/t5/T5DecodingWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -29,22 +29,23 @@ template struct T5DecodingWeight { T5DecodingWeight() = default; - T5DecodingWeight(const size_t head_num, - const size_t size_per_head, - const size_t d_model, - const size_t inter_size, - const size_t vocab_size, - const size_t num_layer, - const size_t mem_d_model, - const size_t num_bucket_or_max_seq_len, - const size_t tensor_para_size, - const size_t tensor_para_rank, - const size_t pipeline_para_size, - const size_t pipeline_para_rank, - const bool t5_with_bias_para = false, - const bool use_gated_activation_para = false, - const PositionEmbeddingType position_embedding_type_para = PositionEmbeddingType::relative, - const size_t num_ia3_tasks = false); + T5DecodingWeight(size_t head_num, + size_t size_per_head, + size_t d_model, + size_t inter_size, + size_t vocab_size, + size_t num_layer, + size_t mem_d_model, + size_t num_bucket_or_max_seq_len, + size_t tensor_para_size, + size_t tensor_para_rank, + size_t pipeline_para_size, + size_t pipeline_para_rank, + bool t5_with_bias_para = false, + bool use_gated_activation_para = false, + PositionEmbeddingType position_embedding_type_para = PositionEmbeddingType::relative, + size_t num_ia3_tasks = false, + size_t adapter_inter_size = 0); ~T5DecodingWeight(); T5DecodingWeight(const T5DecodingWeight& other); T5DecodingWeight& operator=(const T5DecodingWeight& other); @@ -92,7 +93,9 @@ struct T5DecodingWeight { size_t pipeline_para_size_; size_t pipeline_para_rank_; size_t ia3_num_tasks_; + size_t adapter_inter_size_; bool is_maintain_buffer = false; + bool shared_embed_ = false; int real_weights_num_; diff --git a/src/fastertransformer/models/t5/T5Encoder.cc b/src/fastertransformer/models/t5/T5Encoder.cc index fe0f6aea2..2d69f034e 100644 --- a/src/fastertransformer/models/t5/T5Encoder.cc +++ b/src/fastertransformer/models/t5/T5Encoder.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -119,6 +119,21 @@ void T5Encoder::initialize() custom_all_reduce_comm_, enable_custom_all_reduce_); } + if (has_adapters()) { + adapter_layer_ = new LinearAdapterLayer(adapter_config_, + max_batch_size_, + max_seq_len_, + d_model_, + tensor_para_, + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + sparse_, + custom_all_reduce_comm_, + enable_custom_all_reduce_, + layernorm_eps_); + } } template @@ -149,7 +164,8 @@ T5Encoder::T5Encoder(size_t max_batch_size, int prompt_learning_start_id, PromptLearningType prompt_learning_type, std::shared_ptr custom_all_reduce_comm, - int enable_custom_all_reduce): + int enable_custom_all_reduce, + LinearAdapterConfig const& adapter_config): BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward), max_batch_size_(max_batch_size), max_seq_len_(max_seq_len), @@ -175,8 +191,10 @@ T5Encoder::T5Encoder(size_t max_batch_size, prompt_learning_start_id_(prompt_learning_start_id), prompt_learning_type_(prompt_learning_type), custom_all_reduce_comm_(custom_all_reduce_comm), - enable_custom_all_reduce_(enable_custom_all_reduce) + enable_custom_all_reduce_(enable_custom_all_reduce), + adapter_config_{adapter_config} { + FT_CHECK_WITH_INFO(layernorm_type_ == LayerNormType::pre_layernorm, "T5Encoder only supports pre_layernorm"); initialize(); } @@ -207,7 +225,8 @@ T5Encoder::T5Encoder(T5Encoder const& t5_encoder): prompt_learning_start_id_(t5_encoder.prompt_learning_start_id_), prompt_learning_type_(t5_encoder.prompt_learning_type_), custom_all_reduce_comm_(t5_encoder.custom_all_reduce_comm_), - enable_custom_all_reduce_(t5_encoder.enable_custom_all_reduce_) + enable_custom_all_reduce_(t5_encoder.enable_custom_all_reduce_), + adapter_config_(t5_encoder.adapter_config_) { initialize(); } @@ -218,6 +237,10 @@ T5Encoder::~T5Encoder() FT_LOG_DEBUG(__PRETTY_FUNCTION__); delete attention_layer_; delete ffn_layer_; + if (adapter_layer_ != nullptr) { + delete adapter_layer_; + adapter_layer_ = nullptr; + } freeBuffer(); } @@ -226,6 +249,9 @@ void T5Encoder::setStream(cudaStream_t stream) { attention_layer_->setStream(stream); ffn_layer_->setStream(stream); + if (adapter_layer_ != nullptr) { + adapter_layer_->setStream(stream); + } BaseLayer::setStream(stream); } @@ -233,7 +259,7 @@ template void T5Encoder::allocateBuffer() { if (is_allocate_buffer_ == false) { - token_num_ = (size_t*)allocator_->reMalloc(token_num_, sizeof(size_t) * 1, false); + check_cuda_error(cudaMallocHost((void**)&h_pinned_token_num_ptr_, sizeof(size_t))); padding_offset_ = (int*)allocator_->reMalloc(padding_offset_, sizeof(int) * max_batch_size_ * max_seq_len_, false); trt_mha_padding_offset_ = @@ -280,7 +306,9 @@ template void T5Encoder::allocateBuffer(size_t batch_size, size_t seq_len) { FT_LOG_DEBUG(__PRETTY_FUNCTION__); - token_num_ = (size_t*)allocator_->reMalloc(token_num_, sizeof(size_t) * 1, false); + if (!is_allocate_buffer_) { + check_cuda_error(cudaMallocHost((void**)&h_pinned_token_num_ptr_, sizeof(size_t))); + } padding_offset_ = (int*)allocator_->reMalloc(padding_offset_, sizeof(int) * batch_size * seq_len, false); trt_mha_padding_offset_ = (int*)allocator_->reMalloc(trt_mha_padding_offset_, sizeof(int) * (2 * batch_size + 1), false); @@ -331,7 +359,7 @@ template void T5Encoder::freeBuffer() { if (is_allocate_buffer_) { - allocator_->free((void**)(&token_num_)); + check_cuda_error(cudaFreeHost(h_pinned_token_num_ptr_)); allocator_->free((void**)(&padding_offset_)); allocator_->free((void**)(&trt_mha_padding_offset_)); @@ -637,8 +665,8 @@ void T5Encoder::forward(TensorMap* output_tensors, attention_mask_, sequence_lengths, local_batch_size, request_seq_len, stream_); sync_check_cuda_error(); - invokeGetPaddingOffset(&h_token_num, - token_num_, + invokeGetPaddingOffset(h_pinned_token_num_ptr_, + &h_token_num, padding_offset_, sequence_lengths, local_batch_size, @@ -802,31 +830,41 @@ void T5Encoder::forward(TensorMap* output_tensors, attention_layer_->forward(&attn_output_tensors, &attn_input_tensors, &layer_weight->attention_weights_); } + auto* attention_bias = layer_weight->attention_weights_.attention_output_weight.bias; + if (has_adapters() && layer_weight->has_adapters()) { + if (attention_bias != nullptr) { + invokeAddBias(attn_out_buf_, attention_bias, h_token_num, d_model_, stream_); + attention_bias = nullptr; + } + Tensor input_tensor{MEMORY_GPU, data_type, std::vector{h_token_num, d_model_}, attn_out_buf_}; + Tensor output_tensor{MEMORY_GPU, data_type, std::vector{h_token_num, d_model_}, attn_out_buf_}; + adapter_layer_->forward( + &input_tensor, &output_tensor, &layer_weight->adapter_weights_.after_attention_adapter_weights_); + } + if (layernorm_type_ == LayerNormType::post_layernorm) { - invokeGeneralAddBiasResidualT5PreLayerNorm( - attn_out_buf_, - attn_out_buf_, - from_tensor, - layer_weight->attn_layernorm_weights_.gamma, - layer_weight->attn_layernorm_weights_.beta, - layer_weight->attention_weights_.attention_output_weight.bias, - layernorm_eps_, - h_token_num, - d_model_, - stream_); + invokeGeneralAddBiasResidualT5PreLayerNorm(attn_out_buf_, + attn_out_buf_, + from_tensor, + layer_weight->attn_layernorm_weights_.gamma, + layer_weight->attn_layernorm_weights_.beta, + attention_bias, + layernorm_eps_, + h_token_num, + d_model_, + stream_); } else if (layernorm_type_ == LayerNormType::pre_layernorm) { - invokeGeneralAddBiasResidualT5PreLayerNorm( - attn_out_buf_, - normed_attn_out_buf_, - from_tensor, - layer_weight->ffn_layernorm_weights_.gamma, - layer_weight->ffn_layernorm_weights_.beta, - layer_weight->attention_weights_.attention_output_weight.bias, - layernorm_eps_, - h_token_num, - d_model_, - stream_); + invokeGeneralAddBiasResidualT5PreLayerNorm(attn_out_buf_, + normed_attn_out_buf_, + from_tensor, + layer_weight->ffn_layernorm_weights_.gamma, + layer_weight->ffn_layernorm_weights_.beta, + attention_bias, + layernorm_eps_, + h_token_num, + d_model_, + stream_); } bool use_moe = false; @@ -871,66 +909,77 @@ void T5Encoder::forward(TensorMap* output_tensors, ffn_layer_->forward(&ffn_output_tensors, &ffn_input_tensors, &layer_weight->ffn_weights_); } - if (use_moe && layernorm_type_ == LayerNormType::pre_layernorm) { - // residual addition for moe, we should pass the unnormed attention output if using pre_layernorm - // and pass the normed attention output if using post_layernorm. They all point to the attn_out_buf_. - finalize_moe_routing_kernelLauncher(fc2_result_, - out_tensor, - attn_out_buf_, - layer_weight->ffn_weights_.output_weight.bias, - expert_scales_, - expanded_source_row_to_expanded_dest_row_, - expert_for_source_row_, - h_token_num, - d_model_, - moe_k_, - stream_); - } - if (use_moe && layernorm_type_ == LayerNormType::post_layernorm) { - finalize_moe_routing_kernelLauncher(fc2_result_, - out_tensor, - attn_out_buf_, - layer_weight->ffn_weights_.output_weight.bias, - expert_scales_, - expanded_source_row_to_expanded_dest_row_, - expert_for_source_row_, - h_token_num, - d_model_, - moe_k_, - stream_); - invokeGeneralT5LayerNorm(out_tensor, - out_tensor, - layer_weight->ffn_layernorm_weights_.gamma, - layer_weight->ffn_layernorm_weights_.beta, - layernorm_eps_, - h_token_num, - d_model_, - stream_); + if (use_moe) { + if (layernorm_type_ == LayerNormType::pre_layernorm) { + // residual addition for moe, we should pass the unnormed attention output if using pre_layernorm + // and pass the normed attention output if using post_layernorm. They all point to the + // attn_out_buf_. + finalize_moe_routing_kernelLauncher(fc2_result_, + out_tensor, + attn_out_buf_, + layer_weight->ffn_weights_.output_weight.bias, + expert_scales_, + expanded_source_row_to_expanded_dest_row_, + expert_for_source_row_, + h_token_num, + d_model_, + moe_k_, + stream_); + } + else if (layernorm_type_ == LayerNormType::post_layernorm) { + finalize_moe_routing_kernelLauncher(fc2_result_, + out_tensor, + attn_out_buf_, + layer_weight->ffn_weights_.output_weight.bias, + expert_scales_, + expanded_source_row_to_expanded_dest_row_, + expert_for_source_row_, + h_token_num, + d_model_, + moe_k_, + stream_); + invokeGeneralT5LayerNorm(out_tensor, + out_tensor, + layer_weight->ffn_layernorm_weights_.gamma, + layer_weight->ffn_layernorm_weights_.beta, + layernorm_eps_, + h_token_num, + d_model_, + stream_); + } } + else { // not using moe + auto* ffn_bias = layer_weight->ffn_weights_.output_weight.bias; + if (has_adapters() && layer_weight->has_adapters()) { + if (ffn_bias != nullptr) { + invokeAddBias(out_tensor, ffn_bias, h_token_num, d_model_, stream_); + ffn_bias = nullptr; + } + Tensor input_tensor{MEMORY_GPU, data_type, std::vector{h_token_num, d_model_}, out_tensor}; + Tensor output_tensor{MEMORY_GPU, data_type, std::vector{h_token_num, d_model_}, out_tensor}; + adapter_layer_->forward( + &input_tensor, &output_tensor, &layer_weight->adapter_weights_.after_ffn_adapter_weights_); + } - if (!use_moe && layernorm_type_ == LayerNormType::post_layernorm) { - invokeGeneralAddBiasResidualT5PreLayerNorm(out_tensor, - out_tensor, - attn_out_buf_, - layer_weight->ffn_layernorm_weights_.gamma, - layer_weight->ffn_layernorm_weights_.beta, - layer_weight->ffn_weights_.output_weight.bias, - layernorm_eps_, - h_token_num, - d_model_, - stream_); - } - else if (!use_moe && layernorm_type_ == LayerNormType::pre_layernorm) { - invokeT5AddBiasResidual(out_tensor, - attn_out_buf_, - layer_weight->ffn_weights_.output_weight.bias, - h_token_num, - d_model_, - stream_); + if (layernorm_type_ == LayerNormType::post_layernorm) { + invokeGeneralAddBiasResidualT5PreLayerNorm(out_tensor, + out_tensor, + attn_out_buf_, + layer_weight->ffn_layernorm_weights_.gamma, + layer_weight->ffn_layernorm_weights_.beta, + ffn_bias, + layernorm_eps_, + h_token_num, + d_model_, + stream_); + } + else if (layernorm_type_ == LayerNormType::pre_layernorm) { + invokeT5AddBiasResidual(out_tensor, attn_out_buf_, ffn_bias, h_token_num, d_model_, stream_); + } } sync_check_cuda_error(); - if (isLastLayerParallelId(i) == true && pipeline_para_.rank_ != pipeline_para_.world_size_ - 1) { + if (isLastLayerParallelId(i) && pipeline_para_.rank_ != pipeline_para_.world_size_ - 1) { const int data_size = h_token_num * d_model_ / tensor_para_.world_size_; ftNcclSend(out_tensor + data_size * tensor_para_.rank_, data_size, diff --git a/src/fastertransformer/models/t5/T5Encoder.h b/src/fastertransformer/models/t5/T5Encoder.h index ae80d097c..7a0d5cc6f 100644 --- a/src/fastertransformer/models/t5/T5Encoder.h +++ b/src/fastertransformer/models/t5/T5Encoder.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -26,6 +26,7 @@ #include "src/fastertransformer/layers/TensorParallelGeluFfnLayer.h" #include "src/fastertransformer/layers/TensorParallelReluFfnLayer.h" #include "src/fastertransformer/layers/TensorParallelSiluFfnLayer.h" +#include "src/fastertransformer/layers/adapter_layers/LinearAdapterLayer.h" // #include "src/fastertransformer/layers/attention_layers/FusedAttentionLayer.h" #include "src/fastertransformer/layers/attention_layers/TensorParallelUnfusedAttentionLayer.h" #include "src/fastertransformer/models/t5/T5EncoderWeight.h" @@ -62,6 +63,7 @@ class T5Encoder: public BaseLayer { BaseAttentionLayer* attention_layer_; FfnLayer* ffn_layer_; + LinearAdapterLayer* adapter_layer_ = nullptr; bool is_allocate_buffer_ = false; @@ -82,10 +84,11 @@ class T5Encoder: public BaseLayer { std::shared_ptr custom_all_reduce_comm_; int enable_custom_all_reduce_; + LinearAdapterConfig adapter_config_; protected: // model params - size_t* token_num_ = nullptr; + size_t* h_pinned_token_num_ptr_ = nullptr; int* padding_offset_ = nullptr; int* trt_mha_padding_offset_ = nullptr; T* attention_mask_ = nullptr; @@ -134,7 +137,8 @@ class T5Encoder: public BaseLayer { int prompt_learning_start_id = 0, PromptLearningType prompt_learning_type = PromptLearningType::no_prompt, std::shared_ptr custom_all_reduce_comm = nullptr, - int enable_custom_all_reduce = 0); + int enable_custom_all_reduce = 0, + LinearAdapterConfig const& adapter_config = {}); T5Encoder(T5Encoder const& t5_layer); @@ -165,6 +169,11 @@ class T5Encoder: public BaseLayer { return head_num_; } + bool has_adapters() const + { + return adapter_config_.enabled(); + } + void setStream(cudaStream_t stream) override; }; diff --git a/src/fastertransformer/models/t5/T5EncoderLayerWeight.cc b/src/fastertransformer/models/t5/T5EncoderLayerWeight.cc index 54f0beba6..ec565507c 100644 --- a/src/fastertransformer/models/t5/T5EncoderLayerWeight.cc +++ b/src/fastertransformer/models/t5/T5EncoderLayerWeight.cc @@ -1,5 +1,6 @@ + /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -30,15 +31,17 @@ T5EncoderLayerWeight::T5EncoderLayerWeight(const size_t head_num, const size_t tensor_para_rank, const bool t5_with_bias, const bool use_gated_activation, - const size_t ia3_num_tasks): + const size_t ia3_num_tasks, + const size_t adapter_inter_size): + adapter_weights_{d_model, adapter_inter_size, tensor_para_size, tensor_para_rank}, + t5_with_bias_(t5_with_bias), + use_gated_activation_(use_gated_activation), head_num_(head_num), size_per_head_(size_per_head), d_model_(d_model), inter_size_(inter_size), tensor_para_size_(tensor_para_size), tensor_para_rank_(tensor_para_rank), - t5_with_bias_(t5_with_bias), - use_gated_activation_(use_gated_activation), ia3_num_tasks_(ia3_num_tasks) { real_weights_num_ = (8 + (use_gated_activation_ ? 1 : 0)) * (t5_with_bias_ ? 2 : 1); @@ -136,8 +139,8 @@ T5EncoderLayerWeight::~T5EncoderLayerWeight() } if (is_maintain_sp_buffer_) { - for (int i = 0; i < 6; i++) { - deviceFree(sp_weights_ptr_[i]); + for (auto w : sp_weights_ptr_) { + deviceFree(w); } attention_weights_.query_weight.sp_kernel = nullptr; attention_weights_.key_weight.sp_kernel = nullptr; @@ -149,8 +152,8 @@ T5EncoderLayerWeight::~T5EncoderLayerWeight() } if (maintain_ia3_buffer_) { - for (int i = 0; i < IA3_ADAPTER_MAX_NUM_ENCODER; i++) { - deviceFree(ia3_weights_ptr_[i]); + for (auto w : ia3_weights_ptr_) { + deviceFree(w); } attention_weights_.ia3_key_weight.kernel = nullptr; ffn_weights_.ia3_weight.kernel = nullptr; @@ -162,15 +165,16 @@ T5EncoderLayerWeight::~T5EncoderLayerWeight() template T5EncoderLayerWeight::T5EncoderLayerWeight(const T5EncoderLayerWeight& other): + adapter_weights_{other.adapter_weights_}, + t5_with_bias_(other.t5_with_bias_), head_num_(other.head_num_), size_per_head_(other.size_per_head_), d_model_(other.d_model_), inter_size_(other.inter_size_), tensor_para_size_(other.tensor_para_size_), tensor_para_rank_(other.tensor_para_rank_), - t5_with_bias_(other.t5_with_bias_), - real_weights_num_(other.real_weights_num_), - ia3_num_tasks_(other.ia3_num_tasks_) + ia3_num_tasks_(other.ia3_num_tasks_), + real_weights_num_(other.real_weights_num_) { FT_LOG_DEBUG("T5EncoderLayerWeight " + std::string(__func__) + " start"); initialize(); @@ -179,7 +183,7 @@ T5EncoderLayerWeight::T5EncoderLayerWeight(const T5EncoderLayerWeight& other) cudaD2Dcpy(weights_ptr_[i], other.weights_ptr_[i], weights_size_[i]); } if (ia3_num_tasks_ > 0) { - for (int i = 0; i < IA3_ADAPTER_MAX_NUM_ENCODER; i++) { + for (size_t i = 0; i < IA3_ADAPTER_MAX_NUM_ENCODER; i++) { cudaD2Dcpy(ia3_weights_ptr_[i], other.ia3_weights_ptr_[i], ia3_weights_size_[i]); } } @@ -190,8 +194,12 @@ T5EncoderLayerWeight::T5EncoderLayerWeight(const T5EncoderLayerWeight& other) template T5EncoderLayerWeight& T5EncoderLayerWeight::operator=(const T5EncoderLayerWeight& other) { + if (this == &other) + return *this; + FT_LOG_DEBUG("T5EncoderLayerWeight " + std::string(__func__) + " start"); + adapter_weights_ = other.adapter_weights_; head_num_ = other.head_num_; size_per_head_ = other.size_per_head_; d_model_ = other.d_model_; @@ -207,7 +215,7 @@ T5EncoderLayerWeight& T5EncoderLayerWeight::operator=(const T5EncoderLayer cudaD2Dcpy(weights_ptr_[i], other.weights_ptr_[i], weights_size_[i]); } if (ia3_num_tasks_ > 0) { - for (int i = 0; i < IA3_ADAPTER_MAX_NUM_ENCODER; i++) { + for (size_t i = 0; i < IA3_ADAPTER_MAX_NUM_ENCODER; i++) { cudaD2Dcpy(ia3_weights_ptr_[i], other.ia3_weights_ptr_[i], ia3_weights_size_[i]); } } @@ -324,7 +332,7 @@ void T5EncoderLayerWeight::mallocWeights() deviceMalloc(&weights_ptr_[i], weights_size_[i]); } if (ia3_num_tasks_ > 0) { - for (int i = 0; i < IA3_ADAPTER_MAX_NUM_ENCODER; i++) { + for (size_t i = 0; i < IA3_ADAPTER_MAX_NUM_ENCODER; i++) { deviceMalloc(&ia3_weights_ptr_[i], ia3_weights_size_[i]); } maintain_ia3_buffer_ = true; @@ -334,7 +342,7 @@ void T5EncoderLayerWeight::mallocWeights() } template -void T5EncoderLayerWeight::loadModel(std::string dir_path, FtCudaDataType model_file_type) +void T5EncoderLayerWeight::loadModel(std::string const& dir_path, FtCudaDataType model_file_type) { FT_LOG_DEBUG("T5EncoderLayerWeight " + std::string(__func__) + " start"); @@ -443,6 +451,8 @@ void T5EncoderLayerWeight::loadModel(std::string dir_path, FtCudaDataType mod model_file_type); } + adapter_weights_.loadModel(dir_path, model_file_type); + FT_LOG_DEBUG("T5EncoderLayerWeight " + std::string(__func__) + " end"); } diff --git a/src/fastertransformer/models/t5/T5EncoderLayerWeight.h b/src/fastertransformer/models/t5/T5EncoderLayerWeight.h index 612232a06..033ca10f7 100644 --- a/src/fastertransformer/models/t5/T5EncoderLayerWeight.h +++ b/src/fastertransformer/models/t5/T5EncoderLayerWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -16,8 +16,10 @@ #pragma once +#include "T5AdapterWeight.h" #include "src/fastertransformer/kernels/layernorm_kernels.h" #include "src/fastertransformer/layers/FfnWeight.h" +#include "src/fastertransformer/layers/adapter_layers/LinearAdapterWeight.h" #include "src/fastertransformer/layers/attention_layers/AttentionWeight.h" #include "src/fastertransformer/utils/IA3.h" #include "src/fastertransformer/utils/cublasMMWrapper.h" @@ -29,15 +31,16 @@ template struct T5EncoderLayerWeight { T5EncoderLayerWeight() = default; - T5EncoderLayerWeight(const size_t head_num, - const size_t size_per_head, - const size_t d_model, - const size_t inter_size, - const size_t tensor_para_size, - const size_t tensor_para_rank, - const bool t5_with_bias, - const bool use_gated_activation, - const size_t ia3_num_tasks); + T5EncoderLayerWeight(size_t head_num, + size_t size_per_head, + size_t d_model, + size_t inter_size, + size_t tensor_para_size, + size_t tensor_para_rank, + bool t5_with_bias, + bool use_gated_activation, + size_t ia3_num_tasks, + size_t adapter_inter_size); ~T5EncoderLayerWeight(); T5EncoderLayerWeight(const T5EncoderLayerWeight& other); T5EncoderLayerWeight& operator=(const T5EncoderLayerWeight& other); @@ -53,9 +56,16 @@ struct T5EncoderLayerWeight { bool t5_with_bias_; bool use_gated_activation_; - void loadModel(std::string dir_path, FtCudaDataType model_file_type); + T5AdapterWeight adapter_weights_; + + void loadModel(std::string const& dir_path, FtCudaDataType model_file_type); void setT5WithBias(bool t5_with_bias_para, bool use_gated_activation_para); + bool has_adapters() const + { + return adapter_weights_.enabled(); + } + private: void setWeightPtr(); void mallocWeights(); diff --git a/src/fastertransformer/models/t5/T5EncoderWeight.cc b/src/fastertransformer/models/t5/T5EncoderWeight.cc index 1b92b786b..278f091ce 100644 --- a/src/fastertransformer/models/t5/T5EncoderWeight.cc +++ b/src/fastertransformer/models/t5/T5EncoderWeight.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -36,7 +36,8 @@ T5EncoderWeight::T5EncoderWeight(const size_t h const PositionEmbeddingType pe_type, PromptLearningType prompt_learning_type, std::map> prompt_learning_pair, - const size_t ia3_num_tasks): + const size_t ia3_num_tasks, + const size_t adapter_inter_size): head_num_(head_num), size_per_head_(size_per_head), d_model_(d_model), @@ -54,7 +55,8 @@ T5EncoderWeight::T5EncoderWeight(const size_t h prompt_learning_type_(prompt_learning_type), prompt_learning_pair_(prompt_learning_pair), real_weights_num_(t5_with_bias ? 4 : 3), - ia3_num_tasks_(ia3_num_tasks) + ia3_num_tasks_(ia3_num_tasks), + adapter_inter_size_{adapter_inter_size} { FT_LOG_DEBUG("T5EncoderWeight " + std::string(__func__) + " start"); FT_CHECK(num_layer_ % pipeline_para_size_ == 0); @@ -73,7 +75,8 @@ T5EncoderWeight::T5EncoderWeight(const size_t h tensor_para_rank_, t5_with_bias, use_gated_activation, - ia3_num_tasks_)); + ia3_num_tasks_, + adapter_inter_size_)); } else { // Don't malloc and load these layers since we don't use them. @@ -174,7 +177,8 @@ T5EncoderWeight::T5EncoderWeight(const T5EncoderWeight& other): prompt_learning_type_(other.prompt_learning_type_), prompt_learning_pair_(other.prompt_learning_pair_), real_weights_num_(other.real_weights_num_), - ia3_num_tasks_(other.ia3_num_tasks_) + ia3_num_tasks_(other.ia3_num_tasks_), + adapter_inter_size_(other.adapter_inter_size_) { FT_LOG_DEBUG("T5EncoderWeight " + std::string(__func__) + " start"); initialize(); @@ -227,6 +231,7 @@ T5EncoderWeight& T5EncoderWeight::operator=(const T5EncoderWeight& other) prompt_learning_pair_ = other.prompt_learning_pair_; real_weights_num_ = other.real_weights_num_; ia3_num_tasks_ = other.ia3_num_tasks_; + adapter_inter_size_ = other.adapter_inter_size_; initialize(); mallocWeights(); for (int i = 0; i < real_weights_num_; i++) { diff --git a/src/fastertransformer/models/t5/T5EncoderWeight.h b/src/fastertransformer/models/t5/T5EncoderWeight.h index 8f98ec44f..73098caa1 100644 --- a/src/fastertransformer/models/t5/T5EncoderWeight.h +++ b/src/fastertransformer/models/t5/T5EncoderWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -26,23 +26,24 @@ template struct T5EncoderWeight { T5EncoderWeight() = default; - T5EncoderWeight(const size_t head_num, - const size_t size_per_head, - const size_t d_model, - const size_t inter_size, - const size_t vocab_size, - const size_t num_layer, - const size_t num_bucket_or_max_seq_len, - const size_t tensor_para_size, - const size_t tensor_para_rank, - const size_t pipeline_para_size, - const size_t pipeline_para_rank, - const bool t5_with_bias_para = false, - const bool use_gated_activation_para = false, - const PositionEmbeddingType pe_type = PositionEmbeddingType::relative, + T5EncoderWeight(size_t head_num, + size_t size_per_head, + size_t d_model, + size_t inter_size, + size_t vocab_size, + size_t num_layer, + size_t num_bucket_or_max_seq_len, + size_t tensor_para_size, + size_t tensor_para_rank, + size_t pipeline_para_size, + size_t pipeline_para_rank, + bool t5_with_bias_para = false, + bool use_gated_activation_para = false, + PositionEmbeddingType pe_type = PositionEmbeddingType::relative, PromptLearningType prompt_learning_type = PromptLearningType::no_prompt, std::map> prompt_learning_pair = {}, - const size_t ia3_num_tasks = 0); + size_t ia3_num_tasks = 0, + size_t adapter_inter_size = 0); ~T5EncoderWeight(); T5EncoderWeight(const T5EncoderWeight& other); T5EncoderWeight& operator=(const T5EncoderWeight& other); @@ -87,6 +88,7 @@ struct T5EncoderWeight { size_t pipeline_para_size_; size_t pipeline_para_rank_; size_t ia3_num_tasks_; + size_t adapter_inter_size_; bool is_maintain_buffer = false; diff --git a/src/fastertransformer/models/t5/t5_gemm.cc b/src/fastertransformer/models/t5/t5_gemm.cc index c9c006250..345747acc 100644 --- a/src/fastertransformer/models/t5/t5_gemm.cc +++ b/src/fastertransformer/models/t5/t5_gemm.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/vit/CMakeLists.txt b/src/fastertransformer/models/vit/CMakeLists.txt index 880108315..f1be47c0d 100644 --- a/src/fastertransformer/models/vit/CMakeLists.txt +++ b/src/fastertransformer/models/vit/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/vit/ViT.cc b/src/fastertransformer/models/vit/ViT.cc index 0daa1f30d..f5e3e5f8c 100644 --- a/src/fastertransformer/models/vit/ViT.cc +++ b/src/fastertransformer/models/vit/ViT.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -196,7 +196,7 @@ void ViTTransformer::allocateBuffer() (T*)allocator_->reMalloc(mask_buf_, sizeof(T) * max_batch_size_ * max_seq_len_ * max_seq_len_, false); padding_offset_ = (int*)allocator_->reMalloc(padding_offset_, sizeof(int) * max_batch_size_ * max_seq_len_, false); - token_num_ = (size_t*)allocator_->reMalloc(token_num_, sizeof(size_t) * 1, false); + check_cuda_error(cudaMallocHost((void**)&h_pinned_token_num_ptr_, sizeof(size_t))); trt_mha_padding_offset_ = (int*)allocator_->reMalloc(trt_mha_padding_offset_, sizeof(int) * (2 * max_batch_size_ + 1), false); @@ -229,7 +229,9 @@ void ViTTransformer::allocateBuffer(size_t batch_size) REMALLOC(embed_buf_3_, sizeof(T) * batch_size * max_seq_len_ * embed_dim_); REMALLOC(mask_buf_, sizeof(T) * batch_size * max_seq_len_ * max_seq_len_); REMALLOC(padding_offset_, sizeof(int) * batch_size * max_seq_len_); - REMALLOC(token_num_, sizeof(size_t) * 1); + if (!is_allocate_buffer_) { + check_cuda_error(cudaMallocHost((void**)&h_pinned_token_num_ptr_, sizeof(size_t))); + } REMALLOC(trt_mha_padding_offset_, sizeof(int) * (2 * batch_size + 1)); REMALLOC(seq_len_vec_, sizeof(int) * batch_size); resetBatch(batch_size); @@ -243,16 +245,17 @@ void ViTTransformer::allocateBuffer(size_t batch_size) template void ViTTransformer::freeBuffer() { - allocator_->free((void**)(&embed_buf_1_)); - allocator_->free((void**)(&embed_buf_2_)); - allocator_->free((void**)(&embed_buf_3_)); - allocator_->free((void**)(&mask_buf_)); - allocator_->free((void**)(&trt_mha_padding_offset_)); - allocator_->free((void**)(&seq_len_vec_)); - allocator_->free((void**)(&padding_offset_)); - allocator_->free((void**)(&token_num_)); - - is_allocate_buffer_ = false; + if (is_allocate_buffer_) { + allocator_->free((void**)(&embed_buf_1_)); + allocator_->free((void**)(&embed_buf_2_)); + allocator_->free((void**)(&embed_buf_3_)); + allocator_->free((void**)(&mask_buf_)); + allocator_->free((void**)(&trt_mha_padding_offset_)); + allocator_->free((void**)(&seq_len_vec_)); + allocator_->free((void**)(&padding_offset_)); + check_cuda_error(cudaFreeHost(h_pinned_token_num_ptr_)); + is_allocate_buffer_ = false; + } } template @@ -369,6 +372,7 @@ void ViTTransformer::forward(std::vector* output_tensors, (float*)nullptr, (float*)nullptr, (float*)nullptr, + (float*)nullptr, 0, stream_); @@ -448,7 +452,7 @@ template void ViTTransformer::setDefaultPaddingOffset(size_t batch_size) { invokeGetPaddingOffset( - &nopad_token_num_, token_num_, padding_offset_, seq_len_vec_, batch_size, max_seq_len_, stream_); + h_pinned_token_num_ptr_, &nopad_token_num_, padding_offset_, seq_len_vec_, batch_size, max_seq_len_, stream_); } template diff --git a/src/fastertransformer/models/vit/ViT.h b/src/fastertransformer/models/vit/ViT.h index 2c4fc337a..33aa9d9b7 100644 --- a/src/fastertransformer/models/vit/ViT.h +++ b/src/fastertransformer/models/vit/ViT.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -85,7 +85,7 @@ class ViTTransformer: public BaseLayer { int* trt_mha_padding_offset_ = nullptr; int* seq_len_vec_ = nullptr; int* padding_offset_ = nullptr; - size_t* token_num_ = nullptr; + size_t* h_pinned_token_num_ptr_ = nullptr; public: ViTTransformer(size_t max_batch_size, diff --git a/src/fastertransformer/models/vit/ViTLayerWeight.h b/src/fastertransformer/models/vit/ViTLayerWeight.h index c2a3a21fa..bc3f08d78 100644 --- a/src/fastertransformer/models/vit/ViTLayerWeight.h +++ b/src/fastertransformer/models/vit/ViTLayerWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/vit/ViTWeight.h b/src/fastertransformer/models/vit/ViTWeight.h index 8343fd914..68622b6fb 100644 --- a/src/fastertransformer/models/vit/ViTWeight.h +++ b/src/fastertransformer/models/vit/ViTWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/vit/vit_gemm.cc b/src/fastertransformer/models/vit/vit_gemm.cc index 8e02d068e..53e5395cf 100644 --- a/src/fastertransformer/models/vit/vit_gemm.cc +++ b/src/fastertransformer/models/vit/vit_gemm.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/vit_int8/CMakeLists.txt b/src/fastertransformer/models/vit_int8/CMakeLists.txt index 24095c257..0677776d4 100644 --- a/src/fastertransformer/models/vit_int8/CMakeLists.txt +++ b/src/fastertransformer/models/vit_int8/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/vit_int8/ViTINT8.cc b/src/fastertransformer/models/vit_int8/ViTINT8.cc index 9cf2365eb..6ccd3c990 100644 --- a/src/fastertransformer/models/vit_int8/ViTINT8.cc +++ b/src/fastertransformer/models/vit_int8/ViTINT8.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -186,7 +186,7 @@ void ViTTransformerINT8::allocateBuffer() (T*)allocator_->reMalloc(mask_buf_, sizeof(T) * max_batch_size_ * max_seq_len_ * max_seq_len_, false); padding_offset_ = (int*)allocator_->reMalloc(padding_offset_, sizeof(int) * max_batch_size_ * max_seq_len_, false); - token_num_ = (size_t*)allocator_->reMalloc(token_num_, sizeof(size_t) * 1, false); + check_cuda_error(cudaMallocHost((void**)&h_pinned_token_num_ptr_, sizeof(size_t))); trt_mha_padding_offset_ = (int*)allocator_->reMalloc(trt_mha_padding_offset_, sizeof(int) * (2 * max_batch_size_ + 1), false); @@ -222,7 +222,9 @@ void ViTTransformerINT8::allocateBuffer(size_t batch_size) embed_buf_4_ = (T*)allocator_->reMalloc(embed_buf_4_, sizeof(T) * batch_size * max_seq_len_ * embed_dim_, false); mask_buf_ = (T*)allocator_->reMalloc(mask_buf_, sizeof(T) * batch_size * max_seq_len_ * max_seq_len_, false); REMALLOC(padding_offset_, sizeof(int) * batch_size * max_seq_len_); - REMALLOC(token_num_, sizeof(size_t) * 1); + if (!is_allocate_buffer_) { + check_cuda_error(cudaMallocHost((void**)&h_pinned_token_num_ptr_, sizeof(size_t))); + } trt_mha_padding_offset_ = (int*)allocator_->reMalloc(trt_mha_padding_offset_, sizeof(int) * (2 * batch_size + 1), false); seq_len_vec_ = (int*)allocator_->reMalloc(seq_len_vec_, sizeof(int) * batch_size, false); @@ -238,17 +240,19 @@ void ViTTransformerINT8::allocateBuffer(size_t batch_size) template void ViTTransformerINT8::freeBuffer() { - allocator_->free((void**)(&embed_buf_1_)); - allocator_->free((void**)(&embed_buf_2_)); - allocator_->free((void**)(&embed_buf_3_)); - allocator_->free((void**)(&embed_buf_4_)); - allocator_->free((void**)(&mask_buf_)); - allocator_->free((void**)(&trt_mha_padding_offset_)); - allocator_->free((void**)(&seq_len_vec_)); - allocator_->free((void**)(&padding_offset_)); - allocator_->free((void**)(&token_num_)); - - is_allocate_buffer_ = false; + if (is_allocate_buffer_) { + allocator_->free((void**)(&embed_buf_1_)); + allocator_->free((void**)(&embed_buf_2_)); + allocator_->free((void**)(&embed_buf_3_)); + allocator_->free((void**)(&embed_buf_4_)); + allocator_->free((void**)(&mask_buf_)); + allocator_->free((void**)(&trt_mha_padding_offset_)); + allocator_->free((void**)(&seq_len_vec_)); + allocator_->free((void**)(&padding_offset_)); + check_cuda_error(cudaFreeHost(h_pinned_token_num_ptr_)); + + is_allocate_buffer_ = false; + } } template @@ -483,7 +487,7 @@ template void ViTTransformerINT8::setDefaultPaddingOffset(size_t batch_size) { invokeGetPaddingOffset( - &nopad_token_num_, token_num_, padding_offset_, seq_len_vec_, batch_size, max_seq_len_, stream_); + h_pinned_token_num_ptr_, &nopad_token_num_, padding_offset_, seq_len_vec_, batch_size, max_seq_len_, stream_); } template diff --git a/src/fastertransformer/models/vit_int8/ViTINT8.h b/src/fastertransformer/models/vit_int8/ViTINT8.h index 7d91c0819..71cf4d769 100644 --- a/src/fastertransformer/models/vit_int8/ViTINT8.h +++ b/src/fastertransformer/models/vit_int8/ViTINT8.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -89,7 +89,7 @@ class ViTTransformerINT8: public BaseLayer { int* trt_mha_padding_offset_ = nullptr; int* seq_len_vec_ = nullptr; int* padding_offset_ = nullptr; - size_t* token_num_ = nullptr; + size_t* h_pinned_token_num_ptr_ = nullptr; public: ViTTransformerINT8(size_t max_batch_size, diff --git a/src/fastertransformer/models/vit_int8/ViTINT8Weight.h b/src/fastertransformer/models/vit_int8/ViTINT8Weight.h index 8768870f9..66501151c 100644 --- a/src/fastertransformer/models/vit_int8/ViTINT8Weight.h +++ b/src/fastertransformer/models/vit_int8/ViTINT8Weight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/vit_int8/ViTLayerINT8Weight.h b/src/fastertransformer/models/vit_int8/ViTLayerINT8Weight.h index 17598ff39..29b27bff9 100644 --- a/src/fastertransformer/models/vit_int8/ViTLayerINT8Weight.h +++ b/src/fastertransformer/models/vit_int8/ViTLayerINT8Weight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/wenet/CMakeLists.txt b/src/fastertransformer/models/wenet/CMakeLists.txt index 087f3f1cd..09d4f7a23 100755 --- a/src/fastertransformer/models/wenet/CMakeLists.txt +++ b/src/fastertransformer/models/wenet/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/wenet/ConformerConvLayer.cc b/src/fastertransformer/models/wenet/ConformerConvLayer.cc index c276c0938..2f63897b0 100644 --- a/src/fastertransformer/models/wenet/ConformerConvLayer.cc +++ b/src/fastertransformer/models/wenet/ConformerConvLayer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2022. Authored by Yuqing Ding. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/models/wenet/ConformerConvLayer.h b/src/fastertransformer/models/wenet/ConformerConvLayer.h index 6b073b846..5f241a836 100644 --- a/src/fastertransformer/models/wenet/ConformerConvLayer.h +++ b/src/fastertransformer/models/wenet/ConformerConvLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2022. Authored by Yuqing Ding. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/models/wenet/MultiHeadedAttentionLayer.cc b/src/fastertransformer/models/wenet/MultiHeadedAttentionLayer.cc index a17c7bc5c..b3e3abd48 100644 --- a/src/fastertransformer/models/wenet/MultiHeadedAttentionLayer.cc +++ b/src/fastertransformer/models/wenet/MultiHeadedAttentionLayer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2022. Authored by Yuqing Ding. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/models/wenet/MultiHeadedAttentionLayer.h b/src/fastertransformer/models/wenet/MultiHeadedAttentionLayer.h index 4aa54120a..efc015b2e 100644 --- a/src/fastertransformer/models/wenet/MultiHeadedAttentionLayer.h +++ b/src/fastertransformer/models/wenet/MultiHeadedAttentionLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2022. Authored by Yuqing Ding. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/models/wenet/RelPositionAttentionLayer.cc b/src/fastertransformer/models/wenet/RelPositionAttentionLayer.cc index 386648b5d..b7866a453 100644 --- a/src/fastertransformer/models/wenet/RelPositionAttentionLayer.cc +++ b/src/fastertransformer/models/wenet/RelPositionAttentionLayer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2022. Authored by Yuqing Ding. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/models/wenet/RelPositionAttentionLayer.h b/src/fastertransformer/models/wenet/RelPositionAttentionLayer.h index fa583bf02..e7772fc62 100644 --- a/src/fastertransformer/models/wenet/RelPositionAttentionLayer.h +++ b/src/fastertransformer/models/wenet/RelPositionAttentionLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2022. Authored by Yuqing Ding. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/models/wenet/WenetDecoder.cc b/src/fastertransformer/models/wenet/WenetDecoder.cc index 6d2315d9c..e212a4c53 100644 --- a/src/fastertransformer/models/wenet/WenetDecoder.cc +++ b/src/fastertransformer/models/wenet/WenetDecoder.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2022. Authored by Yuqing Ding. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/models/wenet/WenetDecoder.h b/src/fastertransformer/models/wenet/WenetDecoder.h index 8f2d637ca..52ac914b4 100644 --- a/src/fastertransformer/models/wenet/WenetDecoder.h +++ b/src/fastertransformer/models/wenet/WenetDecoder.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2022. Authored by Yuqing Ding. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/models/wenet/WenetDecoderLayerWeight.cc b/src/fastertransformer/models/wenet/WenetDecoderLayerWeight.cc index 32219a215..a2f399be2 100644 --- a/src/fastertransformer/models/wenet/WenetDecoderLayerWeight.cc +++ b/src/fastertransformer/models/wenet/WenetDecoderLayerWeight.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2022. Authored by Yuqing Ding. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/models/wenet/WenetDecoderLayerWeight.h b/src/fastertransformer/models/wenet/WenetDecoderLayerWeight.h index 590640c64..dad5103a3 100644 --- a/src/fastertransformer/models/wenet/WenetDecoderLayerWeight.h +++ b/src/fastertransformer/models/wenet/WenetDecoderLayerWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2022. Authored by Yuqing Ding. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/models/wenet/WenetDecoderWeight.cc b/src/fastertransformer/models/wenet/WenetDecoderWeight.cc index c7a21ef64..5c6fcd6e2 100644 --- a/src/fastertransformer/models/wenet/WenetDecoderWeight.cc +++ b/src/fastertransformer/models/wenet/WenetDecoderWeight.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2022. Authored by Yuqing Ding. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/models/wenet/WenetDecoderWeight.h b/src/fastertransformer/models/wenet/WenetDecoderWeight.h index c632be15b..9905e31fa 100644 --- a/src/fastertransformer/models/wenet/WenetDecoderWeight.h +++ b/src/fastertransformer/models/wenet/WenetDecoderWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2022. Authored by Yuqing Ding. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/models/wenet/WenetEncoder.cc b/src/fastertransformer/models/wenet/WenetEncoder.cc index 7ef94ba6f..d6093f224 100644 --- a/src/fastertransformer/models/wenet/WenetEncoder.cc +++ b/src/fastertransformer/models/wenet/WenetEncoder.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2022. Authored by Yuqing Ding. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/models/wenet/WenetEncoder.h b/src/fastertransformer/models/wenet/WenetEncoder.h index 627a435b3..8ba052a52 100644 --- a/src/fastertransformer/models/wenet/WenetEncoder.h +++ b/src/fastertransformer/models/wenet/WenetEncoder.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2022. Authored by Yuqing Ding. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/models/wenet/WenetEncoderLayerWeight.cc b/src/fastertransformer/models/wenet/WenetEncoderLayerWeight.cc index 7f643118f..899173bcd 100644 --- a/src/fastertransformer/models/wenet/WenetEncoderLayerWeight.cc +++ b/src/fastertransformer/models/wenet/WenetEncoderLayerWeight.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/wenet/WenetEncoderLayerWeight.h b/src/fastertransformer/models/wenet/WenetEncoderLayerWeight.h index 5ca4f9616..57b921327 100644 --- a/src/fastertransformer/models/wenet/WenetEncoderLayerWeight.h +++ b/src/fastertransformer/models/wenet/WenetEncoderLayerWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/wenet/WenetEncoderWeight.cc b/src/fastertransformer/models/wenet/WenetEncoderWeight.cc index 21867664e..0ef5e1376 100644 --- a/src/fastertransformer/models/wenet/WenetEncoderWeight.cc +++ b/src/fastertransformer/models/wenet/WenetEncoderWeight.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2022. Authored by Yuqing Ding. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/models/wenet/WenetEncoderWeight.h b/src/fastertransformer/models/wenet/WenetEncoderWeight.h index 82599823a..5194d38bc 100644 --- a/src/fastertransformer/models/wenet/WenetEncoderWeight.h +++ b/src/fastertransformer/models/wenet/WenetEncoderWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2022. Authored by Yuqing Ding. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/models/wenet/WenetKernels.cu b/src/fastertransformer/models/wenet/WenetKernels.cu index 6e24eeeec..1f8eb0706 100644 --- a/src/fastertransformer/models/wenet/WenetKernels.cu +++ b/src/fastertransformer/models/wenet/WenetKernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2022. Authored by Yuqing Ding. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/models/wenet/WenetKernels.h b/src/fastertransformer/models/wenet/WenetKernels.h index 652d16121..e17c8e6ca 100644 --- a/src/fastertransformer/models/wenet/WenetKernels.h +++ b/src/fastertransformer/models/wenet/WenetKernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2022. Authored by Yuqing Ding. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/models/wenet/wenet_gemm.cc b/src/fastertransformer/models/wenet/wenet_gemm.cc index df7a4860e..2451443b1 100644 --- a/src/fastertransformer/models/wenet/wenet_gemm.cc +++ b/src/fastertransformer/models/wenet/wenet_gemm.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/xlnet/CMakeLists.txt b/src/fastertransformer/models/xlnet/CMakeLists.txt index 2fcdf7571..e01872d1d 100644 --- a/src/fastertransformer/models/xlnet/CMakeLists.txt +++ b/src/fastertransformer/models/xlnet/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/xlnet/Xlnet.cc b/src/fastertransformer/models/xlnet/Xlnet.cc index 27811e3a9..b94b68c68 100644 --- a/src/fastertransformer/models/xlnet/Xlnet.cc +++ b/src/fastertransformer/models/xlnet/Xlnet.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/xlnet/Xlnet.h b/src/fastertransformer/models/xlnet/Xlnet.h index 56011d299..6455fb0b1 100644 --- a/src/fastertransformer/models/xlnet/Xlnet.h +++ b/src/fastertransformer/models/xlnet/Xlnet.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/xlnet/XlnetLayerWeight.h b/src/fastertransformer/models/xlnet/XlnetLayerWeight.h index 85a84ade8..b86c1e797 100644 --- a/src/fastertransformer/models/xlnet/XlnetLayerWeight.h +++ b/src/fastertransformer/models/xlnet/XlnetLayerWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/xlnet/xlnet_gemm.cc b/src/fastertransformer/models/xlnet/xlnet_gemm.cc index 92aa651ce..22932efa5 100644 --- a/src/fastertransformer/models/xlnet/xlnet_gemm.cc +++ b/src/fastertransformer/models/xlnet/xlnet_gemm.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tensorrt_plugin/CMakeLists.txt b/src/fastertransformer/tensorrt_plugin/CMakeLists.txt index f6c91ccfc..6d66cdfa0 100644 --- a/src/fastertransformer/tensorrt_plugin/CMakeLists.txt +++ b/src/fastertransformer/tensorrt_plugin/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -15,5 +15,8 @@ add_subdirectory(swin) add_subdirectory(t5) add_subdirectory(vit) +if(ENABLE_FP8) + add_subdirectory(bert_fp8) +endif() add_subdirectory(wenet) diff --git a/src/fastertransformer/tensorrt_plugin/bert_fp8/CMakeLists.txt b/src/fastertransformer/tensorrt_plugin/bert_fp8/CMakeLists.txt new file mode 100644 index 000000000..9829839cb --- /dev/null +++ b/src/fastertransformer/tensorrt_plugin/bert_fp8/CMakeLists.txt @@ -0,0 +1,30 @@ +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +cmake_minimum_required(VERSION 3.8) + +set(bert_fp8_trt_files + bertFp8Plugin.cu +) + +if(BUILD_TRT) + set(LIB_NAME "bert_fp8_plugin") + add_library(${LIB_NAME} SHARED ${bert_fp8_trt_files}) + set_target_properties(${LIB_NAME} PROPERTIES + CUDA_RESOLVE_DEVICE_SYMBOLS ON) + target_link_libraries(${LIB_NAME} BertFP8 BertFP8Weight activation_kernels activation_fp8_kernels + memory_utils layernorm_fp8_kernels cuda_fp8_utils bert_preprocess_kernels + FfnFP8Layer cublasFP8MMWrapper cublasMMWrapper cublasAlgoMap SelfAttentionFP8Layer + unfused_attention_fp8_kernels trt_fused_multi_head_attention nvtx_utils + fp8_qgmma_1x1_utils tensor -lcudnn -lcublas -lcudart -lnvinfer) +endif() diff --git a/src/fastertransformer/tensorrt_plugin/bert_fp8/bertFp8Plugin.cu b/src/fastertransformer/tensorrt_plugin/bert_fp8/bertFp8Plugin.cu new file mode 100644 index 000000000..897a5b7d8 --- /dev/null +++ b/src/fastertransformer/tensorrt_plugin/bert_fp8/bertFp8Plugin.cu @@ -0,0 +1,381 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include + +#define ENABLE_FP8 + +#include "bertFp8Plugin.h" + +#include "src/fastertransformer/utils/cuda_fp8_utils.h" +#include "src/fastertransformer/utils/cuda_utils.h" +#include "src/fastertransformer/utils/logger.h" +#include + +using namespace nvinfer1; +namespace ft = fastertransformer; + +namespace fastertransformer { + +REGISTER_TENSORRT_PLUGIN(BertFp8PluginCreator); + +BertFp8Plugin::BertFp8Plugin(BertFp8Config cfg, std::string weightDirPath): + mBertFp8Config(cfg), mWeightDirPath(weightDirPath) +{ +} + +// assume this is called ONCE PER GPU, via a deserializeCudaEngine() call from the client +// since BertFp8Weights::deserialize() copies weights to the current GPU's device memory +BertFp8Plugin::BertFp8Plugin(const void* data, size_t length) +{ + const uint8_t* tmp = (const uint8_t*)data; + mBertFp8Config = BertFp8Config(tmp); + const auto cfg = mBertFp8Config; + mBertWeights.reset(new ft::BertFP8Weight(cfg.hidden_units, + cfg.num_heads, + cfg.size_per_head, + cfg.intermediate_size, + cfg.num_layers, + cfg.vocab_size, + cfg.max_position_embeddings, + cfg.token_type_vocab_size, + 1, + 1, + cfg.fp8_mode, + true, + true)); + mBertWeights->deserialize(tmp); // copies weights to current GPU's device mem +} + +int BertFp8Plugin::initialize() noexcept +{ + if (mInitialized) { + return 0; + } + + const auto cfg = mBertFp8Config; + + // load weights directly from weightDirPath + // this should only be performed during engine build phase and then weights are serialized + // at runtime, deserialize() is called which will load a copy of these weights + if (mBertWeights == nullptr) { + mBertWeights.reset(new ft::BertFP8Weight(cfg.hidden_units, + cfg.num_heads, + cfg.size_per_head, + cfg.intermediate_size, + cfg.num_layers, + cfg.vocab_size, + cfg.max_position_embeddings, + cfg.token_type_vocab_size, + 1, + 1, + cfg.fp8_mode, + true, + true)); + + mBertWeights->loadModel(mWeightDirPath); + mBertWeights->transposeWeight(); + } + + mAllocator.reset(new ft::Allocator(ft::getDevice())); + mCublasCtx.reset(new CublasCtx(mAllocator.get())); + + ft::AttentionType attention_type = + ft::getAttentionType(cfg.size_per_head, ft::getSMVersion(), cfg.remove_padding, cfg.max_seq_len); + + mBertModel.reset(new ft::BertFP8(cfg.num_heads, + cfg.size_per_head, + cfg.hidden_units, + cfg.intermediate_size, + cfg.num_layers, + mTensorPara, + mPipelinePara, + ft::getSMVersion(), + 1.0f, + mCublasCtx->mStream, + mCublasCtx->mCublasWrapper.get(), + mAllocator.get(), + false, + attention_type, + false, + ft::ActivationType::Gelu, + ft::LayerNormType::post_layernorm, + cfg.fp8_mode)); + + mInitialized = true; + return 0; +} + +const char* BertFp8Plugin::getPluginType() const noexcept +{ + return "BertFp8Plugin"; +} + +const char* BertFp8Plugin::getPluginVersion() const noexcept +{ + return "1"; +} + +void BertFp8Plugin::setPluginNamespace(const char* libNamespace) noexcept +{ + mNamespace = libNamespace; +} + +const char* BertFp8Plugin::getPluginNamespace() const noexcept +{ + return mNamespace.c_str(); +} + +void BertFp8Plugin::destroy() noexcept +{ + delete this; +} + +IPluginV2DynamicExt* BertFp8Plugin::clone() const noexcept +{ + BertFp8Plugin* ret = new BertFp8Plugin(mBertFp8Config, mWeightDirPath); + ret->mBertWeights = mBertWeights; + ret->initialize(); + + return ret; +} + +void BertFp8Plugin::attachToContext(cudnnContext*, cublasContext*, IGpuAllocator*) noexcept +{ + // this->initialize(); +} + +int BertFp8Plugin::getNbOutputs() const noexcept +{ + return 1; +} + +DimsExprs BertFp8Plugin::getOutputDimensions(int outputIndex, + const DimsExprs* inputs, + int nbInputs, + IExprBuilder& exprBuilder) noexcept +{ + + FT_CHECK(outputIndex >= 0 && outputIndex < this->getNbOutputs()); + FT_CHECK(nbInputs == 3); + + DimsExprs output(inputs[0]); + output.nbDims = 3; + output.d[0] = inputs[0].d[0]; + output.d[1] = exprBuilder.constant(mBertFp8Config.max_seq_len); + output.d[2] = exprBuilder.constant(mBertFp8Config.hidden_units); + + return output; +} + +bool BertFp8Plugin::supportsFormatCombination(int pos, + const PluginTensorDesc* inOut, + int nbInputs, + int nbOutputs) noexcept +{ + if (inOut[pos].format != TensorFormat::kLINEAR) { + return false; + } + + if (nbInputs != 3 || nbOutputs != 1) { + printf("Wrong input or output count %d %d\n", nbInputs, nbOutputs); + return false; + } + + // inputs + if (pos == 0 && inOut[pos].type != nvinfer1::DataType::kINT32) { + return false; + } + if (pos == 1 && inOut[pos].type != nvinfer1::DataType::kINT32) { + return false; + } + if (pos == 2 && inOut[pos].type != nvinfer1::DataType::kINT32) { + return false; + } + + // outputs + if (pos == 3 && inOut[pos].type != nvinfer1::DataType::kHALF) { + return false; + } + + return true; +} + +void BertFp8Plugin::configurePlugin(const DynamicPluginTensorDesc* in, + int nbInputs, + const DynamicPluginTensorDesc* out, + int nbOutputs) noexcept +{ +} + +void BertFp8Plugin::terminate() noexcept {} + +size_t BertFp8Plugin::getWorkspaceSize(const PluginTensorDesc* inputs, + int nbInputs, + const PluginTensorDesc* outputs, + int nbOutputs) const noexcept +{ + return 0; +} + +int BertFp8Plugin::enqueue(const PluginTensorDesc* inputDesc, + const PluginTensorDesc* outputDesc, + const void* const* inputs, + void* const* outputs, + void* workspace, + cudaStream_t stream) noexcept +{ + int32_t batchSize = inputDesc[0].dims.d[0]; + int32_t maxSeqLenInBatch = inputDesc[0].dims.d[1]; + const int32_t* inputIds = static_cast(inputs[0]); + const int32_t* tokenTypeIds = static_cast(inputs[1]); + const int32_t* sequenceLengths = static_cast(inputs[2]); + + size_t batchSize_s = batchSize; + size_t maxSeqLen_s = maxSeqLenInBatch; + size_t hiddenUnits_s = mBertFp8Config.hidden_units; + + auto inputTensors = ft::TensorMap(std::unordered_map{ + {"input_ids", + ft::Tensor{ft::MEMORY_GPU, ft::TYPE_INT32, std::vector{batchSize_s, maxSeqLen_s}, inputIds}}, + {"sequence_lengths", + ft::Tensor{ft::MEMORY_GPU, ft::TYPE_INT32, std::vector{batchSize_s}, sequenceLengths}}, + {"token_type_ids", + ft::Tensor{ft::MEMORY_GPU, ft::TYPE_INT32, std::vector{batchSize_s, maxSeqLen_s}, tokenTypeIds}}}); + + auto outputTensors = ft::TensorMap(std::unordered_map{ + {"output_hidden_state", + ft::Tensor{ + ft::MEMORY_GPU, ft::getTensorType(), {batchSize_s, maxSeqLen_s, hiddenUnits_s}, outputs[0]}}}); + + FT_CHECK(cudaEventRecord(mSyncEvent.get(), stream) == cudaSuccess); + FT_CHECK(cudaStreamWaitEvent(mCublasCtx->mStream, mSyncEvent.get(), 0) == cudaSuccess); + + mBertModel->forward(&outputTensors, &inputTensors, mBertWeights.get()); + + FT_CHECK(cudaEventRecord(mSyncEvent.get(), mCublasCtx->mStream) == cudaSuccess); + FT_CHECK(cudaStreamWaitEvent(stream, mSyncEvent.get(), 0) == cudaSuccess); + + return 0; +} + +size_t BertFp8Plugin::getSerializationSize() const noexcept +{ + auto sz = mBertWeights->getSerializationSize(); + sz += mBertFp8Config.getSerializationSize(); + return sz; +} + +void BertFp8Plugin::serialize(void* buffer) const noexcept +{ + uint8_t* tmp = (uint8_t*)buffer; + mBertFp8Config.serialize(tmp); + mBertWeights->serialize(tmp); +} + +nvinfer1::DataType +BertFp8Plugin::getOutputDataType(int index, const nvinfer1::DataType* inputTypes, int nbInputs) const noexcept +{ + return nvinfer1::DataType::kHALF; +} + +const char* BertFp8PluginCreator::getPluginName() const noexcept +{ + return "BertFp8Plugin"; +} + +const char* BertFp8PluginCreator::getPluginVersion() const noexcept +{ + return "1"; +} + +const PluginFieldCollection* BertFp8PluginCreator::getFieldNames() noexcept +{ + return nullptr; +} + +void BertFp8PluginCreator::setPluginNamespace(const char* libNamespace) noexcept +{ + mNamespace = libNamespace; +} + +const char* BertFp8PluginCreator::getPluginNamespace() const noexcept +{ + return mNamespace.c_str(); +} + +IPluginV2DynamicExt* BertFp8PluginCreator::createPlugin(const char* name, const PluginFieldCollection* fc) noexcept +{ + int32_t num_heads; + int32_t size_per_head; + int32_t num_layers; + int32_t max_seq_len; + int32_t vocab_size; + int32_t max_position_embeddings; + int32_t token_type_vocab_size; + int32_t remove_padding; + int32_t fp8_mode; + + std::map name2pint = {{"num_heads", &num_heads}, + {"size_per_head", &size_per_head}, + {"num_layers", &num_layers}, + {"max_seq_len", &max_seq_len}, + {"vocab_size", &vocab_size}, + {"max_position_embeddings", &max_position_embeddings}, + {"token_type_vocab_size", &token_type_vocab_size}, + {"remove_padding", &remove_padding}, + {"fp8_mode", &fp8_mode}}; + + size_t found = 0; + std::for_each(fc->fields, fc->fields + fc->nbFields, [&name2pint, &found](const auto& f) { + auto iter = name2pint.find(f.name); + if (iter != name2pint.end()) { + *(iter->second) = *(int32_t*)f.data; + found++; + } + }); + + std::string weightDirPath; + std::map name2pstr = {{"weightDirPath", &weightDirPath}}; + + std::for_each(fc->fields, fc->fields + fc->nbFields, [&name2pstr, &found](const auto& f) { + auto iter = name2pstr.find(f.name); + if (iter != name2pstr.end()) { + *(iter->second) = std::string((const char*)f.data, f.length); + found++; + } + }); + + FT_CHECK(found == name2pint.size() + name2pstr.size()); + + BertFp8Config cfg{num_heads, + size_per_head, + num_layers, + max_seq_len, + vocab_size, + max_position_embeddings, + token_type_vocab_size, + remove_padding, + fp8_mode}; + return new BertFp8Plugin(cfg, weightDirPath); +} + +IPluginV2DynamicExt* +BertFp8PluginCreator::deserializePlugin(const char* name, const void* serialData, size_t serialLength) noexcept +{ + return new BertFp8Plugin(serialData, serialLength); +} +} // namespace fastertransformer diff --git a/src/fastertransformer/tensorrt_plugin/bert_fp8/bertFp8Plugin.h b/src/fastertransformer/tensorrt_plugin/bert_fp8/bertFp8Plugin.h new file mode 100644 index 000000000..a52901e9a --- /dev/null +++ b/src/fastertransformer/tensorrt_plugin/bert_fp8/bertFp8Plugin.h @@ -0,0 +1,273 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#define ENABLE_FP8 + +#include "NvInferPlugin.h" +#include +#include +#include + +#include "cuda_runtime.h" +#include "cuda_runtime_api.h" + +#include +#include + +#include +#include + +#include "src/fastertransformer/models/bert_fp8/BertFP8.h" + +namespace fastertransformer { + +using bf16_t = __nv_bfloat16; +using fp8_t = __nv_fp8_e4m3; + +struct CublasCtx { + cudaStream_t mStream; + cublasHandle_t mCublasHandle; + cublasLtHandle_t mCublasLtHandle; + std::unique_ptr mCublasWrapper; + std::unique_ptr mCublasAlgoMap; + std::mutex mCublasWrapperMutex; + + CublasCtx(fastertransformer::Allocator* allocator) + { + cudaStreamCreate(&mStream); + cublasCreate(&mCublasHandle); + cublasLtCreate(&mCublasLtHandle); + cublasSetStream(mCublasHandle, mStream); + mCublasAlgoMap.reset(new fastertransformer::cublasAlgoMap("gemm_config.in", "")); + mCublasWrapper.reset(new fastertransformer::cublasFP8MMWrapper( + mCublasHandle, mCublasLtHandle, mStream, mCublasAlgoMap.get(), &mCublasWrapperMutex, allocator)); + } + + ~CublasCtx() + { + cudaStreamDestroy(mStream); + cublasDestroy(mCublasHandle); + cublasLtDestroy(mCublasLtHandle); + } +}; + +struct ScopedCudaEvent { + ScopedCudaEvent() + { + FT_CHECK(cudaEventCreate(&mCudaEvent) == cudaSuccess); + } + ~ScopedCudaEvent() + { + FT_CHECK(cudaEventDestroy(mCudaEvent) == cudaSuccess); + } + cudaEvent_t get() + { + return mCudaEvent; + } + + cudaEvent_t mCudaEvent; +}; + +template +void write(uint8_t*& buffer, const T& val) +{ + *reinterpret_cast(buffer) = val; + buffer += sizeof(T); +} + +template +void read(const uint8_t*& buffer, T& val) +{ + val = *reinterpret_cast(buffer); + buffer += sizeof(T); +} + +struct BertFp8Config { + BertFp8Config() = default; + + BertFp8Config(int32_t num_heads, + int32_t size_per_head, + int32_t num_layers, + int32_t max_seq_len, + int32_t vocab_size, + int32_t max_position_embeddings, + int32_t token_type_vocab_size, + int32_t remove_padding, + int32_t fp8_mode): + num_heads(num_heads), + size_per_head(size_per_head), + num_layers(num_layers), + max_seq_len(max_seq_len), + vocab_size(vocab_size), + max_position_embeddings(max_position_embeddings), + token_type_vocab_size(token_type_vocab_size), + remove_padding(remove_padding), + fp8_mode(fp8_mode), + hidden_units(num_heads * size_per_head), + intermediate_size(4 * hidden_units) + { + } + + BertFp8Config(const uint8_t*& buffer) + { + read(buffer, num_heads); + read(buffer, size_per_head); + read(buffer, num_layers); + read(buffer, max_seq_len); + read(buffer, vocab_size); + read(buffer, max_position_embeddings); + read(buffer, token_type_vocab_size); + read(buffer, remove_padding); + read(buffer, fp8_mode); + hidden_units = num_heads * size_per_head; + intermediate_size = 4 * hidden_units; + } + + void serialize(uint8_t*& buffer) const + { + write(buffer, num_heads); + write(buffer, size_per_head); + write(buffer, num_layers); + write(buffer, max_seq_len); + write(buffer, vocab_size); + write(buffer, max_position_embeddings); + write(buffer, token_type_vocab_size); + write(buffer, remove_padding); + write(buffer, fp8_mode); + } + + size_t getSerializationSize() const + { + return 9 * sizeof(int32_t); + } + + int32_t num_heads; + int32_t size_per_head; + int32_t num_layers; + int32_t max_seq_len; + int32_t vocab_size; + int32_t max_position_embeddings; + int32_t token_type_vocab_size; + int32_t remove_padding; + int32_t fp8_mode; + int32_t hidden_units; + int32_t intermediate_size; +}; + +class BertFp8Plugin: public nvinfer1::IPluginV2DynamicExt { +public: + BertFp8Plugin(BertFp8Config cfg, std::string weightDirPath); + BertFp8Plugin(const nvinfer1::PluginFieldCollection* fc); + BertFp8Plugin(const void* data, size_t length); + ~BertFp8Plugin() noexcept override = default; + + // IPluginV2Ext fields + const char* getPluginType() const noexcept override; + const char* getPluginVersion() const noexcept override; + void setPluginNamespace(const char* libNamespace) noexcept override; + const char* getPluginNamespace() const noexcept override; + void destroy() noexcept override; + int getNbOutputs() const noexcept override; + int initialize() noexcept override; + virtual void terminate() noexcept override; + size_t getSerializationSize() const noexcept override; + void serialize(void* buffer) const noexcept override; + nvinfer1::DataType + getOutputDataType(int index, const nvinfer1::DataType* inputTypes, int nbInputs) const noexcept override; + + // IPluginV2Ext fields + nvinfer1::IPluginV2DynamicExt* clone() const noexcept override; + void configurePlugin(const nvinfer1::DynamicPluginTensorDesc* in, + int nbInputs, + const nvinfer1::DynamicPluginTensorDesc* out, + int nbOutputs) noexcept override; + bool supportsFormatCombination(int pos, + const nvinfer1::PluginTensorDesc* inOut, + int nbInputs, + int nbOutputs) noexcept override; + nvinfer1::DimsExprs getOutputDimensions(int outputIndex, + const nvinfer1::DimsExprs* inputs, + int nbInputs, + nvinfer1::IExprBuilder& exprBuilder) noexcept override; + virtual size_t getWorkspaceSize(const nvinfer1::PluginTensorDesc* inputs, + int nbInputs, + const nvinfer1::PluginTensorDesc* outputs, + int nbOutputs) const noexcept override; + virtual int enqueue(const nvinfer1::PluginTensorDesc* inputDesc, + const nvinfer1::PluginTensorDesc* outputDesc, + const void* const* inputs, + void* const* outputs, + void* workspace, + cudaStream_t stream) noexcept override; + + virtual void attachToContext(cudnnContext*, cublasContext*, nvinfer1::IGpuAllocator*) noexcept override; + + void initModel(); + + template + void write(char*& buffer, const T& val) const; + + template + void read(const char*& buffer, T& val) const; + +private: + // create in constructor + BertFp8Config mBertFp8Config; + fastertransformer::NcclParam mTensorPara; + fastertransformer::NcclParam mPipelinePara; + std::string mWeightDirPath; + ScopedCudaEvent mSyncEvent; + bool mInitialized{false}; + bool mModelCreated{false}; + std::string mNamespace; + + // defer creation until initialize() + std::unique_ptr> mAllocator; + std::unique_ptr mCublasCtx; // needs to be destroyed before mAllocator + // can share weights among different execution contexts + std::shared_ptr> mBertWeights; + std::unique_ptr> mBertModel; +}; + +class BertFp8PluginCreator: public nvinfer1::IPluginCreator { +public: + BertFp8PluginCreator() = default; + + ~BertFp8PluginCreator() override = default; + + const char* getPluginName() const noexcept override; + + const char* getPluginVersion() const noexcept override; + + const nvinfer1::PluginFieldCollection* getFieldNames() noexcept override; + + void setPluginNamespace(const char* libNamespace) noexcept override; + + const char* getPluginNamespace() const noexcept override; + + nvinfer1::IPluginV2DynamicExt* createPlugin(const char* name, + const nvinfer1::PluginFieldCollection* fc) noexcept override; + + nvinfer1::IPluginV2DynamicExt* + deserializePlugin(const char* name, const void* serialData, size_t serialLength) noexcept override; + +private: + std::string mNamespace; +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/tensorrt_plugin/swin/CMakeLists.txt b/src/fastertransformer/tensorrt_plugin/swin/CMakeLists.txt index f9ac23a63..6904beca5 100644 --- a/src/fastertransformer/tensorrt_plugin/swin/CMakeLists.txt +++ b/src/fastertransformer/tensorrt_plugin/swin/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tensorrt_plugin/swin/serialize.hpp b/src/fastertransformer/tensorrt_plugin/swin/serialize.hpp index 9b79e9b3e..94fe85fcc 100644 --- a/src/fastertransformer/tensorrt_plugin/swin/serialize.hpp +++ b/src/fastertransformer/tensorrt_plugin/swin/serialize.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tensorrt_plugin/swin/swinTransformerINT8Plugin.cpp b/src/fastertransformer/tensorrt_plugin/swin/swinTransformerINT8Plugin.cpp index 90849eed7..62080bde8 100644 --- a/src/fastertransformer/tensorrt_plugin/swin/swinTransformerINT8Plugin.cpp +++ b/src/fastertransformer/tensorrt_plugin/swin/swinTransformerINT8Plugin.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tensorrt_plugin/swin/swinTransformerINT8Plugin.h b/src/fastertransformer/tensorrt_plugin/swin/swinTransformerINT8Plugin.h index 2d515490e..5a5a17b2c 100644 --- a/src/fastertransformer/tensorrt_plugin/swin/swinTransformerINT8Plugin.h +++ b/src/fastertransformer/tensorrt_plugin/swin/swinTransformerINT8Plugin.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tensorrt_plugin/swin/swinTransformerPlugin.cpp b/src/fastertransformer/tensorrt_plugin/swin/swinTransformerPlugin.cpp index e9ba69b5c..7c35efabc 100644 --- a/src/fastertransformer/tensorrt_plugin/swin/swinTransformerPlugin.cpp +++ b/src/fastertransformer/tensorrt_plugin/swin/swinTransformerPlugin.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tensorrt_plugin/swin/swinTransformerPlugin.h b/src/fastertransformer/tensorrt_plugin/swin/swinTransformerPlugin.h index e6146f36f..6e832564b 100644 --- a/src/fastertransformer/tensorrt_plugin/swin/swinTransformerPlugin.h +++ b/src/fastertransformer/tensorrt_plugin/swin/swinTransformerPlugin.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tensorrt_plugin/t5/CMakeLists.txt b/src/fastertransformer/tensorrt_plugin/t5/CMakeLists.txt index e87020eee..e0223375b 100644 --- a/src/fastertransformer/tensorrt_plugin/t5/CMakeLists.txt +++ b/src/fastertransformer/tensorrt_plugin/t5/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tensorrt_plugin/t5/README.md b/src/fastertransformer/tensorrt_plugin/t5/README.md index 0f82f0e83..152eebd5e 100644 --- a/src/fastertransformer/tensorrt_plugin/t5/README.md +++ b/src/fastertransformer/tensorrt_plugin/t5/README.md @@ -1,4 +1,6 @@ # T5Plugin in FasterTransformer ++ Original Faster Transformer: [link](https://github.com/NVIDIA/FasterTransformer#model-overview) ++ Newest Version: [link](https://github.com/NVIDIA/FasterTransformer) + This project aims to wapper the encoder and decoding parts of the faster transformer as TensoRT plugins respectively. The most of the code file are from original Faster TRansformer project. ## Environment diff --git a/src/fastertransformer/tensorrt_plugin/t5/T5Plugin.cu b/src/fastertransformer/tensorrt_plugin/t5/T5Plugin.cu index 6114b6a73..84f4c62f6 100644 --- a/src/fastertransformer/tensorrt_plugin/t5/T5Plugin.cu +++ b/src/fastertransformer/tensorrt_plugin/t5/T5Plugin.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -317,6 +317,7 @@ T5EncoderPlugin::T5EncoderPlugin(const std::string& name, const void* buffer, si new cublasMMWrapper(cublasHandle_, cublasltHandle_, 0, pCublasAlgoMap_, pCublasWrapperMutex_, pAllocator_); m_.is_sparse = false; #endif + if (m_.useFP16) { pCublasWrapper_->setFP16GemmConfig(); @@ -996,6 +997,8 @@ T5DecodingPlugin::T5DecodingPlugin(const std::string& name, const void* buffer, pCublasWrapper_ = new cublasMMWrapper(cublasHandle_, cublasltHandle_, 0, pCublasAlgoMap_, pCublasWrapperMutex_, pAllocator_); + NcclParam tensor_para; + NcclParam pipeline_para; if (m_.useFP16) { pCublasWrapper_->setFP16GemmConfig(); diff --git a/src/fastertransformer/tensorrt_plugin/t5/T5Plugin.h b/src/fastertransformer/tensorrt_plugin/t5/T5Plugin.h index 8190a4f64..4fe86eb42 100644 --- a/src/fastertransformer/tensorrt_plugin/t5/T5Plugin.h +++ b/src/fastertransformer/tensorrt_plugin/t5/T5Plugin.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tensorrt_plugin/t5/T5PluginGemm.cc b/src/fastertransformer/tensorrt_plugin/t5/T5PluginGemm.cc index 088df65a3..a6c7908c2 100644 --- a/src/fastertransformer/tensorrt_plugin/t5/T5PluginGemm.cc +++ b/src/fastertransformer/tensorrt_plugin/t5/T5PluginGemm.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tensorrt_plugin/t5/T5PluginGemm.h b/src/fastertransformer/tensorrt_plugin/t5/T5PluginGemm.h index f52d512b4..f3086c1f6 100644 --- a/src/fastertransformer/tensorrt_plugin/t5/T5PluginGemm.h +++ b/src/fastertransformer/tensorrt_plugin/t5/T5PluginGemm.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tensorrt_plugin/vit/CMakeLists.txt b/src/fastertransformer/tensorrt_plugin/vit/CMakeLists.txt index 6f8a106a8..acad25233 100644 --- a/src/fastertransformer/tensorrt_plugin/vit/CMakeLists.txt +++ b/src/fastertransformer/tensorrt_plugin/vit/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tensorrt_plugin/vit/ViTINT8Plugin.cpp b/src/fastertransformer/tensorrt_plugin/vit/ViTINT8Plugin.cpp index 689887105..3c8959adc 100644 --- a/src/fastertransformer/tensorrt_plugin/vit/ViTINT8Plugin.cpp +++ b/src/fastertransformer/tensorrt_plugin/vit/ViTINT8Plugin.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tensorrt_plugin/vit/ViTINT8Plugin.h b/src/fastertransformer/tensorrt_plugin/vit/ViTINT8Plugin.h index 60d822dc5..7e5d0b1a3 100644 --- a/src/fastertransformer/tensorrt_plugin/vit/ViTINT8Plugin.h +++ b/src/fastertransformer/tensorrt_plugin/vit/ViTINT8Plugin.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tensorrt_plugin/vit/ViTPlugin.cpp b/src/fastertransformer/tensorrt_plugin/vit/ViTPlugin.cpp index f42437731..a8d7bb478 100644 --- a/src/fastertransformer/tensorrt_plugin/vit/ViTPlugin.cpp +++ b/src/fastertransformer/tensorrt_plugin/vit/ViTPlugin.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tensorrt_plugin/vit/ViTPlugin.h b/src/fastertransformer/tensorrt_plugin/vit/ViTPlugin.h index 5ae70ccc8..2e3fc9471 100644 --- a/src/fastertransformer/tensorrt_plugin/vit/ViTPlugin.h +++ b/src/fastertransformer/tensorrt_plugin/vit/ViTPlugin.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tensorrt_plugin/wenet/CMakeLists.txt b/src/fastertransformer/tensorrt_plugin/wenet/CMakeLists.txt index 66d6868d2..fd6d28de7 100755 --- a/src/fastertransformer/tensorrt_plugin/wenet/CMakeLists.txt +++ b/src/fastertransformer/tensorrt_plugin/wenet/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tensorrt_plugin/wenet/DecoderPlugin.cc b/src/fastertransformer/tensorrt_plugin/wenet/DecoderPlugin.cc index 2319f088e..4c027e213 100644 --- a/src/fastertransformer/tensorrt_plugin/wenet/DecoderPlugin.cc +++ b/src/fastertransformer/tensorrt_plugin/wenet/DecoderPlugin.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2022. Authored by Yuqing Ding. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/tensorrt_plugin/wenet/DecoderPlugin.h b/src/fastertransformer/tensorrt_plugin/wenet/DecoderPlugin.h index 979ec7a1b..b932f044b 100755 --- a/src/fastertransformer/tensorrt_plugin/wenet/DecoderPlugin.h +++ b/src/fastertransformer/tensorrt_plugin/wenet/DecoderPlugin.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2022. Authored by Yuqing Ding. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/tensorrt_plugin/wenet/EncoderPlugin.cc b/src/fastertransformer/tensorrt_plugin/wenet/EncoderPlugin.cc index 1d6ec82ca..2b4736e7f 100644 --- a/src/fastertransformer/tensorrt_plugin/wenet/EncoderPlugin.cc +++ b/src/fastertransformer/tensorrt_plugin/wenet/EncoderPlugin.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2022. Authored by Yuqing Ding. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/tensorrt_plugin/wenet/EncoderPlugin.h b/src/fastertransformer/tensorrt_plugin/wenet/EncoderPlugin.h index 5b8db63a0..6a2bf712a 100755 --- a/src/fastertransformer/tensorrt_plugin/wenet/EncoderPlugin.h +++ b/src/fastertransformer/tensorrt_plugin/wenet/EncoderPlugin.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2022. Authored by Yuqing Ding. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/tf_op/BaseOp.h b/src/fastertransformer/tf_op/BaseOp.h index 72b3257f6..6f5a67a43 100644 --- a/src/fastertransformer/tf_op/BaseOp.h +++ b/src/fastertransformer/tf_op/BaseOp.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tf_op/CMakeLists.txt b/src/fastertransformer/tf_op/CMakeLists.txt index 9987ce954..6650a32ed 100644 --- a/src/fastertransformer/tf_op/CMakeLists.txt +++ b/src/fastertransformer/tf_op/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -38,4 +38,5 @@ endif() if(BUILD_TF2) add_subdirectory(t5) + add_subdirectory(deberta) endif() \ No newline at end of file diff --git a/src/fastertransformer/tf_op/bert/BertINT8Op.cc b/src/fastertransformer/tf_op/bert/BertINT8Op.cc index 25f4cb342..9141f0377 100644 --- a/src/fastertransformer/tf_op/bert/BertINT8Op.cc +++ b/src/fastertransformer/tf_op/bert/BertINT8Op.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tf_op/bert/BertOp.cc b/src/fastertransformer/tf_op/bert/BertOp.cc index 42edec52b..85a2d2efd 100644 --- a/src/fastertransformer/tf_op/bert/BertOp.cc +++ b/src/fastertransformer/tf_op/bert/BertOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tf_op/bert/CMakeLists.txt b/src/fastertransformer/tf_op/bert/CMakeLists.txt index dfa2ae389..cec908cdb 100644 --- a/src/fastertransformer/tf_op/bert/CMakeLists.txt +++ b/src/fastertransformer/tf_op/bert/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tf_op/bert/weight_quantize_op.cc b/src/fastertransformer/tf_op/bert/weight_quantize_op.cc index 7a3461b7b..03b896731 100644 --- a/src/fastertransformer/tf_op/bert/weight_quantize_op.cc +++ b/src/fastertransformer/tf_op/bert/weight_quantize_op.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tf_op/deberta/CMakeLists.txt b/src/fastertransformer/tf_op/deberta/CMakeLists.txt new file mode 100644 index 000000000..e8f48408e --- /dev/null +++ b/src/fastertransformer/tf_op/deberta/CMakeLists.txt @@ -0,0 +1,16 @@ +# Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +add_library(tf_deberta SHARED DebertaOp.cc) +target_link_libraries(tf_deberta PRIVATE Deberta ${tf_link} -lcublas -lcublasLt -lcudart cublasAlgoMap) diff --git a/src/fastertransformer/tf_op/deberta/DebertaOp.cc b/src/fastertransformer/tf_op/deberta/DebertaOp.cc new file mode 100644 index 000000000..8cf7ad5aa --- /dev/null +++ b/src/fastertransformer/tf_op/deberta/DebertaOp.cc @@ -0,0 +1,308 @@ +/* + * Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/models/deberta/Deberta.h" +#include "src/fastertransformer/tf_op/BaseOp.h" + +namespace ft = fastertransformer; +namespace tf = tensorflow; + +using CPUDevice = Eigen::ThreadPoolDevice; +using GPUDevice = Eigen::GpuDevice; + +REGISTER_OP("Deberta") + .Input("from_tensor: int32") + .Input("sequence_length: int32") + .Input("word_embedding_table: T") + .Input("word_embedding_layernorm_gamma: T") + .Input("word_embedding_layernorm_beta: T") + .Input("relative_embedding_table: T") + .Input("relative_embedding_layernorm_gamma: T") + .Input("relative_embedding_layernorm_beta: T") + .Input("attn_q_kernel: N * T") + .Input("attn_q_bias: N * T") + .Input("attn_k_kernel: N * T") + .Input("attn_k_bias: N * T") + .Input("attn_v_kernel: N * T") + .Input("attn_v_bias: N * T") + .Input("attn_output_kernel: N * T") + .Input("attn_output_bias: N * T") + .Input("attn_output_layernorm_gamma: N * T") + .Input("attn_output_layernorm_beta: N * T") + .Input("inter_kernel: N * T") + .Input("inter_bias: N * T") + .Input("output_kernel: N * T") + .Input("output_bias: N * T") + .Input("output_layernorm_gamma: N * T") + .Input("output_layernorm_beta: N * T") + .Output("output: T") + .Attr("N: int") + .Attr("T: {float, half}") + .Attr("head_num: int >= 1") + .Attr("size_per_head: int >= 1") + .Attr("max_relative_positions: int >= 1") + .Attr("relative_position_buckets: int >= 1") + .Attr("inter_size: int >= 1") + .Attr("num_layer: int >= 1") + .Attr("remove_padding: bool") + .Attr("q_scaling: float") + .SetShapeFn([](tf::shape_inference::InferenceContext* c) { + int head_num, size_per_head; + c->GetAttr("head_num", &head_num); + c->GetAttr("size_per_head", &size_per_head); + + int rank = c->Rank(c->input(0)); + assert(rank == 2); + + // calculate batch size and sequence length from input + tf::shape_inference::DimensionHandle batch_dim = c->Dim(c->input(0), 0); + tf::shape_inference::DimensionHandle from_seq_len = c->Dim(c->input(0), 1); + + c->set_output(0, c->MakeShape({batch_dim, from_seq_len, head_num * size_per_head})); + + return tf::Status::OK(); + }); + +template +class TFTraits; + +template<> +class TFTraits { +public: + typedef float DataType; +}; + +template<> +class TFTraits { +public: + typedef half DataType; +}; + +#ifdef ENABLE_BF16 +template<> +class TFTraits { +public: + typedef __nv_bfloat16 DataType; +}; +#endif + +template +class DebertaOp: public BaseOp { +public: + explicit DebertaOp(tf::OpKernelConstruction* context): BaseOp(context) + { + try { + OP_REQUIRES_OK(context, context->GetAttr("head_num", &head_num_)); + OP_REQUIRES_OK(context, context->GetAttr("size_per_head", &size_per_head_)); + OP_REQUIRES_OK(context, context->GetAttr("max_relative_positions", &max_relative_positions_)); + OP_REQUIRES_OK(context, context->GetAttr("relative_position_buckets", &relative_position_buckets_)); + OP_REQUIRES_OK(context, context->GetAttr("inter_size", &inter_size_)); + OP_REQUIRES_OK(context, context->GetAttr("num_layer", &num_layer_)); + OP_REQUIRES_OK(context, context->GetAttr("remove_padding", &remove_padding_)); + OP_REQUIRES_OK(context, context->GetAttr("q_scaling", &q_scaling_)); + cublas_algo_map_ = new ft::cublasAlgoMap("gemm_config.in"); + } + catch (std::runtime_error& error) { + OP_REQUIRES(context, false, tf::errors::Internal(error.what())); + } + } + + ~DebertaOp() + { + delete cublas_algo_map_; + } + + void Compute(tf::OpKernelContext* context) override + { + // input_tensors: + // [0] input_ids [batch, seqlen] + // [1] sequence_lengths [batch] + // [2] ~ [7] word embedding + layernorm weights & relative embedding + layernorm weights + // [...] 16 * L, 16 layer weights per each L encoder layers + // output tensors: + // output_hidden_state [batch, seqlen, hidden] + + OP_REQUIRES(context, + context->num_inputs() == 2 + 6 + (num_layer_ * 16), + tf::errors::InvalidArgument("[ERROR] More or Less input arguments")); + + const size_t batch_size_ = (size_t)context->input(0).dim_size(0); + const size_t from_seq_len_ = (size_t)context->input(0).dim_size(1); + + OP_REQUIRES(context, + batch_size_ == (size_t)context->input(1).dim_size(0), + tf::errors::InvalidArgument("[ERROR] invalid shape")); + + const cudaStream_t& stream = context->eigen_device().stream(); + cublasHandle_t cublas_handle = this->get_cublas_handler(); + cublasSetStream(cublas_handle, stream); + ft::Allocator allocator(context, stream); + ft::cublasMMWrapper cublas_wrapper = ft::cublasMMWrapper(cublas_handle, + this->get_cublaslt_handler(), + stream, + cublas_algo_map_, + this->get_cublas_wrapper_mutex(), + &allocator); + + if (std::is_same::value) { + cublas_wrapper.setFP16GemmConfig(); + } +#ifdef ENABLE_BF16 + else if (std::is_same::value) { + cublas_wrapper.setBF16GemmConfig(); + } +#endif + else if (std::is_same::value) { + cublas_wrapper.setFP32GemmConfig(); + } + + ft::DebertaWeight + deberta_weights; // tensor managed by TF, so only overwrite data pointers of the object. is_maintain_buffer + // is by default false, so destructor won't be called later + deberta_weights.deberta_layer_weights.resize(num_layer_); + + // Model-level weights + this->get_tensor(context, 2, &deberta_weights.word_embedding_table); + this->get_tensor(context, 3, &deberta_weights.word_embedding_layernorm_weights.gamma); + this->get_tensor(context, 4, &deberta_weights.word_embedding_layernorm_weights.beta); + this->get_tensor(context, 5, &deberta_weights.relative_embedding_table); + this->get_tensor(context, 6, &deberta_weights.relative_embedding_layernorm_weights.gamma); + this->get_tensor(context, 7, &deberta_weights.relative_embedding_layernorm_weights.beta); + + // Layer-level weights + for (int i = 0; i < num_layer_; i++) { + this->get_tensor( + context, 8 + i, &deberta_weights.deberta_layer_weights[i].attention_weights.query_weight.kernel); + this->get_tensor(context, + 8 + num_layer_ + i, + &deberta_weights.deberta_layer_weights[i].attention_weights.query_weight.bias); + this->get_tensor(context, + 8 + num_layer_ * 2 + i, + &deberta_weights.deberta_layer_weights[i].attention_weights.key_weight.kernel); + this->get_tensor(context, + 8 + num_layer_ * 3 + i, + &deberta_weights.deberta_layer_weights[i].attention_weights.key_weight.bias); + this->get_tensor(context, + 8 + num_layer_ * 4 + i, + &deberta_weights.deberta_layer_weights[i].attention_weights.value_weight.kernel); + this->get_tensor(context, + 8 + num_layer_ * 5 + i, + &deberta_weights.deberta_layer_weights[i].attention_weights.value_weight.bias); + this->get_tensor( + context, + 8 + num_layer_ * 6 + i, + &deberta_weights.deberta_layer_weights[i].attention_weights.attention_output_weight.kernel); + this->get_tensor(context, + 8 + num_layer_ * 7 + i, + &deberta_weights.deberta_layer_weights[i].attention_weights.attention_output_weight.bias); + + this->get_tensor(context, + 8 + num_layer_ * 8 + i, + &deberta_weights.deberta_layer_weights[i].attn_layernorm_weights.gamma); + this->get_tensor( + context, 8 + num_layer_ * 9 + i, &deberta_weights.deberta_layer_weights[i].attn_layernorm_weights.beta); + this->get_tensor(context, + 8 + num_layer_ * 10 + i, + &deberta_weights.deberta_layer_weights[i].ffn_weights.intermediate_weight.kernel); + this->get_tensor(context, + 8 + num_layer_ * 11 + i, + &deberta_weights.deberta_layer_weights[i].ffn_weights.intermediate_weight.bias); + this->get_tensor(context, + 8 + num_layer_ * 12 + i, + &deberta_weights.deberta_layer_weights[i].ffn_weights.output_weight.kernel); + this->get_tensor(context, + 8 + num_layer_ * 13 + i, + &deberta_weights.deberta_layer_weights[i].ffn_weights.output_weight.bias); + this->get_tensor(context, + 8 + num_layer_ * 14 + i, + &deberta_weights.deberta_layer_weights[i].ffn_layernorm_weights.gamma); + this->get_tensor( + context, 8 + num_layer_ * 15 + i, &deberta_weights.deberta_layer_weights[i].ffn_layernorm_weights.beta); + } + + ft::Deberta deberta = ft::Deberta(batch_size_, + from_seq_len_, + head_num_, + size_per_head_, + max_relative_positions_, + relative_position_buckets_, + inter_size_, + num_layer_, + q_scaling_, + stream, + &cublas_wrapper, + &allocator, + true, + false, + ft::ActivationType::Gelu, + ft::LayerNormType::post_layernorm); + + tf::Tensor* output = nullptr; + OP_REQUIRES_OK(context, + context->allocate_output( + 0, + {context->input(0).dim_size(0), context->input(0).dim_size(1), head_num_ * size_per_head_}, + &output)); + DataType* out_tensor = reinterpret_cast(output->flat().data()); + + ft::DataType data_type = ft::getTensorType(); + + ft::TensorMap input_tensors({{"input_ids", this->convert_int_tensor(context->input(0))}, + {"sequence_lengths", this->convert_int_tensor(context->input(1))}}); + + ft::TensorMap output_tensors( + {{"output_hidden_state", + ft::Tensor{ft::MEMORY_GPU, + data_type, + std::vector{batch_size_, from_seq_len_, (size_t)(head_num_ * size_per_head_)}, + out_tensor}}}); + + try { + deberta.forward(&output_tensors, &input_tensors, &deberta_weights); + } + catch (std::runtime_error& error) { + std::cout << tf::errors::Internal(error.what()); + ft::FT_CHECK(false); + } + catch (...) { + std::cout << tf::errors::Internal("Runtime error"); + ft::FT_CHECK(false); + } + } + +private: + int head_num_ = 0; + int size_per_head_ = 0; + int max_relative_positions_ = 0; + int relative_position_buckets_ = 0; + int inter_size_ = 0; + int num_layer_ = 0; + float q_scaling_ = 1.0f; + bool remove_padding_; + ft::cublasAlgoMap* cublas_algo_map_; + typedef TFTraits traits_; + typedef typename traits_::DataType DataType; +}; + +#ifdef GOOGLE_CUDA + +#define REGISTER_GPU(T) \ + REGISTER_KERNEL_BUILDER(Name("Deberta").Device(tf::DEVICE_GPU).TypeConstraint("T"), DebertaOp) +REGISTER_GPU(float); +REGISTER_GPU(Eigen::half); +#undef REGISTER_GPU + +#endif diff --git a/src/fastertransformer/tf_op/decoder/CMakeLists.txt b/src/fastertransformer/tf_op/decoder/CMakeLists.txt index 1321bc2c1..ff2732952 100644 --- a/src/fastertransformer/tf_op/decoder/CMakeLists.txt +++ b/src/fastertransformer/tf_op/decoder/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tf_op/decoder/DecoderOp.cc b/src/fastertransformer/tf_op/decoder/DecoderOp.cc index 08664a900..e3a581654 100644 --- a/src/fastertransformer/tf_op/decoder/DecoderOp.cc +++ b/src/fastertransformer/tf_op/decoder/DecoderOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tf_op/decoder/FusedSelfAttentionOp.cc b/src/fastertransformer/tf_op/decoder/FusedSelfAttentionOp.cc index b63ab31ea..90f0ae257 100644 --- a/src/fastertransformer/tf_op/decoder/FusedSelfAttentionOp.cc +++ b/src/fastertransformer/tf_op/decoder/FusedSelfAttentionOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tf_op/decoding/CMakeLists.txt b/src/fastertransformer/tf_op/decoding/CMakeLists.txt index 24dfe82e9..da09f1b45 100644 --- a/src/fastertransformer/tf_op/decoding/CMakeLists.txt +++ b/src/fastertransformer/tf_op/decoding/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tf_op/decoding/DecodingOp.cc b/src/fastertransformer/tf_op/decoding/DecodingOp.cc index c6f4d7d90..5e3e2ebe5 100644 --- a/src/fastertransformer/tf_op/decoding/DecodingOp.cc +++ b/src/fastertransformer/tf_op/decoding/DecodingOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tf_op/encoder/CMakeLists.txt b/src/fastertransformer/tf_op/encoder/CMakeLists.txt index 4f0e2e05b..5ff34eb37 100644 --- a/src/fastertransformer/tf_op/encoder/CMakeLists.txt +++ b/src/fastertransformer/tf_op/encoder/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tf_op/encoder/EncoderOp.cc b/src/fastertransformer/tf_op/encoder/EncoderOp.cc index 86a21f92e..0f71768c5 100644 --- a/src/fastertransformer/tf_op/encoder/EncoderOp.cc +++ b/src/fastertransformer/tf_op/encoder/EncoderOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tf_op/gpt/CMakeLists.txt b/src/fastertransformer/tf_op/gpt/CMakeLists.txt index b7c3eee1e..ec30889a9 100644 --- a/src/fastertransformer/tf_op/gpt/CMakeLists.txt +++ b/src/fastertransformer/tf_op/gpt/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tf_op/gpt/GptOp.cc b/src/fastertransformer/tf_op/gpt/GptOp.cc index b5178f3f5..11ef62c86 100644 --- a/src/fastertransformer/tf_op/gpt/GptOp.cc +++ b/src/fastertransformer/tf_op/gpt/GptOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -274,6 +274,9 @@ class GptOp: public BaseOp { size_per_head_, inter_size_, num_layer_, + 0, // expert_num + 0, // moe_k + {}, // moe_layer_index vocab_size, start_id_, end_id_, diff --git a/src/fastertransformer/tf_op/t5/CMakeLists.txt b/src/fastertransformer/tf_op/t5/CMakeLists.txt index 9e868ae7c..96d4ec7a4 100644 --- a/src/fastertransformer/tf_op/t5/CMakeLists.txt +++ b/src/fastertransformer/tf_op/t5/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tf_op/t5/T5DecodingOp.cc b/src/fastertransformer/tf_op/t5/T5DecodingOp.cc index 382859433..de2314a7d 100644 --- a/src/fastertransformer/tf_op/t5/T5DecodingOp.cc +++ b/src/fastertransformer/tf_op/t5/T5DecodingOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tf_op/t5/T5EncoderOp.cc b/src/fastertransformer/tf_op/t5/T5EncoderOp.cc index eaea309b8..883bcd148 100644 --- a/src/fastertransformer/tf_op/t5/T5EncoderOp.cc +++ b/src/fastertransformer/tf_op/t5/T5EncoderOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/CMakeLists.txt b/src/fastertransformer/th_op/CMakeLists.txt index dcbf2c3ed..ddd6be058 100644 --- a/src/fastertransformer/th_op/CMakeLists.txt +++ b/src/fastertransformer/th_op/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -23,12 +23,49 @@ add_subdirectory(common) add_subdirectory(decoder) add_subdirectory(decoding) add_subdirectory(encoder) -add_subdirectory(gpt) add_subdirectory(longformer) add_subdirectory(swin) add_subdirectory(vit) - add_subdirectory(multi_gpu_gpt) add_subdirectory(t5) add_subdirectory(bart) add_subdirectory(bert) +add_subdirectory(deberta) + +add_library(th_transformer SHARED + $ + $ + $ + $ + $ + $ + $ + $ + $ + $ + $ + $ + $ + $ +) +target_link_libraries(th_transformer PUBLIC "${TORCH_LIBRARIES}" + th_bart + th_bert + th_common + th_deberta + th_decoder + th_decoding + th_encoder + th_gather_tree + th_longformer + th_parallel_gpt + th_swintransformer + th_t5 + th_utils + th_vit +) + +if(ENABLE_FP8) +add_subdirectory(gpt_fp8) +target_link_libraries(th_transformer PUBLIC $ th_gpt_fp8) +endif() diff --git a/src/fastertransformer/th_op/bart/BartDecoderOp.cc b/src/fastertransformer/th_op/bart/BartDecoderOp.cc index 14cf81780..708916e51 100644 --- a/src/fastertransformer/th_op/bart/BartDecoderOp.cc +++ b/src/fastertransformer/th_op/bart/BartDecoderOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/bart/BartDecoderOp.h b/src/fastertransformer/th_op/bart/BartDecoderOp.h index 8c79a5fed..55eeb2428 100644 --- a/src/fastertransformer/th_op/bart/BartDecoderOp.h +++ b/src/fastertransformer/th_op/bart/BartDecoderOp.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/bart/BartDecodingOp.cc b/src/fastertransformer/th_op/bart/BartDecodingOp.cc index 4e7afd540..2d5e9abc2 100644 --- a/src/fastertransformer/th_op/bart/BartDecodingOp.cc +++ b/src/fastertransformer/th_op/bart/BartDecodingOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/bart/BartDecodingOp.h b/src/fastertransformer/th_op/bart/BartDecodingOp.h index b8c4c1bc2..85607abca 100644 --- a/src/fastertransformer/th_op/bart/BartDecodingOp.h +++ b/src/fastertransformer/th_op/bart/BartDecodingOp.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/bart/BartEncoderOp.cc b/src/fastertransformer/th_op/bart/BartEncoderOp.cc index 60cb5ec40..765015feb 100644 --- a/src/fastertransformer/th_op/bart/BartEncoderOp.cc +++ b/src/fastertransformer/th_op/bart/BartEncoderOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/bart/BartEncoderOp.h b/src/fastertransformer/th_op/bart/BartEncoderOp.h index c5f0800b9..e86b645ea 100644 --- a/src/fastertransformer/th_op/bart/BartEncoderOp.h +++ b/src/fastertransformer/th_op/bart/BartEncoderOp.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/bart/CMakeLists.txt b/src/fastertransformer/th_op/bart/CMakeLists.txt index 91788a537..e0e3f9c32 100644 --- a/src/fastertransformer/th_op/bart/CMakeLists.txt +++ b/src/fastertransformer/th_op/bart/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -12,5 +12,6 @@ # See the License for the specific language governing permissions and # limitations under the License. -add_library(th_bart SHARED BartEncoderOp.cc BartDecoderOp.cc BartDecodingOp.cc) +add_library(th_bart STATIC BartEncoderOp.cc BartDecoderOp.cc BartDecodingOp.cc) +set_property(TARGET th_bart PROPERTY POSITION_INDEPENDENT_CODE ON) target_link_libraries(th_bart PRIVATE "${TORCH_LIBRARIES}" BartEncoder BartDecoder BartDecoding th_utils nccl_utils) diff --git a/src/fastertransformer/th_op/bert/BertINT8Op.cc b/src/fastertransformer/th_op/bert/BertINT8Op.cc index eb2078db0..3dfa25768 100644 --- a/src/fastertransformer/th_op/bert/BertINT8Op.cc +++ b/src/fastertransformer/th_op/bert/BertINT8Op.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/bert/BertINT8Op.h b/src/fastertransformer/th_op/bert/BertINT8Op.h index 7c58f7f54..9bcab554a 100644 --- a/src/fastertransformer/th_op/bert/BertINT8Op.h +++ b/src/fastertransformer/th_op/bert/BertINT8Op.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/bert/BertOp.cc b/src/fastertransformer/th_op/bert/BertOp.cc index b0e4e0d17..1895de9e7 100644 --- a/src/fastertransformer/th_op/bert/BertOp.cc +++ b/src/fastertransformer/th_op/bert/BertOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -16,10 +16,6 @@ #include "src/fastertransformer/th_op/bert/BertOp.h" -#ifdef USE_NVTX -bool NVTX_ON = true; -#endif - namespace th = torch; namespace torch_ext { @@ -236,4 +232,4 @@ static auto fasterTransformerBertTHS = q_scaling, tensor_para_size, pipeline_para_size); - }); \ No newline at end of file + }); diff --git a/src/fastertransformer/th_op/bert/BertOp.h b/src/fastertransformer/th_op/bert/BertOp.h index 50cb702f2..94b7350af 100644 --- a/src/fastertransformer/th_op/bert/BertOp.h +++ b/src/fastertransformer/th_op/bert/BertOp.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/bert/CMakeLists.txt b/src/fastertransformer/th_op/bert/CMakeLists.txt index de7ed5846..71e59ee2a 100644 --- a/src/fastertransformer/th_op/bert/CMakeLists.txt +++ b/src/fastertransformer/th_op/bert/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -12,5 +12,6 @@ # See the License for the specific language governing permissions and # limitations under the License. -add_library(th_bert SHARED BertOp.cc BertINT8Op.cc WeightQuantizeOp.cc) +add_library(th_bert STATIC BertOp.cc BertINT8Op.cc WeightQuantizeOp.cc) +set_property(TARGET th_bert PROPERTY POSITION_INDEPENDENT_CODE ON) target_link_libraries(th_bert PRIVATE "${TORCH_LIBRARIES}" Bert BertINT8 nccl_utils th_utils quantize_weight) diff --git a/src/fastertransformer/th_op/bert/WeightQuantizeOp.cc b/src/fastertransformer/th_op/bert/WeightQuantizeOp.cc index 9fedd1fd2..d93eb363e 100644 --- a/src/fastertransformer/th_op/bert/WeightQuantizeOp.cc +++ b/src/fastertransformer/th_op/bert/WeightQuantizeOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/common/CMakeLists.txt b/src/fastertransformer/th_op/common/CMakeLists.txt index da8a04788..21ffe4cd4 100644 --- a/src/fastertransformer/th_op/common/CMakeLists.txt +++ b/src/fastertransformer/th_op/common/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -12,12 +12,9 @@ # See the License for the specific language governing permissions and # limitations under the License. -add_library(th_common SHARED - DynamicDecodeOp.cc WeightOnlyQuantOps.cc) +add_library(th_common STATIC + DynamicDecodeOp.cc WeightOnlyQuantOps.cc GptOps.cc) +set_property(TARGET th_common PROPERTY POSITION_INDEPENDENT_CODE ON) target_link_libraries(th_common PRIVATE "${TORCH_LIBRARIES}" - cublasMMWrapper cutlass_preprocessors DynamicDecodeLayer + cublasMMWrapper cutlass_preprocessors DynamicDecodeLayer gpt_kernels memory_utils th_utils nccl_utils) - -add_library(th_weight_only_quant_ops SHARED WeightOnlyQuantOps.cc) -target_link_libraries(th_weight_only_quant_ops PRIVATE "${TORCH_LIBRARIES}" - cutlass_preprocessors th_utils) diff --git a/src/fastertransformer/th_op/common/DynamicDecodeOp.cc b/src/fastertransformer/th_op/common/DynamicDecodeOp.cc index ee33314f4..a03e670a6 100644 --- a/src/fastertransformer/th_op/common/DynamicDecodeOp.cc +++ b/src/fastertransformer/th_op/common/DynamicDecodeOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -70,6 +70,8 @@ void FtDynamicDecode::setup(size_t batch_size, th::optional runtime_top_p_opt, th::optional temperature_opt, th::optional repetition_penalty_opt, + th::optional presence_penalty_opt, + th::optional min_length_opt, th::optional length_penalty_opt, th::optional beam_search_diversity_rate_opt, th::optional random_seed_opt, @@ -91,6 +93,8 @@ void FtDynamicDecode::setup(size_t batch_size, SAFE_INSERT(runtime_args, "runtime_top_p", float, runtime_top_p_opt); SAFE_INSERT(runtime_args, "temperature", float, temperature_opt); SAFE_INSERT(runtime_args, "repetition_penalty", float, repetition_penalty_opt); + SAFE_INSERT(runtime_args, "presence_penalty", float, presence_penalty_opt); + SAFE_INSERT(runtime_args, "min_length", int, min_length_opt); SAFE_INSERT(runtime_args, "len_penalty", float, length_penalty_opt); SAFE_INSERT(runtime_args, "beam_search_diversity_rate", float, beam_search_diversity_rate_opt); SAFE_INSERT(runtime_args, "random_seed", unsigned long long, random_seed_opt); @@ -114,6 +118,8 @@ void FtDynamicDecode::forward(th::Tensor& logits, // (batch_siz th::optional runtime_top_p_opt, th::optional temperature_opt, th::optional repetition_penalty_opt, + th::optional presence_penalty_opt, + th::optional min_length_opt, th::optional length_penalty_opt, th::optional beam_search_diversity_rate_opt, th::optional top_p_decay_opt, @@ -152,6 +158,8 @@ void FtDynamicDecode::forward(th::Tensor& logits, // (batch_siz SAFE_INSERT(input_tensors, "runtime_top_p", float, runtime_top_p_opt); SAFE_INSERT(input_tensors, "temperature", float, temperature_opt); SAFE_INSERT(input_tensors, "repetition_penalty", float, repetition_penalty_opt); + SAFE_INSERT(input_tensors, "presence_penalty", float, presence_penalty_opt); + SAFE_INSERT(input_tensors, "min_length", int, min_length_opt); SAFE_INSERT(input_tensors, "len_penalty", float, length_penalty_opt); SAFE_INSERT(input_tensors, "beam_search_diversity_rate", float, beam_search_diversity_rate_opt); SAFE_INSERT(input_tensors, "top_p_decay_opt", float, top_p_decay_opt); @@ -243,6 +251,8 @@ void DynamicDecodeOp::setup(int64_t batch_size, th::optional runtime_top_p_opt, th::optional temperature_opt, th::optional repetition_penalty_opt, + th::optional presence_penalty_opt, + th::optional min_length_opt, th::optional length_penalty_opt, th::optional beam_search_diversity_rate_opt, th::optional random_seed_opt, @@ -256,6 +266,8 @@ void DynamicDecodeOp::setup(int64_t batch_size, CHECK_OPTIONAL_CPU_INPUT(temperature_opt, torch::kFloat); CHECK_OPTIONAL_CPU_INPUT(repetition_penalty_opt, torch::kFloat); + CHECK_OPTIONAL_CPU_INPUT(presence_penalty_opt, torch::kFloat); + CHECK_OPTIONAL_CPU_INPUT(min_length_opt, torch::kInt32); CHECK_OPTIONAL_CPU_INPUT(length_penalty_opt, torch::kFloat); CHECK_OPTIONAL_CPU_INPUT(beam_search_diversity_rate_opt, torch::kFloat); CHECK_OPTIONAL_CPU_INPUT(random_seed_opt, torch::kInt64); @@ -269,6 +281,8 @@ void DynamicDecodeOp::setup(int64_t batch_size, runtime_top_p_opt, temperature_opt, repetition_penalty_opt, + presence_penalty_opt, + min_length_opt, length_penalty_opt, beam_search_diversity_rate_opt, random_seed_opt, @@ -287,6 +301,8 @@ th::Tensor DynamicDecodeOp::forward(th::Tensor logits, th::optional runtime_top_p_opt, th::optional temperature_opt, th::optional repetition_penalty_opt, + th::optional presence_penalty_opt, + th::optional min_length_opt, th::optional length_penalty_opt, th::optional beam_search_diversity_rate_opt, th::optional top_p_decay_opt, @@ -314,6 +330,9 @@ th::Tensor DynamicDecodeOp::forward(th::Tensor logits, // runtime_top_p: [batch_size], float, optional // temperature: [batch_size], float, optional // repetition_penalty: [batch_size], float, optional + // presence_penalty: [batch_size], float, optional, + // only one of repetition_penalty and presence_penalty is allowed. + // min_length: [batch_size], int, optional // length_penalty: [batch_size], float, optional // beam_search_diversity_rate: [batch_size], float, optional // top_p_decay: [batch_size], float, optional @@ -351,6 +370,8 @@ th::Tensor DynamicDecodeOp::forward(th::Tensor logits, CHECK_OPTIONAL_CPU_INPUT(runtime_top_p_opt, torch::kFloat); CHECK_OPTIONAL_CPU_INPUT(temperature_opt, torch::kFloat); CHECK_OPTIONAL_CPU_INPUT(repetition_penalty_opt, torch::kFloat); + CHECK_OPTIONAL_CPU_INPUT(presence_penalty_opt, torch::kFloat); + CHECK_OPTIONAL_CPU_INPUT(min_length_opt, torch::kInt32); CHECK_OPTIONAL_CPU_INPUT(length_penalty_opt, torch::kFloat); CHECK_OPTIONAL_CPU_INPUT(beam_search_diversity_rate_opt, torch::kFloat); CHECK_OPTIONAL_INPUT(top_p_decay_opt, torch::kFloat); @@ -385,6 +406,8 @@ th::Tensor DynamicDecodeOp::forward(th::Tensor logits, runtime_top_p_opt, temperature_opt, repetition_penalty_opt, + presence_penalty_opt, + min_length_opt, length_penalty_opt, beam_search_diversity_rate_opt, top_p_decay_opt, diff --git a/src/fastertransformer/th_op/common/DynamicDecodeOp.h b/src/fastertransformer/th_op/common/DynamicDecodeOp.h index 1dca7e857..f49266ea5 100644 --- a/src/fastertransformer/th_op/common/DynamicDecodeOp.h +++ b/src/fastertransformer/th_op/common/DynamicDecodeOp.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -33,6 +33,8 @@ class IFtDynamicDecode { th::optional runtime_top_p_opt, th::optional temperature_opt, th::optional repetition_penalty_opt, + th::optional presence_penalty_opt, + th::optional min_length_opt, th::optional length_penalty_opt, th::optional beam_search_diversity_rate_opt, th::optional random_seed_opt, @@ -50,6 +52,8 @@ class IFtDynamicDecode { th::optional runtime_top_p_opt, th::optional temperature_opt, th::optional repetition_penalty_opt, + th::optional presence_penalty_opt, + th::optional min_length_opt, th::optional length_penalty_opt, th::optional beam_search_diversity_rate_opt, th::optional top_p_decay_opt, @@ -89,6 +93,8 @@ class FtDynamicDecode: public IFtDynamicDecode { th::optional runtime_top_p_opt, th::optional temperature_opt, th::optional repetition_penalty_opt, + th::optional presence_penalty_opt, + th::optional min_length_opt, th::optional length_penalty_opt, th::optional beam_search_diversity_rate_opt, th::optional random_seed_opt, @@ -106,6 +112,8 @@ class FtDynamicDecode: public IFtDynamicDecode { th::optional runtime_top_p_opt, th::optional temperature_opt, th::optional repetition_penalty_opt, + th::optional presence_penalty_opt, + th::optional min_length_opt, th::optional length_penalty_opt, th::optional beam_search_diversity_rate_opt, th::optional top_p_decay_opt, @@ -161,6 +169,8 @@ class DynamicDecodeOp: public th::jit::CustomClassHolder { th::optional runtime_top_p_opt, th::optional temperature_opt, th::optional reptition_penalty_opt, + th::optional presence_penalty_opt, + th::optional min_length_opt, th::optional length_penalty_opt, th::optional beam_search_diversity_rate_opt, th::optional random_seed_opt, @@ -178,6 +188,8 @@ class DynamicDecodeOp: public th::jit::CustomClassHolder { th::optional runtime_top_p_opt, th::optional temperature_opt, th::optional repetition_penalty_opt, + th::optional presence_penalty_opt, + th::optional min_length_opt, th::optional length_penalty_opt, th::optional beam_search_diversity_rate_opt, th::optional top_p_decay_opt, diff --git a/src/fastertransformer/th_op/common/GptOps.cc b/src/fastertransformer/th_op/common/GptOps.cc new file mode 100644 index 000000000..ea3a86887 --- /dev/null +++ b/src/fastertransformer/th_op/common/GptOps.cc @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/kernels/gpt_kernels.h" +#include "src/fastertransformer/th_op/th_utils.h" +#include "src/fastertransformer/utils/memory_utils.h" + +namespace torch_ext { +namespace ft = fastertransformer; +using torch::Tensor; + +// Results a tensor of {batch_to_compact_idx, compact_to_batch_idx} +std::vector find_context_duplications(Tensor input_ids) +{ + CHECK_INPUT(input_ids, torch::kInt32); + TORCH_CHECK(input_ids.dim() == 2, "Invalid dim. Input ids must be a matrix [batch, seq_len]"); + + const auto stream = at::cuda::getCurrentCUDAStream().stream(); + + const int batch_size = input_ids.size(0); + const int seq_len = input_ids.size(1); + + Tensor shared_contexts = + torch::empty({batch_size}, torch::dtype(torch::kInt32).device(torch::kCUDA).requires_grad(false)); + + Tensor batch_to_compact = torch::empty_like(shared_contexts); + Tensor compact_to_batch_tmp = torch::empty_like(shared_contexts); + + Tensor compact_size_tensor = + torch::empty({1}, torch::dtype(torch::kInt32).device(torch::kCUDA).requires_grad(false)); + + ft::invokeFindContextDups(get_ptr(shared_contexts), + get_ptr(batch_to_compact), + get_ptr(compact_to_batch_tmp), + get_ptr(compact_size_tensor), + get_ptr(input_ids), + batch_size, + seq_len, + stream); + + Tensor compact_size_cpu_tensor = compact_size_tensor.to(torch::kCPU); + const int compact_size = compact_size_cpu_tensor.item(); + + Tensor compact_to_batch = + torch::empty({compact_size}, torch::dtype(torch::kInt32).device(torch::kCUDA).requires_grad(false)); + + ft::cudaD2Dcpy(get_ptr(compact_to_batch), get_ptr(compact_to_batch_tmp), compact_size); + return {batch_to_compact, compact_to_batch}; +} + +} // namespace torch_ext + +// Utility methods that may be useful for preprocessing weights in torch. +static auto find_context_duplications = + torch::RegisterOperators("fastertransformer::find_context_duplications", &torch_ext::find_context_duplications); diff --git a/src/fastertransformer/th_op/common/WeightOnlyQuantOps.cc b/src/fastertransformer/th_op/common/WeightOnlyQuantOps.cc index 9f803b156..7e0fbc5ab 100644 --- a/src/fastertransformer/th_op/common/WeightOnlyQuantOps.cc +++ b/src/fastertransformer/th_op/common/WeightOnlyQuantOps.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/deberta/CMakeLists.txt b/src/fastertransformer/th_op/deberta/CMakeLists.txt new file mode 100644 index 000000000..5dd407a68 --- /dev/null +++ b/src/fastertransformer/th_op/deberta/CMakeLists.txt @@ -0,0 +1,17 @@ +# Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +add_library(th_deberta STATIC DebertaOp.cc) +set_property(TARGET th_deberta PROPERTY POSITION_INDEPENDENT_CODE ON) +target_link_libraries(th_deberta PRIVATE "${TORCH_LIBRARIES}" Deberta nccl_utils th_utils) diff --git a/src/fastertransformer/th_op/deberta/DebertaOp.cc b/src/fastertransformer/th_op/deberta/DebertaOp.cc new file mode 100644 index 000000000..7e0e98f9f --- /dev/null +++ b/src/fastertransformer/th_op/deberta/DebertaOp.cc @@ -0,0 +1,285 @@ +/* + * Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/th_op/deberta/DebertaOp.h" + +namespace th = torch; +namespace torch_ext { + +FasterTransformerDeberta::FasterTransformerDeberta(th::Tensor q_kernel, + th::Tensor q_bias, + th::Tensor k_kernel, + th::Tensor k_bias, + th::Tensor v_kernel, + th::Tensor v_bias, + th::Tensor attr_output_kernel, + th::Tensor attr_output_bias, + th::Tensor attr_output_layernorm_gamma, + th::Tensor attr_output_layernorm_beta, + th::Tensor inter_kernel, + th::Tensor inter_bias, + th::Tensor output_kernel, + th::Tensor output_bias, + th::Tensor output_layernorm_gamma, + th::Tensor output_layernorm_beta, + th::Tensor word_embedding_table, + th::Tensor word_embedding_layernorm_gamma, + th::Tensor word_embedding_layernorm_beta, + th::Tensor relative_embedding_table, + th::Tensor relative_embedding_layernorm_gamma, + th::Tensor relative_embedding_layernorm_beta, + int64_t head_num, + int64_t head_size, + int64_t max_relative_positions, + int64_t relative_position_buckets, + int64_t inter_size, + bool remove_padding, + int64_t layer_num, + bool sparse, + double q_scaling, + int64_t tensor_para_size, + int64_t pipeline_para_size): + _st(q_kernel.scalar_type()), + _remove_padding(remove_padding), + weights{q_kernel, + q_bias, + k_kernel, + k_bias, + v_kernel, + v_bias, + attr_output_kernel, + attr_output_bias, + attr_output_layernorm_gamma, + attr_output_layernorm_beta, + inter_kernel, + inter_bias, + output_kernel, + output_bias, + output_layernorm_gamma, + output_layernorm_beta, + word_embedding_table, + word_embedding_layernorm_gamma, + word_embedding_layernorm_beta, + relative_embedding_table, + relative_embedding_layernorm_gamma, + relative_embedding_layernorm_beta} +{ + CHECK_INPUT(q_kernel, _st); // hidden_dim, hidden_dim + CHECK_INPUT(q_bias, _st); // hidden_dim + CHECK_INPUT(k_kernel, _st); // hidden_dim, hidden_dim + CHECK_INPUT(k_bias, _st); // hidden_dim + CHECK_INPUT(v_kernel, _st); // hidden_dim, hidden_dim + CHECK_INPUT(v_bias, _st); // hidden_dim + CHECK_INPUT(attr_output_kernel, _st); // hidden_dim, hidden_dim + CHECK_INPUT(attr_output_bias, _st); // hidden_dim + CHECK_INPUT(attr_output_layernorm_gamma, _st); // hidden_dim + CHECK_INPUT(attr_output_layernorm_beta, _st); // hidden_dim + CHECK_INPUT(inter_kernel, _st); // 4 * hidden_dim, hidden_dim + CHECK_INPUT(inter_bias, _st); // 4 * hidden_dim + CHECK_INPUT(output_kernel, _st); // hidden_dim, 4 * hidden_dim + CHECK_INPUT(output_bias, _st); // hidden_dim + CHECK_INPUT(output_layernorm_gamma, _st); // hidden_dim + CHECK_INPUT(output_layernorm_beta, _st); // hidden_dim + CHECK_INPUT(word_embedding_table, _st); // vocab_size, hidden_dim + CHECK_INPUT(word_embedding_layernorm_gamma, _st); // hidden_dim + CHECK_INPUT(word_embedding_layernorm_beta, _st); // hidden_dim + CHECK_INPUT(relative_embedding_table, _st); // 2*attention_span, hidden_dim + CHECK_INPUT(relative_embedding_layernorm_gamma, _st); // hidden_dim + CHECK_INPUT(relative_embedding_layernorm_beta, _st); // hidden_dim + + switch (_st) { + case at::ScalarType::Float: + ftdeberta = new FTDeberta(head_num, + head_size, + max_relative_positions, + relative_position_buckets, + inter_size, + layer_num, + sparse, + q_scaling, + tensor_para_size, + pipeline_para_size, + weights); + break; + case at::ScalarType::Half: + ftdeberta = new FTDeberta(head_num, + head_size, + max_relative_positions, + relative_position_buckets, + inter_size, + layer_num, + sparse, + q_scaling, + tensor_para_size, + pipeline_para_size, + weights); + break; +#ifdef ENABLE_BF16 + case at::ScalarType::BFloat16: + ftdeberta = new FTDeberta<__nv_bfloat16>(head_num, + head_size, + max_relative_positions, + relative_position_buckets, + inter_size, + layer_num, + sparse, + q_scaling, + tensor_para_size, + pipeline_para_size, + weights); + break; +#endif + default: + throw std::runtime_error("Wrong Tensor type."); + } + head_info = torch::empty({10}, torch::dtype(torch::kInt64)); + head_info[0] = head_num; + head_info[1] = head_size; + head_info[2] = (int64_t)remove_padding; + head_info[3] = layer_num; + head_info[4] = (int64_t)sparse; + head_info[5] = inter_size; + head_info[6] = tensor_para_size; + head_info[7] = pipeline_para_size; + head_info[8] = max_relative_positions; + head_info[9] = relative_position_buckets; + + scaling_info = torch::empty({1}, torch::dtype(torch::kFloat64)); + scaling_info[0] = (double)q_scaling; +} + +FasterTransformerDeberta::~FasterTransformerDeberta() +{ + delete ftdeberta; +} + +th::Tensor FasterTransformerDeberta::forward(th::Tensor input, th::Tensor sequence_lengths) +{ + CHECK_CONTIGUOUS(input); + TORCH_CHECK(input.dtype() == torch::kInt32, "input_ids dtype should be int32"); + CHECK_TH_CUDA(sequence_lengths); + CHECK_CONTIGUOUS(sequence_lengths); + TORCH_CHECK(sequence_lengths.dtype() == torch::kInt32, "sequence_lengths dtype should be int32"); + size_t batch_size = (size_t)input.size(0); + size_t seq_len = (size_t)input.size(1); + + auto output = + torch::empty({(long int)batch_size, (long int)seq_len, (long int)(head_info[0] * head_info[1]).item()}, + torch::dtype(_st).device(torch::kCUDA).requires_grad(false)); + ftdeberta->forward(batch_size, seq_len, input, sequence_lengths, output, _remove_padding); + return output; +} + +std::vector FasterTransformerDeberta::get_pickle_info() const +{ + std::vector tmp(weights); + tmp.push_back(head_info); + tmp.push_back(scaling_info); + return tmp; +} + +} // namespace torch_ext + +static auto fasterTransformerDebertaTHS = +#ifdef LEGACY_THS + torch::jit::class_("FasterTransformerDeberta") +#else + torch::jit::class_("FasterTransformer", "Deberta") +#endif + .def(torch::jit::init()) + .def("forward", &torch_ext::FasterTransformerDeberta::forward) + .def_pickle( + [](const c10::intrusive_ptr& self) -> std::vector { + return self->get_pickle_info(); + }, + [](std::vector state) -> c10::intrusive_ptr { + int64_t head_num = state[22][0].item().to(); + int64_t head_size = state[22][1].item().to(); + bool remove_padding = (bool)(state[22][2].item().to()); + int64_t layer_num = state[22][3].item().to(); + bool sparse = (bool)(state[22][4].item().to()); + int64_t inter_size = state[22][5].item().to(); + int64_t tensor_para_size = state[22][6].item().to(); + int64_t pipeline_para_size = state[22][7].item().to(); + int64_t max_relative_positions = state[22][8].item().to(); + int64_t relative_position_buckets = state[22][9].item().to(); + double q_scaling = state[23][0].item().to(); + return c10::make_intrusive(state[0], + state[1], + state[2], + state[3], + state[4], + state[5], + state[6], + state[7], + state[8], + state[9], + state[10], + state[11], + state[12], + state[13], + state[14], + state[15], + state[16], + state[17], + state[18], + state[19], + state[20], + state[21], + head_num, + head_size, + max_relative_positions, + relative_position_buckets, + inter_size, + remove_padding, + layer_num, + sparse, + q_scaling, + tensor_para_size, + pipeline_para_size); + }); diff --git a/src/fastertransformer/th_op/deberta/DebertaOp.h b/src/fastertransformer/th_op/deberta/DebertaOp.h new file mode 100644 index 000000000..0bc837283 --- /dev/null +++ b/src/fastertransformer/th_op/deberta/DebertaOp.h @@ -0,0 +1,324 @@ +/* + * Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/models/deberta/Deberta.h" +#include "src/fastertransformer/th_op/th_utils.h" +#include "src/fastertransformer/utils/nccl_utils.h" + +namespace ft = fastertransformer; +namespace th = torch; +namespace torch_ext { + +class IFDeberta { +public: + virtual ~IFDeberta() {} + virtual void forward(size_t batch_size, + size_t seq_len, + th::Tensor& input, + th::Tensor& sequence_lengths, + th::Tensor& output, + bool removing_padding) = 0; +}; + +template +class FTDeberta: public IFDeberta { +public: + FTDeberta(size_t head_num, + size_t head_size, + size_t max_relative_positions, + size_t relative_position_buckets, + size_t inter_size, + size_t layer_num, + bool sparse, + float q_scaling, + const size_t tensor_para_size, + const size_t pipeline_para_size, + const std::vector& w): + _head_num(head_num), + _head_size(head_size), + _max_relative_positions(max_relative_positions), + _relative_position_buckets(relative_position_buckets), + _inter_size(inter_size), + _layer_num(layer_num), + _weights(w), + _sparse(sparse), + _q_scaling(q_scaling) + { +#ifndef SPARSITY_ENABLED + if (sparse) { + std::cout << "[WARNING] Sparsity support is not enabled. Will use dense GEMM instead.\n" << std::flush; + } +#endif + ft::ftNcclInitialize(tensor_para_, pipeline_para_, tensor_para_size, pipeline_para_size); + const int hidden_dim = _head_num * _head_size; + const int local_hidden_dim = (_head_num / tensor_para_.world_size_) * _head_size; + ft::check_cuda_error(cublasLtCreate(&_cublasltHandle)); +#ifdef SPARSITY_ENABLED + if (sparse) { + CHECK_CUSPARSE(cusparseLtInit(&_cusparseLtHandle)); + } +#endif + std::string sp_config_fname = sparse ? "spgemm_config.in" : ""; + cublas_algo_map_ = new ft::cublasAlgoMap("gemm_config.in", sp_config_fname); + cublas_wrapper_mutex_ = new std::mutex(); + + // Layer-level weights + deberta_weights.deberta_layer_weights.clear(); + deberta_weights.deberta_layer_weights.resize(_layer_num); + for (int i = 0; i < _layer_num; i++) { + int local_num_layer = (int)(ceil(_layer_num * 1.0f / pipeline_para_.world_size_)); + if (!(i < _layer_num && (i >= local_num_layer * pipeline_para_.rank_) + && (i < local_num_layer * (pipeline_para_.rank_ + 1)))) { + continue; + } + const int first_layer_index = local_num_layer * pipeline_para_.rank_; + + deberta_weights.deberta_layer_weights[i].attention_weights.query_weight.kernel = + get_ptr(_weights[0]) + hidden_dim * local_hidden_dim * (i - first_layer_index); + deberta_weights.deberta_layer_weights[i].attention_weights.query_weight.bias = + get_ptr(_weights[1]) + local_hidden_dim * (i - first_layer_index); + deberta_weights.deberta_layer_weights[i].attention_weights.key_weight.kernel = + get_ptr(_weights[2]) + hidden_dim * local_hidden_dim * (i - first_layer_index); + deberta_weights.deberta_layer_weights[i].attention_weights.key_weight.bias = + get_ptr(_weights[3]) + local_hidden_dim * (i - first_layer_index); + deberta_weights.deberta_layer_weights[i].attention_weights.value_weight.kernel = + get_ptr(_weights[4]) + hidden_dim * local_hidden_dim * (i - first_layer_index); + deberta_weights.deberta_layer_weights[i].attention_weights.value_weight.bias = + get_ptr(_weights[5]) + local_hidden_dim * (i - first_layer_index); + deberta_weights.deberta_layer_weights[i].attention_weights.attention_output_weight.kernel = + get_ptr(_weights[6]) + local_hidden_dim * hidden_dim * (i - first_layer_index); + deberta_weights.deberta_layer_weights[i].attention_weights.attention_output_weight.bias = + get_ptr(_weights[7]) + hidden_dim * (i - first_layer_index); + deberta_weights.deberta_layer_weights[i].attn_layernorm_weights.gamma = + get_ptr(_weights[8]) + hidden_dim * (i - first_layer_index); + deberta_weights.deberta_layer_weights[i].attn_layernorm_weights.beta = + get_ptr(_weights[9]) + hidden_dim * (i - first_layer_index); + deberta_weights.deberta_layer_weights[i].ffn_weights.intermediate_weight.kernel = + get_ptr(_weights[10]) + + hidden_dim * (_inter_size / tensor_para_.world_size_) * (i - first_layer_index); + deberta_weights.deberta_layer_weights[i].ffn_weights.intermediate_weight.bias = + get_ptr(_weights[11]) + (_inter_size / tensor_para_.world_size_) * (i - first_layer_index); + deberta_weights.deberta_layer_weights[i].ffn_weights.output_weight.kernel = + get_ptr(_weights[12]) + + (_inter_size / tensor_para_.world_size_) * hidden_dim * (i - first_layer_index); + deberta_weights.deberta_layer_weights[i].ffn_weights.output_weight.bias = + get_ptr(_weights[13]) + hidden_dim * (i - first_layer_index); + deberta_weights.deberta_layer_weights[i].ffn_layernorm_weights.gamma = + get_ptr(_weights[14]) + hidden_dim * (i - first_layer_index); + deberta_weights.deberta_layer_weights[i].ffn_layernorm_weights.beta = + get_ptr(_weights[15]) + hidden_dim * (i - first_layer_index); + } + + // Model-level weights + deberta_weights.word_embedding_table = get_ptr(_weights[16]); + deberta_weights.word_embedding_layernorm_weights.gamma = get_ptr(_weights[17]); + deberta_weights.word_embedding_layernorm_weights.beta = get_ptr(_weights[18]); + deberta_weights.relative_embedding_table = get_ptr(_weights[19]); + deberta_weights.relative_embedding_layernorm_weights.gamma = get_ptr(_weights[20]); + deberta_weights.relative_embedding_layernorm_weights.beta = get_ptr(_weights[21]); + +#ifdef SPARSITY_ENABLED + if (sparse) { + auto stream = at::cuda::getCurrentCUDAStream().stream(); + cublasHandle_t _cublasHandle = at::cuda::getCurrentCUDABlasHandle(); + cublasSetStream(_cublasHandle, stream); + ft::cublasMMWrapper cublas_wrapper = ft::cublasMMWrapper(_cublasHandle, + _cublasltHandle, + _cusparseLtHandle, + stream, + cublas_algo_map_, + cublas_wrapper_mutex_, + nullptr); + for (int i = 0; i < _layer_num; ++i) { + deberta_weights.deberta_layer_weights[i].compress_weights(cublas_wrapper, hidden_dim); + } + } +#endif + } + + ~FTDeberta() override + { + ft::ftNcclParamDestroy(tensor_para_); + ft::ftNcclParamDestroy(pipeline_para_); + cublasLtDestroy(_cublasltHandle); +#ifdef SPARSITY_ENABLED + if (_sparse) { + cusparseLtDestroy(&_cusparseLtHandle); + } +#endif + delete cublas_algo_map_; + delete cublas_wrapper_mutex_; + } + + void forward(size_t batch_size, + size_t seq_len, + th::Tensor& input, + th::Tensor& sequence_lengths, + th::Tensor& output, + bool removing_padding) override + { + auto stream = at::cuda::getCurrentCUDAStream().stream(); + cublasHandle_t _cublasHandle = at::cuda::getCurrentCUDABlasHandle(); + cublasSetStream(_cublasHandle, stream); + ft::Allocator* allocator = new ft::Allocator(); + ft::cublasMMWrapper* cublas_wrapper = +#ifdef SPARSITY_ENABLED + new ft::cublasMMWrapper(_cublasHandle, + _cublasltHandle, + _cusparseLtHandle, + stream, + cublas_algo_map_, + cublas_wrapper_mutex_, + allocator); +#else + new ft::cublasMMWrapper( + _cublasHandle, _cublasltHandle, stream, cublas_algo_map_, cublas_wrapper_mutex_, allocator); +#endif + + if (std::is_same::value) { + cublas_wrapper->setFP16GemmConfig(); + } +#ifdef ENABLE_BF16 + else if (std::is_same::value) { + cublas_wrapper->setBF16GemmConfig(); + } +#endif + else if (std::is_same::value) { + cublas_wrapper->setFP32GemmConfig(); + } + + ft::Deberta* deberta = new ft::Deberta(batch_size, + seq_len, + _head_num, + _head_size, + _max_relative_positions, + _relative_position_buckets, + _inter_size, + _layer_num, + _q_scaling, + stream, + cublas_wrapper, + allocator, + true, + _sparse, + ft::ActivationType::Gelu, + ft::LayerNormType::post_layernorm, + tensor_para_, + pipeline_para_, + nullptr, + false); + + ft::DataType data_type = ft::getTensorType(); + std::vector input_tensors = std::vector{ + ft::Tensor{ft::MEMORY_GPU, data_type, std::vector{batch_size, seq_len}, get_ptr(input)}, + ft::Tensor{ + ft::MEMORY_GPU, ft::TYPE_INT32, std::vector{batch_size}, get_ptr(sequence_lengths)}}; + + std::vector output_tensors = std::vector{ + ft::Tensor{ft::MEMORY_GPU, + data_type, + std::vector{batch_size, seq_len, (size_t)(_head_num * _head_size)}, + get_ptr(output)}}; + + try { + deberta->forward(&output_tensors, &input_tensors, &deberta_weights); + } + catch (std::runtime_error& error) { + std::cout << error.what(); + exit(-1); + } + catch (...) { + std::cout << "Runtime error"; + exit(-1); + } + delete deberta; + delete cublas_wrapper; + delete allocator; + } + +private: + const size_t _head_num; + const size_t _head_size; + const size_t _max_relative_positions; + const size_t _relative_position_buckets; + const size_t _inter_size; + const size_t _layer_num; + std::vector _weights; + bool _sparse; + const float _q_scaling; + ft::NcclParam tensor_para_; + ft::NcclParam pipeline_para_; + cublasLtHandle_t _cublasltHandle; +#ifdef SPARSITY_ENABLED + cusparseLtHandle_t _cusparseLtHandle; +#endif + std::mutex* cublas_wrapper_mutex_; + ft::cublasAlgoMap* cublas_algo_map_; + ft::DebertaWeight deberta_weights; +}; + +class FasterTransformerDeberta: public th::jit::CustomClassHolder { +public: + FasterTransformerDeberta(th::Tensor q_kernel, + th::Tensor q_bias, + th::Tensor k_kernel, + th::Tensor k_bias, + th::Tensor v_kernel, + th::Tensor v_bias, + th::Tensor attr_output_kernel, + th::Tensor attr_output_bias, + th::Tensor attr_output_layernorm_gamma, + th::Tensor attr_output_layernorm_beta, + th::Tensor inter_kernel, + th::Tensor inter_bias, + th::Tensor output_kernel, + th::Tensor output_bias, + th::Tensor output_layernorm_gamma, + th::Tensor output_layernorm_beta, + th::Tensor word_embedding_table, + th::Tensor word_embedding_layernorm_gamma, + th::Tensor word_embedding_layernorm_beta, + th::Tensor relative_embedding_table, + th::Tensor relative_embedding_layernorm_gamma, + th::Tensor relative_embedding_layernorm_beta, + int64_t head_num, + int64_t head_size, + int64_t max_relative_positions, + int64_t relative_position_buckets, + int64_t inter_size, + bool remove_padding, + int64_t layer_num, + bool sparse, + double q_scaling, + int64_t tensor_para_size, + int64_t pipeline_para_size); + + ~FasterTransformerDeberta(); + + th::Tensor forward(th::Tensor input, th::Tensor sequence_lengths); + + std::vector get_pickle_info() const; + +private: + const at::ScalarType _st; + bool _remove_padding; + IFDeberta* ftdeberta; + th::Tensor head_info; + th::Tensor scaling_info; + std::vector weights; +}; + +} // namespace torch_ext diff --git a/src/fastertransformer/th_op/decoder/CMakeLists.txt b/src/fastertransformer/th_op/decoder/CMakeLists.txt index bb0d3940f..9162fe6d5 100644 --- a/src/fastertransformer/th_op/decoder/CMakeLists.txt +++ b/src/fastertransformer/th_op/decoder/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -12,5 +12,6 @@ # See the License for the specific language governing permissions and # limitations under the License. -add_library(th_decoder SHARED DecoderOp.cc) +add_library(th_decoder STATIC DecoderOp.cc) +set_property(TARGET th_decoder PROPERTY POSITION_INDEPENDENT_CODE ON) target_link_libraries(th_decoder PRIVATE "${TORCH_LIBRARIES}" Decoder th_utils) diff --git a/src/fastertransformer/th_op/decoder/DecoderOp.cc b/src/fastertransformer/th_op/decoder/DecoderOp.cc index 809b64984..550d61552 100644 --- a/src/fastertransformer/th_op/decoder/DecoderOp.cc +++ b/src/fastertransformer/th_op/decoder/DecoderOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/decoder/DecoderOp.h b/src/fastertransformer/th_op/decoder/DecoderOp.h index 0b0e3d1e1..a0880a0fa 100644 --- a/src/fastertransformer/th_op/decoder/DecoderOp.h +++ b/src/fastertransformer/th_op/decoder/DecoderOp.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/decoding/CMakeLists.txt b/src/fastertransformer/th_op/decoding/CMakeLists.txt index 9abedc337..ce18bfa1f 100644 --- a/src/fastertransformer/th_op/decoding/CMakeLists.txt +++ b/src/fastertransformer/th_op/decoding/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -12,8 +12,10 @@ # See the License for the specific language governing permissions and # limitations under the License. -add_library(th_decoding SHARED DecodingOp.cc) +add_library(th_decoding STATIC DecodingOp.cc) +set_property(TARGET th_decoding PROPERTY POSITION_INDEPENDENT_CODE ON) target_link_libraries(th_decoding PRIVATE "${TORCH_LIBRARIES}" Decoding th_utils) -add_library(th_gather_tree SHARED GatherTreeOp.cc) +add_library(th_gather_tree STATIC GatherTreeOp.cc) +set_property(TARGET th_gather_tree PROPERTY POSITION_INDEPENDENT_CODE ON) target_link_libraries(th_gather_tree PRIVATE "${TORCH_LIBRARIES}" decoding_kernels th_utils) \ No newline at end of file diff --git a/src/fastertransformer/th_op/decoding/DecodingOp.cc b/src/fastertransformer/th_op/decoding/DecodingOp.cc index 3be5bb496..003bcaa8c 100644 --- a/src/fastertransformer/th_op/decoding/DecodingOp.cc +++ b/src/fastertransformer/th_op/decoding/DecodingOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/decoding/DecodingOp.h b/src/fastertransformer/th_op/decoding/DecodingOp.h index 6f4d28231..89f777cde 100644 --- a/src/fastertransformer/th_op/decoding/DecodingOp.h +++ b/src/fastertransformer/th_op/decoding/DecodingOp.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/decoding/GatherTreeOp.cc b/src/fastertransformer/th_op/decoding/GatherTreeOp.cc index 4cfe167ef..95498c60b 100644 --- a/src/fastertransformer/th_op/decoding/GatherTreeOp.cc +++ b/src/fastertransformer/th_op/decoding/GatherTreeOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/decoding/GatherTreeOp.h b/src/fastertransformer/th_op/decoding/GatherTreeOp.h index 4a8ed5f6c..932d080e4 100644 --- a/src/fastertransformer/th_op/decoding/GatherTreeOp.h +++ b/src/fastertransformer/th_op/decoding/GatherTreeOp.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/encoder/CMakeLists.txt b/src/fastertransformer/th_op/encoder/CMakeLists.txt index 7f2732a1f..d2ad59dfb 100644 --- a/src/fastertransformer/th_op/encoder/CMakeLists.txt +++ b/src/fastertransformer/th_op/encoder/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -12,5 +12,6 @@ # See the License for the specific language governing permissions and # limitations under the License. -add_library(th_encoder SHARED EncoderOp.cc) +add_library(th_encoder STATIC EncoderOp.cc) +set_property(TARGET th_encoder PROPERTY POSITION_INDEPENDENT_CODE ON) target_link_libraries(th_encoder PRIVATE "${TORCH_LIBRARIES}" Bert th_utils) diff --git a/src/fastertransformer/th_op/encoder/EncoderOp.cc b/src/fastertransformer/th_op/encoder/EncoderOp.cc index 03048809a..46174991f 100644 --- a/src/fastertransformer/th_op/encoder/EncoderOp.cc +++ b/src/fastertransformer/th_op/encoder/EncoderOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/encoder/EncoderOp.h b/src/fastertransformer/th_op/encoder/EncoderOp.h index a2beb41b7..30737c102 100644 --- a/src/fastertransformer/th_op/encoder/EncoderOp.h +++ b/src/fastertransformer/th_op/encoder/EncoderOp.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/gpt_fp8/CMakeLists.txt b/src/fastertransformer/th_op/gpt_fp8/CMakeLists.txt new file mode 100644 index 000000000..5d2f8ca4c --- /dev/null +++ b/src/fastertransformer/th_op/gpt_fp8/CMakeLists.txt @@ -0,0 +1,17 @@ +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +add_library(th_gpt_fp8 STATIC GptFp8Op.cc) +set_property(TARGET th_gpt_fp8 PROPERTY POSITION_INDEPENDENT_CODE ON) +target_link_libraries(th_gpt_fp8 PRIVATE "${TORCH_LIBRARIES}" GptFP8 th_utils nvtx_utils) diff --git a/src/fastertransformer/th_op/gpt_fp8/GptFp8Op.cc b/src/fastertransformer/th_op/gpt_fp8/GptFp8Op.cc new file mode 100644 index 000000000..76a62c95e --- /dev/null +++ b/src/fastertransformer/th_op/gpt_fp8/GptFp8Op.cc @@ -0,0 +1,147 @@ +/* + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/th_op/gpt_fp8/GptFp8Op.h" + +namespace th = torch; +namespace ft = fastertransformer; +namespace torch_ext { + +GptFp8Op::GptFp8Op(const int64_t head_num, + const int64_t size_per_head, + const int64_t inter_size, + const int64_t layer_num, + const int64_t vocab_size, + const int64_t max_seq_len, + const int64_t start_id, + const int64_t end_id, + const int64_t tensor_para_size, + const int64_t pipeline_para_size, + const double layernorm_eps, + const std::string layernorm_type, + const std::string activation_type, + const std::string ckpt_path, + const bool has_post_decoder_layernorm, + const std::vector weights) +{ + + ftgpt = new FTGptFp8<__nv_fp8_e4m3, __nv_bfloat16>((size_t)head_num, + (size_t)size_per_head, + (size_t)inter_size, + (size_t)layer_num, + (size_t)vocab_size, + (size_t)max_seq_len, + start_id, + end_id, + tensor_para_size, + pipeline_para_size, + ckpt_path); +} + +GptFp8Op::~GptFp8Op() +{ + delete ftgpt; +} + +std::vector GptFp8Op::forward(th::Tensor input_ids, + th::Tensor input_lengths, + const int64_t output_len, + th::optional beam_width_opt, + th::optional top_k_opt, + th::optional top_p_opt, + th::optional beam_search_diversity_rate_opt, + th::optional temperature_opt, + th::optional len_penalty_opt, + th::optional repetition_penalty_opt, + th::optional random_seed_opt, + th::optional return_cum_log_probs_opt) +{ + CHECK_TH_CUDA(input_ids); + CHECK_CONTIGUOUS(input_ids); + TORCH_CHECK(input_ids.dtype() == torch::kInt32, "input_ids dtype should be int32"); + CHECK_TH_CUDA(input_lengths); + CHECK_CONTIGUOUS(input_lengths); + TORCH_CHECK(input_lengths.dtype() == torch::kInt32, "input_lengths dtype should be int32"); + int64_t return_cum_log_probs = return_cum_log_probs_opt.has_value() ? (int64_t)return_cum_log_probs_opt.value() : 0; + if (return_cum_log_probs_opt.has_value()) { + TORCH_CHECK(return_cum_log_probs == 0 || return_cum_log_probs == 1 || return_cum_log_probs == 2, + "return_cum_log_probs should be" + " 0 (no return cum_log_probs), " + " 1 (the cumulative log probs of generated sequences), or" + " 2 (the cumulative log probs of sequences).") + } + + const int beam_width = beam_width_opt.has_value() ? (int)beam_width_opt.value() : 1; + + const int batch_size = input_ids.size(0); + const int max_input_length = input_ids.size(1); + const int total_request_output_len = max_input_length + output_len; + th::Tensor output_ids = torch::empty({batch_size, beam_width, total_request_output_len}, + torch::dtype(torch::kInt32).device(torch::kCUDA).requires_grad(false)); + th::Tensor parent_ids = torch::empty({total_request_output_len, batch_size, beam_width}, + torch::dtype(torch::kInt32).device(torch::kCUDA).requires_grad(false)); + th::Tensor sequence_lengths = + torch::empty({batch_size, beam_width}, torch::dtype(torch::kInt32).device(torch::kCUDA).requires_grad(false)); + th::Tensor cum_log_probs = + torch::empty({batch_size, beam_width}, torch::dtype(torch::kFloat32).device(torch::kCUDA).requires_grad(false)); + + ftgpt->forward(input_ids, + input_lengths, + output_ids, + parent_ids, + sequence_lengths, + cum_log_probs, + (const size_t)output_len, + (const size_t)beam_width, + top_k_opt, + top_p_opt, + beam_search_diversity_rate_opt, + temperature_opt, + len_penalty_opt, + repetition_penalty_opt, + random_seed_opt, + return_cum_log_probs_opt); + if (return_cum_log_probs > 0) { + return std::vector{output_ids, sequence_lengths, cum_log_probs}; + } + return std::vector{output_ids, sequence_lengths}; +} + +} // namespace torch_ext + +static auto fasterTransformerGptTHS = +#ifdef LEGACY_THS + torch::jit::class_("FasterTransformerGptFp8Op") +#else + torch::jit::class_("FasterTransformer", "GptFp8Op") +#endif + .def(torch::jit::init>()) + .def("forward", &torch_ext::GptFp8Op::forward); diff --git a/src/fastertransformer/th_op/gpt_fp8/GptFp8Op.h b/src/fastertransformer/th_op/gpt_fp8/GptFp8Op.h new file mode 100644 index 000000000..4ef134c6d --- /dev/null +++ b/src/fastertransformer/th_op/gpt_fp8/GptFp8Op.h @@ -0,0 +1,328 @@ +/* + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "3rdparty/INIReader.h" + +#include "src/fastertransformer/models/gpt_fp8/GptFP8.h" +#include "src/fastertransformer/th_op/th_utils.h" +#include "src/fastertransformer/utils/cuda_bf16_wrapper.h" +#include "src/fastertransformer/utils/memory_utils.h" +#include "src/fastertransformer/utils/mpi_utils.h" +#include "src/fastertransformer/utils/nvtx_utils.h" + +namespace ft = fastertransformer; +namespace th = torch; +namespace torch_ext { + +using std::vector; + +class IFGptFp8 { +public: + virtual ~IFGptFp8() {} + virtual void forward(th::Tensor& input_ids, + th::Tensor& input_lengths, + th::Tensor& output_ids, + th::Tensor& parent_ids, + th::Tensor& sequence_lengths, + th::Tensor& cum_log_probs, + const size_t request_output_len, + const size_t beam_width, + th::optional top_k_opt, + th::optional top_p_opt, + th::optional beam_search_diversity_rate_opt, + th::optional temperature_opt, + th::optional len_penalty_opt, + th::optional repetition_penalty_opt, + th::optional random_seed_opt, + th::optional return_cum_log_probs_opt) = 0; +}; + +template +class FTGptFp8: public IFGptFp8 { +public: + FTGptFp8(const size_t head_num, + const size_t size_per_head, + const size_t inter_size, + const size_t layer_num, + const size_t vocab_size, + const size_t max_seq_len, + const int start_id, + const int end_id, + const int tensor_para_size, + const int pipeline_para_size, + const std::string ckpt_path): + head_num_(head_num), + size_per_head_(size_per_head), + inter_size_(inter_size), + layer_num_(layer_num), + vocab_size_(vocab_size), + max_seq_len_(max_seq_len), + start_id_(start_id), + end_id_(end_id), + ckpt_path_(ckpt_path), + tensor_para_size_(tensor_para_size), + pipeline_para_size_(pipeline_para_size) + { + ftNcclInitialize(tensor_para_, pipeline_para_, tensor_para_size_, pipeline_para_size_); + ft::check_cuda_error(cublasLtCreate(&cublasltHandle_)); + + cublas_algo_map_ = new ft::cublasAlgoMap(GEMM_CONFIG, ""); + cublas_wrapper_mutex_ = new std::mutex(); + + ft::check_cuda_error(cudaGetDeviceProperties(&prop_, 0)); + + const size_t hidden_units = head_num_ * size_per_head_; + gpt_weights_ = new ft::GptFP8Weight(hidden_units, + inter_size_, + vocab_size_, + layer_num_, + max_seq_len_, + tensor_para_size_, + tensor_para_rank_, + pipeline_para_size_, + pipeline_para_rank_); + + gpt_weights_->loadModel(ckpt_path_); + gpt_weights_->transposeWeight(); + } + + ~FTGptFp8() override + { + cublasLtDestroy(cublasltHandle_); + delete cublas_algo_map_; + delete cublas_wrapper_mutex_; + } + + void forward(th::Tensor& input_ids, + th::Tensor& input_lengths, + th::Tensor& output_ids, + th::Tensor& parent_ids, + th::Tensor& sequence_lengths, + th::Tensor& cum_log_probs, + size_t request_output_len, + size_t beam_width, + th::optional top_k_opt, + th::optional top_p_opt, + th::optional beam_search_diversity_rate_opt, + th::optional temperature_opt, + th::optional len_penalty_opt, + th::optional repetition_penalty_opt, + th::optional random_seed_opt, + th::optional return_cum_log_probs_opt) override + { + uint top_k = top_k_opt.has_value() ? (uint)top_k_opt.value() : 1; + float top_p = top_p_opt.has_value() ? (float)top_p_opt.value() : 0.0f; + float beam_search_diversity_rate = + beam_search_diversity_rate_opt.has_value() ? (float)beam_search_diversity_rate_opt.value() : 0.0f; + float temperature = temperature_opt.has_value() ? (float)temperature_opt.value() : 1.0f; + float len_penalty = len_penalty_opt.has_value() ? (float)len_penalty_opt.value() : 1.0f; + float repetition_penalty = repetition_penalty_opt.has_value() ? (float)repetition_penalty_opt.value() : 1.0f; + unsigned long long random_seed = random_seed_opt.has_value() ? (unsigned long long)random_seed_opt.value() : 0; + int return_cum_log_probs = return_cum_log_probs_opt.has_value() ? (int)return_cum_log_probs_opt.value() : 0; + + const size_t hidden_units = head_num_ * size_per_head_; + const size_t request_batch_size = (size_t)input_ids.size(0); + const size_t max_input_len = (size_t)input_ids.size(1); + const int total_output_len = max_input_len + request_output_len; + if (total_output_len > (int)max_seq_len_) { + printf("[ERROR] total_output_len (%d) should be <= max_seq_len (%ld). \n", total_output_len, max_seq_len_); + exit(-1); + } + std::vector output_seq_len_array(request_batch_size, total_output_len); + + auto stream = at::cuda::getCurrentCUDAStream().stream(); + cublasHandle_t cublasHandle = at::cuda::getCurrentCUDABlasHandle(); + cublasSetStream(cublasHandle, stream); + ft::Allocator allocator = ft::Allocator(); + ft::cublasFP8MMWrapper cublas_wrapper = ft::cublasFP8MMWrapper( + cublasHandle, cublasltHandle_, stream, cublas_algo_map_, cublas_wrapper_mutex_, &allocator); + + cublas_wrapper.setGemmConfig(CUDA_R_16BF, CUDA_R_16BF, CUDA_R_16BF, CUDA_R_32F); + + struct cudaDeviceProp prop; + ft::check_cuda_error(cudaGetDeviceProperties(&prop, 0)); + + // Need to remove them in the future. + ft::GptFP8 gpt = ft::GptFP8<__nv_fp8_e4m3, __nv_bfloat16>(beam_width, + head_num_, + size_per_head_, + inter_size_, + layer_num_, + vocab_size_, + start_id_, + end_id_, + tensor_para_, + pipeline_para_, + stream, + &cublas_wrapper, + &allocator, + false, + &prop, + false); + + std::unordered_map input_tensors = std::unordered_map{ + {"input_ids", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{request_batch_size, (size_t)max_input_len}, + get_ptr(input_ids)}}, + {"input_lengths", + ft::Tensor{ + ft::MEMORY_GPU, ft::TYPE_INT32, std::vector{request_batch_size}, get_ptr(input_lengths)}}, + {"output_seq_len", + ft::Tensor{ft::MEMORY_CPU, + ft::TYPE_UINT32, + std::vector{request_batch_size}, + output_seq_len_array.data()}}, + {"temperature", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &temperature}}, + {"len_penalty", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &len_penalty}}, + {"repetition_penalty", + ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &repetition_penalty}}}; + if (top_k == 0 && top_p == 0.0f) { + ft::FT_CHECK(beam_width > 1); + input_tensors.insert( + {"beam_search_diversity_rate", + ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &beam_search_diversity_rate}}); + } + else { + input_tensors.insert( + {"random_seed", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_UINT64, std::vector{1}, &random_seed}}); + if (top_p != 0.0f) { + input_tensors.insert( + {"runtime_top_p", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &top_p}}); + } + if (top_k != 0) { + input_tensors.insert( + {"runtime_top_k", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_UINT32, std::vector{1}, &top_k}}); + } + } + bool return_context_cum_log_probs = false; + if (return_cum_log_probs == 2) { + return_context_cum_log_probs = true; + input_tensors.insert( + {"is_return_context_cum_log_probs", + ft::Tensor{ft::MEMORY_CPU, ft::TYPE_BOOL, std::vector{1}, &return_context_cum_log_probs}}); + } + + std::unordered_map output_tensors = std::unordered_map{ + {"output_ids", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{request_batch_size, beam_width, (size_t)total_output_len}, + get_ptr(output_ids)}}, + {"sequence_length", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{request_batch_size, beam_width}, + get_ptr(sequence_lengths)}}, + {"output_cum_log_probs", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_FP32, + std::vector{(size_t)request_output_len, request_batch_size, beam_width}, + nullptr}}}; + if (return_cum_log_probs > 0) { + output_tensors.insert({"cum_log_probs", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_FP32, + std::vector{request_batch_size, beam_width}, + get_ptr(cum_log_probs)}}); + } + + try { + gpt.forward(&output_tensors, &input_tensors, gpt_weights_); + } + catch (std::runtime_error& error) { + std::cout << error.what(); + exit(-1); + } + catch (...) { + std::cout << "Runtime error"; + exit(-1); + } + + return; + } + +private: + const size_t head_num_; + const size_t size_per_head_; + const size_t inter_size_; + const size_t layer_num_; + const size_t vocab_size_; + const size_t max_seq_len_; + const int start_id_; + const int end_id_; + + size_t tensor_para_size_; + size_t pipeline_para_size_; + size_t tensor_para_rank_; + ft::NcclParam tensor_para_; + size_t pipeline_para_rank_; + ft::NcclParam pipeline_para_; + int world_size_ = 1; + int rank_ = 0; + + // std::vector weights_; + cublasLtHandle_t cublasltHandle_; + std::mutex* cublas_wrapper_mutex_; + ft::cublasAlgoMap* cublas_algo_map_; + struct cudaDeviceProp prop_; + const std::string ckpt_path_; + ft::GptFP8Weight<__nv_fp8_e4m3, __nv_bfloat16>* gpt_weights_; +}; + +class GptFp8Op: public th::jit::CustomClassHolder { +public: + GptFp8Op(const int64_t head_num, + const int64_t size_per_head, + const int64_t inter_size, + const int64_t layer_num, + const int64_t vocab_size, + const int64_t max_seq_len, + const int64_t start_id, + const int64_t end_id, + const int64_t tensor_para_size, + const int64_t pipeline_para_size, + const double layernorm_eps, + const std::string layernorm_type, + const std::string activation_type, + const std::string ckpt_path, + const bool has_post_decoder_layernorm, + const vector weights); + + ~GptFp8Op(); + + vector forward(th::Tensor input_ids, + th::Tensor input_lengths, + const int64_t output_len, + th::optional beam_width_opt, + th::optional top_k_opt, + th::optional top_p_opt, + th::optional beam_search_diversity_rate_opt, + th::optional temperature_opt, + th::optional len_penalty_opt, + th::optional repetition_penalty_opt, + th::optional random_seed_opt, + th::optional return_cum_log_probs_opt); + +private: + // const at::ScalarType st_; + IFGptFp8* ftgpt; + // std::vector weights; +}; + +} // namespace torch_ext diff --git a/src/fastertransformer/th_op/longformer/CMakeLists.txt b/src/fastertransformer/th_op/longformer/CMakeLists.txt index bc981714f..1c3a60291 100644 --- a/src/fastertransformer/th_op/longformer/CMakeLists.txt +++ b/src/fastertransformer/th_op/longformer/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -12,5 +12,6 @@ # See the License for the specific language governing permissions and # limitations under the License. -add_library(th_longformer SHARED LongformerEncoderOp.cc) +add_library(th_longformer STATIC LongformerEncoderOp.cc) +set_property(TARGET th_longformer PROPERTY POSITION_INDEPENDENT_CODE ON) target_link_libraries(th_longformer PRIVATE "${TORCH_LIBRARIES}" LongformerEncoder th_utils) \ No newline at end of file diff --git a/src/fastertransformer/th_op/longformer/LongformerEncoderOp.cc b/src/fastertransformer/th_op/longformer/LongformerEncoderOp.cc index bdfdccc6b..77b9f40af 100644 --- a/src/fastertransformer/th_op/longformer/LongformerEncoderOp.cc +++ b/src/fastertransformer/th_op/longformer/LongformerEncoderOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/longformer/LongformerEncoderOp.h b/src/fastertransformer/th_op/longformer/LongformerEncoderOp.h index c59dfba19..de07b8ebe 100644 --- a/src/fastertransformer/th_op/longformer/LongformerEncoderOp.h +++ b/src/fastertransformer/th_op/longformer/LongformerEncoderOp.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/multi_gpu_gpt/CMakeLists.txt b/src/fastertransformer/th_op/multi_gpu_gpt/CMakeLists.txt index b941a6ea0..b4caa56e1 100644 --- a/src/fastertransformer/th_op/multi_gpu_gpt/CMakeLists.txt +++ b/src/fastertransformer/th_op/multi_gpu_gpt/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -12,10 +12,10 @@ # See the License for the specific language governing permissions and # limitations under the License. -add_library(th_parallel_gpt SHARED +add_library(th_parallel_gpt STATIC ParallelGptContextDecoderOp.cc ParallelGptDecoderOp.cc ParallelGptOp.cc WeightTransposeCalibrateQuantizeOp.cc) - +set_property(TARGET th_parallel_gpt PROPERTY POSITION_INDEPENDENT_CODE ON) target_link_libraries(th_parallel_gpt PRIVATE "${TORCH_LIBRARIES}" ParallelGptContextDecoder ParallelGptDecoder ParallelGpt calibrate_quantize_weight_kernels nccl_utils th_common th_utils) diff --git a/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptContextDecoderOp.cc b/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptContextDecoderOp.cc index fdee654f5..374563743 100644 --- a/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptContextDecoderOp.cc +++ b/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptContextDecoderOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -190,6 +190,9 @@ void FtGptContextDecoder::forward(th::Tensor& decoder_output, size_per_head_, inter_size_, num_layers_, + 0, // expert_num + 0, // moe_k + {}, // moe_layer_index gpt_variant_params_.layernorm_eps, gpt_variant_params_, tensor_para_, diff --git a/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptContextDecoderOp.h b/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptContextDecoderOp.h index d8fbd992f..4e6b7cf91 100644 --- a/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptContextDecoderOp.h +++ b/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptContextDecoderOp.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptDecoderOp.cc b/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptDecoderOp.cc index 574ebbe6d..053a39ab4 100644 --- a/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptDecoderOp.cc +++ b/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptDecoderOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -200,6 +200,9 @@ void FtGptDecoder::forward(const int64_t max_input_length, size_per_head_, inter_size_, num_layers_, + 0, // expert_num + 0, // moe_k + {}, // moe_layer_index gpt_variant_params_.layernorm_eps, gpt_variant_params_, tensor_para_, diff --git a/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptDecoderOp.h b/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptDecoderOp.h index 0bb87f1b6..ae0cfe890 100644 --- a/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptDecoderOp.h +++ b/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptDecoderOp.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptOp.cc b/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptOp.cc index f89f52b02..725b8fc63 100644 --- a/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptOp.cc +++ b/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -25,6 +25,9 @@ ParallelGptOp::ParallelGptOp(const int64_t head_num, const int64_t size_per_head, const int64_t inter_size, const int64_t layer_num, + const int64_t expert_num, + const int64_t moe_k, + const std::vector moe_layer_index, const int64_t vocab_size, const int64_t start_id, const int64_t end_id, @@ -62,11 +65,14 @@ ParallelGptOp::ParallelGptOp(const int64_t head_num, switch (st_) { case at::ScalarType::Float: - ftgpt = new FTGpt((size_t)head_num, - (size_t)size_per_head, - (size_t)inter_size, - (size_t)layer_num, - (size_t)vocab_size, + ftgpt = new FTGpt(head_num, + size_per_head, + inter_size, + layer_num, + expert_num, + moe_k, + moe_layer_index, + vocab_size, gpt_variant_params, start_id, end_id, @@ -79,11 +85,14 @@ ParallelGptOp::ParallelGptOp(const int64_t head_num, shared_contexts_ratio); break; case at::ScalarType::Half: - ftgpt = new FTGpt((size_t)head_num, - (size_t)size_per_head, - (size_t)inter_size, - (size_t)layer_num, - (size_t)vocab_size, + ftgpt = new FTGpt(head_num, + size_per_head, + inter_size, + layer_num, + expert_num, + moe_k, + moe_layer_index, + vocab_size, gpt_variant_params, start_id, end_id, @@ -97,11 +106,14 @@ ParallelGptOp::ParallelGptOp(const int64_t head_num, break; #ifdef ENABLE_BF16 case at::ScalarType::BFloat16: - ftgpt = new FTGpt<__nv_bfloat16>((size_t)head_num, - (size_t)size_per_head, - (size_t)inter_size, - (size_t)layer_num, - (size_t)vocab_size, + ftgpt = new FTGpt<__nv_bfloat16>(head_num, + size_per_head, + inter_size, + layer_num, + expert_num, + moe_k, + moe_layer_index, + vocab_size, gpt_variant_params, start_id, end_id, @@ -134,7 +146,10 @@ std::vector ParallelGptOp::forward(th::Tensor input_id th::optional temperature_opt, th::optional len_penalty_opt, th::optional repetition_penalty_opt, + th::optional presence_penalty_opt, + th::optional min_length_opt, th::optional random_seed_opt, + th::optional bad_words_list_opt, th::optional return_cum_log_probs_opt) { CHECK_TH_CUDA(input_ids); @@ -177,7 +192,10 @@ std::vector ParallelGptOp::forward(th::Tensor input_id temperature_opt, len_penalty_opt, repetition_penalty_opt, + presence_penalty_opt, + min_length_opt, random_seed_opt, + bad_words_list_opt, return_cum_log_probs_opt); if (return_cum_log_probs > 0) { return std::vector{output_ids, sequence_lengths, cum_log_probs}; @@ -199,6 +217,9 @@ static auto fasterTransformerGptTHS = int64_t, int64_t, int64_t, + std::vector, + int64_t, + int64_t, int64_t, int64_t, int64_t, diff --git a/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptOp.h b/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptOp.h index 25bd3f43e..5b420cd0a 100644 --- a/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptOp.h +++ b/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptOp.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -42,32 +42,41 @@ class IFGpt { th::optional temperature_opt, th::optional len_penalty_opt, th::optional repetition_penalty_opt, + th::optional presence_penalty_opt, + th::optional min_length_opt, th::optional random_seed_opt, + th::optional bad_words_list_opt, th::optional return_cum_log_probs_opt) = 0; }; template class FTGpt: public IFGpt { public: - FTGpt(const size_t head_num, - const size_t size_per_head, - const size_t inter_size, - const size_t layer_num, - const size_t vocab_size, + FTGpt(const int64_t head_num, + const int64_t size_per_head, + const int64_t inter_size, + const int64_t layer_num, + const int64_t expert_num, + const int64_t moe_k, + const std::vector moe_layer_index, + const int64_t vocab_size, const ft::gptVariantParams gpt_variant_params, - const int start_id, - const int end_id, - const int tensor_para_size, - const int pipeline_para_size, - const int int8_mode, + const int64_t start_id, + const int64_t end_id, + const int64_t tensor_para_size, + const int64_t pipeline_para_size, + const int64_t int8_mode, const vector weights, const vector int8_weights, const vector scale, - const float shared_contexts_ratio): + const double shared_contexts_ratio): head_num_(head_num), size_per_head_(size_per_head), inter_size_(inter_size), layer_num_(layer_num), + expert_num_(expert_num), + moe_k_(moe_k), + moe_layer_index_(moe_layer_index), gpt_variant_params_(gpt_variant_params), vocab_size_(vocab_size), start_id_(start_id), @@ -174,6 +183,15 @@ class FTGpt: public IFGpt { weight_offset = 7 - weight_offset; + for (int i = 0; i < (int)layer_num_; i++) { + if (std::find(moe_layer_index.begin(), moe_layer_index.end(), i) != moe_layer_index.end()) { + gpt_weights_.decoder_layer_weights[i]->ffn_weights.gating_weight.kernel = + get_ptr(weights_[12 * layer_num_ + weight_offset + i]); + } + } + + weight_offset += layer_num_; + if (gpt_variant_params_.has_adapters) { for (int i = 0; i < (int)layer_num_; i++) { gpt_weights_.decoder_layer_weights[i]->after_attention_adapter_weights.intermediate_weight.kernel = @@ -261,7 +279,10 @@ class FTGpt: public IFGpt { th::optional temperature_opt, th::optional len_penalty_opt, th::optional repetition_penalty_opt, + th::optional presence_penalty_opt, + th::optional min_length_opt, th::optional random_seed_opt, + th::optional bad_words_list_opt, th::optional return_cum_log_probs_opt) override { int return_cum_log_probs = return_cum_log_probs_opt.has_value() ? (int)return_cum_log_probs_opt.value() : 0; @@ -297,7 +318,7 @@ class FTGpt: public IFGpt { false, // with_relative_position_bias true); // causal_mask - ft::ParallelGpt gpt = ft::ParallelGpt(request_batch_size, + ft::ParallelGpt gpt = ft::ParallelGpt(request_batch_size, total_output_len, max_input_length, beam_width, @@ -305,6 +326,9 @@ class FTGpt: public IFGpt { size_per_head_, inter_size_, layer_num_, + expert_num_, + moe_k_, + moe_layer_index_, vocab_size_, start_id_, end_id_, @@ -331,6 +355,7 @@ class FTGpt: public IFGpt { nullptr, 0, shared_contexts_ratio_); + std::vector output_seq_len(request_batch_size, total_output_len); std::unordered_map input_tensors = std::unordered_map{ @@ -370,12 +395,25 @@ class FTGpt: public IFGpt { input_tensors.insert({"repetition_penalty", convert_tensor(repetition_penalty_opt.value(), ft::MemoryType::MEMORY_CPU)}); } + if (presence_penalty_opt.has_value()) { + input_tensors.insert( + {"presence_penalty", convert_tensor(presence_penalty_opt.value(), ft::MemoryType::MEMORY_CPU)}); + } + if (min_length_opt.has_value()) { + input_tensors.insert( + {"min_length", convert_tensor(min_length_opt.value(), ft::MemoryType::MEMORY_CPU)}); + } if (random_seed_opt.has_value()) { input_tensors.insert( {"random_seed", convert_tensor(random_seed_opt.value(), ft::MemoryType::MEMORY_CPU)}); } + if (bad_words_list_opt.has_value()) { + CHECK_INPUT(bad_words_list_opt.value(), torch::kInt32); + input_tensors.insert({"bad_words_list", convert_tensor(bad_words_list_opt.value())}); + } + bool return_context_cum_log_probs = false; if (return_cum_log_probs == 2) { return_context_cum_log_probs = true; @@ -422,19 +460,22 @@ class FTGpt: public IFGpt { } private: - const size_t head_num_; - const size_t size_per_head_; - const size_t inter_size_; - const size_t layer_num_; - const size_t vocab_size_; - const int start_id_; - const int end_id_; - const float shared_contexts_ratio_; - - const int int8_mode_ = 0; - - size_t tensor_para_size_; - size_t pipeline_para_size_; + const int64_t head_num_; + const int64_t size_per_head_; + const int64_t inter_size_; + const int64_t layer_num_; + const int64_t expert_num_; + const int64_t moe_k_; + std::vector moe_layer_index_; + const int64_t vocab_size_; + const int64_t start_id_; + const int64_t end_id_; + const double shared_contexts_ratio_; + + const int64_t int8_mode_ = 0; + + int64_t tensor_para_size_; + int64_t pipeline_para_size_; ft::gptVariantParams gpt_variant_params_; @@ -456,29 +497,32 @@ class FTGpt: public IFGpt { class ParallelGptOp: public th::jit::CustomClassHolder { public: - ParallelGptOp(const int64_t head_num, - const int64_t size_per_head, - const int64_t inter_size, - const int64_t layer_num, - const int64_t vocab_size, - const int64_t start_id, - const int64_t end_id, - const int64_t tensor_para_size, - const int64_t pipeline_para_size, - const int64_t int8_mode, - const double layernorm_eps, - const std::string layernorm_type, - const std::string activation_type, - const bool has_positional_encoding, - const bool has_pre_decoder_layernorm, - const bool has_post_decoder_layernorm, - const bool has_adapters, - const int64_t adapter_inter_size, - const bool use_attention_linear_bias, - const vector weights, - const vector int8_weights, - const vector scale, - const double shared_contexts_ratio); + ParallelGptOp(const int64_t head_num, + const int64_t size_per_head, + const int64_t inter_size, + const int64_t layer_num, + const int64_t expert_num, + const int64_t moe_k, + const std::vector moe_layer_index, + const int64_t vocab_size, + const int64_t start_id, + const int64_t end_id, + const int64_t tensor_para_size, + const int64_t pipeline_para_size, + const int64_t int8_mode, + const double layernorm_eps, + const std::string layernorm_type, + const std::string activation_type, + const bool has_positional_encoding, + const bool has_pre_decoder_layernorm, + const bool has_post_decoder_layernorm, + const bool has_adapters, + const int64_t adapter_inter_size, + const bool use_attention_linear_bias, + const vector weights, + const vector int8_weights, + const vector scale, + const double shared_contexts_ratio); ~ParallelGptOp(); @@ -492,7 +536,10 @@ class ParallelGptOp: public th::jit::CustomClassHolder { th::optional temperature_opt, th::optional len_penalty_opt, th::optional repetition_penalty_opt, + th::optional presence_penalty_opt, + th::optional min_length_opt, th::optional random_seed_opt, + th::optional bad_words_list_opt, th::optional return_cum_log_probs_opt); private: diff --git a/src/fastertransformer/th_op/multi_gpu_gpt/WeightTransposeCalibrateQuantizeOp.cc b/src/fastertransformer/th_op/multi_gpu_gpt/WeightTransposeCalibrateQuantizeOp.cc index 29cd6efa8..40affbad1 100644 --- a/src/fastertransformer/th_op/multi_gpu_gpt/WeightTransposeCalibrateQuantizeOp.cc +++ b/src/fastertransformer/th_op/multi_gpu_gpt/WeightTransposeCalibrateQuantizeOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/multi_gpu_gpt/WeightTransposeCalibrateQuantizeOp.h b/src/fastertransformer/th_op/multi_gpu_gpt/WeightTransposeCalibrateQuantizeOp.h index 348258550..9c6a40208 100644 --- a/src/fastertransformer/th_op/multi_gpu_gpt/WeightTransposeCalibrateQuantizeOp.h +++ b/src/fastertransformer/th_op/multi_gpu_gpt/WeightTransposeCalibrateQuantizeOp.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/swin/CMakeLists.txt b/src/fastertransformer/th_op/swin/CMakeLists.txt index 1592a36f2..35c8f834b 100644 --- a/src/fastertransformer/th_op/swin/CMakeLists.txt +++ b/src/fastertransformer/th_op/swin/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -22,8 +22,9 @@ set(swintransformer_ths_files add_definitions(-DTORCH_CUDA=1) if(BUILD_PYT) - set(LIB_NAME "pyt_swintransformer") - add_library(${LIB_NAME} SHARED ${swintransformer_ths_files}) + set(LIB_NAME "th_swintransformer") + add_library(${LIB_NAME} STATIC ${swintransformer_ths_files}) + set_property(TARGET ${LIB_NAME} PROPERTY POSITION_INDEPENDENT_CODE ON) set_target_properties(${LIB_NAME} PROPERTIES CUDA_RESOLVE_DEVICE_SYMBOLS ON) target_link_libraries(${LIB_NAME} "${TORCH_LIBRARIES}" Swin SwinINT8 diff --git a/src/fastertransformer/th_op/swin/SwinINT8Op.cc b/src/fastertransformer/th_op/swin/SwinINT8Op.cc index b209a57ee..828b4a628 100644 --- a/src/fastertransformer/th_op/swin/SwinINT8Op.cc +++ b/src/fastertransformer/th_op/swin/SwinINT8Op.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/swin/SwinINT8Op.h b/src/fastertransformer/th_op/swin/SwinINT8Op.h index e6340464a..a4a836c3d 100644 --- a/src/fastertransformer/th_op/swin/SwinINT8Op.h +++ b/src/fastertransformer/th_op/swin/SwinINT8Op.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/swin/SwinOp.cc b/src/fastertransformer/th_op/swin/SwinOp.cc index eb6c56b7f..66f7bc808 100644 --- a/src/fastertransformer/th_op/swin/SwinOp.cc +++ b/src/fastertransformer/th_op/swin/SwinOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/swin/SwinOp.h b/src/fastertransformer/th_op/swin/SwinOp.h index edb1c2fed..5778d50e6 100644 --- a/src/fastertransformer/th_op/swin/SwinOp.h +++ b/src/fastertransformer/th_op/swin/SwinOp.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/swin/WeightQuantizeOp.cc b/src/fastertransformer/th_op/swin/WeightQuantizeOp.cc index b473f9c16..92a7685fe 100644 --- a/src/fastertransformer/th_op/swin/WeightQuantizeOp.cc +++ b/src/fastertransformer/th_op/swin/WeightQuantizeOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/t5/CMakeLists.txt b/src/fastertransformer/th_op/t5/CMakeLists.txt index 94b6992eb..805eda2dc 100644 --- a/src/fastertransformer/th_op/t5/CMakeLists.txt +++ b/src/fastertransformer/th_op/t5/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -12,5 +12,6 @@ # See the License for the specific language governing permissions and # limitations under the License. -add_library(th_t5 SHARED T5EncoderOp.cc T5DecoderOp.cc T5DecodingOp.cc) +add_library(th_t5 STATIC T5EncoderOp.cc T5DecodingOp.cc) +set_property(TARGET th_t5 PROPERTY POSITION_INDEPENDENT_CODE ON) target_link_libraries(th_t5 PRIVATE "${TORCH_LIBRARIES}" T5Encoder T5Decoder T5Decoding th_utils nccl_utils) diff --git a/src/fastertransformer/th_op/t5/T5DecodingOp.cc b/src/fastertransformer/th_op/t5/T5DecodingOp.cc index 51578c306..878ceef86 100644 --- a/src/fastertransformer/th_op/t5/T5DecodingOp.cc +++ b/src/fastertransformer/th_op/t5/T5DecodingOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -20,6 +20,399 @@ namespace th = torch; namespace torch_ext { +template +FTT5Decoding::FTT5Decoding(int64_t head_num, + int64_t size_per_head, + int64_t inter_size, + int64_t mem_d_model, + int64_t d_model, + int64_t layer_num, + int64_t vocab_size, + int64_t num_bucket, + int64_t expert_num, + int64_t max_distance, + double q_scaling, + int64_t start_id, + int64_t end_id, + int64_t tensor_para_size, + int64_t pipeline_para_size, + bool t5_with_bias, + int64_t moe_k, + ft::PositionEmbeddingType position_embedding_type, + ft::ActivationType activation_type, + bool tie_word_embeddings, + int64_t adapter_inter_size, + ft::LayerNormType adapter_layer_norm_type, + std::vector moe_layer_index, + const std::vector& w): + head_num_(head_num), + size_per_head_(size_per_head), + inter_size_(inter_size), + mem_d_model_(mem_d_model), + d_model_(d_model), + layer_num_(layer_num), + vocab_size_(vocab_size), + num_bucket_(num_bucket), + expert_num_(expert_num), + max_distance_(max_distance), + q_scaling_(q_scaling), + start_id_(start_id), + end_id_(end_id), + t5_with_bias_(t5_with_bias), + moe_k_(moe_k), + position_embedding_type_(position_embedding_type), + activation_type_(activation_type), + tie_word_embeddings_(tie_word_embeddings), + adapter_inter_size_{adapter_inter_size}, + adapter_layer_norm_type_{adapter_layer_norm_type}, + moe_layer_index_(moe_layer_index), + _weights(w) +{ + bool use_gated_activation = isGatedActivation(activation_type_); + ft::ftNcclInitialize(tensor_para_, pipeline_para_, tensor_para_size, pipeline_para_size); + + ft::check_cuda_error(cublasLtCreate(&cublasltHandle_)); + cublas_algo_map_ = new ft::cublasAlgoMap("gemm_config.in"); + cublas_wrapper_mutex_ = new std::mutex(); + + decoding_weights.resizeLayer(layer_num_); + decoding_weights.setT5StructureDiff(t5_with_bias, use_gated_activation, position_embedding_type); + const int hidden_dim = head_num_ * size_per_head_; + + int dense_weight_index = 0; // the inter and out kernel has the same index + int moe_dense_weight_index = 0; // the moe inter and out kernel has the same index + + for (int i = 0; i < layer_num_; ++i) { + int local_num_layer = (int)(ceil(layer_num_ * 1.0f / pipeline_para_.world_size_)); + if (!(i < layer_num_ && (i >= local_num_layer * pipeline_para_.rank_) + && (i < local_num_layer * (pipeline_para_.rank_ + 1)))) { + continue; + } + + auto const layer_index = i - local_num_layer * pipeline_para_.rank_; + auto* const decoder_layer_weights = decoding_weights.decoder_layer_weights[i]; + auto const world_size = tensor_para_.world_size_; + + decoder_layer_weights->pre_layernorm_weights.gamma = get_ptr(_weights[0]) + layer_index * d_model; + decoder_layer_weights->self_attention_weights.query_weight.kernel = + get_ptr(_weights[1]) + layer_index * d_model * 3 * hidden_dim / world_size; + decoder_layer_weights->self_attention_weights.attention_output_weight.kernel = + get_ptr(_weights[2]) + layer_index * hidden_dim / world_size * d_model; + decoder_layer_weights->self_attn_layernorm_weights.gamma = get_ptr(_weights[3]) + layer_index * d_model; + decoder_layer_weights->cross_attention_weights.query_weight.kernel = + get_ptr(_weights[4]) + layer_index * d_model * hidden_dim / world_size; + decoder_layer_weights->cross_attention_weights.key_weight.kernel = + get_ptr(_weights[5]) + layer_index * mem_d_model * hidden_dim / world_size; + decoder_layer_weights->cross_attention_weights.value_weight.kernel = + get_ptr(_weights[6]) + layer_index * mem_d_model * hidden_dim / world_size; + decoder_layer_weights->cross_attention_weights.attention_output_weight.kernel = + get_ptr(_weights[7]) + layer_index * hidden_dim / world_size * d_model; + decoder_layer_weights->cross_attn_layernorm_weights.gamma = get_ptr(_weights[8]) + layer_index * d_model; + decoder_layer_weights->ffn_weights.intermediate_weight.kernel = + get_ptr(_weights[9]) + dense_weight_index * d_model * inter_size_ / world_size + + moe_dense_weight_index * expert_num_ * d_model * inter_size_ / world_size; + + if (use_gated_activation) { + decoder_layer_weights->ffn_weights.intermediate_weight2.kernel = + get_ptr(_weights[10]) + dense_weight_index * d_model * inter_size_ / world_size; + } + + decoder_layer_weights->ffn_weights.output_weight.kernel = + get_ptr(_weights[11]) + dense_weight_index * inter_size_ / world_size * d_model + + moe_dense_weight_index * expert_num_ * inter_size_ / world_size * d_model; + + if (t5_with_bias_) { + decoder_layer_weights->pre_layernorm_weights.beta = get_ptr(_weights[16]) + layer_index * d_model; + decoder_layer_weights->self_attention_weights.query_weight.bias = + get_ptr(_weights[17]) + layer_index * 3 * hidden_dim / world_size; + decoder_layer_weights->self_attention_weights.attention_output_weight.bias = + get_ptr(_weights[18]) + layer_index * d_model; + decoder_layer_weights->self_attn_layernorm_weights.beta = get_ptr(_weights[19]) + layer_index * d_model; + decoder_layer_weights->cross_attention_weights.query_weight.bias = + get_ptr(_weights[20]) + layer_index * hidden_dim / world_size; + decoder_layer_weights->cross_attention_weights.key_weight.bias = + get_ptr(_weights[21]) + layer_index * hidden_dim / world_size; + decoder_layer_weights->cross_attention_weights.value_weight.bias = + get_ptr(_weights[22]) + layer_index * hidden_dim / world_size; + decoder_layer_weights->cross_attention_weights.attention_output_weight.bias = + get_ptr(_weights[23]) + layer_index * d_model; + decoder_layer_weights->cross_attn_layernorm_weights.beta = get_ptr(_weights[24]) + layer_index * d_model; + decoder_layer_weights->ffn_weights.intermediate_weight.bias = + get_ptr(_weights[25]) + dense_weight_index * inter_size_ / world_size + + moe_dense_weight_index * expert_num_ * inter_size_ / world_size; + + if (use_gated_activation) { + decoder_layer_weights->ffn_weights.intermediate_weight2.bias = + get_ptr(_weights[26]) + layer_index * inter_size_ / world_size; + } + + decoder_layer_weights->ffn_weights.output_weight.bias = get_ptr(_weights[27]) + + dense_weight_index * d_model + + moe_dense_weight_index * expert_num_ * d_model; + } + + if (std::find(moe_layer_index.begin(), moe_layer_index.end(), i) == moe_layer_index.end()) { + dense_weight_index += 1; + } + + if (std::find(moe_layer_index.begin(), moe_layer_index.end(), i) != moe_layer_index.end()) { + decoder_layer_weights->ffn_weights.gating_weight.kernel = + get_ptr(_weights[30]) + moe_dense_weight_index * d_model * expert_num_; + moe_dense_weight_index += 1; + } + + if (adapter_inter_size_ > 0) { + auto& adapter_weights = decoder_layer_weights->adapter_weights_; + adapter_weights.setAdapterInterSize(adapter_inter_size_); + auto& attn_adapter_weights = adapter_weights.after_attention_adapter_weights_; + attn_adapter_weights.input_weight().kernel = + get_ptr(_weights[31]) + layer_index * d_model * adapter_inter_size_ / world_size; + attn_adapter_weights.output_weight().kernel = + get_ptr(_weights[32]) + layer_index * d_model * adapter_inter_size_ / world_size; + attn_adapter_weights.layer_norm_weight.gamma = get_ptr(_weights[33]) + layer_index * d_model; + attn_adapter_weights.layer_norm_weight.beta = get_ptr(_weights[34]) + layer_index * d_model; + auto& ffn_adapter_weights = adapter_weights.after_ffn_adapter_weights_; + ffn_adapter_weights.input_weight().kernel = + get_ptr(_weights[35]) + layer_index * d_model * adapter_inter_size_ / world_size; + ffn_adapter_weights.output_weight().kernel = + get_ptr(_weights[36]) + layer_index * d_model * adapter_inter_size_ / world_size; + ffn_adapter_weights.layer_norm_weight.gamma = get_ptr(_weights[37]) + layer_index * d_model; + ffn_adapter_weights.layer_norm_weight.beta = get_ptr(_weights[38]) + layer_index * d_model; + } + } + decoding_weights.post_decoder_layernorm.gamma = get_ptr(_weights[12]); + decoding_weights.pre_decoder_embedding_table = get_ptr(_weights[13]); + decoding_weights.post_decoder_embedding.kernel = get_ptr(_weights[14]); + decoding_weights.absolute_or_relative_position_embedding = get_ptr(_weights[15]); + if (t5_with_bias_) { + decoding_weights.post_decoder_layernorm.beta = get_ptr(_weights[28]); + decoding_weights.post_decoder_embedding.bias = get_ptr(_weights[29]); + } + int device_id = 0; + ft::check_cuda_error(cudaGetDevice(&device_id)); + ft::check_cuda_error(cudaGetDeviceProperties(&prop_, device_id)); +} + +template +std::vector FTT5Decoding::forward(th::optional beam_width_opt, + size_t max_seq_len, + th::optional top_k_opt, + th::optional top_p_opt, + th::optional beam_search_diversity_rate_opt, + th::optional temperature_opt, + th::optional len_penalty_opt, + th::optional repetition_penalty_opt, + th::optional presence_penalty_opt, + th::optional min_length_opt, + th::optional random_seed_opt, + th::Tensor memory, + th::Tensor memory_seq_lens, + th::optional is_return_output_log_probs_opt, + th::optional is_return_cum_log_probs_opt, + th::optional is_return_cross_attentions_opt, + th::optional bad_words_list_opt, + th::optional stop_words_list_opt) +{ + // input validation + size_t beam_width = beam_width_opt.has_value() ? (size_t)beam_width_opt.value() : 1; + uint top_k = top_k_opt.has_value() ? (uint)top_k_opt.value() : 1; + float top_p = top_p_opt.has_value() ? (float)top_p_opt.value() : 0.0f; + float beam_search_diversity_rate = + beam_search_diversity_rate_opt.has_value() ? (float)beam_search_diversity_rate_opt.value() : 0.0f; + float temperature = temperature_opt.has_value() ? (float)temperature_opt.value() : 1.0f; + float len_penalty = len_penalty_opt.has_value() ? (float)len_penalty_opt.value() : 0.0f; + float repetition_penalty = repetition_penalty_opt.has_value() ? (float)repetition_penalty_opt.value() : 1.0f; + float presence_penalty = presence_penalty_opt.has_value() ? (float)presence_penalty_opt.value() : 0.0f; + int min_length = min_length_opt.has_value() ? (int)min_length_opt.value() : 0; + unsigned long long random_seed = random_seed_opt.has_value() ? (unsigned long long)random_seed_opt.value() : 0; + bool is_return_output_log_probs = + is_return_output_log_probs_opt.has_value() ? (bool)is_return_output_log_probs_opt.value() : false; + bool is_return_cum_log_probs = + is_return_cum_log_probs_opt.has_value() ? (bool)is_return_cum_log_probs_opt.value() : false; + bool is_return_cross_attentions = + is_return_cross_attentions_opt.has_value() ? (bool)is_return_cross_attentions_opt.value() : false; + + auto stream = at::cuda::getCurrentCUDAStream().stream(); + cublasHandle_t cublasHandle = at::cuda::getCurrentCUDABlasHandle(); + cublasSetStream(cublasHandle, stream); + ft::Allocator allocator = ft::Allocator(); + ft::cublasMMWrapper cublas_wrapper = + ft::cublasMMWrapper(cublasHandle, cublasltHandle_, stream, cublas_algo_map_, cublas_wrapper_mutex_, &allocator); + + if (std::is_same::value) { + cublas_wrapper.setFP16GemmConfig(); + } +#ifdef ENABLE_BF16 + else if (std::is_same::value) { + cublas_wrapper.setBF16GemmConfig(); + } +#endif + else if (std::is_same::value) { + cublas_wrapper.setFP32GemmConfig(); + } + + const size_t batch_size = (size_t)memory.size(0); + const size_t mem_max_seq_len = (size_t)memory.size(1); + + ft::T5Decoding decoding = + ft::T5Decoding(batch_size, + max_seq_len, + mem_max_seq_len, + beam_width, + head_num_, + size_per_head_, + inter_size_, + d_model_, + layer_num_, + vocab_size_, + num_bucket_, + expert_num_, + max_distance_, + moe_k_, + q_scaling_, + start_id_, + end_id_, + beam_search_diversity_rate, + top_k, + top_p, + temperature, + len_penalty, + repetition_penalty, + moe_layer_index_, + stream, + &cublas_wrapper, + &allocator, + false, + &prop_, + tensor_para_, + pipeline_para_, + activation_type_, + tie_word_embeddings_, + nullptr, + 0, + ft::LinearAdapterConfig{adapter_inter_size_, adapter_layer_norm_type_}); + ft::DataType data_type = ft::getTensorType(); + + ft::TensorMap input_tensors( + {{"encoder_output", + ft::Tensor{ft::MEMORY_GPU, + data_type, + std::vector{(size_t)memory.size(0), (size_t)memory.size(1), (size_t)memory.size(2)}, + get_ptr(memory)}}, + {"encoder_sequence_length", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{(size_t)memory_seq_lens.size(0)}, + get_ptr(memory_seq_lens)}}}); + + if (beam_width > 1) { + input_tensors.insert( + {"beam_search_diversity_rate", + ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &beam_search_diversity_rate}}); + } + if (top_p_opt.has_value()) { + input_tensors.insert( + {"runtime_top_p", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &top_p}}); + } + if (top_k_opt.has_value()) { + input_tensors.insert( + {"runtime_top_k", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_UINT32, std::vector{1}, &top_k}}); + } + if (temperature_opt.has_value()) { + input_tensors.insert( + {"temperature", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &temperature}}); + } + if (len_penalty_opt.has_value()) { + input_tensors.insert( + {"len_penalty", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &len_penalty}}); + } + if (repetition_penalty_opt.has_value()) { + input_tensors.insert({"repetition_penalty", + ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &repetition_penalty}}); + } + if (presence_penalty_opt.has_value()) { + input_tensors.insert( + {"presence_penalty", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &presence_penalty}}); + } + if (min_length_opt.has_value()) { + input_tensors.insert( + {"min_length", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_INT32, std::vector{1}, &min_length}}); + } + if (random_seed_opt.has_value()) { + input_tensors.insert( + {"random_seed", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_UINT64, std::vector{1}, &random_seed}}); + } + if (stop_words_list_opt.has_value()) { + input_tensors.insert({"stop_words_list", convert_tensor(stop_words_list_opt.value())}); + } + if (bad_words_list_opt.has_value()) { + input_tensors.insert({"bad_words_list", convert_tensor(bad_words_list_opt.value())}); + } + + auto output_ids = torch::empty({(long int)(batch_size * beam_width * max_seq_len)}, + torch::dtype(torch::kInt32).device(torch::kCUDA).requires_grad(false)); + auto sequence_length = torch::empty({(long int)(batch_size * beam_width)}, + torch::dtype(torch::kInt32).device(torch::kCUDA).requires_grad(false)); + + std::vector th_output_tensors = {output_ids, sequence_length}; + + ft::TensorMap output_tensors({{"output_ids", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{batch_size, beam_width, max_seq_len}, + get_ptr(output_ids)}}, + {"sequence_length", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{batch_size, beam_width}, + get_ptr(sequence_length)}}}); + + if (is_return_output_log_probs) { + auto output_log_probs = torch::empty({batch_size, beam_width, max_seq_len}, + torch::dtype(torch::kFloat).device(torch::kCUDA).requires_grad(false)); + output_tensors.insert({"output_log_probs", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_FP32, + {batch_size, beam_width, max_seq_len}, + get_ptr(output_log_probs)}}); + th_output_tensors.push_back(output_log_probs); + } + if (is_return_cum_log_probs) { + auto cum_log_probs = torch::empty({(long int)(batch_size * beam_width)}, + torch::dtype(torch::kFloat).device(torch::kCUDA).requires_grad(false)); + output_tensors.insert( + {"cum_log_probs", + ft::Tensor{ft::MEMORY_GPU, ft::TYPE_FP32, {batch_size, beam_width}, get_ptr(cum_log_probs)}}); + th_output_tensors.push_back(cum_log_probs); + } + if (is_return_cross_attentions) { + auto cross_attentions = + torch::empty({(long int)(ceil(layer_num_ * 1.0 / pipeline_para_.world_size_) * batch_size * beam_width + * (head_num_ / tensor_para_.world_size_) * max_seq_len * mem_max_seq_len)}, + torch::dtype(torch::kFloat).device(torch::kCUDA).requires_grad(false)); + output_tensors.insert({"cross_attentions", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_FP32, + {(size_t)(layer_num_ / pipeline_para_.world_size_), + (size_t)batch_size, + (size_t)beam_width, + (size_t)(head_num_ / tensor_para_.world_size_), + (size_t)max_seq_len, + (size_t)mem_max_seq_len}, + get_ptr(cross_attentions)}}); + th_output_tensors.push_back(cross_attentions); + } + + decoding.forward(&output_tensors, &input_tensors, &decoding_weights); + return th_output_tensors; +} + +template class FTT5Decoding; +template class FTT5Decoding; +#ifdef ENABLE_BF16 +template class FTT5Decoding<__nv_bfloat16>; +#endif + FasterTransformerT5Decoding::FasterTransformerT5Decoding(int64_t head_num, int64_t size_per_head, int64_t inter_size, @@ -40,6 +433,8 @@ FasterTransformerT5Decoding::FasterTransformerT5Decoding(int64_t he int64_t moe_k, std::string activation_type, bool tie_word_embeddings, + int64_t adapter_inter_size, + std::string adapter_norm_position, std::vector moe_layer_index, th::Tensor self_layernorm_gamma, th::Tensor self_kernel_q, @@ -71,7 +466,15 @@ FasterTransformerT5Decoding::FasterTransformerT5Decoding(int64_t he th::Tensor output_bias, th::Tensor decoding_beta, th::Tensor embedding_bias, - th::Tensor moe_gate): + th::Tensor moe_gate, + th::Tensor after_attn_adapter_weight_in, + th::Tensor after_attn_adapter_weight_out, + th::Tensor after_attn_adapter_layernorm_gamma, + th::Tensor after_attn_adapter_layernorm_beta, + th::Tensor after_ffn_adapter_weight_in, + th::Tensor after_ffn_adapter_weight_out, + th::Tensor after_ffn_adapter_layernorm_gamma, + th::Tensor after_ffn_adapter_layernorm_beta): _st(self_layernorm_gamma.scalar_type()), weights{self_layernorm_gamma, self_kernel_q, @@ -103,7 +506,15 @@ FasterTransformerT5Decoding::FasterTransformerT5Decoding(int64_t he output_bias, decoding_beta, embedding_bias, - moe_gate} + moe_gate, + after_attn_adapter_weight_in, + after_attn_adapter_weight_out, + after_attn_adapter_layernorm_gamma, + after_attn_adapter_layernorm_beta, + after_ffn_adapter_weight_in, + after_ffn_adapter_weight_out, + after_ffn_adapter_layernorm_gamma, + after_ffn_adapter_layernorm_beta} { CHECK_INPUT(self_layernorm_gamma, _st); // layer_num, d_model CHECK_INPUT(self_kernel_q, _st); // layer_num, d_model, 3 * hidden_dim @@ -140,6 +551,9 @@ FasterTransformerT5Decoding::FasterTransformerT5Decoding(int64_t he if (expert_num != 0) { CHECK_INPUT(moe_gate, _st); // hidden_dim, expert_num } + auto const adapter_layer_norm_type = + ft::LinearAdapterConfig::toLayerNormType(adapter_norm_position.empty() ? "pre" : adapter_norm_position); + switch (_st) { case at::ScalarType::Float: ftdecoding = new torch_ext::FTT5Decoding(head_num, @@ -162,8 +576,10 @@ FasterTransformerT5Decoding::FasterTransformerT5Decoding(int64_t he ft::PositionEmbeddingType(position_embedding_type), ft::getActivationType(activation_type), tie_word_embeddings, - weights, - moe_layer_index); + adapter_inter_size, + adapter_layer_norm_type, + moe_layer_index, + weights); break; case at::ScalarType::Half: ftdecoding = new torch_ext::FTT5Decoding(head_num, @@ -186,8 +602,10 @@ FasterTransformerT5Decoding::FasterTransformerT5Decoding(int64_t he ft::PositionEmbeddingType(position_embedding_type), ft::getActivationType(activation_type), tie_word_embeddings, - weights, - moe_layer_index); + adapter_inter_size, + adapter_layer_norm_type, + moe_layer_index, + weights); break; #ifdef ENABLE_BF16 case at::ScalarType::BFloat16: @@ -211,8 +629,10 @@ FasterTransformerT5Decoding::FasterTransformerT5Decoding(int64_t he ft::PositionEmbeddingType(position_embedding_type), ft::getActivationType(activation_type), tie_word_embeddings, - weights, - moe_layer_index); + adapter_inter_size, + adapter_layer_norm_type, + moe_layer_index, + weights); break; #endif default: @@ -233,6 +653,8 @@ std::vector FasterTransformerT5Decoding::forward(th::optional temperature, th::optional len_penalty, th::optional repetition_penalty, + th::optional presence_penalty, + th::optional min_length, th::optional random_seed, th::Tensor memory, th::Tensor memory_seq_lens, @@ -255,6 +677,8 @@ std::vector FasterTransformerT5Decoding::forward(th::optional, th::Tensor, th::Tensor, @@ -331,5 +757,13 @@ static auto fasterTransformerT5DecodingTHS = th::Tensor, th::Tensor, th::Tensor, + th::Tensor, + th::Tensor, + th::Tensor, + th::Tensor, + th::Tensor, + th::Tensor, + th::Tensor, + th::Tensor, th::Tensor>()) .def("forward", &torch_ext::FasterTransformerT5Decoding::forward); diff --git a/src/fastertransformer/th_op/t5/T5DecodingOp.h b/src/fastertransformer/th_op/t5/T5DecodingOp.h index 8ada5bbde..dbaac9252 100644 --- a/src/fastertransformer/th_op/t5/T5DecodingOp.h +++ b/src/fastertransformer/th_op/t5/T5DecodingOp.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -25,7 +25,7 @@ namespace torch_ext { class IFTT5Decoding { public: - virtual ~IFTT5Decoding() {} + virtual ~IFTT5Decoding() = default; virtual std::vector forward(th::optional beam_width_opt, size_t max_seq_len, th::optional top_k_opt, @@ -34,6 +34,8 @@ class IFTT5Decoding { th::optional temperature_opt, th::optional len_penalty_opt, th::optional repetition_penalty_opt, + th::optional presence_penalty_opt, + th::optional min_length_opt, th::optional random_seed_opt, th::Tensor memory, th::Tensor memory_seq_lens, @@ -67,136 +69,10 @@ class FTT5Decoding: public IFTT5Decoding { ft::PositionEmbeddingType position_embedding_type, ft::ActivationType activation_type, bool tie_word_embeddings, - const std::vector& w, - std::vector moe_layer_index): - head_num_(head_num), - size_per_head_(size_per_head), - inter_size_(inter_size), - mem_d_model_(mem_d_model), - d_model_(d_model), - layer_num_(layer_num), - vocab_size_(vocab_size), - num_bucket_(num_bucket), - expert_num_(expert_num), - max_distance_(max_distance), - q_scaling_(q_scaling), - start_id_(start_id), - end_id_(end_id), - t5_with_bias_(t5_with_bias), - moe_k_(moe_k), - position_embedding_type_(position_embedding_type), - moe_layer_index_(moe_layer_index), - activation_type_(activation_type), - tie_word_embeddings_(tie_word_embeddings), - _weights(w) - { - bool use_gated_activation = isGatedActivation(activation_type_); - ft::ftNcclInitialize(tensor_para_, pipeline_para_, tensor_para_size, pipeline_para_size); - - ft::check_cuda_error(cublasLtCreate(&cublasltHandle_)); - cublas_algo_map_ = new ft::cublasAlgoMap("gemm_config.in"); - cublas_wrapper_mutex_ = new std::mutex(); - - decoding_weights.resizeLayer(layer_num_); - decoding_weights.setT5StructureDiff(t5_with_bias, use_gated_activation, position_embedding_type); - const int hidden_dim = head_num_ * size_per_head_; - - int dense_weight_index = 0; // the inter and out kernel has the same index - int moe_dense_weight_index = 0; // the moe inter and out kernel has the same index - - for (int i = 0; i < layer_num_; ++i) { - int local_num_layer = (int)(ceil(layer_num_ * 1.0f / pipeline_para_.world_size_)); - if (!(i < layer_num_ && (i >= local_num_layer * pipeline_para_.rank_) - && (i < local_num_layer * (pipeline_para_.rank_ + 1)))) { - continue; - } - const int first_layer_index = local_num_layer * pipeline_para_.rank_; - - decoding_weights.decoder_layer_weights[i]->pre_layernorm_weights.gamma = - get_ptr(_weights[0]) + (i - first_layer_index) * d_model; - decoding_weights.decoder_layer_weights[i]->self_attention_weights.query_weight.kernel = - get_ptr(_weights[1]) + (i - first_layer_index) * d_model * 3 * hidden_dim / tensor_para_.world_size_; - decoding_weights.decoder_layer_weights[i]->self_attention_weights.attention_output_weight.kernel = - get_ptr(_weights[2]) + (i - first_layer_index) * hidden_dim / tensor_para_.world_size_ * d_model; - decoding_weights.decoder_layer_weights[i]->self_attn_layernorm_weights.gamma = - get_ptr(_weights[3]) + (i - first_layer_index) * d_model; - decoding_weights.decoder_layer_weights[i]->cross_attention_weights.query_weight.kernel = - get_ptr(_weights[4]) + (i - first_layer_index) * d_model * hidden_dim / tensor_para_.world_size_; - decoding_weights.decoder_layer_weights[i]->cross_attention_weights.key_weight.kernel = - get_ptr(_weights[5]) + (i - first_layer_index) * mem_d_model * hidden_dim / tensor_para_.world_size_; - decoding_weights.decoder_layer_weights[i]->cross_attention_weights.value_weight.kernel = - get_ptr(_weights[6]) + (i - first_layer_index) * mem_d_model * hidden_dim / tensor_para_.world_size_; - decoding_weights.decoder_layer_weights[i]->cross_attention_weights.attention_output_weight.kernel = - get_ptr(_weights[7]) + (i - first_layer_index) * hidden_dim / tensor_para_.world_size_ * d_model; - decoding_weights.decoder_layer_weights[i]->cross_attn_layernorm_weights.gamma = - get_ptr(_weights[8]) + (i - first_layer_index) * d_model; - decoding_weights.decoder_layer_weights[i]->ffn_weights.intermediate_weight.kernel = - get_ptr(_weights[9]) + dense_weight_index * d_model * inter_size_ / tensor_para_.world_size_ - + moe_dense_weight_index * expert_num_ * d_model * inter_size_ / tensor_para_.world_size_; - - if (use_gated_activation) { - decoding_weights.decoder_layer_weights[i]->ffn_weights.intermediate_weight2.kernel = - get_ptr(_weights[10]) + dense_weight_index * d_model * inter_size_ / tensor_para_.world_size_; - } - - decoding_weights.decoder_layer_weights[i]->ffn_weights.output_weight.kernel = - get_ptr(_weights[11]) + dense_weight_index * inter_size_ / tensor_para_.world_size_ * d_model - + moe_dense_weight_index * expert_num_ * inter_size_ / tensor_para_.world_size_ * d_model; - - if (t5_with_bias_) { - decoding_weights.decoder_layer_weights[i]->pre_layernorm_weights.beta = - get_ptr(_weights[16]) + (i - first_layer_index) * d_model; - decoding_weights.decoder_layer_weights[i]->self_attention_weights.query_weight.bias = - get_ptr(_weights[17]) + (i - first_layer_index) * 3 * hidden_dim / tensor_para_.world_size_; - decoding_weights.decoder_layer_weights[i]->self_attention_weights.attention_output_weight.bias = - get_ptr(_weights[18]) + (i - first_layer_index) * d_model; - decoding_weights.decoder_layer_weights[i]->self_attn_layernorm_weights.beta = - get_ptr(_weights[19]) + (i - first_layer_index) * d_model; - decoding_weights.decoder_layer_weights[i]->cross_attention_weights.query_weight.bias = - get_ptr(_weights[20]) + (i - first_layer_index) * hidden_dim / tensor_para_.world_size_; - decoding_weights.decoder_layer_weights[i]->cross_attention_weights.key_weight.bias = - get_ptr(_weights[21]) + (i - first_layer_index) * hidden_dim / tensor_para_.world_size_; - decoding_weights.decoder_layer_weights[i]->cross_attention_weights.value_weight.bias = - get_ptr(_weights[22]) + (i - first_layer_index) * hidden_dim / tensor_para_.world_size_; - decoding_weights.decoder_layer_weights[i]->cross_attention_weights.attention_output_weight.bias = - get_ptr(_weights[23]) + (i - first_layer_index) * d_model; - decoding_weights.decoder_layer_weights[i]->cross_attn_layernorm_weights.beta = - get_ptr(_weights[24]) + (i - first_layer_index) * d_model; - decoding_weights.decoder_layer_weights[i]->ffn_weights.intermediate_weight.bias = - get_ptr(_weights[25]) + dense_weight_index * inter_size_ / tensor_para_.world_size_ - + moe_dense_weight_index * expert_num_ * inter_size_ / tensor_para_.world_size_; - - if (use_gated_activation) { - decoding_weights.decoder_layer_weights[i]->ffn_weights.intermediate_weight2.bias = - get_ptr(_weights[26]) + (i - first_layer_index) * inter_size_ / tensor_para_.world_size_; - } - - decoding_weights.decoder_layer_weights[i]->ffn_weights.output_weight.bias = - get_ptr(_weights[27]) + dense_weight_index * d_model - + moe_dense_weight_index * expert_num_ * d_model; - } - if (std::find(moe_layer_index.begin(), moe_layer_index.end(), i) == moe_layer_index.end()) { - dense_weight_index += 1; - } - - if (std::find(moe_layer_index.begin(), moe_layer_index.end(), i) != moe_layer_index.end()) { - decoding_weights.decoder_layer_weights[i]->ffn_weights.gating_weight.kernel = - get_ptr(_weights[30]) + moe_dense_weight_index * d_model * expert_num_; - moe_dense_weight_index += 1; - } - } - decoding_weights.post_decoder_layernorm.gamma = get_ptr(_weights[12]); - decoding_weights.pre_decoder_embedding_table = get_ptr(_weights[13]); - decoding_weights.post_decoder_embedding.kernel = get_ptr(_weights[14]); - decoding_weights.absolute_or_relative_position_embedding = get_ptr(_weights[15]); - if (t5_with_bias_) { - decoding_weights.post_decoder_layernorm.beta = get_ptr(_weights[28]); - decoding_weights.post_decoder_embedding.bias = get_ptr(_weights[29]); - } - int device_id = 0; - ft::check_cuda_error(cudaGetDevice(&device_id)); - ft::check_cuda_error(cudaGetDeviceProperties(&prop_, device_id)); - } + int64_t adapter_inter_size, + ft::LayerNormType adapter_layer_norm_type, + std::vector moe_layer_index, + const std::vector& w); ~FTT5Decoding() override { @@ -215,6 +91,8 @@ class FTT5Decoding: public IFTT5Decoding { th::optional temperature_opt, th::optional len_penalty_opt, th::optional repetition_penalty_opt, + th::optional presence_penalty_opt, + th::optional min_length_opt, th::optional random_seed_opt, th::Tensor memory, th::Tensor memory_seq_lens, @@ -222,188 +100,7 @@ class FTT5Decoding: public IFTT5Decoding { th::optional is_return_cum_log_probs_opt, th::optional is_return_cross_attentions_opt, th::optional bad_words_list_opt, - th::optional stop_words_list_opt) override - { - // input validation - size_t beam_width = beam_width_opt.has_value() ? (size_t)beam_width_opt.value() : 1; - uint top_k = top_k_opt.has_value() ? (uint)top_k_opt.value() : 1; - float top_p = top_p_opt.has_value() ? (float)top_p_opt.value() : 0.0f; - float beam_search_diversity_rate = - beam_search_diversity_rate_opt.has_value() ? (float)beam_search_diversity_rate_opt.value() : 0.0f; - float temperature = temperature_opt.has_value() ? (float)temperature_opt.value() : 1.0f; - float len_penalty = len_penalty_opt.has_value() ? (float)len_penalty_opt.value() : 0.0f; - float repetition_penalty = repetition_penalty_opt.has_value() ? (float)repetition_penalty_opt.value() : 1.0f; - unsigned long long random_seed = random_seed_opt.has_value() ? (unsigned long long)random_seed_opt.value() : 0; - bool is_return_output_log_probs = - is_return_output_log_probs_opt.has_value() ? (bool)is_return_output_log_probs_opt.value() : false; - bool is_return_cum_log_probs = - is_return_cum_log_probs_opt.has_value() ? (bool)is_return_cum_log_probs_opt.value() : false; - bool is_return_cross_attentions = - is_return_cross_attentions_opt.has_value() ? (bool)is_return_cross_attentions_opt.value() : false; - - auto stream = at::cuda::getCurrentCUDAStream().stream(); - cublasHandle_t cublasHandle = at::cuda::getCurrentCUDABlasHandle(); - cublasSetStream(cublasHandle, stream); - ft::Allocator allocator = ft::Allocator(); - ft::cublasMMWrapper cublas_wrapper = ft::cublasMMWrapper( - cublasHandle, cublasltHandle_, stream, cublas_algo_map_, cublas_wrapper_mutex_, &allocator); - - if (std::is_same::value) { - cublas_wrapper.setFP16GemmConfig(); - } -#ifdef ENABLE_BF16 - else if (std::is_same::value) { - cublas_wrapper.setBF16GemmConfig(); - } -#endif - else if (std::is_same::value) { - cublas_wrapper.setFP32GemmConfig(); - } - - const size_t batch_size = (size_t)memory.size(0); - const size_t mem_max_seq_len = (size_t)memory.size(1); - - ft::T5Decoding decoding = ft::T5Decoding(batch_size, - max_seq_len, - mem_max_seq_len, - beam_width, - head_num_, - size_per_head_, - inter_size_, - d_model_, - layer_num_, - vocab_size_, - num_bucket_, - expert_num_, - max_distance_, - moe_k_, - q_scaling_, - start_id_, - end_id_, - beam_search_diversity_rate, - top_k, - top_p, - temperature, - len_penalty, - repetition_penalty, - moe_layer_index_, - stream, - &cublas_wrapper, - &allocator, - false, - &prop_, - tensor_para_, - pipeline_para_, - activation_type_, - tie_word_embeddings_); - ft::DataType data_type = ft::getTensorType(); - - ft::TensorMap input_tensors( - {{"encoder_output", - ft::Tensor{ft::MEMORY_GPU, - data_type, - std::vector{(size_t)memory.size(0), (size_t)memory.size(1), (size_t)memory.size(2)}, - get_ptr(memory)}}, - {"encoder_sequence_length", - ft::Tensor{ft::MEMORY_GPU, - ft::TYPE_INT32, - std::vector{(size_t)memory_seq_lens.size(0)}, - get_ptr(memory_seq_lens)}}}); - - if (beam_width > 1) { - input_tensors.insert( - {"beam_search_diversity_rate", - ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &beam_search_diversity_rate}}); - } - if (top_p_opt.has_value()) { - input_tensors.insert( - {"runtime_top_p", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &top_p}}); - } - if (top_k_opt.has_value()) { - input_tensors.insert( - {"runtime_top_k", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_UINT32, std::vector{1}, &top_k}}); - } - if (temperature_opt.has_value()) { - input_tensors.insert( - {"temperature", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &temperature}}); - } - if (len_penalty_opt.has_value()) { - input_tensors.insert( - {"len_penalty", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &len_penalty}}); - } - if (repetition_penalty_opt.has_value()) { - input_tensors.insert( - {"repetition_penalty", - ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &repetition_penalty}}); - } - if (random_seed_opt.has_value()) { - input_tensors.insert( - {"random_seed", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_UINT64, std::vector{1}, &random_seed}}); - } - if (stop_words_list_opt.has_value()) { - input_tensors.insert({"stop_words_list", convert_tensor(stop_words_list_opt.value())}); - } - if (bad_words_list_opt.has_value()) { - input_tensors.insert({"bad_words_list", convert_tensor(bad_words_list_opt.value())}); - } - - auto output_ids = torch::empty({(long int)(batch_size * beam_width * max_seq_len)}, - torch::dtype(torch::kInt32).device(torch::kCUDA).requires_grad(false)); - auto sequence_length = torch::empty({(long int)(batch_size * beam_width)}, - torch::dtype(torch::kInt32).device(torch::kCUDA).requires_grad(false)); - - std::vector th_output_tensors = {output_ids, sequence_length}; - - ft::TensorMap output_tensors({{"output_ids", - ft::Tensor{ft::MEMORY_GPU, - ft::TYPE_INT32, - std::vector{batch_size, beam_width, max_seq_len}, - get_ptr(output_ids)}}, - {"sequence_length", - ft::Tensor{ft::MEMORY_GPU, - ft::TYPE_INT32, - std::vector{batch_size, beam_width}, - get_ptr(sequence_length)}}}); - - if (is_return_output_log_probs) { - auto output_log_probs = torch::empty({batch_size, beam_width, max_seq_len}, - torch::dtype(torch::kFloat).device(torch::kCUDA).requires_grad(false)); - output_tensors.insert({"output_log_probs", - ft::Tensor{ft::MEMORY_GPU, - ft::TYPE_FP32, - {batch_size, beam_width, max_seq_len}, - get_ptr(output_log_probs)}}); - th_output_tensors.push_back(output_log_probs); - } - if (is_return_cum_log_probs) { - auto cum_log_probs = torch::empty({(long int)(batch_size * beam_width)}, - torch::dtype(torch::kFloat).device(torch::kCUDA).requires_grad(false)); - output_tensors.insert( - {"cum_log_probs", - ft::Tensor{ft::MEMORY_GPU, ft::TYPE_FP32, {batch_size, beam_width}, get_ptr(cum_log_probs)}}); - th_output_tensors.push_back(cum_log_probs); - } - if (is_return_cross_attentions) { - auto cross_attentions = - torch::empty({(long int)(ceil(layer_num_ * 1.0 / pipeline_para_.world_size_) * batch_size * beam_width - * (head_num_ / tensor_para_.world_size_) * max_seq_len * mem_max_seq_len)}, - torch::dtype(torch::kFloat).device(torch::kCUDA).requires_grad(false)); - output_tensors.insert({"cross_attentions", - ft::Tensor{ft::MEMORY_GPU, - ft::TYPE_FP32, - {(size_t)(layer_num_ / pipeline_para_.world_size_), - (size_t)batch_size, - (size_t)beam_width, - (size_t)(head_num_ / tensor_para_.world_size_), - (size_t)max_seq_len, - (size_t)mem_max_seq_len}, - get_ptr(cross_attentions)}}); - th_output_tensors.push_back(cross_attentions); - } - - decoding.forward(&output_tensors, &input_tensors, &decoding_weights); - return th_output_tensors; - } + th::optional stop_words_list_opt) override; private: const int64_t head_num_; @@ -424,6 +121,8 @@ class FTT5Decoding: public IFTT5Decoding { const ft::PositionEmbeddingType position_embedding_type_; const ft::ActivationType activation_type_; const bool tie_word_embeddings_; + int64_t adapter_inter_size_; + ft::LayerNormType adapter_layer_norm_type_; std::vector moe_layer_index_; std::vector _weights; @@ -459,38 +158,49 @@ class FasterTransformerT5Decoding: public torch::jit::CustomClassHolder { int64_t moe_k, std::string activaiton_type, bool tie_word_embeddings, + int64_t adapter_inter_size, + std::string adapter_norm_position, std::vector moe_layer_index, - th::Tensor self_layernorm_gamma, - th::Tensor self_kernel_qkv, - th::Tensor self_output_kernel, - th::Tensor cross_layernorm_gamma, - th::Tensor cross_kernel_q, - th::Tensor cross_kernel_k, - th::Tensor cross_kernel_v, - th::Tensor cross_output_kernel, - th::Tensor ffn_layernorm_gamma, - th::Tensor inter_kernel, - th::Tensor inter_kernel2, - th::Tensor output_kernel, - th::Tensor decoding_gamma, - th::Tensor embedding_table, - th::Tensor lm_head, - th::Tensor absolute_or_relative_position_embedding, - th::Tensor self_layernorm_beta, - th::Tensor self_bias_qkv, - th::Tensor self_output_bias, - th::Tensor cross_layernorm_beta, - th::Tensor cross_bias_q, - th::Tensor cross_bias_k, - th::Tensor cross_bias_v, - th::Tensor cross_output_bias, - th::Tensor ffn_layernorm_beta, - th::Tensor inter_bias, - th::Tensor inter_bias2, - th::Tensor output_bias, - th::Tensor decoding_beta, - th::Tensor embedding_bias, - th::Tensor moe_gate); + th::Tensor self_layernorm_gamma, // 0 + th::Tensor self_kernel_qkv, // 1 + th::Tensor self_output_kernel, // 2 + th::Tensor cross_layernorm_gamma, // 3 + th::Tensor cross_kernel_q, // 4 + th::Tensor cross_kernel_k, // 5 + th::Tensor cross_kernel_v, // 6 + th::Tensor cross_output_kernel, // 7 + th::Tensor ffn_layernorm_gamma, // 8 + th::Tensor inter_kernel, // 9 + th::Tensor inter_kernel2, // 10 + th::Tensor output_kernel, // 11 + th::Tensor decoding_gamma, // 12 + th::Tensor embedding_table, // 13 + th::Tensor lm_head, // 14 + th::Tensor absolute_or_relative_position_embedding, // 15 + th::Tensor self_layernorm_beta, // 16 + th::Tensor self_bias_qkv, // 17 + th::Tensor self_output_bias, // 18 + th::Tensor cross_layernorm_beta, // 19 + th::Tensor cross_bias_q, // 20 + th::Tensor cross_bias_k, // 21 + th::Tensor cross_bias_v, // 22 + th::Tensor cross_output_bias, // 23 + th::Tensor ffn_layernorm_beta, // 24 + th::Tensor inter_bias, // 25 + th::Tensor inter_bias2, // 26 + th::Tensor output_bias, // 27 + th::Tensor decoding_beta, // 28 + th::Tensor embedding_bias, // 29 + th::Tensor moe_gate, // 30 + th::Tensor after_attn_adapter_weight_in, // 31 + th::Tensor after_attn_adapter_weight_out, // 32 + th::Tensor after_attn_adapter_layernorm_gamma, // 33 + th::Tensor after_attn_adapter_layernorm_beta, // 34 + th::Tensor after_ffn_adapter_weight_in, // 35 + th::Tensor after_ffn_adapter_weight_out, // 36 + th::Tensor after_ffn_adapter_layernorm_gamma, // 37 + th::Tensor after_ffn_adapter_layernorm_beta // 38 + ); ~FasterTransformerT5Decoding(); @@ -502,6 +212,8 @@ class FasterTransformerT5Decoding: public torch::jit::CustomClassHolder { th::optional temperature, th::optional len_penalty, th::optional repetition_penalty, + th::optional presence_penalty, + th::optional min_length, th::optional random_seed, th::Tensor memory, th::Tensor memory_seq_lens, diff --git a/src/fastertransformer/th_op/t5/T5EncoderOp.cc b/src/fastertransformer/th_op/t5/T5EncoderOp.cc index a1a56af09..a5501bb2f 100644 --- a/src/fastertransformer/th_op/t5/T5EncoderOp.cc +++ b/src/fastertransformer/th_op/t5/T5EncoderOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -16,9 +16,300 @@ #include "src/fastertransformer/th_op/t5/T5EncoderOp.h" -namespace th = torch; namespace torch_ext { +template +FTT5Encoder::FTT5Encoder(int64_t head_num, + int64_t head_size, + int64_t inter_size, + int64_t d_model, + int64_t layer_num, + int64_t num_bucket, + int64_t expert_num, + int64_t max_distance, + bool sparse, + float q_scaling, + int64_t moe_k, + int64_t tensor_para_size, + int64_t pipeline_para_size, + bool t5_with_bias, + ft::PositionEmbeddingType position_embedding_type, + ft::ActivationType activation_type, + int64_t adapter_inter_size, + ft::LayerNormType adapter_layer_norm_type, + const std::vector moe_layer_index, + const std::vector& w): + _head_num(head_num), + _head_size(head_size), + _inter_size(inter_size), + _d_model(d_model), + _layer_num(layer_num), + _num_bucket(num_bucket), + _expert_num(expert_num), + _max_distance(max_distance), + _sparse(sparse), + _q_scaling(q_scaling), + _moe_k(moe_k), + _t5_with_bias(t5_with_bias), + _position_embedding_type(position_embedding_type), + _activation_type(activation_type), + _adapter_inter_size{adapter_inter_size}, + _adapter_layer_norm_type{adapter_layer_norm_type}, + _moe_layer_index(moe_layer_index), + _weights(w) +{ + bool use_gated_activation = isGatedActivation(_activation_type); + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + + ft::ftNcclInitialize(tensor_para_, pipeline_para_, tensor_para_size, pipeline_para_size); + +#ifndef SPARSITY_ENABLED + if (sparse) { + std::cout << "[WARNING] Sparsity support is not enabled. Will use dense GEMM instead.\n" << std::flush; + } +#endif + int hidden_dim = _head_num * _head_size; + ft::check_cuda_error(cublasLtCreate(&_cublasltHandle)); + sm_ = ft::getSMVersion(); +#ifdef SPARSITY_ENABLED + if (sparse) { + CHECK_CUSPARSE(cusparseLtInit(&_cusparseLtHandle)); + } +#endif + std::string sp_config_fname = sparse ? "spgemm_config.in" : ""; + cublas_algo_map_ = new ft::cublasAlgoMap("gemm_config.in", sp_config_fname); + cublas_wrapper_mutex_ = new std::mutex(); + + t5_encoder_weights.resizeLayer(_layer_num); + t5_encoder_weights.setT5StructureDiff(t5_with_bias, use_gated_activation, position_embedding_type); + int dense_weight_index = 0; // the inter and out kernel has the same index + int moe_dense_weight_index = 0; // the moe inter and out kernel has the same index + + for (int i = 0; i < _layer_num; i++) { + int local_num_layer = (int)(ceil(_layer_num * 1.0f / pipeline_para_.world_size_)); + if (!(i < _layer_num && (i >= local_num_layer * pipeline_para_.rank_) + && (i < local_num_layer * (pipeline_para_.rank_ + 1)))) { + continue; + } + + auto const layer_index = i - local_num_layer * pipeline_para_.rank_; + auto* const encoder_layer_weights = t5_encoder_weights.t5_encoder_layer_weights[i]; + auto const world_size = tensor_para_.world_size_; + + encoder_layer_weights->attn_layernorm_weights_.gamma = get_ptr(_weights[0]) + _d_model * layer_index; + encoder_layer_weights->attention_weights_.query_weight.kernel = + get_ptr(_weights[1]) + _d_model * hidden_dim / world_size * layer_index; + encoder_layer_weights->attention_weights_.key_weight.kernel = + get_ptr(_weights[2]) + _d_model * hidden_dim / world_size * layer_index; + encoder_layer_weights->attention_weights_.value_weight.kernel = + get_ptr(_weights[3]) + _d_model * hidden_dim / world_size * layer_index; + encoder_layer_weights->attention_weights_.attention_output_weight.kernel = + get_ptr(_weights[4]) + hidden_dim / world_size * _d_model * layer_index; + encoder_layer_weights->ffn_layernorm_weights_.gamma = get_ptr(_weights[5]) + _d_model * layer_index; + encoder_layer_weights->ffn_weights_.intermediate_weight.kernel = + get_ptr(_weights[6]) + _d_model * _inter_size / world_size * dense_weight_index + + _expert_num * _d_model * _inter_size / world_size * moe_dense_weight_index; + if (use_gated_activation) { + encoder_layer_weights->ffn_weights_.intermediate_weight2.kernel = + get_ptr(_weights[7]) + _d_model * _inter_size / world_size * layer_index; + } + encoder_layer_weights->ffn_weights_.output_weight.kernel = + get_ptr(_weights[8]) + _inter_size / world_size * _d_model * dense_weight_index + + _expert_num * _d_model * _inter_size / world_size * moe_dense_weight_index; + + if (_t5_with_bias) { + encoder_layer_weights->attn_layernorm_weights_.beta = get_ptr(_weights[12]) + _d_model * layer_index; + encoder_layer_weights->attention_weights_.query_weight.bias = + get_ptr(_weights[13]) + hidden_dim / world_size * layer_index; + encoder_layer_weights->attention_weights_.key_weight.bias = + get_ptr(_weights[14]) + hidden_dim / world_size * layer_index; + encoder_layer_weights->attention_weights_.value_weight.bias = + get_ptr(_weights[15]) + hidden_dim / world_size * layer_index; + encoder_layer_weights->attention_weights_.attention_output_weight.bias = + get_ptr(_weights[16]) + _d_model * layer_index; + encoder_layer_weights->ffn_layernorm_weights_.beta = get_ptr(_weights[17]) + _d_model * layer_index; + encoder_layer_weights->ffn_weights_.intermediate_weight.bias = + get_ptr(_weights[18]) + _inter_size / world_size * dense_weight_index + + _expert_num * _inter_size / world_size * moe_dense_weight_index; + + if (use_gated_activation) { + encoder_layer_weights->ffn_weights_.intermediate_weight2.bias = + get_ptr(_weights[19]) + _inter_size / world_size * layer_index; + } + + encoder_layer_weights->ffn_weights_.output_weight.bias = get_ptr(_weights[20]) + + _d_model * dense_weight_index + + _expert_num * _d_model * moe_dense_weight_index; + } + + if (std::find(moe_layer_index.begin(), moe_layer_index.end(), i) == moe_layer_index.end()) { + dense_weight_index += 1; + } + + if (std::find(moe_layer_index.begin(), moe_layer_index.end(), i) != moe_layer_index.end()) { + encoder_layer_weights->ffn_weights_.gating_weight.kernel = + get_ptr(_weights[22]) + _d_model * _expert_num * moe_dense_weight_index; + moe_dense_weight_index += 1; + } + + if (_adapter_inter_size > 0) { + auto& adapter_weights = encoder_layer_weights->adapter_weights_; + adapter_weights.setAdapterInterSize(_adapter_inter_size); + auto& attn_adapter_weights = adapter_weights.after_attention_adapter_weights_; + attn_adapter_weights.input_weight().kernel = + get_ptr(_weights[23]) + layer_index * d_model * _adapter_inter_size / world_size; + attn_adapter_weights.output_weight().kernel = + get_ptr(_weights[24]) + layer_index * d_model * _adapter_inter_size / world_size; + attn_adapter_weights.layer_norm_weight.gamma = get_ptr(_weights[25]) + layer_index * d_model; + attn_adapter_weights.layer_norm_weight.beta = get_ptr(_weights[26]) + layer_index * d_model; + auto& ffn_adapter_weights = adapter_weights.after_ffn_adapter_weights_; + ffn_adapter_weights.input_weight().kernel = + get_ptr(_weights[27]) + layer_index * d_model * _adapter_inter_size / world_size; + ffn_adapter_weights.output_weight().kernel = + get_ptr(_weights[28]) + layer_index * d_model * _adapter_inter_size / world_size; + ffn_adapter_weights.layer_norm_weight.gamma = get_ptr(_weights[29]) + layer_index * d_model; + ffn_adapter_weights.layer_norm_weight.beta = get_ptr(_weights[30]) + layer_index * d_model; + } + } + t5_encoder_weights.post_transformer_layernorm_weights.gamma = get_ptr(_weights[9]); + t5_encoder_weights.absolute_or_relative_position_embedding = get_ptr(_weights[10]); + t5_encoder_weights.embedding_table = get_ptr(_weights[11]); + if (_t5_with_bias) { + t5_encoder_weights.post_transformer_layernorm_weights.beta = get_ptr(_weights[21]); + } + +#ifdef SPARSITY_ENABLED + if (sparse) { + auto stream = at::cuda::getCurrentCUDAStream().stream(); + cublasHandle_t _cublasHandle = at::cuda::getCurrentCUDABlasHandle(); + cublasSetStream(_cublasHandle, stream); + ft::cublasMMWrapper cublas_wrapper = ft::cublasMMWrapper(_cublasHandle, + _cublasltHandle, + _cusparseLtHandle, + stream, + cublas_algo_map_, + cublas_wrapper_mutex_, + nullptr); + for (int i = 0; i < _layer_num; ++i) { + t5_encoder_weights.t5_encoder_layer_weights[i]->compress_weights(cublas_wrapper, hidden_dim); + } + } +#endif +} + +template +void FTT5Encoder::forward(size_t batch_size, + size_t seq_len, + th::optional input_ids, + th::Tensor& sequence_lengths, + th::optional inputs_embeds, + th::Tensor& output, + bool removing_padding) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + auto stream = at::cuda::getCurrentCUDAStream().stream(); + cublasHandle_t _cublasHandle = at::cuda::getCurrentCUDABlasHandle(); + cublasSetStream(_cublasHandle, stream); + ft::Allocator* allocator = new ft::Allocator(); + ft::cublasMMWrapper* cublas_wrapper = +#ifdef SPARSITY_ENABLED + new ft::cublasMMWrapper(_cublasHandle, + _cublasltHandle, + _cusparseLtHandle, + stream, + cublas_algo_map_, + cublas_wrapper_mutex_, + allocator); +#else + new ft::cublasMMWrapper( + _cublasHandle, _cublasltHandle, stream, cublas_algo_map_, cublas_wrapper_mutex_, allocator); +#endif + + if (std::is_same::value) { + cublas_wrapper->setFP16GemmConfig(); + } +#ifdef ENABLE_BF16 + else if (std::is_same::value) { + cublas_wrapper->setBF16GemmConfig(); + } +#endif + else if (std::is_same::value) { + cublas_wrapper->setFP32GemmConfig(); + } + + ft::AttentionType attention_type = ft::getAttentionType(_head_size, sm_, removing_padding, seq_len, false, true); + + ft::T5Encoder* t5_encoder = + new ft::T5Encoder(batch_size, + seq_len, + _head_num, + _head_size, + _inter_size, + _d_model, + _layer_num, + _num_bucket, + _expert_num, + _max_distance, + _moe_k, + sm_, + _q_scaling, + _moe_layer_index, + stream, + cublas_wrapper, + allocator, + false, + attention_type, + _sparse, + _activation_type, + ft::LayerNormType::pre_layernorm, + tensor_para_, + pipeline_para_, + 0, + ft::PromptLearningType::no_prompt, + nullptr, + 0, + ft::LinearAdapterConfig{_adapter_inter_size, _adapter_layer_norm_type}); + + ft::TensorMap input_tensors({{"sequence_length", convert_tensor(sequence_lengths)}}); + + if (inputs_embeds.has_value()) { + if (std::is_same::value) { + TORCH_CHECK(inputs_embeds.value().dtype() == torch::kFloat32, "inputs_embeds dtype should be float32"); + } + else if (std::is_same::value) { + TORCH_CHECK(inputs_embeds.value().dtype() == torch::kFloat16, "inputs_embeds dtype should be float16"); + } + input_tensors.insert("inputs_embeds", convert_tensor(inputs_embeds.value())); + } + else { + // already check that input_ids and input_embeds cannot be empty at the same time + input_tensors.insert("input_ids", convert_tensor(input_ids.value())); + } + + ft::TensorMap output_tensors({{"output_hidden_state", convert_tensor(output)}}); + + try { + t5_encoder->forward(&output_tensors, &input_tensors, &t5_encoder_weights); + } + catch (std::runtime_error& error) { + std::cout << error.what(); + exit(-1); + } + catch (...) { + std::cout << "Runtime error"; + exit(-1); + } + delete t5_encoder; + delete cublas_wrapper; + delete allocator; +} + +template class FTT5Encoder; +template class FTT5Encoder; +#ifdef ENABLE_BF16 +template class FTT5Encoder<__nv_bfloat16>; +#endif + FasterTransformerT5Encoder::FasterTransformerT5Encoder(th::Tensor attr_output_layernorm_gamma, th::Tensor q_kernel, th::Tensor k_kernel, @@ -42,6 +333,14 @@ FasterTransformerT5Encoder::FasterTransformerT5Encoder(th::Tensor attr th::Tensor output_bias, th::Tensor post_transformer_layernorm_beta, th::Tensor moe_gate, + th::Tensor after_attn_adapter_weight_in, + th::Tensor after_attn_adapter_weight_out, + th::Tensor after_attn_adapter_layernorm_gamma, + th::Tensor after_attn_adapter_layernorm_beta, + th::Tensor after_ffn_adapter_weight_in, + th::Tensor after_ffn_adapter_weight_out, + th::Tensor after_ffn_adapter_layernorm_gamma, + th::Tensor after_ffn_adapter_layernorm_beta, std::vector moe_layer_index, int64_t head_num, int64_t head_size, @@ -59,7 +358,9 @@ FasterTransformerT5Encoder::FasterTransformerT5Encoder(th::Tensor attr bool t5_with_bias, int64_t position_embedding_type, int64_t moe_k, - std::string activation_type): + std::string activation_type, + int64_t adapter_inter_size, + std::string adapter_norm_position): d_model_(d_model), _st(q_kernel.scalar_type()), _remove_padding(remove_padding), @@ -85,7 +386,15 @@ FasterTransformerT5Encoder::FasterTransformerT5Encoder(th::Tensor attr inter_bias2, output_bias, post_transformer_layernorm_beta, - moe_gate} + moe_gate, + after_attn_adapter_weight_in, + after_attn_adapter_weight_out, + after_attn_adapter_layernorm_gamma, + after_attn_adapter_layernorm_beta, + after_ffn_adapter_weight_in, + after_ffn_adapter_weight_out, + after_ffn_adapter_layernorm_gamma, + after_ffn_adapter_layernorm_beta} { CHECK_INPUT(q_kernel, _st); // d_model, hidden_dim CHECK_INPUT(k_kernel, _st); // d_model, hidden_dim @@ -115,6 +424,9 @@ FasterTransformerT5Encoder::FasterTransformerT5Encoder(th::Tensor attr CHECK_INPUT(moe_gate, _st); // hidden_dim, num_experts } + auto const adapter_layer_norm_type = + ft::LinearAdapterConfig::toLayerNormType(adapter_norm_position.empty() ? "pre" : adapter_norm_position); + switch (_st) { case at::ScalarType::Float: ft_t5_encoder = new FTT5Encoder(head_num, @@ -133,8 +445,10 @@ FasterTransformerT5Encoder::FasterTransformerT5Encoder(th::Tensor attr t5_with_bias, ft::PositionEmbeddingType(position_embedding_type), ft::getActivationType(activation_type), - weights, - moe_layer_index); + adapter_inter_size, + adapter_layer_norm_type, + moe_layer_index, + weights); break; case at::ScalarType::Half: ft_t5_encoder = new FTT5Encoder(head_num, @@ -153,8 +467,10 @@ FasterTransformerT5Encoder::FasterTransformerT5Encoder(th::Tensor attr t5_with_bias, ft::PositionEmbeddingType(position_embedding_type), ft::getActivationType(activation_type), - weights, - moe_layer_index); + adapter_inter_size, + adapter_layer_norm_type, + moe_layer_index, + weights); break; #ifdef ENABLE_BF16 case at::ScalarType::BFloat16: @@ -174,8 +490,10 @@ FasterTransformerT5Encoder::FasterTransformerT5Encoder(th::Tensor attr t5_with_bias, ft::PositionEmbeddingType(position_embedding_type), ft::getActivationType(activation_type), - weights, - moe_layer_index); + adapter_inter_size, + adapter_layer_norm_type, + moe_layer_index, + weights); break; #endif default: @@ -257,6 +575,14 @@ static auto fasterTransformerT5EncoderTHS = th::Tensor, th::Tensor, th::Tensor, + th::Tensor, + th::Tensor, + th::Tensor, + th::Tensor, + th::Tensor, + th::Tensor, + th::Tensor, + th::Tensor, std::vector, int64_t, int64_t, @@ -274,5 +600,7 @@ static auto fasterTransformerT5EncoderTHS = bool, int64_t, int64_t, + std::string, + int64_t, std::string>()) .def("forward", &torch_ext::FasterTransformerT5Encoder::forward); diff --git a/src/fastertransformer/th_op/t5/T5EncoderOp.h b/src/fastertransformer/th_op/t5/T5EncoderOp.h index 359e592a6..5728acab2 100644 --- a/src/fastertransformer/th_op/t5/T5EncoderOp.h +++ b/src/fastertransformer/th_op/t5/T5EncoderOp.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -17,6 +17,7 @@ #include "src/fastertransformer/models/t5/T5Encoder.h" #include "src/fastertransformer/th_op/th_utils.h" #include "src/fastertransformer/utils/nccl_utils.h" +#include "src/fastertransformer/utils/prompt_learning.h" namespace ft = fastertransformer; namespace th = torch; @@ -53,145 +54,10 @@ class FTT5Encoder: public IFT5Encoder { bool t5_with_bias, ft::PositionEmbeddingType position_embedding_type, ft::ActivationType activation_type, - const std::vector& w, - const std::vector moe_layer_index): - _head_num(head_num), - _head_size(head_size), - _inter_size(inter_size), - _d_model(d_model), - _layer_num(layer_num), - _num_bucket(num_bucket), - _expert_num(expert_num), - _max_distance(max_distance), - _weights(w), - _sparse(sparse), - _q_scaling(q_scaling), - _moe_k(moe_k), - _t5_with_bias(t5_with_bias), - _moe_layer_index(moe_layer_index), - _position_embedding_type(position_embedding_type), - _activation_type(activation_type) - { - bool use_gated_activation = isGatedActivation(_activation_type); - FT_LOG_DEBUG(__PRETTY_FUNCTION__); - - ft::ftNcclInitialize(tensor_para_, pipeline_para_, tensor_para_size, pipeline_para_size); - -#ifndef SPARSITY_ENABLED - if (sparse) { - std::cout << "[WARNING] Sparsity support is not enabled. Will use dense GEMM instead.\n" << std::flush; - } -#endif - int hidden_dim = _head_num * _head_size; - ft::check_cuda_error(cublasLtCreate(&_cublasltHandle)); - sm_ = ft::getSMVersion(); -#ifdef SPARSITY_ENABLED - if (sparse) { - CHECK_CUSPARSE(cusparseLtInit(&_cusparseLtHandle)); - } -#endif - std::string sp_config_fname = sparse ? "spgemm_config.in" : ""; - cublas_algo_map_ = new ft::cublasAlgoMap("gemm_config.in", sp_config_fname); - cublas_wrapper_mutex_ = new std::mutex(); - - t5_encoder_weights.resizeLayer(_layer_num); - t5_encoder_weights.setT5StructureDiff(t5_with_bias, use_gated_activation, position_embedding_type); - int dense_weight_index = 0; // the inter and out kernel has the same index - int moe_dense_weight_index = 0; // the moe inter and out kernel has the same index - - for (int i = 0; i < _layer_num; i++) { - int local_num_layer = (int)(ceil(_layer_num * 1.0f / pipeline_para_.world_size_)); - if (!(i < _layer_num && (i >= local_num_layer * pipeline_para_.rank_) - && (i < local_num_layer * (pipeline_para_.rank_ + 1)))) { - continue; - } - const int first_layer_index = local_num_layer * pipeline_para_.rank_; - - t5_encoder_weights.t5_encoder_layer_weights[i]->attn_layernorm_weights_.gamma = - get_ptr(_weights[0]) + _d_model * (i - first_layer_index); - t5_encoder_weights.t5_encoder_layer_weights[i]->attention_weights_.query_weight.kernel = - get_ptr(_weights[1]) + _d_model * hidden_dim / tensor_para_.world_size_ * (i - first_layer_index); - t5_encoder_weights.t5_encoder_layer_weights[i]->attention_weights_.key_weight.kernel = - get_ptr(_weights[2]) + _d_model * hidden_dim / tensor_para_.world_size_ * (i - first_layer_index); - t5_encoder_weights.t5_encoder_layer_weights[i]->attention_weights_.value_weight.kernel = - get_ptr(_weights[3]) + _d_model * hidden_dim / tensor_para_.world_size_ * (i - first_layer_index); - t5_encoder_weights.t5_encoder_layer_weights[i]->attention_weights_.attention_output_weight.kernel = - get_ptr(_weights[4]) + hidden_dim / tensor_para_.world_size_ * _d_model * (i - first_layer_index); - t5_encoder_weights.t5_encoder_layer_weights[i]->ffn_layernorm_weights_.gamma = - get_ptr(_weights[5]) + _d_model * (i - first_layer_index); - t5_encoder_weights.t5_encoder_layer_weights[i]->ffn_weights_.intermediate_weight.kernel = - get_ptr(_weights[6]) + _d_model * _inter_size / tensor_para_.world_size_ * dense_weight_index - + _expert_num * _d_model * _inter_size / tensor_para_.world_size_ * moe_dense_weight_index; - if (use_gated_activation) { - t5_encoder_weights.t5_encoder_layer_weights[i]->ffn_weights_.intermediate_weight2.kernel = - get_ptr(_weights[7]) - + _d_model * _inter_size / tensor_para_.world_size_ * (i - first_layer_index); - } - t5_encoder_weights.t5_encoder_layer_weights[i]->ffn_weights_.output_weight.kernel = - get_ptr(_weights[8]) + _inter_size / tensor_para_.world_size_ * _d_model * dense_weight_index - + _expert_num * _d_model * _inter_size / tensor_para_.world_size_ * moe_dense_weight_index; - - if (_t5_with_bias) { - t5_encoder_weights.t5_encoder_layer_weights[i]->attn_layernorm_weights_.beta = - get_ptr(_weights[12]) + _d_model * (i - first_layer_index); - t5_encoder_weights.t5_encoder_layer_weights[i]->attention_weights_.query_weight.bias = - get_ptr(_weights[13]) + hidden_dim / tensor_para_.world_size_ * (i - first_layer_index); - t5_encoder_weights.t5_encoder_layer_weights[i]->attention_weights_.key_weight.bias = - get_ptr(_weights[14]) + hidden_dim / tensor_para_.world_size_ * (i - first_layer_index); - t5_encoder_weights.t5_encoder_layer_weights[i]->attention_weights_.value_weight.bias = - get_ptr(_weights[15]) + hidden_dim / tensor_para_.world_size_ * (i - first_layer_index); - t5_encoder_weights.t5_encoder_layer_weights[i]->attention_weights_.attention_output_weight.bias = - get_ptr(_weights[16]) + _d_model * (i - first_layer_index); - t5_encoder_weights.t5_encoder_layer_weights[i]->ffn_layernorm_weights_.beta = - get_ptr(_weights[17]) + _d_model * (i - first_layer_index); - t5_encoder_weights.t5_encoder_layer_weights[i]->ffn_weights_.intermediate_weight.bias = - get_ptr(_weights[18]) + _inter_size / tensor_para_.world_size_ * dense_weight_index - + _expert_num * _inter_size / tensor_para_.world_size_ * moe_dense_weight_index; - - if (use_gated_activation) { - t5_encoder_weights.t5_encoder_layer_weights[i]->ffn_weights_.intermediate_weight2.bias = - get_ptr(_weights[19]) + _inter_size / tensor_para_.world_size_ * (i - first_layer_index); - } - - t5_encoder_weights.t5_encoder_layer_weights[i]->ffn_weights_.output_weight.bias = - get_ptr(_weights[20]) + _d_model * dense_weight_index - + _expert_num * _d_model * moe_dense_weight_index; - } - if (std::find(moe_layer_index.begin(), moe_layer_index.end(), i) == moe_layer_index.end()) { - dense_weight_index += 1; - } - - if (std::find(moe_layer_index.begin(), moe_layer_index.end(), i) != moe_layer_index.end()) { - t5_encoder_weights.t5_encoder_layer_weights[i]->ffn_weights_.gating_weight.kernel = - get_ptr(_weights[22]) + _d_model * _expert_num * moe_dense_weight_index; - moe_dense_weight_index += 1; - } - } - t5_encoder_weights.post_transformer_layernorm_weights.gamma = get_ptr(_weights[9]); - t5_encoder_weights.absolute_or_relative_position_embedding = get_ptr(_weights[10]); - t5_encoder_weights.embedding_table = get_ptr(_weights[11]); - if (_t5_with_bias) { - t5_encoder_weights.post_transformer_layernorm_weights.beta = get_ptr(_weights[21]); - } - -#ifdef SPARSITY_ENABLED - if (sparse) { - auto stream = at::cuda::getCurrentCUDAStream().stream(); - cublasHandle_t _cublasHandle = at::cuda::getCurrentCUDABlasHandle(); - cublasSetStream(_cublasHandle, stream); - ft::cublasMMWrapper cublas_wrapper = ft::cublasMMWrapper(_cublasHandle, - _cublasltHandle, - _cusparseLtHandle, - stream, - cublas_algo_map_, - cublas_wrapper_mutex_, - nullptr); - for (int i = 0; i < _layer_num; ++i) { - t5_encoder_weights.t5_encoder_layer_weights[i]->compress_weights(cublas_wrapper, hidden_dim); - } - } -#endif - } + int64_t adapter_inter_size, + ft::LayerNormType adapter_layer_norm_type, + const std::vector moe_layer_index, + const std::vector& w); ~FTT5Encoder() override { @@ -214,100 +80,7 @@ class FTT5Encoder: public IFT5Encoder { th::Tensor& sequence_lengths, th::optional inputs_embeds, th::Tensor& output, - bool removing_padding) override - { - FT_LOG_DEBUG(__PRETTY_FUNCTION__); - auto stream = at::cuda::getCurrentCUDAStream().stream(); - cublasHandle_t _cublasHandle = at::cuda::getCurrentCUDABlasHandle(); - cublasSetStream(_cublasHandle, stream); - ft::Allocator* allocator = new ft::Allocator(); - ft::cublasMMWrapper* cublas_wrapper = -#ifdef SPARSITY_ENABLED - new ft::cublasMMWrapper(_cublasHandle, - _cublasltHandle, - _cusparseLtHandle, - stream, - cublas_algo_map_, - cublas_wrapper_mutex_, - allocator); -#else - new ft::cublasMMWrapper( - _cublasHandle, _cublasltHandle, stream, cublas_algo_map_, cublas_wrapper_mutex_, allocator); -#endif - - if (std::is_same::value) { - cublas_wrapper->setFP16GemmConfig(); - } -#ifdef ENABLE_BF16 - else if (std::is_same::value) { - cublas_wrapper->setBF16GemmConfig(); - } -#endif - else if (std::is_same::value) { - cublas_wrapper->setFP32GemmConfig(); - } - - ft::AttentionType attention_type = - ft::getAttentionType(_head_size, sm_, removing_padding, seq_len, false, true); - - ft::T5Encoder* t5_encoder = new ft::T5Encoder(batch_size, - seq_len, - _head_num, - _head_size, - _inter_size, - _d_model, - _layer_num, - _num_bucket, - _expert_num, - _max_distance, - _moe_k, - sm_, - _q_scaling, - _moe_layer_index, - stream, - cublas_wrapper, - allocator, - false, - attention_type, - _sparse, - _activation_type, - ft::LayerNormType::pre_layernorm, - tensor_para_, - pipeline_para_); - - ft::TensorMap input_tensors({{"sequence_length", convert_tensor(sequence_lengths)}}); - - if (inputs_embeds.has_value()) { - if (std::is_same::value) { - TORCH_CHECK(inputs_embeds.value().dtype() == torch::kFloat32, "inputs_embeds dtype should be float32"); - } - else if (std::is_same::value) { - TORCH_CHECK(inputs_embeds.value().dtype() == torch::kFloat16, "inputs_embeds dtype should be float16"); - } - input_tensors.insert("inputs_embeds", convert_tensor(inputs_embeds.value())); - } - else { - // already check that input_ids and input_embeds cannot be empty at the same time - input_tensors.insert("input_ids", convert_tensor(input_ids.value())); - } - - ft::TensorMap output_tensors({{"output_hidden_state", convert_tensor(output)}}); - - try { - t5_encoder->forward(&output_tensors, &input_tensors, &t5_encoder_weights); - } - catch (std::runtime_error& error) { - std::cout << error.what(); - exit(-1); - } - catch (...) { - std::cout << "Runtime error"; - exit(-1); - } - delete t5_encoder; - delete cublas_wrapper; - delete allocator; - } + bool removing_padding) override; private: const int64_t _head_num; @@ -324,6 +97,8 @@ class FTT5Encoder: public IFT5Encoder { std::vector _moe_layer_index; ft::PositionEmbeddingType _position_embedding_type; ft::ActivationType _activation_type; + int64_t _adapter_inter_size; + ft::LayerNormType _adapter_layer_norm_type; bool _sparse; const float _q_scaling; int sm_; @@ -341,29 +116,37 @@ class FTT5Encoder: public IFT5Encoder { class FasterTransformerT5Encoder: public th::jit::CustomClassHolder { public: - FasterTransformerT5Encoder(th::Tensor attr_output_layernorm_gamma, - th::Tensor q_kernel, - th::Tensor k_kernel, - th::Tensor v_kernel, - th::Tensor attr_output_kernel, - th::Tensor output_layernorm_gamma, - th::Tensor inter_kernel, - th::Tensor inter_kernel2, - th::Tensor output_kernel, - th::Tensor post_transformer_layernorm_gamma, - th::Tensor absolute_or_relative_position_embedding, - th::Tensor embedding_table, - th::Tensor attr_output_layernorm_beta, - th::Tensor q_bias, - th::Tensor k_bias, - th::Tensor v_bias, - th::Tensor attr_output_bias, - th::Tensor output_layernorm_beta, - th::Tensor inter_bias, - th::Tensor inter_bias2, - th::Tensor output_bias, - th::Tensor post_transformer_layernorm_beta, - th::Tensor moe_gate, + FasterTransformerT5Encoder(th::Tensor attr_output_layernorm_gamma, // 0 + th::Tensor q_kernel, // 1 + th::Tensor k_kernel, // 2 + th::Tensor v_kernel, // 3 + th::Tensor attr_output_kernel, // 4 + th::Tensor output_layernorm_gamma, // 5 + th::Tensor inter_kernel, // 6 + th::Tensor inter_kernel2, // 7 + th::Tensor output_kernel, // 8 + th::Tensor post_transformer_layernorm_gamma, // 9 + th::Tensor absolute_or_relative_position_embedding, // 10 + th::Tensor embedding_table, // 11 + th::Tensor attr_output_layernorm_beta, // 12 + th::Tensor q_bias, // 13 + th::Tensor k_bias, // 14 + th::Tensor v_bias, // 15 + th::Tensor attr_output_bias, // 16 + th::Tensor output_layernorm_beta, // 17 + th::Tensor inter_bias, // 18 + th::Tensor inter_bias2, // 19 + th::Tensor output_bias, // 20 + th::Tensor post_transformer_layernorm_beta, // 21 + th::Tensor moe_gate, // 22 + th::Tensor after_attn_adapter_weight_in, // 23 + th::Tensor after_attn_adapter_weight_out, // 24 + th::Tensor after_attn_adapter_layernorm_gamma, // 25 + th::Tensor after_attn_adapter_layernorm_beta, // 26 + th::Tensor after_ffn_adapter_weight_in, // 27 + th::Tensor after_ffn_adapter_weight_out, // 28 + th::Tensor after_ffn_adapter_layernorm_gamma, // 29 + th::Tensor after_ffn_adapter_layernorm_beta, // 30 std::vector moe_layer_index, int64_t head_num, int64_t head_size, @@ -381,7 +164,9 @@ class FasterTransformerT5Encoder: public th::jit::CustomClassHolder { bool t5_with_bias, int64_t position_embedding_type, int64_t moe_k, - std::string activation_type); + std::string activation_type, + int64_t adapter_inter_size, + std::string adapter_norm_position); ~FasterTransformerT5Encoder(); diff --git a/src/fastertransformer/th_op/th_utils.cu b/src/fastertransformer/th_op/th_utils.cu index 9a3584ed2..3f7fbd33e 100644 --- a/src/fastertransformer/th_op/th_utils.cu +++ b/src/fastertransformer/th_op/th_utils.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -36,6 +36,7 @@ ft::Tensor convert_tensor(torch::Tensor tensor) return convert_tensor(tensor, mtype); } +template ft::Tensor convert_tensor(torch::Tensor tensor); template ft::Tensor convert_tensor(torch::Tensor tensor); template ft::Tensor convert_tensor(torch::Tensor tensor); #ifdef ENABLE_BF16 @@ -52,6 +53,7 @@ ft::Tensor convert_tensor(torch::Tensor tensor, ft::MemoryType memory_type) return ft::Tensor{memory_type, ft::getTensorType(), convert_shape(tensor), get_ptr(tensor)}; } +template ft::Tensor convert_tensor(torch::Tensor tensor, ft::MemoryType memory_type); template ft::Tensor convert_tensor(torch::Tensor tensor, ft::MemoryType memory_type); template ft::Tensor convert_tensor(torch::Tensor tensor, ft::MemoryType memory_type); #ifdef ENABLE_BF16 diff --git a/src/fastertransformer/th_op/th_utils.h b/src/fastertransformer/th_op/th_utils.h index 8da6b3c40..320508bfd 100644 --- a/src/fastertransformer/th_op/th_utils.h +++ b/src/fastertransformer/th_op/th_utils.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/vit/CMakeLists.txt b/src/fastertransformer/th_op/vit/CMakeLists.txt index e70108aee..75e7884cb 100644 --- a/src/fastertransformer/th_op/vit/CMakeLists.txt +++ b/src/fastertransformer/th_op/vit/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -22,8 +22,9 @@ set(vit_ths_files add_definitions(-DTORCH_CUDA=1) if(BUILD_PYT) - set(LIB_NAME "pyt_vit") - add_library(${LIB_NAME} SHARED ${vit_ths_files}) + set(LIB_NAME "th_vit") + add_library(${LIB_NAME} STATIC ${vit_ths_files}) + set_property(TARGET ${LIB_NAME} PROPERTY POSITION_INDEPENDENT_CODE ON) set_target_properties(${LIB_NAME} PROPERTIES CUDA_RESOLVE_DEVICE_SYMBOLS ON) target_link_libraries(${LIB_NAME} ViT ViTINT8 quantize_weight cublasMMWrapper trt_fused_multi_head_attention -lcudnn -lcublas -lcudart "${TORCH_LIBRARIES}") diff --git a/src/fastertransformer/th_op/vit/ViTINT8Op.cc b/src/fastertransformer/th_op/vit/ViTINT8Op.cc index a4a247afa..c231aa245 100644 --- a/src/fastertransformer/th_op/vit/ViTINT8Op.cc +++ b/src/fastertransformer/th_op/vit/ViTINT8Op.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/vit/ViTINT8Op.h b/src/fastertransformer/th_op/vit/ViTINT8Op.h index 5ef310124..70b5e388a 100644 --- a/src/fastertransformer/th_op/vit/ViTINT8Op.h +++ b/src/fastertransformer/th_op/vit/ViTINT8Op.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/vit/ViTOp.cc b/src/fastertransformer/th_op/vit/ViTOp.cc index 563b65ab9..962c8a318 100644 --- a/src/fastertransformer/th_op/vit/ViTOp.cc +++ b/src/fastertransformer/th_op/vit/ViTOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/vit/ViTOp.h b/src/fastertransformer/th_op/vit/ViTOp.h index 88e22936c..a4d22358a 100644 --- a/src/fastertransformer/th_op/vit/ViTOp.h +++ b/src/fastertransformer/th_op/vit/ViTOp.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/vit/WeightQuantizeOp.cc b/src/fastertransformer/th_op/vit/WeightQuantizeOp.cc index f0d25bac7..23d568926 100644 --- a/src/fastertransformer/th_op/vit/WeightQuantizeOp.cc +++ b/src/fastertransformer/th_op/vit/WeightQuantizeOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/triton_backend/CMakeLists.txt b/src/fastertransformer/triton_backend/CMakeLists.txt index 17a2859c4..0079e087a 100644 --- a/src/fastertransformer/triton_backend/CMakeLists.txt +++ b/src/fastertransformer/triton_backend/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -22,4 +22,7 @@ add_subdirectory(gptneox) add_subdirectory(t5) add_subdirectory(t5-encoder) add_subdirectory(multi_gpu_gpt) +if (ENABLE_FP8) + add_subdirectory(multi_gpu_gpt_fp8) +endif() add_subdirectory(bert) diff --git a/src/fastertransformer/triton_backend/bert/BertTritonModel.cc b/src/fastertransformer/triton_backend/bert/BertTritonModel.cc index 1bb89dc02..596421140 100644 --- a/src/fastertransformer/triton_backend/bert/BertTritonModel.cc +++ b/src/fastertransformer/triton_backend/bert/BertTritonModel.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/triton_backend/bert/BertTritonModel.h b/src/fastertransformer/triton_backend/bert/BertTritonModel.h index 344ffbb9a..2e7d66f44 100644 --- a/src/fastertransformer/triton_backend/bert/BertTritonModel.h +++ b/src/fastertransformer/triton_backend/bert/BertTritonModel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/triton_backend/bert/BertTritonModelInstance.cc b/src/fastertransformer/triton_backend/bert/BertTritonModelInstance.cc index 8fdd1b80a..a41aaf2c2 100644 --- a/src/fastertransformer/triton_backend/bert/BertTritonModelInstance.cc +++ b/src/fastertransformer/triton_backend/bert/BertTritonModelInstance.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -100,15 +100,13 @@ BertTritonModelInstance::forward(std::shared_ptr{batch_size, seq_len, hidden_units}, d_output_hidden_state_}}}); - bert_->forward(&output_tensors, &ft_input_tensors, bert_weight_.get()); - - if (d_input_hidden_state_ != nullptr) { - ft::check_cuda_error(cudaFree(d_input_hidden_state_)); - d_input_hidden_state_ = nullptr; + try { + bert_->forward(&output_tensors, &ft_input_tensors, bert_weight_.get()); + cudaStreamSynchronize(bert_->getStream()); } - if (d_sequence_lengths_ != nullptr) { - ft::check_cuda_error(cudaFree(d_sequence_lengths_)); - d_sequence_lengths_ = nullptr; + catch (...) { + h_exception_ = std::current_exception(); + output_tensors.insert({"error_message", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_BYTES, {1}, &h_exception_}}); } return convert_outputs(output_tensors); @@ -135,10 +133,16 @@ void BertTritonModelInstance::freeBuffer() if (d_output_hidden_state_ != nullptr) { allocator_->free((void**)(&d_output_hidden_state_)); } + if (d_input_hidden_state_ != nullptr) { + allocator_->free((void**)(&d_input_hidden_state_)); + } + if (d_sequence_lengths_ != nullptr) { + allocator_->free((void**)(&d_sequence_lengths_)); + } } template struct BertTritonModelInstance; template struct BertTritonModelInstance; #ifdef ENABLE_BF16 template struct BertTritonModelInstance<__nv_bfloat16>; -#endif \ No newline at end of file +#endif diff --git a/src/fastertransformer/triton_backend/bert/BertTritonModelInstance.h b/src/fastertransformer/triton_backend/bert/BertTritonModelInstance.h index bb53a33f5..84e95f0d5 100644 --- a/src/fastertransformer/triton_backend/bert/BertTritonModelInstance.h +++ b/src/fastertransformer/triton_backend/bert/BertTritonModelInstance.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -59,4 +59,6 @@ struct BertTritonModelInstance: AbstractTransformerModelInstance { T* d_input_hidden_state_ = nullptr; int* d_sequence_lengths_ = nullptr; T* d_output_hidden_state_ = nullptr; + + std::exception_ptr h_exception_ = nullptr; }; diff --git a/src/fastertransformer/triton_backend/bert/CMakeLists.txt b/src/fastertransformer/triton_backend/bert/CMakeLists.txt index 57c8b2acf..fe9097ace 100644 --- a/src/fastertransformer/triton_backend/bert/CMakeLists.txt +++ b/src/fastertransformer/triton_backend/bert/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -19,6 +19,7 @@ set(bert_triton_backend_files BertTritonModelInstance.cc ) -add_library(BertTritonBackend SHARED ${bert_triton_backend_files}) +add_library(BertTritonBackend STATIC ${bert_triton_backend_files}) +set_property(TARGET BertTritonBackend PROPERTY POSITION_INDEPENDENT_CODE ON) target_link_libraries(BertTritonBackend PRIVATE Bert TransformerTritonBackend -lcublasLt) target_compile_features(BertTritonBackend PRIVATE cxx_std_14) \ No newline at end of file diff --git a/src/fastertransformer/triton_backend/gptj/CMakeLists.txt b/src/fastertransformer/triton_backend/gptj/CMakeLists.txt index 0e10a9db1..a51cacb45 100644 --- a/src/fastertransformer/triton_backend/gptj/CMakeLists.txt +++ b/src/fastertransformer/triton_backend/gptj/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -19,6 +19,7 @@ set(parallel_gpt_triton_backend_files GptJTritonModelInstance.cc ) -add_library(GptJTritonBackend SHARED ${parallel_gpt_triton_backend_files}) +add_library(GptJTritonBackend STATIC ${parallel_gpt_triton_backend_files}) +set_property(TARGET GptJTritonBackend PROPERTY POSITION_INDEPENDENT_CODE ON) target_link_libraries(GptJTritonBackend PRIVATE TransformerTritonBackend GptJ -lcublasLt) target_compile_features(GptJTritonBackend PRIVATE cxx_std_14) diff --git a/src/fastertransformer/triton_backend/gptj/GptJTritonModel.cc b/src/fastertransformer/triton_backend/gptj/GptJTritonModel.cc index e4d624806..ea17bc5dc 100644 --- a/src/fastertransformer/triton_backend/gptj/GptJTritonModel.cc +++ b/src/fastertransformer/triton_backend/gptj/GptJTritonModel.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/triton_backend/gptj/GptJTritonModel.h b/src/fastertransformer/triton_backend/gptj/GptJTritonModel.h index 2a532e023..c1d270a3b 100644 --- a/src/fastertransformer/triton_backend/gptj/GptJTritonModel.h +++ b/src/fastertransformer/triton_backend/gptj/GptJTritonModel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/triton_backend/gptj/GptJTritonModelInstance.cc b/src/fastertransformer/triton_backend/gptj/GptJTritonModelInstance.cc index 3933a3890..2965116d8 100644 --- a/src/fastertransformer/triton_backend/gptj/GptJTritonModelInstance.cc +++ b/src/fastertransformer/triton_backend/gptj/GptJTritonModelInstance.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -202,12 +202,20 @@ GptJTritonModelInstance::forward(std::shared_ptrregisterCallback(triton_stream_callback, this); + try { + if (stream_cb_ != nullptr) { + gpt_->registerCallback(triton_stream_callback, this); + } + + gpt_->forward(&output_tensors, &ft_input_tensors, gpt_weight_.get()); + + if (stream_cb_ != nullptr) { + gpt_->unRegisterCallback(); + } } - gpt_->forward(&output_tensors, &ft_input_tensors, gpt_weight_.get()); - if (stream_cb_ != nullptr) { - gpt_->unRegisterCallback(); + catch (...) { + h_exception_ = std::current_exception(); + output_tensors.insert({"error_message", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_BYTES, {1}, &h_exception_}}); } if (h_total_output_lengths_ != nullptr) { diff --git a/src/fastertransformer/triton_backend/gptj/GptJTritonModelInstance.h b/src/fastertransformer/triton_backend/gptj/GptJTritonModelInstance.h index 522137050..8c859cdba 100644 --- a/src/fastertransformer/triton_backend/gptj/GptJTritonModelInstance.h +++ b/src/fastertransformer/triton_backend/gptj/GptJTritonModelInstance.h @@ -77,5 +77,6 @@ struct GptJTritonModelInstance: AbstractTransformerModelInstance { float* d_output_log_probs_ = nullptr; float* d_cum_log_probs_ = nullptr; - uint32_t* h_total_output_lengths_ = nullptr; + uint32_t* h_total_output_lengths_ = nullptr; + std::exception_ptr h_exception_ = nullptr; }; diff --git a/src/fastertransformer/triton_backend/gptneox/CMakeLists.txt b/src/fastertransformer/triton_backend/gptneox/CMakeLists.txt index f4bc05151..f1f488920 100644 --- a/src/fastertransformer/triton_backend/gptneox/CMakeLists.txt +++ b/src/fastertransformer/triton_backend/gptneox/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -19,6 +19,7 @@ set(parallel_gpt_triton_backend_files GptNeoXTritonModelInstance.cc ) -add_library(GptNeoXTritonBackend SHARED ${parallel_gpt_triton_backend_files}) +add_library(GptNeoXTritonBackend STATIC ${parallel_gpt_triton_backend_files}) +set_property(TARGET GptNeoXTritonBackend PROPERTY POSITION_INDEPENDENT_CODE ON) target_link_libraries(GptNeoXTritonBackend PRIVATE TransformerTritonBackend GptNeoX tensor memory_utils -lcublasLt) target_compile_features(GptNeoXTritonBackend PRIVATE cxx_std_14) diff --git a/src/fastertransformer/triton_backend/gptneox/GptNeoXTritonModel.cc b/src/fastertransformer/triton_backend/gptneox/GptNeoXTritonModel.cc index dbaccdb48..206f81ad3 100644 --- a/src/fastertransformer/triton_backend/gptneox/GptNeoXTritonModel.cc +++ b/src/fastertransformer/triton_backend/gptneox/GptNeoXTritonModel.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/triton_backend/gptneox/GptNeoXTritonModel.h b/src/fastertransformer/triton_backend/gptneox/GptNeoXTritonModel.h index 3a587d143..9fe16e311 100644 --- a/src/fastertransformer/triton_backend/gptneox/GptNeoXTritonModel.h +++ b/src/fastertransformer/triton_backend/gptneox/GptNeoXTritonModel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/triton_backend/gptneox/GptNeoXTritonModelInstance.cc b/src/fastertransformer/triton_backend/gptneox/GptNeoXTritonModelInstance.cc index be4be61f7..047c9d9fb 100644 --- a/src/fastertransformer/triton_backend/gptneox/GptNeoXTritonModelInstance.cc +++ b/src/fastertransformer/triton_backend/gptneox/GptNeoXTritonModelInstance.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -202,12 +202,20 @@ GptNeoXTritonModelInstance::forward(std::shared_ptr{request_batch_size, beam_width}, d_cum_log_probs_}}); } - if (stream_cb_ != nullptr) { - gpt_->registerCallback(triton_stream_callback, this); + try { + if (stream_cb_ != nullptr) { + gpt_->registerCallback(triton_stream_callback, this); + } + + gpt_->forward(&output_tensors, &ft_input_tensors, gpt_weight_.get()); + + if (stream_cb_ != nullptr) { + gpt_->unRegisterCallback(); + } } - gpt_->forward(&output_tensors, &ft_input_tensors, gpt_weight_.get()); - if (stream_cb_ != nullptr) { - gpt_->unRegisterCallback(); + catch (...) { + h_exception_ = std::current_exception(); + output_tensors.insert({"error_message", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_BYTES, {1}, &h_exception_}}); } if (h_total_output_lengths_ != nullptr) { diff --git a/src/fastertransformer/triton_backend/gptneox/GptNeoXTritonModelInstance.h b/src/fastertransformer/triton_backend/gptneox/GptNeoXTritonModelInstance.h index 9ac14db01..62a547300 100644 --- a/src/fastertransformer/triton_backend/gptneox/GptNeoXTritonModelInstance.h +++ b/src/fastertransformer/triton_backend/gptneox/GptNeoXTritonModelInstance.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -77,5 +77,6 @@ struct GptNeoXTritonModelInstance: AbstractTransformerModelInstance { float* d_output_log_probs_ = nullptr; float* d_cum_log_probs_ = nullptr; - uint32_t* h_total_output_lengths_ = nullptr; + uint32_t* h_total_output_lengths_ = nullptr; + std::exception_ptr h_exception_ = nullptr; }; diff --git a/src/fastertransformer/triton_backend/multi_gpu_gpt/CMakeLists.txt b/src/fastertransformer/triton_backend/multi_gpu_gpt/CMakeLists.txt index fde811faa..a01af4c79 100644 --- a/src/fastertransformer/triton_backend/multi_gpu_gpt/CMakeLists.txt +++ b/src/fastertransformer/triton_backend/multi_gpu_gpt/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -19,6 +19,7 @@ set(parallel_gpt_triton_backend_files ParallelGptTritonModelInstance.cc ) -add_library(ParallelGptTritonBackend SHARED ${parallel_gpt_triton_backend_files}) +add_library(ParallelGptTritonBackend STATIC ${parallel_gpt_triton_backend_files}) +set_property(TARGET ParallelGptTritonBackend PROPERTY POSITION_INDEPENDENT_CODE ON) target_link_libraries(ParallelGptTritonBackend PRIVATE TransformerTritonBackend ParallelGpt -lcublasLt) target_compile_features(ParallelGptTritonBackend PRIVATE cxx_std_14) \ No newline at end of file diff --git a/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModel.cc b/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModel.cc index 1aed5c3ca..9f2dd5c32 100644 --- a/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModel.cc +++ b/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModel.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -356,40 +356,43 @@ std::unique_ptr ParallelGptTritonModel::cre false, // with_relative_position_bias true); // causal_mask - auto gpt = - std::make_unique>(0, // max_batch_size, FT will adjust the buffer automatically. - 0, // max_seq_len, FT will adjust the buffer automatically. - 0, // max_input_len, FT will adjust the buffer automatically. - 0, - head_num_, - size_per_head_, - inter_size_, - num_layer_, - vocab_size_, - start_id_, - end_id_, - prompt_learning_start_id_, // p/prompt tuning virtual token start id - prompt_learning_type_, - gpt_variant_params_, - 0.0f, // beam_search_diversity_rate_, - 1, // top_k_, - 0.0f, // top_p_, - 0, // random seed, note that all gpus should use same seed - 1.0f, // temperature_, - 0.0f, // len_penalty_, - 1.0f, // repetition_penalty_, - tensor_para, - pipeline_para, - stream, - cublas_wrapper.get(), - allocator.get(), - false, - cuda_device_prop_ptr.get(), - attention_type, - false, - int8_mode_, - custom_all_reduce_comm, - enable_custom_all_reduce_); + auto gpt = std::make_unique>( + ft::ParallelGpt(0, // max_batch_size, FT will adjust the buffer automatically. + 0, // max_seq_len, FT will adjust the buffer automatically. + 0, // max_input_len, FT will adjust the buffer automatically. + 0, + head_num_, + size_per_head_, + inter_size_, + num_layer_, + 0, // expert_num + 0, // moe_k + {}, // moe_layer_index + vocab_size_, + start_id_, + end_id_, + prompt_learning_start_id_, // p/prompt tuning virtual token start id + prompt_learning_type_, + gpt_variant_params_, + 0.0f, // beam_search_diversity_rate_, + 1, // top_k_, + 0.0f, // top_p_, + 0, // random seed, note that all gpus should use same seed + 1.0f, // temperature_, + 0.0f, // len_penalty_, + 1.0f, // repetition_penalty_, + tensor_para, + pipeline_para, + stream, + cublas_wrapper.get(), + allocator.get(), + false, + cuda_device_prop_ptr.get(), + attention_type, + false, + int8_mode_, + custom_all_reduce_comm, + enable_custom_all_reduce_)); return std::unique_ptr>( new ParallelGptTritonModelInstance(std::move(gpt), diff --git a/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModel.h b/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModel.h index e7148121b..b7bdadc38 100644 --- a/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModel.h +++ b/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModelInstance.cc b/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModelInstance.cc index 965682e98..b711cc5d6 100644 --- a/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModelInstance.cc +++ b/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModelInstance.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -237,16 +237,21 @@ std::shared_ptr> ParallelGptTrit d_output_ctx_emb_}}); } - if (stream_cb_ != nullptr) { - gpt_->registerCallback(triton_stream_callback, this); - } + try { + if (stream_cb_ != nullptr) { + gpt_->registerCallback(triton_stream_callback, this); + } - gpt_->forward(&output_tensors, &ft_input_tensors, gpt_weight_.get()); + gpt_->forward(&output_tensors, &ft_input_tensors, gpt_weight_.get()); - if (stream_cb_ != nullptr) { - gpt_->unRegisterCallback(); + if (stream_cb_ != nullptr) { + gpt_->unRegisterCallback(); + } + } + catch (...) { + h_exception_ = std::current_exception(); + output_tensors.insert({"error_message", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_BYTES, {1}, &h_exception_}}); } - return convert_outputs(output_tensors); } diff --git a/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModelInstance.h b/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModelInstance.h index c15406a5a..9dd183136 100644 --- a/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModelInstance.h +++ b/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModelInstance.h @@ -80,5 +80,6 @@ struct ParallelGptTritonModelInstance: AbstractTransformerModelInstance { float* d_output_ctx_emb_ = nullptr; bool* d_is_finished_ = nullptr; - uint32_t* h_total_output_lengths_ = nullptr; + uint32_t* h_total_output_lengths_ = nullptr; + std::exception_ptr h_exception_ = nullptr; }; diff --git a/src/fastertransformer/triton_backend/multi_gpu_gpt_fp8/CMakeLists.txt b/src/fastertransformer/triton_backend/multi_gpu_gpt_fp8/CMakeLists.txt new file mode 100644 index 000000000..7bf841abc --- /dev/null +++ b/src/fastertransformer/triton_backend/multi_gpu_gpt_fp8/CMakeLists.txt @@ -0,0 +1,25 @@ +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +cmake_minimum_required(VERSION 3.8) + +set(parallel_gpt_fp8_triton_backend_files + ParallelGptFP8TritonModel.cc + ParallelGptFP8TritonModelInstance.cc +) + +add_library(ParallelGptFP8TritonBackend STATIC ${parallel_gpt_fp8_triton_backend_files}) +set_property(TARGET ParallelGptFP8TritonBackend PROPERTY POSITION_INDEPENDENT_CODE ON) +target_link_libraries(ParallelGptFP8TritonBackend PRIVATE TransformerTritonBackend GptFP8) +target_compile_features(ParallelGptFP8TritonBackend PRIVATE cxx_std_14) \ No newline at end of file diff --git a/src/fastertransformer/triton_backend/multi_gpu_gpt_fp8/ParallelGptFP8TritonModel.cc b/src/fastertransformer/triton_backend/multi_gpu_gpt_fp8/ParallelGptFP8TritonModel.cc new file mode 100644 index 000000000..3b4e943b2 --- /dev/null +++ b/src/fastertransformer/triton_backend/multi_gpu_gpt_fp8/ParallelGptFP8TritonModel.cc @@ -0,0 +1,239 @@ +/* + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "3rdparty/INIReader.h" + +#include "src/fastertransformer/triton_backend/multi_gpu_gpt_fp8/ParallelGptFP8TritonModel.h" +#include "src/fastertransformer/triton_backend/multi_gpu_gpt_fp8/ParallelGptFP8TritonModelInstance.h" +#include "src/fastertransformer/triton_backend/transformer_triton_backend.hpp" +#include "src/fastertransformer/utils/allocator.h" + +namespace ft = fastertransformer; + +std::shared_ptr AbstractTransformerModel::createGptFP8Model(std::string inifile) +{ + INIReader reader = INIReader(inifile); + if (reader.ParseError() < 0) { + std::cout << "[ERROR] Can't load '" << inifile << "'\n"; + return nullptr; + } + + const std::string model_name = reader.Get("ft_instance_hyperparameter", "model_name"); + + return std::make_shared>( + reader.GetInteger("ft_instance_hyperparameter", "max_seq_len"), + reader.GetInteger(model_name, "head_num"), + reader.GetInteger(model_name, "size_per_head"), + reader.GetInteger(model_name, "inter_size"), + reader.GetInteger(model_name, "decoder_layers"), + reader.GetInteger(model_name, "vocab_size"), + reader.GetInteger(model_name, "start_id"), + reader.GetInteger(model_name, "end_id"), + reader.GetInteger("ft_instance_hyperparameter", "tensor_para_size"), + reader.GetInteger("ft_instance_hyperparameter", "pipeline_para_size"), + reader.Get("ft_instance_hyperparameter", "model_name"), + reader.Get("ft_instance_hyperparameter", "model_dir"), + reader.GetInteger("ft_instance_hyperparameter", "fp8_mode", 0), + reader.GetInteger("ft_instance_hyperparameter", "enable_custom_all_reduce", 0)); +} + +template +ParallelGptFP8TritonModel::ParallelGptFP8TritonModel(size_t tensor_para_size, + size_t pipeline_para_size, + int enable_custom_all_reduce, + std::string model_dir, + int fp8_mode): + tensor_para_size_(tensor_para_size), + pipeline_para_size_(pipeline_para_size), + shared_weights_(std::vector>>(ft::getDeviceCount())), + enable_custom_all_reduce_(enable_custom_all_reduce), + model_dir_(model_dir), + fp8_mode_(fp8_mode) +{ + INIReader reader = INIReader(model_dir + "/config.ini"); + if (reader.ParseError() < 0) { + std::cout << "[ERROR] Can't load '" << model_dir << "/config.ini" + << "'\n"; + ft::FT_CHECK(false); + } + + model_name_ = reader.Get("gpt", "model_name"); + max_seq_len_ = reader.GetInteger("gpt", "max_pos_seq_len"); + head_num_ = reader.GetInteger("gpt", "head_num"); + size_per_head_ = reader.GetInteger("gpt", "size_per_head"); + inter_size_ = reader.GetInteger("gpt", "inter_size"); + num_layer_ = reader.GetInteger("gpt", "num_layer"); + vocab_size_ = reader.GetInteger("gpt", "vocab_size"); + start_id_ = reader.GetInteger("gpt", "start_id"); + end_id_ = reader.GetInteger("gpt", "end_id"); +} + +template +ParallelGptFP8TritonModel::ParallelGptFP8TritonModel(size_t max_seq_len, + size_t head_num, + size_t size_per_head, + size_t inter_size, + size_t num_layer, + size_t vocab_size, + int start_id, + int end_id, + size_t tensor_para_size, + size_t pipeline_para_size, + std::string model_name, + std::string model_dir, + int fp8_mode, + int enable_custom_all_reduce): + max_seq_len_(max_seq_len), + head_num_(head_num), + size_per_head_(size_per_head), + inter_size_(inter_size), + num_layer_(num_layer), + vocab_size_(vocab_size), + start_id_(start_id), + end_id_(end_id), + tensor_para_size_(tensor_para_size), + pipeline_para_size_(pipeline_para_size), + shared_weights_(std::vector>>(ft::getDeviceCount())), + model_name_(model_name), + model_dir_(model_dir), + fp8_mode_(fp8_mode), + enable_custom_all_reduce_(enable_custom_all_reduce) +{ +} + +template +std::unique_ptr ParallelGptFP8TritonModel::createModelInstance( + int device_id, + int rank, + cudaStream_t stream, + std::pair, std::vector> nccl_params, + std::shared_ptr custom_all_reduce_comm) +{ + ft::check_cuda_error(cudaSetDevice(device_id)); + const int comms_rank = device_id % (tensor_para_size_ * pipeline_para_size_); + const int tensor_para_rank = rank % tensor_para_size_; + const int pipeline_para_rank = rank / tensor_para_size_; + + std::unique_ptr> allocator( + new ft::Allocator(device_id)); + + allocator->setStream(stream); + + cublasHandle_t cublas_handle; + cublasLtHandle_t cublaslt_handle; + + cublasCreate(&cublas_handle); + cublasLtCreate(&cublaslt_handle); + cublasSetStream(cublas_handle, stream); + + std::unique_ptr cublas_algo_map(new ft::cublasAlgoMap("gemm_config.in")); + std::unique_ptr cublas_wrapper_mutex(new std::mutex()); + std::unique_ptr cublas_wrapper(new ft::cublasFP8MMWrapper( + cublas_handle, cublaslt_handle, stream, cublas_algo_map.get(), cublas_wrapper_mutex.get(), allocator.get())); + + std::unique_ptr cuda_device_prop_ptr(new cudaDeviceProp); + ft::check_cuda_error(cudaGetDeviceProperties(cuda_device_prop_ptr.get(), device_id)); + + cublas_wrapper->setGemmConfig(CUDA_R_16BF, CUDA_R_16BF, CUDA_R_16BF, CUDA_R_32F); + + ft::NcclParam tensor_para = nccl_params.first[comms_rank]; + ft::NcclParam pipeline_para = nccl_params.second[comms_rank]; + + auto gpt = std::make_unique>(0, + head_num_, + size_per_head_, + inter_size_, + num_layer_, + vocab_size_, + start_id_, + end_id_, + tensor_para, + pipeline_para, + stream, + cublas_wrapper.get(), + allocator.get(), + false, + cuda_device_prop_ptr.get(), + false); + + return std::unique_ptr>( + new ParallelGptFP8TritonModelInstance(std::move(gpt), + shared_weights_[device_id], + std::move(allocator), + std::move(cublas_algo_map), + std::move(cublas_wrapper_mutex), + std::move(cublas_wrapper), + std::move(cuda_device_prop_ptr))); +} + +template +void ParallelGptFP8TritonModel::createSharedWeights(int device_id, int rank) +{ + ft::check_cuda_error(cudaSetDevice(device_id)); + const int tensor_para_rank = rank % tensor_para_size_; + const int pipeline_para_rank = rank / tensor_para_size_; + shared_weights_[device_id] = std::make_shared>(head_num_ * size_per_head_, + inter_size_, + vocab_size_, + num_layer_, + max_seq_len_, + tensor_para_size_, + tensor_para_rank, + pipeline_para_size_, + pipeline_para_rank); + shared_weights_[device_id]->loadModel(model_dir_); + shared_weights_[device_id]->transposeWeight(); + return; +} + +template +std::string ParallelGptFP8TritonModel::toString() +{ + std::stringstream ss; + ss << "Model: " + << "\nmax_seq_len: " << max_seq_len_ << "\nhead_num: " << head_num_ << "\nsize_per_head: " << size_per_head_ + << "\ninter_size: " << inter_size_ << "\nnum_layer: " << num_layer_ << "\nvocab_size: " << vocab_size_ + << "\nstart_id: " << start_id_ << "\nend_id: " << end_id_ << "\ntensor_para_size: " << tensor_para_size_ + << "\npipeline_para_size: " << pipeline_para_size_ << "\fp8_mode: " << fp8_mode_ + << "\nenable_custom_all_reduce: " << enable_custom_all_reduce_ << "\nmodel_name: " << model_name_ + << "\nmodel_dir: " << model_dir_ << std::endl; + return ss.str(); +} + +template +void ParallelGptFP8TritonModel::createCustomComms( + std::vector>* custom_all_reduce_comms, int world_size) +{ + using commDataType = typename ft::CustomARCommTypeConverter::Type; + ft::initCustomAllReduceComm(custom_all_reduce_comms, enable_custom_all_reduce_, world_size); +} + +template +int ParallelGptFP8TritonModel::getTensorParaSize() +{ + return tensor_para_size_; +} + +template +int ParallelGptFP8TritonModel::getPipelineParaSize() +{ + return pipeline_para_size_; +} + +#ifdef ENABLE_BF16 +template struct ParallelGptFP8TritonModel<__nv_fp8_e4m3, __nv_bfloat16>; +#endif diff --git a/src/fastertransformer/triton_backend/multi_gpu_gpt_fp8/ParallelGptFP8TritonModel.h b/src/fastertransformer/triton_backend/multi_gpu_gpt_fp8/ParallelGptFP8TritonModel.h new file mode 100644 index 000000000..c4edb2c0f --- /dev/null +++ b/src/fastertransformer/triton_backend/multi_gpu_gpt_fp8/ParallelGptFP8TritonModel.h @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include + +#include "src/fastertransformer/models/gpt_fp8/GptFP8.h" +#include "src/fastertransformer/triton_backend/transformer_triton_backend.hpp" +#include "src/fastertransformer/utils/cuda_utils.h" +#include "src/fastertransformer/utils/custom_ar_comm.h" +#include "src/fastertransformer/utils/nccl_utils.h" + +namespace ft = fastertransformer; + +template +struct ParallelGptFP8TritonModel: public AbstractTransformerModel { + ParallelGptFP8TritonModel(size_t max_seq_len, + size_t head_num, + size_t size_per_head, + size_t inter_size, + size_t num_layer, + size_t vocab_size, + int start_id, + int end_id, + size_t tensor_para_size, + size_t pipeline_para_size, + std::string model_name, + std::string model_dir, + int int8_mode, + int enable_custom_all_reduce); + + ParallelGptFP8TritonModel(size_t tensor_para_size, + size_t pipeline_para_size, + int enable_custom_all_reduce, + std::string model_dir, + int int8_mode); + + virtual std::unique_ptr + createModelInstance(int deviceId, + int rank, + cudaStream_t stream, + std::pair, std::vector> nccl_params, + std::shared_ptr custom_all_reduce_comm = nullptr) override; + + virtual void createSharedWeights(int deviceId, int rank) override; + + virtual void createCustomComms(std::vector>* custom_all_reduce_comms, + int world_size) override; + + virtual std::string toString() override; + virtual int getTensorParaSize() override; + virtual int getPipelineParaSize() override; + +private: + size_t max_seq_len_; // needed for position embedding table + size_t head_num_; + size_t size_per_head_; + size_t inter_size_; + size_t num_layer_; + size_t vocab_size_; + int start_id_; + int end_id_; + size_t tensor_para_size_; + size_t pipeline_para_size_; + + // shared weights for each device + std::vector>> shared_weights_; + + std::string model_name_; + std::string model_dir_; + int fp8_mode_ = 0; + int enable_custom_all_reduce_ = 0; +}; diff --git a/src/fastertransformer/triton_backend/multi_gpu_gpt_fp8/ParallelGptFP8TritonModelInstance.cc b/src/fastertransformer/triton_backend/multi_gpu_gpt_fp8/ParallelGptFP8TritonModelInstance.cc new file mode 100644 index 000000000..57d6b2ca6 --- /dev/null +++ b/src/fastertransformer/triton_backend/multi_gpu_gpt_fp8/ParallelGptFP8TritonModelInstance.cc @@ -0,0 +1,233 @@ +/* + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/triton_backend/multi_gpu_gpt_fp8/ParallelGptFP8TritonModelInstance.h" +#include "src/fastertransformer/triton_backend/transformer_triton_backend.hpp" +#include "src/fastertransformer/triton_backend/triton_utils.hpp" +#include "src/fastertransformer/utils/Tensor.h" +#include +#include +#include +#include + +namespace ft = fastertransformer; + +template +void triton_stream_callback(std::unordered_map* output_tensors, void* ctx) +{ + // ParallelGptFP8TritonModelInstance *model = reinterpret_cast*>(ctx); auto result = ParallelGptFP8TritonModelInstance::convert_outputs(*output_tensors); + + // model->stream_cb_(result, model->stream_ctx_); + return; +} + +template +ParallelGptFP8TritonModelInstance::ParallelGptFP8TritonModelInstance( + std::unique_ptr> gpt, + std::shared_ptr> gpt_weight, + std::unique_ptr> allocator, + std::unique_ptr cublas_algo_map, + std::unique_ptr cublas_wrapper_mutex, + std::unique_ptr cublas_wrapper, + std::unique_ptr cuda_device_prop_ptr): + gpt_(std::move(gpt)), + gpt_weight_(gpt_weight), + allocator_(std::move(allocator)), + cublas_algo_map_(std::move(cublas_algo_map)), + cublas_wrapper_mutex_(std::move(cublas_wrapper_mutex)), + cublas_wrapper_(std::move(cublas_wrapper)), + cuda_device_prop_ptr_(std::move(cuda_device_prop_ptr)) +{ +} + +template +std::shared_ptr> +ParallelGptFP8TritonModelInstance::forward(std::shared_ptr> input_tensors) +{ + ft::FT_CHECK(false); + return nullptr; +} + +template +std::unordered_map ParallelGptFP8TritonModelInstance::convert_inputs( + std::shared_ptr> input_tensors) +{ + const size_t request_batch_size = input_tensors->at("input_ids").shape[0]; + move_tensor_H2D(input_tensors->at("input_ids"), d_input_ids_, &allocator_); + move_tensor_H2D(input_tensors->at("input_lengths"), d_input_lengths_, &allocator_); + + const int input_data_len = input_tensors->at("input_ids").shape[1]; + h_total_output_lengths_ = reinterpret_cast(malloc(request_batch_size * sizeof(uint32_t))); + for (int i = 0; i < request_batch_size; ++i) { + h_total_output_lengths_[i] = + reinterpret_cast(input_tensors->at("request_output_len").data)[i] + input_data_len; + } + + std::unordered_map ft_input_tensors{ + {"input_ids", as_GPU_tensor(input_tensors->at("input_ids"), d_input_ids_)}, + {"input_lengths", as_GPU_tensor(input_tensors->at("input_lengths"), d_input_lengths_)}, + {"output_seq_len", + ft::Tensor{ft::MEMORY_CPU, + ft::TYPE_UINT32, + {input_tensors->at("request_output_len").shape[0]}, + h_total_output_lengths_}}}; + + if (input_tensors->count("request_prompt_embedding") && input_tensors->count("request_prompt_lengths") + && input_tensors->count("request_prompt_type")) { + + move_tensor_H2D(input_tensors->at("request_prompt_lengths"), d_request_prompt_lengths_, &allocator_); + ft_input_tensors.insert( + {"request_prompt_lengths", + as_GPU_tensor(input_tensors->at("request_prompt_lengths"), d_request_prompt_lengths_)}); + + move_tensor_H2D(input_tensors->at("request_prompt_embedding"), d_request_prompt_embedding_, &allocator_); + ft_input_tensors.insert( + {"request_prompt_embedding", + as_GPU_tensor(input_tensors->at("request_prompt_embedding"), d_request_prompt_embedding_)}); + } + + if (input_tensors->find("bad_words_list") != input_tensors->end()) { + move_tensor_H2D(input_tensors->at("bad_words_list"), d_input_bad_words_, &allocator_); + ft_input_tensors.insert( + {"bad_words_list", as_GPU_tensor(input_tensors->at("bad_words_list"), d_input_bad_words_)}); + } + + if (input_tensors->find("stop_words_list") != input_tensors->end()) { + move_tensor_H2D(input_tensors->at("stop_words_list"), d_input_stop_words_, &allocator_); + ft_input_tensors.insert( + {"stop_words_list", as_GPU_tensor(input_tensors->at("stop_words_list"), d_input_stop_words_)}); + } + + for (auto t = input_tensors->begin(); t != input_tensors->end(); ++t) { + if (t->first.find("input_ids") == std::string::npos && t->first.find("input_lengths") == std::string::npos + && t->first.find("output_seq_len") == std::string::npos + && t->first.find("request_prompt_embedding") == std::string::npos + && t->first.find("request_prompt_lengths") == std::string::npos) { + ft_input_tensors.insert({t->first, t->second.convertTritonTensorToFt()}); + } + } + + return ft_input_tensors; +} + +template +std::shared_ptr> +ParallelGptFP8TritonModelInstance::convert_outputs( + const std::unordered_map& output_tensors) +{ + std::unordered_map* outputs_mapping = + new std::unordered_map(); + + for (auto it = output_tensors.begin(); it != output_tensors.end(); it++) { + outputs_mapping->insert({it->first, triton::Tensor::convertFtTensorToTriton(it->second)}); + } + + return std::shared_ptr>(outputs_mapping); +} + +template +std::shared_ptr> ParallelGptFP8TritonModelInstance::forward( + std::shared_ptr> input_tensors) +{ + ft::FT_CHECK_WITH_INFO(input_tensors->at("input_ids").shape.size() == 2, + "input_tensors->at(\"input_ids\").shape.size() == 2"); + ft::FT_CHECK_WITH_INFO(input_tensors->at("input_lengths").shape.size() == 1, + "input_tensors->at(\"input_lengths\").shape.size() == 1"); + const size_t request_batch_size = input_tensors->at("input_ids").shape[0]; + const size_t max_request_output_len = (size_t)*std::max_element( + (int*)input_tensors->at("request_output_len").data, + (int*)input_tensors->at("request_output_len").data + input_tensors->at("request_output_len").shape[0]); + const size_t beam_width = + input_tensors->count("beam_width") ? (size_t)(*(uint*)input_tensors->at("beam_width").data) : 1; + const size_t total_length = max_request_output_len + input_tensors->at("input_ids").shape[1]; + + allocateBuffer(request_batch_size, beam_width, total_length, max_request_output_len); + + std::unordered_map ft_input_tensors = convert_inputs(input_tensors); + + std::unordered_map output_tensors = std::unordered_map{ + {"output_ids", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_UINT32, + std::vector{request_batch_size, beam_width, total_length}, + d_output_ids_}}, + {"sequence_length", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{request_batch_size, beam_width}, + d_sequence_lengths_}}}; + + if (input_tensors->count("is_return_log_probs") && *((bool*)input_tensors->at("is_return_log_probs").data)) { + output_tensors.insert({"output_log_probs", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_FP32, + std::vector{request_batch_size, beam_width, max_request_output_len}, + d_output_log_probs_}}); + output_tensors.insert({"cum_log_probs", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_FP32, + std::vector{request_batch_size, beam_width}, + d_cum_log_probs_}}); + } + + // if (stream_cb_ != nullptr) { + // gpt_->registerCallback(triton_stream_callback, this); + // } + + gpt_->forward(&output_tensors, &ft_input_tensors, gpt_weight_.get()); + + // if (stream_cb_ != nullptr) { + // gpt_->unRegisterCallback(); + // } + + return convert_outputs(output_tensors); +} + +template +ParallelGptFP8TritonModelInstance::~ParallelGptFP8TritonModelInstance() +{ + freeBuffer(); +} + +template +void ParallelGptFP8TritonModelInstance::allocateBuffer(const size_t request_batch_size, + const size_t beam_width, + const size_t total_output_len, + const size_t request_output_len) +{ + d_output_ids_ = (int*)(allocator_->reMalloc( + d_output_ids_, sizeof(int) * request_batch_size * beam_width * total_output_len, false)); + d_sequence_lengths_ = + (int*)(allocator_->reMalloc(d_sequence_lengths_, sizeof(int) * request_batch_size * beam_width, false)); + d_output_log_probs_ = (float*)(allocator_->reMalloc( + d_output_log_probs_, sizeof(float) * request_batch_size * beam_width * request_output_len, false)); + d_cum_log_probs_ = + (float*)(allocator_->reMalloc(d_cum_log_probs_, sizeof(float) * request_batch_size * beam_width, false)); +} + +template +void ParallelGptFP8TritonModelInstance::freeBuffer() +{ + allocator_->free((void**)(&d_output_ids_)); + allocator_->free((void**)(&d_sequence_lengths_)); + allocator_->free((void**)(&d_output_log_probs_)); + allocator_->free((void**)(&d_cum_log_probs_)); +} + +#ifdef ENABLE_BF16 +template struct ParallelGptFP8TritonModelInstance<__nv_fp8_e4m3, __nv_bfloat16>; +#endif diff --git a/src/fastertransformer/triton_backend/multi_gpu_gpt_fp8/ParallelGptFP8TritonModelInstance.h b/src/fastertransformer/triton_backend/multi_gpu_gpt_fp8/ParallelGptFP8TritonModelInstance.h new file mode 100644 index 000000000..71ec7f942 --- /dev/null +++ b/src/fastertransformer/triton_backend/multi_gpu_gpt_fp8/ParallelGptFP8TritonModelInstance.h @@ -0,0 +1,78 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/models/gpt_fp8/GptFP8.h" +#include "src/fastertransformer/triton_backend/multi_gpu_gpt_fp8/ParallelGptFP8TritonModel.h" +#include "src/fastertransformer/triton_backend/transformer_triton_backend.hpp" +#include + +namespace ft = fastertransformer; + +template +struct ParallelGptFP8TritonModelInstance: AbstractTransformerModelInstance { + + ParallelGptFP8TritonModelInstance(std::unique_ptr> gpt, + std::shared_ptr> gpt_weight, + std::unique_ptr> allocator, + std::unique_ptr cublas_algo_map, + std::unique_ptr cublas_wrapper_mutex, + std::unique_ptr cublas_wrapper, + std::unique_ptr cuda_device_prop_ptr); + ~ParallelGptFP8TritonModelInstance(); + + std::shared_ptr> + forward(std::shared_ptr> input_tensors) override; + + std::shared_ptr> + forward(std::shared_ptr> input_tensors) override; + + static std::shared_ptr> + convert_outputs(const std::unordered_map& output_tensors); + +private: + const std::unique_ptr> gpt_; + const std::shared_ptr> gpt_weight_; + const std::unique_ptr> allocator_; + const std::unique_ptr cublas_algo_map_; + const std::unique_ptr cublas_wrapper_mutex_; + const std::unique_ptr cublas_wrapper_; + const std::unique_ptr cuda_device_prop_ptr_; + + std::unordered_map + convert_inputs(std::shared_ptr> input_tensors); + + void allocateBuffer(const size_t request_batch_size, + const size_t beam_width, + const size_t total_output_len, + const size_t request_output_len); + void freeBuffer(); + + int* d_input_ids_ = nullptr; + int* d_input_lengths_ = nullptr; + int* d_request_prompt_lengths_ = nullptr; + int* d_input_bad_words_ = nullptr; + int* d_input_stop_words_ = nullptr; + T2* d_request_prompt_embedding_ = nullptr; + + int* d_output_ids_ = nullptr; + int* d_sequence_lengths_ = nullptr; + float* d_output_log_probs_ = nullptr; + float* d_cum_log_probs_ = nullptr; + + uint32_t* h_total_output_lengths_ = nullptr; +}; diff --git a/src/fastertransformer/triton_backend/t5-encoder/CMakeLists.txt b/src/fastertransformer/triton_backend/t5-encoder/CMakeLists.txt index 0ebee282d..f55012cc5 100644 --- a/src/fastertransformer/triton_backend/t5-encoder/CMakeLists.txt +++ b/src/fastertransformer/triton_backend/t5-encoder/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -19,6 +19,7 @@ set(t5_encoder_triton_backend_files T5EncoderTritonModelInstance.cc ) -add_library(T5EncoderTritonBackend SHARED ${t5_encoder_triton_backend_files}) +add_library(T5EncoderTritonBackend STATIC ${t5_encoder_triton_backend_files}) +set_property(TARGET T5EncoderTritonBackend PROPERTY POSITION_INDEPENDENT_CODE ON) target_link_libraries(T5EncoderTritonBackend PRIVATE TransformerTritonBackend T5Encoder -lcublasLt) target_compile_features(T5EncoderTritonBackend PRIVATE cxx_std_14) diff --git a/src/fastertransformer/triton_backend/t5-encoder/T5EncoderTritonModel.cc b/src/fastertransformer/triton_backend/t5-encoder/T5EncoderTritonModel.cc index f701ed889..ff5a8e104 100644 --- a/src/fastertransformer/triton_backend/t5-encoder/T5EncoderTritonModel.cc +++ b/src/fastertransformer/triton_backend/t5-encoder/T5EncoderTritonModel.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -60,6 +60,8 @@ T5EncoderTritonModel::T5EncoderTritonModel(INIReader reader, std::string mode encoder_vocab_size_ = reader.GetInteger("encoder", "vocab_size"); encoder_num_bucket_or_max_pos_seq_len_ = reader.GetInteger("encoder", "relative_attention_num_buckets_or_max_pos_seq_len"); + encoder_adapter_.interSize(reader.GetInteger("encoder", "adapter_inter_size", 0)); + encoder_adapter_.layerNormType(reader.Get("encoder", "adapter_norm_position", "pre")); tensor_para_size_ = reader.GetInteger("ft_instance_hyperparameter", "tensor_para_size"); pipeline_para_size_ = reader.GetInteger("ft_instance_hyperparameter", "pipeline_para_size"); @@ -104,6 +106,8 @@ T5EncoderTritonModel::T5EncoderTritonModel(size_t tensor_para_size, encoder_vocab_size_ = reader.GetInteger("encoder", "vocab_size"); encoder_num_bucket_or_max_pos_seq_len_ = reader.GetInteger("encoder", "relative_attention_num_buckets_or_max_pos_seq_len"); + encoder_adapter_.interSize(reader.GetInteger("encoder", "adapter_inter_size", 0)); + encoder_adapter_.layerNormType(reader.Get("encoder", "adapter_norm_position", "pre")); // encoder prompt num_tasks_ = reader.GetInteger("encoder", "num_tasks", 0); @@ -211,7 +215,8 @@ std::unique_ptr T5EncoderTritonModel::creat prompt_learning_start_id_, prompt_learning_type_, custom_all_reduce_comm, - enable_custom_all_reduce_)); + enable_custom_all_reduce_, + encoder_adapter_)); return std::unique_ptr>( new T5EncoderTritonModelInstance(std::move(encoder), @@ -247,7 +252,8 @@ void T5EncoderTritonModel::createSharedWeights(int device_id, int rank) position_embedding_type_, ft::PromptLearningType::no_prompt, std::map>{}, - ia3_num_tasks_); + ia3_num_tasks_, + encoder_adapter_.interSize()); encoder_shared_weights_[device_id]->loadModel(model_dir_); return; @@ -265,7 +271,8 @@ std::string T5EncoderTritonModel::toString() << "\n encoder_d_model_: " << encoder_d_model_ << "\n encoder_inter_size_: " << encoder_inter_size_ << "\n encoder_num_layer_: " << encoder_num_layer_ << "\n encoder_vocab_size_: " << encoder_vocab_size_ << "\n encoder_num_bucket_or_max_pos_seq_len_: " << encoder_num_bucket_or_max_pos_seq_len_ - << "\n t5_with_bias_: " << t5_with_bias_ << "\n use_gated_activation_: " << use_gated_activation_ + << "\n encoder_adapter_: " << encoder_adapter_.toString() << "\n t5_with_bias_: " << t5_with_bias_ + << "\n use_gated_activation_: " << use_gated_activation_ << "\n position_embedding_type_: " << position_embedding_type_string << "\n model_name_: " << model_name_ << "\n model_dir_: " << model_dir_ << std::endl; diff --git a/src/fastertransformer/triton_backend/t5-encoder/T5EncoderTritonModel.h b/src/fastertransformer/triton_backend/t5-encoder/T5EncoderTritonModel.h index 26ff2a9a2..00af0a3a4 100644 --- a/src/fastertransformer/triton_backend/t5-encoder/T5EncoderTritonModel.h +++ b/src/fastertransformer/triton_backend/t5-encoder/T5EncoderTritonModel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -56,13 +56,14 @@ struct T5EncoderTritonModel: public AbstractTransformerModel { private: // encoder - size_t encoder_head_num_; - size_t encoder_size_per_head_; - size_t encoder_d_model_; - size_t encoder_inter_size_; - size_t encoder_num_layer_; - size_t encoder_vocab_size_; - size_t encoder_num_bucket_or_max_pos_seq_len_; + size_t encoder_head_num_; + size_t encoder_size_per_head_; + size_t encoder_d_model_; + size_t encoder_inter_size_; + size_t encoder_num_layer_; + size_t encoder_vocab_size_; + size_t encoder_num_bucket_or_max_pos_seq_len_; + ft::LinearAdapterConfig encoder_adapter_{}; // prompt for encoder size_t num_tasks_ = 0; diff --git a/src/fastertransformer/triton_backend/t5-encoder/T5EncoderTritonModelInstance.cc b/src/fastertransformer/triton_backend/t5-encoder/T5EncoderTritonModelInstance.cc index 498a68cdb..45d86c643 100644 --- a/src/fastertransformer/triton_backend/t5-encoder/T5EncoderTritonModelInstance.cc +++ b/src/fastertransformer/triton_backend/t5-encoder/T5EncoderTritonModelInstance.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -122,8 +122,15 @@ T5EncoderTritonModelInstance::forward(std::shared_ptrforward(&encoder_output_tensors, &encoder_input_tensors, t5_encoder_weight_.get()); - cudaStreamSynchronize(t5_encoder_->getStream()); + try { + t5_encoder_->forward(&encoder_output_tensors, &encoder_input_tensors, t5_encoder_weight_.get()); + cudaStreamSynchronize(t5_encoder_->getStream()); + } + catch (...) { + h_exception_ = std::current_exception(); + encoder_output_tensors.insert( + {"error_message", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_BYTES, {1}, &h_exception_}}); + } return convert_outputs(encoder_output_tensors); } diff --git a/src/fastertransformer/triton_backend/t5-encoder/T5EncoderTritonModelInstance.h b/src/fastertransformer/triton_backend/t5-encoder/T5EncoderTritonModelInstance.h index fdf907b85..7ef3ee962 100644 --- a/src/fastertransformer/triton_backend/t5-encoder/T5EncoderTritonModelInstance.h +++ b/src/fastertransformer/triton_backend/t5-encoder/T5EncoderTritonModelInstance.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -70,4 +70,6 @@ struct T5EncoderTritonModelInstance: AbstractTransformerModelInstance { T* d_encoder_outputs_ = nullptr; T* d_output_attentions_ = nullptr; bool* d_within_range_ = nullptr; + + std::exception_ptr h_exception_ = nullptr; }; diff --git a/src/fastertransformer/triton_backend/t5/CMakeLists.txt b/src/fastertransformer/triton_backend/t5/CMakeLists.txt index fcd8341c7..e38504c32 100644 --- a/src/fastertransformer/triton_backend/t5/CMakeLists.txt +++ b/src/fastertransformer/triton_backend/t5/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -19,6 +19,7 @@ set(t5_triton_backend_files T5TritonModelInstance.cc ) -add_library(T5TritonBackend SHARED ${t5_triton_backend_files}) +add_library(T5TritonBackend STATIC ${t5_triton_backend_files}) +set_property(TARGET T5TritonBackend PROPERTY POSITION_INDEPENDENT_CODE ON) target_link_libraries(T5TritonBackend PRIVATE TransformerTritonBackend T5Encoder T5Decoding -lcublasLt) target_compile_features(T5TritonBackend PRIVATE cxx_std_14) diff --git a/src/fastertransformer/triton_backend/t5/T5TritonModel.cc b/src/fastertransformer/triton_backend/t5/T5TritonModel.cc index eea4c42f9..e30c11a43 100644 --- a/src/fastertransformer/triton_backend/t5/T5TritonModel.cc +++ b/src/fastertransformer/triton_backend/t5/T5TritonModel.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -60,6 +60,8 @@ T5TritonModel::T5TritonModel(INIReader reader, std::string model_dir): model_ encoder_vocab_size_ = reader.GetInteger("encoder", "vocab_size"); encoder_num_bucket_or_max_pos_seq_len_ = reader.GetInteger("encoder", "relative_attention_num_buckets_or_max_pos_seq_len"); + encoder_adapter_.interSize(reader.GetInteger("encoder", "adapter_inter_size", 0)); + encoder_adapter_.layerNormType(reader.Get("encoder", "adapter_norm_position", "pre")); // decoding decoding_head_num_ = reader.GetInteger("decoder", "num_heads"); @@ -70,6 +72,9 @@ T5TritonModel::T5TritonModel(INIReader reader, std::string model_dir): model_ decoding_vocab_size_ = reader.GetInteger("decoder", "vocab_size"); decoding_num_bucket_or_max_pos_seq_len_ = reader.GetInteger("decoder", "relative_attention_num_buckets_or_max_pos_seq_len"); + decoding_adapter_.interSize(reader.GetInteger("decoder", "adapter_inter_size", 0)); + decoding_adapter_.layerNormType(reader.Get("decoder", "adapter_norm_position", "pre")); + start_id_ = reader.GetInteger("decoder", "decoder_start_token_id"); end_id_ = reader.GetInteger("decoder", "eos_token_id"); tensor_para_size_ = reader.GetInteger("ft_instance_hyperparameter", "tensor_para_size"); @@ -116,6 +121,8 @@ T5TritonModel::T5TritonModel(size_t tensor_para_size, encoder_vocab_size_ = reader.GetInteger("encoder", "vocab_size"); encoder_num_bucket_or_max_pos_seq_len_ = reader.GetInteger("encoder", "relative_attention_num_buckets_or_max_pos_seq_len"); + encoder_adapter_.interSize(reader.GetInteger("encoder", "adapter_inter_size", 0)); + encoder_adapter_.layerNormType(reader.Get("encoder", "adapter_norm_position", "pre")); // encoder prompt num_tasks_ = reader.GetInteger("encoder", "num_tasks", 0); @@ -139,6 +146,9 @@ T5TritonModel::T5TritonModel(size_t tensor_para_size, decoding_vocab_size_ = reader.GetInteger("decoder", "vocab_size"); decoding_num_bucket_or_max_pos_seq_len_ = reader.GetInteger("decoder", "relative_attention_num_buckets_or_max_pos_seq_len"); + decoding_adapter_.interSize(reader.GetInteger("decoder", "adapter_inter_size", 0)); + decoding_adapter_.layerNormType(reader.Get("decoder", "adapter_norm_position", "pre")); + start_id_ = reader.GetInteger("decoder", "decoder_start_token_id"); end_id_ = reader.GetInteger("decoder", "eos_token_id"); tie_word_embeddings_ = reader.GetBoolean("decoder", "tie_word_embeddings", true); @@ -236,7 +246,8 @@ T5TritonModel::createModelInstance(int prompt_learning_start_id_, prompt_learning_type_, custom_all_reduce_comm, - enable_custom_all_reduce_)); + enable_custom_all_reduce_, + encoder_adapter_)); auto decoding = std::make_unique>(ft::T5Decoding(0, 0, @@ -272,7 +283,8 @@ T5TritonModel::createModelInstance(int activation_type_, tie_word_embeddings_, custom_all_reduce_comm, - enable_custom_all_reduce_)); + enable_custom_all_reduce_, + decoding_adapter_)); return std::unique_ptr>(new T5TritonModelInstance(std::move(encoder), std::move(decoding), @@ -309,7 +321,8 @@ void T5TritonModel::createSharedWeights(int device_id, int rank) position_embedding_type_, prompt_learning_type_, prompt_learning_table_pair_, - ia3_num_tasks_); + ia3_num_tasks_, + encoder_adapter_.interSize()); decoding_shared_weights_[device_id] = std::make_shared>(decoding_head_num_, @@ -327,11 +340,11 @@ void T5TritonModel::createSharedWeights(int device_id, int rank) t5_with_bias_, use_gated_activation_, position_embedding_type_, - ia3_num_tasks_); + ia3_num_tasks_, + decoding_adapter_.interSize()); encoder_shared_weights_[device_id]->loadModel(model_dir_); decoding_shared_weights_[device_id]->loadModel(model_dir_); - return; } template @@ -346,12 +359,14 @@ std::string T5TritonModel::toString() << "\n encoder_d_model_: " << encoder_d_model_ << "\n encoder_inter_size_: " << encoder_inter_size_ << "\n encoder_num_layer_: " << encoder_num_layer_ << "\n encoder_vocab_size_: " << encoder_vocab_size_ << "\n encoder_num_bucket_or_max_pos_seq_len_: " << encoder_num_bucket_or_max_pos_seq_len_ + << "\n encoder_adapter_: " << encoder_adapter_.toString() << "\n decoding_head_num_: " << decoding_head_num_ << "\n decoding_size_per_head_: " << decoding_size_per_head_ << "\n decoding_d_model_: " << decoding_d_model_ << "\n decoding_inter_size_: " << decoding_inter_size_ << "\n decoding_num_layer_: " << decoding_num_layer_ << "\n decoding_vocab_size_: " << decoding_vocab_size_ << "\n decoding_num_bucket_or_max_pos_seq_len_: " << decoding_num_bucket_or_max_pos_seq_len_ - << "\n t5_with_bias_: " << t5_with_bias_ << "\n use_gated_activation_: " << use_gated_activation_ + << "\n decoding_adapter: " << decoding_adapter_.toString() << "\n t5_with_bias_: " << t5_with_bias_ + << "\n use_gated_activation_: " << use_gated_activation_ << "\n position_embedding_type_: " << position_embedding_type_string << "\n start_id_: " << start_id_ << "\n end_id_: " << end_id_ << "\n model_name_: " << model_name_ << "\n model_dir_: " << model_dir_ << std::endl; diff --git a/src/fastertransformer/triton_backend/t5/T5TritonModel.h b/src/fastertransformer/triton_backend/t5/T5TritonModel.h index eb774b743..5693c82d8 100644 --- a/src/fastertransformer/triton_backend/t5/T5TritonModel.h +++ b/src/fastertransformer/triton_backend/t5/T5TritonModel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -57,13 +57,14 @@ struct T5TritonModel: public AbstractTransformerModel { private: // encoder - size_t encoder_head_num_; - size_t encoder_size_per_head_; - size_t encoder_d_model_; - size_t encoder_inter_size_; - size_t encoder_num_layer_; - size_t encoder_vocab_size_; - size_t encoder_num_bucket_or_max_pos_seq_len_; + size_t encoder_head_num_; + size_t encoder_size_per_head_; + size_t encoder_d_model_; + size_t encoder_inter_size_; + size_t encoder_num_layer_; + size_t encoder_vocab_size_; + size_t encoder_num_bucket_or_max_pos_seq_len_; + ft::LinearAdapterConfig encoder_adapter_{}; // prompt for encoder size_t num_tasks_ = 0; @@ -72,13 +73,14 @@ struct T5TritonModel: public AbstractTransformerModel { std::map> prompt_learning_table_pair_ = {}; // decoding - size_t decoding_head_num_; - size_t decoding_size_per_head_; - size_t decoding_d_model_; - size_t decoding_inter_size_; - size_t decoding_num_layer_; - size_t decoding_vocab_size_; - size_t decoding_num_bucket_or_max_pos_seq_len_; + size_t decoding_head_num_; + size_t decoding_size_per_head_; + size_t decoding_d_model_; + size_t decoding_inter_size_; + size_t decoding_num_layer_; + size_t decoding_vocab_size_; + size_t decoding_num_bucket_or_max_pos_seq_len_; + ft::LinearAdapterConfig decoding_adapter_{}; float q_scaling_; size_t ia3_num_tasks_; diff --git a/src/fastertransformer/triton_backend/t5/T5TritonModelInstance.cc b/src/fastertransformer/triton_backend/t5/T5TritonModelInstance.cc index c0e78b10e..53afb2921 100644 --- a/src/fastertransformer/triton_backend/t5/T5TritonModelInstance.cc +++ b/src/fastertransformer/triton_backend/t5/T5TritonModelInstance.cc @@ -196,8 +196,15 @@ T5TritonModelInstance::forward(std::shared_ptrat("ia3_tasks"), d_input_ia3_tasks_)}); } - t5_encoder_->forward(&encoder_output_tensors, &encoder_input_tensors, t5_encoder_weight_.get()); - t5_decoding_->forward(&decoding_output_tensors, &decoding_input_tensors, t5_decoding_weight_.get()); + try { + t5_encoder_->forward(&encoder_output_tensors, &encoder_input_tensors, t5_encoder_weight_.get()); + t5_decoding_->forward(&decoding_output_tensors, &decoding_input_tensors, t5_decoding_weight_.get()); + } + catch (...) { + h_exception_ = std::current_exception(); + decoding_output_tensors.insert( + {"error_message", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_BYTES, {1}, &h_exception_}}); + } return convert_outputs(decoding_output_tensors); } diff --git a/src/fastertransformer/triton_backend/t5/T5TritonModelInstance.h b/src/fastertransformer/triton_backend/t5/T5TritonModelInstance.h index 5dd505504..b02292665 100644 --- a/src/fastertransformer/triton_backend/t5/T5TritonModelInstance.h +++ b/src/fastertransformer/triton_backend/t5/T5TritonModelInstance.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -87,4 +87,6 @@ struct T5TritonModelInstance: AbstractTransformerModelInstance { bool* d_within_range_ = nullptr; int h_total_output_len_; + + std::exception_ptr h_exception_ = nullptr; }; diff --git a/src/fastertransformer/triton_backend/transformer_triton_backend.cpp b/src/fastertransformer/triton_backend/transformer_triton_backend.cpp index eb8d7e913..cda6d9542 100644 --- a/src/fastertransformer/triton_backend/transformer_triton_backend.cpp +++ b/src/fastertransformer/triton_backend/transformer_triton_backend.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/triton_backend/transformer_triton_backend.hpp b/src/fastertransformer/triton_backend/transformer_triton_backend.hpp index bfc355fd7..ebcd542d9 100644 --- a/src/fastertransformer/triton_backend/transformer_triton_backend.hpp +++ b/src/fastertransformer/triton_backend/transformer_triton_backend.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -288,6 +288,7 @@ struct AbstractTransformerModelInstance { struct AbstractTransformerModel { static std::shared_ptr createGptModel(std::string inifile); + static std::shared_ptr createGptFP8Model(std::string inifile); static std::shared_ptr createGptJModel(std::string inifile); static std::shared_ptr createGptNeoXModel(std::string inifile); static std::shared_ptr createT5Model(std::string model_dir); diff --git a/src/fastertransformer/triton_backend/triton_utils.hpp b/src/fastertransformer/triton_backend/triton_utils.hpp index ade39e574..36ee486ad 100644 --- a/src/fastertransformer/triton_backend/triton_utils.hpp +++ b/src/fastertransformer/triton_backend/triton_utils.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/CMakeLists.txt b/src/fastertransformer/utils/CMakeLists.txt index 8cec6695e..0fc47e8d3 100644 --- a/src/fastertransformer/utils/CMakeLists.txt +++ b/src/fastertransformer/utils/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -34,10 +34,9 @@ target_link_libraries(cublasAlgoMap PUBLIC -lcublas -lcudart -lcurand cuda_utils add_library(cublasMMWrapper STATIC cublasMMWrapper.cc) set_property(TARGET cublasMMWrapper PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET cublasMMWrapper PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) -if (SPARSITY_SUPPORT) -target_link_libraries(cublasMMWrapper PUBLIC -lcublas -lcudart -lcurand -lcusparse -lcusparseLt cublasAlgoMap cuda_utils logger) -else() target_link_libraries(cublasMMWrapper PUBLIC -lcublas -lcudart -lcurand cublasAlgoMap cuda_utils logger) +if (SPARSITY_SUPPORT) +target_link_libraries(cublasMMWrapper PUBLIC -lcusparse -lcusparseLt) endif() add_library(word_list STATIC word_list.cc) @@ -48,10 +47,11 @@ add_library(nvtx_utils STATIC nvtx_utils.cc) set_property(TARGET nvtx_utils PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET nvtx_utils PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) target_link_libraries(nvtx_utils PUBLIC -lnvToolsExt) + add_library(memory_utils STATIC memory_utils.cu) set_property(TARGET memory_utils PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET memory_utils PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) -target_link_libraries(memory_utils PUBLIC -lnvToolsExt cuda_utils logger tensor cutlass_preprocessors) +target_link_libraries(memory_utils PUBLIC cuda_utils logger tensor cutlass_preprocessors) add_library(mpi_utils STATIC mpi_utils.cc) set_property(TARGET mpi_utils PROPERTY POSITION_INDEPENDENT_CODE ON) @@ -72,6 +72,14 @@ set_property(TARGET cublasINT8MMWrapper PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET cublasINT8MMWrapper PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) target_link_libraries(cublasINT8MMWrapper PUBLIC -lcublasLt -lcudart -lcurand cublasAlgoMap cublasMMWrapper cuda_utils logger) +if(ENABLE_FP8) +add_library(cublasFP8MMWrapper STATIC cublasFP8MMWrapper.cu) +set_property(TARGET cublasFP8MMWrapper PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET cublasFP8MMWrapper PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(cublasFP8MMWrapper PUBLIC -lcublasLt -lcudart -lcurand + cublasAlgoMap cublasMMWrapper nvtx_utils fp8_qgmma_1x1_utils) +endif() + add_library(custom_ar_comm STATIC custom_ar_comm.cc) set_property(TARGET custom_ar_comm PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET custom_ar_comm PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) @@ -80,16 +88,17 @@ target_link_libraries(custom_ar_comm PUBLIC custom_ar_kernels memory_utils cuda_ add_library(gemm STATIC gemm.cc) set_property(TARGET gemm PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET gemm PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(gemm PUBLIC + -lcublas -lcublasLt -lcudart -lcurand + cublasAlgoMap memory_utils cuda_utils logger) if (SPARSITY_SUPPORT) - target_link_libraries(gemm PUBLIC - -lcublas -lcublasLt -lcudart -lcurand -lcusparse -lcusparseLt - cublasAlgoMap memory_utils cuda_utils logger) -else() - target_link_libraries(gemm PUBLIC - -lcublas -lcublasLt -lcudart -lcurand - cublasAlgoMap memory_utils cuda_utils logger) + target_link_libraries(gemm PUBLIC -lcusparse -lcusparseLt) endif() +add_library(cuda_fp8_utils STATIC cuda_fp8_utils.cu) +set_property(TARGET cuda_fp8_utils PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET cuda_fp8_utils PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) + add_library(tensor STATIC Tensor.cc) set_property(TARGET tensor PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET tensor PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) diff --git a/src/fastertransformer/utils/IA3.h b/src/fastertransformer/utils/IA3.h index 841c14002..1a0d227e8 100644 --- a/src/fastertransformer/utils/IA3.h +++ b/src/fastertransformer/utils/IA3.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/ScaleList.h b/src/fastertransformer/utils/ScaleList.h index acb343550..24130ad06 100644 --- a/src/fastertransformer/utils/ScaleList.h +++ b/src/fastertransformer/utils/ScaleList.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/Tensor.cc b/src/fastertransformer/utils/Tensor.cc index e19e50084..e2e1f5c3d 100644 --- a/src/fastertransformer/utils/Tensor.cc +++ b/src/fastertransformer/utils/Tensor.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -201,6 +201,7 @@ std::string Tensor::toString() const {TYPE_FP64, "FP64"}, {TYPE_BYTES, "BYTES"}, {TYPE_INVALID, "INVALID"}, + {TYPE_FP8_E4M3, "E4M3"}, {TYPE_VOID, "VOID"}, }; return fmtstr("Tensor[where=%s, type=%s, shape=%s, data=%p]", @@ -242,6 +243,9 @@ size_t Tensor::getTypeSize(DataType type) {TYPE_INT64, sizeof(int64_t)}, #ifdef ENABLE_BF16 {TYPE_BF16, sizeof(__nv_bfloat16)}, +#endif +#ifdef ENABLE_FP8 + {TYPE_FP8_E4M3, sizeof(__nv_fp8_e4m3)}, #endif {TYPE_FP16, sizeof(half)}, {TYPE_FP32, sizeof(float)}, diff --git a/src/fastertransformer/utils/Tensor.h b/src/fastertransformer/utils/Tensor.h index ce28298a9..d3511c9a6 100644 --- a/src/fastertransformer/utils/Tensor.h +++ b/src/fastertransformer/utils/Tensor.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -17,6 +17,7 @@ #pragma once #include "src/fastertransformer/utils/cuda_bf16_wrapper.h" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" #include "src/fastertransformer/utils/cuda_utils.h" #include "src/fastertransformer/utils/string_utils.h" @@ -50,6 +51,7 @@ typedef enum datatype_enum { TYPE_FP64, TYPE_BYTES, TYPE_BF16, + TYPE_FP8_E4M3, TYPE_STR, TYPE_VOID, } DataType; @@ -67,6 +69,11 @@ DataType getTensorType() else if (std::is_same::value || std::is_same::value) { return TYPE_BF16; } +#endif +#ifdef ENABLE_FP8 + else if (std::is_same::value || std::is_same::value) { + return TYPE_FP8_E4M3; + } #endif else if (std::is_same::value || std::is_same::value) { return TYPE_INT32; @@ -326,7 +333,7 @@ class TensorMap { inline void insert(const std::string& key, const Tensor& value) { FT_CHECK_WITH_INFO(!isExist(key), fmtstr("Duplicated key %s", key.c_str())); - FT_CHECK_WITH_INFO(isValid(value), fmtstr("A none tensor or nullptr is not allowed. key: %s", key.c_str())); + FT_CHECK_WITH_INFO(isValid(value), fmtstr("A none tensor or nullptr is not allowed (key is %s)", key.c_str())); tensor_map_.insert({key, value}); } @@ -376,6 +383,7 @@ class TensorMap { inline Tensor at(const std::string& key, Tensor& default_tensor) const { + FT_LOG_DEBUG("%s for key %s", __PRETTY_FUNCTION__, key.c_str()); if (isExist(key)) { return tensor_map_.at(key); } diff --git a/src/fastertransformer/utils/activation_types.h b/src/fastertransformer/utils/activation_types.h index d6f6e67bf..c608d3d7d 100644 --- a/src/fastertransformer/utils/activation_types.h +++ b/src/fastertransformer/utils/activation_types.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/allocator.h b/src/fastertransformer/utils/allocator.h index 16f562422..65698098d 100644 --- a/src/fastertransformer/utils/allocator.h +++ b/src/fastertransformer/utils/allocator.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/conv2d.h b/src/fastertransformer/utils/conv2d.h index 75955f4b5..e2b202ab1 100644 --- a/src/fastertransformer/utils/conv2d.h +++ b/src/fastertransformer/utils/conv2d.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/convert_data_type.h b/src/fastertransformer/utils/convert_data_type.h index ce7a272ba..d6fec358b 100644 --- a/src/fastertransformer/utils/convert_data_type.h +++ b/src/fastertransformer/utils/convert_data_type.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/cublasAlgoMap.cc b/src/fastertransformer/utils/cublasAlgoMap.cc index 13d14bc55..1c8313e89 100644 --- a/src/fastertransformer/utils/cublasAlgoMap.cc +++ b/src/fastertransformer/utils/cublasAlgoMap.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -50,6 +50,7 @@ void cublasAlgoMap::loadGemmConfig() int batchCount2, m2, n2, k2, algoId, customOption, tile, splitK_val; int batch_size, seq_len, head_num, size_per_head, dataType; int swizzle, reductionScheme, workspaceSize, stages; + int inner_shapeId, cluster_shapeId, mma_shapeId, cga_shapeId, sche_mode; float exec_time; char tmp[1024]; if (!fgets(tmp, 1024, fd)) { @@ -57,7 +58,13 @@ void cublasAlgoMap::loadGemmConfig() exit(-1); } while (fscanf(fd, - "%d %d %d %d %d ### %d %d %d %d %d %d %d %d %d %d %d %d %f\n", + "%d %d %d %d %d ### %d %d %d %d %d %d %d %d %d %d %d %d " +#if (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH >= 3) + "%d %d " +#elif (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH < 3) + "%d %d %d " +#endif + "%f\n", &batch_size, &seq_len, &head_num, @@ -75,10 +82,18 @@ void cublasAlgoMap::loadGemmConfig() &reductionScheme, &workspaceSize, &stages, +#if (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH >= 3) + &inner_shapeId, + &cluster_shapeId, +#elif (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH < 3) + &mma_shapeId, + &cga_shapeId, + &sche_mode, +#endif &exec_time) != EOF) { if (dataType != FLOAT_DATATYPE && dataType != HALF_DATATYPE && dataType != BFLOAT16_DATATYPE - && dataType != INT8_DATATYPE) { + && dataType != INT8_DATATYPE && dataType != FP8_DATATYPE) { printf("[WARNING][readAlgoFromConfig] wrong dataType %d!\n", dataType); continue; } @@ -95,7 +110,15 @@ void cublasAlgoMap::loadGemmConfig() algo_map_[markStr].reductionScheme = reductionScheme; algo_map_[markStr].workspaceSize = workspaceSize; algo_map_[markStr].stages = stages; - algo_map_[markStr].exec_time = exec_time; +#if (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH >= 3) + algo_map_[markStr].inner_shapeId = (uint16_t)inner_shapeId; + algo_map_[markStr].cluster_shapeId = (uint16_t)cluster_shapeId; +#elif (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH < 3) + algo_map_[markStr].mma_shapeId = (uint16_t)mma_shapeId; + algo_map_[markStr].cga_shapeId = (uint16_t)cga_shapeId; + algo_map_[markStr].sche_mode = (uint16_t)sche_mode; +#endif + algo_map_[markStr].exec_time = exec_time; } } fclose(fd); diff --git a/src/fastertransformer/utils/cublasAlgoMap.h b/src/fastertransformer/utils/cublasAlgoMap.h index f46c24919..7d148d240 100644 --- a/src/fastertransformer/utils/cublasAlgoMap.h +++ b/src/fastertransformer/utils/cublasAlgoMap.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -35,7 +35,12 @@ typedef struct { int algoId, customOption, tile, splitK_val; int swizzle, reductionScheme, workspaceSize; // only used in cublasLt >= 11.0 - int stages; + int stages; +#if (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH >= 3) + uint16_t inner_shapeId, cluster_shapeId; +#elif (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH < 3) + uint16_t mma_shapeId, cga_shapeId, sche_mode; +#endif float exec_time; } cublasLtMatmulAlgo_info; diff --git a/src/fastertransformer/utils/cublasFP8MMWrapper.cu b/src/fastertransformer/utils/cublasFP8MMWrapper.cu new file mode 100644 index 000000000..47c9b51f3 --- /dev/null +++ b/src/fastertransformer/utils/cublasFP8MMWrapper.cu @@ -0,0 +1,998 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "cublasFP8MMWrapper.h" +#include "cuda_utils.h" + +namespace fastertransformer { + +#define CUBLAS_WORKSPACE_1MB 1048576 +cublasFP8MMWrapper::cublasFP8MMWrapper(cublasLtHandle_t cublaslt_handle, + cudaStream_t stream, + cublasAlgoMap* cublas_algo_map, + std::mutex* mu, + IAllocator* allocator): + cublasMMWrapper(nullptr, cublaslt_handle, stream, cublas_algo_map, mu, allocator) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + FT_CHECK_WITH_INFO(allocator != nullptr, "must pass allocator to cublasFP8MMWrapper"); + cublasVersionCheck(); + + if (allocator_ != nullptr) { + cublas_workspace_qgemm_ = allocator_->reMalloc(cublas_workspace_qgemm_, CUBLAS_WORKSPACE_1MB, true); + } +} + +cublasFP8MMWrapper::cublasFP8MMWrapper(cublasHandle_t cublas_handle, + cublasLtHandle_t cublaslt_handle, + cudaStream_t stream, + cublasAlgoMap* cublas_algo_map, + std::mutex* mu, + IAllocator* allocator): + cublasMMWrapper(cublas_handle, cublaslt_handle, stream, cublas_algo_map, mu, allocator) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + FT_CHECK_WITH_INFO(allocator != nullptr, "must pass allocator to cublasFP8MMWrapper"); + cublasVersionCheck(); + if (allocator_ != nullptr) { + cublas_workspace_qgemm_ = allocator_->reMalloc(cublas_workspace_qgemm_, CUBLAS_WORKSPACE_1MB, true); + } +} + +cublasFP8MMWrapper::~cublasFP8MMWrapper() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + mu_ = nullptr; + if (allocator_ != nullptr) { + allocator_->free((void**)(&cublas_workspace_qgemm_)); + } +} + +cublasFP8MMWrapper::cublasFP8MMWrapper(const cublasFP8MMWrapper& wrapper): + cublasMMWrapper(wrapper.cublas_handle_, + wrapper.cublaslt_handle_, + wrapper.stream_, + wrapper.cublas_algo_map_, + wrapper.mu_, + wrapper.allocator_) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + cublasVersionCheck(); +} + +void cublasFP8MMWrapper::cublasVersionCheck() +{ + cublasGetProperty(MAJOR_VERSION, &version_major_); + cublasGetProperty(MINOR_VERSION, &version_minor_); + cublasGetProperty(PATCH_LEVEL, &version_patch_); + size_t cublasVersion = (version_major_ * 10000 + version_minor_ * 100 + version_patch_); +#if defined(FP8_MHA) || !defined(FP8_GEMM_OUTPUT_QUANT_DISABLE) + FT_CHECK_WITH_INFO(version_major_ == 11 && version_minor_ == 11 && version_patch_ >= 4, + "FP8 MHA needs d-scale, which is only supported after cublas 11.11.4 !"); +#endif +} + +void cublasFP8MMWrapper::Gemm(__nv_bfloat16* res, + int batchCount, + int m, + int n, + int k, + int64_t strideA, + int64_t strideB, + int64_t strideD, + const float* alpha, + const float* beta, + const __nv_fp8_e4m3* input, + const __nv_fp8_e4m3* kernel, + const float* input_scale, + const float* kernel_scale) +{ + Gemm(res, + batchCount, + m, + n, + k, + strideA, + strideB, + strideD, + alpha, + beta, + input, + kernel, + input_scale, + kernel_scale, + (cudaStream_t)0); +} + +void cublasFP8MMWrapper::Gemm(__nv_bfloat16* res, + int batchCount, + int m, + int n, + int k, + int64_t strideA, + int64_t strideB, + int64_t strideD, + const float* alpha, + const float* beta, + const __nv_fp8_e4m3* input, + const __nv_fp8_e4m3* kernel, + const float* input_scale, + const float* kernel_scale, + cudaStream_t stream, + bool fastAccum) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + mu_->lock(); + + const void* devAscalePtr = (const void*)kernel_scale; + const void* devBscalePtr = (const void*)input_scale; + const size_t wsSizeBytes = CUBLAS_WORKSPACE_SIZE; + + const auto aType = CUDA_R_8F_E4M3; + const auto bType = CUDA_R_8F_E4M3; + const auto dType = CUDA_R_16BF; + const auto computeType = CUBLAS_COMPUTE_32F; + const auto scaleType = CUDA_R_32F; + // const auto epilogueAuxType = CUDA_R_16BF; + + const cublasOperation_t tA = CUBLAS_OP_T; + const cublasOperation_t tB = CUBLAS_OP_N; + + //------- init, desc & tensors + cublasLtMatmulDesc_t matmulDesc; + cublasLtMatrixLayout_t Adesc; + cublasLtMatrixLayout_t Bdesc; + cublasLtMatrixLayout_t Ddesc; + + { + check_cuda_error(cublasLtMatmulDescCreate(&matmulDesc, computeType, scaleType)); + check_cuda_error(cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_TRANSA, &tA, sizeof(tA))); + check_cuda_error(cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_TRANSB, &tB, sizeof(tB))); + + if (version_major_ >= 11 && version_minor_ >= 11 && version_patch_ > 0 && fastAccum) { + const int8_t fastAccuMode = 1; // enable fast imprecise accum + check_cuda_error(cublasLtMatmulDescSetAttribute( + matmulDesc, CUBLASLT_MATMUL_DESC_FAST_ACCUM, &fastAccuMode, sizeof(decltype(fastAccuMode)))); + } + + // TODO: Check that do we need to set these attributes + // TODO: comment them for compiler first + check_cuda_error(cublasLtMatmulDescSetAttribute( + matmulDesc, CUBLASLT_MATMUL_DESC_A_SCALE_POINTER, &devAscalePtr, sizeof(devAscalePtr))); + check_cuda_error(cublasLtMatmulDescSetAttribute( + matmulDesc, CUBLASLT_MATMUL_DESC_B_SCALE_POINTER, &devBscalePtr, sizeof(devBscalePtr))); + } + + { + const int64_t lda = k; + const int64_t ldb = k; + const int64_t ldd = n; + + // create matrix descriptors, we are good with the details here so no need + // to set any extra attributes + check_cuda_error( + cublasLtMatrixLayoutCreate(&Adesc, aType, tA == CUBLAS_OP_N ? n : k, tA == CUBLAS_OP_N ? k : n, lda)); + if (batchCount > 1) { + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Adesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount))); + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Adesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideA, sizeof(strideA))); + } + + check_cuda_error( + cublasLtMatrixLayoutCreate(&Bdesc, bType, tB == CUBLAS_OP_N ? k : m, tB == CUBLAS_OP_N ? m : k, ldb)); + if (batchCount > 1) { + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Bdesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount))); + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Bdesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideB, sizeof(strideB))); + } + + check_cuda_error(cublasLtMatrixLayoutCreate(&Ddesc, dType, n, m, ldd)); + if (batchCount > 1) { + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Ddesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount))); + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Ddesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideD, sizeof(strideD))); + } + } + + bool findAlgo = cublas_algo_map_->isExist(batchCount, n, m, k, FP8_DATATYPE); + cublasLtMatmulAlgo_info info = cublas_algo_map_->getAlgo(batchCount, n, m, k, FP8_DATATYPE); + if (info.stages == -1) { + findAlgo = false; + } + + cublasLtMatmulAlgo_t algo; + int workspaceSize = cublas_workspace_ == NULL ? 0 : CUBLAS_WORKSPACE_SIZE; + if (findAlgo) { + if (info.workspaceSize > workspaceSize) { + findAlgo = false; + } + else { + cublasLtMatmulAlgoInit( + cublaslt_handle_, computeType, scaleType, aType, bType, dType, dType, info.algoId, &algo); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_CUSTOM_OPTION, &(info.customOption), sizeof(info.customOption)); + cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_TILE_ID, &(info.tile), sizeof(info.tile)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_SPLITK_NUM, &(info.splitK_val), sizeof(info.splitK_val)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_CTA_SWIZZLING, &(info.swizzle), sizeof(info.swizzle)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, &(info.reductionScheme), sizeof(info.reductionScheme)); + +#if (CUDART_VERSION >= 11000) + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_STAGES_ID, &(info.stages), sizeof(info.stages)); +#endif + +#if (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH >= 3) + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_INNER_SHAPE_ID, &(info.inner_shapeId), sizeof(info.inner_shapeId)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_CLUSTER_SHAPE_ID, &(info.cluster_shapeId), sizeof(info.cluster_shapeId)); +#elif (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH < 3) + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_MMA_SHAPE_ID, &(info.mma_shapeId), sizeof(info.mma_shapeId)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_CGA_SHAPE_ID, &(info.cga_shapeId), sizeof(info.cga_shapeId)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_SCHEDULING_MODE, &(info.sche_mode), sizeof(info.sche_mode)); +#endif + } + } + + { + cublasStatus_t status = cublasLtMatmul(cublaslt_handle_, + matmulDesc, + alpha, + kernel, + Adesc, + input, + Bdesc, + beta, + nullptr, // Cptr, not used here + Ddesc, + res, + Ddesc, + (findAlgo ? (&algo) : NULL), + cublas_workspace_, + wsSizeBytes, + stream); + check_cuda_error(status); + } + + if (Ddesc) { + check_cuda_error(cublasLtMatrixLayoutDestroy(Ddesc)); + } + if (Bdesc) { + check_cuda_error(cublasLtMatrixLayoutDestroy(Bdesc)); + } + if (Adesc) { + check_cuda_error(cublasLtMatrixLayoutDestroy(Adesc)); + } + if (matmulDesc) { + check_cuda_error(cublasLtMatmulDescDestroy(matmulDesc)); + } + + mu_->unlock(); +} + +void cublasFP8MMWrapper::Gemm(__nv_fp8_e4m3* res, + int batchCount, + int m, + int n, + int k, + int64_t strideA, + int64_t strideB, + int64_t strideD, + const float* alpha, + const float* beta, + const __nv_fp8_e4m3* input, + const __nv_fp8_e4m3* kernel, + const float* input_scale, + const float* kernel_scale, + const float* output_scale) +{ + Gemm(res, + batchCount, + m, + n, + k, + strideA, + strideB, + strideD, + alpha, + beta, + input, + kernel, + input_scale, + kernel_scale, + output_scale, + 0); +} + +void cublasFP8MMWrapper::Gemm(__nv_fp8_e4m3* res, + int batchCount, + int m, + int n, + int k, + int64_t strideA, + int64_t strideB, + int64_t strideD, + const float* alpha, + const float* beta, + const __nv_fp8_e4m3* input, + const __nv_fp8_e4m3* kernel, + const float* input_scale, + const float* kernel_scale, + const float* output_scale, + cudaStream_t stream, + bool fastAccum) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + mu_->lock(); + + const void* devAscalePtr = (const void*)kernel_scale; + const void* devBscalePtr = (const void*)input_scale; + const void* devDscalePtr = (const void*)output_scale; + + FT_CHECK(cublas_workspace_ != nullptr); + const size_t wsSizeBytes = CUBLAS_WORKSPACE_SIZE; + + const auto aType = CUDA_R_8F_E4M3; + const auto bType = CUDA_R_8F_E4M3; + const auto cType = CUDA_R_16BF; + const auto dType = CUDA_R_8F_E4M3; + const auto computeType = CUBLAS_COMPUTE_32F; + const auto scaleType = CUDA_R_32F; + + const cublasOperation_t tA = CUBLAS_OP_T; + const cublasOperation_t tB = CUBLAS_OP_N; + + //------- init, desc & tensors + cublasLtMatmulDesc_t matmulDesc; + cublasLtMatrixLayout_t Adesc; + cublasLtMatrixLayout_t Bdesc; + cublasLtMatrixLayout_t Cdesc; + cublasLtMatrixLayout_t Ddesc; + + { + check_cuda_error(cublasLtMatmulDescCreate(&matmulDesc, computeType, scaleType)); + check_cuda_error(cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_TRANSA, &tA, sizeof(tA))); + check_cuda_error(cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_TRANSB, &tB, sizeof(tB))); + + if (version_major_ >= 11 && version_minor_ >= 11 && version_patch_ > 0 && fastAccum) { + const int8_t fastAccuMode = 1; // enable fast imprecise accum + check_cuda_error(cublasLtMatmulDescSetAttribute( + matmulDesc, CUBLASLT_MATMUL_DESC_FAST_ACCUM, &fastAccuMode, sizeof(decltype(fastAccuMode)))); + } + + // TODO: Check that do we need to set these attributes + // TODO: comment them for compiler first + check_cuda_error(cublasLtMatmulDescSetAttribute( + matmulDesc, CUBLASLT_MATMUL_DESC_A_SCALE_POINTER, &devAscalePtr, sizeof(devAscalePtr))); + check_cuda_error(cublasLtMatmulDescSetAttribute( + matmulDesc, CUBLASLT_MATMUL_DESC_B_SCALE_POINTER, &devBscalePtr, sizeof(devBscalePtr))); + // check_cuda_error(cublasLtMatmulDescSetAttribute( + // matmulDesc, CUBLASLT_MATMUL_DESC_C_SCALE_POINTER, &devDscalePtr, sizeof(devDscalePtr))); + check_cuda_error(cublasLtMatmulDescSetAttribute( + matmulDesc, CUBLASLT_MATMUL_DESC_D_SCALE_POINTER, &devDscalePtr, sizeof(devDscalePtr))); + } + + { + const int64_t lda = k; + const int64_t ldb = k; + const int64_t ldd = n; + + // create matrix descriptors, we are good with the details here so no need + // to set any extra attributes + check_cuda_error( + cublasLtMatrixLayoutCreate(&Adesc, aType, tA == CUBLAS_OP_N ? n : k, tA == CUBLAS_OP_N ? k : n, lda)); + if (batchCount > 1) { + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Adesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount))); + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Adesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideA, sizeof(strideA))); + } + + check_cuda_error( + cublasLtMatrixLayoutCreate(&Bdesc, bType, tB == CUBLAS_OP_N ? k : m, tB == CUBLAS_OP_N ? m : k, ldb)); + if (batchCount > 1) { + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Bdesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount))); + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Bdesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideB, sizeof(strideB))); + } + + check_cuda_error(cublasLtMatrixLayoutCreate(&Cdesc, cType, n, m, ldd)); + if (batchCount > 1) { + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Cdesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount))); + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Cdesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideD, sizeof(strideD))); + } + check_cuda_error(cublasLtMatrixLayoutCreate(&Ddesc, dType, n, m, ldd)); + if (batchCount > 1) { + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Ddesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount))); + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Ddesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideD, sizeof(strideD))); + } + } + + bool findAlgo = cublas_algo_map_->isExist(batchCount, n, m, k, FP8_DATATYPE); + cublasLtMatmulAlgo_info info = cublas_algo_map_->getAlgo(batchCount, n, m, k, FP8_DATATYPE); + if (info.stages == -1) { + findAlgo = false; + } + + cublasLtMatmulAlgo_t algo; + int workspaceSize = cublas_workspace_ == NULL ? 0 : CUBLAS_WORKSPACE_SIZE; + if (findAlgo) { + if (info.workspaceSize > workspaceSize) { + findAlgo = false; + } + else { + cublasLtMatmulAlgoInit( + cublaslt_handle_, computeType, scaleType, aType, bType, cType, dType, info.algoId, &algo); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_CUSTOM_OPTION, &(info.customOption), sizeof(info.customOption)); + cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_TILE_ID, &(info.tile), sizeof(info.tile)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_SPLITK_NUM, &(info.splitK_val), sizeof(info.splitK_val)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_CTA_SWIZZLING, &(info.swizzle), sizeof(info.swizzle)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, &(info.reductionScheme), sizeof(info.reductionScheme)); + +#if (CUDART_VERSION >= 11000) + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_STAGES_ID, &(info.stages), sizeof(info.stages)); +#endif + +#if (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH >= 3) + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_INNER_SHAPE_ID, &(info.inner_shapeId), sizeof(info.inner_shapeId)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_CLUSTER_SHAPE_ID, &(info.cluster_shapeId), sizeof(info.cluster_shapeId)); +#elif (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH < 3) + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_MMA_SHAPE_ID, &(info.mma_shapeId), sizeof(info.mma_shapeId)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_CGA_SHAPE_ID, &(info.cga_shapeId), sizeof(info.cga_shapeId)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_SCHEDULING_MODE, &(info.sche_mode), sizeof(info.sche_mode)); +#endif + } + } + + { + cublasStatus_t status = cublasLtMatmul(cublaslt_handle_, + matmulDesc, + alpha, + kernel, + Adesc, + input, + Bdesc, + beta, + nullptr, // Cptr, not used here + Cdesc, + res, + Ddesc, + (findAlgo ? (&algo) : NULL), + cublas_workspace_, + wsSizeBytes, + stream); + check_cuda_error(status); + } + + if (Ddesc) { + check_cuda_error(cublasLtMatrixLayoutDestroy(Ddesc)); + } + if (Cdesc) { + check_cuda_error(cublasLtMatrixLayoutDestroy(Cdesc)); + } + if (Bdesc) { + check_cuda_error(cublasLtMatrixLayoutDestroy(Bdesc)); + } + if (Adesc) { + check_cuda_error(cublasLtMatrixLayoutDestroy(Adesc)); + } + if (matmulDesc) { + check_cuda_error(cublasLtMatmulDescDestroy(matmulDesc)); + } + + mu_->unlock(); +} + +template +void cublasFP8MMWrapper::Conv1x1Gemm(__nv_fp8_e4m3* res, + int m, + int n, + int k, + const __nv_fp8_e4m3* input, + const __nv_fp8_e4m3* kernel, + const __nv_bfloat16* bias, + const float input_scale, + const float kernel_scale, + const float output_scale, + cudaStream_t stream) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + mu_->lock(); + size_t workspace_size = 0; + // get workspace size + qgmmaLauncher.getWorkSpaceSize(n, workspace_size); + + if (workspace_size > CUBLAS_WORKSPACE_1MB) { + throw std::runtime_error("Need to rellocate workspace for qgemm. It is not supported"); + // cublas_workspace_qgemm_ = allocator_->reMalloc(cublas_workspace_qgemm_, workspace_size); + } + + qgmmaLauncher.invokeQgmma1x1( + res, m, n, k, input, kernel, bias, input_scale, kernel_scale, output_scale, cublas_workspace_qgemm_, stream); + sync_check_cuda_error(); + mu_->unlock(); +} + +template void cublasFP8MMWrapper::Conv1x1Gemm(__nv_fp8_e4m3* res, + int m, + int n, + int k, + const __nv_fp8_e4m3* input, + const __nv_fp8_e4m3* kernel, + const __nv_bfloat16* bias, + const float input_scale, + const float kernel_scale, + const float output_scale, + cudaStream_t stream); +template void cublasFP8MMWrapper::Conv1x1Gemm(__nv_fp8_e4m3* res, + int m, + int n, + int k, + const __nv_fp8_e4m3* input, + const __nv_fp8_e4m3* kernel, + const __nv_bfloat16* bias, + const float input_scale, + const float kernel_scale, + const float output_scale, + cudaStream_t stream); +template void cublasFP8MMWrapper::Conv1x1Gemm(__nv_fp8_e4m3* res, + int m, + int n, + int k, + const __nv_fp8_e4m3* input, + const __nv_fp8_e4m3* kernel, + const __nv_bfloat16* bias, + const float input_scale, + const float kernel_scale, + const float output_scale, + cudaStream_t stream); +template void cublasFP8MMWrapper::Conv1x1Gemm(__nv_fp8_e4m3* res, + int m, + int n, + int k, + const __nv_fp8_e4m3* input, + const __nv_fp8_e4m3* kernel, + const __nv_bfloat16* bias, + const float input_scale, + const float kernel_scale, + const float output_scale, + cudaStream_t stream); + +template +void cublasFP8MMWrapper::Gemm_Bias_Act(__nv_bfloat16* res, + int batchCount, + int m, + int n, + int k, + int64_t strideA, + int64_t strideB, + int64_t strideD, + const float* alpha, + const float* beta, + const __nv_fp8_e4m3* input, + const __nv_fp8_e4m3* kernel, + const float* input_scale, + const float* kernel_scale, + const __nv_bfloat16* bias, + const float* output_scale, + cudaStream_t stream) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + mu_->lock(); + + const void* devAscalePtr = (const void*)kernel_scale; + const void* devBscalePtr = (const void*)input_scale; + const void* devDscalePtr = (const void*)output_scale; + const size_t wsSizeBytes = CUBLAS_WORKSPACE_SIZE; + + const auto aType = CUDA_R_8F_E4M3; + const auto bType = CUDA_R_8F_E4M3; + const auto dType = CUDA_R_16BF; + const auto computeType = CUBLAS_COMPUTE_32F; + const auto scaleType = CUDA_R_32F; + // const auto epilogueAuxType = CUDA_R_16BF; + + const cublasOperation_t tA = CUBLAS_OP_T; + const cublasOperation_t tB = CUBLAS_OP_N; + + //------- init, desc & tensors + cublasLtMatmulDesc_t matmulDesc; + cublasLtMatrixLayout_t Adesc; + cublasLtMatrixLayout_t Bdesc; + cublasLtMatrixLayout_t Ddesc; + + { + check_cuda_error(cublasLtMatmulDescCreate(&matmulDesc, computeType, scaleType)); + check_cuda_error(cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_TRANSA, &tA, sizeof(tA))); + check_cuda_error(cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_TRANSB, &tB, sizeof(tB))); + + if (version_major_ >= 11 && version_minor_ >= 11 && version_patch_ > 0) { + const int8_t fastAccuMode = 1; // enable fast imprecise accum + check_cuda_error(cublasLtMatmulDescSetAttribute( + matmulDesc, CUBLASLT_MATMUL_DESC_FAST_ACCUM, &fastAccuMode, sizeof(decltype(fastAccuMode)))); + } + + // TODO: Check that do we need to set these attributes + // TODO: comment them for compiler first + check_cuda_error(cublasLtMatmulDescSetAttribute( + matmulDesc, CUBLASLT_MATMUL_DESC_A_SCALE_POINTER, &devAscalePtr, sizeof(devAscalePtr))); + check_cuda_error(cublasLtMatmulDescSetAttribute( + matmulDesc, CUBLASLT_MATMUL_DESC_B_SCALE_POINTER, &devBscalePtr, sizeof(devBscalePtr))); + + cublasLtEpilogue_t epi = CUBLASLT_EPILOGUE_BIAS; + if (RELU == true) { + epi = CUBLASLT_EPILOGUE_RELU_BIAS; + } + else if (GELU == true) { + epi = CUBLASLT_EPILOGUE_GELU_BIAS; + } + // cublasLtEpilogue_t epi = CUBLASLT_EPILOGUE_BIAS; + cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_EPILOGUE, &epi, sizeof(cublasLtEpilogue_t)); + cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_BIAS_POINTER, &bias, sizeof(const void*)); + } + + { + const int64_t lda = k; + const int64_t ldb = k; + const int64_t ldd = n; + + // create matrix descriptors, we are good with the details here so no need + // to set any extra attributes + check_cuda_error( + cublasLtMatrixLayoutCreate(&Adesc, aType, tA == CUBLAS_OP_N ? n : k, tA == CUBLAS_OP_N ? k : n, lda)); + if (batchCount > 1) { + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Adesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount))); + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Adesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideA, sizeof(strideA))); + } + + check_cuda_error( + cublasLtMatrixLayoutCreate(&Bdesc, bType, tB == CUBLAS_OP_N ? k : m, tB == CUBLAS_OP_N ? m : k, ldb)); + if (batchCount > 1) { + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Bdesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount))); + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Bdesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideB, sizeof(strideB))); + } + + check_cuda_error(cublasLtMatrixLayoutCreate(&Ddesc, dType, n, m, ldd)); + if (batchCount > 1) { + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Ddesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount))); + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Ddesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideD, sizeof(strideD))); + } + } + + const int requestedAlgoCount = 1; + cublasLtMatmulHeuristicResult_t heuristicResult; + cublasLtMatmulPreference_t preference; + int returnedAlgoCount = -1; + check_cuda_error(cublasLtMatmulPreferenceCreate(&preference)); + check_cuda_error(cublasLtMatmulPreferenceSetAttribute( + preference, CUBLASLT_MATMUL_PREF_MAX_WORKSPACE_BYTES, &wsSizeBytes, sizeof(wsSizeBytes))); + + check_cuda_error(cublasLtMatmulAlgoGetHeuristic(cublaslt_handle_, + matmulDesc, + Adesc, + Bdesc, + Ddesc, + Ddesc, + preference, + requestedAlgoCount, + &heuristicResult, + &returnedAlgoCount)); + + { + cublasStatus_t status = cublasLtMatmul(cublaslt_handle_, + matmulDesc, + alpha, + kernel, + Adesc, + input, + Bdesc, + beta, + res, + Ddesc, + res, + Ddesc, + &heuristicResult.algo, + cublas_workspace_, + wsSizeBytes, + stream); + check_cuda_error(status); + } + + if (Ddesc) { + check_cuda_error(cublasLtMatrixLayoutDestroy(Ddesc)); + } + if (Bdesc) { + check_cuda_error(cublasLtMatrixLayoutDestroy(Bdesc)); + } + if (Adesc) { + check_cuda_error(cublasLtMatrixLayoutDestroy(Adesc)); + } + if (matmulDesc) { + check_cuda_error(cublasLtMatmulDescDestroy(matmulDesc)); + } + + mu_->unlock(); +} + +template +void cublasFP8MMWrapper::Gemm_Bias_Act(__nv_fp8_e4m3* res, + int batchCount, + int m, + int n, + int k, + int64_t strideA, + int64_t strideB, + int64_t strideD, + const float* alpha, + const float* beta, + const __nv_fp8_e4m3* input, + const __nv_fp8_e4m3* kernel, + const float* input_scale, + const float* kernel_scale, + const __nv_bfloat16* bias, + const float* output_scale, + cudaStream_t stream) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + mu_->lock(); + + const void* devAscalePtr = (const void*)kernel_scale; + const void* devBscalePtr = (const void*)input_scale; + const void* devDscalePtr = (const void*)output_scale; + const size_t wsSizeBytes = CUBLAS_WORKSPACE_SIZE; + + const auto aType = CUDA_R_8F_E4M3; + const auto bType = CUDA_R_8F_E4M3; + const auto cType = CUDA_R_16BF; + const auto dType = CUDA_R_8F_E4M3; + const auto computeType = CUBLAS_COMPUTE_32F; + const auto scaleType = CUDA_R_32F; + // const auto epilogueAuxType = CUDA_R_16BF; + + const cublasOperation_t tA = CUBLAS_OP_T; + const cublasOperation_t tB = CUBLAS_OP_N; + + //------- init, desc & tensors + cublasLtMatmulDesc_t matmulDesc; + cublasLtMatrixLayout_t Adesc; + cublasLtMatrixLayout_t Bdesc; + cublasLtMatrixLayout_t Cdesc; + cublasLtMatrixLayout_t Ddesc; + + { + check_cuda_error(cublasLtMatmulDescCreate(&matmulDesc, computeType, scaleType)); + check_cuda_error(cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_TRANSA, &tA, sizeof(tA))); + check_cuda_error(cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_TRANSB, &tB, sizeof(tB))); + + if (version_major_ >= 11 && version_minor_ >= 11 && version_patch_ > 0) { + const int8_t fastAccuMode = 1; // enable fast imprecise accum + check_cuda_error(cublasLtMatmulDescSetAttribute( + matmulDesc, CUBLASLT_MATMUL_DESC_FAST_ACCUM, &fastAccuMode, sizeof(decltype(fastAccuMode)))); + } + + // TODO: Check that do we need to set these attributes + // TODO: comment them for compiler first + check_cuda_error(cublasLtMatmulDescSetAttribute( + matmulDesc, CUBLASLT_MATMUL_DESC_A_SCALE_POINTER, &devAscalePtr, sizeof(devAscalePtr))); + check_cuda_error(cublasLtMatmulDescSetAttribute( + matmulDesc, CUBLASLT_MATMUL_DESC_B_SCALE_POINTER, &devBscalePtr, sizeof(devBscalePtr))); + check_cuda_error(cublasLtMatmulDescSetAttribute( + matmulDesc, CUBLASLT_MATMUL_DESC_D_SCALE_POINTER, &devDscalePtr, sizeof(devDscalePtr))); + + cublasLtEpilogue_t epi = CUBLASLT_EPILOGUE_GELU_BIAS; + // cublasLtEpilogue_t epi = CUBLASLT_EPILOGUE_BIAS; + cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_EPILOGUE, &epi, sizeof(cublasLtEpilogue_t)); + cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_BIAS_POINTER, &bias, sizeof(const void*)); + } + + { + const int64_t lda = k; + const int64_t ldb = k; + const int64_t ldd = n; + + // create matrix descriptors, we are good with the details here so no need + // to set any extra attributes + check_cuda_error( + cublasLtMatrixLayoutCreate(&Adesc, aType, tA == CUBLAS_OP_N ? n : k, tA == CUBLAS_OP_N ? k : n, lda)); + if (batchCount > 1) { + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Adesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount))); + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Adesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideA, sizeof(strideA))); + } + + check_cuda_error( + cublasLtMatrixLayoutCreate(&Bdesc, bType, tB == CUBLAS_OP_N ? k : m, tB == CUBLAS_OP_N ? m : k, ldb)); + if (batchCount > 1) { + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Bdesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount))); + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Bdesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideB, sizeof(strideB))); + } + + check_cuda_error(cublasLtMatrixLayoutCreate(&Cdesc, cType, n, m, ldd)); + // (TODO Hongbinl)Not sure if the implementation makes sense + if (batchCount > 1) { + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Cdesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount))); + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Cdesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideD, sizeof(strideD))); + } + + check_cuda_error(cublasLtMatrixLayoutCreate(&Ddesc, dType, n, m, ldd)); + if (batchCount > 1) { + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Ddesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount))); + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Ddesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideD, sizeof(strideD))); + } + } + + const int requestedAlgoCount = 1; + cublasLtMatmulHeuristicResult_t heuristicResult; + cublasLtMatmulPreference_t preference; + int returnedAlgoCount = -1; + check_cuda_error(cublasLtMatmulPreferenceCreate(&preference)); + check_cuda_error(cublasLtMatmulPreferenceSetAttribute( + preference, CUBLASLT_MATMUL_PREF_MAX_WORKSPACE_BYTES, &wsSizeBytes, sizeof(wsSizeBytes))); + + check_cuda_error(cublasLtMatmulAlgoGetHeuristic(cublaslt_handle_, + matmulDesc, + Adesc, + Bdesc, + Cdesc, + Ddesc, + preference, + requestedAlgoCount, + &heuristicResult, + &returnedAlgoCount)); + + { + cublasStatus_t status = cublasLtMatmul(cublaslt_handle_, + matmulDesc, + alpha, + kernel, + Adesc, + input, + Bdesc, + beta, + res, + Cdesc, + res, + Ddesc, + &heuristicResult.algo, + cublas_workspace_, + wsSizeBytes, + stream); + check_cuda_error(status); + } + + if (Ddesc) { + check_cuda_error(cublasLtMatrixLayoutDestroy(Ddesc)); + } + if (Bdesc) { + check_cuda_error(cublasLtMatrixLayoutDestroy(Bdesc)); + } + if (Adesc) { + check_cuda_error(cublasLtMatrixLayoutDestroy(Adesc)); + } + if (matmulDesc) { + check_cuda_error(cublasLtMatmulDescDestroy(matmulDesc)); + } + + mu_->unlock(); +} + +template void cublasFP8MMWrapper::Gemm_Bias_Act(__nv_bfloat16* res, + int batchCount, + int m, + int n, + int k, + int64_t strideA, + int64_t strideB, + int64_t strideD, + const float* alpha, + const float* beta, + const __nv_fp8_e4m3* input, + const __nv_fp8_e4m3* kernel, + const float* input_scale, + const float* kernel_scale, + const __nv_bfloat16* bias, + const float* output_scale, + cudaStream_t stream); +template void cublasFP8MMWrapper::Gemm_Bias_Act(__nv_fp8_e4m3* res, + int batchCount, + int m, + int n, + int k, + int64_t strideA, + int64_t strideB, + int64_t strideD, + const float* alpha, + const float* beta, + const __nv_fp8_e4m3* input, + const __nv_fp8_e4m3* kernel, + const float* input_scale, + const float* kernel_scale, + const __nv_bfloat16* bias, + const float* output_scale, + cudaStream_t stream); +template void cublasFP8MMWrapper::Gemm_Bias_Act(__nv_bfloat16* res, + int batchCount, + int m, + int n, + int k, + int64_t strideA, + int64_t strideB, + int64_t strideD, + const float* alpha, + const float* beta, + const __nv_fp8_e4m3* input, + const __nv_fp8_e4m3* kernel, + const float* input_scale, + const float* kernel_scale, + const __nv_bfloat16* bias, + const float* output_scale, + cudaStream_t stream); +template void cublasFP8MMWrapper::Gemm_Bias_Act(__nv_fp8_e4m3* res, + int batchCount, + int m, + int n, + int k, + int64_t strideA, + int64_t strideB, + int64_t strideD, + const float* alpha, + const float* beta, + const __nv_fp8_e4m3* input, + const __nv_fp8_e4m3* kernel, + const float* input_scale, + const float* kernel_scale, + const __nv_bfloat16* bias, + const float* output_scale, + cudaStream_t stream); + +} // namespace fastertransformer diff --git a/src/fastertransformer/utils/cublasFP8MMWrapper.h b/src/fastertransformer/utils/cublasFP8MMWrapper.h new file mode 100644 index 000000000..13b4db798 --- /dev/null +++ b/src/fastertransformer/utils/cublasFP8MMWrapper.h @@ -0,0 +1,177 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "3rdparty/fp8_qgmma_1x1/fp8_qgmma_1x1_utils.h" +#include "cuda_utils.h" +#include "src/fastertransformer/utils/cublasAlgoMap.h" +#include "src/fastertransformer/utils/cublasMMWrapper.h" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" +#include +#include +#include +#include +#include +#include + +#pragma once + +namespace fastertransformer { + +class cublasFP8MMWrapper: public cublasMMWrapper { +public: + cublasFP8MMWrapper(cublasLtHandle_t cublaslt_handle_, + cudaStream_t stream, + cublasAlgoMap* map, + std::mutex* mu, + IAllocator* allocator); + + cublasFP8MMWrapper(cublasHandle_t cublas_handle, + cublasLtHandle_t cublaslt_handle, + cudaStream_t stream, + cublasAlgoMap* map, + std::mutex* mu, + IAllocator* allocator); + + virtual ~cublasFP8MMWrapper(); + + cublasFP8MMWrapper(const cublasFP8MMWrapper& wrapper); + + virtual void cublasVersionCheck() override; + + void Gemm(__nv_bfloat16* res, + int batchCount, + int m, + int n, + int k, + int64_t stridea, + int64_t strideb, + int64_t stridec, + const float* alpha, + const float* beta, + const __nv_fp8_e4m3* input, + const __nv_fp8_e4m3* kernel, + const float* input_scale, + const float* kernel_scale); + + void Gemm(__nv_bfloat16* res, + int batchCount, + int m, + int n, + int k, + int64_t stridea, + int64_t strideb, + int64_t stridec, + const float* alpha, + const float* beta, + const __nv_fp8_e4m3* input, + const __nv_fp8_e4m3* kernel, + const float* input_scale, + const float* kernel_scale, + cudaStream_t stream, + bool fastAccum = true); + + void Gemm(__nv_fp8_e4m3* res, + int batchCount, + int m, + int n, + int k, + int64_t stridea, + int64_t strideb, + int64_t stridec, + const float* alpha, + const float* beta, + const __nv_fp8_e4m3* input, + const __nv_fp8_e4m3* kernel, + const float* input_scale, + const float* kernel_scale, + const float* output_scale); + + void Gemm(__nv_fp8_e4m3* res, + int batchCount, + int m, + int n, + int k, + int64_t stridea, + int64_t strideb, + int64_t stridec, + const float* alpha, + const float* beta, + const __nv_fp8_e4m3* input, + const __nv_fp8_e4m3* kernel, + const float* input_scale, + const float* kernel_scale, + const float* output_scale, + cudaStream_t stream, + bool fastAccum = true); + + template + void Conv1x1Gemm(__nv_fp8_e4m3* res, + int m, + int n, + int k, + const __nv_fp8_e4m3* input, + const __nv_fp8_e4m3* kernel, + const __nv_bfloat16* bias, + const float input_scale, + const float kernel_scale, + const float output_scale, + cudaStream_t stream); + + template + void Gemm_Bias_Act(__nv_bfloat16* res, + int batchCount, + int m, + int n, + int k, + int64_t stridea, + int64_t strideb, + int64_t stridec, + const float* alpha, + const float* beta, + const __nv_fp8_e4m3* input, + const __nv_fp8_e4m3* kernel, + const float* input_scale, + const float* kernel_scale, + const __nv_bfloat16* bias, + const float* output_scale, + cudaStream_t stream); + + template + void Gemm_Bias_Act(__nv_fp8_e4m3* res, + int batchCount, + int m, + int n, + int k, + int64_t stridea, + int64_t strideb, + int64_t stridec, + const float* alpha, + const float* beta, + const __nv_fp8_e4m3* input, + const __nv_fp8_e4m3* kernel, + const float* input_scale, + const float* kernel_scale, + const __nv_bfloat16* bias, + const float* output_scale, + cudaStream_t stream); + +private: + int version_major_, version_minor_, version_patch_; + fastertransformer::qgmma1x1Launcher qgmmaLauncher; + void* cublas_workspace_qgemm_ = nullptr; +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/utils/cublasINT8MMWrapper.cc b/src/fastertransformer/utils/cublasINT8MMWrapper.cc index 43b5f5193..795908182 100644 --- a/src/fastertransformer/utils/cublasINT8MMWrapper.cc +++ b/src/fastertransformer/utils/cublasINT8MMWrapper.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/cublasINT8MMWrapper.h b/src/fastertransformer/utils/cublasINT8MMWrapper.h index 2e16199f6..0cc74290b 100644 --- a/src/fastertransformer/utils/cublasINT8MMWrapper.h +++ b/src/fastertransformer/utils/cublasINT8MMWrapper.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/cublasMMWrapper.cc b/src/fastertransformer/utils/cublasMMWrapper.cc index c4658a20c..f361649c8 100644 --- a/src/fastertransformer/utils/cublasMMWrapper.cc +++ b/src/fastertransformer/utils/cublasMMWrapper.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -15,6 +15,7 @@ */ #include "cublasMMWrapper.h" +#include "cuda_utils.h" #ifndef CUDART_VERSION #error CUDART_VERSION Undefined! @@ -69,6 +70,7 @@ cublasMMWrapper::~cublasMMWrapper() mu_ = nullptr; if (allocator_ != nullptr) { allocator_->free((void**)(&cublas_workspace_)); + allocator_ = nullptr; } } @@ -83,6 +85,10 @@ cublasMMWrapper::cublasMMWrapper(const cublasMMWrapper& wrapper): mu_(wrapper.mu_), allocator_(wrapper.allocator_) { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + if (allocator_ != nullptr) { + cublas_workspace_ = allocator_->reMalloc(cublas_workspace_, CUBLAS_WORKSPACE_SIZE); + } } void cublasMMWrapper::Gemm(cublasOperation_t transa, @@ -104,6 +110,7 @@ void cublasMMWrapper::Gemm(cublasOperation_t transa, cudaDataType_t computeType, cublasGemmAlgo_t algo) { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); mu_->lock(); check_cuda_error(cublasGemmEx(cublas_handle_, transa, @@ -140,6 +147,7 @@ void cublasMMWrapper::Gemm(cublasOperation_t transa, void* C, const int ldc) { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); Gemm(transa, transb, m, n, k, A, lda, B, ldb, C, ldc, 1.0f, 0.0f); } @@ -157,6 +165,7 @@ void cublasMMWrapper::Gemm(cublasOperation_t transa, float f_alpha, float f_beta) { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); half h_alpha = (half)(f_alpha); half h_beta = (half)(f_beta); @@ -241,12 +250,31 @@ void cublasMMWrapper::Gemm(cublasOperation_t transa, &algo, CUBLASLT_ALGO_CONFIG_SPLITK_NUM, &(info.splitK_val), sizeof(info.splitK_val)); cublasLtMatmulAlgoConfigSetAttribute( &algo, CUBLASLT_ALGO_CONFIG_CTA_SWIZZLING, &(info.swizzle), sizeof(info.swizzle)); - cublasLtMatmulAlgoConfigSetAttribute( - &algo, CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, &(info.reductionScheme), sizeof(int)); + cublasLtMatmulAlgoConfigSetAttribute(&algo, + CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, + &(info.reductionScheme), + sizeof(info.reductionScheme)); + #if (CUDART_VERSION >= 11000) cublasLtMatmulAlgoConfigSetAttribute( &algo, CUBLASLT_ALGO_CONFIG_STAGES_ID, &(info.stages), sizeof(info.stages)); #endif + +#if (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH >= 3) + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_INNER_SHAPE_ID, &(info.inner_shapeId), sizeof(info.inner_shapeId)); + cublasLtMatmulAlgoConfigSetAttribute(&algo, + CUBLASLT_ALGO_CONFIG_CLUSTER_SHAPE_ID, + &(info.cluster_shapeId), + sizeof(info.cluster_shapeId)); +#elif (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH < 3) + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_MMA_SHAPE_ID, &(info.mma_shapeId), sizeof(info.mma_shapeId)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_CGA_SHAPE_ID, &(info.cga_shapeId), sizeof(info.cga_shapeId)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_SCHEDULING_MODE, &(info.sche_mode), sizeof(info.sche_mode)); +#endif } } @@ -368,6 +396,7 @@ void cublasMMWrapper::Gemm(cublasOperation_t transa, void* C, const int ldc) { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); cudaDataType_t Atype, Btype, Ctype; cublasComputeType_t computeType; cudaDataType_t scaleType; diff --git a/src/fastertransformer/utils/cublasMMWrapper.h b/src/fastertransformer/utils/cublasMMWrapper.h index 70288f229..0c7ecbffa 100644 --- a/src/fastertransformer/utils/cublasMMWrapper.h +++ b/src/fastertransformer/utils/cublasMMWrapper.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -28,7 +28,7 @@ namespace fastertransformer { class cublasMMWrapper { -private: +protected: cublasHandle_t cublas_handle_; cublasLtHandle_t cublaslt_handle_; #ifdef SPARSITY_ENABLED @@ -87,6 +87,10 @@ class cublasMMWrapper { cublasMMWrapper(const cublasMMWrapper& wrapper); + virtual void cublasVersionCheck() + { + return; + }; cublasStatus_t cublasLtMatmulWrapper(cublasLtHandle_t lightHandle, cublasLtMatmulDesc_t computeDesc, const void* alpha, diff --git a/src/fastertransformer/utils/cuda_bf16_fallbacks.cuh b/src/fastertransformer/utils/cuda_bf16_fallbacks.cuh index abc1c38f1..22c7deeb8 100644 --- a/src/fastertransformer/utils/cuda_bf16_fallbacks.cuh +++ b/src/fastertransformer/utils/cuda_bf16_fallbacks.cuh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/cuda_bf16_wrapper.h b/src/fastertransformer/utils/cuda_bf16_wrapper.h index 33456b26c..ac6863beb 100644 --- a/src/fastertransformer/utils/cuda_bf16_wrapper.h +++ b/src/fastertransformer/utils/cuda_bf16_wrapper.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/cuda_fp8_utils.cu b/src/fastertransformer/utils/cuda_fp8_utils.cu new file mode 100644 index 000000000..f5e1d2465 --- /dev/null +++ b/src/fastertransformer/utils/cuda_fp8_utils.cu @@ -0,0 +1,124 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "cuda_fp8_utils.h" + +namespace fastertransformer { +#ifdef ENABLE_FP8 + +template +__global__ void quantizeMatrix(T_OUT* output, float const* input_scale, T_IN const* input, uint32_t size, uint32_t n) +{ + for (uint32_t i = threadIdx.x + blockIdx.x * blockDim.x; i < size; i += blockDim.x * gridDim.x) { + if (quantize_mode == QUANTIZE_MODE::PER_CHANNEL) { + output[i] = T_OUT((float)(input[i]) * __ldg(input_scale + (i % n))); + } + else { + output[i] = T_OUT((float)(input[i]) * __ldg(input_scale)); + } + } +} + +template +void invokeQuantizeMatrix( + T_OUT* output, float const* input_scale, T_IN const* input, uint32_t size, uint32_t n, cudaStream_t stream) +{ + dim3 grid(32); + dim3 block(256); + quantizeMatrix<<>>(output, input_scale, input, size, n); +} + +#define defineinvokeQuantizeMatrix(type_out, type_in, mode) \ + template void invokeQuantizeMatrix(type_out * output, \ + float const* input_scale, \ + type_in const* input, \ + uint32_t size, \ + uint32_t n, \ + cudaStream_t stream); + +defineinvokeQuantizeMatrix(__nv_fp8_e4m3, float, QUANTIZE_MODE::PER_CHANNEL); +defineinvokeQuantizeMatrix(__nv_fp8_e4m3, float, QUANTIZE_MODE::PER_TENSOR); +defineinvokeQuantizeMatrix(__nv_fp8_e4m3, half, QUANTIZE_MODE::PER_CHANNEL); +defineinvokeQuantizeMatrix(__nv_fp8_e4m3, half, QUANTIZE_MODE::PER_TENSOR); +defineinvokeQuantizeMatrix(half, __nv_fp8_e4m3, QUANTIZE_MODE::PER_CHANNEL); +defineinvokeQuantizeMatrix(half, __nv_fp8_e4m3, QUANTIZE_MODE::PER_TENSOR); +defineinvokeQuantizeMatrix(float, __nv_fp8_e4m3, QUANTIZE_MODE::PER_CHANNEL); +defineinvokeQuantizeMatrix(float, __nv_fp8_e4m3, QUANTIZE_MODE::PER_TENSOR); +#ifdef ENABLE_BF16 +defineinvokeQuantizeMatrix(__nv_fp8_e4m3, __nv_bfloat16, QUANTIZE_MODE::PER_CHANNEL); +defineinvokeQuantizeMatrix(__nv_fp8_e4m3, __nv_bfloat16, QUANTIZE_MODE::PER_TENSOR); +defineinvokeQuantizeMatrix(__nv_bfloat16, __nv_fp8_e4m3, QUANTIZE_MODE::PER_CHANNEL); +defineinvokeQuantizeMatrix(__nv_bfloat16, __nv_fp8_e4m3, QUANTIZE_MODE::PER_TENSOR); +#endif + +template +__global__ void fakeQuantize(T_OUT* dst, const T_IN* src, const int size) +{ + for (int tid = threadIdx.x + blockIdx.x * blockDim.x; tid < size; tid += blockDim.x * gridDim.x) { + T_FAKE tmp = (T_FAKE)((float)src[tid]); + dst[tid] = (T_OUT)((float)tmp); + } +} + +template +void invokeFakeQuantize(T_OUT* dst, const T_IN* src, const int size, cudaStream_t stream) +{ + fakeQuantize<<<256, 256, 0, stream>>>(dst, src, size); +} + +template void +invokeFakeQuantize(float* dst, const float* src, const int size, cudaStream_t stream); +template void +invokeFakeQuantize(half* dst, const half* src, const int size, cudaStream_t stream); +template void invokeFakeQuantize<__nv_bfloat16, __nv_bfloat16, __nv_fp8_e4m3>(__nv_bfloat16* dst, + const __nv_bfloat16* src, + const int size, + cudaStream_t stream); + +template +__global__ void computeFP8QuantizeScale(float* quant_ptr, const T_W* weights, const int k, const int n) +{ + float max = -10000.f; + for (int i = 0; i < k; i++) { + float val = fabs((float)weights[i * n + blockIdx.x * blockDim.x + threadIdx.x]); + max = max > val ? max : val; + if (threadIdx.x == 0 && blockIdx.x == 0 && i % 100 == 0) { + printf("max: %f, val: %f \n", max, val); + } + } + // quant_ptr[blockIdx.x * blockDim.x + threadIdx.x] = 1.0f; + // quant_ptr[blockIdx.x * blockDim.x + threadIdx.x] = FP8_E4M3_MAX / max; + quant_ptr[blockIdx.x * blockDim.x + threadIdx.x] = std::max(max / FP8_E4M3_MAX, 1.0f / 32.f); +} + +template +void invokeComputeFP8QuantizeScale(float* quant_ptr, const T_W* weights, const int k, const int n, cudaStream_t stream) +{ + dim3 block(256); + dim3 grid; + grid.x = (n + 255) / 256; + computeFP8QuantizeScale<<>>(quant_ptr, weights, k, n); +} + +#ifdef ENABLE_BF16 +template void invokeComputeFP8QuantizeScale( + float* quant_ptr, const __nv_bfloat16* weights, const int k, const int n, cudaStream_t stream); +#endif +template void +invokeComputeFP8QuantizeScale(float* quant_ptr, const float* weights, const int k, const int n, cudaStream_t stream); + +#endif // ENABLE_FP8 +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/utils/cuda_fp8_utils.h b/src/fastertransformer/utils/cuda_fp8_utils.h new file mode 100644 index 000000000..27e62feff --- /dev/null +++ b/src/fastertransformer/utils/cuda_fp8_utils.h @@ -0,0 +1,192 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#ifdef ENABLE_FP8 +#include +#include +#include + +// #define FP8_MHA +#define FUSE_GEMM_ACT +#define FP8_GEMM_OUTPUT_QUANT_DISABLE + +#ifdef FUSE_GEMM_ACT +#define USE_QGMMA +#endif + +namespace fastertransformer { + +const float FP8_E4M3_MAX = 480.0f; + +enum QUANTIZE_MODE { + PER_CHANNEL, + PER_TENSOR, + PER_CHANNEL_WEIGHT_PER_TENSOR_ACT +}; + +// Packed Data Type +typedef struct __CUDA_ALIGN__(32) { + float array[8]; +} float8; + +typedef struct __CUDA_ALIGN__(16) { + half array[8]; +} half8; + +#ifdef ENABLE_BF16 +typedef struct __CUDA_ALIGN__(4) { + __nv_bfloat16 array[2]; +} __nv_bfloat16_2; + +typedef struct __CUDA_ALIGN__(8) { + __nv_bfloat162 x, y; +} __nv_bfloat162_2_xy; + +typedef struct __CUDA_ALIGN__(8) { + __nv_bfloat16 array[4]; +} __nv_bfloat164; + +typedef struct __CUDA_ALIGN__(8) { + __nv_bfloat162 array[2]; +} __nv_bfloat162_2; + +typedef struct __CUDA_ALIGN__(16) { + __nv_bfloat16 array[8]; +} __nv_bfloat168; + +typedef struct __CUDA_ALIGN__(16) { + __nv_bfloat162 array[4]; +} __nv_bfloat162_4; + +typedef struct __CUDA_ALIGN__(32) { + __nv_bfloat16 array[16]; +} __nv_bfloat1616; +#endif + +#ifdef ENABLE_FP8 +typedef struct __CUDA_ALIGN__(2) { + __nv_fp8_e4m3 array[2]; +} __nv_fp8_2_e4m3; + +typedef struct __CUDA_ALIGN__(4) { + __nv_fp8_e4m3 array[4]; +} __nv_fp8_4_e4m3; + +typedef struct __CUDA_ALIGN__(4) { + __nv_fp8x2_e4m3 array[2]; +} __nv_fp8x2_x2_e4m3; + +typedef struct __CUDA_ALIGN__(8) { + __nv_fp8_e4m3 array[8]; +} __nv_fp8_8_e4m3; + +typedef struct __CUDA_ALIGN__(8) { + __nv_fp8x2_e4m3 array[4]; +} __nv_fp8x2_x4_e4m3; + +typedef struct __CUDA_ALIGN__(16) { + __nv_fp8_e4m3 array[16]; +} __nv_fp8x16_e4m3; +#endif + +// only BF16 and FP8 +template +struct PackType { + using type = float; +}; + +#ifdef ENABLE_BF16 +template<> +struct PackType<__nv_bfloat16, 2> { + using type = __nv_bfloat16_2; +}; + +template<> +struct PackType<__nv_bfloat16, 4> { + using type = __nv_bfloat164; +}; + +template<> +struct PackType<__nv_bfloat16, 8> { + using type = __nv_bfloat168; +}; +#endif + +#ifdef ENABLE_FP8 +template<> +struct PackType<__nv_fp8_e4m3, 2> { + using type = __nv_fp8_2_e4m3; +}; + +template<> +struct PackType<__nv_fp8_e4m3, 4> { + using type = __nv_fp8_4_e4m3; +}; + +template<> +struct PackType<__nv_fp8_e4m3, 8> { + using type = __nv_fp8_8_e4m3; +}; +#endif + +__inline__ __device__ void fp8x4_e4m3_to_bfloat2(__nv_bfloat162* out1, __nv_bfloat162* out2, const __nv_fp8x4_e4m3* in) +{ + const char4 tmp_val = reinterpret_cast(in)[0]; + *out1 = __nv_bfloat162((float)reinterpret_cast(&tmp_val.x)[0], + (float)reinterpret_cast(&tmp_val.y)[0]); + *out2 = __nv_bfloat162((float)reinterpret_cast(&tmp_val.z)[0], + (float)reinterpret_cast(&tmp_val.w)[0]); +} + +__inline__ __device__ __nv_bfloat162 fp8x2_e4m3_to_bfloat2(const __nv_fp8x2_e4m3* in) +{ + const char2 tmp_val = reinterpret_cast(in)[0]; + __nv_bfloat162 out = __nv_bfloat162((float)reinterpret_cast(&tmp_val.x)[0], + (float)reinterpret_cast(&tmp_val.y)[0]); + return out; +} + +__inline__ __device__ void fp8x4_e4m3_to_half2(half2* out1, half2* out2, const __nv_fp8x4_e4m3* in) +{ + const char4 tmp_val = reinterpret_cast(in)[0]; + *out1 = half2((float)reinterpret_cast(&tmp_val.x)[0], + (float)reinterpret_cast(&tmp_val.y)[0]); + *out2 = half2((float)reinterpret_cast(&tmp_val.z)[0], + (float)reinterpret_cast(&tmp_val.w)[0]); +} + +__inline__ __device__ half2 fp8x2_e4m3_to_half2(const __nv_fp8x2_e4m3* in) +{ + const char2 tmp_val = reinterpret_cast(in)[0]; + half2 out = half2((float)reinterpret_cast(&tmp_val.x)[0], + (float)reinterpret_cast(&tmp_val.y)[0]); + return out; +} + +template +void invokeQuantizeMatrix( + T_OUT* output, float const* input_qua_amax_ptr, T_IN const* input, uint32_t size, uint32_t n, cudaStream_t stream); + +template +void invokeFakeQuantize(T_OUT* dst, const T_IN* src, const int size, cudaStream_t stream); + +template +void invokeComputeFP8QuantizeScale(float* quant_ptr, const T_W* weights, const int k, const int n, cudaStream_t stream); + +} // namespace fastertransformer +#endif // ENABLE_FP8 diff --git a/src/fastertransformer/utils/cuda_type_utils.cuh b/src/fastertransformer/utils/cuda_type_utils.cuh index 6375d2fbb..9d6cafdd1 100644 --- a/src/fastertransformer/utils/cuda_type_utils.cuh +++ b/src/fastertransformer/utils/cuda_type_utils.cuh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -20,6 +20,7 @@ #include #include "src/fastertransformer/utils/cuda_bf16_wrapper.h" #include "src/fastertransformer/utils/cuda_bf16_fallbacks.cuh" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" namespace fastertransformer { @@ -309,6 +310,62 @@ template<> __device__ inline __nv_bfloat162 cuda_cast<__nv_bfloat162, int16_t>(i return res; } -#endif // ENABLE_BF16 +template<> __device__ inline __nv_bfloat162 cuda_cast<__nv_bfloat162, half2>(half2 val) { return float22bf162(__half22float2(val)); } + +#endif // ENABLE BF16 + +template __device__ inline T cuda_abs(T val); +template<> __device__ inline float cuda_abs(float val) { return fabs(val); } +template<> __device__ inline half cuda_abs(half val) { return __habs(val); } +template<> __device__ inline half2 cuda_abs(half2 val) { return __habs2(val); } + +#ifdef ENABLE_BF16 + +#if __CUDA_ARCH__ >= 800 || !defined(__CUDA_ARCH__) +template<> __device__ inline __nv_bfloat16 cuda_abs(__nv_bfloat16 val) { return __habs(val); } +template<> __device__ inline __nv_bfloat162 cuda_abs(__nv_bfloat162 val) { return __habs2(val); } +#else +template<> __device__ inline __nv_bfloat16 cuda_abs(__nv_bfloat16 val) { return fabs(val); } +template<> __device__ inline __nv_bfloat162 cuda_abs(__nv_bfloat162 val) { return make_bfloat162(fabs(val.x), fabs(val.y)); } +#endif + +#endif // ENABLE_FP16 + +// Unary maximum: compute the max of a vector type +template __device__ inline To cuda_max(Ti val) +{ + return cuda_cast(val); +}; + +template<> __device__ inline half cuda_max(half2 val) { return (val.x > val.y) ? val.x : val.y; } +#ifdef ENABLE_BF16 +template<> __device__ inline __nv_bfloat16 cuda_max(__nv_bfloat162 val) { return (val.x > val.y) ? val.x : val.y; } +#endif + +// Binary maximum: compute the max of two scalar types +template __device__ inline T cuda_max(T val1, T val2) { return (val1 > val2) ? val1 : val2; } + +#ifdef ENABLE_FP8 +template<> __device__ inline float2 cuda_cast(__nv_fp8x2_e4m3 val) { return bf1622float2(fp8x2_e4m3_to_bfloat2(&val)); } +template<> __device__ inline __nv_fp8x2_e4m3 cuda_cast<__nv_fp8x2_e4m3, float2>(float2 val) { return __nv_fp8x2_e4m3(bf1622float2(float22bf162(val))); } + +template<> __device__ inline __nv_fp8_e4m3 cuda_cast<__nv_fp8_e4m3, half>(half val) { return __nv_fp8_e4m3(val); } +template<> __device__ inline __nv_fp8_e4m3 cuda_cast<__nv_fp8_e4m3, __nv_bfloat16>(__nv_bfloat16 val) { return __nv_fp8_e4m3(val); } +template<> __device__ inline __nv_fp8_e4m3 cuda_cast<__nv_fp8_e4m3, float>(float val) { return __nv_fp8_e4m3(val); } +template<> __device__ inline float cuda_cast(__nv_fp8_e4m3 val) { return (float)val; } +template<> __device__ inline __nv_bfloat162 cuda_cast<__nv_bfloat162, __nv_fp8x2_e4m3>(__nv_fp8x2_e4m3 val) { return fp8x2_e4m3_to_bfloat2(&val); } + +template<> __device__ inline int8_t cuda_cast(__nv_fp8_e4m3 val) +{ + // no impl + return 0; +} + +template<> __device__ inline __nv_fp8_e4m3 cuda_cast<__nv_fp8_e4m3, int8_t>(int8_t val) +{ + return cuda_cast<__nv_fp8_e4m3>(cuda_cast<__nv_bfloat16>(cuda_cast(val))); +} + +#endif // ENABLE_FP8 } diff --git a/src/fastertransformer/utils/cuda_utils.cc b/src/fastertransformer/utils/cuda_utils.cc index e4b956060..765cc73bb 100644 --- a/src/fastertransformer/utils/cuda_utils.cc +++ b/src/fastertransformer/utils/cuda_utils.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -15,6 +15,7 @@ */ #include "src/fastertransformer/utils/cuda_utils.h" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" namespace fastertransformer { @@ -31,13 +32,7 @@ void print_to_file(const T* result, const int size, const char* file, cudaStream T* tmp = new T[size]; check_cuda_error(cudaMemcpyAsync(tmp, result, sizeof(T) * size, cudaMemcpyDeviceToHost, stream)); for (int i = 0; i < size; ++i) { - float val; - if (sizeof(T) == 2) { - val = (T)__half2float(tmp[i]); - } - else { - val = (T)tmp[i]; - } + float val = (float)(tmp[i]); outFile << val << std::endl; } delete[] tmp; @@ -54,16 +49,15 @@ print_to_file(const float* result, const int size, const char* file, cudaStream_ template void print_to_file(const half* result, const int size, const char* file, cudaStream_t stream, std::ios::openmode open_mode); #ifdef ENABLE_BF16 -// template void print_to_file( -// const __nv_bfloat16* result, const int size, const char* file, cudaStream_t stream, std::ios::openmode -// open_mode); +template void print_to_file( + const __nv_bfloat16* result, const int size, const char* file, cudaStream_t stream, std::ios::openmode open_mode); #endif template void print_abs_mean(const T* buf, uint size, cudaStream_t stream, std::string name) { if (buf == nullptr) { - printf("[WARNING] It is an nullptr, skip!"); + FT_LOG_WARNING("It is an nullptr, skip!"); return; } cudaDeviceSynchronize(); @@ -107,12 +101,16 @@ template void print_abs_mean(const __nv_bfloat16* buf, uint size, cudaStream_t s #endif template void print_abs_mean(const int* buf, uint size, cudaStream_t stream, std::string name); template void print_abs_mean(const uint* buf, uint size, cudaStream_t stream, std::string name); +template void print_abs_mean(const int8_t* buf, uint size, cudaStream_t stream, std::string name); +#ifdef ENABLE_FP8 +template void print_abs_mean(const __nv_fp8_e4m3* buf, uint size, cudaStream_t stream, std::string name); +#endif template void print_to_screen(const T* result, const int size) { if (result == nullptr) { - printf("[WARNING] It is an nullptr, skip! \n"); + FT_LOG_WARNING("It is an nullptr, skip! \n"); return; } T* tmp = reinterpret_cast(malloc(sizeof(T) * size)); @@ -131,6 +129,9 @@ template void print_to_screen(const __nv_bfloat16* result, const int size); template void print_to_screen(const int* result, const int size); template void print_to_screen(const uint* result, const int size); template void print_to_screen(const bool* result, const int size); +#ifdef ENABLE_FP8 +template void print_to_screen(const __nv_fp8_e4m3* result, const int size); +#endif template void printMatrix(T* ptr, int m, int k, int stride, bool is_device_ptr) diff --git a/src/fastertransformer/utils/cuda_utils.h b/src/fastertransformer/utils/cuda_utils.h index 6268ad215..a298c4e5c 100644 --- a/src/fastertransformer/utils/cuda_utils.h +++ b/src/fastertransformer/utils/cuda_utils.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -50,20 +50,24 @@ enum CublasDataType { FLOAT_DATATYPE = 0, HALF_DATATYPE = 1, BFLOAT16_DATATYPE = 2, - INT8_DATATYPE = 3 + INT8_DATATYPE = 3, + FP8_DATATYPE = 4 }; enum FtCudaDataType { FP32 = 0, FP16 = 1, BF16 = 2, - INT8 = 3 + INT8 = 3, + FP8 = 4 }; enum class OperationType { FP32, FP16, - BF16 + BF16, + INT8, + FP8 }; /* **************************** debug tools ********************************* */ @@ -133,7 +137,7 @@ inline void syncAndCheck(const char* const file, int const line) throw std::runtime_error(std::string("[FT][ERROR] CUDA runtime error: ") + (_cudaGetErrorEnum(result)) + " " + file + ":" + std::to_string(line) + " \n"); } - FT_LOG_DEBUG("run syncAndCheck"); + FT_LOG_DEBUG(fmtstr("run syncAndCheck at %s:%d", file, line)); } } @@ -190,16 +194,22 @@ void check_abs_mean_val(const T* result, const int size); std::cout << "[FT][CALL] " << __FUNCTION__ << " " << std::endl; \ } while (0) -inline void myAssert(bool result, const char* const file, int const line, std::string info = "") +[[noreturn]] inline void throwRuntimeError(const char* const file, int const line, std::string const& info = "") { - if (result != true) { - throw std::runtime_error(std::string("[FT][ERROR] ") + info + std::string(" Assertion fail: ") + file + ":" - + std::to_string(line) + " \n"); + throw std::runtime_error(std::string("[FT][ERROR] ") + info + " Assertion fail: " + file + ":" + + std::to_string(line) + " \n"); +} + +inline void myAssert(bool result, const char* const file, int const line, std::string const& info = "") +{ + if (!result) { + throwRuntimeError(file, line, info); } } #define FT_CHECK(val) myAssert(val, __FILE__, __LINE__) #define FT_CHECK_WITH_INFO(val, info) myAssert(val, __FILE__, __LINE__, info) +#define FT_THROW(info) throwRuntimeError(__FILE__, __LINE__, info) #ifdef SPARSITY_ENABLED #define CHECK_CUSPARSE(func) \ @@ -272,6 +282,15 @@ inline int getSMVersion() return sm_major * 10 + sm_minor; } +inline int getMaxSharedMemoryPerBlock() +{ + int device{-1}; + check_cuda_error(cudaGetDevice(&device)); + int max_shared_memory_size = 0; + check_cuda_error(cudaDeviceGetAttribute(&max_shared_memory_size, cudaDevAttrMaxSharedMemoryPerBlock, device)); + return max_shared_memory_size; +} + inline std::string getDeviceName() { int device{-1}; @@ -390,16 +409,73 @@ template<> struct packed_as { using type = template<> struct packed_as { using type = float2; }; template<> struct packed_as { using type = int16_t; }; template<> struct packed_as { using type = int2; }; +template<> struct packed_as { using type = half; }; #ifdef ENABLE_BF16 -template<> -struct packed_as<__nv_bfloat16, 2> { - using type = __nv_bfloat162; -}; +template<> struct packed_as<__nv_bfloat16, 2> { using type = __nv_bfloat162; }; +template<> struct packed_as<__nv_bfloat162, 1> { using type = __nv_bfloat16; }; #endif inline __device__ float2 operator*(float2 a, float2 b) { return make_float2(a.x * b.x, a.y * b.y); } inline __device__ float2 operator*(float2 a, float b) { return make_float2(a.x * b, a.y * b); } // clang-format on +template +void compareTwoTensor( + const T1* pred, const T2* ref, const int size, const int print_size = 0, const std::string filename = "") +{ + T1* h_pred = new T1[size]; + T2* h_ref = new T2[size]; + check_cuda_error(cudaMemcpy(h_pred, pred, size * sizeof(T1), cudaMemcpyDeviceToHost)); + check_cuda_error(cudaMemcpy(h_ref, ref, size * sizeof(T2), cudaMemcpyDeviceToHost)); + + FILE* fd = nullptr; + if (filename != "") { + fd = fopen(filename.c_str(), "w"); + fprintf(fd, "| %10s | %10s | %10s | %10s | \n", "pred", "ref", "abs_diff", "rel_diff(%)"); + } + + if (print_size > 0) { + FT_LOG_INFO(" id | pred | ref |abs diff | rel diff (%) |"); + } + float mean_abs_diff = 0.0f; + float mean_rel_diff = 0.0f; + int count = 0; + for (int i = 0; i < size; i++) { + if (i < print_size) { + FT_LOG_INFO("%4d | % 6.4f | % 6.4f | % 6.4f | % 7.4f |", + i, + (float)h_pred[i], + (float)h_ref[i], + abs((float)h_pred[i] - (float)h_ref[i]), + abs((float)h_pred[i] - (float)h_ref[i]) / (abs((float)h_ref[i]) + 1e-6f) * 100.f); + } + if ((float)h_pred[i] == 0) { + continue; + } + count += 1; + mean_abs_diff += abs((float)h_pred[i] - (float)h_ref[i]); + mean_rel_diff += abs((float)h_pred[i] - (float)h_ref[i]) / (abs((float)h_ref[i]) + 1e-6f) * 100.f; + + if (fd != nullptr) { + fprintf(fd, + "| %10.5f | %10.5f | %10.5f | %11.5f |\n", + (float)h_pred[i], + (float)h_ref[i], + abs((float)h_pred[i] - (float)h_ref[i]), + abs((float)h_pred[i] - (float)h_ref[i]) / (abs((float)h_ref[i]) + 1e-6f) * 100.f); + } + } + mean_abs_diff = mean_abs_diff / (float)count; + mean_rel_diff = mean_rel_diff / (float)count; + FT_LOG_INFO("mean_abs_diff: % 6.4f, mean_rel_diff: % 6.4f (%%)", mean_abs_diff, mean_rel_diff); + + if (fd != nullptr) { + fprintf(fd, "mean_abs_diff: % 6.4f, mean_rel_diff: % 6.4f (%%)", mean_abs_diff, mean_rel_diff); + fclose(fd); + } + delete[] h_pred; + delete[] h_ref; +} + /* ************************** end of common utils ************************** */ } // namespace fastertransformer diff --git a/src/fastertransformer/utils/custom_ar_comm.cc b/src/fastertransformer/utils/custom_ar_comm.cc index b4cbb2b1e..34274c6ff 100644 --- a/src/fastertransformer/utils/custom_ar_comm.cc +++ b/src/fastertransformer/utils/custom_ar_comm.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/custom_ar_comm.h b/src/fastertransformer/utils/custom_ar_comm.h index a88d8fc16..773afb606 100644 --- a/src/fastertransformer/utils/custom_ar_comm.h +++ b/src/fastertransformer/utils/custom_ar_comm.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/gemm_test/CMakeLists.txt b/src/fastertransformer/utils/gemm_test/CMakeLists.txt index b23c207d5..e4726c7e6 100644 --- a/src/fastertransformer/utils/gemm_test/CMakeLists.txt +++ b/src/fastertransformer/utils/gemm_test/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -55,19 +55,17 @@ set_property(TARGET gemm_func PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET gemm_func PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) add_library(encoder_gemm_func STATIC ${encoder_gemm_func_files}) -if (SPARSITY_SUPPORT) -target_link_libraries(encoder_gemm_func PUBLIC -lcublas -lcublasLt -lcudart gemm_func -lcusparse -lcusparseLt cuda_utils logger) -else() target_link_libraries(encoder_gemm_func PUBLIC -lcublas -lcublasLt -lcudart gemm_func cuda_utils logger) +if (SPARSITY_SUPPORT) +target_link_libraries(encoder_gemm_func PUBLIC -lcusparse -lcusparseLt) endif() set_property(TARGET encoder_gemm_func PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET encoder_gemm_func PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) add_library(encoder_igemm_func STATIC ${encoder_igemm_func_files}) -if (SPARSITY_SUPPORT) -target_link_libraries(encoder_igemm_func PUBLIC -lcublas -lcublasLt -lcudart -lcusparse -lcusparseLt cuda_utils logger) -else() target_link_libraries(encoder_igemm_func PUBLIC -lcublas -lcublasLt -lcudart cuda_utils logger) +if (SPARSITY_SUPPORT) +target_link_libraries(encoder_igemm_func PUBLIC -lcusparse -lcusparseLt) endif() set_property(TARGET encoder_igemm_func PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET encoder_igemm_func PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) @@ -78,10 +76,9 @@ set_property(TARGET decoding_gemm_func PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET decoding_gemm_func PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) add_library(gpt_gemm_func STATIC ${gpt_gemm_func_files}) +target_link_libraries(gpt_gemm_func PUBLIC -lcublas -lcublasLt -lcudart gemm_func cuda_utils logger) if (SPARSITY_SUPPORT) - target_link_libraries(gpt_gemm_func PUBLIC -lcublas -lcublasLt -lcudart gemm_func -lcusparse -lcusparseLt cuda_utils logger) -else() - target_link_libraries(gpt_gemm_func PUBLIC -lcublas -lcublasLt -lcudart gemm_func cuda_utils logger) + target_link_libraries(gpt_gemm_func PUBLIC -lcusparse -lcusparseLt) endif() set_property(TARGET gpt_gemm_func PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET gpt_gemm_func PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) @@ -92,10 +89,9 @@ set_property(TARGET xlnet_gemm_func PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET xlnet_gemm_func PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) add_library(t5_gemm_func STATIC ${t5_gemm_func_files}) +target_link_libraries(t5_gemm_func PUBLIC -lcublas -lcublasLt -lcudart gemm_func cuda_utils logger) if (SPARSITY_SUPPORT) - target_link_libraries(t5_gemm_func PUBLIC -lcublas -lcublasLt -lcudart gemm_func -lcusparse -lcusparseLt cuda_utils logger) -else() - target_link_libraries(t5_gemm_func PUBLIC -lcublas -lcublasLt -lcudart gemm_func cuda_utils logger) + target_link_libraries(t5_gemm_func PUBLIC -lcusparse -lcusparseLt) endif() set_property(TARGET t5_gemm_func PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET t5_gemm_func PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) diff --git a/src/fastertransformer/utils/gemm_test/decoding_gemm_func.cc b/src/fastertransformer/utils/gemm_test/decoding_gemm_func.cc index 481aea7be..5de53051f 100644 --- a/src/fastertransformer/utils/gemm_test/decoding_gemm_func.cc +++ b/src/fastertransformer/utils/gemm_test/decoding_gemm_func.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -272,7 +272,13 @@ void generate_decoding_gemm_config(int batch_size, } else { fprintf(fd, - "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 %f\n", + "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 " +#if (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH >= 3) + "-1 -1 " +#elif (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH < 3) + "-1 -1 -1 " +#endif + "%f\n", batch_size * beam_width, seq_len, head_num, @@ -289,7 +295,13 @@ void generate_decoding_gemm_config(int batch_size, } else { fprintf(fd, - "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 %f\n", + "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 " +#if (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH >= 3) + "-1 -1 " +#elif (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH < 3) + "-1 -1 -1 " +#endif + "%f\n", batch_size * beam_width, seq_len, head_num, diff --git a/src/fastertransformer/utils/gemm_test/decoding_gemm_func.h b/src/fastertransformer/utils/gemm_test/decoding_gemm_func.h index 0b073c9c0..faa793baa 100644 --- a/src/fastertransformer/utils/gemm_test/decoding_gemm_func.h +++ b/src/fastertransformer/utils/gemm_test/decoding_gemm_func.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/gemm_test/encoder_gemm_func.cc b/src/fastertransformer/utils/gemm_test/encoder_gemm_func.cc index e7c862db6..fe9a00b53 100644 --- a/src/fastertransformer/utils/gemm_test/encoder_gemm_func.cc +++ b/src/fastertransformer/utils/gemm_test/encoder_gemm_func.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -354,7 +354,13 @@ void generate_encoder_gemm_config( } else { fprintf(fd, - "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 %f\n", + "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 " +#if (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH >= 3) + "-1 -1 " +#elif (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH < 3) + "-1 -1 -1 " +#endif + "%f\n", batch_size, seq_len, head_num, @@ -371,7 +377,13 @@ void generate_encoder_gemm_config( } else { fprintf(fd, - "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 %f\n", + "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 " +#if (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH >= 3) + "-1 -1 " +#elif (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH < 3) + "-1 -1 -1 " +#endif + "%f\n", batch_size, seq_len, head_num, diff --git a/src/fastertransformer/utils/gemm_test/encoder_gemm_func.h b/src/fastertransformer/utils/gemm_test/encoder_gemm_func.h index 28cb681ab..11029c6bf 100644 --- a/src/fastertransformer/utils/gemm_test/encoder_gemm_func.h +++ b/src/fastertransformer/utils/gemm_test/encoder_gemm_func.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/gemm_test/encoder_igemm_func.cc b/src/fastertransformer/utils/gemm_test/encoder_igemm_func.cc index 8668be95b..e6077ccc2 100644 --- a/src/fastertransformer/utils/gemm_test/encoder_igemm_func.cc +++ b/src/fastertransformer/utils/gemm_test/encoder_igemm_func.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/gemm_test/encoder_igemm_func.h b/src/fastertransformer/utils/gemm_test/encoder_igemm_func.h index 1e3f5a092..3604d8f90 100644 --- a/src/fastertransformer/utils/gemm_test/encoder_igemm_func.h +++ b/src/fastertransformer/utils/gemm_test/encoder_igemm_func.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -32,11 +32,11 @@ namespace fastertransformer { /* CAUTION : must match cublasLtMatmulTile_t */ -const char* const matmulTileName[] = { - "UNDEF", "8x8", "8x16", "16x8", "8x32", "16x16", "32x8", "8x64", "16x32", - "32x16", "64x8", "32x32", "32x64", "64x32", "32x128", "64x64", "128x32", "64x128", - "128x64", "64x256", "128x128", "256x64", "64x512", "128x256", "256x128", "512x64", -}; +const char* const matmulTileName[] = {"UNDEF", "8x8", "8x16", "16x8", "8x32", "16x16", "32x8", + "8x64", "16x32", "32x16", "64x8", "32x32", "32x64", "64x32", + "32x128", "64x64", "128x32", "64x128", "128x64", "64x256", "128x128", + "256x64", "64x512", "128x256", "256x128", "512x64", "64x96", "96*64", + "96x128", "128x160", "160x128", "192x128", "128x192", "128x96", "END"}; int generate_encoder_igemm_config( int batch_size, int seq_len, int head_num, int size_per_head, void* buffer, bool isAppend = true); diff --git a/src/fastertransformer/utils/gemm_test/gemm_func.cc b/src/fastertransformer/utils/gemm_test/gemm_func.cc index 658125dc2..86779f485 100644 --- a/src/fastertransformer/utils/gemm_test/gemm_func.cc +++ b/src/fastertransformer/utils/gemm_test/gemm_func.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -15,6 +15,8 @@ */ #include "encoder_gemm_func.h" +#include +#include #ifndef CUDART_VERSION #error CUDART_VERSION Undefined! @@ -33,7 +35,8 @@ int printPerfStructure(int batch_size, const customMatmulPerf_t& perf, FILE* fout, CublasDataType data_type, - int hasPrint) + int hasPrint, + int batch_count) { int algoId, tile, swizzle, customOption, numSplitsK, reductionScheme, stages; @@ -53,9 +56,32 @@ int printPerfStructure(int batch_size, #else stages = 0; #endif +#if (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH >= 3) + uint16_t inner_shapeId, cluster_shapeId; + cublasLtMatmulAlgoConfigGetAttribute( + matmulAlgo, CUBLASLT_ALGO_CONFIG_INNER_SHAPE_ID, &inner_shapeId, sizeof(inner_shapeId), NULL); + cublasLtMatmulAlgoConfigGetAttribute( + matmulAlgo, CUBLASLT_ALGO_CONFIG_CLUSTER_SHAPE_ID, &cluster_shapeId, sizeof(cluster_shapeId), NULL); +#elif (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH < 3) + uint16_t mma_shapeId, cga_shapeId, sche_mode; + cublasLtMatmulAlgoConfigGetAttribute( + matmulAlgo, CUBLASLT_ALGO_CONFIG_MMA_SHAPE_ID, &mma_shapeId, sizeof(mma_shapeId), NULL); + cublasLtMatmulAlgoConfigGetAttribute( + matmulAlgo, CUBLASLT_ALGO_CONFIG_CGA_SHAPE_ID, &cga_shapeId, sizeof(cga_shapeId), NULL); + cublasLtMatmulAlgoConfigGetAttribute( + matmulAlgo, CUBLASLT_ALGO_CONFIG_SCHEDULING_MODE, &sche_mode, sizeof(sche_mode), NULL); +#endif printf("algo={ Id=%d, tileIdx=%d (%s) splitK=%d reduc=%d swizzle=%d custom=%d " - "stages=%d} status %d " +#if (CUDART_VERSION >= 11000) + "stages=%d " +#endif +#if (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH >= 3) + "inner_shapeId=%d cluster_shapeId=%d" +#elif (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH < 3) + "mma_shapeId=%d cga_shapeId=%d schedule_mode=%d" +#endif + "} status %d " "time %fms workspace=%d mathMode=%d waves=%f\n", algoId, tile, @@ -64,7 +90,17 @@ int printPerfStructure(int batch_size, reductionScheme, swizzle, customOption, +#if (CUDART_VERSION >= 11000) stages, +#endif +#if (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH >= 3) + inner_shapeId, + cluster_shapeId, +#elif (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH < 3) + mma_shapeId, + cga_shapeId, + sche_mode, +#endif perf.status, perf.time, (int)perf.workspaceSize, @@ -72,13 +108,19 @@ int printPerfStructure(int batch_size, perf.wavesCount); if (hasPrint == 0) { fprintf(fout, - "%d %d %d %d %d ### %d %d %d %d %d %d %d %d %d %d %d %d %f\n", + "%d %d %d %d %d ### %d %d %d %d %d %d %d %d %d %d %d %d " +#if (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH >= 3) + "%d %d " +#elif (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH < 3) + "%d %d %d " +#endif + "%f\n", batch_size, seq_len, head_num, size_per_head, data_type, - 1, + batch_count, m, n, k, @@ -90,6 +132,14 @@ int printPerfStructure(int batch_size, reductionScheme, (int)perf.workspaceSize, stages, +#if (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH >= 3) + inner_shapeId, + cluster_shapeId, +#elif (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH < 3) + mma_shapeId, + cga_shapeId, + sche_mode, +#endif perf.time); return 1; } @@ -198,7 +248,12 @@ int LtHgemmCustomFind(cublasLtHandle_t ltHandle, size_t workSpaceSize, FILE* fout, customMatmulPerf_t perfResults[], - int AlgoCombinations) + int AlgoCombinations, + cudaDataType_t dtype_fp8, + int batchCount, + int64_t strideA, + int64_t strideB, + int64_t strideD) { cublasStatus_t status = CUBLAS_STATUS_SUCCESS; cudaEvent_t startEvent; @@ -206,7 +261,7 @@ int LtHgemmCustomFind(cublasLtHandle_t ltHandle, CublasDataType data_type; cublasLtMatmulDesc_t operationDesc = NULL; - cublasLtMatrixLayout_t Adesc = NULL, Bdesc = NULL, Cdesc = NULL; + cublasLtMatrixLayout_t Adesc = NULL, Bdesc = NULL, Cdesc = NULL, Ddesc = NULL; cudaStream_t stream = 0; // SplitK value that we are going to try when SplitK is supported for a @@ -224,7 +279,7 @@ int LtHgemmCustomFind(cublasLtHandle_t ltHandle, #define ALGO_IDS 100 // Number of algorithms requested. int algoIdA[ALGO_IDS]; // Array containing the algorithm IDs returned by // cublasLtMatmulAlgoGetIds function. - cudaDataType_t Atype, Btype, Ctype, scaleType; + cudaDataType_t Atype, Btype, Ctype, scaleType, Dtype; #if (CUDART_VERSION >= 11000) cublasComputeType_t computeType; #else @@ -233,16 +288,27 @@ int LtHgemmCustomFind(cublasLtHandle_t ltHandle, if (std::is_same::value) { data_type = FLOAT_DATATYPE; - Atype = CUDA_R_32F, Btype = CUDA_R_32F, Ctype = CUDA_R_32F; + Atype = CUDA_R_32F, Btype = CUDA_R_32F, Ctype = CUDA_R_32F, Dtype = CUDA_R_32F; } else if (std::is_same::value) { data_type = HALF_DATATYPE; - Atype = CUDA_R_16F, Btype = CUDA_R_16F, Ctype = CUDA_R_16F; + Atype = CUDA_R_16F, Btype = CUDA_R_16F, Ctype = CUDA_R_16F, Dtype = CUDA_R_16F; } #ifdef ENABLE_BF16 else if (std::is_same::value) { data_type = BFLOAT16_DATATYPE; - Atype = CUDA_R_16BF, Btype = CUDA_R_16BF, Ctype = CUDA_R_16BF; + Atype = CUDA_R_16BF, Btype = CUDA_R_16BF, Ctype = CUDA_R_16BF, Dtype = CUDA_R_16BF; + } +#endif +#ifdef ENABLE_FP8 + else if (std::is_same::value) { + data_type = FP8_DATATYPE; + Atype = CUDA_R_8F_E4M3, Btype = CUDA_R_8F_E4M3, Ctype = CUDA_R_16BF; +#ifdef FP8_GEMM_OUTPUT_QUANT_DISABLE + Dtype = CUDA_R_16BF; +#else + Dtype = dtype_fp8; +#endif } #endif @@ -263,6 +329,8 @@ int LtHgemmCustomFind(cublasLtHandle_t ltHandle, #endif } + const cublasOperation_t tA = data_type == FP8_DATATYPE ? CUBLAS_OP_T : CUBLAS_OP_N; + // Create operation descriptor; see cublasLtMatmulDescAttributes_t for // details about defaults; here we just need to set the transforms for A and // B @@ -276,12 +344,33 @@ int LtHgemmCustomFind(cublasLtHandle_t ltHandle, goto CLEANUP; } + status = cublasLtMatmulDescSetAttribute(operationDesc, CUBLASLT_MATMUL_DESC_TRANSA, &tA, sizeof(tA)); + if (status != CUBLAS_STATUS_SUCCESS) { + goto CLEANUP; + } +#ifdef ENABLE_FP8 + if (data_type == FP8_DATATYPE) { + const int8_t fastAccuMode = 1; // enable fast imprecise accum + status = cublasLtMatmulDescSetAttribute( + operationDesc, CUBLASLT_MATMUL_DESC_FAST_ACCUM, &fastAccuMode, sizeof(decltype(fastAccuMode))); + if (status != CUBLAS_STATUS_SUCCESS) { + goto CLEANUP; + } + } +#endif + // Create matrix descriptors. We are good with the details here so no need // to set any extra attributes - status = cublasLtMatrixLayoutCreate(&Adesc, Atype, m, k, m); + if (data_type == FP8_DATATYPE) { + status = cublasLtMatrixLayoutCreate(&Adesc, Atype, k, m, k); + } + else { + status = cublasLtMatrixLayoutCreate(&Adesc, Atype, m, k, m); + } if (status != CUBLAS_STATUS_SUCCESS) { goto CLEANUP; } + status = cublasLtMatrixLayoutCreate(&Bdesc, Btype, k, n, k); if (status != CUBLAS_STATUS_SUCCESS) { goto CLEANUP; @@ -291,6 +380,30 @@ int LtHgemmCustomFind(cublasLtHandle_t ltHandle, if (status != CUBLAS_STATUS_SUCCESS) { goto CLEANUP; } + status = cublasLtMatrixLayoutCreate(&Ddesc, Dtype, m, n, m); + if (status != CUBLAS_STATUS_SUCCESS) { + goto CLEANUP; + } + + if (batchCount > 1) { + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Adesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount))); + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Bdesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount))); + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Cdesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount))); + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Ddesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount))); + + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Adesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideA, sizeof(strideA))); + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Bdesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideB, sizeof(strideB))); + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Cdesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideD, sizeof(strideD))); + check_cuda_error(cublasLtMatrixLayoutSetAttribute( + Ddesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideD, sizeof(strideD))); + } // Create CUDA event to time the execution time of each algo if (cudaEventCreate(&startEvent, cudaEventBlockingSync) != cudaSuccess) { @@ -302,18 +415,23 @@ int LtHgemmCustomFind(cublasLtHandle_t ltHandle, // Request the 100 first AlgoId available status = cublasLtMatmulAlgoGetIds( - ltHandle, computeType, scaleType, Atype, Btype, Ctype, Ctype, ALGO_IDS, algoIdA, &nbAlgoIds); + ltHandle, computeType, scaleType, Atype, Btype, Ctype, Dtype, ALGO_IDS, algoIdA, &nbAlgoIds); if (status != CUBLAS_STATUS_SUCCESS) { goto CLEANUP; } + if (nbAlgoIds > ALGO_IDS) { + printf( + "Warning: the algo id count is not large enough to guarantee the best algo %d, %d\n", nbAlgoIds, ALGO_IDS); + } // Loop over the Algo IDs + // This loop doesn't work for fp8 gemm for (int idx = 0; (idx < nbAlgoIds) && (AlgoCount < AlgoCombinations); idx++) { cublasLtMatmulAlgo_t algo; size_t sizeWritten = 0; /* Initialize algo structure with given Algp ID */ status = - cublasLtMatmulAlgoInit(ltHandle, computeType, scaleType, Atype, Btype, Ctype, Ctype, algoIdA[idx], &algo); + cublasLtMatmulAlgoInit(ltHandle, computeType, scaleType, Atype, Btype, Ctype, Dtype, algoIdA[idx], &algo); if (status != CUBLAS_STATUS_SUCCESS) { continue; } @@ -456,7 +574,10 @@ int LtHgemmCustomFind(cublasLtHandle_t ltHandle, } // end idx printf("AlgoCount: %d\n", AlgoCount); - if (AlgoCount < maxNumTraversal) { + if (data_type == FP8_DATATYPE) { + assert(AlgoCount == 0); + } + if (AlgoCount < maxNumTraversal && data_type != FP8_DATATYPE) { // 0 <= workspacesize <= 32MB for (int i = 0; i < AlgoCount; i++) { status = customMatmulRun(ltHandle, @@ -499,7 +620,7 @@ int LtHgemmCustomFind(cublasLtHandle_t ltHandle, Adesc, Bdesc, Cdesc, - Cdesc, + Ddesc, pref, maxNumTraversal, heuristicResultsArray, @@ -519,7 +640,7 @@ int LtHgemmCustomFind(cublasLtHandle_t ltHandle, C, Cdesc, C, - Cdesc, + Ddesc, heuristicResultsArray[i].algo, kernelRepeats, workSpace, @@ -549,7 +670,7 @@ int LtHgemmCustomFind(cublasLtHandle_t ltHandle, C, Cdesc, C, - Cdesc, + Ddesc, algosRestrict[i], kernelRepeats, NULL, @@ -570,8 +691,18 @@ int LtHgemmCustomFind(cublasLtHandle_t ltHandle, // Print timing and perf details for (int i = 0, hasPrint = 1; i < AlgoCount; i++) { printf("result %03d : ", i); - hasPrint = printPerfStructure( - batch_size, seq_len, head_num, size_per_head, m, n, k, perfResults[i], fout, data_type, hasPrint); + hasPrint = printPerfStructure(batch_size, + seq_len, + head_num, + size_per_head, + m, + n, + k, + perfResults[i], + fout, + data_type, + hasPrint, + batchCount); } CLEANUP: @@ -614,7 +745,12 @@ template int LtHgemmCustomFind(cublasLtHandle_t ltHandle, size_t workSpaceSize, FILE* fout, customMatmulPerf_t perfResults[], - int AlgoCombinations); + int AlgoCombinations, + cudaDataType_t dtype_fp8, + int batchCount, + int64_t strideA, + int64_t strideB, + int64_t strideD); template int LtHgemmCustomFind(cublasLtHandle_t ltHandle, int batch_size, @@ -633,7 +769,12 @@ template int LtHgemmCustomFind(cublasLtHandle_t ltHandle, size_t workSpaceSize, FILE* fout, customMatmulPerf_t perfResults[], - int AlgoCombinations); + int AlgoCombinations, + cudaDataType_t dtype_fp8, + int batchCount, + int64_t strideA, + int64_t strideB, + int64_t strideD); #ifdef ENABLE_BF16 template int LtHgemmCustomFind(cublasLtHandle_t ltHandle, @@ -653,7 +794,38 @@ template int LtHgemmCustomFind(cublasLtHandle_t ltHandle, size_t workSpaceSize, FILE* fout, customMatmulPerf_t perfResults[], - int AlgoCombinations); + int AlgoCombinations, + cudaDataType_t dtype_fp8, + int batchCount, + int64_t strideA, + int64_t strideB, + int64_t strideD); +#endif + +#ifdef ENABLE_FP8 +template int LtHgemmCustomFind(cublasLtHandle_t ltHandle, + int batch_size, + int seq_len, + int head_num, + int size_per_head, + int m, + int n, + int k, + const float* alpha, /* host pointer */ + const __nv_fp8_e4m3* A, + const __nv_fp8_e4m3* B, + const float* beta, /* host pointer */ + __nv_fp8_e4m3* C, + void* workSpace, + size_t workSpaceSize, + FILE* fout, + customMatmulPerf_t perfResults[], + int AlgoCombinations, + cudaDataType_t dtype_fp8, + int batchCount, + int64_t strideA, + int64_t strideB, + int64_t strideD); #endif template int LtHgemmCustomFind(cublasLtHandle_t ltHandle, @@ -673,7 +845,12 @@ template int LtHgemmCustomFind(cublasLtHandle_t ltHandle, size_t workSpaceSize, FILE* fout, customMatmulPerf_t perfResults[], - int AlgoCombinations); + int AlgoCombinations, + cudaDataType_t dtype_fp8, + int batchCount, + int64_t strideA, + int64_t strideB, + int64_t strideD); size_t calGemmTestBufSizeInByte(int batch_size, int seq_len, diff --git a/src/fastertransformer/utils/gemm_test/gemm_func.h b/src/fastertransformer/utils/gemm_test/gemm_func.h index eaacba87c..8ab420698 100644 --- a/src/fastertransformer/utils/gemm_test/gemm_func.h +++ b/src/fastertransformer/utils/gemm_test/gemm_func.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -22,7 +22,12 @@ #include #include #include +#ifdef ENABLE_BF16 #include +#endif +#ifdef ENABLE_FP8 +#include +#endif #include #include #include @@ -61,7 +66,12 @@ int LtHgemmCustomFind(cublasLtHandle_t ltHandle, size_t workSpaceSize, FILE* fout, customMatmulPerf_t perfResults[], - int AlgoCombinations); + int AlgoCombinations, + cudaDataType_t dtype_fp8 = CUDA_R_32F, + int batchCount = 1, + int64_t strideA = 0, + int64_t strideB = 0, + int64_t strideD = 0); size_t calGemmTestBufSizeInByte(int batch_size, int seq_len, @@ -85,6 +95,7 @@ int printPerfStructure(int batch_size, const customMatmulPerf_t& perf, FILE* fout, CublasDataType data_type, - int hasPrint); + int hasPrint, + int batch_count = 1); } // namespace fastertransformer diff --git a/src/fastertransformer/utils/gemm_test/gpt_gemm_func.cc b/src/fastertransformer/utils/gemm_test/gpt_gemm_func.cc index 01820b7b1..165206710 100644 --- a/src/fastertransformer/utils/gemm_test/gpt_gemm_func.cc +++ b/src/fastertransformer/utils/gemm_test/gpt_gemm_func.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -39,11 +39,14 @@ void generate_gpt_gemm_config(int batch_size, void* cublas_workspace; void* buffer; int workSpaceSize; -#ifdef ENABLE_BF16 - if (std::is_same::value || std::is_same::value) { -#else - if (std::is_same::value) { -#endif // ENABLE_BF16 + bool workspace_flag = std::is_same::value; +#ifdef ENABLE_FP8 + workspace_flag = workspace_flag || std::is_same::value; +#endif +#if ENABLE_BF16 + workspace_flag = workspace_flag || std::is_same::value; +#endif + if (workspace_flag) { // cublas_workspace_ should be the start pointer of cudaMalloc() // to ensure 16B alignemnet cublas_workspace = buffer_in; @@ -87,14 +90,18 @@ void generate_gpt_gemm_config(int batch_size, } } - const int hidden_units = head_num * size_per_head; - const int local_head_num = head_num / tensor_para_size; - const int local_hidden_units = local_head_num * size_per_head; - const int gemm_num = 11; + const int hidden_units = head_num * size_per_head; + const int local_head_num = head_num / tensor_para_size; + const int local_hidden_units = local_head_num * size_per_head; + const int max_input_len_padded = (max_input_len + 15) / 16 * 16; + const int gemm_num = 11; int M[gemm_num]; int N[gemm_num]; int K[gemm_num]; int batchCount[gemm_num]; + int64_t strideA[gemm_num]; + int64_t strideB[gemm_num]; + int64_t strideD[gemm_num]; char mess[gemm_num][256]; float exec_times[gemm_num]; @@ -103,20 +110,29 @@ void generate_gpt_gemm_config(int batch_size, K[0] = hidden_units; N[0] = 3 * local_hidden_units; batchCount[0] = 1; + strideA[0] = 0; + strideB[0] = 0; + strideD[0] = 0; strcpy(mess[0], "context from_tensor * weightQKV"); // gemm 1 - M[1] = max_input_len; + M[1] = max_input_len_padded; K[1] = size_per_head; - N[1] = max_input_len; + N[1] = max_input_len_padded; batchCount[1] = batch_size * beam_width * local_head_num; + strideA[1] = max_input_len_padded * size_per_head; + strideB[1] = max_input_len_padded * size_per_head; + strideD[1] = max_input_len_padded * max_input_len_padded; strcpy(mess[1], "context batch gemm Q*K^T"); // gemm 2 - M[2] = max_input_len; - K[2] = max_input_len; + M[2] = max_input_len_padded; + K[2] = max_input_len_padded; N[2] = size_per_head; batchCount[2] = batch_size * beam_width * local_head_num; + strideA[2] = max_input_len_padded * size_per_head; + strideB[2] = max_input_len_padded * max_input_len_padded; + strideD[2] = max_input_len_padded * size_per_head; strcpy(mess[2], "context batch gemm QK*V^T"); // gemm 3 @@ -124,6 +140,9 @@ void generate_gpt_gemm_config(int batch_size, K[3] = local_hidden_units; N[3] = hidden_units; batchCount[3] = 1; + strideA[3] = 0; + strideB[3] = 0; + strideD[3] = 0; strcpy(mess[3], "context attr * output_kernel"); // gemm 4 @@ -131,6 +150,9 @@ void generate_gpt_gemm_config(int batch_size, K[4] = hidden_units; N[4] = inter_size / tensor_para_size; batchCount[4] = 1; + strideA[4] = 0; + strideB[4] = 0; + strideD[4] = 0; strcpy(mess[4], "context ffn gemm 1"); // gemm 5 @@ -138,6 +160,9 @@ void generate_gpt_gemm_config(int batch_size, K[5] = inter_size / tensor_para_size; N[5] = hidden_units; batchCount[5] = 1; + strideA[5] = 0; + strideB[5] = 0; + strideD[5] = 0; strcpy(mess[5], "context ffn gemm 2"); // gemm 6 @@ -145,6 +170,9 @@ void generate_gpt_gemm_config(int batch_size, K[6] = hidden_units; N[6] = 3 * local_hidden_units; batchCount[6] = 1; + strideA[6] = 0; + strideB[6] = 0; + strideD[6] = 0; strcpy(mess[6], "from_tensor * weightQKV"); // gemm 7 @@ -152,6 +180,9 @@ void generate_gpt_gemm_config(int batch_size, K[7] = local_hidden_units; N[7] = hidden_units; batchCount[7] = 1; + strideA[7] = 0; + strideB[7] = 0; + strideD[7] = 0; strcpy(mess[7], "attr * output_kernel"); // gemm 8 @@ -159,6 +190,9 @@ void generate_gpt_gemm_config(int batch_size, K[8] = hidden_units; N[8] = inter_size / tensor_para_size; batchCount[8] = 1; + strideA[8] = 0; + strideB[8] = 0; + strideD[8] = 0; strcpy(mess[8], "ffn gemm 1"); // gemm 9 @@ -166,6 +200,9 @@ void generate_gpt_gemm_config(int batch_size, K[9] = inter_size / tensor_para_size; N[9] = hidden_units; batchCount[9] = 1; + strideA[9] = 0; + strideB[9] = 0; + strideD[9] = 0; strcpy(mess[9], "ffn gemm 2"); // gemm 10 @@ -173,6 +210,9 @@ void generate_gpt_gemm_config(int batch_size, K[10] = hidden_units; N[10] = ceil(vocab_size / 8.) * 8 / tensor_para_size; batchCount[10] = 1; + strideA[10] = 0; + strideB[10] = 0; + strideD[10] = 0; strcpy(mess[10], "logits gemm"); cublasHandle_t cublas_handle; @@ -183,6 +223,8 @@ void generate_gpt_gemm_config(int batch_size, cudaDataType_t AType; cudaDataType_t BType; cudaDataType_t CType; + cudaDataType_t DType; + cudaDataType_t DType_FP8[gemm_num]; cudaDataType_t computeType; int startAlgo, endAlgo; const int ites = 100; @@ -194,6 +236,7 @@ void generate_gpt_gemm_config(int batch_size, AType = CUDA_R_32F; BType = CUDA_R_32F; CType = CUDA_R_32F; + DType = CUDA_R_32F; computeType = CUDA_R_32F; startAlgo = (int)CUBLAS_GEMM_DEFAULT; endAlgo = (int)CUBLAS_GEMM_ALGO23; @@ -203,6 +246,7 @@ void generate_gpt_gemm_config(int batch_size, AType = CUDA_R_16F; BType = CUDA_R_16F; CType = CUDA_R_16F; + DType = CUDA_R_16F; computeType = CUDA_R_32F; startAlgo = (int)CUBLAS_GEMM_DEFAULT_TENSOR_OP; endAlgo = (int)CUBLAS_GEMM_ALGO15_TENSOR_OP; @@ -213,10 +257,40 @@ void generate_gpt_gemm_config(int batch_size, AType = CUDA_R_16BF; BType = CUDA_R_16BF; CType = CUDA_R_16BF; + DType = CUDA_R_16BF; computeType = CUDA_R_32F; startAlgo = (int)CUBLAS_GEMM_DEFAULT_TENSOR_OP; endAlgo = (int)CUBLAS_GEMM_ALGO15_TENSOR_OP; } +#endif +#ifdef ENABLE_FP8 + else if (std::is_same::value) { + data_type = FP8_DATATYPE; + AType = CUDA_R_8F_E4M3; + BType = CUDA_R_8F_E4M3; + CType = CUDA_R_16BF; +#ifdef FP8_GEMM_OUTPUT_QUANT_DISABLE + DType = CUDA_R_16BF +#else + DType_FP8[0] = CUDA_R_8F_E4M3; + DType_FP8[1] = CUDA_R_16BF; + DType_FP8[2] = CUDA_R_8F_E4M3; + DType_FP8[3] = CUDA_R_16BF; + DType_FP8[4] = CUDA_R_16BF; + DType_FP8[5] = CUDA_R_16BF; +#ifdef FP8_MHA + DType_FP8[6] = CUDA_R_8F_E4M3; +#else + DType_FP8[6] = CUDA_R_16BF; +#endif + DType_FP8[7] = CUDA_R_16BF; + DType_FP8[8] = CUDA_R_16BF; + DType_FP8[9] = CUDA_R_16BF; +#endif + computeType = CUDA_R_32F; + startAlgo = (int)CUBLAS_GEMM_DEFAULT_TENSOR_OP; + endAlgo = (int)CUBLAS_GEMM_ALGO15_TENSOR_OP; + } #endif float alpha = (float)1.0f; float beta = (float)0.0f; @@ -226,8 +300,15 @@ void generate_gpt_gemm_config(int batch_size, if (line_count == 0) { fprintf(fd, "batch_size, seq_len, head_num, size_per_head dataType ### batchCount, n, m, k, algoId, " - "customOption, tile, numSplitsK, swizzle, reductionScheme, workspaceSize, stages, exec_time\n"); + "customOption, tile, numSplitsK, swizzle, reductionScheme, workspaceSize, stages, " +#if (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH >= 3) + "inner_shapeId, cluster_shapeId, " +#elif (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH < 3) + "mma_shapeId, cga_shapeId, schedule_mode, " +#endif + "exec_time\n"); } + for (int i = 0; i < gemm_num; ++i) { int seq_len = i <= 5 ? max_input_len : 1; @@ -357,8 +438,9 @@ void generate_gpt_gemm_config(int batch_size, printf("fast_algo %d costs %.3f ms\n", fast_algo, exec_time); // for fp16 and bf16, we compare cublasLt - if (data_type != FLOAT_DATATYPE && i != 1 && i != 2 && i != 10) { - printf("***cublasLt Gemm Testing Begin***\n"); + // for fp8, compare cublaslt for all gemm kernels + if ((data_type != FLOAT_DATATYPE && i != 1 && i != 2 && i != 10) || data_type == FP8_DATATYPE) { + printf("***cublasLt Gemm Testing Beign***\n"); // Let try a fixed number of combinations int ALGO_COMBINATIONS = 5000; customMatmulPerf_t perfResults[ALGO_COMBINATIONS]; @@ -381,7 +463,12 @@ void generate_gpt_gemm_config(int batch_size, workSpaceSize, fd, perfResults, - ALGO_COMBINATIONS); + ALGO_COMBINATIONS, + DType_FP8[i], + batchCount[i], + strideA[i], + strideB[i], + strideD[i]); if (perfResults[0].time < exec_time) { printPerfStructure(batch_size * beam_width, seq_len, @@ -393,11 +480,18 @@ void generate_gpt_gemm_config(int batch_size, perfResults[0], fd, data_type, - 0); + 0, + batchCount[i]); } else { fprintf(fd, - "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 %f\n", + "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 " +#if (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH >= 3) + "-1 -1 " +#elif (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH < 3) + "-1 -1 -1 " +#endif + "%f\n", batch_size * beam_width, seq_len, head_num, @@ -414,7 +508,13 @@ void generate_gpt_gemm_config(int batch_size, } else { fprintf(fd, - "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 %f\n", + "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 " +#if (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH >= 3) + "-1 -1 " +#elif (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH < 3) + "-1 -1 -1 " +#endif + "%f\n", batch_size * beam_width, seq_len, head_num, @@ -638,6 +738,19 @@ template void generate_gpt_gemm_config<__nv_bfloat16>(int batch_size, bool isAppend); #endif +#ifdef ENABLE_FP8 +template void generate_gpt_gemm_config<__nv_fp8_e4m3>(int batch_size, + int beam_width, + int max_input_len, + int head_num, + int size_per_head, + int inter_size, + int vocab_size, + int tensor_para_size, + void* buffer_in, + bool isAppend); +#endif + size_t calGptGemmTestBufSizeInByte(int batch_size, int beam_width, int max_input_len, @@ -675,7 +788,9 @@ size_t calGptGemmTestBufSizeInByte(int batch_size, buf_size_in_byte = buf_size_in_byte > t ? buf_size_in_byte : t; } buf_size_in_byte *= wordSize; - buf_size_in_byte += ((data_type == HALF_DATATYPE || data_type == BFLOAT16_DATATYPE) ? CUBLAS_WORKSPACE_SIZE : 0); + buf_size_in_byte += ((data_type == HALF_DATATYPE || data_type == BFLOAT16_DATATYPE || data_type == FP8_DATATYPE) ? + CUBLAS_WORKSPACE_SIZE : + 0); return buf_size_in_byte; } diff --git a/src/fastertransformer/utils/gemm_test/gpt_gemm_func.h b/src/fastertransformer/utils/gemm_test/gpt_gemm_func.h index ecfa4f3c3..82eec3b1b 100644 --- a/src/fastertransformer/utils/gemm_test/gpt_gemm_func.h +++ b/src/fastertransformer/utils/gemm_test/gpt_gemm_func.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -24,7 +24,12 @@ #include #include #include +#ifdef ENABLE_BF16 #include +#endif +#ifdef ENABLE_FP8 +#include +#endif #include #include #include diff --git a/src/fastertransformer/utils/gemm_test/swin_gemm_func.cc b/src/fastertransformer/utils/gemm_test/swin_gemm_func.cc index f08ec9f84..ec309c4b3 100644 --- a/src/fastertransformer/utils/gemm_test/swin_gemm_func.cc +++ b/src/fastertransformer/utils/gemm_test/swin_gemm_func.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -332,7 +332,13 @@ void generate_swin_gemm_config( } else { fprintf(fd, - "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 %f\n", + "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 " +#if (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH >= 3) + "-1 -1 " +#elif (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH < 3) + "-1 -1 -1 " +#endif + "%f\n", batch_size, seq_len, head_num, @@ -349,7 +355,13 @@ void generate_swin_gemm_config( } else { fprintf(fd, - "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 %f\n", + "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 " +#if (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH >= 3) + "-1 -1 " +#elif (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH < 3) + "-1 -1 -1 " +#endif + "%f\n", batch_size, seq_len, head_num, diff --git a/src/fastertransformer/utils/gemm_test/swin_gemm_func.h b/src/fastertransformer/utils/gemm_test/swin_gemm_func.h index da8f03d43..fdbbddc66 100644 --- a/src/fastertransformer/utils/gemm_test/swin_gemm_func.h +++ b/src/fastertransformer/utils/gemm_test/swin_gemm_func.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/gemm_test/swin_igemm_func.cc b/src/fastertransformer/utils/gemm_test/swin_igemm_func.cc index a91016ee2..5c053931f 100644 --- a/src/fastertransformer/utils/gemm_test/swin_igemm_func.cc +++ b/src/fastertransformer/utils/gemm_test/swin_igemm_func.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/gemm_test/swin_igemm_func.h b/src/fastertransformer/utils/gemm_test/swin_igemm_func.h index 669f29622..7f4d087a0 100644 --- a/src/fastertransformer/utils/gemm_test/swin_igemm_func.h +++ b/src/fastertransformer/utils/gemm_test/swin_igemm_func.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/gemm_test/t5_gemm_func.cc b/src/fastertransformer/utils/gemm_test/t5_gemm_func.cc index 20ac92b08..5ecc7ef57 100644 --- a/src/fastertransformer/utils/gemm_test/t5_gemm_func.cc +++ b/src/fastertransformer/utils/gemm_test/t5_gemm_func.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -495,7 +495,13 @@ void generate_t5_gemm_config(int batch_size, } else { fprintf(fd, - "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 %f\n", + "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 " +#if (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH >= 3) + "-1 -1 " +#elif (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH < 3) + "-1 -1 -1 " +#endif + "%f\n", batch_size * (i <= 5 || i == 1 ? 1 : beam_width), seq_len, head_num, @@ -512,7 +518,13 @@ void generate_t5_gemm_config(int batch_size, } else { fprintf(fd, - "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 %f\n", + "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 " +#if (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH >= 3) + "-1 -1 " +#elif (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH < 3) + "-1 -1 -1 " +#endif + "%f\n", batch_size * (i <= 5 || i == 1 ? 1 : beam_width), seq_len, head_num, diff --git a/src/fastertransformer/utils/gemm_test/t5_gemm_func.h b/src/fastertransformer/utils/gemm_test/t5_gemm_func.h index 67ec12a8c..cea1586b2 100644 --- a/src/fastertransformer/utils/gemm_test/t5_gemm_func.h +++ b/src/fastertransformer/utils/gemm_test/t5_gemm_func.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/gemm_test/xlnet_gemm_func.cc b/src/fastertransformer/utils/gemm_test/xlnet_gemm_func.cc index 042f5eef6..f24c54e1d 100644 --- a/src/fastertransformer/utils/gemm_test/xlnet_gemm_func.cc +++ b/src/fastertransformer/utils/gemm_test/xlnet_gemm_func.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -381,7 +381,13 @@ void generate_xlnet_gemm_config(int batch_size, } else { fprintf(fd, - "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 %f\n", + "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 " +#if (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH >= 3) + "-1 -1 " +#elif (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH < 3) + "-1 -1 -1 " +#endif + "%f\n", batch_size, seq_len, head_num, @@ -398,7 +404,13 @@ void generate_xlnet_gemm_config(int batch_size, } else { fprintf(fd, - "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 %f\n", + "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 " +#if (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH >= 3) + "-1 -1 " +#elif (CUBLAS_VER_MAJOR == 11 && CUBLAS_VER_MINOR == 11 && CUBLAS_VER_PATCH < 3) + "-1 -1 -1 " +#endif + "%f\n", batch_size, seq_len, head_num, diff --git a/src/fastertransformer/utils/gemm_test/xlnet_gemm_func.h b/src/fastertransformer/utils/gemm_test/xlnet_gemm_func.h index 1e9e8c33a..3e5e0212c 100644 --- a/src/fastertransformer/utils/gemm_test/xlnet_gemm_func.h +++ b/src/fastertransformer/utils/gemm_test/xlnet_gemm_func.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/gpu_buf.h b/src/fastertransformer/utils/gpu_buf.h new file mode 100644 index 000000000..d2505b8f8 --- /dev/null +++ b/src/fastertransformer/utils/gpu_buf.h @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "cuda_fp16.h" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" +#include "src/fastertransformer/utils/memory_utils.h" + +#include +#include +#include +#include + +namespace fastertransformer { + +template +class GPUBuf { +public: + GPUBuf(size_t size, bool random_init = true): size(size), ptr(nullptr) + { + deviceMalloc(&ptr, size, random_init); + } + template + GPUBuf(const GPUBuf& buf_src): size(buf_src.size), ptr(nullptr) + { + deviceMalloc(&ptr, size, false); + set(buf_src); + } + + template + void set(const GPUBuf& buf_src) + { + if (std::is_same::value) { + cudaD2Dcpy(ptr, reinterpret_cast(buf_src.ptr), size); + } + else { + invokeCudaCast(ptr, buf_src.ptr, size, 0); + } + } + + void set(const T* h_ptr) + { + cudaH2Dcpy(ptr, h_ptr, size); + } + + void to_host(T* h_ptr) const + { + cudaD2Hcpy(h_ptr, ptr, size); + } + + std::vector to_host_vec() const + { + std::vector host_vec(size); + cudaD2Hcpy(host_vec.data(), ptr, size); + return host_vec; + } + + void zero() + { + deviceMemSetZero(ptr, size); + } + + ~GPUBuf() + { + if (ptr != nullptr) + cudaFree(ptr); + } + + size_t size; + T* ptr; +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/utils/logger.cc b/src/fastertransformer/utils/logger.cc index 85747e514..02d24c24f 100644 --- a/src/fastertransformer/utils/logger.cc +++ b/src/fastertransformer/utils/logger.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/logger.h b/src/fastertransformer/utils/logger.h index df75f86a0..763d81489 100644 --- a/src/fastertransformer/utils/logger.h +++ b/src/fastertransformer/utils/logger.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/memory_utils.cu b/src/fastertransformer/utils/memory_utils.cu index dff337d0f..edb753505 100644 --- a/src/fastertransformer/utils/memory_utils.cu +++ b/src/fastertransformer/utils/memory_utils.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -28,7 +28,7 @@ namespace fastertransformer { template void deviceMalloc(T** ptr, size_t size, bool is_random_initialize) { - FT_CHECK_WITH_INFO(size >= 0, "Ask deviceMalloc size " + std::to_string(size) + "< 0 is invalid."); + FT_CHECK_WITH_INFO(size >= ((size_t)0), "Ask deviceMalloc size " + std::to_string(size) + "< 0 is invalid."); check_cuda_error(cudaMalloc((void**)(ptr), sizeof(T) * size)); if (is_random_initialize) { cudaRandomUniform(*ptr, size); @@ -45,6 +45,9 @@ template void deviceMalloc(int** ptr, size_t size, bool is_random_initialize); template void deviceMalloc(bool** ptr, size_t size, bool is_random_initialize); template void deviceMalloc(char** ptr, size_t size, bool is_random_initialize); template void deviceMalloc(int8_t** ptr, size_t size, bool is_random_initialize); +#ifdef ENABLE_FP8 +template void deviceMalloc(__nv_fp8_e4m3** ptr, size_t size, bool is_random_initialize); +#endif template void deviceMemSetZero(T* ptr, int size) @@ -57,6 +60,12 @@ template void deviceMemSetZero(half* ptr, int size); template void deviceMemSetZero(int* ptr, int size); template void deviceMemSetZero(uint32_t* ptr, int size); template void deviceMemSetZero(bool* ptr, int size); +#ifdef ENABLE_FP8 +template void deviceMemSetZero(__nv_fp8_e4m3* ptr, int size); +#endif +#ifdef ENABLE_BF16 +template void deviceMemSetZero(__nv_bfloat16* ptr, int size); +#endif template void deviceFree(T*& ptr) @@ -77,6 +86,9 @@ template void deviceFree(int*& ptr); template void deviceFree(bool*& ptr); template void deviceFree(char*& ptr); template void deviceFree(int8_t*& ptr); +#ifdef ENABLE_FP8 +template void deviceFree(__nv_fp8_e4m3*& ptr); +#endif template void deviceFill(T* devptr, int size, T value, cudaStream_t stream) @@ -108,6 +120,9 @@ template void cudaD2Hcpy(__nv_bfloat16* tgt, const __nv_bfloat16* src, int size) #endif template void cudaD2Hcpy(int* tgt, const int* src, int size); template void cudaD2Hcpy(bool* tgt, const bool* src, int size); +#ifdef ENABLE_FP8 +template void cudaD2Hcpy(__nv_fp8_e4m3* tgt, const __nv_fp8_e4m3* src, int size); +#endif template void cudaD2Hcpy(unsigned long long* tgt, const unsigned long long* src, int size); template void cudaD2Hcpy(unsigned int* tgt, const unsigned int* src, int size); template void cudaD2Hcpy(int8_t* tgt, const int8_t* src, int size); @@ -125,6 +140,9 @@ template void cudaH2Dcpy(__nv_bfloat16* tgt, const __nv_bfloat16* src, int size) #endif template void cudaH2Dcpy(int* tgt, const int* src, int size); template void cudaH2Dcpy(bool* tgt, const bool* src, int size); +#ifdef ENABLE_FP8 +template void cudaH2Dcpy(__nv_fp8_e4m3* tgt, const __nv_fp8_e4m3* src, int size); +#endif template void cudaH2Dcpy(unsigned long long* tgt, const unsigned long long* src, int size); template void cudaH2Dcpy(unsigned int* tgt, const unsigned int* src, int size); template void cudaH2Dcpy(int8_t* tgt, const int8_t* src, int size); @@ -143,8 +161,41 @@ template void cudaD2Dcpy(__nv_bfloat16* tgt, const __nv_bfloat16* src, int size) template void cudaD2Dcpy(int* tgt, const int* src, int size); template void cudaD2Dcpy(bool* tgt, const bool* src, int size); template void cudaD2Dcpy(int8_t* tgt, const int8_t* src, int size); +#ifdef ENABLE_FP8 +template void cudaD2Dcpy(__nv_fp8_e4m3* tgt, const __nv_fp8_e4m3* src, int size); +#endif template void cudaD2Dcpy(unsigned long long* tgt, const unsigned long long* src, int size); +template +__global__ void cudaCast(T_OUT* dst, T_IN* src, const int size) +{ + for (int tid = threadIdx.x + blockIdx.x * blockDim.x; tid < size; tid += blockDim.x * gridDim.x) { + dst[tid] = (T_OUT)((float)(src[tid])); + } +} + +template +void invokeCudaCast(T_OUT* dst, T_IN const* const src, const int size, cudaStream_t stream) +{ + cudaCast<<<256, 256, 0, stream>>>(dst, src, size); +} + +template void invokeCudaCast(float* dst, half const* const src, const int size, cudaStream_t stream); +#ifdef ENABLE_BF16 +template void invokeCudaCast(float* dst, __nv_bfloat16 const* const src, const int size, cudaStream_t stream); +template void invokeCudaCast(__nv_bfloat16* dst, float const* const src, const int size, cudaStream_t stream); +template void invokeCudaCast(__nv_bfloat16* dst, half const* const src, const int size, cudaStream_t stream); +template void invokeCudaCast(half* dst, __nv_bfloat16 const* const src, const int size, cudaStream_t stream); +#endif +#ifdef ENABLE_FP8 +template void invokeCudaCast(float* dst, __nv_fp8_e4m3 const* const src, const int size, cudaStream_t stream); +template void invokeCudaCast(__nv_bfloat16* dst, __nv_fp8_e4m3 const* const src, const int size, cudaStream_t stream); +template void invokeCudaCast(half* dst, __nv_fp8_e4m3 const* const src, const int size, cudaStream_t stream); +template void invokeCudaCast(__nv_fp8_e4m3* dst, float const* const src, const int size, cudaStream_t stream); +template void invokeCudaCast(__nv_fp8_e4m3* dst, __nv_bfloat16 const* const src, const int size, cudaStream_t stream); +template void invokeCudaCast(__nv_fp8_e4m3* dst, half const* const src, const int size, cudaStream_t stream); +#endif + template void cudaAutoCpy(T* tgt, const T* src, const int size, cudaStream_t stream) { @@ -180,47 +231,55 @@ template void cudaAutoCpy(unsigned long long const** tgt, unsigned long long const* const* src, int size, cudaStream_t stream); template -__global__ void cuda_random_uniform_kernel(T* buffer, const int size) +__global__ void cuda_random_uniform_kernel(T* buffer, const int size, const int seq_offset) { const int idx = blockIdx.x * blockDim.x + threadIdx.x; curandState_t local_state; - curand_init((unsigned long long int)1337, idx, 0, &local_state); + curand_init((unsigned long long int)1337, idx + seq_offset, 0, &local_state); for (int index = idx; index < size; index += blockDim.x * gridDim.x) { buffer[index] = (T)(curand_uniform(&local_state) * 0.2f - 0.1f); } } -template -__global__ void cuda_random_uniform_kernel(int* buffer, const int size) +template<> +__global__ void cuda_random_uniform_kernel(int* buffer, const int size, const int seq_offset) { - const int idx = blockIdx.x * blockDim.x + threadIdx.x; + const int idx = blockIdx.x * blockDim.x + threadIdx.x; + curandState_t local_state; + curand_init((float)1337.f, idx + seq_offset, 0, &local_state); for (int index = idx; index < size; index += blockDim.x * gridDim.x) { - buffer[index] = 0; + buffer[index] = curand(&local_state); } } -template -__global__ void cuda_random_uniform_kernel(bool* buffer, const int size) +template<> +__global__ void cuda_random_uniform_kernel(bool* buffer, const int size, const int seq_offset) { - const int idx = blockIdx.x * blockDim.x + threadIdx.x; + const int idx = blockIdx.x * blockDim.x + threadIdx.x; + curandState_t local_state; + curand_init((float)1337.f, idx + seq_offset, 0, &local_state); for (int index = idx; index < size; index += blockDim.x * gridDim.x) { - buffer[index] = false; + buffer[index] = (curand(&local_state) % 2 == 0); } } -template -__global__ void cuda_random_uniform_kernel(char* buffer, const int size) +template<> +__global__ void cuda_random_uniform_kernel(char* buffer, const int size, const int seq_offset) { - const int idx = blockIdx.x * blockDim.x + threadIdx.x; + const int idx = blockIdx.x * blockDim.x + threadIdx.x; + curandState_t local_state; + curand_init((float)1337.f, idx + seq_offset, 0, &local_state); for (int index = idx; index < size; index += blockDim.x * gridDim.x) { - buffer[index] = '\0'; + buffer[index] = curand(&local_state) % 0xFF; } } template void cudaRandomUniform(T* buffer, const int size) { - cuda_random_uniform_kernel<<<256, 256>>>(buffer, size); + static int seq_offset = 0; + cuda_random_uniform_kernel<<<256, 256>>>(buffer, size, seq_offset); + seq_offset += 256 * 256; } template void cudaRandomUniform(float* buffer, const int size); @@ -231,6 +290,9 @@ template void cudaRandomUniform(__nv_bfloat16* buffer, const int size); template void cudaRandomUniform(int* buffer, const int size); template void cudaRandomUniform(bool* buffer, const int size); template void cudaRandomUniform(char* buffer, const int size); +#ifdef ENABLE_FP8 +template void cudaRandomUniform(__nv_fp8_e4m3* buffer, const int size); +#endif // loads data from binary file. If it succeeds, returns a non-empty vector. If loading fails or // the product of the elements in shape is 0, this function will return an empty vector. @@ -316,6 +378,11 @@ template int loadWeightFromBinFunc<__nv_bfloat16, __nv_bfloat16>(__nv_bfloat16* std::vector shape, std::string filename); #endif // ENABLE_BF16 +template int loadWeightFromBinFunc(int* ptr, std::vector shape, std::string filename); +#ifdef ENABLE_FP8 +template int +loadWeightFromBinFunc<__nv_fp8_e4m3, float>(__nv_fp8_e4m3* ptr, std::vector shape, std::string filename); +#endif // ENABLE_FP8 template int loadWeightFromBin(T* ptr, std::vector shape, std::string filename, FtCudaDataType model_file_type) @@ -334,6 +401,11 @@ int loadWeightFromBin(T* ptr, std::vector shape, std::string filename, F case FtCudaDataType::BF16: loadWeightFromBinFunc(ptr, shape, filename); break; +#endif +#ifdef ENABLE_FP8 + case FtCudaDataType::FP8: + loadWeightFromBinFunc(ptr, shape, filename); + break; #endif default: FT_LOG_ERROR("Does not support FtCudaDataType=%d", model_file_type); @@ -342,6 +414,13 @@ int loadWeightFromBin(T* ptr, std::vector shape, std::string filename, F return 0; } +template<> +int loadWeightFromBin(int* ptr, std::vector shape, std::string filename, FtCudaDataType model_file_type) +{ + loadWeightFromBinFunc(ptr, shape, filename); + return 0; +} + template int loadWeightFromBin(float* ptr, std::vector shape, std::string filename, FtCudaDataType model_file_type); template int @@ -352,6 +431,12 @@ loadWeightFromBin(int8_t* ptr, std::vector shape, std::string filename, template int loadWeightFromBin(__nv_bfloat16* ptr, std::vector shape, std::string filename, FtCudaDataType model_file_type); #endif +#ifdef ENABLE_FP8 +template int +loadWeightFromBin(__nv_fp8_e4m3* ptr, std::vector shape, std::string filename, FtCudaDataType model_file_type); +#endif +template int +loadWeightFromBin(int* ptr, std::vector shape, std::string filename, FtCudaDataType model_file_type); template int loadWeightFromBinAndQuantizeForWeightOnlyFunc(int8_t* ptr, @@ -490,6 +575,9 @@ template void invokeCudaD2DScaleCpyConvert(int32_t* tgt, const half* src, const template void invokeCudaD2DScaleCpyConvert(__nv_bfloat16* tgt, const int32_t* src, const float* scale, bool invert_scale, const int size, cudaStream_t stream); template void invokeCudaD2DScaleCpyConvert(int32_t* tgt, const __nv_bfloat16* src, const float* scale, bool invert_scale, const int size, cudaStream_t stream); #endif // ENABLE_BF16 +#ifdef ENABLE_FP8 +template void invokeCudaD2DScaleCpyConvert(float* tgt, const __nv_fp8_e4m3* src, const float* scale, bool invert_scale, const int size, cudaStream_t stream); +#endif // ENABLE_FP8 // clang-format on void invokeCudaD2DcpyHalf2Float(float* dst, half* src, const int size, cudaStream_t stream) @@ -540,7 +628,6 @@ __global__ void fakeCast(T_IN* input_ptr, const size_t size) { for (int i = blockIdx.x * blockDim.x + threadIdx.x; i < size; i += blockDim.x * gridDim.x) { T_fake_type tmp_val = (T_fake_type)((float)input_ptr[i]); - tmp_val = tmp_val * (T_fake_type)(1.0f); input_ptr[i] = (T_IN)((float)tmp_val); } } @@ -553,6 +640,218 @@ void invokeFakeCast(T_IN* input_ptr, const size_t size, cudaStream_t stream) fakeCast<<>>(input_ptr, size); } +#ifdef ENABLE_FP8 +__global__ void cudaD2Dcpyfp82Float(float* dst, __nv_fp8_e4m3* src, const int size) +{ + for (int tid = threadIdx.x + blockIdx.x * blockDim.x; tid < size; tid += blockDim.x * gridDim.x) { + dst[tid] = (float)(src[tid]); + } +} + +void invokeCudaD2Dcpyfp82Float(float* dst, __nv_fp8_e4m3* src, const int size, cudaStream_t stream) +{ + cudaD2Dcpyfp82Float<<<256, 256, 0, stream>>>(dst, src, size); +} + +__global__ void cudaD2Dcpyfp82Half(half* dst, __nv_fp8_e4m3* src, const int size) +{ + for (int tid = threadIdx.x + blockIdx.x * blockDim.x; tid < size; tid += blockDim.x * gridDim.x) { + dst[tid] = (half)((float)(src[tid])); + } +} + +void invokeCudaD2Dcpyfp82Half(half* dst, __nv_fp8_e4m3* src, const int size, cudaStream_t stream) +{ + cudaD2Dcpyfp82Half<<<256, 256, 0, stream>>>(dst, src, size); +} + +__global__ void cudaD2DcpyFloat2fp8(__nv_fp8_e4m3* dst, float* src, const int size) +{ + for (int tid = threadIdx.x + blockIdx.x * blockDim.x; tid < size; tid += blockDim.x * gridDim.x) { + dst[tid] = (__nv_fp8_e4m3)src[tid]; + } +} + +void invokeCudaD2DcpyFloat2fp8(__nv_fp8_e4m3* dst, float* src, const int size, cudaStream_t stream) +{ + cudaD2DcpyFloat2fp8<<<256, 256, 0, stream>>>(dst, src, size); +} + +__global__ void cudaD2DcpyHalf2fp8(__nv_fp8_e4m3* dst, half* src, const int size) +{ + for (int tid = threadIdx.x + blockIdx.x * blockDim.x; tid < size; tid += blockDim.x * gridDim.x) { + dst[tid] = (__nv_fp8_e4m3)src[tid]; + } +} + +void invokeCudaD2DcpyHalf2fp8(__nv_fp8_e4m3* dst, half* src, const int size, cudaStream_t stream) +{ + cudaD2DcpyHalf2fp8<<<256, 256, 0, stream>>>(dst, src, size); +} + +__global__ void cudaD2DcpyBfloat2fp8(__nv_fp8_e4m3* dst, __nv_bfloat16* src, const int size) +{ + for (int tid = threadIdx.x + blockIdx.x * blockDim.x; tid < size; tid += blockDim.x * gridDim.x) { + dst[tid] = (__nv_fp8_e4m3)src[tid]; + } +} + +void invokeCudaD2DcpyBfloat2fp8(__nv_fp8_e4m3* dst, __nv_bfloat16* src, const int size, cudaStream_t stream) +{ + cudaD2DcpyBfloat2fp8<<<256, 256, 0, stream>>>(dst, src, size); +} + +#endif // ENABLE_FP8 + +template +__global__ void transpose(T_OUT* dst, T_IN* src, const int dim0, const int dim1) +{ + for (int tid = threadIdx.x + blockIdx.x * blockDim.x; tid < dim0 * dim1; tid += blockDim.x * gridDim.x) { + const int src_col_id = tid % dim1; + const int src_row_id = tid / dim1; + dst[src_col_id * dim0 + src_row_id] = (T_OUT)(src[tid]); + } +} + +template +void invokeInPlaceTranspose(T* data, T* workspace, const int dim0, const int dim1) +{ + // copy data to workspace, and then transpose from workspace to data + cudaD2Dcpy(workspace, data, dim0 * dim1); + transpose<<<256, 256>>>(data, workspace, dim0, dim1); +} + +#ifdef ENABLE_FP8 +template void invokeInPlaceTranspose(__nv_fp8_e4m3* data, __nv_fp8_e4m3* workspace, const int dim0, const int dim1); +#endif // ENABLE_FP8 +#ifdef ENABLE_BF16 +template void invokeInPlaceTranspose(__nv_bfloat16* data, __nv_bfloat16* workspace, const int dim0, const int dim1); +#endif // ENABLE_BF16 +template void invokeInPlaceTranspose(float* data, float* workspace, const int dim0, const int dim1); + +template +__global__ void transpose0213(T_OUT* dst, T_IN* src, const int dim0, const int dim1, const int dim2, const int dim3) +{ + // src permutation: [0, 1, 2, 3] + // dst permutation: [0, 2, 1, 3] + for (int tid = threadIdx.x + blockIdx.x * blockDim.x; tid < dim0 * dim1 * dim2 * dim3; + tid += blockDim.x * gridDim.x) { + int tmp_idx = tid; + const int dim_3_idx = tmp_idx % dim3; + tmp_idx = (tmp_idx - dim_3_idx) / dim3; + const int dim_2_idx = tmp_idx % dim2; + tmp_idx = (tmp_idx - dim_2_idx) / dim2; + const int dim_1_idx = tmp_idx % dim1; + tmp_idx = (tmp_idx - dim_1_idx) / dim1; + const int dim_0_idx = tmp_idx % dim0; + dst[dim_0_idx * dim1 * dim2 * dim3 + dim_2_idx * dim1 * dim3 + dim_1_idx * dim3 + dim_3_idx] = src[tid]; + } +} + +template +void invokeInPlaceTranspose0213(T* data, T* workspace, const int dim0, const int dim1, const int dim2, const int dim3) +{ + // copy data to workspace, and then transpose from workspace to data + // Note that this kernel is used for pre-processing and not very efficient. + cudaD2Dcpy(workspace, data, dim0 * dim1 * dim2 * dim3); + transpose0213<<<256, 256>>>(data, workspace, dim0, dim1, dim2, dim3); +} + +#ifdef ENABLE_FP8 +template void invokeInPlaceTranspose0213( + __nv_fp8_e4m3* data, __nv_fp8_e4m3* workspace, const int dim0, const int dim1, const int dim2, const int dim3); +#endif // ENABLE_FP8 +#ifdef ENABLE_BF16 +template void invokeInPlaceTranspose0213( + __nv_bfloat16* data, __nv_bfloat16* workspace, const int dim0, const int dim1, const int dim2, const int dim3); +#endif // ENABLE_BF16 +template void invokeInPlaceTranspose0213( + float* data, float* workspace, const int dim0, const int dim1, const int dim2, const int dim3); + +template +__global__ void transpose102(T_OUT* dst, T_IN* src, const int dim0, const int dim1, const int dim2) +{ + // src permutation: [0, 1, 2] + // dst permutation: [1, 0, 2] + for (int tid = threadIdx.x + blockIdx.x * blockDim.x; tid < dim0 * dim1 * dim2; tid += blockDim.x * gridDim.x) { + int tmp_idx = tid; + const int dim_2_idx = tmp_idx % dim2; + tmp_idx = (tmp_idx - dim_2_idx) / dim2; + const int dim_1_idx = tmp_idx % dim1; + tmp_idx = (tmp_idx - dim_1_idx) / dim1; + const int dim_0_idx = tmp_idx % dim0; + dst[dim_1_idx * dim0 * dim2 + dim_0_idx * dim2 + dim_2_idx] = src[tid]; + } +} + +template +void invokeInPlaceTranspose102(T* data, T* workspace, const int dim0, const int dim1, const int dim2) +{ + // copy data to workspace, and then transpose from workspace to data + // Note that this kernel is used for pre-processing and not very efficient. + cudaD2Dcpy(workspace, data, dim0 * dim1 * dim2); + transpose102<<<256, 256>>>(data, workspace, dim0, dim1, dim2); +} + +#ifdef ENABLE_FP8 +template void invokeInPlaceTranspose102( + __nv_fp8_e4m3* data, __nv_fp8_e4m3* workspace, const int dim0, const int dim1, const int dim2); +#endif // ENABLE_FP8 +#ifdef ENABLE_BF16 +template void invokeInPlaceTranspose102( + __nv_bfloat16* data, __nv_bfloat16* workspace, const int dim0, const int dim1, const int dim2); +#endif // ENABLE_BF16 +template void invokeInPlaceTranspose102(float* data, float* workspace, const int dim0, const int dim1, const int dim2); + +template +void __global__ multiplyScale(T* tensor, float scale, const size_t size) +{ + for (int index = threadIdx.x + blockIdx.x * blockDim.x; index < size; index += blockDim.x * gridDim.x) { + tensor[index] = (T)(((float)tensor[index]) * scale); + } +} + +template +void invokeMultiplyScale(T* tensor, float scale, const size_t size, cudaStream_t stream) +{ + int block = 256; + int grid = (size + 255) / 256; + multiplyScale<<>>(tensor, scale, size); +} + +template void invokeMultiplyScale(float* tensor, float scale, const size_t size, cudaStream_t stream); +template void invokeMultiplyScale(half* tensor, float scale, const size_t size, cudaStream_t stream); +#ifdef ENABLE_BF16 +template void invokeMultiplyScale(__nv_bfloat16* tensor, float scale, const size_t size, cudaStream_t stream); +#endif +#ifdef ENABLE_FP8 +template void invokeMultiplyScale(__nv_fp8_e4m3* tensor, float scale, const size_t size, cudaStream_t stream); +#endif + +template +void __global__ divideScale(T* tensor, float scale, const size_t size) +{ + for (int index = threadIdx.x + blockIdx.x * blockDim.x; index < size; index += blockDim.x * gridDim.x) { + tensor[index] = (T)(((float)tensor[index]) / scale); + } +} + +template +void invokeDivideScale(T* tensor, float scale, const size_t size, cudaStream_t stream) +{ + int block = 256; + int grid = (size + 255) / 256; + divideScale<<>>(tensor, scale, size); +} + +template void invokeDivideScale(float* tensor, float scale, const size_t size, cudaStream_t stream); +template void invokeDivideScale(half* tensor, float scale, const size_t size, cudaStream_t stream); +#ifdef ENABLE_BF16 +template void invokeDivideScale(__nv_bfloat16* tensor, float scale, const size_t size, cudaStream_t stream); +#endif +#ifdef ENABLE_FP8 +template void invokeDivideScale(__nv_fp8_e4m3* tensor, float scale, const size_t size, cudaStream_t stream); +#endif #ifdef ENABLE_BF16 template void invokeFakeCast(float* input_ptr, const size_t size, cudaStream_t stream); template void @@ -561,6 +860,12 @@ template void invokeFakeCast(half* input_ptr, const size_t #endif template void invokeFakeCast(float* input_ptr, const size_t size, cudaStream_t stream); template void invokeFakeCast(float* input_ptr, const size_t size, cudaStream_t stream); +#ifdef ENABLE_FP8 +template void invokeFakeCast(float* input_ptr, const size_t size, cudaStream_t stream); +template void invokeFakeCast(half* input_ptr, const size_t size, cudaStream_t stream); +template void +invokeFakeCast<__nv_bfloat16, __nv_fp8_e4m3>(__nv_bfloat16* input_ptr, const size_t size, cudaStream_t stream); +#endif size_t cuda_datatype_size(FtCudaDataType dt) { diff --git a/src/fastertransformer/utils/memory_utils.h b/src/fastertransformer/utils/memory_utils.h index a767d8afd..fe1a4fa23 100644 --- a/src/fastertransformer/utils/memory_utils.h +++ b/src/fastertransformer/utils/memory_utils.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -17,6 +17,7 @@ #pragma once #include "src/fastertransformer/utils/Tensor.h" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" #include "src/fastertransformer/utils/cuda_utils.h" namespace fastertransformer { @@ -63,6 +64,55 @@ int loadWeightFromBinAndQuantizeForWeightOnly(int8_t* quantized_weig void invokeCudaD2DcpyHalf2Float(float* dst, half* src, const int size, cudaStream_t stream); void invokeCudaD2DcpyFloat2Half(half* dst, float* src, const int size, cudaStream_t stream); +#ifdef ENABLE_FP8 +void invokeCudaD2Dcpyfp82Float(float* dst, __nv_fp8_e4m3* src, const int size, cudaStream_t stream); +void invokeCudaD2Dcpyfp82Half(half* dst, __nv_fp8_e4m3* src, const int size, cudaStream_t stream); +void invokeCudaD2DcpyFloat2fp8(__nv_fp8_e4m3* dst, float* src, const int size, cudaStream_t stream); +void invokeCudaD2DcpyHalf2fp8(__nv_fp8_e4m3* dst, half* src, const int size, cudaStream_t stream); +void invokeCudaD2DcpyBfloat2fp8(__nv_fp8_e4m3* dst, __nv_bfloat16* src, const int size, cudaStream_t stream); +#endif // ENABLE_FP8 +#ifdef ENABLE_BF16 +void invokeCudaD2DcpyBfloat2Float(float* dst, __nv_bfloat16* src, const int size, cudaStream_t stream); +#endif // ENABLE_BF16 + +template +void invokeCudaCast(T_OUT* dst, T_IN const* const src, const int size, cudaStream_t stream); + +template +__inline__ __host__ __device__ size_t dim2flat(const T (&idx)[n_dims], const T (&dims)[n_dims]) +{ + size_t flat_idx = 0; + for (size_t i = 0; i < n_dims; i++) { + flat_idx += idx[i]; + if (i + 1 < n_dims) + flat_idx *= dims[i + 1]; + } + return flat_idx; +} + +template +__inline__ __host__ __device__ void flat2dim(T1 flat_idx, const T2 (&dims)[n_dims], T2 (&idx)[n_dims]) +{ + for (int i = n_dims - 1; i >= 0; i--) { + idx[i] = flat_idx % dims[i]; + flat_idx /= dims[i]; + } +} + +template +void invokeInPlaceTranspose(T* data, T* workspace, const int dim0, const int dim1); + +template +void invokeInPlaceTranspose0213(T* data, T* workspace, const int dim0, const int dim1, const int dim2, const int dim3); + +template +void invokeInPlaceTranspose102(T* data, T* workspace, const int dim0, const int dim1, const int dim2); + +template +void invokeMultiplyScale(T* tensor, float scale, const size_t size, cudaStream_t stream); + +template +void invokeDivideScale(T* tensor, float scale, const size_t size, cudaStream_t stream); template void invokeCudaD2DcpyConvert(T_OUT* tgt, const T_IN* src, const int size, cudaStream_t stream = 0); diff --git a/src/fastertransformer/utils/mpi_utils.cc b/src/fastertransformer/utils/mpi_utils.cc index 2a70e5a86..dfd6da1a4 100644 --- a/src/fastertransformer/utils/mpi_utils.cc +++ b/src/fastertransformer/utils/mpi_utils.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/mpi_utils.h b/src/fastertransformer/utils/mpi_utils.h index 65234538b..6d9d9af58 100644 --- a/src/fastertransformer/utils/mpi_utils.h +++ b/src/fastertransformer/utils/mpi_utils.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -36,7 +36,7 @@ namespace fastertransformer { } \ } while (0) #else -#define MPICHECK(cmd) +#define MPICHECK(cmd) printf("[WARNING] No MPI\n"); #endif // A wrapper module of the MPI library. diff --git a/src/fastertransformer/utils/nccl_utils.cc b/src/fastertransformer/utils/nccl_utils.cc index b5c7887ec..29ac95979 100644 --- a/src/fastertransformer/utils/nccl_utils.cc +++ b/src/fastertransformer/utils/nccl_utils.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -22,6 +22,7 @@ namespace fastertransformer { template ncclDataType_t getNcclDataType() { + FT_LOG_DEBUG("%s start", __PRETTY_FUNCTION__); ncclDataType_t nccl_data_type; if (std::is_same::value) { nccl_data_type = ncclFloat; @@ -54,6 +55,7 @@ ncclDataType_t getNcclDataType() template void ftNcclAllReduceSum(const T* send_buf, T* recv_buf, const int data_size, NcclParam nccl_param, cudaStream_t stream) { + FT_LOG_DEBUG("%s start", __PRETTY_FUNCTION__); #ifdef BUILD_MULTI_GPU ncclDataType_t nccl_data_type = getNcclDataType(); NCCLCHECK(ncclGroupStart()); @@ -61,12 +63,14 @@ void ftNcclAllReduceSum(const T* send_buf, T* recv_buf, const int data_size, Ncc (const void*)send_buf, (void*)recv_buf, data_size, nccl_data_type, ncclSum, nccl_param.nccl_comm_, stream)); NCCLCHECK(ncclGroupEnd()); #endif + FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); } template void ftNcclAllGather( const T* send_buf, T* recv_buf, const int data_size, const int rank, NcclParam nccl_param, cudaStream_t stream) { + FT_LOG_DEBUG("%s start", __PRETTY_FUNCTION__); #ifdef BUILD_MULTI_GPU ncclDataType_t nccl_data_type = getNcclDataType(); NCCLCHECK(ncclGroupStart()); @@ -74,15 +78,18 @@ void ftNcclAllGather( ncclAllGather(send_buf + rank * data_size, recv_buf, data_size, nccl_data_type, nccl_param.nccl_comm_, stream)); NCCLCHECK(ncclGroupEnd()); #endif + FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); } template void ftNcclSend(const T* send_buf, const int data_size, const int peer, NcclParam nccl_param, cudaStream_t stream) { + FT_LOG_DEBUG("%s start", __PRETTY_FUNCTION__); #ifdef BUILD_MULTI_GPU ncclDataType_t nccl_data_type = getNcclDataType(); NCCLCHECK(ncclSend(send_buf, data_size, nccl_data_type, peer, nccl_param.nccl_comm_, stream)); #endif + FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); } template void @@ -103,10 +110,12 @@ ftNcclSend(const char* send_buf, const int data_size, const int peer, NcclParam template void ftNcclRecv(T* recv_buf, const int data_size, const int peer, NcclParam nccl_param, cudaStream_t stream) { + FT_LOG_DEBUG("%s start", __PRETTY_FUNCTION__); #ifdef BUILD_MULTI_GPU ncclDataType_t nccl_data_type = getNcclDataType(); NCCLCHECK(ncclRecv(recv_buf, data_size, nccl_data_type, peer, nccl_param.nccl_comm_, stream)); #endif + FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); } template void @@ -126,10 +135,12 @@ ftNcclRecv(char* recv_buf, const int data_size, const int peer, NcclParam nccl_p template void ftNcclBroadCast(T* buff, const int data_size, const int root, NcclParam nccl_param, cudaStream_t stream) { + FT_LOG_DEBUG("%s start", __PRETTY_FUNCTION__); #ifdef BUILD_MULTI_GPU ncclDataType_t nccl_data_type = getNcclDataType(); NCCLCHECK(ncclBcast(buff, data_size, nccl_data_type, root, nccl_param.nccl_comm_, stream)); #endif + FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); } template void @@ -203,6 +214,7 @@ void ftNcclGroupEnd() void ftNcclStreamSynchronize(NcclParam tensor_para, NcclParam pipeline_para, cudaStream_t stream) { + FT_LOG_DEBUG("%s start", __PRETTY_FUNCTION__); #ifdef BUILD_MULTI_GPU cudaError_t cudaErr; ncclResult_t tensor_ncclErr = ncclSuccess, tensor_ncclAsyncErr = ncclSuccess, pipeline_ncclErr = ncclSuccess, @@ -216,6 +228,7 @@ void ftNcclStreamSynchronize(NcclParam tensor_para, NcclParam pipeline_para, cud while (1) { cudaErr = cudaStreamQuery(stream); if (cudaErr == cudaSuccess) { + FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); return; } @@ -268,6 +281,7 @@ void ftNcclGetUniqueId(NcclUid& uid) void ftNcclCommInitRank(NcclParam& param, const int rank, const int world_size, const NcclUid uid) { + FT_LOG_DEBUG("%s start", __PRETTY_FUNCTION__); #ifdef BUILD_MULTI_GPU // Initialize a nccl communicator. if (param.nccl_comm_ != nullptr) { @@ -279,6 +293,7 @@ void ftNcclCommInitRank(NcclParam& param, const int rank, const int world_size, param.nccl_uid_ = uid.nccl_uid_; NCCLCHECK(ncclCommInitRank(¶m.nccl_comm_, param.world_size_, param.nccl_uid_, param.rank_)); #endif + FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); } void ftNcclParamDestroy(NcclParam& param) @@ -295,6 +310,7 @@ void ftNcclInitialize(NcclParam& tensor_para, const int tensor_para_size, const int pipeline_para_size) { + FT_LOG_DEBUG("%s start", __PRETTY_FUNCTION__); // Initialize nccl communication grid of tensor and pipeline parallel groups. #ifndef BUILD_MULTI_GPU FT_CHECK_WITH_INFO(tensor_para_size == 1, @@ -398,6 +414,7 @@ void ftNcclInitialize(NcclParam& tensor_para, tensor_para.toString().c_str(), pipeline_para.toString().c_str()); #endif + FT_LOG_DEBUG("%s stop", __PRETTY_FUNCTION__); } size_t getLocalBatchSize(const size_t batch_size, const size_t seq_len, const size_t pipeline_para_size) diff --git a/src/fastertransformer/utils/nccl_utils.h b/src/fastertransformer/utils/nccl_utils.h index 31299ac8f..cf5371487 100644 --- a/src/fastertransformer/utils/nccl_utils.h +++ b/src/fastertransformer/utils/nccl_utils.h @@ -33,7 +33,6 @@ #endif namespace fastertransformer { - #ifdef BUILD_MULTI_GPU #define NCCLCHECK(cmd) \ do { \ @@ -44,7 +43,7 @@ namespace fastertransformer { } \ } while (0) #else -#define NCCLCHECK(cmd) +#define NCCLCHECK(cmd) printf("[WARNING} No NCCL"); #endif struct NcclUid { diff --git a/src/fastertransformer/utils/nvtx_utils.cc b/src/fastertransformer/utils/nvtx_utils.cc index 8b108c61b..ffe54c6ee 100644 --- a/src/fastertransformer/utils/nvtx_utils.cc +++ b/src/fastertransformer/utils/nvtx_utils.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -14,9 +14,14 @@ * limitations under the License. */ +#include + #include "nvtx_utils.h" +#ifdef USE_NVTX +#include "nvToolsExt.h" +#endif -namespace nvtx { +namespace ft_nvtx { std::string getScope() { return scope; @@ -36,4 +41,49 @@ void resetScope() scope = ""; return; } -} // namespace nvtx +void setDeviceDomain(int deviceId) +{ + domain = deviceId; + return; +} +void resetDeviceDomain() +{ + domain = 0; + return; +} +int getDeviceDomain() +{ + return domain; +} + +bool isEnableNvtx() +{ + if (!has_read_nvtx_env) { + static char* ft_nvtx_env_char = std::getenv("FT_NVTX"); + is_enable_ft_nvtx = (ft_nvtx_env_char != nullptr && std::string(ft_nvtx_env_char) == "ON") ? true : false; + has_read_nvtx_env = true; + } + return is_enable_ft_nvtx; +} + +void ftNvtxRangePush(std::string name) +{ +#ifdef USE_NVTX + nvtxStringHandle_t nameId = nvtxDomainRegisterStringA(NULL, (getScope() + name).c_str()); + nvtxEventAttributes_t eventAttrib = {0}; + eventAttrib.messageType = NVTX_MESSAGE_TYPE_REGISTERED; + eventAttrib.message.registered = nameId; + eventAttrib.payloadType = NVTX_PAYLOAD_TYPE_INT32; + eventAttrib.payload.iValue = getDeviceDomain(); + nvtxRangePushEx(&eventAttrib); +#endif +} + +void ftNvtxRangePop() +{ +#ifdef USE_NVTX + nvtxRangePop(); +#endif +} + +} // namespace ft_nvtx diff --git a/src/fastertransformer/utils/nvtx_utils.h b/src/fastertransformer/utils/nvtx_utils.h index b98a4e31d..e000c2157 100644 --- a/src/fastertransformer/utils/nvtx_utils.h +++ b/src/fastertransformer/utils/nvtx_utils.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -16,40 +16,34 @@ #pragma once -#include "nvToolsExt.h" -#include - -extern bool NVTX_ON; - -namespace nvtx { +namespace ft_nvtx { static std::string scope; std::string getScope(); void addScope(std::string name); void setScope(std::string name); void resetScope(); -} // namespace nvtx - -#ifdef USE_NVTX +static int domain = 0; +void setDeviceDomain(int deviceId); +int getDeviceDomain(); +void resetDeviceDomain(); +bool isEnableNvtx(); + +static bool has_read_nvtx_env = false; +static bool is_enable_ft_nvtx = false; +void ftNvtxRangePush(std::string name); +void ftNvtxRangePop(); +} // namespace ft_nvtx #define PUSH_RANGE(name) \ { \ - if (NVTX_ON == true) { \ - cudaDeviceSynchronize(); \ - nvtxRangePush((nvtx::getScope() + name).c_str()); \ + if (ft_nvtx::isEnableNvtx()) { \ + ft_nvtx::ftNvtxRangePush(name); \ } \ } #define POP_RANGE \ { \ - if (NVTX_ON == true) { \ - cudaDeviceSynchronize(); \ - nvtxRangePop(); \ + if (ft_nvtx::isEnableNvtx()) { \ + ft_nvtx::ftNvtxRangePop(); \ } \ } - -#else - -#define PUSH_RANGE(name) -#define POP_RANGE - -#endif diff --git a/src/fastertransformer/utils/prompt_learning.h b/src/fastertransformer/utils/prompt_learning.h index faced8d7a..7ab770686 100644 --- a/src/fastertransformer/utils/prompt_learning.h +++ b/src/fastertransformer/utils/prompt_learning.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/src/fastertransformer/utils/test_utils.h b/src/fastertransformer/utils/test_utils.h new file mode 100644 index 000000000..22d2cd81c --- /dev/null +++ b/src/fastertransformer/utils/test_utils.h @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2022 NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include +#include +#include + +namespace fastertransformer { + +#define TIMEIT(print, n, stream, fn, ...) \ + ({ \ + cudaEvent_t _macro_event_start, _macro_event_stop; \ + cudaEventCreate(&_macro_event_start); \ + cudaEventCreate(&_macro_event_stop); \ + cudaEventRecord(_macro_event_start, stream); \ + for (int i = 0; i < n; i++) { \ + fn(__VA_ARGS__); \ + } \ + cudaEventRecord(_macro_event_stop, stream); \ + cudaStreamSynchronize(stream); \ + float ms = 0.0f; \ + cudaEventElapsedTime(&ms, _macro_event_start, _macro_event_stop); \ + ms /= n; \ + if (print) \ + printf("[TIMEIT] " #fn ": %.2fµs\n", ms * 1000); \ + ms; \ + }) + +template +struct rel_abs_diff { + T operator()(const T& lhs, const T& rhs) const + { + return lhs == 0 ? 0 : static_cast(fabs(lhs - rhs) / fabs(lhs)); + } +}; + +template +struct abs_diff { + T operator()(const T& lhs, const T& rhs) const + { + return static_cast(fabs(lhs - rhs)); + } +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/utils/wenet_conv2d.h b/src/fastertransformer/utils/wenet_conv2d.h index 4a4b39cf8..7ba8405f2 100644 --- a/src/fastertransformer/utils/wenet_conv2d.h +++ b/src/fastertransformer/utils/wenet_conv2d.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/word_list.cc b/src/fastertransformer/utils/word_list.cc index 93666aa15..dcb4fcc86 100644 --- a/src/fastertransformer/utils/word_list.cc +++ b/src/fastertransformer/utils/word_list.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/utils/word_list.h b/src/fastertransformer/utils/word_list.h index 97f856169..33e8e5658 100644 --- a/src/fastertransformer/utils/word_list.h +++ b/src/fastertransformer/utils/word_list.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/tests/CMakeLists.txt b/tests/CMakeLists.txt index 7a17a94f9..37d971dae 100644 --- a/tests/CMakeLists.txt +++ b/tests/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -16,4 +16,5 @@ add_subdirectory(unittests) if(BUILD_PYT) add_subdirectory(gemm_dequantize) add_subdirectory(moe) + add_subdirectory(int8_gemm) endif() diff --git a/tests/bert/tf_bert_unit_test.py b/tests/bert/tf_bert_unit_test.py index bfc2197e4..8f52ee755 100644 --- a/tests/bert/tf_bert_unit_test.py +++ b/tests/bert/tf_bert_unit_test.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/tests/bert/th_bert_unit_test.py b/tests/bert/th_bert_unit_test.py index 6e65ebe34..47e71620f 100644 --- a/tests/bert/th_bert_unit_test.py +++ b/tests/bert/th_bert_unit_test.py @@ -38,7 +38,7 @@ class TestEncoder(unittest.TestCase): 'remove_padding': False, 'avg_seq_len': -1, 'thread_num': 1, - 'ths_path': 'lib/libth_bert.so', + 'ths_path': 'lib/libth_transformer.so', 'weight_path': None, 'int8_mode': 0, 'tensor_para_size': 1, @@ -59,7 +59,6 @@ def test_batch_fp32(self): max_diff = bert_example(args_dict) sys.stdout.flush() self.assertTrue(max_diff < self.threshold[args_dict['data_type']]) - args_dict['ths_path'] = 'lib/libth_encoder.so' max_diff = encoder_example(args_dict) sys.stdout.flush() self.assertTrue(max_diff < self.threshold[args_dict['data_type']]) @@ -77,7 +76,6 @@ def test_batch_fp16(self): max_diff = bert_example(args_dict) sys.stdout.flush() self.assertTrue(max_diff < self.threshold[args_dict['data_type']]) - args_dict['ths_path'] = 'lib/libth_encoder.so' max_diff = encoder_example(args_dict) sys.stdout.flush() self.assertTrue(max_diff < self.threshold[args_dict['data_type']]) @@ -96,7 +94,6 @@ def test_hidden_fp32(self): max_diff = bert_example(args_dict) sys.stdout.flush() self.assertTrue(max_diff < self.threshold[args_dict['data_type']]) - args_dict['ths_path'] = 'lib/libth_encoder.so' max_diff = encoder_example(args_dict) sys.stdout.flush() self.assertTrue(max_diff < self.threshold[args_dict['data_type']]) @@ -116,7 +113,6 @@ def test_hidden_fp16(self): max_diff = bert_example(args_dict) sys.stdout.flush() self.assertTrue(max_diff < self.threshold[args_dict['data_type']]) - args_dict['ths_path'] = 'lib/libth_encoder.so' max_diff = encoder_example(args_dict) sys.stdout.flush() self.assertTrue(max_diff < self.threshold[args_dict['data_type']]) @@ -137,7 +133,6 @@ def test_seqlen_fp32(self): max_diff = bert_example(args_dict) sys.stdout.flush() self.assertTrue(max_diff < threshold_tmp[args_dict['data_type']]) - args_dict['ths_path'] = 'lib/libth_encoder.so' max_diff = encoder_example(args_dict) sys.stdout.flush() self.assertTrue(max_diff < threshold_tmp[args_dict['data_type']]) @@ -157,7 +152,6 @@ def test_seqlen_fp16(self): max_diff = bert_example(args_dict) sys.stdout.flush() self.assertTrue(max_diff < self.threshold[args_dict['data_type']]) - args_dict['ths_path'] = 'lib/libth_encoder.so' max_diff = encoder_example(args_dict) sys.stdout.flush() self.assertTrue(max_diff < self.threshold[args_dict['data_type']]) diff --git a/tests/decoding/tf_decoding_unit_test.py b/tests/decoding/tf_decoding_unit_test.py index 3cb9a4ecb..5cdc6d448 100644 --- a/tests/decoding/tf_decoding_unit_test.py +++ b/tests/decoding/tf_decoding_unit_test.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/tests/decoding/tf_fused_self_multihead_attention_unit_test.py b/tests/decoding/tf_fused_self_multihead_attention_unit_test.py index ac5f3b088..a4a7031e5 100644 --- a/tests/decoding/tf_fused_self_multihead_attention_unit_test.py +++ b/tests/decoding/tf_fused_self_multihead_attention_unit_test.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/tests/gemm_dequantize/CMakeLists.txt b/tests/gemm_dequantize/CMakeLists.txt index 061e14aeb..ecccacdf1 100644 --- a/tests/gemm_dequantize/CMakeLists.txt +++ b/tests/gemm_dequantize/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/tests/gemm_dequantize/th_gemm_dequantize.cc b/tests/gemm_dequantize/th_gemm_dequantize.cc index b45b2ba8c..d8c00b1fb 100644 --- a/tests/gemm_dequantize/th_gemm_dequantize.cc +++ b/tests/gemm_dequantize/th_gemm_dequantize.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/tests/gemm_dequantize/th_gemm_dequantize.py b/tests/gemm_dequantize/th_gemm_dequantize.py index a4d732a96..6563588a4 100644 --- a/tests/gemm_dequantize/th_gemm_dequantize.py +++ b/tests/gemm_dequantize/th_gemm_dequantize.py @@ -6,7 +6,7 @@ def random_tensor(shape, dtype, device, mean=0, std=1): class TestGemmDequantize(unittest.TestCase): def setUp(self) -> None: - torch.classes.load_library("lib/libth_weight_only_quant_ops.so") + torch.classes.load_library("lib/libth_transformer.so") torch.classes.load_library("lib/libgemm_dq_unit_ops.so") self.unpack_packed_int4s = torch.ops.fastertransformer.unpack_int4_packed_tensor_to_int8 self.pack_int4s = torch.ops.fastertransformer.pack_int8_tensor_to_packed_int4 diff --git a/tests/int8_gemm/CMakeLists.txt b/tests/int8_gemm/CMakeLists.txt new file mode 100644 index 000000000..a68000332 --- /dev/null +++ b/tests/int8_gemm/CMakeLists.txt @@ -0,0 +1,24 @@ +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +set(int8_test_files + int8_gemm_test.cu +) + +add_definitions(-DTORCH_CUDA=1) + +set(EXE_NAME "int8_gemm_test") +add_executable(${EXE_NAME} ${int8_test_files}) +set_target_properties(${EXE_NAME} PROPERTIES CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(${EXE_NAME} PUBLIC "${TORCH_LIBRARIES}" int8_gemm tensor logger) \ No newline at end of file diff --git a/tests/int8_gemm/int8_gemm_test.cu b/tests/int8_gemm/int8_gemm_test.cu new file mode 100644 index 000000000..dd385dd09 --- /dev/null +++ b/tests/int8_gemm/int8_gemm_test.cu @@ -0,0 +1,180 @@ +/* + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include +#include +#include + +#include "torch/csrc/cuda/Stream.h" +#include +#include + +#include "src/fastertransformer/kernels/cutlass_kernels/int8_gemm/int8_gemm.h" +#include "src/fastertransformer/th_op/th_utils.h" +#include "src/fastertransformer/utils/cuda_bf16_wrapper.h" +#include "src/fastertransformer/utils/logger.h" + +#include "cutlass/numeric_types.h" + +using torch::Tensor; +using torch_ext::get_ptr; + +namespace ft = fastertransformer; + +template +void int8_gemm_test( + const int m, + const int n, + const int k, + const at::ScalarType output_data_type, + const QuantMode quant_mode, + const int iters) +{ + const bool per_token_quant = quant_mode == QuantMode::PerTokenChannelQuant + || quant_mode == QuantMode::PerTokenQuant; + const bool per_channel_quant = quant_mode == QuantMode::PerTokenChannelQuant + || quant_mode == QuantMode::PerChannelQuant; + const int row_scale_size = per_token_quant ? m : 1; + const int col_scale_size = per_channel_quant ? n : 1; + + const at::ScalarType at_int32 = at::ScalarType::Int; + const at::ScalarType at_int8 = at::ScalarType::Char; + const at::ScalarType at_fp16 = at::ScalarType::Half; + const at::ScalarType at_bf16 = at::ScalarType::BFloat16; + const at::ScalarType at_fp32 = at::ScalarType::Float; + + using std::chrono::high_resolution_clock; + using std::chrono::duration_cast; + using std::chrono::microseconds; + + torch::manual_seed(0); + + auto x = torch::randint(-128, 128, {m, k}, torch::dtype(at_int32).requires_grad(false)); + auto w = torch::randint(-128, 128, {k, n}, torch::dtype(at_int32).requires_grad(false)); + + ft::FT_CHECK(torch::allclose(x, x.to(at_int8).to(at_int32))); + ft::FT_CHECK(torch::allclose(w, w.to(at_int8).to(at_int32))); + + auto y = torch::matmul(x, w); + + ft::Tensor{ft::MEMORY_CPU, ft::TYPE_INT32, {(size_t)m, (size_t)k}, get_ptr(x)}.saveNpy("x.npy"); + ft::Tensor{ft::MEMORY_CPU, ft::TYPE_INT32, {(size_t)k, (size_t)n}, get_ptr(w)}.saveNpy("w.npy"); + ft::Tensor{ft::MEMORY_CPU, ft::TYPE_INT32, {(size_t)m, (size_t)n}, get_ptr(y)}.saveNpy("y.npy"); + + auto x_gpu = x.to(at_int8).to(torch::kCUDA); + auto w_T_gpu = w.to(at_int8).to(torch::kCUDA).t().contiguous(); + auto w_gpu = w.to(at_int8).to(torch::kCUDA); + auto y_gpu = torch::zeros({m, n}, torch::dtype(output_data_type).device(torch::kCUDA).requires_grad(false)); + auto y_gpu_int32 = torch::zeros({m, n}, torch::dtype(at_int32).device(torch::kCUDA).requires_grad(false)); + + auto alpha_row_cultass = torch::ones({row_scale_size, 1}, torch::dtype(at_fp32).requires_grad(false)) * (1.0 / 100) * + torch::randint(1, 10, {row_scale_size, 1}, torch::dtype(at_fp32)); + auto alpha_col_cutlass = torch::ones({1, col_scale_size}, torch::dtype(at_fp32).requires_grad(false)) * (1.0 / 100) * + torch::randint(1, 10, {1, col_scale_size}, torch::dtype(at_fp32)); + + auto alpha_row_torch = alpha_row_cultass.expand({m, 1}); + auto alpha_col_torch = alpha_col_cutlass.expand({1, n}); + + // std::cout << alpha_row << std::endl; + auto alpha_row_gpu = alpha_row_cultass.to(torch::kCUDA); + auto alpha_col_gpu = alpha_col_cutlass.to(torch::kCUDA); + + auto alpha_row_col_scale_gpu = torch::matmul(alpha_row_torch, alpha_col_torch).to(torch::kCUDA); + + ft::CutlassInt8GemmRunner cutlass_runner_half; + + auto stream = at::cuda::getCurrentCUDAStream().stream(); + // warm_up + cutlass_runner_half.gemm(get_ptr(x_gpu), + get_ptr(w_T_gpu), + quant_mode, + get_ptr(alpha_col_gpu), + get_ptr(alpha_row_gpu), + get_ptr(y_gpu), + m, + n, + k, + nullptr, + 0, + stream); + + ft::Tensor{ft::MEMORY_GPU, ft::TYPE_INT8, {(size_t)m, (size_t)k}, get_ptr(x_gpu)}.saveNpy("x_gpu.npy"); + ft::Tensor{ft::MEMORY_GPU, ft::TYPE_INT8, {(size_t)n, (size_t)k}, get_ptr(w_T_gpu)}.saveNpy("w_T_gpu.npy"); + ft::Tensor{ft::MEMORY_GPU, ft::TYPE_INT8, {(size_t)k, (size_t)n}, get_ptr(w_gpu)}.saveNpy("w_gpu.npy"); + ft::Tensor{ft::MEMORY_GPU, ft::TYPE_FP16, {(size_t)m, (size_t)n}, get_ptr(y_gpu)}.saveNpy("y_gpu.npy"); + ft::Tensor{ft::MEMORY_GPU, ft::TYPE_INT32, {(size_t)m, (size_t)n}, get_ptr(y_gpu_int32)}.saveNpy("y_gpu_int32.npy"); + + ft::check_cuda_error(cudaStreamSynchronize(stream)); + auto start = high_resolution_clock::now(); + + for (int i = 0; i < iters; ++i) { + cutlass_runner_half.gemm(get_ptr(x_gpu), + get_ptr(w_T_gpu), + quant_mode, + get_ptr(alpha_col_gpu), + get_ptr(alpha_row_gpu), + get_ptr(y_gpu), + m, + n, + k, + nullptr, + 0, + stream); + } + + ft::check_cuda_error(cudaStreamSynchronize(stream)); + auto end = high_resolution_clock::now(); + + auto duration = duration_cast(end - start); + + if (torch::allclose((y.to(torch::kCUDA).to(at_fp32) * alpha_row_col_scale_gpu.to(torch::kCUDA)).to(output_data_type), y_gpu)) { + FT_LOG_INFO("SUCCESS " + std::to_string((double(duration.count()) / iters) / 1000) + " ms"); + } else { + FT_LOG_ERROR("FAILED " + std::to_string((double(duration.count()) / iters) / 1000) + " ms"); + // std::cout << "diff " << (y.to(torch::kCUDA).to(at_fp32) * alpha_row_col_scale_gpu.to(torch::kCUDA)).to(at_fp16) - y_gpu << std::endl; + } +} + +int main(int argc, char **argv) +{ + if (argc != 7) { + FT_LOG_ERROR("arguments missing, needs m, n, k, data_type(fp16=0, bf16=1), quant_mode (perTensor=0, perToken=1, perChannel=2, perTokenChannel=3), iters."); + return 0; + } + + const int m = atoi(argv[1]); + const int n = atoi(argv[2]); + const int k = atoi(argv[3]); + const at::ScalarType output_data_type = atoi(argv[4]) == 0 ? + at::ScalarType::Half : at::ScalarType::BFloat16; + const QuantMode quant_mode = static_cast(atoi(argv[5])); + if (quant_mode == QuantMode::PerChannelQuant) { + printf("per channel quant \n"); + } + const int iters = atoi(argv[6]); + + if (output_data_type == at::ScalarType::Half) { + int8_gemm_test(m, n, k, output_data_type, quant_mode, iters); + } else { +#if ENABLE_BF16 + int8_gemm_test<__nv_bfloat16>(m, n, k, output_data_type, quant_mode, iters); +#endif + } + + return 0; +} diff --git a/tests/longformer/py_longformer_unit_test.py b/tests/longformer/py_longformer_unit_test.py index 34f76cdd1..73454af2a 100644 --- a/tests/longformer/py_longformer_unit_test.py +++ b/tests/longformer/py_longformer_unit_test.py @@ -59,7 +59,7 @@ def __init__(self, methodName: str) -> None: ] self.model_dir = "examples/pytorch/longformer/longformer-large-4096-finetuned-triviaqa" - self.ft_longformer_lib = os.path.join('build', 'lib', 'libth_longformer.so') + self.ft_longformer_lib = os.path.join('build', 'lib', 'libth_transformer.so') def run_all_qa(self, seq_len, batch_size, ft_longformer, data_type): for idx in range(len(self.passage_texts)): diff --git a/tests/moe/CMakeLists.txt b/tests/moe/CMakeLists.txt index d9e535216..ffbe0617b 100644 --- a/tests/moe/CMakeLists.txt +++ b/tests/moe/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/tests/moe/th_moe_ops.cc b/tests/moe/th_moe_ops.cc index 971821a01..c3d965373 100644 --- a/tests/moe/th_moe_ops.cc +++ b/tests/moe/th_moe_ops.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/tests/moe/th_moe_unit_tests.py b/tests/moe/th_moe_unit_tests.py index 64e831bad..f55388c0c 100644 --- a/tests/moe/th_moe_unit_tests.py +++ b/tests/moe/th_moe_unit_tests.py @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -114,7 +114,7 @@ def test_bf16_gating_softmax(self): class TestGroupedGemmBias(unittest.TestCase): def setUp(self) -> None: - torch.classes.load_library("lib/libth_weight_only_quant_ops.so") + torch.classes.load_library("lib/libth_transformer.so") torch.classes.load_library("lib/libmoe_unit_ops.so") self.grouped_gemm_bias = torch.ops.moe_unit_ops.grouped_gemm_bias self.unpack_packed_int4s = torch.ops.fastertransformer.unpack_int4_packed_tensor_to_int8 @@ -279,7 +279,7 @@ def test_int4_bf16_moe_fc(self): class TestMoe(unittest.TestCase): def setUp(self) -> None: - torch.classes.load_library("lib/libth_weight_only_quant_ops.so") + torch.classes.load_library("lib/libth_transformer.so") torch.classes.load_library("lib/libmoe_unit_ops.so") self.run_moe_fc = torch.ops.moe_unit_ops.run_moe_fc diff --git a/tests/unittests/CMakeLists.txt b/tests/unittests/CMakeLists.txt index ebd66696c..3e8397d14 100644 --- a/tests/unittests/CMakeLists.txt +++ b/tests/unittests/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -20,6 +20,8 @@ FetchContent_Declare( GIT_REPOSITORY https://github.com/google/googletest.git GIT_TAG release-1.12.1 ) +add_definitions(-DTORCH_CUDA=1) + # For Windows: Prevent overriding the parent project's compiler/linker settings set(gtest_force_shared_crt ON CACHE BOOL "" FORCE) FetchContent_MakeAvailable(googletest) @@ -30,11 +32,10 @@ add_executable(unittest test_penalty_kernels.cu test_sampling_kernels.cu test_sampling_layer.cu - test_int8.cu test_tensor.cu) # automatic discovery of unit tests -target_link_libraries(unittest PUBLIC gtest_main) +target_link_libraries(unittest PUBLIC "${TORCH_LIBRARIES}" gtest_main) target_compile_features(unittest PRIVATE cxx_std_14) # Sorted by alphabetical order of test name. @@ -61,9 +62,8 @@ target_link_libraries( # Libs for test_sampling_layer DynamicDecodeLayer TopKSamplingLayer TopPSamplingLayer tensor cuda_utils logger) target_link_libraries( # Libs for test_tensor unittest PUBLIC tensor cuda_utils logger) -target_link_libraries( # Libs for test_int8 - unittest PUBLIC transpose_int8_kernels) +remove_definitions(-DTORCH_CUDA=1) add_executable(test_gemm test_gemm.cu) target_link_libraries(test_gemm PUBLIC -lcublas -lcudart -lcurand gemm cublasMMWrapper tensor cuda_utils logger) diff --git a/tests/unittests/fp8_gemm_test/2022_03_21__fp8_stride_batch_example/Makefile b/tests/unittests/fp8_gemm_test/2022_03_21__fp8_stride_batch_example/Makefile new file mode 100644 index 000000000..0e6737172 --- /dev/null +++ b/tests/unittests/fp8_gemm_test/2022_03_21__fp8_stride_batch_example/Makefile @@ -0,0 +1,44 @@ +CXX := g++ +CXXFLAGS := -Wall -Werror -g + +# NOTE: use RDubstov's cuBLAS: https://urm.nvidia.com/artifactory/sw-cuda-math-cublas/cicd/master-12.x/PostMerge/73/cublas_build_x86_64_centos7_cuda11.7_roma_nostromo_gpgpu_31055760_release.tar.gz +# CUBLAS_PATH := /home/abekas/workspace/gitrepo/cublas/docker_install_release/agno62_master12x_004__e8b1eafe1a__release/ +# NOTE: use the following CTK: https://urm.nvidia.com/artifactory/sw-fastkernels-generic-local/cuda/gpgpu/x86_64/linux/generic/release-internal/cuda-gpgpu-31073558.tgz +# SDK_PATH := /home/abekas/workspace/gitrepo/cublas/CASK/SDK/bringup/ + +CUBLAS_PATH := /home/scratch.bhsueh_sw_1/cublas_build_x86_64_centos7_cuda11.7_roma_nostromo_gpgpu_31055760_release/ +SDK_PATH := /home/scratch.bhsueh_sw_1/cuda_toolkit-gpgpu-31073558/ + + +CUBLAS_INC := -I$(CUBLAS_PATH)/include/ +CUBLAS_LIBS_PATH := -L$(CUBLAS_PATH)/lib64/ +CUBLAS_LIBS := -lcublasLt + +SDK_INC := -I$(SDK_PATH)/include +SDK_LIBS_PATH := -L$(SDK_PATH)/lib64/ +SDK_LIBS := -lcudart_static + +LOCAL_INC := -I$(shell dirname $(realpath $(firstword $(MAKEFILE_LIST)))) +FP8_INC := $(LOCAL_INC)/include + +LINKER_BONUS := -Wl,-rpath=$(CUBLAS_PATH)/lib64 + +# static cudart +SYS_LIBS := -L/lib/x86_64-linux-gnu/ -ldl -lpthread -lrt + +OBJECTS := main.o worker.o + +tester_app: $(OBJECTS) + $(CXX) $(OBJECTS) -o tester_app $(CUBLAS_LIBS_PATH) $(CUBLAS_LIBS) $(SDK_LIBS_PATH) $(SDK_LIBS) $(SYS_LIBS) $(LINKER_BONUS) + +worker.o : worker.cpp + $(CXX) $(CXXFLAGS) -c worker.cpp -o worker.o $(LOCAL_INC) $(CUBLAS_INC) $(SDK_INC) $(FP8_INC) + +main.o : main.cpp + $(CXX) $(CXXFLAGS) -c main.cpp -o main.o $(CUBLAS_INC) $(SDK_INC) $(FP8_INC) + +clean: + rm -f *.o tester_app + +#all : +# echo $(CASK_OBJS) diff --git a/tests/unittests/fp8_gemm_test/2022_03_21__fp8_stride_batch_example/include/cuda_fp8.h b/tests/unittests/fp8_gemm_test/2022_03_21__fp8_stride_batch_example/include/cuda_fp8.h new file mode 100644 index 000000000..da2d5450f --- /dev/null +++ b/tests/unittests/fp8_gemm_test/2022_03_21__fp8_stride_batch_example/include/cuda_fp8.h @@ -0,0 +1,338 @@ +/* + * Copyright 2022 NVIDIA Corporation. All rights reserved. + * + * NOTICE TO LICENSEE: + * + * This source code and/or documentation ("Licensed Deliverables") are + * subject to NVIDIA intellectual property rights under U.S. and + * international Copyright laws. + * + * These Licensed Deliverables contained herein is PROPRIETARY and + * CONFIDENTIAL to NVIDIA and is being provided under the terms and + * conditions of a form of NVIDIA software license agreement by and + * between NVIDIA and Licensee ("License Agreement") or electronically + * accepted by Licensee. Notwithstanding any terms or conditions to + * the contrary in the License Agreement, reproduction or disclosure + * of the Licensed Deliverables to any third party without the express + * written consent of NVIDIA is prohibited. + * + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, NVIDIA MAKES NO REPRESENTATION ABOUT THE + * SUITABILITY OF THESE LICENSED DELIVERABLES FOR ANY PURPOSE. IT IS + * PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. + * NVIDIA DISCLAIMS ALL WARRANTIES WITH REGARD TO THESE LICENSED + * DELIVERABLES, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, + * NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY + * SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, + * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS + * ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THESE LICENSED DELIVERABLES. + * + * U.S. Government End Users. These Licensed Deliverables are a + * "commercial item" as that term is defined at 48 C.F.R. 2.101 (OCT + * 1995), consisting of "commercial computer software" and "commercial + * computer software documentation" as such terms are used in 48 + * C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Government + * only as a commercial end item. Consistent with 48 C.F.R.12.212 and + * 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), all + * U.S. Government End Users acquire the Licensed Deliverables with + * only those rights set forth herein. + * + * Any use of the Licensed Deliverables in individual and commercial + * software must include, in the user documentation and internal + * comments to the code, the above Disclaimer and U.S. Government End + * Users Notice. + */ + +#ifndef __CUDA_FP8_H__ +#define __CUDA_FP8_H__ + +/* Set up function decorations */ +#if defined(__CUDACC__) +#define __CUDA_FP8_DECL__ static __device__ __inline__ +#define __CUDA_HOSTDEVICE_FP8__ __host__ __device__ +#define __CUDA_HOSTDEVICE_FP8_DECL__ static __host__ __device__ __inline__ +#else /* !defined(__CUDACC__) */ +#if defined(__GNUC__) +#define __CUDA_HOSTDEVICE_FP8_DECL__ static __attribute__((unused)) +#else +#define __CUDA_HOSTDEVICE_FP8_DECL__ static +#endif /* defined(__GNUC__) */ +#define __CUDA_HOSTDEVICE_FP8__ +#endif /* defined(__CUDACC_) */ + +#if !defined(_MSC_VER) && __cplusplus >= 201103L +#define __CPP_VERSION_AT_LEAST_11_FP8 +#elif _MSC_FULL_VER >= 190024210 && _MSVC_LANG >= 201103L +#define __CPP_VERSION_AT_LEAST_11_FP8 +#endif + +#if (defined __CPP_VERSION_AT_LEAST_11_FP8) +/* bring fixed width integer types */ +#include +#else +#include +#endif + +/* bring in __half_raw data type */ +#include "cuda_fp16.h" +/* bring in __nv_bfloat16_raw data type */ +#include "cuda_bf16.h" +/* bring in float2, double4, etc vector types */ +#include "vector_types.h" + +/** + * \defgroup CUDA_MATH_INTRINSIC_FP8 FP8 Intrinsics + * This section describes fp8 intrinsic functions. + * To use these functions, include the header file \p cuda_fp8.h in your + * program. + */ + +/** + * \defgroup CUDA_MATH_FP8_MISC FP8 Conversion and Data Movement + * \ingroup CUDA_MATH_INTRINSIC_FP8 + * To use these functions, include the header file \p cuda_fp8.h in your + * program. + */ + +/** + * \ingroup CUDA_MATH_FP8_MISC + * \brief __nv_fp8_storage_t 8-bit unsigned integer + * type abstraction used to for \p fp8 floating-point + * numbers storage. + */ +typedef uint8_t __nv_fp8_storage_t; + +/** + * \ingroup CUDA_MATH_FP8_MISC + * \brief __nv_fp8x2_storage_t 16-bit unsigned integer + * type abstraction used to for storage of pairs of + * \p fp8 floating-point numbers. + */ +typedef uint16_t __nv_fp8x2_storage_t; + +/** + * \ingroup CUDA_MATH_FP8_MISC + * \brief __nv_fp8x4_storage_t 32-bit unsigned integer + * type abstraction used to for storage of tetrads of + * \p fp8 floating-point numbers. + */ +typedef uint32_t __nv_fp8x4_storage_t; + +/** + * \ingroup CUDA_MATH_FP8_MISC + * \brief __nv_saturation_t enumerates the modes applicable when + * performing a narrowing conversion to \p fp8 destination types. + * + * \details + * - __NV_NOSAT - means no saturation to finite is performed when + * rounding values outside the range of destination type. + * NOTE: for fp8 type of e4m3 kind, the results that are larger than + * the maximum representable finite number become NaN. + * - __NV_SATFINITE - means inputs larger than the maximum representable + * finite number MAXNORM of the target format round to the MAXNORM of + * the same sign. + */ +typedef enum __nv_saturation_t { + __NV_NOSAT, + __NV_SATFINITE, +} __nv_saturation_t; + +/** + * \ingroup CUDA_MATH_FP8_MISC + * \brief __nv_fp8_interpretation_t enumerates the possible + * interpretations of the 8-bit values when referring to them as + * \p fp8 types. + * + * \details + * - __NV_E4M3 stands for \p fp8 numbers of \p e4m3 kind. + * - __NV_E5M2 stands for \p fp8 numbers of \p e5m2 kind. + */ +typedef enum __nv_fp8_interpretation_t { + __NV_E4M3, + __NV_E5M2, +} __nv_fp8_interpretation_t; + +/* Forward-declaration of C-style APIs */ + +/** + * \ingroup CUDA_MATH_FP8_MISC + * \brief Converts input \p double precision \p x to \p fp8 type of the + * requested kind using round-to-nearest-even rounding and requested saturation + * mode. + * + * \details Converts input \p x to \p fp8 type of the kind specified by + * \p fp8_interpretation parameter, + * using round-to-nearest-even rounding and + * saturation mode specified by \p saturate parameter. + * + * \returns + * - The \p __nv_fp8_storage_t value holds the result of conversion. + */ +__CUDA_HOSTDEVICE_FP8_DECL__ __nv_fp8_storage_t +__nv_cvt_double_to_fp8(const double x, const __nv_saturation_t saturate, + const __nv_fp8_interpretation_t fp8_interpretation); +__CUDA_HOSTDEVICE_FP8_DECL__ __nv_fp8x2_storage_t +__nv_cvt_double2_to_fp8x2(const double2 x, const __nv_saturation_t saturate, + const __nv_fp8_interpretation_t fp8_interpretation); + +/** + * \ingroup CUDA_MATH_FP8_MISC + * \brief Converts input \p single precision \p x to \p fp8 type of the + * requested kind using round-to-nearest-even rounding and requested saturation + * mode. + * + * \details Converts input \p x to \p fp8 type of the kind specified by + * \p fp8_interpretation parameter, + * using round-to-nearest-even rounding and + * saturation mode specified by \p saturate parameter. + * + * \returns + * - The \p __nv_fp8_storage_t value holds the result of conversion. + */ +__CUDA_HOSTDEVICE_FP8_DECL__ __nv_fp8_storage_t +__nv_cvt_float_to_fp8(const float x, const __nv_saturation_t saturate, + const __nv_fp8_interpretation_t fp8_interpretation); +__CUDA_HOSTDEVICE_FP8_DECL__ __nv_fp8x2_storage_t +__nv_cvt_float2_to_fp8x2(const float2 x, const __nv_saturation_t saturate, + const __nv_fp8_interpretation_t fp8_interpretation); + +/** + * \ingroup CUDA_MATH_FP8_MISC + * \brief Converts input \p half precision \p x to \p fp8 type of the requested + * kind using round-to-nearest-even rounding and requested saturation mode. + * + * \details Converts input \p x to \p fp8 type of the kind specified by + * \p fp8_interpretation parameter, + * using round-to-nearest-even rounding and + * saturation mode specified by \p saturate parameter. + * + * \returns + * - The \p __nv_fp8_storage_t value holds the result of conversion. + */ +__CUDA_HOSTDEVICE_FP8_DECL__ __nv_fp8_storage_t +__nv_cvt_halfraw_to_fp8(const __half_raw x, const __nv_saturation_t saturate, + const __nv_fp8_interpretation_t fp8_interpretation); +__CUDA_HOSTDEVICE_FP8_DECL__ __nv_fp8x2_storage_t __nv_cvt_halfraw2_to_fp8x2( + const __half2_raw x, const __nv_saturation_t saturate, + const __nv_fp8_interpretation_t fp8_interpretation); + +/** + * \ingroup CUDA_MATH_FP8_MISC + * \brief Converts input \p nv_bfloat16 precision \p x to \p fp8 type of the + * requested kind using round-to-nearest-even rounding and requested saturation + * mode. + * + * \details Converts input \p x to \p fp8 type of the kind specified by + * \p fp8_interpretation parameter, + * using round-to-nearest-even rounding and + * saturation mode specified by \p saturate parameter. + * + * \returns + * - The \p __nv_fp8_storage_t value holds the result of conversion. + */ +__CUDA_HOSTDEVICE_FP8_DECL__ __nv_fp8_storage_t __nv_cvt_bfloat16raw_to_fp8( + const __nv_bfloat16_raw x, const __nv_saturation_t saturate, + const __nv_fp8_interpretation_t fp8_interpretation); +__CUDA_HOSTDEVICE_FP8_DECL__ __nv_fp8x2_storage_t +__nv_cvt_bfloat16raw2_to_fp8x2( + const __nv_bfloat162_raw x, const __nv_saturation_t saturate, + const __nv_fp8_interpretation_t fp8_interpretation); + +/** + * \ingroup CUDA_MATH_FP8_MISC + * \brief Converts input \p fp8 \p x of the specified kind + * to \p half precision + * + * \details Converts input \p x of \p fp8 type of the kind specified by + * \p fp8_interpretation parameter + * to \p half precision. + * + * \returns + * - The \p __half_raw value holds the result of conversion. + */ +__CUDA_HOSTDEVICE_FP8_DECL__ __half_raw +__nv_cvt_fp8_to_halfraw(const __nv_fp8_storage_t x, + const __nv_fp8_interpretation_t fp8_interpretation); +__CUDA_HOSTDEVICE_FP8_DECL__ __half2_raw +__nv_cvt_fp8x2_to_halfraw2(const __nv_fp8x2_storage_t x, + const __nv_fp8_interpretation_t fp8_interpretation); + +#if defined(__cplusplus) + +#define __CUDA_FP8_TYPES_EXIST__ + +/* Forward-declaration of structures defined in "cuda_fp8.hpp" */ + +/** + * \brief __nv_fp8_e5m2 datatype + * + * \details This structure implements the datatype for storing + * \p fp8 floating-point numbers of \p e5m2 kind: + * with 1 sign, 5 exponent, 1 implicit and 2 explicit mantissa bits. + * + * The structure implements converting constructors and operators. + */ +struct __nv_fp8_e5m2; + +/** + * \brief __nv_fp8x2_e5m2 datatype + * + * \details This structure implements the datatype for storage + * and operations on the vector of two \p fp8 values of \p e5m2 kind. + */ +struct __nv_fp8x2_e5m2; + +/** + * \brief __nv_fp8x4_e5m2 datatype + * + * \details This structure implements the datatype for storage + * and operations on the vector of four \p fp8 values of \p e5m2 kind. + */ +struct __nv_fp8x4_e5m2; + +/** + * \brief __nv_fp8_e4m3 datatype + * + * \details This structure implements the datatype for storing + * \p fp8 floating-point numbers of \p e4m3 kind: + * with 1 sign, 4 exponent, 1 implicit and 3 explicit mantissa bits. + * The encoding doesn't support Infinity. + * NaNs are limited to 0x7F and 0xFF values. + * + * The structure implements converting constructors and operators. + */ +struct __nv_fp8_e4m3; + +/** + * \brief __nv_fp8x2_e4m3 datatype + * + * \details This structure implements the datatype for storage + * and operations on the vector of two \p fp8 values of \p e4m3 kind. + */ +struct __nv_fp8x2_e4m3; + +/** + * \brief __nv_fp8x4_e4m3 datatype + * + * \details This structure implements the datatype for storage + * and operations on the vector of four \p fp8 values of \p e4m3 kind. + */ +struct __nv_fp8x4_e4m3; + +#endif /* defined(__cplusplus) */ + +#include "cuda_fp8.hpp" + +#undef __CUDA_FP8_DECL__ +#undef __CUDA_HOSTDEVICE_FP8__ +#undef __CUDA_HOSTDEVICE_FP8_DECL__ + +#if defined(__CPP_VERSION_AT_LEAST_11_FP8) +#undef __CPP_VERSION_AT_LEAST_11_FP8 +#endif /* defined(__CPP_VERSION_AT_LEAST_11_FP8) */ + +#endif /* end of include guard: __CUDA_FP8_H__ */ diff --git a/tests/unittests/fp8_gemm_test/2022_03_21__fp8_stride_batch_example/include/cuda_fp8.hpp b/tests/unittests/fp8_gemm_test/2022_03_21__fp8_stride_batch_example/include/cuda_fp8.hpp new file mode 100644 index 000000000..9cf3a3d91 --- /dev/null +++ b/tests/unittests/fp8_gemm_test/2022_03_21__fp8_stride_batch_example/include/cuda_fp8.hpp @@ -0,0 +1,877 @@ +/* + * Copyright 2022 NVIDIA Corporation. All rights reserved. + * + * NOTICE TO LICENSEE: + * + * This source code and/or documentation ("Licensed Deliverables") are + * subject to NVIDIA intellectual property rights under U.S. and + * international Copyright laws. + * + * These Licensed Deliverables contained herein is PROPRIETARY and + * CONFIDENTIAL to NVIDIA and is being provided under the terms and + * conditions of a form of NVIDIA software license agreement by and + * between NVIDIA and Licensee ("License Agreement") or electronically + * accepted by Licensee. Notwithstanding any terms or conditions to + * the contrary in the License Agreement, reproduction or disclosure + * of the Licensed Deliverables to any third party without the express + * written consent of NVIDIA is prohibited. + * + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, NVIDIA MAKES NO REPRESENTATION ABOUT THE + * SUITABILITY OF THESE LICENSED DELIVERABLES FOR ANY PURPOSE. IT IS + * PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. + * NVIDIA DISCLAIMS ALL WARRANTIES WITH REGARD TO THESE LICENSED + * DELIVERABLES, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, + * NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY + * SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, + * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS + * ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THESE LICENSED DELIVERABLES. + * + * U.S. Government End Users. These Licensed Deliverables are a + * "commercial item" as that term is defined at 48 C.F.R. 2.101 (OCT + * 1995), consisting of "commercial computer software" and "commercial + * computer software documentation" as such terms are used in 48 + * C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Government + * only as a commercial end item. Consistent with 48 C.F.R.12.212 and + * 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), all + * U.S. Government End Users acquire the Licensed Deliverables with + * only those rights set forth herein. + * + * Any use of the Licensed Deliverables in individual and commercial + * software must include, in the user documentation and internal + * comments to the code, the above Disclaimer and U.S. Government End + * Users Notice. + */ + +#if !defined(__CUDA_FP8_HPP__) +#define __CUDA_FP8_HPP__ + +#if !defined(__CUDA_FP8_H__) +#error "Do not include this file directly. Instead, include cuda_fp8.h." +#endif + +/* C++ header for std::memcpy (used for type punning in host-side + * implementations). When compiling as a CUDA source file memcpy is provided + * implicitly. !defined(__CUDACC__) implies !defined(__CUDACC_RTC__). + */ +#if defined(__cplusplus) && !defined(__CUDACC__) +#include +#elif !defined(__cplusplus) && !defined(__CUDACC__) +#include +#endif /* defined(__cplusplus) && !defined(__CUDACC__) */ + +/* Set up structure-alignment attribute */ +#if !(defined __CUDA_ALIGN__) +#if defined(__CUDACC__) +#define __CUDA_ALIGN__(align) __align__(align) +#else +/* Define alignment macro based on compiler type (cannot assume C11 "_Alignas" + * is available) */ +#if __cplusplus >= 201103L +#define __CUDA_ALIGN__(n) \ + alignas(n) /* C++11 kindly gives us a keyword for this */ +#else /* !defined(__CPP_VERSION_AT_LEAST_11_FP8)*/ +#if defined(__GNUC__) +#define __CUDA_ALIGN__(n) __attribute__((aligned(n))) +#elif defined(_MSC_VER) +#define __CUDA_ALIGN__(n) __declspec(align(n)) +#else +#define __CUDA_ALIGN__(n) +#endif /* defined(__GNUC__) */ +#endif /* defined(__CPP_VERSION_AT_LEAST_11_FP8) */ +#endif /* defined(__CUDACC__) */ +#endif /* !(defined __CUDA_ALIGN__) */ + +#if (defined __CPP_VERSION_AT_LEAST_11_FP8) +/* bring in enable_if */ +#include +#endif + +__CUDA_HOSTDEVICE_FP8_DECL__ __nv_fp8_storage_t +__nv_cvt_double_to_fp8(const double x, const __nv_saturation_t saturate, + const __nv_fp8_interpretation_t fp8_interpretation) { + uint8_t res; + uint64_t xbits; + +#if defined(__CUDACC__) || (!defined __cplusplus) + (void)memcpy(&xbits, &x, sizeof(x)); +#else + (void)std::memcpy(&xbits, &x, sizeof(x)); +#endif + uint8_t FP8_MAXNORM; + uint8_t FP8_MANTISSA_MASK; + uint16_t FP8_EXP_BIAS; + uint64_t FP8_SIGNIFICAND_BITS; + const uint64_t DP_INF_BITS = 0x7FF0000000000000ULL; + uint64_t FP8_MINDENORM_O2; + uint64_t FP8_OVERFLOW_THRESHOLD; + uint64_t FP8_MINNORM; + + if (fp8_interpretation == __NV_E4M3) { + FP8_EXP_BIAS = 7U; + FP8_SIGNIFICAND_BITS = 4ULL; + FP8_MANTISSA_MASK = 0x7U; + FP8_MINDENORM_O2 = 0x3F50000000000000ULL; // mindenorm/2 = 2^-10 + FP8_OVERFLOW_THRESHOLD = + 0x407D000000000000ULL; // maxnorm + 1/2ulp = 0x1.Cp+8 + 0x1p+4 + FP8_MAXNORM = 0x7EU; + FP8_MINNORM = 0x3F90000000000000ULL; // minnorm = 2^-6 + } else { //__NV_E5M2 + FP8_EXP_BIAS = 15U; + FP8_SIGNIFICAND_BITS = 3ULL; + FP8_MANTISSA_MASK = 0x3U; + FP8_MINDENORM_O2 = 0x3EE0000000000000ULL; // mindenorm/2 = 2^-17 + FP8_OVERFLOW_THRESHOLD = + 0x40EE000000000000ULL - + 1ULL; // maxnorm + 1/2ulp = 0x1.Ep+15, and -1 to have common code + FP8_MAXNORM = 0x7BU; + FP8_MINNORM = 0x3F10000000000000ULL; // minnorm = 2^-14 + } + + uint8_t sign = ((uint8_t)(xbits >> 63ULL)) << 7U; + uint64_t absx = xbits & 0x7FFFFFFFFFFFFFFFULL; + uint8_t exp = (uint8_t)((((uint16_t)(xbits >> 52ULL)) & 0x7FFU) - 1023U + + FP8_EXP_BIAS); + uint8_t mantissa = + (uint8_t)(xbits >> (53ULL - FP8_SIGNIFICAND_BITS)) & FP8_MANTISSA_MASK; + + if (absx <= FP8_MINDENORM_O2) { + // zero or underflow + res = 0U; + } else if (absx > DP_INF_BITS) { + // NaN + if (fp8_interpretation == __NV_E4M3) { + res = 0x7FU; + } else { + // NaN --> QNaN + res = 0x7EU | mantissa; + } + } else if (absx > FP8_OVERFLOW_THRESHOLD) { + if (saturate == __NV_SATFINITE) { + res = FP8_MAXNORM; + } else { + // __NV_NOSAT + if (fp8_interpretation == __NV_E4M3) { + // no Inf in E4M3 + res = 0x7FU; // NaN + } else { + res = 0x7CU; // Inf in E5M2 + } + } + } else if (absx >= FP8_MINNORM) { + res = (exp << (FP8_SIGNIFICAND_BITS - 1U)) | mantissa; + uint64_t round = + xbits & (((uint64_t)1ULL << (53ULL - FP8_SIGNIFICAND_BITS)) - 1ULL); + if ((round > + ((uint64_t)1ULL << (53ULL - FP8_SIGNIFICAND_BITS - 1ULL))) || + ((round == + ((uint64_t)1ULL << (53ULL - FP8_SIGNIFICAND_BITS - 1ULL))) && + (mantissa & 1U))) { + res += 1U; + } + if ((saturate == __NV_SATFINITE) && (res > FP8_MAXNORM)) { + res = FP8_MAXNORM; + } + } else // Denormal range + { + uint8_t shift = 1U - exp; + mantissa |= (uint8_t)(1U << (FP8_SIGNIFICAND_BITS - 1U)); + res = mantissa >> shift; + + uint64_t round = + (xbits | ((uint64_t)1ULL << (53ULL - 1ULL))) & + (((uint64_t)1ULL << (53ULL - FP8_SIGNIFICAND_BITS + shift)) - 1ULL); + if ((round > ((uint64_t)1ULL + << (53ULL - FP8_SIGNIFICAND_BITS - 1ULL + shift))) || + ((round == ((uint64_t)1ULL + << (53ULL - FP8_SIGNIFICAND_BITS - 1ULL + shift))) && + (res & 1U))) { + res += 1U; + } + } + + res |= sign; + + return (__nv_fp8_storage_t)res; +} + +__CUDA_HOSTDEVICE_FP8_DECL__ __nv_fp8x2_storage_t +__nv_cvt_double2_to_fp8x2(const double2 x, const __nv_saturation_t saturate, + const __nv_fp8_interpretation_t fp8_interpretation) { + __nv_fp8x2_storage_t storage = (__nv_fp8x2_storage_t)__nv_cvt_double_to_fp8( + x.y, saturate, fp8_interpretation); + storage <<= 8U; + storage |= __nv_cvt_double_to_fp8(x.x, saturate, fp8_interpretation); + return storage; +} + +__CUDA_HOSTDEVICE_FP8_DECL__ __nv_fp8_storage_t +__nv_cvt_float_to_fp8(const float x, const __nv_saturation_t saturate, + const __nv_fp8_interpretation_t fp8_interpretation) { + __nv_fp8_storage_t res = 0U; +#if (defined __CUDA_ARCH__) && (__CUDA_ARCH__ >= 900) + if (saturate == __NV_SATFINITE) { + __nv_fp8x2_storage_t storage; + if (fp8_interpretation == __NV_E5M2) { + asm("{cvt.rn.satfinite.e5m2x2.f32 %0, %2, %1;}\n" + : "=h"(storage) + : "f"(x), "f"(0.0f)); + } else { + asm("{cvt.rn.satfinite.e4m3x2.f32 %0, %2, %1;}\n" + : "=h"(storage) + : "f"(x), "f"(0.0f)); + } + res = (__nv_fp8_storage_t)storage; + } else +#endif + { + uint32_t xbits; +#if defined(__CUDACC__) || (!defined __cplusplus) + (void)memcpy(&xbits, &x, sizeof(x)); +#else + (void)std::memcpy(&xbits, &x, sizeof(x)); +#endif + + // isnan + if ((xbits & 0x7FFFFFFFU) > 0x7F800000U) { + // Canonical NaN + xbits = 0x7FFFFFFFU; + } + + float fx; +#if defined(__CUDACC__) || (!defined __cplusplus) + (void)memcpy(&fx, &xbits, sizeof(xbits)); +#else + (void)std::memcpy(&fx, &xbits, sizeof(xbits)); +#endif + + const double dx = (double)fx; + res = __nv_cvt_double_to_fp8(dx, saturate, fp8_interpretation); + } + return res; +} + +__CUDA_HOSTDEVICE_FP8_DECL__ __nv_fp8x2_storage_t +__nv_cvt_float2_to_fp8x2(const float2 x, const __nv_saturation_t saturate, + const __nv_fp8_interpretation_t fp8_interpretation) { + __nv_fp8x2_storage_t storage; +#if (defined __CUDA_ARCH__) && (__CUDA_ARCH__ >= 900) + if (saturate == __NV_SATFINITE) { + if (fp8_interpretation == __NV_E5M2) { + asm("{cvt.rn.satfinite.e5m2x2.f32 %0, %2, %1;}\n" + : "=h"(storage) + : "f"(x.x), "f"(x.y)); + } else { + asm("{cvt.rn.satfinite.e4m3x2.f32 %0, %2, %1;}\n" + : "=h"(storage) + : "f"(x.x), "f"(x.y)); + } + } else +#endif + { + storage = (__nv_fp8x2_storage_t)__nv_cvt_float_to_fp8( + x.y, saturate, fp8_interpretation); + storage <<= 8U; + storage |= __nv_cvt_float_to_fp8(x.x, saturate, fp8_interpretation); + } + return storage; +} + +__CUDA_HOSTDEVICE_FP8_DECL__ float +__internal_halfraw_to_float(const __half_raw x) { + float f; +#if (defined __CUDA_ARCH__) && (__CUDA_ARCH__ >= 530) + asm("{cvt.f32.f16 %0, %1;}\n" : "=f"(f) : "h"(x.x)); +#else + const uint32_t ux = (uint32_t)x.x; + uint32_t sign = (ux >> 15U) & 1U; + uint32_t exponent = (ux >> 10U) & 0x1fU; + uint32_t mantissa = (ux & 0x3ffU) << 13U; + if (exponent == 0x1fU) { /* NaN or Inf */ + /* discard sign of a NaN */ + sign = ((mantissa != 0U) ? (sign >> 1U) : sign); + mantissa = ((mantissa != 0U) ? 0x7fffffU : 0U); + exponent = 0xffU; + } else if (exponent == 0U) { /* Denorm or Zero */ + if (mantissa != 0U) { + uint32_t msb; + exponent = 0x71U; + do { + msb = (mantissa & 0x400000U); + mantissa <<= 1U; /* normalize */ + --exponent; + } while (msb == 0U); + mantissa &= 0x7fffffU; /* 1.mantissa is implicit */ + } + } else { + exponent += 0x70U; + } + const uint32_t u = ((sign << 31U) | (exponent << 23U) | mantissa); +#if defined(__CUDACC__) || (!defined __cplusplus) + (void)memcpy(&f, &u, sizeof(u)); +#else + (void)std::memcpy(&f, &u, sizeof(u)); +#endif +#endif /* (defined __CUDA_ARCH__) && (__CUDA_ARCH__ >= 530) */ + return f; +} + +__CUDA_HOSTDEVICE_FP8_DECL__ float2 +__internal_halfraw2_to_float2(const __half2_raw x) { + __half_raw raw; + float2 res; + raw.x = x.x; + res.x = __internal_halfraw_to_float(raw); + raw.x = x.y; + res.y = __internal_halfraw_to_float(raw); + return res; +} + +__CUDA_HOSTDEVICE_FP8_DECL__ __nv_fp8_storage_t +__nv_cvt_halfraw_to_fp8(const __half_raw x, const __nv_saturation_t saturate, + const __nv_fp8_interpretation_t fp8_interpretation) { + __nv_fp8_storage_t res = 0U; +#if (defined __CUDA_ARCH__) && (__CUDA_ARCH__ >= 900) + if (saturate == __NV_SATFINITE) { + uint32_t half2_storage = (uint32_t)(x.x); + __nv_fp8x2_storage_t tmp; + if (fp8_interpretation == __NV_E5M2) { + asm("{cvt.rn.satfinite.e5m2x2.f16x2 %0, %1;}\n" + : "=h"(tmp) + : "r"(half2_storage)); + } else { + asm("{cvt.rn.satfinite.e4m3x2.f16x2 %0, %1;}\n" + : "=h"(tmp) + : "r"(half2_storage)); + } + res = (__nv_fp8_storage_t)tmp; + } else +#endif + { + float fx = __internal_halfraw_to_float(x); + res = __nv_cvt_float_to_fp8(fx, saturate, fp8_interpretation); + } + return res; +} + +__CUDA_HOSTDEVICE_FP8_DECL__ __nv_fp8x2_storage_t __nv_cvt_halfraw2_to_fp8x2( + const __half2_raw x, const __nv_saturation_t saturate, + const __nv_fp8_interpretation_t fp8_interpretation) { + __nv_fp8x2_storage_t tmp; +#if (defined __CUDA_ARCH__) && (__CUDA_ARCH__ >= 900) + if (saturate == __NV_SATFINITE) { + uint32_t half2_storage; + (void)memcpy(&half2_storage, &x, sizeof(x)); + + if (fp8_interpretation == __NV_E5M2) { + asm("{cvt.rn.satfinite.e5m2x2.f16x2 %0, %1;}\n" + : "=h"(tmp) + : "r"(half2_storage)); + } else { + asm("{cvt.rn.satfinite.e4m3x2.f16x2 %0, %1;}\n" + : "=h"(tmp) + : "r"(half2_storage)); + } + } else +#endif + { + __half_raw raw; + raw.x = x.x; + __nv_fp8_storage_t lo = + __nv_cvt_halfraw_to_fp8(raw, saturate, fp8_interpretation); + raw.x = x.y; + __nv_fp8_storage_t hi = + __nv_cvt_halfraw_to_fp8(raw, saturate, fp8_interpretation); + tmp = hi; + tmp <<= 8U; + tmp |= lo; + } + return tmp; +} + +__CUDA_HOSTDEVICE_FP8_DECL__ float +__internal_bf16raw_to_float(const __nv_bfloat16_raw x) { + const uint32_t ux = ((uint32_t)x.x) << 16U; + float fx; +#if defined(__CUDACC__) || (!defined __cplusplus) + (void)memcpy(&fx, &ux, sizeof(ux)); +#else + (void)std::memcpy(&fx, &ux, sizeof(ux)); +#endif + return fx; +} + +__CUDA_HOSTDEVICE_FP8_DECL__ __nv_fp8_storage_t __nv_cvt_bfloat16raw_to_fp8( + const __nv_bfloat16_raw x, const __nv_saturation_t saturate, + const __nv_fp8_interpretation_t fp8_interpretation) { + const float fx = __internal_bf16raw_to_float(x); + const __nv_fp8_storage_t res = + __nv_cvt_float_to_fp8(fx, saturate, fp8_interpretation); + return res; +} + +__CUDA_HOSTDEVICE_FP8_DECL__ __nv_fp8x2_storage_t +__nv_cvt_bfloat16raw2_to_fp8x2( + const __nv_bfloat162_raw x, const __nv_saturation_t saturate, + const __nv_fp8_interpretation_t fp8_interpretation) { + __nv_bfloat16_raw raw; + raw.x = x.y; + __nv_fp8x2_storage_t storage = + (__nv_fp8x2_storage_t)__nv_cvt_bfloat16raw_to_fp8(raw, saturate, + fp8_interpretation); + storage <<= 8U; + raw.x = x.x; + storage |= __nv_cvt_bfloat16raw_to_fp8(raw, saturate, fp8_interpretation); + return storage; +} + +__CUDA_HOSTDEVICE_FP8_DECL__ __half2_raw +__nv_cvt_fp8x2_to_halfraw2(const __nv_fp8x2_storage_t x, + const __nv_fp8_interpretation_t fp8_interpretation); +__CUDA_HOSTDEVICE_FP8_DECL__ __half_raw +__nv_cvt_fp8_to_halfraw(const __nv_fp8_storage_t x, + const __nv_fp8_interpretation_t fp8_interpretation) { + __half_raw res; + res.x = 0U; +#if (defined __CUDA_ARCH__) && (__CUDA_ARCH__ >= 900) + res.x = + __nv_cvt_fp8x2_to_halfraw2((__nv_fp8x2_storage_t)x, fp8_interpretation) + .x; +#else + uint16_t ur = (uint16_t)x; + ur <<= 8U; + + if (fp8_interpretation == __NV_E5M2) { + if ((ur & 0x7FFFU) > 0x7C00U) { + /* If NaN, return canonical NaN */ + ur = 0x7FFFU; + } + } else { // __NV_E4M3 + uint16_t sign = ur & 0x8000U; + uint16_t exponent = ((ur & 0x7800U) >> 1U) + 0x2000U; + uint16_t mantissa = (ur & 0x0700U) >> 1U; + uint8_t absx = 0x7FU & (uint8_t)x; + + if (absx == 0x7FU) // NaN + { + ur = 0x7FFFU; // fp16 canonical NaN, discard sign + } else if (exponent == 0x2000U) { + // zero or denormal + if (mantissa != 0U) { + // normalize + mantissa <<= 1U; + while ((mantissa & 0x0400U) == 0U) { + mantissa <<= 1U; + exponent -= 0x0400U; + } + // discard implicit leading bit + mantissa &= 0x03FFU; + } else { // Zero + exponent = 0U; + } + + ur = (sign | exponent) | mantissa; + } else { + ur = (sign | exponent) | mantissa; + } + } + res.x = ur; +#endif + return res; +} + +__CUDA_HOSTDEVICE_FP8_DECL__ __half2_raw +__nv_cvt_fp8x2_to_halfraw2(const __nv_fp8x2_storage_t x, + const __nv_fp8_interpretation_t fp8_interpretation) { + __half2_raw res; +#if (defined __CUDA_ARCH__) && (__CUDA_ARCH__ >= 900) + uint32_t half2_storage; + if (fp8_interpretation == __NV_E5M2) { + asm("{cvt.rn.f16x2.e5m2x2 %0, %1;}\n" : "=r"(half2_storage) : "h"(x)); + } else { + asm("{cvt.rn.f16x2.e4m3x2 %0, %1;}\n" : "=r"(half2_storage) : "h"(x)); + } + (void)memcpy(&res, &half2_storage, sizeof(half2_storage)); +#else + res.x = + __nv_cvt_fp8_to_halfraw((__nv_fp8_storage_t)x, fp8_interpretation).x; + res.y = __nv_cvt_fp8_to_halfraw((__nv_fp8_storage_t)(x >> 8U), + fp8_interpretation) + .x; +#endif + return res; +} + +/* All other definitions in this file are only visible to C++ compilers */ +#if defined(__cplusplus) + +struct __CUDA_ALIGN__(1) __nv_fp8_e5m2 { + public: + __nv_fp8_storage_t __x; + +#if defined(__CPP_VERSION_AT_LEAST_11_FP8) + __nv_fp8_e5m2() = default; +#else + __CUDA_HOSTDEVICE_FP8__ __nv_fp8_e5m2() {} +#endif /* defined(__CPP_VERSION_AT_LEAST_11_FP8) */ + +#if !defined(__CUDA_NO_FP8_CONVERSIONS__) + + /* Construct from wider FP types */ + /* Note we do avoid constructor init-list because of special host/device + * compilation rules */ + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8_e5m2(const __half f) { + __x = __nv_cvt_halfraw_to_fp8(static_cast<__half_raw>(f), + __NV_SATFINITE, __NV_E5M2); + } + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8_e5m2(const __nv_bfloat16 f) { + __x = __nv_cvt_bfloat16raw_to_fp8(static_cast<__nv_bfloat16_raw>(f), + __NV_SATFINITE, __NV_E5M2); + } + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8_e5m2(const float f) { + __x = __nv_cvt_float_to_fp8(f, __NV_SATFINITE, __NV_E5M2); + } + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8_e5m2(const double f) { + __x = __nv_cvt_double_to_fp8(f, __NV_SATFINITE, __NV_E5M2); + } + +#if (defined __CPP_VERSION_AT_LEAST_11_FP8) + /* Converts from integral */ + template ::value && + !std::is_same::value, + Integral>::type * = nullptr> + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8_e5m2(const Integral val) { + __x = static_cast<__nv_fp8_e5m2>(static_cast(val)).__x; + } +#endif /* (defined __CPP_VERSION_AT_LEAST_11_FP8) */ + + /* Widening FP converts */ + explicit __CUDA_HOSTDEVICE_FP8__ operator __half() const { + return static_cast<__half>(__nv_cvt_fp8_to_halfraw(__x, __NV_E5M2)); + } + explicit __CUDA_HOSTDEVICE_FP8__ operator float() const { + return __internal_halfraw_to_float( + __nv_cvt_fp8_to_halfraw(__x, __NV_E5M2)); + } + explicit __CUDA_HOSTDEVICE_FP8__ operator __nv_bfloat16() const { + return static_cast<__nv_bfloat16>(float(*this)); + } + explicit __CUDA_HOSTDEVICE_FP8__ operator double() const { + return static_cast(float(*this)); + } + +#if (defined __CPP_VERSION_AT_LEAST_11_FP8) + /* Convert to integral */ + template ::value && + !std::is_same::value, + Integral>::type * = nullptr> + explicit __CUDA_HOSTDEVICE_FP8__ operator Integral() const { + return static_cast(__half(*this)); + } +#endif /* (defined __CPP_VERSION_AT_LEAST_11_FP8) */ + + /* Convert to Boolean - note both 0 and -0 must return false */ + explicit __CUDA_HOSTDEVICE_FP8__ operator bool() const { + return (__x & 0x7FU) != 0U; + } +#endif /* !defined(__CUDA_NO_FP8_CONVERSIONS__) */ +}; + +struct __CUDA_ALIGN__(2) __nv_fp8x2_e5m2 { + public: + __nv_fp8x2_storage_t __x; + +#if defined(__CPP_VERSION_AT_LEAST_11_FP8) + __nv_fp8x2_e5m2() = default; +#else + __CUDA_HOSTDEVICE_FP8__ __nv_fp8x2_e5m2() {} +#endif /* defined(__CPP_VERSION_AT_LEAST_11_FP8) */ + +#if !defined(__CUDA_NO_FP8_CONVERSIONS__) + + /* Construct from wider types */ + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8x2_e5m2(const __half2 f) { + __x = __nv_cvt_halfraw2_to_fp8x2(static_cast<__half2_raw>(f), + __NV_SATFINITE, __NV_E5M2); + } + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8x2_e5m2(const __nv_bfloat162 f) { + __x = __nv_cvt_bfloat16raw2_to_fp8x2(static_cast<__nv_bfloat162_raw>(f), + __NV_SATFINITE, __NV_E5M2); + } + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8x2_e5m2(const float2 f) { + __x = __nv_cvt_float2_to_fp8x2(f, __NV_SATFINITE, __NV_E5M2); + } + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8x2_e5m2(const double2 f) { + __x = __nv_cvt_double2_to_fp8x2(f, __NV_SATFINITE, __NV_E5M2); + } + + /* Widening converts */ + explicit __CUDA_HOSTDEVICE_FP8__ operator __half2() const { + return static_cast<__half2>(__nv_cvt_fp8x2_to_halfraw2(__x, __NV_E5M2)); + } + explicit __CUDA_HOSTDEVICE_FP8__ operator float2() const { + return __internal_halfraw2_to_float2( + __nv_cvt_fp8x2_to_halfraw2(__x, __NV_E5M2)); + } +#endif /* !defined(__CUDA_NO_FP8_CONVERSIONS__) */ +}; + +__CUDA_HOSTDEVICE_FP8_DECL__ uint32_t +__internal_pack_u16x2_to_u32(const uint16_t src_lo, const uint16_t src_hi) { + uint32_t dst; +#if (defined __CUDACC__) && (defined __CUDA_ARCH__) + asm("{ mov.b32 %0, {%1,%2};}\n" : "=r"(dst) : "h"(src_lo), "h"(src_hi)); +#else + dst = + (static_cast(src_hi) << 16U) | static_cast(src_lo); +#endif + return dst; +} + +struct __CUDA_ALIGN__(4) __nv_fp8x4_e5m2 { + public: + __nv_fp8x4_storage_t __x; + +#if defined(__CPP_VERSION_AT_LEAST_11_FP8) + __nv_fp8x4_e5m2() = default; +#else + __CUDA_HOSTDEVICE_FP8__ __nv_fp8x4_e5m2() {} +#endif /* defined(__CPP_VERSION_AT_LEAST_11_FP8) */ + +#if !defined(__CUDA_NO_FP8_CONVERSIONS__) + + /* Construct from wider types */ + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8x4_e5m2(const __half2 flo, + const __half2 fhi) { + const __nv_fp8x2_storage_t rlo = __nv_cvt_halfraw2_to_fp8x2( + static_cast<__half2_raw>(flo), __NV_SATFINITE, __NV_E5M2); + const __nv_fp8x2_storage_t rhi = __nv_cvt_halfraw2_to_fp8x2( + static_cast<__half2_raw>(fhi), __NV_SATFINITE, __NV_E5M2); + __x = __internal_pack_u16x2_to_u32(rlo, rhi); + } + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8x4_e5m2(const __nv_bfloat162 flo, + const __nv_bfloat162 fhi) { + const __nv_fp8x2_storage_t rlo = __nv_cvt_bfloat16raw2_to_fp8x2( + static_cast<__nv_bfloat162_raw>(flo), __NV_SATFINITE, __NV_E5M2); + const __nv_fp8x2_storage_t rhi = __nv_cvt_bfloat16raw2_to_fp8x2( + static_cast<__nv_bfloat162_raw>(fhi), __NV_SATFINITE, __NV_E5M2); + __x = __internal_pack_u16x2_to_u32(rlo, rhi); + } + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8x4_e5m2(const float4 f) { + const float2 flo = {f.x, f.y}; + const float2 fhi = {f.z, f.w}; + const __nv_fp8x2_storage_t rlo = + __nv_cvt_float2_to_fp8x2(flo, __NV_SATFINITE, __NV_E5M2); + const __nv_fp8x2_storage_t rhi = + __nv_cvt_float2_to_fp8x2(fhi, __NV_SATFINITE, __NV_E5M2); + __x = __internal_pack_u16x2_to_u32(rlo, rhi); + } + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8x4_e5m2(const double4 f) { + const double2 flo = {f.x, f.y}; + const double2 fhi = {f.z, f.w}; + const __nv_fp8x2_storage_t rlo = + __nv_cvt_double2_to_fp8x2(flo, __NV_SATFINITE, __NV_E5M2); + const __nv_fp8x2_storage_t rhi = + __nv_cvt_double2_to_fp8x2(fhi, __NV_SATFINITE, __NV_E5M2); + __x = __internal_pack_u16x2_to_u32(rlo, rhi); + } + + /* Widening converts */ + explicit __CUDA_HOSTDEVICE_FP8__ operator float4() const { + const __nv_fp8x2_storage_t slo = static_cast<__nv_fp8x2_storage_t>(__x); + const __nv_fp8x2_storage_t shi = + static_cast<__nv_fp8x2_storage_t>(__x >> 16U); + float2 rlo = __internal_halfraw2_to_float2( + __nv_cvt_fp8x2_to_halfraw2(slo, __NV_E5M2)); + float2 rhi = __internal_halfraw2_to_float2( + __nv_cvt_fp8x2_to_halfraw2(shi, __NV_E5M2)); + float4 res = {rlo.x, rlo.y, rhi.x, rhi.y}; + return res; + } +#endif /* !defined(__CUDA_NO_FP8_CONVERSIONS__) */ +}; + +struct __CUDA_ALIGN__(1) __nv_fp8_e4m3 { + public: + __nv_fp8_storage_t __x; +#if defined(__CPP_VERSION_AT_LEAST_11_FP8) + __nv_fp8_e4m3() = default; +#else + __CUDA_HOSTDEVICE_FP8__ __nv_fp8_e4m3() {} +#endif /* defined(__CPP_VERSION_AT_LEAST_11_FP8) */ + +#if !defined(__CUDA_NO_FP8_CONVERSIONS__) + + /* Construct from wider FP types */ + /* Note we do avoid constructor init-list because of special host/device + * compilation rules */ + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8_e4m3(const __half f) { + __x = __nv_cvt_halfraw_to_fp8(static_cast<__half_raw>(f), + __NV_SATFINITE, __NV_E4M3); + } + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8_e4m3(const __nv_bfloat16 f) { + __x = __nv_cvt_bfloat16raw_to_fp8(static_cast<__nv_bfloat16_raw>(f), + __NV_SATFINITE, __NV_E4M3); + } + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8_e4m3(const float f) { + __x = __nv_cvt_float_to_fp8(f, __NV_SATFINITE, __NV_E4M3); + } + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8_e4m3(const double f) { + __x = __nv_cvt_double_to_fp8(f, __NV_SATFINITE, __NV_E4M3); + } + +#if (defined __CPP_VERSION_AT_LEAST_11_FP8) + /* Converts from integral */ + template ::value && + !std::is_same::value, + Integral>::type * = nullptr> + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8_e4m3(const Integral val) { + __x = static_cast<__nv_fp8_e4m3>(static_cast(val)).__x; + } +#endif /* (defined __CPP_VERSION_AT_LEAST_11_FP8) */ + + /* Widening FP converts */ + explicit __CUDA_HOSTDEVICE_FP8__ operator __half() const { + return static_cast<__half>(__nv_cvt_fp8_to_halfraw(__x, __NV_E4M3)); + } + explicit __CUDA_HOSTDEVICE_FP8__ operator float() const { + return __internal_halfraw_to_float( + __nv_cvt_fp8_to_halfraw(__x, __NV_E4M3)); + } + explicit __CUDA_HOSTDEVICE_FP8__ operator __nv_bfloat16() const { + return static_cast<__nv_bfloat16>(float(*this)); + } + explicit __CUDA_HOSTDEVICE_FP8__ operator double() const { + return static_cast(float(*this)); + } + +#if (defined __CPP_VERSION_AT_LEAST_11_FP8) + /* Convert to integral */ + template ::value && + !std::is_same::value, + Integral>::type * = nullptr> + explicit __CUDA_HOSTDEVICE_FP8__ operator Integral() const { + return static_cast(__half(*this)); + } +#endif /* (defined __CPP_VERSION_AT_LEAST_11_FP8) */ + + /* Convert to Boolean - note both 0 and -0 must return false */ + explicit __CUDA_HOSTDEVICE_FP8__ operator bool() const { + return (__x & 0x7FU) != 0U; + } +#endif /* !defined(__CUDA_NO_FP8_CONVERSIONS__) */ +}; + +struct __CUDA_ALIGN__(2) __nv_fp8x2_e4m3 { + public: + __nv_fp8x2_storage_t __x; + +#if defined(__CPP_VERSION_AT_LEAST_11_FP8) + __nv_fp8x2_e4m3() = default; +#else + __CUDA_HOSTDEVICE_FP8__ __nv_fp8x2_e4m3() {} +#endif /* defined(__CPP_VERSION_AT_LEAST_11_FP8) */ + +#if !defined(__CUDA_NO_FP8_CONVERSIONS__) + + /* Construct from wider types */ + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8x2_e4m3(const __half2 f) { + __x = __nv_cvt_halfraw2_to_fp8x2(static_cast<__half2_raw>(f), + __NV_SATFINITE, __NV_E4M3); + } + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8x2_e4m3(const __nv_bfloat162 f) { + __x = __nv_cvt_bfloat16raw2_to_fp8x2(static_cast<__nv_bfloat162_raw>(f), + __NV_SATFINITE, __NV_E4M3); + } + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8x2_e4m3(const float2 f) { + __x = __nv_cvt_float2_to_fp8x2(f, __NV_SATFINITE, __NV_E4M3); + } + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8x2_e4m3(const double2 f) { + __x = __nv_cvt_double2_to_fp8x2(f, __NV_SATFINITE, __NV_E4M3); + } + + /* Widening converts */ + explicit __CUDA_HOSTDEVICE_FP8__ operator __half2() const { + return static_cast<__half2>(__nv_cvt_fp8x2_to_halfraw2(__x, __NV_E4M3)); + } + explicit __CUDA_HOSTDEVICE_FP8__ operator float2() const { + return __internal_halfraw2_to_float2( + __nv_cvt_fp8x2_to_halfraw2(__x, __NV_E4M3)); + } +#endif /* !defined(__CUDA_NO_FP8_CONVERSIONS__) */ +}; + +struct __CUDA_ALIGN__(4) __nv_fp8x4_e4m3 { + public: + __nv_fp8x4_storage_t __x; + +#if defined(__CPP_VERSION_AT_LEAST_11_FP8) + __nv_fp8x4_e4m3() = default; +#else + __CUDA_HOSTDEVICE_FP8__ __nv_fp8x4_e4m3() {} +#endif /* defined(__CPP_VERSION_AT_LEAST_11_FP8) */ + +#if !defined(__CUDA_NO_FP8_CONVERSIONS__) + + /* Construct from wider types */ + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8x4_e4m3(const __half2 flo, + const __half2 fhi) { + const __nv_fp8x2_storage_t rlo = __nv_cvt_halfraw2_to_fp8x2( + static_cast<__half2_raw>(flo), __NV_SATFINITE, __NV_E4M3); + const __nv_fp8x2_storage_t rhi = __nv_cvt_halfraw2_to_fp8x2( + static_cast<__half2_raw>(fhi), __NV_SATFINITE, __NV_E4M3); + __x = __internal_pack_u16x2_to_u32(rlo, rhi); + } + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8x4_e4m3(const __nv_bfloat162 flo, + const __nv_bfloat162 fhi) { + const __nv_fp8x2_storage_t rlo = __nv_cvt_bfloat16raw2_to_fp8x2( + static_cast<__nv_bfloat162_raw>(flo), __NV_SATFINITE, __NV_E4M3); + const __nv_fp8x2_storage_t rhi = __nv_cvt_bfloat16raw2_to_fp8x2( + static_cast<__nv_bfloat162_raw>(fhi), __NV_SATFINITE, __NV_E4M3); + __x = __internal_pack_u16x2_to_u32(rlo, rhi); + } + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8x4_e4m3(const float4 f) { + const float2 flo = {f.x, f.y}; + const float2 fhi = {f.z, f.w}; + const __nv_fp8x2_storage_t rlo = + __nv_cvt_float2_to_fp8x2(flo, __NV_SATFINITE, __NV_E4M3); + const __nv_fp8x2_storage_t rhi = + __nv_cvt_float2_to_fp8x2(fhi, __NV_SATFINITE, __NV_E4M3); + __x = __internal_pack_u16x2_to_u32(rlo, rhi); + } + explicit __CUDA_HOSTDEVICE_FP8__ __nv_fp8x4_e4m3(const double4 f) { + const double2 flo = {f.x, f.y}; + const double2 fhi = {f.z, f.w}; + const __nv_fp8x2_storage_t rlo = + __nv_cvt_double2_to_fp8x2(flo, __NV_SATFINITE, __NV_E4M3); + const __nv_fp8x2_storage_t rhi = + __nv_cvt_double2_to_fp8x2(fhi, __NV_SATFINITE, __NV_E4M3); + __x = __internal_pack_u16x2_to_u32(rlo, rhi); + } + + /* Widening converts */ + explicit __CUDA_HOSTDEVICE_FP8__ operator float4() const { + const __nv_fp8x2_storage_t slo = static_cast<__nv_fp8x2_storage_t>(__x); + const __nv_fp8x2_storage_t shi = + static_cast<__nv_fp8x2_storage_t>(__x >> 16U); + float2 rlo = __internal_halfraw2_to_float2( + __nv_cvt_fp8x2_to_halfraw2(slo, __NV_E4M3)); + float2 rhi = __internal_halfraw2_to_float2( + __nv_cvt_fp8x2_to_halfraw2(shi, __NV_E4M3)); + float4 res = {rlo.x, rlo.y, rhi.x, rhi.y}; + return res; + } +#endif /* !defined(__CUDA_NO_FP8_CONVERSIONS__) */ +}; + +#endif /* defined(__cplusplus) */ + +#endif /* end of include guard: __CUDA_FP8_HPP__ */ diff --git a/tests/unittests/fp8_gemm_test/2022_03_21__fp8_stride_batch_example/main.cpp b/tests/unittests/fp8_gemm_test/2022_03_21__fp8_stride_batch_example/main.cpp new file mode 100644 index 000000000..804debc29 --- /dev/null +++ b/tests/unittests/fp8_gemm_test/2022_03_21__fp8_stride_batch_example/main.cpp @@ -0,0 +1,34 @@ +#include "worker.hpp" +#include +#include +#include + +//===================================================================================================================== + +int main() { + const int32_t m = 64; + const int32_t n = 63; + const int32_t k = 64; + const int32_t batch = 2; + const bool tA = true; + const bool tB = false; + const bool isStridedBatch = true; + const float aScale = 1.0f; + const float bScale = 1.0f; + const float cScale = 1.0f; + const float dScale = 1.0f; + const float epilogueAuxScale = 1.0f; + const bool initExtraPtrs = true; + + const bool useHeuristics = false; + + const auto result = cublasTester<__nv_fp8_e4m3, __nv_fp8_e4m3, __nv_bfloat16, __nv_bfloat16, float> + ({m, n, k, tA, tB, batch, isStridedBatch, aScale, bScale, cScale, dScale, epilogueAuxScale, initExtraPtrs, useHeuristics}); + + if (result != 0) { + std::cout << "In the end, something went wrong!" << std::endl; + } + else { + std::cout << "Everything is ok" << std::endl; + } +} diff --git a/tests/unittests/fp8_gemm_test/2022_03_21__fp8_stride_batch_example/worker.cpp b/tests/unittests/fp8_gemm_test/2022_03_21__fp8_stride_batch_example/worker.cpp new file mode 100644 index 000000000..f07b84de1 --- /dev/null +++ b/tests/unittests/fp8_gemm_test/2022_03_21__fp8_stride_batch_example/worker.cpp @@ -0,0 +1,36 @@ +#include "worker.hpp" + +#include +#include + +//------------------------------------------------ + +void checkCublasStatus(cublasStatus_t status) { + if (status != CUBLAS_STATUS_SUCCESS) { + printf("cuBLAS API failed with status %d\n", status); + throw std::logic_error("cuBLAS API failed"); + } +} + +void checkCudaStatus(cudaError_t status) { + if (status != cudaSuccess) { + printf("CUDA API failed with status %d\n", status); + throw std::logic_error("CUDA API failed"); + } +} + +//------------------------------------------------ + +void freeResources(void** a, void** b, void** c, void** d, void** ws) { + auto cleaner = [](void** ptr) { + if (*ptr != nullptr) { + cudaFree(*ptr); + *ptr = nullptr; + } + }; + cleaner(a); + cleaner(b); + cleaner(c); + cleaner(d); + cleaner(ws); +} diff --git a/tests/unittests/fp8_gemm_test/2022_03_21__fp8_stride_batch_example/worker.hpp b/tests/unittests/fp8_gemm_test/2022_03_21__fp8_stride_batch_example/worker.hpp new file mode 100644 index 000000000..fa644e5e5 --- /dev/null +++ b/tests/unittests/fp8_gemm_test/2022_03_21__fp8_stride_batch_example/worker.hpp @@ -0,0 +1,355 @@ +#ifndef _WORKER_HPP +#define _WORKER_HPP + +#include +#include + +#include +#include +#include +#include +#include + +#include +#include + +//-------------------------------------------------------------------------------------------------- + +struct ProblemDesc { + size_t m; + size_t n; + size_t k; + int32_t tA; + int32_t tB; + int32_t batch; + bool isStridedBatch; + float aScale; + float bScale; + float cScale; + float dScale; + float epilogueAuxScale; + bool initExtraPtrs; + bool useHeuristics; +}; + +//-------------------------------------------------------------------------------------------------- + +template +bool fillTensorWithValue(void* devPtr, const size_t sizeBytes, const T value) { + std::vector hData(sizeBytes / sizeof(T), value); + const auto status = cudaMemcpy(static_cast(devPtr), hData.data(), hData.size() * sizeof(T), cudaMemcpyHostToDevice); + if (status != cudaSuccess) { + return false; + } + return true; +}; + +template +void printDevBuffer(void* devPtr, const size_t sizeBytes, const size_t row) { + std::vector hBuffer(sizeBytes / sizeof(T), static_cast(0.0)); + const auto status = cudaMemcpy(hBuffer.data(), devPtr, hBuffer.size() * sizeof(T), cudaMemcpyDeviceToHost); + if (status != cudaSuccess) { + std::cout << "Failed to copy dev buffer's content!" << std::endl; + return; + } + for (size_t i = 0; i < hBuffer.size(); i++) { + if (!(i % row)) { + std::cout << std::endl; + } + std::cout << (float)hBuffer[i] << " "; + } + std::cout << std::endl << std::endl; +} + +//-------------------------------------------------------------------------------------------------- + +template +void silence_unused(const T&) {} + +//-------------------------------------------------------------------------------------------------- + +void checkCublasStatus(cublasStatus_t status); +void checkCudaStatus(cudaError_t status); +void freeResources(void** a, void** b, void** c, void** d, void** ws); + +//-------------------------------------------------------------------------------------------------- + +struct Timer { + Timer(const char* _msg) : msg(_msg) { _start = getTick(); } + ~Timer() { + const auto duration = getTick() - _start; + printf("^^^^^^^^ [Timer] %s: %lu\n", msg, duration); + } + + private: + uint64_t getTick() { + uint64_t low, high; + __asm__ volatile("rdtsc" : "=a"(low), "=d"(high)); + return (high << 32) | low; + } + uint64_t _start = 0; + const char* msg; +}; + +//-------------------------------------------------------------------------------------------------- + +template +struct TypeTrait; + +template<> +struct TypeTrait<__nv_fp8_e4m3>{ + static constexpr cudaDataType_t cudaType = CUDA_R_8F_E4M3; + static constexpr cublasComputeType_t compType = CUBLAS_COMPUTE_32F; +}; +template<> +struct TypeTrait<__nv_fp8_e5m2>{ + static constexpr cudaDataType_t cudaType = CUDA_R_8F_E5M2; + static constexpr cublasComputeType_t compType = CUBLAS_COMPUTE_32F; +}; +template<> +struct TypeTrait<__nv_bfloat16>{ + static constexpr cudaDataType_t cudaType = CUDA_R_16BF; + static constexpr cublasComputeType_t compType = CUBLAS_COMPUTE_32F; +}; +template<> +struct TypeTrait{ + static constexpr cudaDataType_t cudaType = CUDA_R_32F; + static constexpr cublasComputeType_t compType = CUBLAS_COMPUTE_32F; +}; + +//-------------------------------------------------------------------------------------------------- + +template +int32_t cublasTester(const ProblemDesc& p) { + const size_t aSizeBytes = p.batch * p.m * p.k * sizeof(aType); + const size_t bSizeBytes = p.batch * p.k * p.n * sizeof(bType); + const size_t cSizeBytes = p.batch * p.m * p.n * sizeof(cType); + const size_t dSizeBytes = p.batch * p.m * p.n * sizeof(dType); + const size_t wsSizeBytes = 128 * 1024 * 1024; + + void* devAPtr = nullptr; + void* devBPtr = nullptr; + void* devCPtr = nullptr; + void* devDPtr = nullptr; + void* devWsPtr = nullptr; + checkCudaStatus(cudaMalloc(&devAPtr, aSizeBytes)); + checkCudaStatus(cudaMalloc(&devBPtr, bSizeBytes)); + checkCudaStatus(cudaMalloc(&devCPtr, cSizeBytes)); + checkCudaStatus(cudaMalloc(&devDPtr, dSizeBytes)); + checkCudaStatus(cudaMalloc(&devWsPtr, wsSizeBytes)); + + void* devAscalePtr = nullptr; + void* devBscalePtr = nullptr; + void* devCscalePtr = nullptr; + void* devDscalePtr = nullptr; + void* devEpilogueAuxScalePtr = nullptr; + void* devAmaxdPtr = nullptr; + void* devAmaxEpilogueAuxPtr = nullptr; + + const auto aTypeLabel = TypeTrait::cudaType; + const auto bTypeLabel = TypeTrait::cudaType; + const auto cTypeLabel = TypeTrait::cudaType; + const auto dTypeLabel = TypeTrait::cudaType; + const auto computeTypeLabel = TypeTrait::compType; + const auto scaleTypeLabel = TypeTrait::cudaType; + const auto epilogueAuxTypeLabel = TypeTrait::cudaType; + + fillTensorWithValue(devAPtr, aSizeBytes, static_cast(1.0)); + fillTensorWithValue(devBPtr, bSizeBytes, static_cast(1.0)); + fillTensorWithValue(devCPtr, cSizeBytes, static_cast(1.0)); + fillTensorWithValue(devDPtr, dSizeBytes, static_cast(0.0)); + + //------- init, desc & tensors + cublasLtMatmulDesc_t matmulDesc; + cublasLtMatrixLayout_t Adesc; + cublasLtMatrixLayout_t Bdesc; + cublasLtMatrixLayout_t Cdesc; + cublasLtMatrixLayout_t Ddesc; + + if (p.initExtraPtrs) { + std::cout << "aScale factor is: " << p.aScale << std::endl; + std::cout << "bScale factor is: " << p.bScale << std::endl; + std::cout << "cScale factor is: " << p.cScale << std::endl; + std::cout << "dScale factor is: " << p.dScale << std::endl; + std::cout << "epilogueAuxScale factor is: " << p.epilogueAuxScale << std::endl << std::endl; + + checkCudaStatus(cudaMalloc(&devAscalePtr, sizeof(computeType))); + checkCudaStatus(cudaMemcpy(static_cast(devAscalePtr), &p.aScale, sizeof(p.aScale), cudaMemcpyHostToDevice)); + + checkCudaStatus(cudaMalloc(&devBscalePtr, sizeof(computeType))); + checkCudaStatus(cudaMemcpy(static_cast(devBscalePtr), &p.bScale, sizeof(p.bScale), cudaMemcpyHostToDevice)); + + checkCudaStatus(cudaMalloc(&devCscalePtr, sizeof(computeType))); + checkCudaStatus(cudaMemcpy(static_cast(devCscalePtr), &p.cScale, sizeof(p.cScale), cudaMemcpyHostToDevice)); + + checkCudaStatus(cudaMalloc(&devDscalePtr, sizeof(computeType))); + checkCudaStatus(cudaMemcpy(static_cast(devDscalePtr), &p.dScale, sizeof(p.dScale), cudaMemcpyHostToDevice)); + + checkCudaStatus( cudaMalloc(&devEpilogueAuxScalePtr, sizeof(computeType))); + checkCudaStatus(cudaMemcpy(static_cast(devEpilogueAuxScalePtr), &p.epilogueAuxScale, sizeof(p.epilogueAuxScale), cudaMemcpyHostToDevice)); + + const float amax = -99.0f; + checkCudaStatus(cudaMalloc(&devAmaxdPtr, sizeof(computeType))); + checkCudaStatus(cudaMemcpy(static_cast(devAmaxdPtr), &amax, sizeof(amax), cudaMemcpyHostToDevice)); + + checkCudaStatus( cudaMalloc(&devAmaxEpilogueAuxPtr, sizeof(computeType))); + checkCudaStatus(cudaMemcpy(static_cast(devAmaxEpilogueAuxPtr), &amax, sizeof(amax), cudaMemcpyHostToDevice)); + } + + { + checkCublasStatus(cublasLtMatmulDescCreate(&matmulDesc, computeTypeLabel, scaleTypeLabel)); + checkCublasStatus(cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_TRANSA, &p.tA, sizeof(p.tA))); + checkCublasStatus(cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_TRANSB, &p.tB, sizeof(p.tB))); + + checkCublasStatus(cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_A_SCALE_POINTER, &devAscalePtr, sizeof(devAscalePtr))); + checkCublasStatus(cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_B_SCALE_POINTER, &devBscalePtr, sizeof(devBscalePtr))); + checkCublasStatus(cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_C_SCALE_POINTER, &devCscalePtr, sizeof(devCscalePtr))); + checkCublasStatus(cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_D_SCALE_POINTER, &devDscalePtr, sizeof(devDscalePtr))); + checkCublasStatus(cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_AMAX_D_POINTER, &devAmaxdPtr, sizeof(devAmaxdPtr))); + + checkCublasStatus(cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_EPILOGUE_AUX_SCALE_POINTER, &devEpilogueAuxScalePtr, sizeof(devEpilogueAuxScalePtr))); + checkCublasStatus(cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_EPILOGUE_AUX_DATA_TYPE, &epilogueAuxTypeLabel, sizeof(epilogueAuxTypeLabel))); + checkCublasStatus(cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_EPILOGUE_AUX_AMAX_POINTER, &devAmaxEpilogueAuxPtr, sizeof(devAmaxEpilogueAuxPtr))); + } + + { + const int64_t lda = p.m; + const int64_t ldb = p.k; + const int64_t ldc = p.m; + const int64_t ldd = p.m; + const int64_t strideA = p.m * p.k; + const int64_t strideB = p.k * p.n; + const int64_t strideC = p.m * p.n; + const int64_t strideD = p.m * p.n; + + // create matrix descriptors, we are good with the details here so no need + // to set any extra attributes + checkCublasStatus(cublasLtMatrixLayoutCreate( + &Adesc, aTypeLabel, p.tA == CUBLAS_OP_N ? p.m : p.k, + p.tA == CUBLAS_OP_N ? p.k : p.m, lda)); + if (p.batch > 1) { + checkCublasStatus(cublasLtMatrixLayoutSetAttribute(Adesc, + CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &p.batch, sizeof(p.batch))); + checkCublasStatus(cublasLtMatrixLayoutSetAttribute(Adesc, + CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideA, sizeof(strideA))); + } + + checkCublasStatus(cublasLtMatrixLayoutCreate( + &Bdesc, bTypeLabel, p.tB == CUBLAS_OP_N ? p.k : p.n, + p.tB == CUBLAS_OP_N ? p.n : p.k, ldb)); + if (p.batch > 1) { + checkCublasStatus(cublasLtMatrixLayoutSetAttribute(Bdesc, + CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &p.batch, sizeof(p.batch))); + checkCublasStatus(cublasLtMatrixLayoutSetAttribute(Bdesc, + CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideB, sizeof(strideB))); + } + + checkCublasStatus(cublasLtMatrixLayoutCreate(&Cdesc, cTypeLabel, p.m, p.n, ldc)); + if (p.batch > 1) { + checkCublasStatus(cublasLtMatrixLayoutSetAttribute(Cdesc, + CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &p.batch, sizeof(p.batch))); + checkCublasStatus(cublasLtMatrixLayoutSetAttribute(Cdesc, + CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideC, sizeof(strideC))); + } + + checkCublasStatus(cublasLtMatrixLayoutCreate(&Ddesc, dTypeLabel, p.m, p.n, ldd)); + if (p.batch > 1) { + checkCublasStatus(cublasLtMatrixLayoutSetAttribute(Ddesc, + CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &p.batch, sizeof(p.batch))); + checkCublasStatus(cublasLtMatrixLayoutSetAttribute(Ddesc, + CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideD, sizeof(strideD))); + } + } + + //----------- handle + cublasLtHandle_t ltHandle = {0}; + checkCublasStatus(cublasLtCreate(<Handle)); + + + //----------- heuristics / explicit kernel + cublasLtMatmulAlgo_t* algoPtr = nullptr; + cublasLtMatmulAlgo_t algo; + + if (!p.useHeuristics) { + const int32_t algoId = 35; + + checkCublasStatus(cublasLtMatmulAlgoInit( + ltHandle, // + computeTypeLabel, // compute + scaleTypeLabel, // scale + aTypeLabel, // A + bTypeLabel, // B + cTypeLabel, // C, this is suspicious! check type matrix! + dTypeLabel, // D + algoId, &algo)); + + // sm90_xmma_gemm_e4m3bf16_e4m3f32_f32_tn_n_tilesize128x128x128_cgasize1x2x1_stage4_gmmastage2_warpgroupsize1x1x1_tensor64x128x32 + // ARCH_90, BLAS_OP_GEMM, PROBLEM_LAYOUT_TN, CUBLASLT_MATMUL_TILE_128x128, CUBLASLT_MATMUL_STAGES_128x4, ALIGN_128, GMMA_UNDEFINED, CGA_1x2x1, SCHEDULING_STATIC, DATA_LAYOUT_REGULAR, EPILOGUE_DEFAULT + const cublasLtMatmulTile_t tileId = static_cast(20); + const cublasLtMatmulStages_t stagesId = static_cast(22); + const uint16_t gmmaShape = 0; + const uint16_t cgaShape = 2; + const uint16_t schedulingMode = 0; + // const uint16_t dataLayout = 0; // not exposed, yet + + checkCublasStatus(cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_TILE_ID, &tileId, sizeof(tileId))); + checkCublasStatus(cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_STAGES_ID, &stagesId, sizeof(stagesId))); + checkCublasStatus(cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_GMMA_SHAPE_ID, &gmmaShape, sizeof(gmmaShape))); + checkCublasStatus(cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_CGA_SHAPE_ID, &cgaShape, sizeof(cgaShape))); + checkCublasStatus(cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_SCHEDULING_MODE, &schedulingMode, sizeof(schedulingMode))); + + algoPtr = &algo; + } + + { + const float alpha = 1.0f; + const float beta = 0.0f; + + // in-place matrix-multi -> C == D & CDesc == DDesc + checkCublasStatus(cublasLtMatmul( + ltHandle, matmulDesc, &alpha, devAPtr, Adesc, devBPtr, Bdesc, &beta, + devDPtr, Ddesc, devDPtr, Ddesc, algoPtr, devWsPtr, wsSizeBytes, 0)); + } + + printDevBuffer(devDPtr, dSizeBytes, p.m); + + if (Ddesc) checkCublasStatus(cublasLtMatrixLayoutDestroy(Ddesc)); + if (Cdesc) checkCublasStatus(cublasLtMatrixLayoutDestroy(Cdesc)); + if (Bdesc) checkCublasStatus(cublasLtMatrixLayoutDestroy(Bdesc)); + if (Adesc) checkCublasStatus(cublasLtMatrixLayoutDestroy(Adesc)); + if (matmulDesc) checkCublasStatus(cublasLtMatmulDescDestroy(matmulDesc)); + checkCublasStatus(cublasLtDestroy(ltHandle)); + + freeResources(&devAPtr, &devBPtr, &devCPtr, &devDPtr, &devWsPtr); + + if (p.initExtraPtrs) { + checkCudaStatus(cudaFree(devAscalePtr)); + checkCudaStatus(cudaFree(devBscalePtr)); + checkCudaStatus(cudaFree(devCscalePtr)); + checkCudaStatus(cudaFree(devDscalePtr)); + checkCudaStatus(cudaFree(devEpilogueAuxScalePtr)); + + computeType amax = -99.9f; + auto status = cudaMemcpy(&amax, devAmaxdPtr, sizeof(computeType), cudaMemcpyDeviceToHost); + if (status != cudaSuccess) { + std::cout << "Failed to copy dev buffer's content!" << std::endl; + } else { + std::cout << "amaxD is: " << amax << std::endl; + } + checkCudaStatus(cudaFree(devAmaxdPtr)); + + amax = -99.9f; + status = cudaMemcpy(&amax, devAmaxEpilogueAuxPtr, sizeof(computeType), cudaMemcpyDeviceToHost); + if (status != cudaSuccess) { + std::cout << "Failed to copy dev buffer's content!" << std::endl; + } else { + std::cout << "amaxEpilogueAux is: " << amax << std::endl; + } + checkCudaStatus(cudaFree(devAmaxEpilogueAuxPtr)); + } + + std::cout << std::endl; + return 0; +} + +#endif // _WORKER_HPP diff --git a/tests/unittests/fp8_gemm_test/Makefile b/tests/unittests/fp8_gemm_test/Makefile new file mode 100644 index 000000000..c5dcb8443 --- /dev/null +++ b/tests/unittests/fp8_gemm_test/Makefile @@ -0,0 +1,43 @@ +CXX := g++ +CXXFLAGS := -Wall -Werror -g +CUDAFLAG := -Xcompiler -Wall -ldl -DWMMA -O0 -G -Xcompiler -Wall + +CUBLAS_PATH := /home/scratch.bhsueh_sw_1/cublas_build_x86_64_centos7_cuda11.7_roma_nostromo_gpgpu_31055760_release/ +SDK_PATH := /home/scratch.bhsueh_sw_1/cuda_toolkit-gpgpu-31073558/ + + + +CUBLAS_INC := -I$(CUBLAS_PATH)/include/ +CUBLAS_LIBS_PATH := -L$(CUBLAS_PATH)/lib64/ +CUBLAS_LIBS := -lcublasLt + +SDK_INC := -I$(SDK_PATH)/include +SDK_LIBS_PATH := -L$(SDK_PATH)/lib64/ +SDK_LIBS := -lcudart_static + +LOCAL_INC := -I$(shell dirname $(realpath $(firstword $(MAKEFILE_LIST)))) + +LINKER_BONUS := -Wl,-rpath=$(CUBLAS_PATH)/lib64 + +# static cudart +SYS_LIBS := -L/lib/x86_64-linux-gnu/ -ldl -lpthread -lrt + +OBJECTS := main.o worker.o cuda_utils.o + +tester_app: $(OBJECTS) + $(CXX) $(OBJECTS) -o tester_app $(CUBLAS_LIBS_PATH) $(CUBLAS_LIBS) $(SDK_LIBS_PATH) $(SDK_LIBS) $(SYS_LIBS) $(LINKER_BONUS) + +cuda_utils.o : cuda_utils.cu + nvcc ${CUDAFLAG} -c cuda_utils.cu -o cuda_utils.o ${SDK_INC} + +worker.o : worker.cpp + $(CXX) $(CXXFLAGS) -c worker.cpp -o worker.o $(LOCAL_INC) $(CUBLAS_INC) $(SDK_INC) + +main.o : main.cpp + $(CXX) $(CXXFLAGS) -c main.cpp -o main.o $(SDK_INC) + +clean: + rm -f *.o tester_app + +#all : +# echo $(CASK_OBJS) diff --git a/tests/unittests/fp8_gemm_test/cuda_utils.cu b/tests/unittests/fp8_gemm_test/cuda_utils.cu new file mode 100644 index 000000000..a334563fd --- /dev/null +++ b/tests/unittests/fp8_gemm_test/cuda_utils.cu @@ -0,0 +1,130 @@ +#include "cuda_utils.h" + +template +void __global__ cudaCastKernel(T_OUT* out, T_IN const * const in, const uint32_t size) +{ + for (int i = blockIdx.x * blockDim.x + threadIdx.x; i < size; i+= gridDim.x * blockDim.x) { + out[i] = (T_OUT)((T_IN)(in[i])); + } +} + + +template +void cudaCast(T_OUT* out, T_IN const * const in, const uint32_t size) +{ + dim3 block(256); + dim3 grid((size + 1) / 256 * 256); + cudaCastKernel<<>>(out, in, size); +} + +template void cudaCast(float* out, float const * const in, const uint32_t size); +template void cudaCast(__nv_fp8_e4m3* out, float const * const in, const uint32_t size); + + + +template +__global__ void +quatizeVectorE4M3(__nv_fp8_e4m3* output, float const* input_qua_amax_ptr, T const* input, uint32_t size, uint32_t n) +{ + for (uint32_t i = threadIdx.x + blockIdx.x * blockDim.x; i < size; i += blockDim.x * gridDim.x) { + if (QUANTIZE_MODE == 0) { + output[i] = __nv_fp8_e4m3((float)(input[i]) / __ldg(input_qua_amax_ptr + (i % n))); + } + else { + output[i] = __nv_fp8_e4m3((float)(input[i]) / __ldg(input_qua_amax_ptr)); + } + } +} + +template +void invokeQuatizeVectorE4M3(__nv_fp8_e4m3* output, + float const* input_qua_amax_ptr, + T const* input, + uint32_t size, + uint32_t n, + cudaStream_t stream) +{ + dim3 grid(1); + dim3 block(256); + quatizeVectorE4M3<<>>(output, input_qua_amax_ptr, input, size, n); +} + +template void invokeQuatizeVectorE4M3(__nv_fp8_e4m3* output, + float const* input_qua_amax_ptr, + float const* input, + uint32_t size, + uint32_t n, + cudaStream_t stream); +template void invokeQuatizeVectorE4M3(__nv_fp8_e4m3* output, + float const* input_qua_amax_ptr, + half const* input, + uint32_t size, + uint32_t n, + cudaStream_t stream); +template void invokeQuatizeVectorE4M3(__nv_fp8_e4m3* output, + float const* input_qua_amax_ptr, + float const* input, + uint32_t size, + uint32_t n, + cudaStream_t stream); +template void invokeQuatizeVectorE4M3(__nv_fp8_e4m3* output, + float const* input_qua_amax_ptr, + half const* input, + uint32_t size, + uint32_t n, + cudaStream_t stream); + + +template +__global__ void +dequatizeVectorE4M3(T_OUT* output, float const* qua_amax_ptr, T_IN const* input, uint32_t size, uint32_t n) +{ + for (uint32_t i = threadIdx.x + blockIdx.x * blockDim.x; i < size; i += blockDim.x * gridDim.x) { + if (QUANTIZE_MODE == 0) { + output[i] = T_OUT(float(input[i]) * __ldg(qua_amax_ptr + (i % n))); + } + else { + output[i] = T_OUT(float(input[i]) * __ldg(qua_amax_ptr)); + } + } +} + +template +void invokeDequatizeVectorE4M3( + T_OUT* output, float const* qua_amax_ptr, T_IN const* input, uint32_t size, uint32_t n, cudaStream_t stream) +{ + dim3 grid(1); + dim3 block(256); + dequatizeVectorE4M3<<>>(output, qua_amax_ptr, input, size, n); +} + +template void invokeDequatizeVectorE4M3(float* output, + float const* qua_amax_ptr, + __nv_fp8_e4m3 const* input, + uint32_t size, + uint32_t n, + cudaStream_t stream); +template void invokeDequatizeVectorE4M3(half* output, + float const* qua_amax_ptr, + __nv_fp8_e4m3 const* input, + uint32_t size, + uint32_t n, + cudaStream_t stream); +template void invokeDequatizeVectorE4M3(float* output, + float const* qua_amax_ptr, + __nv_fp8_e4m3 const* input, + uint32_t size, + uint32_t n, + cudaStream_t stream); +template void invokeDequatizeVectorE4M3(half* output, + float const* qua_amax_ptr, + __nv_fp8_e4m3 const* input, + uint32_t size, + uint32_t n, + cudaStream_t stream); +template void invokeDequatizeVectorE4M3<__nv_bfloat16, __nv_bfloat16, 0>(__nv_bfloat16* output, + float const* qua_amax_ptr, + __nv_bfloat16 const* input, + uint32_t size, + uint32_t n, + cudaStream_t stream); \ No newline at end of file diff --git a/tests/unittests/fp8_gemm_test/cuda_utils.h b/tests/unittests/fp8_gemm_test/cuda_utils.h new file mode 100644 index 000000000..dd095d237 --- /dev/null +++ b/tests/unittests/fp8_gemm_test/cuda_utils.h @@ -0,0 +1,36 @@ +#ifndef CUDA_UTILS_H +#define CUDA_UTILS_H + +#pragma once + +#include "src/fastertransformer/utils/cuda_bf16_wrapper.h" +#include "src/fastertransformer/utils/cuda_fp8_utils.h" +#include +#include +#include +#include +#include + +template +void cudaCast(T_OUT* out, T_IN const* const in, const uint32_t size); + +#ifdef ENABLE_FP8 +template +void invokeQuatizeVectorE4M3(__nv_fp8_e4m3* output, + float const* input_qua_amax_ptr, + T const* input, + uint32_t size, + uint32_t n, + cudaStream_t stream); +#endif + +// template +// void invokeDequatizeVectorE4M3( +// T* output, float const* qua_amax_ptr, __nv_fp8_e4m3 const* input, uint32_t size, uint32_t n, cudaStream_t +// stream); + +template +void invokeDequatizeVectorE4M3( + T_OUT* output, float const* qua_amax_ptr, T_IN const* input, uint32_t size, uint32_t n, cudaStream_t stream); + +#endif // CUDA_UTILS_H \ No newline at end of file diff --git a/tests/unittests/fp8_gemm_test/main.cpp b/tests/unittests/fp8_gemm_test/main.cpp new file mode 100644 index 000000000..84a51b156 --- /dev/null +++ b/tests/unittests/fp8_gemm_test/main.cpp @@ -0,0 +1,39 @@ +#include "worker.hpp" +#include +// #include "3rdparty/swarm-review-30931053/cudart/cuda_fp8.h" +#include +#include +#include "cuda_utils.h" + +//===================================================================================================================== + +int main() +{ + const int32_t m = 16; + const int32_t n = 32; + const int32_t k = 64; + const int32_t batch = 2; + const cublasOperation_t tA = CUBLAS_OP_T; + const cublasOperation_t tB = CUBLAS_OP_N; + const bool isStridedBatch = true; + const size_t aElemSize = sizeof(__nv_fp8_e4m3); + const size_t bElemSize = sizeof(__nv_fp8_e4m3); + const size_t cElemSize = sizeof(__nv_bfloat16); + const size_t dElemSize = sizeof(__nv_bfloat16); + const float aScale = 1.0f; + const float bScale = 2.0f; + const float cScale = 0.0f; + const float dScale = 1.0f; + const float epilogueAuxScale = 1.0f; + const bool initExtraPtrs = true; + + const auto result = cublasTester({m, n, k, tA, tB, batch, isStridedBatch, aElemSize, bElemSize, cElemSize, + dElemSize, aScale, bScale, cScale, dScale, epilogueAuxScale, initExtraPtrs}); + + if (result != 0) { + std::cout << "In the end, something went wrong!" << std::endl; + } + else { + std::cout << "Everything is ok" << std::endl; + } +} diff --git a/tests/unittests/fp8_gemm_test/run_cublaslttest.sh b/tests/unittests/fp8_gemm_test/run_cublaslttest.sh new file mode 100644 index 000000000..ef624ec9a --- /dev/null +++ b/tests/unittests/fp8_gemm_test/run_cublaslttest.sh @@ -0,0 +1,2 @@ +CUBLASLT_LOG_LEVEL=6 /home/scratch.bhsueh_sw_1/cublas-x86_64-centos7-cudadev.31134771_0-cuda_a.31129926_0/tests/cublasTestLt -Rmatmul -PinAq -PinBq -PinCq -Poutq -m_outOfPlace -Ps -n32 -m32 -k32 -A1 -B0 -b -d0 -T10 -X -m_workmem4096 -ta + diff --git a/tests/unittests/fp8_gemm_test/worker.cpp b/tests/unittests/fp8_gemm_test/worker.cpp new file mode 100644 index 000000000..20dbdffdf --- /dev/null +++ b/tests/unittests/fp8_gemm_test/worker.cpp @@ -0,0 +1,616 @@ +#include "worker.hpp" +#include +#include +#include +// #include "3rdparty/swarm-review-30931053/cudart/cuda_fp8.h" +#include +#include + +#include "cuda_utils.h" +#include +#include +namespace { + +static constexpr uint64_t LOOP_COUNTER = 1ull; + + +template +void checkMat(TA* A, TB* B, int size, std::string mark) +{ + float max_diff = -10000.0f; + float max_diff_a, max_diff_b; + TA* matA = (TA*)malloc(sizeof(TA) * size); + TB* matB = B; + int not_passed = 0; + cudaMemcpy(matA, A, sizeof(TA) * size, cudaMemcpyDeviceToHost); + // cudaMemcpy(matB, B, sizeof(TB) * size, cudaMemcpyDeviceToHost); + printf("[INFO] A B abs_diff rel_diff\n"); + for (int jjj = 0; jjj < size; jjj++) { + float diff = fabs(float(matA[jjj]) - float(matB[jjj])); + if (diff > max_diff) { + max_diff = diff; + max_diff_a = float(matA[jjj]); + max_diff_b = float(matB[jjj]); + } + // if (fabs(float(matA[jjj]) - float(matB[jjj])) > 0.001) { + not_passed += 1; + if (not_passed < 100) + printf("%4d %10.4f %10.4f %10.4f (%7.4f %% percent)\n", + jjj, + float(matA[jjj]), + float(matB[jjj]), + diff, + (diff) / (float(matA[jjj] + 1e-6f)) * 100.f); + // } + } + printf("[%s] max diff : %f ; a : %f ; b : %f\n", mark.c_str(), max_diff, max_diff_a, max_diff_b); + if (not_passed != 0) + printf("[%s] different elements : %d \n", mark.c_str(), not_passed); + else + printf("[%s] check pass!\n", mark.c_str()); + free(matA); + // free(matB); +} + +void getAMax(float* amax_ptr, float* input, const int m, const int n) +{ + for (int i = 0; i < m; i++) { + for (int j = 0; j < n; j++) { + if (i == 0) { + // amax_ptr[j] = fabs(input[i * n + j]) / 127.f; + amax_ptr[j] = 1.0f; + } + // else { + amax_ptr[j] = std::max(amax_ptr[j], fabs(input[i * n + j]) / 127.f); + // } + } + } +} + +//------------------------------------------------ + +void freeResources(void** a, void** b, void** c, void** d, void** ws) +{ + auto cleaner = [](void** ptr) { + if (*ptr != nullptr) { + cudaFree(*ptr); + *ptr = nullptr; + } + }; + cleaner(a); + cleaner(b); + cleaner(c); + cleaner(d); + cleaner(ws); +} + +//------------------------------------------------ + +inline void checkCublasStatus(cublasStatus_t status) +{ + if (status != CUBLAS_STATUS_SUCCESS) { + printf("cuBLAS API failed with status %d\n", status); + // throw std::logic_error("cuBLAS API failed"); + // printf("cuBLAS API failed"); + } +} + +inline void checkCudaStatus(cudaError_t status) +{ + if (status != cudaSuccess) { + printf("CUDA API failed with status %d\n", status); + throw std::logic_error("CUDA API failed"); + } +} + +//------------------------------------------------ + +template +bool fillTensorWithValue(void* devPtr, const size_t sizeBytes, const T value) +{ + std::vector hData(sizeBytes / sizeof(T), value); + const auto status = + cudaMemcpy(static_cast(devPtr), hData.data(), hData.size() * sizeof(T), cudaMemcpyHostToDevice); + if (status != cudaSuccess) { + return false; + } + return true; +}; + +//------------------------------------------------ + +template +void printDevBuffer(void* devPtr, const size_t sizeBytes, const size_t row) +{ + std::vector hBuffer(sizeBytes / sizeof(T), static_cast(0.0)); + const auto status = cudaMemcpy(hBuffer.data(), devPtr, hBuffer.size() * sizeof(T), cudaMemcpyDeviceToHost); + if (status != cudaSuccess) { + std::cout << "Failed to copy dev buffer's content!" << std::endl; + return; + } + printf("hBuffer.size(): %d \n", (int)hBuffer.size()); + for (size_t i = 0; i < hBuffer.size(); i++) { + if (!(i % row)) { + std::cout << std::endl; + } + std::cout << (float)hBuffer[i] << " "; + } + std::cout << std::endl << std::endl; +} + +//------------------------------------------------ + +#if 1 +struct Timer { + Timer(const char* _msg): msg(_msg) + { + _start = getTick(); + } + ~Timer() + { + const auto duration = getTick() - _start; + printf("^^^^^^^^ [Timer] %s: %lu\n", msg, duration); + } + +private: + uint64_t getTick() + { + uint64_t low, high; + __asm__ volatile("rdtsc" : "=a"(low), "=d"(high)); + return (high << 32) | low; + } + uint64_t _start = 0; + const char* msg; +}; +#else +class Timer { +public: + Timer(std::string&& _msg) + { + start = Clock::now(); + msg = std::move(_msg); + } + ~Timer() + { + TimePoint end = Clock::now(); + auto dur = std::chrono::duration_cast(end - start); + std::cout << "[Timer] " << msg << ": " << dur.count() << " ns" << std::endl; + } + +private: + using Clock = std::chrono::high_resolution_clock; + using TimePoint = Clock::time_point; // std::chrono::time_point; + TimePoint start; + std::string msg; +}; +#endif + +} // anonymous namespace + +template +void printMatrix(T* devPtr, const int m, const int n) +{ + for (int i = 0; i < m; i++) { + for (int j = 0; j < n; j++) { + printf("%f ", (float)(devPtr[i * n + j])); + } + printf("\n"); + } + printf("\n\n"); +} + +template void printMatrix(float* devPtr, const int m, const int n); + +//===================================================================================================================== +// public API + +int32_t cublasTester(const ProblemDesc& p) +{ + // Initialize input A, B and D + // A: weight matrix, k * n + // B: input matrix, m * k + // D: output matrix, m * n + float* f_hevAPtr = new float[p.batch * p.k * p.n]; + float* f_hevBPtr = new float[p.batch * p.m * p.k]; + float* f_hevDPtr = new float[p.batch * p.m * p.n]; + float* f_hevAPtr_trans = new float[p.batch * p.n * p.k]; // For TN GEMM, the weight should be transposed + + // const float max_rand_num = 0.01f; + for (int b = 0; b < (int)p.batch; b++) { + for (int i = 0; i < (int)(p.k); i++) { + for (int j = 0; j < (int)(p.n); j++) { + // f_hevAPtr[i * p.n + j] = (random() % 1000) / (1000.f / max_rand_num) - (max_rand_num / 2); + // f_hevAPtr[i * p.n + j] = (random() % 1000) / 1000.f * 2.0f - 1.0f; + // f_hevAPtr[i * p.n + j] = pow(-1, random() % 2) * (1 << (random() % 8)) * ((random() % 4) * 0.25 + 1.f); + float exp_num = 1 << (random() % 8); + float man_num = random() % 4 * 0.25 + 1.f; + exp_num = random() % 2 == 0 ? exp_num * 1.0f : 1.0f / exp_num; + man_num = random() % 2 == 0 ? man_num : -1.0f * man_num; + f_hevAPtr[b * p.k * p.n + i * p.n + j] = exp_num * man_num; + f_hevAPtr_trans[b * p.k * p.n + j * p.k + i] = f_hevAPtr[b * p.k * p.n + i * p.n + j]; + } + } + } + + for (int i = 0; i < (int)(p.batch * p.m * p.k); i++) { + // f_hevBPtr[i] = (random() % 1000) / 1000.f * 2.0f - 1.0f; + f_hevBPtr[i] = 1.0f; + } + for (int i = 0; i < (int)(p.batch * p.m * p.n); i++) { + f_hevDPtr[i] = 0.0f; + } + + // Baseline + for (int b = 0; b < (int)p.batch; b++) { + for (int i = 0; i < (int)p.m; i++) { + for (int j = 0; j < (int)p.n; j++) { + for (int k = 0; k < (int)p.k; k++) { + f_hevDPtr[b * p.m * p.n + i * p.n + j] = + f_hevDPtr[b * p.m * p.n + i * p.n + j] + f_hevBPtr[b * p.m * p.k + i * p.k + k] * p.bScale * f_hevAPtr[b * p.k * p.n + k * p.n + j] * p.aScale; + } + } + } + } + + printf("[INFO] fp32 input: \n"); + printMatrix(f_hevBPtr, p.m, p.k); + printf("[INFO] fp32 weight: \n"); + printMatrix(f_hevAPtr, p.k, p.n); + printf("[INFO] fp32 output: \n"); + printMatrix(f_hevDPtr, p.batch * p.m, p.n); + + // Collect amax scalar + float* h_input_amax = new float(0.0f); // per tensor + float* h_output_scaling = new float[p.n]; + float* h_weight_amax = new float[p.n]; + + getAMax(h_input_amax, f_hevBPtr, (int)(p.batch * p.m * p.k), 1); + // getAMax(h_weight_amax, f_hevAPtr, (int)p.k, (int)p.n); + for (int i = 0; i < (int)(p.n); i++) h_weight_amax[i] = 1.0f; // No scaling + + for (int i = 0; i < (int)p.n; i++) { + h_output_scaling[i] = (*h_input_amax) * h_weight_amax[i]; + } + + printf("h_input_amax: %f\n", *h_input_amax); + for (int i = 0; i < (int)p.n; i++) { + printf("h_weight_amax[%d]: %f\n", i, h_weight_amax[i]); + } + + // CUDA side + cudaStream_t stream; + cudaStreamCreate(&stream); + + std::cout << "aScale factor is: " << p.aScale << std::endl; + std::cout << "bScale factor is: " << p.bScale << std::endl; + std::cout << "cScale factor is: " << p.cScale << std::endl; + std::cout << "dScale factor is: " << p.dScale << std::endl; + std::cout << "epilogueAuxScale factor is: " << p.epilogueAuxScale << std::endl << std::endl; + + const size_t aSizeBytes = p.batch * p.n * p.k * p.aElemSize; + const size_t bSizeBytes = p.batch * p.m * p.k * p.bElemSize; + const size_t cSizeBytes = p.batch * p.m * p.n * p.cElemSize; + const size_t dSizeBytes = p.batch * p.m * p.n * p.dElemSize; + const size_t wsSizeBytes = 4096 * 1024; + + void* devAPtr = nullptr; + void* devBPtr = nullptr; + void* devCPtr = nullptr; + void* devDPtr = nullptr; + void* devWsPtr = nullptr; + checkCudaStatus(cudaMalloc(&devAPtr, aSizeBytes)); // n * k + checkCudaStatus(cudaMalloc(&devBPtr, bSizeBytes)); // m * k + checkCudaStatus(cudaMalloc(&devCPtr, cSizeBytes)); // m * n + checkCudaStatus(cudaMalloc(&devDPtr, dSizeBytes)); // m * n + checkCudaStatus(cudaMalloc(&devWsPtr, wsSizeBytes)); + + void* d_input_amax = nullptr; + void* d_weight_amax = nullptr; + void* d_output_scaling = nullptr; + checkCudaStatus(cudaMalloc(&d_input_amax, sizeof(float) * p.k)); + checkCudaStatus(cudaMalloc(&d_weight_amax, sizeof(float) * p.n)); + checkCudaStatus(cudaMalloc(&d_output_scaling, sizeof(float) * p.n)); + + void* f_devAPtr = nullptr; + void* f_devBPtr = nullptr; + checkCudaStatus(cudaMalloc(&f_devAPtr, sizeof(float) * p.batch * p.n * p.k)); + checkCudaStatus(cudaMalloc(&f_devBPtr, sizeof(float) * p.batch * p.m * p.k)); + + checkCudaStatus(cudaMemcpy((float*)f_devAPtr, (float*)f_hevAPtr_trans, sizeof(float) * p.batch * p.n * p.k, cudaMemcpyHostToDevice)); + checkCudaStatus(cudaMemcpy((float*)f_devBPtr, (float*)f_hevBPtr, sizeof(float) * p.batch * p.m * p.k, cudaMemcpyHostToDevice)); + + checkCudaStatus(cudaMemcpy((float*)d_input_amax, (float*)h_input_amax, sizeof(float) * p.k, cudaMemcpyHostToDevice)); + checkCudaStatus(cudaMemcpy((float*)d_weight_amax, (float*)h_weight_amax, sizeof(float) * p.n, cudaMemcpyHostToDevice)); + checkCudaStatus(cudaMemcpy((float*)d_output_scaling, (float*)h_output_scaling, sizeof(float) * p.n, cudaMemcpyHostToDevice)); + + invokeQuatizeVectorE4M3((__nv_fp8_e4m3*)devAPtr, (float*)d_weight_amax, (float*)f_devAPtr, p.batch * p.k * p.n, p.n, stream); + invokeQuatizeVectorE4M3((__nv_fp8_e4m3*)devBPtr, (float*)d_input_amax, (float*)f_devBPtr, p.batch * p.m * p.k, 1, stream); + + void* devAscalePtr = nullptr; + void* devBscalePtr = nullptr; + void* devCscalePtr = nullptr; + void* devDscalePtr = nullptr; + void* devEpilogueAuxScalePtr = nullptr; + void* devAmaxdPtr = nullptr; + void* devAmaxEpilogueAuxPtr = nullptr; + + // using aDataType = __nv_fp8_e4m3; + // using bDataType = __nv_fp8_e4m3; + using cDataType = __nv_bfloat16; + using dDataType = __nv_bfloat16; + using computeDataType = float; + + const auto aType = CUDA_R_8F_E4M3; + const auto bType = CUDA_R_8F_E4M3; + // const auto cType = CUDA_R_16BF; + const auto dType = CUDA_R_16BF; + const auto computeType = CUBLAS_COMPUTE_32F; + const auto scaleType = CUDA_R_32F; + const auto epilogueAuxType = CUDA_R_16BF; + + // fillTensorWithValue(devAPtr, aSizeBytes, static_cast(1.0)); + // fillTensorWithValue(devBPtr, bSizeBytes, static_cast(1.0)); + fillTensorWithValue(devCPtr, cSizeBytes, static_cast(1.0)); + fillTensorWithValue(devDPtr, dSizeBytes, static_cast(0.0)); + + //----------- handle + cublasLtHandle_t ltHandle = {0}; + checkCublasStatus(cublasLtCreate(<Handle)); + for (int id = 35; id < 36; id++) { + printf("[INFO] id = %d \n", id); + + //------- init, desc & tensors + cublasLtMatmulDesc_t matmulDesc; + cublasLtMatrixLayout_t Adesc; + cublasLtMatrixLayout_t Bdesc; + // cublasLtMatrixLayout_t Cdesc; + cublasLtMatrixLayout_t Ddesc; + + if (p.initExtraPtrs) { + checkCudaStatus(cudaMalloc(&devAscalePtr, sizeof(computeDataType))); + checkCudaStatus( + cudaMemcpy(static_cast(devAscalePtr), &p.aScale, sizeof(p.aScale), cudaMemcpyHostToDevice)); + + checkCudaStatus(cudaMalloc(&devBscalePtr, sizeof(computeDataType))); + checkCudaStatus( + cudaMemcpy(static_cast(devBscalePtr), &p.bScale, sizeof(p.bScale), cudaMemcpyHostToDevice)); + + checkCudaStatus(cudaMalloc(&devCscalePtr, sizeof(computeDataType))); + checkCudaStatus( + cudaMemcpy(static_cast(devCscalePtr), &p.cScale, sizeof(p.cScale), cudaMemcpyHostToDevice)); + + checkCudaStatus(cudaMalloc(&devDscalePtr, sizeof(computeDataType))); + checkCudaStatus( + cudaMemcpy(static_cast(devDscalePtr), &p.dScale, sizeof(p.dScale), cudaMemcpyHostToDevice)); + + checkCudaStatus(cudaMalloc(&devEpilogueAuxScalePtr, sizeof(computeDataType))); + checkCudaStatus(cudaMemcpy(static_cast(devEpilogueAuxScalePtr), + &p.epilogueAuxScale, + sizeof(p.epilogueAuxScale), + cudaMemcpyHostToDevice)); + + const float amax = -99.0f; + checkCudaStatus(cudaMalloc(&devAmaxdPtr, sizeof(computeDataType))); + checkCudaStatus( + cudaMemcpy(static_cast(devAmaxdPtr), &amax, sizeof(amax), cudaMemcpyHostToDevice)); + + checkCudaStatus(cudaMalloc(&devAmaxEpilogueAuxPtr, sizeof(computeDataType))); + checkCudaStatus( + cudaMemcpy(static_cast(devAmaxEpilogueAuxPtr), &amax, sizeof(amax), cudaMemcpyHostToDevice)); + } + + { + checkCublasStatus(cublasLtMatmulDescCreate(&matmulDesc, computeType, scaleType)); + checkCublasStatus( + cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_TRANSA, &p.tA, sizeof(p.tA))); + checkCublasStatus( + cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_TRANSB, &p.tB, sizeof(p.tB))); + + checkCublasStatus(cublasLtMatmulDescSetAttribute( + matmulDesc, CUBLASLT_MATMUL_DESC_A_SCALE_POINTER, &devAscalePtr, sizeof(devAscalePtr))); + checkCublasStatus(cublasLtMatmulDescSetAttribute( + matmulDesc, CUBLASLT_MATMUL_DESC_B_SCALE_POINTER, &devBscalePtr, sizeof(devBscalePtr))); + // checkCublasStatus(cublasLtMatmulDescSetAttribute( + // matmulDesc, CUBLASLT_MATMUL_DESC_C_SCALE_POINTER, &devCscalePtr, sizeof(devCscalePtr))); + checkCublasStatus(cublasLtMatmulDescSetAttribute( + matmulDesc, CUBLASLT_MATMUL_DESC_D_SCALE_POINTER, &devDscalePtr, sizeof(devDscalePtr))); + checkCublasStatus(cublasLtMatmulDescSetAttribute( + matmulDesc, CUBLASLT_MATMUL_DESC_AMAX_D_POINTER, &devAmaxdPtr, sizeof(devAmaxdPtr))); + + checkCublasStatus(cublasLtMatmulDescSetAttribute(matmulDesc, + CUBLASLT_MATMUL_DESC_EPILOGUE_AUX_SCALE_POINTER, + &devEpilogueAuxScalePtr, + sizeof(devEpilogueAuxScalePtr))); + checkCublasStatus(cublasLtMatmulDescSetAttribute( + matmulDesc, CUBLASLT_MATMUL_DESC_EPILOGUE_AUX_DATA_TYPE, &epilogueAuxType, sizeof(epilogueAuxType))); + checkCublasStatus(cublasLtMatmulDescSetAttribute(matmulDesc, + CUBLASLT_MATMUL_DESC_EPILOGUE_AUX_AMAX_POINTER, + &devAmaxEpilogueAuxPtr, + sizeof(devAmaxEpilogueAuxPtr))); + } + + { + const int64_t lda = p.k; + const int64_t ldb = p.k; + // const int64_t ldc = p.n; + const int64_t ldd = p.n; + const int batch = p.batch; + const int64_t strideA = p.k * p.n; + const int64_t strideB = p.m * p.k; + // const int64_t strideC = p.m * p.n; + const int64_t strideD = p.m * p.n; + + // create matrix descriptors, we are good with the details here so no need + // to set any extra attributes + checkCublasStatus(cublasLtMatrixLayoutCreate(&Adesc, aType, p.tA == CUBLAS_OP_N ? p.n : p.k, p.tA == CUBLAS_OP_N ? p.k : p.n, lda)); + checkCublasStatus(cublasLtMatrixLayoutSetAttribute(Adesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batch, sizeof(batch))); + checkCublasStatus(cublasLtMatrixLayoutSetAttribute(Adesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideA, sizeof(strideA))); + + checkCublasStatus(cublasLtMatrixLayoutCreate(&Bdesc, bType, p.tB == CUBLAS_OP_N ? p.k : p.m, p.tB == CUBLAS_OP_N ? p.m : p.k, ldb)); + checkCublasStatus(cublasLtMatrixLayoutSetAttribute(Bdesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batch, sizeof(batch))); + checkCublasStatus(cublasLtMatrixLayoutSetAttribute(Bdesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideB, sizeof(strideB))); + + // checkCublasStatus(cublasLtMatrixLayoutCreate(&Cdesc, cType, p.n, p.m, ldc)); + // checkCublasStatus(cublasLtMatrixLayoutSetAttribute(Cdesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batch, sizeof(batch))); + // checkCublasStatus(cublasLtMatrixLayoutSetAttribute(Cdesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideC, sizeof(strideC))); + + checkCublasStatus(cublasLtMatrixLayoutCreate(&Ddesc, dType, p.n, p.m, ldd)); + checkCublasStatus(cublasLtMatrixLayoutSetAttribute(Ddesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batch, sizeof(batch))); + checkCublasStatus(cublasLtMatrixLayoutSetAttribute(Ddesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideD, sizeof(strideD))); + } + + // cublasLtMatmulAlgo_t algo; + + // size_t sizeWritten = 0; + // cublasLtMatmulAlgoCapGetAttribute(&algo, CUBLASLT_ALGO_CAP_TILE_IDS, NULL, 0, &sizeWritten); + // int nbTiles = int(sizeWritten / sizeof(int)); + // printf("[INFO] sizeWritten: %ld, nbTiles: %d \n", sizeWritten, nbTiles); + + // const int32_t algoId = id; + + // checkCublasStatus(cublasLtMatmulAlgoInit(ltHandle, // + // computeType, // compute + // scaleType, // scale + // aType, // A + // bType, // B + // cType, // C, this is suspicious! check type matrix! + // dType, // D + // algoId, + // &algo)); + + //---------- algo desc + + for (int tile_id = 0; tile_id < 1; tile_id++) { + for (int stage_id = 0; stage_id < 1; stage_id++) { + for (uint16_t gemm_shape = 0; gemm_shape < 1; gemm_shape++) { + for (uint16_t cga_shape = 0; cga_shape < 1; cga_shape++) { + for (uint16_t scheduling_mode = 0; scheduling_mode < 1; scheduling_mode++) { + + // sm90_xmma_gemm_e4m3bf16_e4m3f32_f32_tn_n_tilesize128x128x128_cgasize1x2x1_stage4_gmmastage2_warpgroupsize1x1x1_tensor64x128x32 + // cask_5x::ARCH_90, cask_5x::PROBLEM_LAYOUT_TN, CUBLASLT_MATMUL_TILE_128x128, + // CUBLASLT_MATMUL_STAGES_128x4, cask_5x::ALIGN_128, cask_5x::GMMA_UNDEFINED, + // cask_5x::CGA_1x2x1, cask_5x::SCHEDULING_STATIC, cask_5x::DATA_LAYOUT_REGULAR, + // cask_5x::EPILOGUE_DEFAULT, + // const cublasLtMatmulTile_t tileId = static_cast(tile_id); + // const cublasLtMatmulStages_t stagesId = static_cast(stage_id); + // const uint16_t gmmaShape = gemm_shape; + // const uint16_t cgaShape = cga_shape; + // const uint16_t schedulingMode = scheduling_mode; + // const uint16_t dataLayout = 0; // not exposed, yet + + // { + // checkCublasStatus(cublasLtMatmulAlgoConfigSetAttribute( + // &algo, CUBLASLT_ALGO_CONFIG_TILE_ID, &tileId, sizeof(tileId))); + // checkCublasStatus(cublasLtMatmulAlgoConfigSetAttribute( + // &algo, CUBLASLT_ALGO_CONFIG_STAGES_ID, &stagesId, sizeof(stagesId))); + // checkCublasStatus(cublasLtMatmulAlgoConfigSetAttribute( + // &algo, CUBLASLT_ALGO_CONFIG_GMMA_SHAPE_ID, &gmmaShape, sizeof(gmmaShape))); + // checkCublasStatus(cublasLtMatmulAlgoConfigSetAttribute( + // &algo, CUBLASLT_ALGO_CONFIG_CGA_SHAPE_ID, &cgaShape, sizeof(cgaShape))); + // checkCublasStatus( + // cublasLtMatmulAlgoConfigSetAttribute(&algo, + // CUBLASLT_ALGO_CONFIG_SCHEDULING_MODE, + // &schedulingMode, + // sizeof(schedulingMode))); + // } + + // cublasLtMatmulHeuristicResult_t heurResult; + // cublasStatus_t algoStatus = cublasLtMatmulAlgoCheck( + // ltHandle, matmulDesc, Adesc, Bdesc, Cdesc, Ddesc, &algo, &heurResult); + // if (algoStatus != CUBLAS_STATUS_SUCCESS) { + // // printf("[INFO] algoId: %d, tile_id: %d, stage_id: %d, cublasLtMatmulAlgoCheck fail + // // \r", algoId, tile_id, stage_id); + // continue; + // } + // else { + // printf( + // "[INFO] algoId: %d, tile_id: %d, stage_id: %d,gemm_shape %d, cga_shape %d, + // scheduling_mode %d, cublasLtMatmulAlgoCheck success \n", algoId, tile_id, + // stage_id, + // gemm_shape, + // cga_shape, + // scheduling_mode); + // } + + { + const float alpha = 1.0f; + const float beta = 0.0f; + + cublasStatus_t status = cublasLtMatmul(ltHandle, + matmulDesc, + &alpha, + devAPtr, + Adesc, + devBPtr, + Bdesc, + &beta, + devDPtr, + Ddesc, + devDPtr, + Ddesc, + nullptr, // &algo, + devWsPtr, + wsSizeBytes, + 0); + if (status == CUBLAS_STATUS_SUCCESS) { + // printDevBuffer(devDPtr, dSizeBytes, p.m); + // invokeDequatizeVectorE4M3((float*)f_devDPtr, (float*)d_output_amax, (__nv_fp8_e4m3*)devDPtr, (uint32_t)(p.m * p.n), (uint32_t)p.n, stream); + + // invokeDequatizeVectorE4M3<__nv_bfloat16, __nv_bfloat16, 0>((__nv_bfloat16*)devDPtr, (float*)d_output_scaling, (__nv_bfloat16*)devDPtr, (uint32_t)(p.m * p.n), (uint32_t)p.n, stream); + printDevBuffer(devDPtr, dSizeBytes, p.n); + checkMat((__nv_bfloat16*)devDPtr, f_hevDPtr, (int)(p.batch * p.m * p.n), "comparison"); + exit(0); + } + } + } + } + } + } + } + + if (Ddesc) + checkCublasStatus(cublasLtMatrixLayoutDestroy(Ddesc)); + // if (Cdesc) + // checkCublasStatus(cublasLtMatrixLayoutDestroy(Cdesc)); + if (Bdesc) + checkCublasStatus(cublasLtMatrixLayoutDestroy(Bdesc)); + if (Adesc) + checkCublasStatus(cublasLtMatrixLayoutDestroy(Adesc)); + if (matmulDesc) + checkCublasStatus(cublasLtMatmulDescDestroy(matmulDesc)); + } + checkCublasStatus(cublasLtDestroy(ltHandle)); + + freeResources(&devAPtr, &devBPtr, &devCPtr, &devDPtr, &devWsPtr); + + if (p.initExtraPtrs) { + checkCudaStatus(cudaFree(devAscalePtr)); + checkCudaStatus(cudaFree(devBscalePtr)); + checkCudaStatus(cudaFree(devCscalePtr)); + checkCudaStatus(cudaFree(devDscalePtr)); + checkCudaStatus(cudaFree(devEpilogueAuxScalePtr)); + + computeDataType amax = -99.9f; + auto status = cudaMemcpy(&amax, devAmaxdPtr, sizeof(computeDataType), cudaMemcpyDeviceToHost); + if (status != cudaSuccess) { + std::cout << "Failed to copy dev buffer's content!" << std::endl; + } + else { + std::cout << "amaxD is: " << amax << std::endl; + } + checkCudaStatus(cudaFree(devAmaxdPtr)); + + amax = -99.9f; + status = cudaMemcpy(&amax, devAmaxEpilogueAuxPtr, sizeof(computeDataType), cudaMemcpyDeviceToHost); + if (status != cudaSuccess) { + std::cout << "Failed to copy dev buffer's content!" << std::endl; + } + else { + std::cout << "amaxEpilogueAux is: " << amax << std::endl; + } + checkCudaStatus(cudaFree(devAmaxEpilogueAuxPtr)); + } + + std::cout << std::endl; + return 0; +} diff --git a/tests/unittests/fp8_gemm_test/worker.hpp b/tests/unittests/fp8_gemm_test/worker.hpp new file mode 100644 index 000000000..34d4f48cf --- /dev/null +++ b/tests/unittests/fp8_gemm_test/worker.hpp @@ -0,0 +1,104 @@ +#ifndef _WORKER_HPP +#define _WORKER_HPP + +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +/* **************************** debug tools ********************************* */ +static const char* _cudaGetErrorEnum(cudaError_t error) +{ + return cudaGetErrorString(error); +} + +static const char* _cudaGetErrorEnum(cublasStatus_t error) +{ + switch (error) { + case CUBLAS_STATUS_SUCCESS: + return "CUBLAS_STATUS_SUCCESS"; + + case CUBLAS_STATUS_NOT_INITIALIZED: + return "CUBLAS_STATUS_NOT_INITIALIZED"; + + case CUBLAS_STATUS_ALLOC_FAILED: + return "CUBLAS_STATUS_ALLOC_FAILED"; + + case CUBLAS_STATUS_INVALID_VALUE: + return "CUBLAS_STATUS_INVALID_VALUE"; + + case CUBLAS_STATUS_ARCH_MISMATCH: + return "CUBLAS_STATUS_ARCH_MISMATCH"; + + case CUBLAS_STATUS_MAPPING_ERROR: + return "CUBLAS_STATUS_MAPPING_ERROR"; + + case CUBLAS_STATUS_EXECUTION_FAILED: + return "CUBLAS_STATUS_EXECUTION_FAILED"; + + case CUBLAS_STATUS_INTERNAL_ERROR: + return "CUBLAS_STATUS_INTERNAL_ERROR"; + + case CUBLAS_STATUS_NOT_SUPPORTED: + return "CUBLAS_STATUS_NOT_SUPPORTED"; + + case CUBLAS_STATUS_LICENSE_ERROR: + return "CUBLAS_STATUS_LICENSE_ERROR"; + } + return ""; +} + +inline void syncAndCheck(const char* const file, int const line) +{ +#ifndef NDEBUG + cudaDeviceSynchronize(); + cudaError_t result = cudaGetLastError(); + if (result) { + throw std::runtime_error(std::string("[FT][ERROR] CUDA runtime error: ") + (_cudaGetErrorEnum(result)) + " " + + file + ":" + std::to_string(line) + " \n"); + } +#endif +} + +#define sync_check_cuda_error() syncAndCheck(__FILE__, __LINE__) + + +struct ProblemDesc { + size_t m; + size_t n; + size_t k; + cublasOperation_t tA; + cublasOperation_t tB; + size_t batch; + bool isStridedBatch; + size_t aElemSize; + size_t bElemSize; + size_t cElemSize; + size_t dElemSize; + float aScale; + float bScale; + float cScale; + float dScale; + float epilogueAuxScale; + bool initExtraPtrs; +}; + +//------------------------------------------------ + +template +void silence_unused(const T&) {} + +//------------------------------------------------ + +int32_t cublasTester(const ProblemDesc& problem); + +template +int32_t cublasTesterNew(const ProblemDesc& p); + +#endif // _WORKER_HPP diff --git a/tests/unittests/gtest_utils.h b/tests/unittests/gtest_utils.h index 4bfb1ac14..ab2fb461c 100644 --- a/tests/unittests/gtest_utils.h +++ b/tests/unittests/gtest_utils.h @@ -214,24 +214,26 @@ class FtTestBase: public testing::Test { return ft::Tensor(mtype, dtype, shape, data); }; + template ft::Tensor toHost(ft::Tensor& device_tensor) { if (device_tensor.data == nullptr) { return ft::Tensor(); } ft::Tensor host_tensor = createTensor(ft::MEMORY_CPU, device_tensor.type, device_tensor.shape); - ft::cudaAutoCpy(host_tensor.getPtr(), device_tensor.getPtr(), host_tensor.sizeBytes(), stream); + ft::cudaAutoCpy(host_tensor.getPtr(), device_tensor.getPtr(), host_tensor.size(), stream); cudaStreamSynchronize(stream); return host_tensor; }; + template ft::Tensor toDevice(ft::Tensor& host_tensor) { if (host_tensor.data == nullptr) { return ft::Tensor(); } ft::Tensor device_tensor = createTensor(ft::MEMORY_GPU, host_tensor.type, host_tensor.shape); - ft::cudaAutoCpy(device_tensor.getPtr(), host_tensor.getPtr(), host_tensor.sizeBytes(), stream); + ft::cudaAutoCpy(device_tensor.getPtr(), host_tensor.getPtr(), host_tensor.size(), stream); return device_tensor; }; diff --git a/tests/unittests/test_attention_kernels.cu b/tests/unittests/test_attention_kernels.cu index 07fed887a..60c943fce 100644 --- a/tests/unittests/test_attention_kernels.cu +++ b/tests/unittests/test_attention_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -271,9 +271,9 @@ public: } // Clone to host for reference computation if needed. - Tensor h_qk = is_benchmark ? Tensor() : toHost(qk); - Tensor h_attn_mask = is_benchmark ? Tensor() : toHost(attn_mask); - Tensor h_qk_fp32 = is_benchmark ? Tensor() : toHost(qk_fp32); + Tensor h_qk = is_benchmark ? Tensor() : toHost(qk); + Tensor h_attn_mask = is_benchmark ? Tensor() : toHost(attn_mask); + Tensor h_qk_fp32 = is_benchmark ? Tensor() : toHost(qk_fp32); T scale = static_cast(1 / sqrtf(param.size_per_head * 1.0f)); @@ -377,9 +377,9 @@ public: checkResult("CheckAlibiSlopes", alibi_slopes.getPtr(), h_alibi_slopes.getPtr(), param.head_num)); // Clone to host for reference computation if needed. - Tensor h_qk = is_benchmark ? Tensor() : toHost(qk); - Tensor h_attn_mask = is_benchmark ? Tensor() : toHost(attn_mask); - Tensor h_qk_fp32 = is_benchmark ? Tensor() : toHost(qk_fp32); + Tensor h_qk = is_benchmark ? Tensor() : toHost(qk); + Tensor h_attn_mask = is_benchmark ? Tensor() : toHost(attn_mask); + Tensor h_qk_fp32 = is_benchmark ? Tensor() : toHost(qk_fp32); T scale = static_cast(1 / sqrtf(param.size_per_head * 1.0f)); diff --git a/tests/unittests/test_context_decoder_layer.cu b/tests/unittests/test_context_decoder_layer.cu index 97f05ca9a..d3cc1e620 100644 --- a/tests/unittests/test_context_decoder_layer.cu +++ b/tests/unittests/test_context_decoder_layer.cu @@ -14,6 +14,7 @@ #include "src/fastertransformer/utils/logger.h" #include "src/fastertransformer/utils/memory_utils.h" #include "src/fastertransformer/utils/Tensor.h" +#include "src/fastertransformer/utils/nvtx_utils.h" #include "src/fastertransformer/kernels/gpt_kernels.h" #include "src/fastertransformer/models/multi_gpu_gpt/ParallelGpt.h" @@ -119,6 +120,9 @@ bool test_context_sharing(const std::string& weight_dir, const std::string& data size_per_head, inter_size, num_layer, + 0, // expert_num + 0, // moe_k + {}, // moe_layer_index 1e-5f, // layernorm_eps gptVariantParams {}, tensor_para, diff --git a/tests/unittests/test_penalty_kernels.cu b/tests/unittests/test_penalty_kernels.cu index c9a81a49f..4939affa3 100644 --- a/tests/unittests/test_penalty_kernels.cu +++ b/tests/unittests/test_penalty_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -20,6 +20,7 @@ #include #include // rand #include // std::string +#include #include // std::vector #include @@ -27,6 +28,7 @@ #include #include "src/fastertransformer/kernels/beam_search_penalty_kernels.h" +#include "src/fastertransformer/kernels/penalty_types.h" #include "src/fastertransformer/kernels/sampling_penalty_kernels.h" #include "src/fastertransformer/utils/cuda_utils.h" #include "src/fastertransformer/utils/memory_utils.h" @@ -361,16 +363,24 @@ TYPED_TEST(TemperaturePenaltyTest, Consistency) } struct RepetitionPenaltyTestCase { - size_t batch_size; - size_t vocab_size; - size_t max_input_length; - float* repetition_penalties; - size_t repetition_penalties_size; + size_t batch_size; + size_t vocab_size; + size_t max_input_length; + float* repetition_penalties; + size_t repetition_penalties_size; + RepetitionPenaltyType repetition_penalty_type; std::string toString() { + static const std::unordered_map typestr_map { + {RepetitionPenaltyType::Additive, "additive"}, + {RepetitionPenaltyType::Multiplicative, "multiplicative"}, + {RepetitionPenaltyType::None, "none"}}; return fmtstr( - "RepetitionPenaltyTestCase[batch=%ld, vocab=%ld, max_input_length=%ld, repetition_penalties=%s]", - batch_size, vocab_size, max_input_length, arr2str(repetition_penalties, repetition_penalties_size).c_str()); + "RepetitionPenaltyTestCase[batch=%ld, vocab=%ld, max_input_length=%ld, " + "repetition_penalties=%s, repetition_penalty_type=%s]", + batch_size, vocab_size, max_input_length, + arr2str(repetition_penalties, repetition_penalties_size).c_str(), + typestr_map.at(repetition_penalty_type).c_str()); } }; @@ -437,22 +447,23 @@ protected: delete[] h_input_lengths_; } - void computeReference(T* logits, - const int* output_ids, - const int* input_lengths, - const float* repetition_penalties, - const size_t repetition_penalties_size, - const size_t step, - const size_t max_input_length, - const size_t batch_size, - const size_t vocab_size, - const size_t vocab_size_padded) + void computeReference(T* logits, + const int* output_ids, + const int* input_lengths, + const float* repetition_penalties, + const size_t repetition_penalties_size, + const RepetitionPenaltyType repetition_penalty_type, + const size_t step, + const size_t max_input_length, + const size_t batch_size, + const size_t vocab_size, + const size_t vocab_size_padded) { bool* penalized = new bool[vocab_size]; for (size_t i = 0; i < batch_size; ++i) { float repetition_penalty = repetition_penalties_size > 1 ? repetition_penalties[i] : repetition_penalties[0]; - ASSERT_GT(repetition_penalty, 0.0f) << "temperature should be positive but got " << repetition_penalty; + std::fill_n(penalized, vocab_size, false); size_t offset = i * vocab_size_padded; for (size_t t = 0; t < step; ++t) { @@ -462,8 +473,20 @@ protected: int token_id = output_ids[i + t * batch_size]; if (!penalized[token_id]) { float logit = static_cast(logits[offset + token_id]); - logits[offset + token_id] = - static_cast(logit < 0.0f ? logit * repetition_penalty : logit / repetition_penalty); + switch (repetition_penalty_type) { + case RepetitionPenaltyType::Additive: + logits[offset + token_id] = static_cast(logit - repetition_penalty); + break; + case RepetitionPenaltyType::Multiplicative: + logits[offset + token_id] = + static_cast(logit < 0.0f ? logit * repetition_penalty : logit / repetition_penalty); + break; + case RepetitionPenaltyType::None: + // None. do nothing. + break; + default: + throw std::domain_error("Invalid repetition penalty type."); + } penalized[token_id] = true; } } @@ -488,6 +511,7 @@ public: d_input_lengths_, max_input_length_, step_, + param.repetition_penalty_type, stream); } else { @@ -500,6 +524,7 @@ public: d_input_lengths_, max_input_length_, step_, + param.repetition_penalty_type, stream); } computeReference(h_logits_, @@ -507,6 +532,7 @@ public: h_input_lengths_, param.repetition_penalties, param.repetition_penalties_size, + param.repetition_penalty_type, step_, max_input_length_, batch_size_, @@ -534,6 +560,7 @@ public: d_input_lengths_, max_input_length_, step_, + param.repetition_penalty_type, stream); float* h_repetition_penalties = new float[batch_size_]; @@ -554,6 +581,7 @@ public: d_input_lengths_, max_input_length_, step_, + param.repetition_penalty_type, stream); bool passed = checkResult(param.toString(), d_logits_, d_logits_batch, batch_size_ * vocab_size_padded_, true, true); @@ -570,25 +598,25 @@ TYPED_TEST_SUITE(RepetitionPenaltyTest, FloatAndHalfTypes); TYPED_TEST(RepetitionPenaltyTest, NoPenalty) { float repetition_penalty = 1.0f; - this->runTest({6, 4, 5, &repetition_penalty, 1}); + this->runTest({6, 4, 5, &repetition_penalty, 1, RepetitionPenaltyType::Multiplicative}); } TYPED_TEST(RepetitionPenaltyTest, LessThanOne) { float repetition_penalty = 0.53f; - this->runTest({6, 4, 5, &repetition_penalty, 1}); + this->runTest({6, 4, 5, &repetition_penalty, 1, RepetitionPenaltyType::Multiplicative}); } TYPED_TEST(RepetitionPenaltyTest, GreaterThaneOne) { float repetition_penalty = 2.01f; - this->runTest({6, 4, 5, &repetition_penalty, 1}); + this->runTest({6, 4, 5, &repetition_penalty, 1, RepetitionPenaltyType::Multiplicative}); } TYPED_TEST(RepetitionPenaltyTest, LargeVocab) { float repetition_penalty = 2.01f; - this->runTest({6, 50001, 1003, &repetition_penalty, 1}); + this->runTest({6, 50001, 1003, &repetition_penalty, 1, RepetitionPenaltyType::Multiplicative}); } TYPED_TEST(RepetitionPenaltyTest, BatchNoPenalty) @@ -598,7 +626,7 @@ TYPED_TEST(RepetitionPenaltyTest, BatchNoPenalty) for (size_t i = 0; i < batch_size; ++i) { repetition_penalties[i] = 1.0f; } - this->runTest({batch_size, 4, 5, repetition_penalties, batch_size}); + this->runTest({batch_size, 4, 5, repetition_penalties, batch_size, RepetitionPenaltyType::Multiplicative}); } TYPED_TEST(RepetitionPenaltyTest, BatchLessThanOne) @@ -608,7 +636,7 @@ TYPED_TEST(RepetitionPenaltyTest, BatchLessThanOne) for (size_t i = 0; i < batch_size; ++i) { repetition_penalties[i] = 0.53f; } - this->runTest({batch_size, 4, 5, repetition_penalties, batch_size}); + this->runTest({batch_size, 4, 5, repetition_penalties, batch_size, RepetitionPenaltyType::Multiplicative}); } TYPED_TEST(RepetitionPenaltyTest, BatchGreaterThaneOne) @@ -618,7 +646,7 @@ TYPED_TEST(RepetitionPenaltyTest, BatchGreaterThaneOne) for (size_t i = 0; i < batch_size; ++i) { temperatures[i] = 2.01f; } - this->runTest({batch_size, 4, 5, temperatures, batch_size}); + this->runTest({batch_size, 4, 5, temperatures, batch_size, RepetitionPenaltyType::Multiplicative}); } TYPED_TEST(RepetitionPenaltyTest, BatchMixed) @@ -628,13 +656,39 @@ TYPED_TEST(RepetitionPenaltyTest, BatchMixed) for (size_t i = 0; i < batch_size; ++i) { repetition_penalties[i] = i % 2 ==0 ? 2.01f : 0.53f; } - this->runTest({batch_size, 4, 5, repetition_penalties, batch_size}); + this->runTest({batch_size, 4, 5, repetition_penalties, batch_size, RepetitionPenaltyType::Multiplicative}); } TYPED_TEST(RepetitionPenaltyTest, Consistency) { float repetition_penalty = 2.01f; - this->runConsistencyTest({6, 4, 5, &repetition_penalty, 1}); + this->runConsistencyTest({6, 4, 5, &repetition_penalty, 1, RepetitionPenaltyType::Multiplicative}); +} + +TYPED_TEST(RepetitionPenaltyTest, PenaltyTypeAdditive) +{ + size_t batch_size = 6; + float* repetition_penalties = new float[batch_size]; + for (size_t i = 0; i < batch_size; ++i) { + repetition_penalties[i] = i % 2 ==0 ? 2.01f : 0.53f; + } + this->runTest({batch_size, 4, 5, repetition_penalties, batch_size, RepetitionPenaltyType::Additive}); +} + +TYPED_TEST(RepetitionPenaltyTest, PenaltyTypeAdditiveHasDefaultValueZero) +{ + float repetition_penalty = 1.0f; + this->runTest({6, 4, 5, &repetition_penalty, 1, RepetitionPenaltyType::Additive}); +} + +TYPED_TEST(RepetitionPenaltyTest, PenaltyTypeAdditiveHasDefaultValueZero2) +{ + size_t batch_size = 6; + float* repetition_penalties = new float[batch_size]; + for (size_t i = 0; i < batch_size; ++i) { + repetition_penalties[i] = i % 2 ==0 ? 1.0f : 0.0f; + } + this->runTest({batch_size, 4, 5, repetition_penalties, batch_size, RepetitionPenaltyType::Additive}); } // Turn on the warning message. diff --git a/tests/unittests/th_op/test_th_decode_op.py b/tests/unittests/th_op/test_th_decode_op.py new file mode 100644 index 000000000..5133db02d --- /dev/null +++ b/tests/unittests/th_op/test_th_decode_op.py @@ -0,0 +1,328 @@ +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import itertools +import unittest +from pathlib import Path + +import torch + + +@unittest.skipUnless(Path('lib/libth_transformer.so').exists(), + 'lib/libth_transformer.so does not exist.') +class TestDecodeOp(unittest.TestCase): + + @classmethod + def setUpClass(cls) -> None: + torch.classes.load_library('lib/libth_transformer.so') + + def setUp(self) -> None: + self.vocab_size = 1024 + self.vocab_size_padded = 1024 + self.tensor_para_size = 1 + self.pipeline_para_size = 1 + self.end_id = 0 # eos token id. + self.decode_op = None + self.decode_op = torch.classes.FasterTransformer.DynamicDecodeOp( + self.vocab_size, + self.vocab_size_padded, + self.tensor_para_size, + self.pipeline_para_size, + torch.float) + + def tearDown(self): + del self.decode_op + + def initialize_input_token_ids(self, + batch_size, + beam_width, + max_input_length, + use_random_input_tokens=True): + device = torch.cuda.current_device() + if use_random_input_tokens: + input_token_ids = torch.randint( + 1, self.vocab_size, (batch_size, max_input_length), + dtype=torch.int, device=device) + else: + input_token_ids = torch.ones( + (batch_size, max_input_length), dtype=torch.int, device=device) + input_token_ids += self.end_id + input_token_ids.remainder_(self.vocab_size) + input_lengths = torch.randint( + 1, max_input_length + 1, (batch_size,), dtype=torch.int, device=device) + input_lengths[torch.randint(0, batch_size, (1,))] = max_input_length + + # mask by end_id. + step_indices = torch.arange(0, max_input_length, device=device)\ + .unsqueeze(0).tile(batch_size, 1) + input_token_ids[input_lengths.unsqueeze(1) <= step_indices] = self.end_id + + # Tiling. + input_token_ids = input_token_ids.repeat(1, beam_width)\ + .view(batch_size * beam_width, -1) + input_lengths = input_lengths.view(-1, 1).repeat(1, beam_width).view(-1) + + return input_token_ids, input_lengths + + @staticmethod + def safe_to_vec(batch_size, value, dtype, is_cpu=False): + if value is None: + return None + device = torch.device('cpu') if is_cpu else torch.cuda.current_device() + return value * torch.ones(batch_size, dtype=dtype, device=device) + + def run_decode(self, + batch_size=4, + beam_width=1, + max_input_length=4, + gen_length=3, + ite=0, + local_batch_size=None, + top_k=None, + top_p=None, + temperature=None, + repetition_penalty=None, + presence_penalty=None, + min_length=None, + len_penalty=None, + beam_search_diversity_rate=None, + random_seed=None, + top_p_decay=None, + top_p_min=None, + top_p_reset_ids=None, + logit_fn=None, + use_random_input_tokens=True): + ite = 0 + local_batch_size = batch_size + max_seq_length = max_input_length + gen_length + + device = torch.cuda.current_device() + + eos_token_ids = self.safe_to_vec(batch_size, self.end_id, torch.int, False) + top_ks = self.safe_to_vec(batch_size, top_k, torch.int, True) + top_ps = self.safe_to_vec(batch_size, top_p, torch.float, True) + temperatures = self.safe_to_vec(batch_size, temperature, torch.float, True) + repetition_penalties = self.safe_to_vec(batch_size, repetition_penalty, torch.float, True) + presence_penalties = self.safe_to_vec(batch_size, presence_penalty, torch.float, True) + min_lengths = self.safe_to_vec(batch_size, min_length, torch.int, True) + len_penalties = self.safe_to_vec(batch_size, len_penalty, torch.float, True) + beam_search_diversity_rates = self.safe_to_vec(batch_size, beam_search_diversity_rate, torch.float, True) + random_seeds = self.safe_to_vec(batch_size, random_seed, torch.int64, True) + top_p_decays = self.safe_to_vec(batch_size, top_p_decay, torch.float, False) + top_p_mins = self.safe_to_vec(batch_size, top_p_min, torch.float, False) + top_p_reset_ids = self.safe_to_vec(batch_size, top_p_reset_ids, torch.int, False) + + embedding_bias = None + sequence_limit_lengths = None # limit step + stop_words_list = None + bad_words_list = None + + if beam_width > 1: + parent_ids = torch.zeros( + (max_seq_length, batch_size * beam_width), + dtype=torch.int32, device=device) + # src/tgt cache indirections. + cache_indirection = torch.zeros( + (2, batch_size, beam_width, max_seq_length), + dtype=torch.int32, device=device) + cum_log_probs = torch.zeros(batch_size * beam_width, device=device) + output_log_probs = None + else: + parent_ids = None + cache_indirection = None + src_cache_indirection = None + tgt_cache_indirection = None + cum_log_probs = None + output_log_probs = None + + input_token_ids, input_lengths = self.initialize_input_token_ids( + batch_size, beam_width, max_input_length, use_random_input_tokens) + + self.decode_op.setup(batch_size, + beam_width, + top_ks, + top_ps, + temperatures, + repetition_penalties, + presence_penalties, + min_lengths, + len_penalties, + beam_search_diversity_rates, + random_seeds, + top_p_decays, + top_p_mins, + top_p_reset_ids) + + finished = torch.zeros_like(input_lengths).bool() + sequence_lengths = (max_input_length - 1) * torch.ones_like(input_lengths) + + # Contiguous buffer for each decode_op step, will be transposed. + output_token_ids = torch.zeros( + (max_seq_length, batch_size * beam_width), + dtype=torch.int32, device=device) + output_token_ids[:max_input_length, ...] = input_token_ids.T + + for step in range(max_input_length, max_seq_length): + if cache_indirection is not None: + bidx = range(ite * local_batch_size, + min((ite + 1) * local_batch_size, batch_size)) + src_indir_idx = (step - max_input_length) % 2 + tgt_indir_idx = 1 - src_indir_idx + src_cache_indirection = cache_indirection[src_indir_idx, bidx, ...] + tgt_cache_indirection = cache_indirection[tgt_indir_idx, bidx, ...] + + if logit_fn is None: + logits = torch.randn( + (batch_size, beam_width, self.vocab_size_padded), device=device) + else: + logits = logit_fn(batch_size, beam_width, device) + + should_stop = self.decode_op.forward( + logits, + step, + max_input_length, + ite, + local_batch_size, + eos_token_ids, + top_ks, + top_ps, + temperatures, + repetition_penalties, + presence_penalties, + min_lengths, + len_penalties, + beam_search_diversity_rates, + top_p_decays, + top_p_mins, + top_p_reset_ids, + embedding_bias, + input_lengths, + sequence_limit_lengths, + stop_words_list, + bad_words_list, + src_cache_indirection, + output_token_ids.view(-1, batch_size, beam_width), + finished, + sequence_lengths, + cum_log_probs, + output_log_probs, + parent_ids, + tgt_cache_indirection) + + if should_stop: + break + # Output sequence length is seqlen + 1 since + output_sequence_lengths = sequence_lengths + 1 + + return dict( + output_token_ids=output_token_ids.T, + output_sequence_lengths=output_sequence_lengths + ) + + def test_min_length_correctness_at_sampling(self): + methods = [dict(top_k=1, top_p=0.0), dict(top_k=0, top_p=0.8)] + testcases = [ + dict(batch_size=4, max_input_length=4, min_length=2, gen_length=4), + dict(batch_size=4, max_input_length=4, min_length=32, gen_length=64), + # batch exceeds 1024 + dict(batch_size=2048, max_input_length=6, min_length=4, gen_length=8), + ] + + def logit_fn(batch_size, beam_width, device): + logits = torch.randn( + (batch_size, beam_width, self.vocab_size_padded), device=device) + # Make the eos token be the most probable. + logits[..., self.end_id] = logits.max(dim=-1)[0] + 1 + return logits + + for tc, method in itertools.product(testcases, methods): + tc.update(method) + with self.subTest(tc): + output_dict = self.run_decode(beam_width=1, logit_fn=logit_fn, **tc) + output_seq_lengths = output_dict['output_sequence_lengths'] + min_sequence_length = tc['max_input_length'] + tc['min_length'] + self.assertTrue( + (output_seq_lengths >= min_sequence_length).all(), + f'failed indices {torch.where(output_seq_lengths < min_sequence_length)[0]}, ' + f'values {output_seq_lengths[torch.where(output_seq_lengths < min_sequence_length)[0]]}') + + def test_min_length_correctness_at_beamsearch(self): + testcases = [ + # Online Beamsearch + dict(batch_size=4, beam_width=2, max_input_length=4, min_length=2, gen_length=4), + # Beamsearch + dict(batch_size=4, beam_width=16, max_input_length=4, min_length=2, gen_length=4), + # batch * beam exceeds 1024 + dict(batch_size=1024, beam_width=2, max_input_length=4, min_length=4, gen_length=8), + dict(batch_size=128, beam_width=16, max_input_length=4, min_length=4, gen_length=8), + # large beam_width + dict(batch_size=4, beam_width=60, max_input_length=4, min_length=4, gen_length=8), + ] + + def logit_fn(batch_size, beam_width, device): + logits = torch.randn( + (batch_size, beam_width, self.vocab_size_padded), device=device) + # Make the eos token be the most probable. + logits[..., self.end_id] = logits.max(dim=-1)[0] + 1 + return logits + + for tc in testcases: + with self.subTest(tc): + output_dict = self.run_decode(logit_fn=logit_fn, **tc) + output_seq_lengths = output_dict['output_sequence_lengths'] + min_sequence_length = tc['max_input_length'] + tc['min_length'] + self.assertTrue( + (output_seq_lengths >= min_sequence_length).all(), + f'failed indices {torch.where(output_seq_lengths < min_sequence_length)[0]}, ' + f'values {output_seq_lengths[torch.where(output_seq_lengths < min_sequence_length)[0]]}') + + def test_repetition_penalty_correctness(self): + methods = [dict(top_k=1, top_p=0.0), dict(beam_width=2)] + testcases = [ + dict(batch_size=4, max_input_length=4, repetition_penalty=2), + dict(batch_size=2048, max_input_length=4, repetition_penalty=2), + dict(batch_size=4, max_input_length=4, presence_penalty=0.5), + dict(batch_size=4, max_input_length=4, presence_penalty=1.0), + dict(batch_size=2048, max_input_length=4, presence_penalty=0.5), + ] + def logit_fn(batch_size, beam_width, device): + logits = torch.zeros( + (batch_size, beam_width, self.vocab_size_padded), device=device) + # The token (vocab_size - 1) is the most probable unless penalized. + # After penalized, the expected output token ids will be + # [v-1, v-2, v-3, v-1, v-1, v-1, ...]. + logits[..., self.vocab_size - 1] = 2 + logits[..., self.vocab_size - 2] = 1.8 + logits[..., self.vocab_size - 3] = 1.6 + return logits + + for tc, method in itertools.product(testcases, methods): + tc.update(method) + gen_length = 5 + beam_width = tc.get('beam_width', 1) + expected_toekn_ids = (self.vocab_size - 1) * torch.ones( + (tc['batch_size'] * beam_width, gen_length), dtype=torch.int32) + expected_toekn_ids[:, 1] = self.vocab_size - 2 + expected_toekn_ids[:, 2] = self.vocab_size - 3 + with self.subTest(tc): + output_dict = self.run_decode( + gen_length=gen_length, + use_random_input_tokens=False, logit_fn=logit_fn, **tc) + output_token_ids = output_dict['output_token_ids'][:, tc['max_input_length']:] + self.assertTrue( + (expected_toekn_ids.to(output_token_ids.device) == output_token_ids).all()) + + +if __name__ == '__main__': + unittest.main() diff --git a/tests/unittests/unittest_utils.h b/tests/unittests/unittest_utils.h index 6320f5b16..00b302b1c 100644 --- a/tests/unittests/unittest_utils.h +++ b/tests/unittests/unittest_utils.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/tests/weight_only_quant_ops/th_weight_quant_ops_unit_tests.py b/tests/weight_only_quant_ops/th_weight_quant_ops_unit_tests.py index 435fa9829..9b3f975d5 100644 --- a/tests/weight_only_quant_ops/th_weight_quant_ops_unit_tests.py +++ b/tests/weight_only_quant_ops/th_weight_quant_ops_unit_tests.py @@ -1,4 +1,4 @@ -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -18,7 +18,7 @@ class TestQuantize(unittest.TestCase): def setUp(self) -> None: - torch.classes.load_library("lib/libth_weight_only_quant_ops.so") + torch.classes.load_library("lib/libth_transformer.so") self.add_bias_and_interleave_int4s = torch.ops.fastertransformer._add_bias_and_interleave_int4s self.add_bias_and_interleave_int8s = torch.ops.fastertransformer._add_bias_and_interleave_int8s self.unpack_packed_int4s = torch.ops.fastertransformer.unpack_int4_packed_tensor_to_int8