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May I help you? #8
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Hi, The latest hardware Rev. 2E was verified OK by Niklas a week ago or so. He tested his old Verilog source code modified for the latest pin assignment of ReAgnus and it worked. However he is focusing on adapting it to his own hardware design based on a Efinix T8 FPGA. You can get in contact with his project here (link to discord in there I think): https://www.a1k.org/forum/index.php?threads/91724/ If you are serious and want to develop an open source firmware for this hardware and are an experienced Verilog/VHDL developer with great knowledge about the Amiga internals and how to write down Agnus in HDL I can probably build you a development board and a ReAgnus unit for cost of components. I have spare PCBs at home but would have to order some components. You can check link here how the devboard looks like: https://eab.abime.net/showpost.php?p=1703451&postcount=335 Let me know... Regards, J |
Hello jbilander, thank you for your reply. As I wrote: I would like to participate, help and on that road learn and improve. Yes, I have some background in electronics and hardware development. So I am quite familiar to KiCAD. I am also familiar to Verilog and VHDL and I have some experience with some Lattice, Intel (Altera) and AMD (Xilinx) components. Also I would like to contribute to the open source community, that helped me in the past a lot. But I am new to Amiga internals. The need for a 8372A could be a perfect reason to get into that topic. First and foremost I would need a starting point on code base, Agnus functionality, actual hardware in discussion and direction of development in the community. On that road, someone to discuss that topic would also be very much appreciated :). For firmware, I already had a look in the repos of nonarkitten, but could not get an overview or an idea where to start. Nor what CPLD/FPGA is actually in discussion. Minimig also seems to be the base for another branch of development. For hardware, I had a look into your repo too (that is why I am here in the first place). But i guess, your work is already very much completed. The only thing in discussion seems to be the mechanical stability. Or am I missing out something? So my question is: Could you or someone else please provide me with some hints to relevant actual repos, discussions, community members, communication channels or documentations to get me on track in a short cut? After that, I would like to know, where I can be of any help for the project. So i guess, ReAgnus development boards are not of any urgent need. But thank you for your kind proposal. I guess I will return to that offer in the near future. Regards |
Hi PizzaDellaCasa, Feel free to join the discord server that Jörgen linked to (https://discord.gg/Tue5K9PM2W). There you can discuss this topic, and join me in working on the Verilog logic I have so far. |
Hello jbilander,
I am new to github, so this may not be the right or best place to get in contact with you. If there is a better way, please give me a hint.
I registered here, because I am curious about the ReAgnus project. I stumbled across this project, while looking for a replacement for an defective 8372A. I was always interested in rebuilding old chips in FPGA/CPLD, but never focused on that topic. So now i have some kind of a motivation for that :).
So I would like to ask, if i can participate/help/learn to contribute to your efforts and the efforts of nonarkitten and niklasekstrom.
There is a discord server mentioned in one of your discussions. Would that be an option to get in contact with you guys?
Hope to read from you soon.
Sincerely
PizzaDellaCasa
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