diff --git a/src/target/b-g431b-esc1/target-pwm.h b/src/target/b-g431b-esc1/target-pwm.h index d806553..3668e1d 100644 --- a/src/target/b-g431b-esc1/target-pwm.h +++ b/src/target/b-g431b-esc1/target-pwm.h @@ -27,3 +27,33 @@ #define PWM_DMA_REQUEST TIM_DIER_CC1DE #define PWM_DMAMUX_REQID 56 + +#define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_A_GPIO_PORT GPIOA +#define BRIDGE_HI_A_GPIO_PIN GPIO8 +#define BRIDGE_HI_A_GPIO_AF GPIO_AF6 + +#define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_B_GPIO_PORT GPIOA +#define BRIDGE_HI_B_GPIO_PIN GPIO9 +#define BRIDGE_HI_B_GPIO_AF GPIO_AF6 + +#define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_C_GPIO_PORT GPIOA +#define BRIDGE_HI_C_GPIO_PIN GPIO10 +#define BRIDGE_HI_C_GPIO_AF GPIO_AF6 + +#define BRIDGE_LO_A_GPIO_RCC RCC_GPIOC +#define BRIDGE_LO_A_GPIO_PORT GPIOC +#define BRIDGE_LO_A_GPIO_PIN GPIO13 +#define BRIDGE_LO_A_GPIO_AF GPIO_AF4 + +#define BRIDGE_LO_B_GPIO_RCC RCC_GPIOA +#define BRIDGE_LO_B_GPIO_PORT GPIOA +#define BRIDGE_LO_B_GPIO_PIN GPIO12 +#define BRIDGE_LO_B_GPIO_AF GPIO_AF6 + +#define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB +#define BRIDGE_LO_C_GPIO_PORT GPIOB +#define BRIDGE_LO_C_GPIO_PIN GPIO15 +#define BRIDGE_LO_C_GPIO_AF GPIO_AF4 diff --git a/src/target/blue-pill/target-pwm.h b/src/target/blue-pill/target-pwm.h index 98a12aa..76106d7 100644 --- a/src/target/blue-pill/target-pwm.h +++ b/src/target/blue-pill/target-pwm.h @@ -28,3 +28,27 @@ // TIM2 is a 32 bit counter, with 32 bit CCR registers #define PWM_DMA_PERIPH_SIZE DMA_CCR_PSIZE_32BIT #define PWM_DMA_REQUEST TIM_DIER_CC1DE + +#define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_A_GPIO_PORT GPIOA +#define BRIDGE_HI_A_GPIO_PIN GPIO8 + +#define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_B_GPIO_PORT GPIOA +#define BRIDGE_HI_B_GPIO_PIN GPIO9 + +#define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_C_GPIO_PORT GPIOA +#define BRIDGE_HI_C_GPIO_PIN GPIO10 + +#define BRIDGE_LO_A_GPIO_RCC RCC_GPIOB +#define BRIDGE_LO_A_GPIO_PORT GPIOB +#define BRIDGE_LO_A_GPIO_PIN GPIO13 + +#define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB +#define BRIDGE_LO_B_GPIO_PORT GPIOB +#define BRIDGE_LO_B_GPIO_PIN GPIO14 + +#define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB +#define BRIDGE_LO_C_GPIO_PORT GPIOB +#define BRIDGE_LO_C_GPIO_PIN GPIO15 diff --git a/src/target/f030-minimal/target-pwm.h b/src/target/f030-minimal/target-pwm.h index edcfcc5..5579492 100644 --- a/src/target/f030-minimal/target-pwm.h +++ b/src/target/f030-minimal/target-pwm.h @@ -27,3 +27,33 @@ // TIM2 is a 32 bit counter, with 32 bit CCR registers #define PWM_DMA_PERIPH_SIZE DMA_CCR_PSIZE_32BIT #define PWM_DMA_REQUEST TIM_DIER_CC1DE + +#define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_A_GPIO_PORT GPIOA +#define BRIDGE_HI_A_GPIO_PIN GPIO8 +#define BRIDGE_HI_A_GPIO_AF GPIO_AF2 + +#define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_B_GPIO_PORT GPIOA +#define BRIDGE_HI_B_GPIO_PIN GPIO9 +#define BRIDGE_HI_B_GPIO_AF GPIO_AF2 + +#define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_C_GPIO_PORT GPIOA +#define BRIDGE_HI_C_GPIO_PIN GPIO10 +#define BRIDGE_HI_C_GPIO_AF GPIO_AF2 + +#define BRIDGE_LO_A_GPIO_RCC RCC_GPIOA +#define BRIDGE_LO_A_GPIO_PORT GPIOA +#define BRIDGE_LO_A_GPIO_PIN GPIO7 +#define BRIDGE_LO_A_GPIO_AF GPIO_AF2 + +#define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB +#define BRIDGE_LO_B_GPIO_PORT GPIOB +#define BRIDGE_LO_B_GPIO_PIN GPIO0 +#define BRIDGE_LO_B_GPIO_AF GPIO_AF2 + +#define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB +#define BRIDGE_LO_C_GPIO_PORT GPIOB +#define BRIDGE_LO_C_GPIO_PIN GPIO1 +#define BRIDGE_LO_C_GPIO_AF GPIO_AF2 diff --git a/src/target/maple-mini/target-pwm.h b/src/target/maple-mini/target-pwm.h index 98a12aa..76106d7 100644 --- a/src/target/maple-mini/target-pwm.h +++ b/src/target/maple-mini/target-pwm.h @@ -28,3 +28,27 @@ // TIM2 is a 32 bit counter, with 32 bit CCR registers #define PWM_DMA_PERIPH_SIZE DMA_CCR_PSIZE_32BIT #define PWM_DMA_REQUEST TIM_DIER_CC1DE + +#define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_A_GPIO_PORT GPIOA +#define BRIDGE_HI_A_GPIO_PIN GPIO8 + +#define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_B_GPIO_PORT GPIOA +#define BRIDGE_HI_B_GPIO_PIN GPIO9 + +#define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_C_GPIO_PORT GPIOA +#define BRIDGE_HI_C_GPIO_PIN GPIO10 + +#define BRIDGE_LO_A_GPIO_RCC RCC_GPIOB +#define BRIDGE_LO_A_GPIO_PORT GPIOB +#define BRIDGE_LO_A_GPIO_PIN GPIO13 + +#define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB +#define BRIDGE_LO_B_GPIO_PORT GPIOB +#define BRIDGE_LO_B_GPIO_PIN GPIO14 + +#define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB +#define BRIDGE_LO_C_GPIO_PORT GPIOB +#define BRIDGE_LO_C_GPIO_PIN GPIO15 diff --git a/src/target/nucleo-f042/target-pwm.h b/src/target/nucleo-f042/target-pwm.h index edcfcc5..5579492 100644 --- a/src/target/nucleo-f042/target-pwm.h +++ b/src/target/nucleo-f042/target-pwm.h @@ -27,3 +27,33 @@ // TIM2 is a 32 bit counter, with 32 bit CCR registers #define PWM_DMA_PERIPH_SIZE DMA_CCR_PSIZE_32BIT #define PWM_DMA_REQUEST TIM_DIER_CC1DE + +#define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_A_GPIO_PORT GPIOA +#define BRIDGE_HI_A_GPIO_PIN GPIO8 +#define BRIDGE_HI_A_GPIO_AF GPIO_AF2 + +#define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_B_GPIO_PORT GPIOA +#define BRIDGE_HI_B_GPIO_PIN GPIO9 +#define BRIDGE_HI_B_GPIO_AF GPIO_AF2 + +#define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_C_GPIO_PORT GPIOA +#define BRIDGE_HI_C_GPIO_PIN GPIO10 +#define BRIDGE_HI_C_GPIO_AF GPIO_AF2 + +#define BRIDGE_LO_A_GPIO_RCC RCC_GPIOA +#define BRIDGE_LO_A_GPIO_PORT GPIOA +#define BRIDGE_LO_A_GPIO_PIN GPIO7 +#define BRIDGE_LO_A_GPIO_AF GPIO_AF2 + +#define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB +#define BRIDGE_LO_B_GPIO_PORT GPIOB +#define BRIDGE_LO_B_GPIO_PIN GPIO0 +#define BRIDGE_LO_B_GPIO_AF GPIO_AF2 + +#define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB +#define BRIDGE_LO_C_GPIO_PORT GPIOB +#define BRIDGE_LO_C_GPIO_PIN GPIO1 +#define BRIDGE_LO_C_GPIO_AF GPIO_AF2 diff --git a/src/target/nucleo-f072/target-pwm.h b/src/target/nucleo-f072/target-pwm.h index edcfcc5..5579492 100644 --- a/src/target/nucleo-f072/target-pwm.h +++ b/src/target/nucleo-f072/target-pwm.h @@ -27,3 +27,33 @@ // TIM2 is a 32 bit counter, with 32 bit CCR registers #define PWM_DMA_PERIPH_SIZE DMA_CCR_PSIZE_32BIT #define PWM_DMA_REQUEST TIM_DIER_CC1DE + +#define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_A_GPIO_PORT GPIOA +#define BRIDGE_HI_A_GPIO_PIN GPIO8 +#define BRIDGE_HI_A_GPIO_AF GPIO_AF2 + +#define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_B_GPIO_PORT GPIOA +#define BRIDGE_HI_B_GPIO_PIN GPIO9 +#define BRIDGE_HI_B_GPIO_AF GPIO_AF2 + +#define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_C_GPIO_PORT GPIOA +#define BRIDGE_HI_C_GPIO_PIN GPIO10 +#define BRIDGE_HI_C_GPIO_AF GPIO_AF2 + +#define BRIDGE_LO_A_GPIO_RCC RCC_GPIOA +#define BRIDGE_LO_A_GPIO_PORT GPIOA +#define BRIDGE_LO_A_GPIO_PIN GPIO7 +#define BRIDGE_LO_A_GPIO_AF GPIO_AF2 + +#define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB +#define BRIDGE_LO_B_GPIO_PORT GPIOB +#define BRIDGE_LO_B_GPIO_PIN GPIO0 +#define BRIDGE_LO_B_GPIO_AF GPIO_AF2 + +#define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB +#define BRIDGE_LO_C_GPIO_PORT GPIOB +#define BRIDGE_LO_C_GPIO_PIN GPIO1 +#define BRIDGE_LO_C_GPIO_AF GPIO_AF2 diff --git a/src/target/nucleo-f303/target-pwm.h b/src/target/nucleo-f303/target-pwm.h index c841f2d..ce4b688 100644 --- a/src/target/nucleo-f303/target-pwm.h +++ b/src/target/nucleo-f303/target-pwm.h @@ -25,3 +25,33 @@ // TIM8 is a 16 bit counter, with 16 bit CCR registers #define PWM_DMA_PERIPH_SIZE DMA_CCR_PSIZE_16BIT #define PWM_DMA_REQUEST TIM_DIER_CC1DE + +#define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_A_GPIO_PORT GPIOA +#define BRIDGE_HI_A_GPIO_PIN GPIO8 +#define BRIDGE_HI_A_GPIO_AF GPIO_AF6 + +#define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_B_GPIO_PORT GPIOA +#define BRIDGE_HI_B_GPIO_PIN GPIO9 +#define BRIDGE_HI_B_GPIO_AF GPIO_AF6 + +#define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_C_GPIO_PORT GPIOA +#define BRIDGE_HI_C_GPIO_PIN GPIO10 +#define BRIDGE_HI_C_GPIO_AF GPIO_AF6 + +#define BRIDGE_LO_A_GPIO_RCC RCC_GPIOA +#define BRIDGE_LO_A_GPIO_PORT GPIOA +#define BRIDGE_LO_A_GPIO_PIN GPIO11 +#define BRIDGE_LO_A_GPIO_AF GPIO_AF6 + +#define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB +#define BRIDGE_LO_B_GPIO_PORT GPIOB +#define BRIDGE_LO_B_GPIO_PIN GPIO0 +#define BRIDGE_LO_B_GPIO_AF GPIO_AF6 + +#define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB +#define BRIDGE_LO_C_GPIO_PORT GPIOB +#define BRIDGE_LO_C_GPIO_PIN GPIO1 +#define BRIDGE_LO_C_GPIO_AF GPIO_AF6 diff --git a/src/target/nucleo-f334/target-pwm.h b/src/target/nucleo-f334/target-pwm.h index 405444c..2efdd90 100644 --- a/src/target/nucleo-f334/target-pwm.h +++ b/src/target/nucleo-f334/target-pwm.h @@ -25,3 +25,33 @@ // TIM2 is a 32 bit counter, with 32 bit CCR registers #define PWM_DMA_PERIPH_SIZE DMA_CCR_PSIZE_32BIT #define PWM_DMA_REQUEST TIM_DIER_CC1DE + +#define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_A_GPIO_PORT GPIOA +#define BRIDGE_HI_A_GPIO_PIN GPIO8 +#define BRIDGE_HI_A_GPIO_AF GPIO_AF6 + +#define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_B_GPIO_PORT GPIOA +#define BRIDGE_HI_B_GPIO_PIN GPIO9 +#define BRIDGE_HI_B_GPIO_AF GPIO_AF6 + +#define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_C_GPIO_PORT GPIOA +#define BRIDGE_HI_C_GPIO_PIN GPIO10 +#define BRIDGE_HI_C_GPIO_AF GPIO_AF6 + +#define BRIDGE_LO_A_GPIO_RCC RCC_GPIOA +#define BRIDGE_LO_A_GPIO_PORT GPIOA +#define BRIDGE_LO_A_GPIO_PIN GPIO7 +#define BRIDGE_LO_A_GPIO_AF GPIO_AF6 + +#define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB +#define BRIDGE_LO_B_GPIO_PORT GPIOB +#define BRIDGE_LO_B_GPIO_PIN GPIO0 +#define BRIDGE_LO_B_GPIO_AF GPIO_AF6 + +#define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB +#define BRIDGE_LO_C_GPIO_PORT GPIOB +#define BRIDGE_LO_C_GPIO_PIN GPIO1 +#define BRIDGE_LO_C_GPIO_AF GPIO_AF6 diff --git a/src/target/nucleo-g071/target-pwm.h b/src/target/nucleo-g071/target-pwm.h index 0894367..30ccc1b 100644 --- a/src/target/nucleo-g071/target-pwm.h +++ b/src/target/nucleo-g071/target-pwm.h @@ -29,3 +29,33 @@ #define PWM_DMA_REQUEST TIM_DIER_CC1DE #define PWM_DMAMUX_REQID 26 + +#define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_A_GPIO_PORT GPIOA +#define BRIDGE_HI_A_GPIO_PIN GPIO8 +#define BRIDGE_HI_A_GPIO_AF GPIO_AF2 + +#define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_B_GPIO_PORT GPIOA +#define BRIDGE_HI_B_GPIO_PIN GPIO9 +#define BRIDGE_HI_B_GPIO_AF GPIO_AF2 + +#define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_C_GPIO_PORT GPIOA +#define BRIDGE_HI_C_GPIO_PIN GPIO10 +#define BRIDGE_HI_C_GPIO_AF GPIO_AF2 + +#define BRIDGE_LO_A_GPIO_RCC RCC_GPIOB +#define BRIDGE_LO_A_GPIO_PORT GPIOB +#define BRIDGE_LO_A_GPIO_PIN GPIO13 +#define BRIDGE_LO_A_GPIO_AF GPIO_AF2 + +#define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB +#define BRIDGE_LO_B_GPIO_PORT GPIOB +#define BRIDGE_LO_B_GPIO_PIN GPIO14 +#define BRIDGE_LO_B_GPIO_AF GPIO_AF2 + +#define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB +#define BRIDGE_LO_C_GPIO_PORT GPIOB +#define BRIDGE_LO_C_GPIO_PIN GPIO15 +#define BRIDGE_LO_C_GPIO_AF GPIO_AF2 diff --git a/src/target/nucleo-g431/target-pwm.h b/src/target/nucleo-g431/target-pwm.h index d806553..3668e1d 100644 --- a/src/target/nucleo-g431/target-pwm.h +++ b/src/target/nucleo-g431/target-pwm.h @@ -27,3 +27,33 @@ #define PWM_DMA_REQUEST TIM_DIER_CC1DE #define PWM_DMAMUX_REQID 56 + +#define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_A_GPIO_PORT GPIOA +#define BRIDGE_HI_A_GPIO_PIN GPIO8 +#define BRIDGE_HI_A_GPIO_AF GPIO_AF6 + +#define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_B_GPIO_PORT GPIOA +#define BRIDGE_HI_B_GPIO_PIN GPIO9 +#define BRIDGE_HI_B_GPIO_AF GPIO_AF6 + +#define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_C_GPIO_PORT GPIOA +#define BRIDGE_HI_C_GPIO_PIN GPIO10 +#define BRIDGE_HI_C_GPIO_AF GPIO_AF6 + +#define BRIDGE_LO_A_GPIO_RCC RCC_GPIOC +#define BRIDGE_LO_A_GPIO_PORT GPIOC +#define BRIDGE_LO_A_GPIO_PIN GPIO13 +#define BRIDGE_LO_A_GPIO_AF GPIO_AF4 + +#define BRIDGE_LO_B_GPIO_RCC RCC_GPIOA +#define BRIDGE_LO_B_GPIO_PORT GPIOA +#define BRIDGE_LO_B_GPIO_PIN GPIO12 +#define BRIDGE_LO_B_GPIO_AF GPIO_AF6 + +#define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB +#define BRIDGE_LO_C_GPIO_PORT GPIOB +#define BRIDGE_LO_C_GPIO_PIN GPIO15 +#define BRIDGE_LO_C_GPIO_AF GPIO_AF4 diff --git a/src/target/nucleo-l476/target-pwm.h b/src/target/nucleo-l476/target-pwm.h index dbc6f78..0e20ec4 100644 --- a/src/target/nucleo-l476/target-pwm.h +++ b/src/target/nucleo-l476/target-pwm.h @@ -30,3 +30,33 @@ #define PWM_DMA_REQUEST TIM_DIER_CC1DE #define PWM_DMA_CSEL 0b100 + +#define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_A_GPIO_PORT GPIOA +#define BRIDGE_HI_A_GPIO_PIN GPIO8 +#define BRIDGE_HI_A_GPIO_AF GPIO_AF2 + +#define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_B_GPIO_PORT GPIOA +#define BRIDGE_HI_B_GPIO_PIN GPIO9 +#define BRIDGE_HI_B_GPIO_AF GPIO_AF2 + +#define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA +#define BRIDGE_HI_C_GPIO_PORT GPIOA +#define BRIDGE_HI_C_GPIO_PIN GPIO10 +#define BRIDGE_HI_C_GPIO_AF GPIO_AF2 + +#define BRIDGE_LO_A_GPIO_RCC RCC_GPIOB +#define BRIDGE_LO_A_GPIO_PORT GPIOB +#define BRIDGE_LO_A_GPIO_PIN GPIO13 +#define BRIDGE_LO_A_GPIO_AF GPIO_AF2 + +#define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB +#define BRIDGE_LO_B_GPIO_PORT GPIOB +#define BRIDGE_LO_B_GPIO_PIN GPIO14 +#define BRIDGE_LO_B_GPIO_AF GPIO_AF2 + +#define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB +#define BRIDGE_LO_C_GPIO_PORT GPIOB +#define BRIDGE_LO_C_GPIO_PIN GPIO15 +#define BRIDGE_LO_C_GPIO_AF GPIO_AF2