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R5F572TF.ld
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/*! @file
@brief RX72T R5F572TF リンカー・スクリプト @n
Code: 512K, RAM: 128K, ECCRAM: 16K, DataFlash: 32K @n
RAM: 0 wait (1 cycle) @n
ECCRAM: 1 wait (2 cycle)
@author 平松邦仁 ([email protected])
@copyright Copyright (C) 2019, 2024 Kunihito Hiramatsu @n
Released under the MIT license @n
https://github.com/hirakuni45/RX/blob/master/LICENSE
*/
/* Default linker script, for normal executables */
OUTPUT_ARCH(rx)
ENTRY(_start)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
/* This memory layout corresponds to the smallest predicted RX72TF chip. */
MEMORY {
RAM (w) : ORIGIN = 0x00000000, LENGTH = 0x0001F000 /* 128K - stack_size (8192) */
USTACK (w) : ORIGIN = 0x0001FC00, LENGTH = 4 /* ustack 7168 bytes */
ISTACK (w) : ORIGIN = 0x00020000, LENGTH = 4 /* istack 1024 bytes */
/* RAM (w) : ORIGIN = 0x00000000, LENGTH = 0x00020000 /* 128K */
/* USTACK (w) : ORIGIN = 0x00FFF800, LENGTH = 4 /* ustack for ECCRAM (16384 - 2048) bytes */
/* ISTACK (w) : ORIGIN = 0x01000000, LENGTH = 4 /* istack for ECCRAM (2048) bytes */
ECCRAM (w) : ORIGIN = 0x00FFC000, LENGTH = 0x00004000 /* 16K */
ROM (w) : ORIGIN = 0xFFF80000, LENGTH = 0x000FFFD0 /* 512K - hw_vectors(48) */
}
SECTIONS
{
.text :
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/* .gnu.warning sections are handled specially by elf32.em. */
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PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
. = ALIGN(4);
KEEP (*(.init))
KEEP (*(.fini))
} > ROM
.rodata : {
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KEEP (*(SORT(.fini_array.*)))
PROVIDE (__fini_array_end = .);
LONG(0); /* Sentinel. */
/* gcc uses crtbegin.o to find the start of the constructors, so
we make sure it is first. Because this is a wildcard, it
doesn't matter if the user does not actually link against
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KEEP (*crtbegin*.o(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
KEEP (*crtbegin*.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
KEEP (*(.jcr))
*(.data.rel.ro.local) *(.data.rel.ro*)
*(.dynamic)
*(.data D .data.* .gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
SORT(CONSTRUCTORS)
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*(.got.plt) *(.got)
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
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. = ALIGN(4);
*(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1)
. = ALIGN(4);
_edata = .;
PROVIDE (edata = .);
PROVIDE (__dataend = .);
} > RAM AT> ROM
PROVIDE (__mainramend = ORIGIN(RAM) + LENGTH(RAM));
/* Note that __romdatacopysize may be ZERO for the simulator, which
knows how to intialize RAM directly. It should ONLY be used for
copying data from ROM to RAM; if you need to know the size of the
data section, subtract the end symbol from the start symbol. */
/* Note that crt0 assumes this is a multiple of four; all the
start/stop symbols are also assumed long-aligned. */
PROVIDE (__romdatacopysize = SIZEOF(.data));
.bss : {
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*(COMMON)
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PROVIDE (__bssend = .);
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PROVIDE (end = .);
} > RAM
PROVIDE (__bsssize = SIZEOF(.bss) / 4);
.istack (ORIGIN (ISTACK)) :
{
PROVIDE (__istack = .);
*(.istack)
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.ustack (ORIGIN (USTACK)) :
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/* Providing one of these symbols in your code is sufficient to have
it linked in to the fixed vector table. */
PROVIDE (__rx_priviledged_exception_handler = 0x00000000);
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PROVIDE (__rx_undefined_exception_handler = 0x00000000);
PROVIDE (__rx_floating_exception_handler = 0x00000000);
PROVIDE (__rx_nonmaskable_exception_handler = 0x00000000);
.vectors (0xFFFFFFD0) :
{
PROVIDE (__vectors = .);
LONG (__rx_priviledged_exception_handler);
LONG (__rx_access_exception_handler);
LONG (0);
LONG (__rx_undefined_exception_handler);
LONG (0);
LONG (__rx_floating_exception_handler);
LONG (0);
LONG (0);
LONG (0);
LONG (0);
LONG (__rx_nonmaskable_exception_handler);
LONG (_start);
}
/* Option Setting Memory: OFS0 */
.ofs0 (0x00120068) :
{
PROVIDE (__ofs0 = .);
*(.ofs0)
}
/* Option Setting Memory: OFS1 */
.ofs1 (0x0012006C) :
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