From 3837d982d1d057db9fc7489247d503102c3d8d74 Mon Sep 17 00:00:00 2001 From: ligenxxxx <59721724+ligenxxxx@users.noreply.github.com> Date: Fri, 8 Nov 2024 17:28:11 +0800 Subject: [PATCH] fix calib dcoc --- src/hardware.c | 6 ++++-- src/rom.c | 32 ++++++++++++++++---------------- 2 files changed, 20 insertions(+), 18 deletions(-) diff --git a/src/hardware.c b/src/hardware.c index 19aac92..ad0c00e 100644 --- a/src/hardware.c +++ b/src/hardware.c @@ -1626,6 +1626,10 @@ void check_eeprom() { uint8_t ff_cnt[3]; uint8_t i, j, k; +#ifdef _RF_CALIB + return; +#endif + // read all 3 table_power partitions for (i = 0; i < 3; i++) { ff_cnt[i] = 0; @@ -1697,8 +1701,6 @@ void check_eeprom() { } } - if (ff_cnt[0] == 3) - return; // Init partition 1/2 by copy paratition 0 if is needed (one time) if ((ff_cnt[1] + ff_cnt[2]) > 5) { for (j = 0; j < 5; j++) { diff --git a/src/rom.c b/src/rom.c index a73f1a1..c5d782b 100644 --- a/src/rom.c +++ b/src/rom.c @@ -38,7 +38,7 @@ void CalibProc() { DM6300_SetPower(RF_POWER, RF_FREQ, pwr_offset); - I2C_Write8_Wait(10, ADDR_EEPROM, RF_FREQ * (POWER_MAX + 1) + RF_POWER, table_power[RF_FREQ][RF_POWER]); + I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_TAB1 + RF_FREQ * (POWER_MAX + 1) + RF_POWER, table_power[RF_FREQ][RF_POWER]); I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_TAB2 + RF_FREQ * (POWER_MAX + 1) + RF_POWER, table_power[RF_FREQ][RF_POWER]); I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_TAB3 + RF_FREQ * (POWER_MAX + 1) + RF_POWER, table_power[RF_FREQ][RF_POWER]); break; @@ -117,21 +117,21 @@ void CalibProc() { SPI_Write(0x3, 0x388, dcoc); // write to eeprom - I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC_EN, 0x00); - I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC_IH, rxbuf[2]); - I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC_IL, rxbuf[3]); - I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC_QH, rxbuf[4]); - I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC_QL, rxbuf[5]); - I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC2 + EEP_ADDR_DCOC_EN, 0x00); - I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC2 + EEP_ADDR_DCOC_IH, rxbuf[2]); - I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC2 + EEP_ADDR_DCOC_IL, rxbuf[3]); - I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC2 + EEP_ADDR_DCOC_QH, rxbuf[4]); - I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC2 + EEP_ADDR_DCOC_QL, rxbuf[5]); - I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC3 + EEP_ADDR_DCOC_EN, 0x00); - I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC3 + EEP_ADDR_DCOC_IH, rxbuf[2]); - I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC3 + EEP_ADDR_DCOC_IL, rxbuf[3]); - I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC3 + EEP_ADDR_DCOC_QH, rxbuf[4]); - I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC3 + EEP_ADDR_DCOC_QL, rxbuf[5]); + I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC1 + 0, 0x00); + I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC1 + 1, rxbuf[2]); + I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC1 + 2, rxbuf[3]); + I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC1 + 3, rxbuf[4]); + I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC1 + 4, rxbuf[5]); + I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC2 + 0, 0x00); + I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC2 + 1, rxbuf[2]); + I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC2 + 2, rxbuf[3]); + I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC2 + 3, rxbuf[4]); + I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC2 + 4, rxbuf[5]); + I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC3 + 0, 0x00); + I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC3 + 1, rxbuf[2]); + I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC3 + 2, rxbuf[3]); + I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC3 + 3, rxbuf[4]); + I2C_Write8_Wait(10, ADDR_EEPROM, EEP_ADDR_DCOC3 + 4, rxbuf[5]); break; } break;