You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
Currently Verilator is the only supported simulation engine. It is fast and Free and Open Source Software and remains an excellent default option. Recently cxxrtl was implemented and merged into Yosys and provides an alternative backend. Currently it runs slower than Verilator but is under very active development and has a rapidly expanding feature set and ecosystem which make it desirable to support.
@miek has made an example implementation that probably has some useful pieces or inspiration points. It is directly driving an IQ bus rather than AXI/Wishbone, but that should be a fairly simple piece to adapt. https://github.com/miek/gr-cxxrtl-experiment
Currently Verilator is the only supported simulation engine. It is fast and Free and Open Source Software and remains an excellent default option. Recently cxxrtl was implemented and merged into Yosys and provides an alternative backend. Currently it runs slower than Verilator but is under very active development and has a rapidly expanding feature set and ecosystem which make it desirable to support.
An example of using cxxrtl is included in this repository: https://github.com/tomverbeure/cxxrtl_eval
The text was updated successfully, but these errors were encountered: