diff --git a/lib86cpu/core/instructions.cpp b/lib86cpu/core/instructions.cpp
index 2a96b4f..6b63af3 100644
--- a/lib86cpu/core/instructions.cpp
+++ b/lib86cpu/core/instructions.cpp
@@ -816,6 +816,7 @@ uint32_t update_crN_helper(cpu_ctx_t *cpu_ctx, uint32_t new_cr, uint8_t idx)
 
 		if constexpr (idx1 != 2) {
 			cpu_ctx->hflags = (((new_cr & CR0_EM_MASK) << 3) | (cpu_ctx->hflags & ~HFLG_CR0_EM));
+			cpu_ctx->hflags = (((new_cr & CR0_MP_MASK) << 14) | (cpu_ctx->hflags & ~HFLG_CR0_MP));
 		}
 		cpu_ctx->hflags = (((new_cr & CR0_TS_MASK) << 7) | (cpu_ctx->hflags & ~HFLG_CR0_TS));
 
diff --git a/lib86cpu/core/internal.h b/lib86cpu/core/internal.h
index 3bf5057..abd3543 100644
--- a/lib86cpu/core/internal.h
+++ b/lib86cpu/core/internal.h
@@ -37,6 +37,7 @@ void JIT_API tlb_invalidate_(cpu_ctx_t *cpu_ctx, addr_t addr);
 // HFLG_CR4_OSFXSR: osfxsr flag of cr4
 // HFLG_CR0_TS: ts flag of cr0
 // HFLG_TIMEOUT: timeout check was emitted
+// HFLG_CR0_MP: mp flag of cr0
 // HFLG_CR0_VME: vme flag of cr4
 // HFLG_CR0_PVI: pvi flag of cr4
 #define CPL_SHIFT           0
@@ -50,6 +51,7 @@ void JIT_API tlb_invalidate_(cpu_ctx_t *cpu_ctx, addr_t addr);
 #define CR0_TS_SHIFT        10
 #define TIMEOUT_SHIFT       11
 #define INHIBIT_INT_SHIFT   14
+#define CR0_MP_SHIFT        15
 #define CR4_VME_SHIFT       19
 #define CR4_PVI_SHIFT       20
 #define HFLG_INVALID        (1 << 31) // this should use a bit position that doesn't overlap with either HFLG_CONST or EFLAGS_CONST
@@ -62,13 +64,14 @@ void JIT_API tlb_invalidate_(cpu_ctx_t *cpu_ctx, addr_t addr);
 #define HFLG_DBG_TRAP       (1 << DBG_TRAP_SHIFT)
 #define HFLG_TIMEOUT        (1 << TIMEOUT_SHIFT)
 #define HFLG_INHIBIT_INT    (1 << INHIBIT_INT_SHIFT)
+#define HFLG_CR0_MP         (1 << CR0_MP_SHIFT)
 #define HFLG_CR0_TS         (1 << CR0_TS_SHIFT)
 #define HFLG_CR4_OSFXSR     (1 << CR4_OSFXSR_SHIFT)
 #define HFLG_CR4_VME        (1 << CR4_VME_SHIFT)
 #define HFLG_CR4_PVI        (1 << CR4_PVI_SHIFT)
-#define HFLG_CONST          (HFLG_CPL | HFLG_CS32 | HFLG_SS32 | HFLG_PE_MODE | HFLG_CR0_EM | HFLG_TRAMP | HFLG_TIMEOUT | HFLG_INHIBIT_INT | HFLG_CR0_TS \
+#define HFLG_CONST          (HFLG_CPL | HFLG_CS32 | HFLG_SS32 | HFLG_PE_MODE | HFLG_CR0_EM | HFLG_TRAMP | HFLG_TIMEOUT | HFLG_INHIBIT_INT | HFLG_CR0_MP | HFLG_CR0_TS \
 | HFLG_CR4_OSFXSR | HFLG_CR4_VME | HFLG_CR4_PVI)
-#define HFLG_SAVED_MASK     (HFLG_CPL | HFLG_CS32 | HFLG_SS32 | HFLG_PE_MODE | HFLG_CR0_EM | HFLG_INHIBIT_INT | HFLG_CR0_TS | HFLG_CR4_OSFXSR | HFLG_CR4_VME | HFLG_CR4_PVI)
+#define HFLG_SAVED_MASK     (HFLG_CPL | HFLG_CS32 | HFLG_SS32 | HFLG_PE_MODE | HFLG_CR0_EM | HFLG_INHIBIT_INT | HFLG_CR0_MP | HFLG_CR0_TS | HFLG_CR4_OSFXSR | HFLG_CR4_VME | HFLG_CR4_PVI)
 
 // cpu interrupt flags
 #define CPU_NO_INT      0
diff --git a/lib86cpu/support.cpp b/lib86cpu/support.cpp
index 1b578cd..9cba0a7 100644
--- a/lib86cpu/support.cpp
+++ b/lib86cpu/support.cpp
@@ -14,7 +14,7 @@
 #endif
 
 // This should be updated whenever cpu members that need to be saved are added/removed
-#define SAVE_STATE_ID 3
+#define SAVE_STATE_ID 4
 
 
 void