From 802612bb5441ba1b6075da284e4d668601e50d5d Mon Sep 17 00:00:00 2001 From: Dmitry Stogov Date: Mon, 3 Jun 2024 12:20:07 +0300 Subject: [PATCH] Update IR IR commit: 97555e12b525b825ab3b2f12bfdfd5cb6c00b2b4 --- ext/opcache/jit/ir/ir_aarch64.dasc | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/ext/opcache/jit/ir/ir_aarch64.dasc b/ext/opcache/jit/ir/ir_aarch64.dasc index dd695a7f79db5..11c0f320dd2b1 100644 --- a/ext/opcache/jit/ir/ir_aarch64.dasc +++ b/ext/opcache/jit/ir/ir_aarch64.dasc @@ -5239,8 +5239,18 @@ static void ir_emit_tls(ir_ctx *ctx, ir_ref def, ir_insn *insn) ||#else || code = 0xd53bd040 | reg; // TODO: hard-coded: mrs reg, tpidr_el0 | .long code +||# ifdef __FreeBSD__ +|| if (insn->op3 == IR_NULL) { +| ldr Rx(reg), [Rx(reg), #insn->op2] +|| } else { +| ldr Rx(reg), [Rx(reg), #0] +| ldr Rx(reg), [Rx(reg), #insn->op2] +| ldr Rx(reg), [Rx(reg), #insn->op3] +|| } +||# else ||//??? IR_ASSERT(insn->op2 <= LDR_STR_PIMM64); | ldr Rx(reg), [Rx(reg), #insn->op2] +||# endif ||#endif if (IR_REG_SPILLED(ctx->regs[def][0])) { ir_emit_store(ctx, IR_ADDR, def, reg);