diff --git a/tests/designs/litex_base/CMakeLists.txt b/tests/designs/litex_base/CMakeLists.txt
index cf59eba..fc522ea 100644
--- a/tests/designs/litex_base/CMakeLists.txt
+++ b/tests/designs/litex_base/CMakeLists.txt
@@ -6,8 +6,6 @@ get_python_cpu_data(
 
 set(arty_gateware_dir ${CMAKE_CURRENT_BINARY_DIR}/digilent_arty/gateware)
 
-set(retarget ${CMAKE_SOURCE_DIR}/tests/common/retarget_xc7.v)
-
 add_litex_test(
     litex_board digilent_arty
     generated_sources
@@ -28,7 +26,6 @@ add_generic_test(
         digilent_arty/gateware/digilent_arty.v
     absolute_sources ${vexriscv}
     generated_xdc ${arty_gateware_dir}/digilent_arty.xdc
-    retarget ${retarget}
     failure_allowed
 )
 
diff --git a/tests/designs/litex_linux/CMakeLists.txt b/tests/designs/litex_linux/CMakeLists.txt
index 617c19e..e286588 100644
--- a/tests/designs/litex_linux/CMakeLists.txt
+++ b/tests/designs/litex_linux/CMakeLists.txt
@@ -10,8 +10,6 @@ get_python_cpu_data(
     ram
 )
 
-set(retarget ${CMAKE_SOURCE_DIR}/tests/common/retarget_xc7.v)
-
 # TODO: add capability to build designs from https://github.com/litex-hub/linux-on-litex-vexriscv
 #add_litex_test(
 #    litex_board digilent_arty
@@ -36,7 +34,6 @@ add_generic_test(
     absolute_sources
         ${vexriscv}
         ${ram}
-    retarget ${retarget}
     failure_allowed
 )