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I recently read this blog and found it fascinating how UVM can be integrated into Verilator for AXI verification. I am particularly interested in understanding how to apply the AXI-VIP framework to verify our own design.
Could you provide additional guidance or a README section detailing the steps to use AXI-VIP for testing custom designs? Specifically, I noticed the provided mem-tb example and was curious if we need to create similar testbenches and UVM components tailored to our DUT.
Thank you!
The text was updated successfully, but these errors were encountered:
I recently read this blog and found it fascinating how UVM can be integrated into Verilator for AXI verification. I am particularly interested in understanding how to apply the AXI-VIP framework to verify our own design.
Could you provide additional guidance or a README section detailing the steps to use AXI-VIP for testing custom designs? Specifically, I noticed the provided mem-tb example and was curious if we need to create similar testbenches and UVM components tailored to our DUT.
Thank you!
The text was updated successfully, but these errors were encountered: