Verilog package manager

[sathvikr]

Just launched a Verilog Package Manager!

The package manager autogenerates .vh headers, handles synthesis collateral, etc., so including modules is basically reduced to a single pip install.

Now, you don't need to go through the code, find sumbmodules, etc., which could be scattered across different repos, and handle synthesis collateral!

Link: https://github.com/getinstachip/vpm

It was made 2 days ago and already has interest from people at Neuralink and SambaNova.

Please contribute, suggest features, and report bugs (and star the repo...)!!!

[whitequark]

Why does it need an OpenAI API key?

[sathvikr]

Some commands (like finding modules/packages based on natural language) use OpenAI models.

Btw thanks for taking a look. Was it smooth to set up? Would love to hear your feedback.

[whitequark]

I actually don't feel that I should seriously consider any application that uses LLMs for a task like package management. Sorry about that!

[sathvikr]

I actually don't feel that I should seriously consider any application that uses LLMs for a task like package management. Sorry about that!

Oh I see, why's that a concern? The LLM is just for finding modules based on loose terms, not for managing/installing packages.

I can remove if that's still a concern, but would appreciate understanding where you're coming from :)

[rowanG077]

This effort is needed imo but you are focusing on the totally wrong things. I see no dependency resolving (I did not look that closely though) which is the major part that is important for a package manager imo. Yet you are adding some shiny AI features. It's totally backwards and doesn't inspire confidence in me.

[sathvikr]

Hey Rowan, thanks for the feedback. I've added dependency resolving with the include statement which installs a top level module and each of it's submodule dependencies automatically.

It also handles synthesis collateral. Example, when running "vpm include pfcache.v":

Pfcache.toml file:

[package]
name = "pfcache"
repository = "ZipCPU/zipcpu"

[dependencies]
ffetch = "..."
fwb_master = "..."

---

But I'm definitely missing a lot of things. It would be useful to hear specific feedback that I can implement to improve this tool.