This is the repo for 2024 Spring EE332 Digital System Design Lab in SUSTech.
You can find the lab material, source code and reports in this repo.
The project files are in Github Releases.
Environment: Vivado 2020.2 (Ubuntu20.04)
FPGA board: Nexys DDR4 or Nexys A7 (xc7a100tcsg324-1)