Feature Request: Option to remove buffer stage from AXI read/write

[leolitenstorrent]

Hello PeakRDL Development Team,

I and my project team noticed that there is an additional buffer stage added to the read/write transactions of the AXI Bus. Would it be possible if you add an exporter option to remove the buffer stage, so the read/writes would take one less cycle?

Thank you very much!

[amykyta3]

Are you using the latest version? I had a bug in a past version where an extra retiming register stage was accidentally enabled by default.

I did a quick check and I'm pretty sure the latency for AXI4-lite is 2 cycles if all the retiming features are disabled.

[leolitenstorrent]

Hello Alex,

I am using the latest version (0.15.0). Just to confirm, the read/write is taking two clocks to complete after the request is asserted even after all of the retimes are disabled. Is this intended?

Thanks!

[amykyta3]

Yes. Without any retime stages, 2 clocks is what is expected.

[leolitenstorrent]

Hello Alex,

Would it be possible that there be an option to reduce the transaction to one clock?

According to the AXI standard, a one-cycle transaction is possible and will be very useful when the digital design operates at high clock frequencies or when low latency is required (i.e. a memory/serializer-deserializer module), which is my team’s case.

I understand that the purpose of the response buffer stage is that in case the ready signal is not 1. However, in cases that ready is 1, there will always be an extra cycle of delay that can add up.

We have been using PeakRDL for a long time and really appreciate the library. Our design, which we have been working on for few years and is large-scale, anticipates single-cycle AXI transactions. This way, we can incorporate even more of PeakRDL into our design process. We very much appreciate your consideration!

Thank you!

[amykyta3]

Yeah I can see if I can tighten up the response time. I agree that if all optional retiming stages are removed, it should result in the minimum latency for a given protocol.

[leolitenstorrent]

Hello Alex,

Thank you!