verilator testbench support

[buttercutter]

fpga/riffa_hdl/counter.v: /* verilator lint_off WIDTH /
fpga/riffa_hdl/counter.v: / verilator lint_on WIDTH /
fpga/riffa_hdl/engine_layer.v: / verilator lint_off WIDTH /
fpga/riffa_hdl/engine_layer.v: / verilator lint_on WIDTH /
fpga/riffa_hdl/offset_to_mask.v: / verilator lint_off CASEX /
fpga/riffa_hdl/offset_to_mask.v: / verilator lint_on CASEX /
fpga/riffa_hdl/pipeline.v:/ verilator lint_off UNOPTFLAT /
fpga/riffa_hdl/pipeline.v:/ verilator lint_on UNOPTFLAT /
fpga/riffa_hdl/registers.v: / verilator lint_off WIDTH /
fpga/riffa_hdl/registers.v: / verilator lint_on WIDTH /
fpga/riffa_hdl/rxc_engine_ultrascale.v: / verilator lint_off WIDTH /
fpga/riffa_hdl/rxc_engine_ultrascale.v: / verilator lint_on WIDTH /
fpga/riffa_hdl/rxr_engine_ultrascale.v: / verilator lint_off WIDTH /
fpga/riffa_hdl/rxr_engine_ultrascale.v: / verilator lint_on WIDTH /
fpga/riffa_hdl/tlp.vh: / verilator lint_off CASEX /
fpga/riffa_hdl/tlp.vh: / verilator lint_on CASEX /
fpga/riffa_hdl/tlp.vh: / verilator lint_off CASEX /
fpga/riffa_hdl/tlp.vh: / verilator lint_on CASEX /
fpga/riffa_hdl/tx_data_fifo.v: / verilator lint_off WIDTH /
fpga/riffa_hdl/tx_data_fifo.v: / verilator lint_on WIDTH /
fpga/riffa_hdl/tx_engine_classic.v: / verilator lint_off WIDTH /
fpga/riffa_hdl/tx_engine_classic.v: / verilator lint_on WIDTH /
fpga/riffa_hdl/ultrascale.vh: / verilator lint_off CASEX /
fpga/riffa_hdl/ultrascale.vh: / verilator lint_on CASEX /
fpga/riffa_hdl/ultrascale.vh: / verilator lint_off CASEX /
fpga/riffa_hdl/ultrascale.vh: / verilator lint_on CASEX */

When I grep for 'verilator' , I had the above search result. However, I could not find any c++ verilator testbench for the verilog coding in the github repo. Could anyone advise ?

Alternatively, let me rephare my question: where could I find the testbench for RIFFA verilog coding ?