diff --git a/src/main/scala/millfork/output/AbstractAssembler.scala b/src/main/scala/millfork/output/AbstractAssembler.scala
index 07342827..5527dc6a 100644
--- a/src/main/scala/millfork/output/AbstractAssembler.scala
+++ b/src/main/scala/millfork/output/AbstractAssembler.scala
@@ -594,6 +594,9 @@ abstract class AbstractAssembler[T <: AbstractCode](private val program: Program
         val db = mem.banks("default")
         val ib = mem.banks(ivBank)
         val size = rwDataEnd - rwDataStart
+        if (size > 0 && !labelMap.contains("init_rw_memory")) {
+          log.warn("The program contains initialized variables, but it never calls init_rw_memory().")
+        }
         if (size < 0) log.fatal("Negative writable memory size. It's a compiler bug.")
         val ivAddr = codeAllocators(ivBank).allocateBytes(ib, options, size, initialized = true, writeable = false, AllocationLocation.High, NoAlignment)
         unimportantLabelMap += "__rwdata_init_start" -> (ib.index -> ivAddr)