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Create documentation on how FPGA boot sequence is done #6

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waridh opened this issue Oct 14, 2023 · 1 comment
Open

Create documentation on how FPGA boot sequence is done #6

waridh opened this issue Oct 14, 2023 · 1 comment
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documentation Improvements or additions to documentation

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@waridh
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waridh commented Oct 14, 2023

Create the notes for how FPGA boots

This is so that we would know if we can use the FPGA as a part of bootloader integrity verification.

Goals

  • Determine if FPGA lose their states when turned off.
  • Get a better understanding of the boot flow for the FPGA. Might have to expand the scope to the entire board as the other microcontrollers may play a part in the boot sequence for the FPGA as well.

Deliverables

  • New documentation on how an FPGA boots
  • Answer the question if a programmed FPGA will keep its configuration after being turned off.
@waridh waridh converted this from a draft issue Oct 14, 2023
@waridh waridh self-assigned this Oct 14, 2023
@waridh waridh added the documentation Improvements or additions to documentation label Oct 14, 2023
@waridh waridh moved this from Todo to In Progress in (OLD) ExAlta3 Project Management for Software Oct 14, 2023
@dheadrick1618
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FPGAs are configured using a bitstream that is generated from compiling a design made in an HDL (like VHDL or Verilog) . The configuration representing the associated simulated hardware is stored in this bitstream. You could think of the bitstream like an executable of a program I guess. I might be wrong there, but I look forward to reading what you find! :) [you may take a class on this stuff called ECE410 later on]

@waridh waridh moved this from In Progress to Todo in (OLD) ExAlta3 Project Management for Software Jan 2, 2024
@waridh waridh removed their assignment Jan 2, 2024
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Labels
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